drivers/mfd/twl4030-power.c

   1 /*
   2  * linux/drivers/i2c/chips/twl4030-power.c
   3  *
   4  * Handle TWL4030 Power initialization
   5  *
   6  * Copyright (C) 2008 Nokia Corporation
   7  * Copyright (C) 2006 Texas Instruments, Inc
   8  *
   9  * Written by   Kalle Jokiniemi
  10  *              Peter De Schrijver <peter.de-schrijver@nokia.com>
  11  * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com>
  12  *
  13  * This file is subject to the terms and conditions of the GNU General
  14  * Public License. See the file "COPYING" in the main directory of this
  15  * archive for more details.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/pm.h>
  29 #include <linux/i2c/twl.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/of.h>
  32 #include <linux/of_device.h>
  33
  34 #include <asm/mach-types.h>
  35
  36 static u8 twl4030_start_script_address = 0x2b;
  37
  38 /* Register bits for P1, P2 and P3_SW_EVENTS */
  39 #define PWR_STOPON_PRWON        BIT(6)
  40 #define PWR_STOPON_SYSEN        BIT(5)
  41 #define PWR_ENABLE_WARMRESET    BIT(4)
  42 #define PWR_LVL_WAKEUP          BIT(3)
  43 #define PWR_DEVACT              BIT(2)
  44 #define PWR_DEVSLP              BIT(1)
  45 #define PWR_DEVOFF              BIT(0)
  46
  47 #define SEQ_OFFSYNC             (1 << 0)
  48
  49 #define PHY_TO_OFF_PM_MASTER(p)         (p - 0x36)
  50 #define PHY_TO_OFF_PM_RECEIVER(p)       (p - 0x5b)
  51
  52 /* resource - hfclk */
  53 #define R_HFCLKOUT_DEV_GRP      PHY_TO_OFF_PM_RECEIVER(0xe6)
  54
  55 /* PM events */
  56 #define R_P1_SW_EVENTS          PHY_TO_OFF_PM_MASTER(0x46)
  57 #define R_P2_SW_EVENTS          PHY_TO_OFF_PM_MASTER(0x47)
  58 #define R_P3_SW_EVENTS          PHY_TO_OFF_PM_MASTER(0x48)
  59 #define R_CFG_P1_TRANSITION     PHY_TO_OFF_PM_MASTER(0x36)
  60 #define R_CFG_P2_TRANSITION     PHY_TO_OFF_PM_MASTER(0x37)
  61 #define R_CFG_P3_TRANSITION     PHY_TO_OFF_PM_MASTER(0x38)
  62
  63 #define END_OF_SCRIPT           0x3f
  64
  65 #define R_SEQ_ADD_A2S           PHY_TO_OFF_PM_MASTER(0x55)
  66 #define R_SEQ_ADD_S2A12         PHY_TO_OFF_PM_MASTER(0x56)
  67 #define R_SEQ_ADD_S2A3          PHY_TO_OFF_PM_MASTER(0x57)
  68 #define R_SEQ_ADD_WARM          PHY_TO_OFF_PM_MASTER(0x58)
  69 #define R_MEMORY_ADDRESS        PHY_TO_OFF_PM_MASTER(0x59)
  70 #define R_MEMORY_DATA           PHY_TO_OFF_PM_MASTER(0x5a)
  71
  72 /* resource configuration registers
  73    <RESOURCE>_DEV_GRP   at address 'n+0'
  74    <RESOURCE>_TYPE      at address 'n+1'
  75    <RESOURCE>_REMAP     at address 'n+2'
  76    <RESOURCE>_DEDICATED at address 'n+3'
  77 */
  78 #define DEV_GRP_OFFSET          0
  79 #define TYPE_OFFSET             1
  80 #define REMAP_OFFSET            2
  81 #define DEDICATED_OFFSET        3
  82
  83 /* Bit positions in the registers */
  84
  85 /* <RESOURCE>_DEV_GRP */
  86 #define DEV_GRP_SHIFT           5
  87 #define DEV_GRP_MASK            (7 << DEV_GRP_SHIFT)
  88
  89 /* <RESOURCE>_TYPE */
  90 #define TYPE_SHIFT              0
  91 #define TYPE_MASK               (7 << TYPE_SHIFT)
  92 #define TYPE2_SHIFT             3
  93 #define TYPE2_MASK              (3 << TYPE2_SHIFT)
  94
  95 /* <RESOURCE>_REMAP */
  96 #define SLEEP_STATE_SHIFT       0
  97 #define SLEEP_STATE_MASK        (0xf << SLEEP_STATE_SHIFT)
  98 #define OFF_STATE_SHIFT         4
  99 #define OFF_STATE_MASK          (0xf << OFF_STATE_SHIFT)
 100
 101 static u8 res_config_addrs[] = {
 102         [RES_VAUX1]     = 0x17,
 103         [RES_VAUX2]     = 0x1b,
 104         [RES_VAUX3]     = 0x1f,
 105         [RES_VAUX4]     = 0x23,
 106         [RES_VMMC1]     = 0x27,
 107         [RES_VMMC2]     = 0x2b,
 108         [RES_VPLL1]     = 0x2f,
 109         [RES_VPLL2]     = 0x33,
 110         [RES_VSIM]      = 0x37,
 111         [RES_VDAC]      = 0x3b,
 112         [RES_VINTANA1]  = 0x3f,
 113         [RES_VINTANA2]  = 0x43,
 114         [RES_VINTDIG]   = 0x47,
 115         [RES_VIO]       = 0x4b,
 116         [RES_VDD1]      = 0x55,
 117         [RES_VDD2]      = 0x63,
 118         [RES_VUSB_1V5]  = 0x71,
 119         [RES_VUSB_1V8]  = 0x74,
 120         [RES_VUSB_3V1]  = 0x77,
 121         [RES_VUSBCP]    = 0x7a,
 122         [RES_REGEN]     = 0x7f,
 123         [RES_NRES_PWRON] = 0x82,
 124         [RES_CLKEN]     = 0x85,
 125         [RES_SYSEN]     = 0x88,
 126         [RES_HFCLKOUT]  = 0x8b,
 127         [RES_32KCLKOUT] = 0x8e,
 128         [RES_RESET]     = 0x91,
 129         [RES_MAIN_REF]  = 0x94,
 130 };
 131
 132 /*
 133  * Usable values for .remap_sleep and .remap_off
 134  * Based on table "5.3.3 Resource Operating modes"
 135  */
 136 enum {
 137         TWL_REMAP_OFF = 0,
 138         TWL_REMAP_SLEEP = 8,
 139         TWL_REMAP_ACTIVE = 9,
 140 };
 141
 142 /*
 143  * Macros to configure the PM register states for various resources.
 144  * Note that we can make MSG_SINGULAR etc private to this driver once
 145  * omap3 has been made DT only.
 146  */
 147 #define TWL_DFLT_DELAY          2       /* typically 2 32 KiHz cycles */
 148 #define TWL_DEV_GRP_P123        (DEV_GRP_P1 | DEV_GRP_P2 | DEV_GRP_P3)
 149 #define TWL_RESOURCE_SET(res, state)                                    \
 150         { MSG_SINGULAR(DEV_GRP_NULL, (res), (state)), TWL_DFLT_DELAY }
 151 #define TWL_RESOURCE_ON(res)    TWL_RESOURCE_SET(res, RES_STATE_ACTIVE)
 152 #define TWL_RESOURCE_OFF(res)   TWL_RESOURCE_SET(res, RES_STATE_OFF)
 153 #define TWL_RESOURCE_RESET(res) TWL_RESOURCE_SET(res, RES_STATE_WRST)
 154 /*
 155  * It seems that type1 and type2 is just the resource init order
 156  * number for the type1 and type2 group.
 157  */
 158 #define TWL_RESOURCE_SET_ACTIVE(res, state)                             \
 159         { MSG_SINGULAR(DEV_GRP_NULL, (res), RES_STATE_ACTIVE), (state) }
 160 #define TWL_RESOURCE_GROUP_RESET(group, type1, type2)                   \
 161         { MSG_BROADCAST(DEV_GRP_NULL, (group), (type1), (type2),        \
 162                 RES_STATE_WRST), TWL_DFLT_DELAY }
 163 #define TWL_RESOURCE_GROUP_SLEEP(group, type, type2)                    \
 164         { MSG_BROADCAST(DEV_GRP_NULL, (group), (type), (type2),         \
 165                 RES_STATE_SLEEP), TWL_DFLT_DELAY }
 166 #define TWL_RESOURCE_GROUP_ACTIVE(group, type, type2)                   \
 167         { MSG_BROADCAST(DEV_GRP_NULL, (group), (type), (type2),         \
 168                 RES_STATE_ACTIVE), TWL_DFLT_DELAY }
 169 #define TWL_REMAP_SLEEP(res, devgrp, typ, typ2)                         \
 170         { .resource = (res), .devgroup = (devgrp),                      \
 171           .type = (typ), .type2 = (typ2),                               \
 172           .remap_off = TWL_REMAP_OFF,                                   \
 173           .remap_sleep = TWL_REMAP_SLEEP, }
 174 #define TWL_REMAP_OFF(res, devgrp, typ, typ2)                           \
 175         { .resource = (res), .devgroup = (devgrp),                      \
 176           .type = (typ), .type2 = (typ2),                               \
 177           .remap_off = TWL_REMAP_OFF, .remap_sleep = TWL_REMAP_OFF, }
 178
 179 static int twl4030_write_script_byte(u8 address, u8 byte)
 180 {
 181         int err;
 182
 183         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS);
 184         if (err)
 185                 goto out;
 186         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA);
 187 out:
 188         return err;
 189 }
 190
 191 static int twl4030_write_script_ins(u8 address, u16 pmb_message,
 192                                            u8 delay, u8 next)
 193 {
 194         int err;
 195
 196         address *= 4;
 197         err = twl4030_write_script_byte(address++, pmb_message >> 8);
 198         if (err)
 199                 goto out;
 200         err = twl4030_write_script_byte(address++, pmb_message & 0xff);
 201         if (err)
 202                 goto out;
 203         err = twl4030_write_script_byte(address++, delay);
 204         if (err)
 205                 goto out;
 206         err = twl4030_write_script_byte(address++, next);
 207 out:
 208         return err;
 209 }
 210
 211 static int twl4030_write_script(u8 address, struct twl4030_ins *script,
 212                                        int len)
 213 {
 214         int err = -EINVAL;
 215
 216         for (; len; len--, address++, script++) {
 217                 if (len == 1) {
 218                         err = twl4030_write_script_ins(address,
 219                                                 script->pmb_message,
 220                                                 script->delay,
 221                                                 END_OF_SCRIPT);
 222                         if (err)
 223                                 break;
 224                 } else {
 225                         err = twl4030_write_script_ins(address,
 226                                                 script->pmb_message,
 227                                                 script->delay,
 228                                                 address + 1);
 229                         if (err)
 230                                 break;
 231                 }
 232         }
 233         return err;
 234 }
 235
 236 static int twl4030_config_wakeup3_sequence(u8 address)
 237 {
 238         int err;
 239         u8 data;
 240
 241         /* Set SLEEP to ACTIVE SEQ address for P3 */
 242         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3);
 243         if (err)
 244                 goto out;
 245
 246         /* P3 LVL_WAKEUP should be on LEVEL */
 247         err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS);
 248         if (err)
 249                 goto out;
 250         data |= PWR_LVL_WAKEUP;
 251         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS);
 252 out:
 253         if (err)
 254                 pr_err("TWL4030 wakeup sequence for P3 config error\n");
 255         return err;
 256 }
 257
 258 static int twl4030_config_wakeup12_sequence(u8 address)
 259 {
 260         int err = 0;
 261         u8 data;
 262
 263         /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
 264         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12);
 265         if (err)
 266                 goto out;
 267
 268         /* P1/P2 LVL_WAKEUP should be on LEVEL */
 269         err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS);
 270         if (err)
 271                 goto out;
 272
 273         data |= PWR_LVL_WAKEUP;
 274         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS);
 275         if (err)
 276                 goto out;
 277
 278         err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS);
 279         if (err)
 280                 goto out;
 281
 282         data |= PWR_LVL_WAKEUP;
 283         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS);
 284         if (err)
 285                 goto out;
 286
 287         if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
 288                 /* Disabling AC charger effect on sleep-active transitions */
 289                 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data,
 290                                       R_CFG_P1_TRANSITION);
 291                 if (err)
 292                         goto out;
 293                 data &= ~(1<<1);
 294                 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data,
 295                                        R_CFG_P1_TRANSITION);
 296                 if (err)
 297                         goto out;
 298         }
 299
 300 out:
 301         if (err)
 302                 pr_err("TWL4030 wakeup sequence for P1 and P2" \
 303                         "config error\n");
 304         return err;
 305 }
 306
 307 static int twl4030_config_sleep_sequence(u8 address)
 308 {
 309         int err;
 310
 311         /* Set ACTIVE to SLEEP SEQ address in T2 memory*/
 312         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S);
 313
 314         if (err)
 315                 pr_err("TWL4030 sleep sequence config error\n");
 316
 317         return err;
 318 }
 319
 320 static int twl4030_config_warmreset_sequence(u8 address)
 321 {
 322         int err;
 323         u8 rd_data;
 324
 325         /* Set WARM RESET SEQ address for P1 */
 326         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM);
 327         if (err)
 328                 goto out;
 329
 330         /* P1/P2/P3 enable WARMRESET */
 331         err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS);
 332         if (err)
 333                 goto out;
 334
 335         rd_data |= PWR_ENABLE_WARMRESET;
 336         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS);
 337         if (err)
 338                 goto out;
 339
 340         err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS);
 341         if (err)
 342                 goto out;
 343
 344         rd_data |= PWR_ENABLE_WARMRESET;
 345         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS);
 346         if (err)
 347                 goto out;
 348
 349         err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS);
 350         if (err)
 351                 goto out;
 352
 353         rd_data |= PWR_ENABLE_WARMRESET;
 354         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS);
 355 out:
 356         if (err)
 357                 pr_err("TWL4030 warmreset seq config error\n");
 358         return err;
 359 }
 360
 361 static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
 362 {
 363         int rconfig_addr;
 364         int err;
 365         u8 type;
 366         u8 grp;
 367         u8 remap;
 368
 369         if (rconfig->resource > TOTAL_RESOURCES) {
 370                 pr_err("TWL4030 Resource %d does not exist\n",
 371                         rconfig->resource);
 372                 return -EINVAL;
 373         }
 374
 375         rconfig_addr = res_config_addrs[rconfig->resource];
 376
 377         /* Set resource group */
 378         err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp,
 379                               rconfig_addr + DEV_GRP_OFFSET);
 380         if (err) {
 381                 pr_err("TWL4030 Resource %d group could not be read\n",
 382                         rconfig->resource);
 383                 return err;
 384         }
 385
 386         if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) {
 387                 grp &= ~DEV_GRP_MASK;
 388                 grp |= rconfig->devgroup << DEV_GRP_SHIFT;
 389                 err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
 390                                        grp, rconfig_addr + DEV_GRP_OFFSET);
 391                 if (err < 0) {
 392                         pr_err("TWL4030 failed to program devgroup\n");
 393                         return err;
 394                 }
 395         }
 396
 397         /* Set resource types */
 398         err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type,
 399                                 rconfig_addr + TYPE_OFFSET);
 400         if (err < 0) {
 401                 pr_err("TWL4030 Resource %d type could not be read\n",
 402                         rconfig->resource);
 403                 return err;
 404         }
 405
 406         if (rconfig->type != TWL4030_RESCONFIG_UNDEF) {
 407                 type &= ~TYPE_MASK;
 408                 type |= rconfig->type << TYPE_SHIFT;
 409         }
 410
 411         if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) {
 412                 type &= ~TYPE2_MASK;
 413                 type |= rconfig->type2 << TYPE2_SHIFT;
 414         }
 415
 416         err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
 417                                 type, rconfig_addr + TYPE_OFFSET);
 418         if (err < 0) {
 419                 pr_err("TWL4030 failed to program resource type\n");
 420                 return err;
 421         }
 422
 423         /* Set remap states */
 424         err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap,
 425                               rconfig_addr + REMAP_OFFSET);
 426         if (err < 0) {
 427                 pr_err("TWL4030 Resource %d remap could not be read\n",
 428                         rconfig->resource);
 429                 return err;
 430         }
 431
 432         if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) {
 433                 remap &= ~OFF_STATE_MASK;
 434                 remap |= rconfig->remap_off << OFF_STATE_SHIFT;
 435         }
 436
 437         if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) {
 438                 remap &= ~SLEEP_STATE_MASK;
 439                 remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT;
 440         }
 441
 442         err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
 443                                remap,
 444                                rconfig_addr + REMAP_OFFSET);
 445         if (err < 0) {
 446                 pr_err("TWL4030 failed to program remap\n");
 447                 return err;
 448         }
 449
 450         return 0;
 451 }
 452
 453 static int load_twl4030_script(struct twl4030_script *tscript,
 454                u8 address)
 455 {
 456         int err;
 457         static int order;
 458
 459         /* Make sure the script isn't going beyond last valid address (0x3f) */
 460         if ((address + tscript->size) > END_OF_SCRIPT) {
 461                 pr_err("TWL4030 scripts too big error\n");
 462                 return -EINVAL;
 463         }
 464
 465         err = twl4030_write_script(address, tscript->script, tscript->size);
 466         if (err)
 467                 goto out;
 468
 469         if (tscript->flags & TWL4030_WRST_SCRIPT) {
 470                 err = twl4030_config_warmreset_sequence(address);
 471                 if (err)
 472                         goto out;
 473         }
 474         if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) {
 475                 /* Reset any existing sleep script to avoid hangs on reboot */
 476                 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
 477                                        R_SEQ_ADD_A2S);
 478                 if (err)
 479                         goto out;
 480
 481                 err = twl4030_config_wakeup12_sequence(address);
 482                 if (err)
 483                         goto out;
 484                 order = 1;
 485         }
 486         if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) {
 487                 err = twl4030_config_wakeup3_sequence(address);
 488                 if (err)
 489                         goto out;
 490         }
 491         if (tscript->flags & TWL4030_SLEEP_SCRIPT) {
 492                 if (!order)
 493                         pr_warning("TWL4030: Bad order of scripts (sleep "\
 494                                         "script before wakeup) Leads to boot"\
 495                                         "failure on some boards\n");
 496                 err = twl4030_config_sleep_sequence(address);
 497         }
 498 out:
 499         return err;
 500 }
 501
 502 int twl4030_remove_script(u8 flags)
 503 {
 504         int err = 0;
 505
 506         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
 507                                TWL4030_PM_MASTER_PROTECT_KEY);
 508         if (err) {
 509                 pr_err("twl4030: unable to unlock PROTECT_KEY\n");
 510                 return err;
 511         }
 512
 513         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
 514                                TWL4030_PM_MASTER_PROTECT_KEY);
 515         if (err) {
 516                 pr_err("twl4030: unable to unlock PROTECT_KEY\n");
 517                 return err;
 518         }
 519
 520         if (flags & TWL4030_WRST_SCRIPT) {
 521                 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
 522                                        R_SEQ_ADD_WARM);
 523                 if (err)
 524                         return err;
 525         }
 526         if (flags & TWL4030_WAKEUP12_SCRIPT) {
 527                 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
 528                                        R_SEQ_ADD_S2A12);
 529                 if (err)
 530                         return err;
 531         }
 532         if (flags & TWL4030_WAKEUP3_SCRIPT) {
 533                 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
 534                                        R_SEQ_ADD_S2A3);
 535                 if (err)
 536                         return err;
 537         }
 538         if (flags & TWL4030_SLEEP_SCRIPT) {
 539                 err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
 540                                        R_SEQ_ADD_A2S);
 541                 if (err)
 542                         return err;
 543         }
 544
 545         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
 546                                TWL4030_PM_MASTER_PROTECT_KEY);
 547         if (err)
 548                 pr_err("TWL4030 Unable to relock registers\n");
 549
 550         return err;
 551 }
 552
 553 static int
 554 twl4030_power_configure_scripts(const struct twl4030_power_data *pdata)
 555 {
 556         int err;
 557         int i;
 558         u8 address = twl4030_start_script_address;
 559
 560         for (i = 0; i < pdata->num; i++) {
 561                 err = load_twl4030_script(pdata->scripts[i], address);
 562                 if (err)
 563                         return err;
 564                 address += pdata->scripts[i]->size;
 565         }
 566
 567         return 0;
 568 }
 569
 570 static void twl4030_patch_rconfig(struct twl4030_resconfig *common,
 571                                   struct twl4030_resconfig *board)
 572 {
 573         while (common->resource) {
 574                 struct twl4030_resconfig *b = board;
 575
 576                 while (b->resource) {
 577                         if (b->resource == common->resource) {
 578                                 *common = *b;
 579                                 break;
 580                         }
 581                         b++;
 582                 }
 583                 common++;
 584         }
 585 }
 586
 587 static int
 588 twl4030_power_configure_resources(const struct twl4030_power_data *pdata)
 589 {
 590         struct twl4030_resconfig *resconfig = pdata->resource_config;
 591         struct twl4030_resconfig *boardconf = pdata->board_config;
 592         int err;
 593
 594         if (resconfig) {
 595                 if (boardconf)
 596                         twl4030_patch_rconfig(resconfig, boardconf);
 597
 598                 while (resconfig->resource) {
 599                         err = twl4030_configure_resource(resconfig);
 600                         if (err)
 601                                 return err;
 602                         resconfig++;
 603                 }
 604         }
 605
 606         return 0;
 607 }
 608
 609 /*
 610  * In master mode, start the power off sequence.
 611  * After a successful execution, TWL shuts down the power to the SoC
 612  * and all peripherals connected to it.
 613  */
 614 void twl4030_power_off(void)
 615 {
 616         int err;
 617
 618         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF,
 619                                TWL4030_PM_MASTER_P1_SW_EVENTS);
 620         if (err)
 621                 pr_err("TWL4030 Unable to power off\n");
 622 }
 623
 624 static bool twl4030_power_use_poweroff(const struct twl4030_power_data *pdata,
 625                                         struct device_node *node)
 626 {
 627         if (pdata && pdata->use_poweroff)
 628                 return true;
 629
 630         if (of_property_read_bool(node, "ti,use_poweroff"))
 631                 return true;
 632
 633         return false;
 634 }
 635
 636 #ifdef CONFIG_OF
 637
 638 /* Generic warm reset configuration for omap3 */
 639
 640 static struct twl4030_ins omap3_wrst_seq[] = {
 641         TWL_RESOURCE_OFF(RES_NRES_PWRON),
 642         TWL_RESOURCE_OFF(RES_RESET),
 643         TWL_RESOURCE_RESET(RES_MAIN_REF),
 644         TWL_RESOURCE_GROUP_RESET(RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2),
 645         TWL_RESOURCE_RESET(RES_VUSB_3V1),
 646         TWL_RESOURCE_GROUP_RESET(RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1),
 647         TWL_RESOURCE_GROUP_RESET(RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0),
 648         TWL_RESOURCE_ON(RES_RESET),
 649         TWL_RESOURCE_ON(RES_NRES_PWRON),
 650 };
 651
 652 static struct twl4030_script omap3_wrst_script = {
 653         .script = omap3_wrst_seq,
 654         .size   = ARRAY_SIZE(omap3_wrst_seq),
 655         .flags  = TWL4030_WRST_SCRIPT,
 656 };
 657
 658 static struct twl4030_script *omap3_reset_scripts[] = {
 659         &omap3_wrst_script,
 660 };
 661
 662 static struct twl4030_resconfig omap3_rconfig[] = {
 663         TWL_REMAP_SLEEP(RES_HFCLKOUT, DEV_GRP_P3, -1, -1),
 664         TWL_REMAP_SLEEP(RES_VDD1, DEV_GRP_P1, -1, -1),
 665         TWL_REMAP_SLEEP(RES_VDD2, DEV_GRP_P1, -1, -1),
 666         { 0, 0 },
 667 };
 668
 669 static struct twl4030_power_data omap3_reset = {
 670         .scripts                = omap3_reset_scripts,
 671         .num                    = ARRAY_SIZE(omap3_reset_scripts),
 672         .resource_config        = omap3_rconfig,
 673 };
 674
 675 /* Recommended generic default idle configuration for off-idle */
 676
 677 /* Broadcast message to put res to sleep */
 678 static struct twl4030_ins omap3_idle_sleep_on_seq[] = {
 679         TWL_RESOURCE_GROUP_SLEEP(RES_GRP_ALL, RES_TYPE_ALL, 0),
 680 };
 681
 682 static struct twl4030_script omap3_idle_sleep_on_script = {
 683         .script = omap3_idle_sleep_on_seq,
 684         .size   = ARRAY_SIZE(omap3_idle_sleep_on_seq),
 685         .flags  = TWL4030_SLEEP_SCRIPT,
 686 };
 687
 688 /* Broadcast message to put res to active */
 689 static struct twl4030_ins omap3_idle_wakeup_p12_seq[] = {
 690         TWL_RESOURCE_GROUP_ACTIVE(RES_GRP_ALL, RES_TYPE_ALL, 0),
 691 };
 692
 693 static struct twl4030_script omap3_idle_wakeup_p12_script = {
 694         .script = omap3_idle_wakeup_p12_seq,
 695         .size   = ARRAY_SIZE(omap3_idle_wakeup_p12_seq),
 696         .flags  = TWL4030_WAKEUP12_SCRIPT,
 697 };
 698
 699 /* Broadcast message to put res to active */
 700 static struct twl4030_ins omap3_idle_wakeup_p3_seq[] = {
 701         TWL_RESOURCE_SET_ACTIVE(RES_CLKEN, 0x37),
 702         TWL_RESOURCE_GROUP_ACTIVE(RES_GRP_ALL, RES_TYPE_ALL, 0),
 703 };
 704
 705 static struct twl4030_script omap3_idle_wakeup_p3_script = {
 706         .script = omap3_idle_wakeup_p3_seq,
 707         .size   = ARRAY_SIZE(omap3_idle_wakeup_p3_seq),
 708         .flags  = TWL4030_WAKEUP3_SCRIPT,
 709 };
 710
 711 static struct twl4030_script *omap3_idle_scripts[] = {
 712         &omap3_idle_wakeup_p12_script,
 713         &omap3_idle_wakeup_p3_script,
 714         &omap3_wrst_script,
 715         &omap3_idle_sleep_on_script,
 716 };
 717
 718 /*
 719  * Recommended configuration based on "Recommended Sleep
 720  * Sequences for the Zoom Platform":
 721  * http://omappedia.com/wiki/File:Recommended_Sleep_Sequences_Zoom.pdf
 722  * Note that the type1 and type2 seem to be just the init order number
 723  * for type1 and type2 groups as specified in the document mentioned
 724  * above.
 725  */
 726 static struct twl4030_resconfig omap3_idle_rconfig[] = {
 727         TWL_REMAP_SLEEP(RES_VAUX1, TWL4030_RESCONFIG_UNDEF, 0, 0),
 728         TWL_REMAP_SLEEP(RES_VAUX2, TWL4030_RESCONFIG_UNDEF, 0, 0),
 729         TWL_REMAP_SLEEP(RES_VAUX3, TWL4030_RESCONFIG_UNDEF, 0, 0),
 730         TWL_REMAP_SLEEP(RES_VAUX4, TWL4030_RESCONFIG_UNDEF, 0, 0),
 731         TWL_REMAP_SLEEP(RES_VMMC1, TWL4030_RESCONFIG_UNDEF, 0, 0),
 732         TWL_REMAP_SLEEP(RES_VMMC2, TWL4030_RESCONFIG_UNDEF, 0, 0),
 733         TWL_REMAP_OFF(RES_VPLL1, DEV_GRP_P1, 3, 1),
 734         TWL_REMAP_SLEEP(RES_VPLL2, DEV_GRP_P1, 0, 0),
 735         TWL_REMAP_SLEEP(RES_VSIM, TWL4030_RESCONFIG_UNDEF, 0, 0),
 736         TWL_REMAP_SLEEP(RES_VDAC, TWL4030_RESCONFIG_UNDEF, 0, 0),
 737         TWL_REMAP_SLEEP(RES_VINTANA1, TWL_DEV_GRP_P123, 1, 2),
 738         TWL_REMAP_SLEEP(RES_VINTANA2, TWL_DEV_GRP_P123, 0, 2),
 739         TWL_REMAP_SLEEP(RES_VINTDIG, TWL_DEV_GRP_P123, 1, 2),
 740         TWL_REMAP_SLEEP(RES_VIO, TWL_DEV_GRP_P123, 2, 2),
 741         TWL_REMAP_OFF(RES_VDD1, DEV_GRP_P1, 4, 1),
 742         TWL_REMAP_OFF(RES_VDD2, DEV_GRP_P1, 3, 1),
 743         TWL_REMAP_SLEEP(RES_VUSB_1V5, TWL4030_RESCONFIG_UNDEF, 0, 0),
 744         TWL_REMAP_SLEEP(RES_VUSB_1V8, TWL4030_RESCONFIG_UNDEF, 0, 0),
 745         TWL_REMAP_SLEEP(RES_VUSB_3V1, TWL_DEV_GRP_P123, 0, 0),
 746         /* Resource #20 USB charge pump skipped */
 747         TWL_REMAP_SLEEP(RES_REGEN, TWL_DEV_GRP_P123, 2, 1),
 748         TWL_REMAP_SLEEP(RES_NRES_PWRON, TWL_DEV_GRP_P123, 0, 1),
 749         TWL_REMAP_SLEEP(RES_CLKEN, TWL_DEV_GRP_P123, 3, 2),
 750         TWL_REMAP_SLEEP(RES_SYSEN, TWL_DEV_GRP_P123, 6, 1),
 751         TWL_REMAP_SLEEP(RES_HFCLKOUT, DEV_GRP_P3, 0, 2),
 752         TWL_REMAP_SLEEP(RES_32KCLKOUT, TWL_DEV_GRP_P123, 0, 0),
 753         TWL_REMAP_SLEEP(RES_RESET, TWL_DEV_GRP_P123, 6, 0),
 754         TWL_REMAP_SLEEP(RES_MAIN_REF, TWL_DEV_GRP_P123, 0, 0),
 755         { /* Terminator */ },
 756 };
 757
 758 static struct twl4030_power_data omap3_idle = {
 759         .scripts                = omap3_idle_scripts,
 760         .num                    = ARRAY_SIZE(omap3_idle_scripts),
 761         .resource_config        = omap3_idle_rconfig,
 762 };
 763
 764 /* Disable 32 KiHz oscillator during idle */
 765 static struct twl4030_resconfig osc_off_rconfig[] = {
 766         TWL_REMAP_OFF(RES_CLKEN, DEV_GRP_P1 | DEV_GRP_P3, 3, 2),
 767         { /* Terminator */ },
 768 };
 769
 770 static struct twl4030_power_data osc_off_idle = {
 771         .scripts                = omap3_idle_scripts,
 772         .num                    = ARRAY_SIZE(omap3_idle_scripts),
 773         .resource_config        = omap3_idle_rconfig,
 774         .board_config           = osc_off_rconfig,
 775 };
 776
 777 static struct of_device_id twl4030_power_of_match[] = {
 778         {
 779                 .compatible = "ti,twl4030-power-reset",
 780                 .data = &omap3_reset,
 781         },
 782         {
 783                 .compatible = "ti,twl4030-power-idle",
 784                 .data = &omap3_idle,
 785         },
 786         {
 787                 .compatible = "ti,twl4030-power-idle-osc-off",
 788                 .data = &osc_off_idle,
 789         },
 790         { },
 791 };
 792 MODULE_DEVICE_TABLE(of, twl4030_power_of_match);
 793 #endif  /* CONFIG_OF */
 794
 795 static int twl4030_power_probe(struct platform_device *pdev)
 796 {
 797         const struct twl4030_power_data *pdata = dev_get_platdata(&pdev->dev);
 798         struct device_node *node = pdev->dev.of_node;
 799         const struct of_device_id *match;
 800         int err = 0;
 801         int err2 = 0;
 802         u8 val;
 803
 804         if (!pdata && !node) {
 805                 dev_err(&pdev->dev, "Platform data is missing\n");
 806                 return -EINVAL;
 807         }
 808
 809         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
 810                                TWL4030_PM_MASTER_PROTECT_KEY);
 811         err |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER,
 812                                TWL4030_PM_MASTER_KEY_CFG2,
 813                                TWL4030_PM_MASTER_PROTECT_KEY);
 814
 815         if (err) {
 816                 pr_err("TWL4030 Unable to unlock registers\n");
 817                 return err;
 818         }
 819
 820         match = of_match_device(of_match_ptr(twl4030_power_of_match),
 821                                 &pdev->dev);
 822         if (match && match->data)
 823                 pdata = match->data;
 824
 825         if (pdata) {
 826                 err = twl4030_power_configure_scripts(pdata);
 827                 if (err) {
 828                         pr_err("TWL4030 failed to load scripts\n");
 829                         goto relock;
 830                 }
 831                 err = twl4030_power_configure_resources(pdata);
 832                 if (err) {
 833                         pr_err("TWL4030 failed to configure resource\n");
 834                         goto relock;
 835                 }
 836         }
 837
 838         /* Board has to be wired properly to use this feature */
 839         if (twl4030_power_use_poweroff(pdata, node) && !pm_power_off) {
 840                 /* Default for SEQ_OFFSYNC is set, lets ensure this */
 841                 err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
 842                                       TWL4030_PM_MASTER_CFG_P123_TRANSITION);
 843                 if (err) {
 844                         pr_warning("TWL4030 Unable to read registers\n");
 845
 846                 } else if (!(val & SEQ_OFFSYNC)) {
 847                         val |= SEQ_OFFSYNC;
 848                         err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
 849                                         TWL4030_PM_MASTER_CFG_P123_TRANSITION);
 850                         if (err) {
 851                                 pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n");
 852                                 goto relock;
 853                         }
 854                 }
 855
 856                 pm_power_off = twl4030_power_off;
 857         }
 858
 859 relock:
 860         err2 = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
 861                                TWL4030_PM_MASTER_PROTECT_KEY);
 862         if (err2) {
 863                 pr_err("TWL4030 Unable to relock registers\n");
 864                 return err2;
 865         }
 866
 867         return err;
 868 }
 869
 870 static int twl4030_power_remove(struct platform_device *pdev)
 871 {
 872         return 0;
 873 }
 874
 875 static struct platform_driver twl4030_power_driver = {
 876         .driver = {
 877                 .name   = "twl4030_power",
 878                 .owner  = THIS_MODULE,
 879                 .of_match_table = of_match_ptr(twl4030_power_of_match),
 880         },
 881         .probe          = twl4030_power_probe,
 882         .remove         = twl4030_power_remove,
 883 };
 884
 885 module_platform_driver(twl4030_power_driver);
 886
 887 MODULE_AUTHOR("Nokia Corporation");
 888 MODULE_AUTHOR("Texas Instruments, Inc.");
 889 MODULE_DESCRIPTION("Power management for TWL4030");
 890 MODULE_LICENSE("GPL");
 891 MODULE_ALIAS("platform:twl4030_power");