drivers/mtd/nand/fsl_upm.c

   1 /*
   2  * Freescale UPM NAND driver.
   3  *
   4  * Copyright © 2007-2008  MontaVista Software, Inc.
   5  *
   6  * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/delay.h>
  17 #include <linux/mtd/nand.h>
  18 #include <linux/mtd/nand_ecc.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/mtd/mtd.h>
  21 #include <linux/of_platform.h>
  22 #include <linux/of_gpio.h>
  23 #include <linux/io.h>
  24 #include <asm/fsl_lbc.h>
  25
  26 #define FSL_UPM_WAIT_RUN_PATTERN  0x1
  27 #define FSL_UPM_WAIT_WRITE_BYTE   0x2
  28 #define FSL_UPM_WAIT_WRITE_BUFFER 0x4
  29
  30 struct fsl_upm_nand {
  31         struct device *dev;
  32         struct mtd_info mtd;
  33         struct nand_chip chip;
  34         int last_ctrl;
  35 #ifdef CONFIG_MTD_PARTITIONS
  36         struct mtd_partition *parts;
  37 #endif
  38
  39         struct fsl_upm upm;
  40         uint8_t upm_addr_offset;
  41         uint8_t upm_cmd_offset;
  42         void __iomem *io_base;
  43         int rnb_gpio[NAND_MAX_CHIPS];
  44         uint32_t mchip_offsets[NAND_MAX_CHIPS];
  45         uint32_t mchip_count;
  46         uint32_t mchip_number;
  47         int chip_delay;
  48         uint32_t wait_flags;
  49 };
  50
  51 static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
  52 {
  53         return container_of(mtdinfo, struct fsl_upm_nand, mtd);
  54 }
  55
  56 static int fun_chip_ready(struct mtd_info *mtd)
  57 {
  58         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
  59
  60         if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
  61                 return 1;
  62
  63         dev_vdbg(fun->dev, "busy\n");
  64         return 0;
  65 }
  66
  67 static void fun_wait_rnb(struct fsl_upm_nand *fun)
  68 {
  69         if (fun->rnb_gpio[fun->mchip_number] >= 0) {
  70                 int cnt = 1000000;
  71
  72                 while (--cnt && !fun_chip_ready(&fun->mtd))
  73                         cpu_relax();
  74                 if (!cnt)
  75                         dev_err(fun->dev, "tired waiting for RNB\n");
  76         } else {
  77                 ndelay(100);
  78         }
  79 }
  80
  81 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  82 {
  83         struct nand_chip *chip = mtd->priv;
  84         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
  85         u32 mar;
  86
  87         if (!(ctrl & fun->last_ctrl)) {
  88                 fsl_upm_end_pattern(&fun->upm);
  89
  90                 if (cmd == NAND_CMD_NONE)
  91                         return;
  92
  93                 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
  94         }
  95
  96         if (ctrl & NAND_CTRL_CHANGE) {
  97                 if (ctrl & NAND_ALE)
  98                         fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
  99                 else if (ctrl & NAND_CLE)
 100                         fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
 101         }
 102
 103         mar = (cmd << (32 - fun->upm.width)) |
 104                 fun->mchip_offsets[fun->mchip_number];
 105         fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
 106
 107         if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
 108                 fun_wait_rnb(fun);
 109 }
 110
 111 static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
 112 {
 113         struct nand_chip *chip = mtd->priv;
 114         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 115
 116         if (mchip_nr == -1) {
 117                 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
 118         } else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
 119                 fun->mchip_number = mchip_nr;
 120                 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
 121                 chip->IO_ADDR_W = chip->IO_ADDR_R;
 122         } else {
 123                 BUG();
 124         }
 125 }
 126
 127 static uint8_t fun_read_byte(struct mtd_info *mtd)
 128 {
 129         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 130
 131         return in_8(fun->chip.IO_ADDR_R);
 132 }
 133
 134 static void fun_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 135 {
 136         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 137         int i;
 138
 139         for (i = 0; i < len; i++)
 140                 buf[i] = in_8(fun->chip.IO_ADDR_R);
 141 }
 142
 143 static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 144 {
 145         struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
 146         int i;
 147
 148         for (i = 0; i < len; i++) {
 149                 out_8(fun->chip.IO_ADDR_W, buf[i]);
 150                 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
 151                         fun_wait_rnb(fun);
 152         }
 153         if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
 154                 fun_wait_rnb(fun);
 155 }
 156
 157 static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
 158                                    const struct device_node *upm_np,
 159                                    const struct resource *io_res)
 160 {
 161         int ret;
 162         struct device_node *flash_np;
 163 #ifdef CONFIG_MTD_PARTITIONS
 164         static const char *part_types[] = { "cmdlinepart", NULL, };
 165 #endif
 166
 167         fun->chip.IO_ADDR_R = fun->io_base;
 168         fun->chip.IO_ADDR_W = fun->io_base;
 169         fun->chip.cmd_ctrl = fun_cmd_ctrl;
 170         fun->chip.chip_delay = fun->chip_delay;
 171         fun->chip.read_byte = fun_read_byte;
 172         fun->chip.read_buf = fun_read_buf;
 173         fun->chip.write_buf = fun_write_buf;
 174         fun->chip.ecc.mode = NAND_ECC_SOFT;
 175         if (fun->mchip_count > 1)
 176                 fun->chip.select_chip = fun_select_chip;
 177
 178         if (fun->rnb_gpio[0] >= 0)
 179                 fun->chip.dev_ready = fun_chip_ready;
 180
 181         fun->mtd.priv = &fun->chip;
 182         fun->mtd.owner = THIS_MODULE;
 183
 184         flash_np = of_get_next_child(upm_np, NULL);
 185         if (!flash_np)
 186                 return -ENODEV;
 187
 188         fun->mtd.name = kasprintf(GFP_KERNEL, "%x.%s", io_res->start,
 189                                   flash_np->name);
 190         if (!fun->mtd.name) {
 191                 ret = -ENOMEM;
 192                 goto err;
 193         }
 194
 195         ret = nand_scan(&fun->mtd, fun->mchip_count);
 196         if (ret)
 197                 goto err;
 198
 199 #ifdef CONFIG_MTD_PARTITIONS
 200         ret = parse_mtd_partitions(&fun->mtd, part_types, &fun->parts, 0);
 201
 202 #ifdef CONFIG_MTD_OF_PARTS
 203         if (ret == 0) {
 204                 ret = of_mtd_parse_partitions(fun->dev, flash_np, &fun->parts);
 205                 if (ret < 0)
 206                         goto err;
 207         }
 208 #endif
 209         if (ret > 0)
 210                 ret = add_mtd_partitions(&fun->mtd, fun->parts, ret);
 211         else
 212 #endif
 213                 ret = add_mtd_device(&fun->mtd);
 214 err:
 215         of_node_put(flash_np);
 216         return ret;
 217 }
 218
 219 static int __devinit fun_probe(struct of_device *ofdev,
 220                                const struct of_device_id *ofid)
 221 {
 222         struct fsl_upm_nand *fun;
 223         struct resource io_res;
 224         const uint32_t *prop;
 225         int rnb_gpio;
 226         int ret;
 227         int size;
 228         int i;
 229
 230         fun = kzalloc(sizeof(*fun), GFP_KERNEL);
 231         if (!fun)
 232                 return -ENOMEM;
 233
 234         ret = of_address_to_resource(ofdev->node, 0, &io_res);
 235         if (ret) {
 236                 dev_err(&ofdev->dev, "can't get IO base\n");
 237                 goto err1;
 238         }
 239
 240         ret = fsl_upm_find(io_res.start, &fun->upm);
 241         if (ret) {
 242                 dev_err(&ofdev->dev, "can't find UPM\n");
 243                 goto err1;
 244         }
 245
 246         prop = of_get_property(ofdev->node, "fsl,upm-addr-offset", &size);
 247         if (!prop || size != sizeof(uint32_t)) {
 248                 dev_err(&ofdev->dev, "can't get UPM address offset\n");
 249                 ret = -EINVAL;
 250                 goto err1;
 251         }
 252         fun->upm_addr_offset = *prop;
 253
 254         prop = of_get_property(ofdev->node, "fsl,upm-cmd-offset", &size);
 255         if (!prop || size != sizeof(uint32_t)) {
 256                 dev_err(&ofdev->dev, "can't get UPM command offset\n");
 257                 ret = -EINVAL;
 258                 goto err1;
 259         }
 260         fun->upm_cmd_offset = *prop;
 261
 262         prop = of_get_property(ofdev->node,
 263                                "fsl,upm-addr-line-cs-offsets", &size);
 264         if (prop && (size / sizeof(uint32_t)) > 0) {
 265                 fun->mchip_count = size / sizeof(uint32_t);
 266                 if (fun->mchip_count >= NAND_MAX_CHIPS) {
 267                         dev_err(&ofdev->dev, "too much multiple chips\n");
 268                         goto err1;
 269                 }
 270                 for (i = 0; i < fun->mchip_count; i++)
 271                         fun->mchip_offsets[i] = prop[i];
 272         } else {
 273                 fun->mchip_count = 1;
 274         }
 275
 276         for (i = 0; i < fun->mchip_count; i++) {
 277                 fun->rnb_gpio[i] = -1;
 278                 rnb_gpio = of_get_gpio(ofdev->node, i);
 279                 if (rnb_gpio >= 0) {
 280                         ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev));
 281                         if (ret) {
 282                                 dev_err(&ofdev->dev,
 283                                         "can't request RNB gpio #%d\n", i);
 284                                 goto err2;
 285                         }
 286                         gpio_direction_input(rnb_gpio);
 287                         fun->rnb_gpio[i] = rnb_gpio;
 288                 } else if (rnb_gpio == -EINVAL) {
 289                         dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
 290                         goto err2;
 291                 }
 292         }
 293
 294         prop = of_get_property(ofdev->node, "chip-delay", NULL);
 295         if (prop)
 296                 fun->chip_delay = *prop;
 297         else
 298                 fun->chip_delay = 50;
 299
 300         prop = of_get_property(ofdev->node, "fsl,upm-wait-flags", &size);
 301         if (prop && size == sizeof(uint32_t))
 302                 fun->wait_flags = *prop;
 303         else
 304                 fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
 305                                   FSL_UPM_WAIT_WRITE_BYTE;
 306
 307         fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
 308                                             resource_size(&io_res));
 309         if (!fun->io_base) {
 310                 ret = -ENOMEM;
 311                 goto err2;
 312         }
 313
 314         fun->dev = &ofdev->dev;
 315         fun->last_ctrl = NAND_CLE;
 316
 317         ret = fun_chip_init(fun, ofdev->node, &io_res);
 318         if (ret)
 319                 goto err2;
 320
 321         dev_set_drvdata(&ofdev->dev, fun);
 322
 323         return 0;
 324 err2:
 325         for (i = 0; i < fun->mchip_count; i++) {
 326                 if (fun->rnb_gpio[i] < 0)
 327                         break;
 328                 gpio_free(fun->rnb_gpio[i]);
 329         }
 330 err1:
 331         kfree(fun);
 332
 333         return ret;
 334 }
 335
 336 static int __devexit fun_remove(struct of_device *ofdev)
 337 {
 338         struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
 339         int i;
 340
 341         nand_release(&fun->mtd);
 342         kfree(fun->mtd.name);
 343
 344         for (i = 0; i < fun->mchip_count; i++) {
 345                 if (fun->rnb_gpio[i] < 0)
 346                         break;
 347                 gpio_free(fun->rnb_gpio[i]);
 348         }
 349
 350         kfree(fun);
 351
 352         return 0;
 353 }
 354
 355 static const struct of_device_id of_fun_match[] = {
 356         { .compatible = "fsl,upm-nand" },
 357         {},
 358 };
 359 MODULE_DEVICE_TABLE(of, of_fun_match);
 360
 361 static struct of_platform_driver of_fun_driver = {
 362         .name           = "fsl,upm-nand",
 363         .match_table    = of_fun_match,
 364         .probe          = fun_probe,
 365         .remove         = __devexit_p(fun_remove),
 366 };
 367
 368 static int __init fun_module_init(void)
 369 {
 370         return of_register_platform_driver(&of_fun_driver);
 371 }
 372 module_init(fun_module_init);
 373
 374 static void __exit fun_module_exit(void)
 375 {
 376         of_unregister_platform_driver(&of_fun_driver);
 377 }
 378 module_exit(fun_module_exit);
 379
 380 MODULE_LICENSE("GPL");
 381 MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
 382 MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
 383                    "LocalBus User-Programmable Machine");