2 * Freescale UPM NAND driver.
4 * Copyright © 2007-2008 MontaVista Software, Inc.
6 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/delay.h>
17 #include <linux/mtd/nand.h>
18 #include <linux/mtd/nand_ecc.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/of_platform.h>
22 #include <linux/of_gpio.h>
24 #include <linux/slab.h>
25 #include <asm/fsl_lbc.h>
27 #define FSL_UPM_WAIT_RUN_PATTERN 0x1
28 #define FSL_UPM_WAIT_WRITE_BYTE 0x2
29 #define FSL_UPM_WAIT_WRITE_BUFFER 0x4
34 struct nand_chip chip;
36 struct mtd_partition *parts;
38 uint8_t upm_addr_offset;
39 uint8_t upm_cmd_offset;
40 void __iomem *io_base;
41 int rnb_gpio[NAND_MAX_CHIPS];
42 uint32_t mchip_offsets[NAND_MAX_CHIPS];
44 uint32_t mchip_number;
49 static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
51 return container_of(mtdinfo, struct fsl_upm_nand, mtd);
54 static int fun_chip_ready(struct mtd_info *mtd)
56 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
58 if (gpio_get_value(fun->rnb_gpio[fun->mchip_number]))
61 dev_vdbg(fun->dev, "busy\n");
65 static void fun_wait_rnb(struct fsl_upm_nand *fun)
67 if (fun->rnb_gpio[fun->mchip_number] >= 0) {
70 while (--cnt && !fun_chip_ready(&fun->mtd))
73 dev_err(fun->dev, "tired waiting for RNB\n");
79 static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
81 struct nand_chip *chip = mtd->priv;
82 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
85 if (!(ctrl & fun->last_ctrl)) {
86 fsl_upm_end_pattern(&fun->upm);
88 if (cmd == NAND_CMD_NONE)
91 fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
94 if (ctrl & NAND_CTRL_CHANGE) {
96 fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
97 else if (ctrl & NAND_CLE)
98 fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
101 mar = (cmd << (32 - fun->upm.width)) |
102 fun->mchip_offsets[fun->mchip_number];
103 fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
105 if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
109 static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
111 struct nand_chip *chip = mtd->priv;
112 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
114 if (mchip_nr == -1) {
115 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
116 } else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
117 fun->mchip_number = mchip_nr;
118 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
119 chip->IO_ADDR_W = chip->IO_ADDR_R;
125 static uint8_t fun_read_byte(struct mtd_info *mtd)
127 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
129 return in_8(fun->chip.IO_ADDR_R);
132 static void fun_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
134 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
137 for (i = 0; i < len; i++)
138 buf[i] = in_8(fun->chip.IO_ADDR_R);
141 static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
143 struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd);
146 for (i = 0; i < len; i++) {
147 out_8(fun->chip.IO_ADDR_W, buf[i]);
148 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
151 if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
155 static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
156 const struct device_node *upm_np,
157 const struct resource *io_res)
160 struct device_node *flash_np;
161 struct mtd_part_parser_data ppdata;
163 fun->chip.IO_ADDR_R = fun->io_base;
164 fun->chip.IO_ADDR_W = fun->io_base;
165 fun->chip.cmd_ctrl = fun_cmd_ctrl;
166 fun->chip.chip_delay = fun->chip_delay;
167 fun->chip.read_byte = fun_read_byte;
168 fun->chip.read_buf = fun_read_buf;
169 fun->chip.write_buf = fun_write_buf;
170 fun->chip.ecc.mode = NAND_ECC_SOFT;
171 if (fun->mchip_count > 1)
172 fun->chip.select_chip = fun_select_chip;
174 if (fun->rnb_gpio[0] >= 0)
175 fun->chip.dev_ready = fun_chip_ready;
177 fun->mtd.priv = &fun->chip;
178 fun->mtd.owner = THIS_MODULE;
180 flash_np = of_get_next_child(upm_np, NULL);
184 fun->mtd.name = kasprintf(GFP_KERNEL, "0x%llx.%s", (u64)io_res->start,
186 if (!fun->mtd.name) {
191 ret = nand_scan(&fun->mtd, fun->mchip_count);
195 ppdata.of_node = flash_np;
196 ret = mtd_device_parse_register(&fun->mtd, NULL, &ppdata, NULL, 0);
198 of_node_put(flash_np);
202 static int __devinit fun_probe(struct platform_device *ofdev)
204 struct fsl_upm_nand *fun;
205 struct resource io_res;
212 fun = kzalloc(sizeof(*fun), GFP_KERNEL);
216 ret = of_address_to_resource(ofdev->dev.of_node, 0, &io_res);
218 dev_err(&ofdev->dev, "can't get IO base\n");
222 ret = fsl_upm_find(io_res.start, &fun->upm);
224 dev_err(&ofdev->dev, "can't find UPM\n");
228 prop = of_get_property(ofdev->dev.of_node, "fsl,upm-addr-offset",
230 if (!prop || size != sizeof(uint32_t)) {
231 dev_err(&ofdev->dev, "can't get UPM address offset\n");
235 fun->upm_addr_offset = *prop;
237 prop = of_get_property(ofdev->dev.of_node, "fsl,upm-cmd-offset", &size);
238 if (!prop || size != sizeof(uint32_t)) {
239 dev_err(&ofdev->dev, "can't get UPM command offset\n");
243 fun->upm_cmd_offset = *prop;
245 prop = of_get_property(ofdev->dev.of_node,
246 "fsl,upm-addr-line-cs-offsets", &size);
247 if (prop && (size / sizeof(uint32_t)) > 0) {
248 fun->mchip_count = size / sizeof(uint32_t);
249 if (fun->mchip_count >= NAND_MAX_CHIPS) {
250 dev_err(&ofdev->dev, "too much multiple chips\n");
253 for (i = 0; i < fun->mchip_count; i++)
254 fun->mchip_offsets[i] = be32_to_cpu(prop[i]);
256 fun->mchip_count = 1;
259 for (i = 0; i < fun->mchip_count; i++) {
260 fun->rnb_gpio[i] = -1;
261 rnb_gpio = of_get_gpio(ofdev->dev.of_node, i);
263 ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev));
266 "can't request RNB gpio #%d\n", i);
269 gpio_direction_input(rnb_gpio);
270 fun->rnb_gpio[i] = rnb_gpio;
271 } else if (rnb_gpio == -EINVAL) {
272 dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
277 prop = of_get_property(ofdev->dev.of_node, "chip-delay", NULL);
279 fun->chip_delay = be32_to_cpup(prop);
281 fun->chip_delay = 50;
283 prop = of_get_property(ofdev->dev.of_node, "fsl,upm-wait-flags", &size);
284 if (prop && size == sizeof(uint32_t))
285 fun->wait_flags = be32_to_cpup(prop);
287 fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
288 FSL_UPM_WAIT_WRITE_BYTE;
290 fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
291 resource_size(&io_res));
297 fun->dev = &ofdev->dev;
298 fun->last_ctrl = NAND_CLE;
300 ret = fun_chip_init(fun, ofdev->dev.of_node, &io_res);
304 dev_set_drvdata(&ofdev->dev, fun);
308 for (i = 0; i < fun->mchip_count; i++) {
309 if (fun->rnb_gpio[i] < 0)
311 gpio_free(fun->rnb_gpio[i]);
319 static int __devexit fun_remove(struct platform_device *ofdev)
321 struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
324 nand_release(&fun->mtd);
325 kfree(fun->mtd.name);
327 for (i = 0; i < fun->mchip_count; i++) {
328 if (fun->rnb_gpio[i] < 0)
330 gpio_free(fun->rnb_gpio[i]);
338 static const struct of_device_id of_fun_match[] = {
339 { .compatible = "fsl,upm-nand" },
342 MODULE_DEVICE_TABLE(of, of_fun_match);
344 static struct platform_driver of_fun_driver = {
346 .name = "fsl,upm-nand",
347 .owner = THIS_MODULE,
348 .of_match_table = of_fun_match,
351 .remove = __devexit_p(fun_remove),
354 static int __init fun_module_init(void)
356 return platform_driver_register(&of_fun_driver);
358 module_init(fun_module_init);
360 static void __exit fun_module_exit(void)
362 platform_driver_unregister(&of_fun_driver);
364 module_exit(fun_module_exit);
366 MODULE_LICENSE("GPL");
367 MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
368 MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
369 "LocalBus User-Programmable Machine");