drivers/net/ethernet/allwinner/sun4i-emac.c

   1 /*
   2  * Allwinner EMAC Fast Ethernet driver for Linux.
   3  *
   4  * Copyright 2012-2013 Stefan Roese <sr@denx.de>
   5  * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
   6  *
   7  * Based on the Linux driver provided by Allwinner:
   8  * Copyright (C) 1997  Sten Wang
   9  *
  10  * This file is licensed under the terms of the GNU General Public
  11  * License version 2. This program is licensed "as is" without any
  12  * warranty of any kind, whether express or implied.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/etherdevice.h>
  17 #include <linux/ethtool.h>
  18 #include <linux/gpio.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/irq.h>
  21 #include <linux/mii.h>
  22 #include <linux/module.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_irq.h>
  26 #include <linux/of_mdio.h>
  27 #include <linux/of_net.h>
  28 #include <linux/of_platform.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/phy.h>
  31
  32 #include "sun4i-emac.h"
  33
  34 #define DRV_NAME                "sun4i-emac"
  35 #define DRV_VERSION             "1.02"
  36
  37 #define EMAC_MAX_FRAME_LEN      0x0600
  38
  39 /* Transmit timeout, default 5 seconds. */
  40 static int watchdog = 5000;
  41 module_param(watchdog, int, 0400);
  42 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  43
  44 /* EMAC register address locking.
  45  *
  46  * The EMAC uses an address register to control where data written
  47  * to the data register goes. This means that the address register
  48  * must be preserved over interrupts or similar calls.
  49  *
  50  * During interrupt and other critical calls, a spinlock is used to
  51  * protect the system, but the calls themselves save the address
  52  * in the address register in case they are interrupting another
  53  * access to the device.
  54  *
  55  * For general accesses a lock is provided so that calls which are
  56  * allowed to sleep are serialised so that the address register does
  57  * not need to be saved. This lock also serves to serialise access
  58  * to the EEPROM and PHY access registers which are shared between
  59  * these two devices.
  60  */
  61
  62 /* The driver supports the original EMACE, and now the two newer
  63  * devices, EMACA and EMACB.
  64  */
  65
  66 struct emac_board_info {
  67         struct clk              *clk;
  68         struct device           *dev;
  69         struct platform_device  *pdev;
  70         spinlock_t              lock;
  71         void __iomem            *membase;
  72         u32                     msg_enable;
  73         struct net_device       *ndev;
  74         struct sk_buff          *skb_last;
  75         u16                     tx_fifo_stat;
  76
  77         int                     emacrx_completed_flag;
  78
  79         struct phy_device       *phy_dev;
  80         struct device_node      *phy_node;
  81         unsigned int            link;
  82         unsigned int            speed;
  83         unsigned int            duplex;
  84
  85         phy_interface_t         phy_interface;
  86 };
  87
  88 static void emac_update_speed(struct net_device *dev)
  89 {
  90         struct emac_board_info *db = netdev_priv(dev);
  91         unsigned int reg_val;
  92
  93         /* set EMAC SPEED, depend on PHY  */
  94         reg_val = readl(db->membase + EMAC_MAC_SUPP_REG);
  95         reg_val &= ~(0x1 << 8);
  96         if (db->speed == SPEED_100)
  97                 reg_val |= 1 << 8;
  98         writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);
  99 }
 100
 101 static void emac_update_duplex(struct net_device *dev)
 102 {
 103         struct emac_board_info *db = netdev_priv(dev);
 104         unsigned int reg_val;
 105
 106         /* set duplex depend on phy */
 107         reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
 108         reg_val &= ~EMAC_MAC_CTL1_DUPLEX_EN;
 109         if (db->duplex)
 110                 reg_val |= EMAC_MAC_CTL1_DUPLEX_EN;
 111         writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
 112 }
 113
 114 static void emac_handle_link_change(struct net_device *dev)
 115 {
 116         struct emac_board_info *db = netdev_priv(dev);
 117         struct phy_device *phydev = db->phy_dev;
 118         unsigned long flags;
 119         int status_change = 0;
 120
 121         if (phydev->link) {
 122                 if (db->speed != phydev->speed) {
 123                         spin_lock_irqsave(&db->lock, flags);
 124                         db->speed = phydev->speed;
 125                         emac_update_speed(dev);
 126                         spin_unlock_irqrestore(&db->lock, flags);
 127                         status_change = 1;
 128                 }
 129
 130                 if (db->duplex != phydev->duplex) {
 131                         spin_lock_irqsave(&db->lock, flags);
 132                         db->duplex = phydev->duplex;
 133                         emac_update_duplex(dev);
 134                         spin_unlock_irqrestore(&db->lock, flags);
 135                         status_change = 1;
 136                 }
 137         }
 138
 139         if (phydev->link != db->link) {
 140                 if (!phydev->link) {
 141                         db->speed = 0;
 142                         db->duplex = -1;
 143                 }
 144                 db->link = phydev->link;
 145
 146                 status_change = 1;
 147         }
 148
 149         if (status_change)
 150                 phy_print_status(phydev);
 151 }
 152
 153 static int emac_mdio_probe(struct net_device *dev)
 154 {
 155         struct emac_board_info *db = netdev_priv(dev);
 156
 157         /* to-do: PHY interrupts are currently not supported */
 158
 159         /* attach the mac to the phy */
 160         db->phy_dev = of_phy_connect(db->ndev, db->phy_node,
 161                                      &emac_handle_link_change, 0,
 162                                      db->phy_interface);
 163         if (!db->phy_dev) {
 164                 netdev_err(db->ndev, "could not find the PHY\n");
 165                 return -ENODEV;
 166         }
 167
 168         /* mask with MAC supported features */
 169         db->phy_dev->supported &= PHY_BASIC_FEATURES;
 170         db->phy_dev->advertising = db->phy_dev->supported;
 171
 172         db->link = 0;
 173         db->speed = 0;
 174         db->duplex = -1;
 175
 176         return 0;
 177 }
 178
 179 static void emac_mdio_remove(struct net_device *dev)
 180 {
 181         struct emac_board_info *db = netdev_priv(dev);
 182
 183         phy_disconnect(db->phy_dev);
 184         db->phy_dev = NULL;
 185 }
 186
 187 static void emac_reset(struct emac_board_info *db)
 188 {
 189         dev_dbg(db->dev, "resetting device\n");
 190
 191         /* RESET device */
 192         writel(0, db->membase + EMAC_CTL_REG);
 193         udelay(200);
 194         writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG);
 195         udelay(200);
 196 }
 197
 198 static void emac_outblk_32bit(void __iomem *reg, void *data, int count)
 199 {
 200         writesl(reg, data, round_up(count, 4) / 4);
 201 }
 202
 203 static void emac_inblk_32bit(void __iomem *reg, void *data, int count)
 204 {
 205         readsl(reg, data, round_up(count, 4) / 4);
 206 }
 207
 208 static int emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 209 {
 210         struct emac_board_info *dm = netdev_priv(dev);
 211         struct phy_device *phydev = dm->phy_dev;
 212
 213         if (!netif_running(dev))
 214                 return -EINVAL;
 215
 216         if (!phydev)
 217                 return -ENODEV;
 218
 219         return phy_mii_ioctl(phydev, rq, cmd);
 220 }
 221
 222 /* ethtool ops */
 223 static void emac_get_drvinfo(struct net_device *dev,
 224                               struct ethtool_drvinfo *info)
 225 {
 226         strlcpy(info->driver, DRV_NAME, sizeof(DRV_NAME));
 227         strlcpy(info->version, DRV_VERSION, sizeof(DRV_VERSION));
 228         strlcpy(info->bus_info, dev_name(&dev->dev), sizeof(info->bus_info));
 229 }
 230
 231 static int emac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 232 {
 233         struct emac_board_info *dm = netdev_priv(dev);
 234         struct phy_device *phydev = dm->phy_dev;
 235
 236         if (!phydev)
 237                 return -ENODEV;
 238
 239         return phy_ethtool_gset(phydev, cmd);
 240 }
 241
 242 static int emac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 243 {
 244         struct emac_board_info *dm = netdev_priv(dev);
 245         struct phy_device *phydev = dm->phy_dev;
 246
 247         if (!phydev)
 248                 return -ENODEV;
 249
 250         return phy_ethtool_sset(phydev, cmd);
 251 }
 252
 253 static const struct ethtool_ops emac_ethtool_ops = {
 254         .get_drvinfo    = emac_get_drvinfo,
 255         .get_settings   = emac_get_settings,
 256         .set_settings   = emac_set_settings,
 257         .get_link       = ethtool_op_get_link,
 258 };
 259
 260 static unsigned int emac_setup(struct net_device *ndev)
 261 {
 262         struct emac_board_info *db = netdev_priv(ndev);
 263         unsigned int reg_val;
 264
 265         /* set up TX */
 266         reg_val = readl(db->membase + EMAC_TX_MODE_REG);
 267
 268         writel(reg_val | EMAC_TX_MODE_ABORTED_FRAME_EN,
 269                 db->membase + EMAC_TX_MODE_REG);
 270
 271         /* set MAC */
 272         /* set MAC CTL0 */
 273         reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
 274         writel(reg_val | EMAC_MAC_CTL0_RX_FLOW_CTL_EN |
 275                 EMAC_MAC_CTL0_TX_FLOW_CTL_EN,
 276                 db->membase + EMAC_MAC_CTL0_REG);
 277
 278         /* set MAC CTL1 */
 279         reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
 280         reg_val |= EMAC_MAC_CTL1_LEN_CHECK_EN;
 281         reg_val |= EMAC_MAC_CTL1_CRC_EN;
 282         reg_val |= EMAC_MAC_CTL1_PAD_EN;
 283         writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
 284
 285         /* set up IPGT */
 286         writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG);
 287
 288         /* set up IPGR */
 289         writel((EMAC_MAC_IPGR_IPG1 << 8) | EMAC_MAC_IPGR_IPG2,
 290                 db->membase + EMAC_MAC_IPGR_REG);
 291
 292         /* set up Collison window */
 293         writel((EMAC_MAC_CLRT_COLLISION_WINDOW << 8) | EMAC_MAC_CLRT_RM,
 294                 db->membase + EMAC_MAC_CLRT_REG);
 295
 296         /* set up Max Frame Length */
 297         writel(EMAC_MAX_FRAME_LEN,
 298                 db->membase + EMAC_MAC_MAXF_REG);
 299
 300         return 0;
 301 }
 302
 303 static void emac_set_rx_mode(struct net_device *ndev)
 304 {
 305         struct emac_board_info *db = netdev_priv(ndev);
 306         unsigned int reg_val;
 307
 308         /* set up RX */
 309         reg_val = readl(db->membase + EMAC_RX_CTL_REG);
 310
 311         if (ndev->flags & IFF_PROMISC)
 312                 reg_val |= EMAC_RX_CTL_PASS_ALL_EN;
 313         else
 314                 reg_val &= ~EMAC_RX_CTL_PASS_ALL_EN;
 315
 316         writel(reg_val | EMAC_RX_CTL_PASS_LEN_OOR_EN |
 317                 EMAC_RX_CTL_ACCEPT_UNICAST_EN | EMAC_RX_CTL_DA_FILTER_EN |
 318                 EMAC_RX_CTL_ACCEPT_MULTICAST_EN |
 319                 EMAC_RX_CTL_ACCEPT_BROADCAST_EN,
 320                 db->membase + EMAC_RX_CTL_REG);
 321 }
 322
 323 static unsigned int emac_powerup(struct net_device *ndev)
 324 {
 325         struct emac_board_info *db = netdev_priv(ndev);
 326         unsigned int reg_val;
 327
 328         /* initial EMAC */
 329         /* flush RX FIFO */
 330         reg_val = readl(db->membase + EMAC_RX_CTL_REG);
 331         reg_val |= 0x8;
 332         writel(reg_val, db->membase + EMAC_RX_CTL_REG);
 333         udelay(1);
 334
 335         /* initial MAC */
 336         /* soft reset MAC */
 337         reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
 338         reg_val &= ~EMAC_MAC_CTL0_SOFT_RESET;
 339         writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);
 340
 341         /* set MII clock */
 342         reg_val = readl(db->membase + EMAC_MAC_MCFG_REG);
 343         reg_val &= (~(0xf << 2));
 344         reg_val |= (0xD << 2);
 345         writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);
 346
 347         /* clear RX counter */
 348         writel(0x0, db->membase + EMAC_RX_FBC_REG);
 349
 350         /* disable all interrupt and clear interrupt status */
 351         writel(0, db->membase + EMAC_INT_CTL_REG);
 352         reg_val = readl(db->membase + EMAC_INT_STA_REG);
 353         writel(reg_val, db->membase + EMAC_INT_STA_REG);
 354
 355         udelay(1);
 356
 357         /* set up EMAC */
 358         emac_setup(ndev);
 359
 360         /* set mac_address to chip */
 361         writel(ndev->dev_addr[0] << 16 | ndev->dev_addr[1] << 8 | ndev->
 362                dev_addr[2], db->membase + EMAC_MAC_A1_REG);
 363         writel(ndev->dev_addr[3] << 16 | ndev->dev_addr[4] << 8 | ndev->
 364                dev_addr[5], db->membase + EMAC_MAC_A0_REG);
 365
 366         mdelay(1);
 367
 368         return 0;
 369 }
 370
 371 static int emac_set_mac_address(struct net_device *dev, void *p)
 372 {
 373         struct sockaddr *addr = p;
 374         struct emac_board_info *db = netdev_priv(dev);
 375
 376         if (netif_running(dev))
 377                 return -EBUSY;
 378
 379         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
 380
 381         writel(dev->dev_addr[0] << 16 | dev->dev_addr[1] << 8 | dev->
 382                dev_addr[2], db->membase + EMAC_MAC_A1_REG);
 383         writel(dev->dev_addr[3] << 16 | dev->dev_addr[4] << 8 | dev->
 384                dev_addr[5], db->membase + EMAC_MAC_A0_REG);
 385
 386         return 0;
 387 }
 388
 389 /* Initialize emac board */
 390 static void emac_init_device(struct net_device *dev)
 391 {
 392         struct emac_board_info *db = netdev_priv(dev);
 393         unsigned long flags;
 394         unsigned int reg_val;
 395
 396         spin_lock_irqsave(&db->lock, flags);
 397
 398         emac_update_speed(dev);
 399         emac_update_duplex(dev);
 400
 401         /* enable RX/TX */
 402         reg_val = readl(db->membase + EMAC_CTL_REG);
 403         writel(reg_val | EMAC_CTL_RESET | EMAC_CTL_TX_EN | EMAC_CTL_RX_EN,
 404                 db->membase + EMAC_CTL_REG);
 405
 406         /* enable RX/TX0/RX Hlevel interrup */
 407         reg_val = readl(db->membase + EMAC_INT_CTL_REG);
 408         reg_val |= (0xf << 0) | (0x01 << 8);
 409         writel(reg_val, db->membase + EMAC_INT_CTL_REG);
 410
 411         spin_unlock_irqrestore(&db->lock, flags);
 412 }
 413
 414 /* Our watchdog timed out. Called by the networking layer */
 415 static void emac_timeout(struct net_device *dev)
 416 {
 417         struct emac_board_info *db = netdev_priv(dev);
 418         unsigned long flags;
 419
 420         if (netif_msg_timer(db))
 421                 dev_err(db->dev, "tx time out.\n");
 422
 423         /* Save previous register address */
 424         spin_lock_irqsave(&db->lock, flags);
 425
 426         netif_stop_queue(dev);
 427         emac_reset(db);
 428         emac_init_device(dev);
 429         /* We can accept TX packets again */
 430         dev->trans_start = jiffies;
 431         netif_wake_queue(dev);
 432
 433         /* Restore previous register address */
 434         spin_unlock_irqrestore(&db->lock, flags);
 435 }
 436
 437 /* Hardware start transmission.
 438  * Send a packet to media from the upper layer.
 439  */
 440 static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev)
 441 {
 442         struct emac_board_info *db = netdev_priv(dev);
 443         unsigned long channel;
 444         unsigned long flags;
 445
 446         channel = db->tx_fifo_stat & 3;
 447         if (channel == 3)
 448                 return 1;
 449
 450         channel = (channel == 1 ? 1 : 0);
 451
 452         spin_lock_irqsave(&db->lock, flags);
 453
 454         writel(channel, db->membase + EMAC_TX_INS_REG);
 455
 456         emac_outblk_32bit(db->membase + EMAC_TX_IO_DATA_REG,
 457                         skb->data, skb->len);
 458         dev->stats.tx_bytes += skb->len;
 459
 460         db->tx_fifo_stat |= 1 << channel;
 461         /* TX control: First packet immediately send, second packet queue */
 462         if (channel == 0) {
 463                 /* set TX len */
 464                 writel(skb->len, db->membase + EMAC_TX_PL0_REG);
 465                 /* start translate from fifo to phy */
 466                 writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,
 467                        db->membase + EMAC_TX_CTL0_REG);
 468
 469                 /* save the time stamp */
 470                 dev->trans_start = jiffies;
 471         } else if (channel == 1) {
 472                 /* set TX len */
 473                 writel(skb->len, db->membase + EMAC_TX_PL1_REG);
 474                 /* start translate from fifo to phy */
 475                 writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,
 476                        db->membase + EMAC_TX_CTL1_REG);
 477
 478                 /* save the time stamp */
 479                 dev->trans_start = jiffies;
 480         }
 481
 482         if ((db->tx_fifo_stat & 3) == 3) {
 483                 /* Second packet */
 484                 netif_stop_queue(dev);
 485         }
 486
 487         spin_unlock_irqrestore(&db->lock, flags);
 488
 489         /* free this SKB */
 490         dev_consume_skb_any(skb);
 491
 492         return NETDEV_TX_OK;
 493 }
 494
 495 /* EMAC interrupt handler
 496  * receive the packet to upper layer, free the transmitted packet
 497  */
 498 static void emac_tx_done(struct net_device *dev, struct emac_board_info *db,
 499                           unsigned int tx_status)
 500 {
 501         /* One packet sent complete */
 502         db->tx_fifo_stat &= ~(tx_status & 3);
 503         if (3 == (tx_status & 3))
 504                 dev->stats.tx_packets += 2;
 505         else
 506                 dev->stats.tx_packets++;
 507
 508         if (netif_msg_tx_done(db))
 509                 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
 510
 511         netif_wake_queue(dev);
 512 }
 513
 514 /* Received a packet and pass to upper layer
 515  */
 516 static void emac_rx(struct net_device *dev)
 517 {
 518         struct emac_board_info *db = netdev_priv(dev);
 519         struct sk_buff *skb;
 520         u8 *rdptr;
 521         bool good_packet;
 522         static int rxlen_last;
 523         unsigned int reg_val;
 524         u32 rxhdr, rxstatus, rxcount, rxlen;
 525
 526         /* Check packet ready or not */
 527         while (1) {
 528                 /* race warning: the first packet might arrive with
 529                  * the interrupts disabled, but the second will fix
 530                  * it
 531                  */
 532                 rxcount = readl(db->membase + EMAC_RX_FBC_REG);
 533
 534                 if (netif_msg_rx_status(db))
 535                         dev_dbg(db->dev, "RXCount: %x\n", rxcount);
 536
 537                 if ((db->skb_last != NULL) && (rxlen_last > 0)) {
 538                         dev->stats.rx_bytes += rxlen_last;
 539
 540                         /* Pass to upper layer */
 541                         db->skb_last->protocol = eth_type_trans(db->skb_last,
 542                                                                 dev);
 543                         netif_rx(db->skb_last);
 544                         dev->stats.rx_packets++;
 545                         db->skb_last = NULL;
 546                         rxlen_last = 0;
 547
 548                         reg_val = readl(db->membase + EMAC_RX_CTL_REG);
 549                         reg_val &= ~EMAC_RX_CTL_DMA_EN;
 550                         writel(reg_val, db->membase + EMAC_RX_CTL_REG);
 551                 }
 552
 553                 if (!rxcount) {
 554                         db->emacrx_completed_flag = 1;
 555                         reg_val = readl(db->membase + EMAC_INT_CTL_REG);
 556                         reg_val |= (0xf << 0) | (0x01 << 8);
 557                         writel(reg_val, db->membase + EMAC_INT_CTL_REG);
 558
 559                         /* had one stuck? */
 560                         rxcount = readl(db->membase + EMAC_RX_FBC_REG);
 561                         if (!rxcount)
 562                                 return;
 563                 }
 564
 565                 reg_val = readl(db->membase + EMAC_RX_IO_DATA_REG);
 566                 if (netif_msg_rx_status(db))
 567                         dev_dbg(db->dev, "receive header: %x\n", reg_val);
 568                 if (reg_val != EMAC_UNDOCUMENTED_MAGIC) {
 569                         /* disable RX */
 570                         reg_val = readl(db->membase + EMAC_CTL_REG);
 571                         writel(reg_val & ~EMAC_CTL_RX_EN,
 572                                db->membase + EMAC_CTL_REG);
 573
 574                         /* Flush RX FIFO */
 575                         reg_val = readl(db->membase + EMAC_RX_CTL_REG);
 576                         writel(reg_val | (1 << 3),
 577                                db->membase + EMAC_RX_CTL_REG);
 578
 579                         do {
 580                                 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
 581                         } while (reg_val & (1 << 3));
 582
 583                         /* enable RX */
 584                         reg_val = readl(db->membase + EMAC_CTL_REG);
 585                         writel(reg_val | EMAC_CTL_RX_EN,
 586                                db->membase + EMAC_CTL_REG);
 587                         reg_val = readl(db->membase + EMAC_INT_CTL_REG);
 588                         reg_val |= (0xf << 0) | (0x01 << 8);
 589                         writel(reg_val, db->membase + EMAC_INT_CTL_REG);
 590
 591                         db->emacrx_completed_flag = 1;
 592
 593                         return;
 594                 }
 595
 596                 /* A packet ready now  & Get status/length */
 597                 good_packet = true;
 598
 599                 emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG,
 600                                 &rxhdr, sizeof(rxhdr));
 601
 602                 if (netif_msg_rx_status(db))
 603                         dev_dbg(db->dev, "rxhdr: %x\n", *((int *)(&rxhdr)));
 604
 605                 rxlen = EMAC_RX_IO_DATA_LEN(rxhdr);
 606                 rxstatus = EMAC_RX_IO_DATA_STATUS(rxhdr);
 607
 608                 if (netif_msg_rx_status(db))
 609                         dev_dbg(db->dev, "RX: status %02x, length %04x\n",
 610                                 rxstatus, rxlen);
 611
 612                 /* Packet Status check */
 613                 if (rxlen < 0x40) {
 614                         good_packet = false;
 615                         if (netif_msg_rx_err(db))
 616                                 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
 617                 }
 618
 619                 if (unlikely(!(rxstatus & EMAC_RX_IO_DATA_STATUS_OK))) {
 620                         good_packet = false;
 621
 622                         if (rxstatus & EMAC_RX_IO_DATA_STATUS_CRC_ERR) {
 623                                 if (netif_msg_rx_err(db))
 624                                         dev_dbg(db->dev, "crc error\n");
 625                                 dev->stats.rx_crc_errors++;
 626                         }
 627
 628                         if (rxstatus & EMAC_RX_IO_DATA_STATUS_LEN_ERR) {
 629                                 if (netif_msg_rx_err(db))
 630                                         dev_dbg(db->dev, "length error\n");
 631                                 dev->stats.rx_length_errors++;
 632                         }
 633                 }
 634
 635                 /* Move data from EMAC */
 636                 skb = dev_alloc_skb(rxlen + 4);
 637                 if (good_packet && skb) {
 638                         skb_reserve(skb, 2);
 639                         rdptr = (u8 *) skb_put(skb, rxlen - 4);
 640
 641                         /* Read received packet from RX SRAM */
 642                         if (netif_msg_rx_status(db))
 643                                 dev_dbg(db->dev, "RxLen %x\n", rxlen);
 644
 645                         emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG,
 646                                         rdptr, rxlen);
 647                         dev->stats.rx_bytes += rxlen;
 648
 649                         /* Pass to upper layer */
 650                         skb->protocol = eth_type_trans(skb, dev);
 651                         netif_rx(skb);
 652                         dev->stats.rx_packets++;
 653                 }
 654         }
 655 }
 656
 657 static irqreturn_t emac_interrupt(int irq, void *dev_id)
 658 {
 659         struct net_device *dev = dev_id;
 660         struct emac_board_info *db = netdev_priv(dev);
 661         int int_status;
 662         unsigned long flags;
 663         unsigned int reg_val;
 664
 665         /* A real interrupt coming */
 666
 667         /* holders of db->lock must always block IRQs */
 668         spin_lock_irqsave(&db->lock, flags);
 669
 670         /* Disable all interrupts */
 671         writel(0, db->membase + EMAC_INT_CTL_REG);
 672
 673         /* Got EMAC interrupt status */
 674         /* Got ISR */
 675         int_status = readl(db->membase + EMAC_INT_STA_REG);
 676         /* Clear ISR status */
 677         writel(int_status, db->membase + EMAC_INT_STA_REG);
 678
 679         if (netif_msg_intr(db))
 680                 dev_dbg(db->dev, "emac interrupt %02x\n", int_status);
 681
 682         /* Received the coming packet */
 683         if ((int_status & 0x100) && (db->emacrx_completed_flag == 1)) {
 684                 /* carrier lost */
 685                 db->emacrx_completed_flag = 0;
 686                 emac_rx(dev);
 687         }
 688
 689         /* Transmit Interrupt check */
 690         if (int_status & (0x01 | 0x02))
 691                 emac_tx_done(dev, db, int_status);
 692
 693         if (int_status & (0x04 | 0x08))
 694                 netdev_info(dev, " ab : %x\n", int_status);
 695
 696         /* Re-enable interrupt mask */
 697         if (db->emacrx_completed_flag == 1) {
 698                 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
 699                 reg_val |= (0xf << 0) | (0x01 << 8);
 700                 writel(reg_val, db->membase + EMAC_INT_CTL_REG);
 701         }
 702         spin_unlock_irqrestore(&db->lock, flags);
 703
 704         return IRQ_HANDLED;
 705 }
 706
 707 #ifdef CONFIG_NET_POLL_CONTROLLER
 708 /*
 709  * Used by netconsole
 710  */
 711 static void emac_poll_controller(struct net_device *dev)
 712 {
 713         disable_irq(dev->irq);
 714         emac_interrupt(dev->irq, dev);
 715         enable_irq(dev->irq);
 716 }
 717 #endif
 718
 719 /*  Open the interface.
 720  *  The interface is opened whenever "ifconfig" actives it.
 721  */
 722 static int emac_open(struct net_device *dev)
 723 {
 724         struct emac_board_info *db = netdev_priv(dev);
 725         int ret;
 726
 727         if (netif_msg_ifup(db))
 728                 dev_dbg(db->dev, "enabling %s\n", dev->name);
 729
 730         if (request_irq(dev->irq, &emac_interrupt, 0, dev->name, dev))
 731                 return -EAGAIN;
 732
 733         /* Initialize EMAC board */
 734         emac_reset(db);
 735         emac_init_device(dev);
 736
 737         ret = emac_mdio_probe(dev);
 738         if (ret < 0) {
 739                 netdev_err(dev, "cannot probe MDIO bus\n");
 740                 return ret;
 741         }
 742
 743         phy_start(db->phy_dev);
 744         netif_start_queue(dev);
 745
 746         return 0;
 747 }
 748
 749 static void emac_shutdown(struct net_device *dev)
 750 {
 751         unsigned int reg_val;
 752         struct emac_board_info *db = netdev_priv(dev);
 753
 754         /* Disable all interrupt */
 755         writel(0, db->membase + EMAC_INT_CTL_REG);
 756
 757         /* clear interupt status */
 758         reg_val = readl(db->membase + EMAC_INT_STA_REG);
 759         writel(reg_val, db->membase + EMAC_INT_STA_REG);
 760
 761         /* Disable RX/TX */
 762         reg_val = readl(db->membase + EMAC_CTL_REG);
 763         reg_val &= ~(EMAC_CTL_TX_EN | EMAC_CTL_RX_EN | EMAC_CTL_RESET);
 764         writel(reg_val, db->membase + EMAC_CTL_REG);
 765 }
 766
 767 /* Stop the interface.
 768  * The interface is stopped when it is brought.
 769  */
 770 static int emac_stop(struct net_device *ndev)
 771 {
 772         struct emac_board_info *db = netdev_priv(ndev);
 773
 774         if (netif_msg_ifdown(db))
 775                 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
 776
 777         netif_stop_queue(ndev);
 778         netif_carrier_off(ndev);
 779
 780         phy_stop(db->phy_dev);
 781
 782         emac_mdio_remove(ndev);
 783
 784         emac_shutdown(ndev);
 785
 786         free_irq(ndev->irq, ndev);
 787
 788         return 0;
 789 }
 790
 791 static const struct net_device_ops emac_netdev_ops = {
 792         .ndo_open               = emac_open,
 793         .ndo_stop               = emac_stop,
 794         .ndo_start_xmit         = emac_start_xmit,
 795         .ndo_tx_timeout         = emac_timeout,
 796         .ndo_set_rx_mode        = emac_set_rx_mode,
 797         .ndo_do_ioctl           = emac_ioctl,
 798         .ndo_change_mtu         = eth_change_mtu,
 799         .ndo_validate_addr      = eth_validate_addr,
 800         .ndo_set_mac_address    = emac_set_mac_address,
 801 #ifdef CONFIG_NET_POLL_CONTROLLER
 802         .ndo_poll_controller    = emac_poll_controller,
 803 #endif
 804 };
 805
 806 /* Search EMAC board, allocate space and register it
 807  */
 808 static int emac_probe(struct platform_device *pdev)
 809 {
 810         struct device_node *np = pdev->dev.of_node;
 811         struct emac_board_info *db;
 812         struct net_device *ndev;
 813         int ret = 0;
 814         const char *mac_addr;
 815
 816         ndev = alloc_etherdev(sizeof(struct emac_board_info));
 817         if (!ndev) {
 818                 dev_err(&pdev->dev, "could not allocate device.\n");
 819                 return -ENOMEM;
 820         }
 821
 822         SET_NETDEV_DEV(ndev, &pdev->dev);
 823
 824         db = netdev_priv(ndev);
 825         memset(db, 0, sizeof(*db));
 826
 827         db->dev = &pdev->dev;
 828         db->ndev = ndev;
 829         db->pdev = pdev;
 830
 831         spin_lock_init(&db->lock);
 832
 833         db->membase = of_iomap(np, 0);
 834         if (!db->membase) {
 835                 dev_err(&pdev->dev, "failed to remap registers\n");
 836                 ret = -ENOMEM;
 837                 goto out;
 838         }
 839
 840         /* fill in parameters for net-dev structure */
 841         ndev->base_addr = (unsigned long)db->membase;
 842         ndev->irq = irq_of_parse_and_map(np, 0);
 843         if (ndev->irq == -ENXIO) {
 844                 netdev_err(ndev, "No irq resource\n");
 845                 ret = ndev->irq;
 846                 goto out;
 847         }
 848
 849         db->clk = devm_clk_get(&pdev->dev, NULL);
 850         if (IS_ERR(db->clk))
 851                 goto out;
 852
 853         clk_prepare_enable(db->clk);
 854
 855         db->phy_node = of_parse_phandle(np, "phy", 0);
 856         if (!db->phy_node) {
 857                 dev_err(&pdev->dev, "no associated PHY\n");
 858                 ret = -ENODEV;
 859                 goto out;
 860         }
 861
 862         /* Read MAC-address from DT */
 863         mac_addr = of_get_mac_address(np);
 864         if (mac_addr)
 865                 memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
 866
 867         /* Check if the MAC address is valid, if not get a random one */
 868         if (!is_valid_ether_addr(ndev->dev_addr)) {
 869                 eth_hw_addr_random(ndev);
 870                 dev_warn(&pdev->dev, "using random MAC address %pM\n",
 871                          ndev->dev_addr);
 872         }
 873
 874         db->emacrx_completed_flag = 1;
 875         emac_powerup(ndev);
 876         emac_reset(db);
 877
 878         ether_setup(ndev);
 879
 880         ndev->netdev_ops = &emac_netdev_ops;
 881         ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
 882         ndev->ethtool_ops = &emac_ethtool_ops;
 883
 884         platform_set_drvdata(pdev, ndev);
 885
 886         /* Carrier starts down, phylib will bring it up */
 887         netif_carrier_off(ndev);
 888
 889         ret = register_netdev(ndev);
 890         if (ret) {
 891                 dev_err(&pdev->dev, "Registering netdev failed!\n");
 892                 ret = -ENODEV;
 893                 goto out;
 894         }
 895
 896         dev_info(&pdev->dev, "%s: at %p, IRQ %d MAC: %pM\n",
 897                  ndev->name, db->membase, ndev->irq, ndev->dev_addr);
 898
 899         return 0;
 900
 901 out:
 902         dev_err(db->dev, "not found (%d).\n", ret);
 903
 904         free_netdev(ndev);
 905
 906         return ret;
 907 }
 908
 909 static int emac_remove(struct platform_device *pdev)
 910 {
 911         struct net_device *ndev = platform_get_drvdata(pdev);
 912
 913         unregister_netdev(ndev);
 914         free_netdev(ndev);
 915
 916         dev_dbg(&pdev->dev, "released and freed device\n");
 917         return 0;
 918 }
 919
 920 static int emac_suspend(struct platform_device *dev, pm_message_t state)
 921 {
 922         struct net_device *ndev = platform_get_drvdata(dev);
 923
 924         netif_carrier_off(ndev);
 925         netif_device_detach(ndev);
 926         emac_shutdown(ndev);
 927
 928         return 0;
 929 }
 930
 931 static int emac_resume(struct platform_device *dev)
 932 {
 933         struct net_device *ndev = platform_get_drvdata(dev);
 934         struct emac_board_info *db = netdev_priv(ndev);
 935
 936         emac_reset(db);
 937         emac_init_device(ndev);
 938         netif_device_attach(ndev);
 939
 940         return 0;
 941 }
 942
 943 static const struct of_device_id emac_of_match[] = {
 944         {.compatible = "allwinner,sun4i-a10-emac",},
 945
 946         /* Deprecated */
 947         {.compatible = "allwinner,sun4i-emac",},
 948         {},
 949 };
 950
 951 MODULE_DEVICE_TABLE(of, emac_of_match);
 952
 953 static struct platform_driver emac_driver = {
 954         .driver = {
 955                 .name = "sun4i-emac",
 956                 .of_match_table = emac_of_match,
 957         },
 958         .probe = emac_probe,
 959         .remove = emac_remove,
 960         .suspend = emac_suspend,
 961         .resume = emac_resume,
 962 };
 963
 964 module_platform_driver(emac_driver);
 965
 966 MODULE_AUTHOR("Stefan Roese <sr@denx.de>");
 967 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
 968 MODULE_DESCRIPTION("Allwinner A10 emac network driver");
 969 MODULE_LICENSE("GPL");