2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
22 #include "nicvf_queues.h"
23 #include "thunder_bgx.h"
25 #define DRV_NAME "thunder-nicvf"
26 #define DRV_VERSION "1.0"
28 /* Supported devices */
29 static const struct pci_device_id nicvf_id_table[] = {
30 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
31 PCI_DEVICE_ID_THUNDER_NIC_VF,
33 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
34 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
35 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
37 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
38 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
39 PCI_DEVICE_ID_THUNDER_NIC_VF,
41 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
42 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
43 PCI_DEVICE_ID_THUNDER_NIC_VF,
45 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
46 { 0, } /* end of table */
49 MODULE_AUTHOR("Sunil Goutham");
50 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
51 MODULE_LICENSE("GPL v2");
52 MODULE_VERSION(DRV_VERSION);
53 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
55 static int debug = 0x00;
56 module_param(debug, int, 0644);
57 MODULE_PARM_DESC(debug, "Debug message level bitmap");
59 static int cpi_alg = CPI_ALG_NONE;
60 module_param(cpi_alg, int, S_IRUGO);
61 MODULE_PARM_DESC(cpi_alg,
62 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
64 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
67 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
72 static inline void nicvf_set_rx_frame_cnt(struct nicvf *nic,
76 nic->drv_stats.rx_frames_64++;
77 else if (skb->len <= 127)
78 nic->drv_stats.rx_frames_127++;
79 else if (skb->len <= 255)
80 nic->drv_stats.rx_frames_255++;
81 else if (skb->len <= 511)
82 nic->drv_stats.rx_frames_511++;
83 else if (skb->len <= 1023)
84 nic->drv_stats.rx_frames_1023++;
85 else if (skb->len <= 1518)
86 nic->drv_stats.rx_frames_1518++;
88 nic->drv_stats.rx_frames_jumbo++;
91 /* The Cavium ThunderX network controller can *only* be found in SoCs
92 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
93 * registers on this platform are implicitly strongly ordered with respect
94 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
95 * with no memory barriers in this driver. The readq()/writeq() functions add
96 * explicit ordering operation which in this case are redundant, and only
100 /* Register read/write APIs */
101 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
103 writeq_relaxed(val, nic->reg_base + offset);
106 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
108 return readq_relaxed(nic->reg_base + offset);
111 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
114 void __iomem *addr = nic->reg_base + offset;
116 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
119 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
121 void __iomem *addr = nic->reg_base + offset;
123 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
126 /* VF -> PF mailbox communication */
127 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
129 u64 *msg = (u64 *)mbx;
131 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
132 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
135 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
137 int timeout = NIC_MBOX_MSG_TIMEOUT;
140 nic->pf_acked = false;
141 nic->pf_nacked = false;
143 nicvf_write_to_mbx(nic, mbx);
145 /* Wait for previous message to be acked, timeout 2sec */
146 while (!nic->pf_acked) {
147 if (nic->pf_nacked) {
148 netdev_err(nic->netdev,
149 "PF NACK to mbox msg 0x%02x from VF%d\n",
150 (mbx->msg.msg & 0xFF), nic->vf_id);
158 netdev_err(nic->netdev,
159 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
160 (mbx->msg.msg & 0xFF), nic->vf_id);
167 /* Checks if VF is able to comminicate with PF
168 * and also gets the VNIC number this VF is associated to.
170 static int nicvf_check_pf_ready(struct nicvf *nic)
172 union nic_mbx mbx = {};
174 mbx.msg.msg = NIC_MBOX_MSG_READY;
175 if (nicvf_send_msg_to_pf(nic, &mbx)) {
176 netdev_err(nic->netdev,
177 "PF didn't respond to READY msg\n");
184 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
187 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
189 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
192 static void nicvf_handle_mbx_intr(struct nicvf *nic)
194 union nic_mbx mbx = {};
199 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
200 mbx_data = (u64 *)&mbx;
202 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
203 *mbx_data = nicvf_reg_read(nic, mbx_addr);
205 mbx_addr += sizeof(u64);
208 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
209 switch (mbx.msg.msg) {
210 case NIC_MBOX_MSG_READY:
211 nic->pf_acked = true;
212 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
213 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
214 nic->node = mbx.nic_cfg.node_id;
215 if (!nic->set_mac_pending)
216 ether_addr_copy(nic->netdev->dev_addr,
217 mbx.nic_cfg.mac_addr);
218 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
219 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
220 nic->link_up = false;
224 case NIC_MBOX_MSG_ACK:
225 nic->pf_acked = true;
227 case NIC_MBOX_MSG_NACK:
228 nic->pf_nacked = true;
230 case NIC_MBOX_MSG_RSS_SIZE:
231 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
232 nic->pf_acked = true;
234 case NIC_MBOX_MSG_BGX_STATS:
235 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
236 nic->pf_acked = true;
238 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
239 nic->pf_acked = true;
240 nic->link_up = mbx.link_status.link_up;
241 nic->duplex = mbx.link_status.duplex;
242 nic->speed = mbx.link_status.speed;
244 netdev_info(nic->netdev, "%s: Link is Up %d Mbps %s\n",
245 nic->netdev->name, nic->speed,
246 nic->duplex == DUPLEX_FULL ?
247 "Full duplex" : "Half duplex");
248 netif_carrier_on(nic->netdev);
249 netif_tx_start_all_queues(nic->netdev);
251 netdev_info(nic->netdev, "%s: Link is Down\n",
253 netif_carrier_off(nic->netdev);
254 netif_tx_stop_all_queues(nic->netdev);
257 case NIC_MBOX_MSG_ALLOC_SQS:
258 nic->sqs_count = mbx.sqs_alloc.qs_count;
259 nic->pf_acked = true;
261 case NIC_MBOX_MSG_SNICVF_PTR:
262 /* Primary VF: make note of secondary VF's pointer
263 * to be used while packet transmission.
265 nic->snicvf[mbx.nicvf.sqs_id] =
266 (struct nicvf *)mbx.nicvf.nicvf;
267 nic->pf_acked = true;
269 case NIC_MBOX_MSG_PNICVF_PTR:
270 /* Secondary VF/Qset: make note of primary VF's pointer
271 * to be used while packet reception, to handover packet
272 * to primary VF's netdev.
274 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
275 nic->pf_acked = true;
278 netdev_err(nic->netdev,
279 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
282 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
285 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
287 union nic_mbx mbx = {};
289 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
290 mbx.mac.vf_id = nic->vf_id;
291 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
293 return nicvf_send_msg_to_pf(nic, &mbx);
296 static void nicvf_config_cpi(struct nicvf *nic)
298 union nic_mbx mbx = {};
300 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
301 mbx.cpi_cfg.vf_id = nic->vf_id;
302 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
303 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
305 nicvf_send_msg_to_pf(nic, &mbx);
308 static void nicvf_get_rss_size(struct nicvf *nic)
310 union nic_mbx mbx = {};
312 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
313 mbx.rss_size.vf_id = nic->vf_id;
314 nicvf_send_msg_to_pf(nic, &mbx);
317 void nicvf_config_rss(struct nicvf *nic)
319 union nic_mbx mbx = {};
320 struct nicvf_rss_info *rss = &nic->rss_info;
321 int ind_tbl_len = rss->rss_size;
324 mbx.rss_cfg.vf_id = nic->vf_id;
325 mbx.rss_cfg.hash_bits = rss->hash_bits;
326 while (ind_tbl_len) {
327 mbx.rss_cfg.tbl_offset = nextq;
328 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
329 RSS_IND_TBL_LEN_PER_MBX_MSG);
330 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
331 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
333 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
334 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
336 nicvf_send_msg_to_pf(nic, &mbx);
338 ind_tbl_len -= mbx.rss_cfg.tbl_len;
342 void nicvf_set_rss_key(struct nicvf *nic)
344 struct nicvf_rss_info *rss = &nic->rss_info;
345 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
348 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
349 nicvf_reg_write(nic, key_addr, rss->key[idx]);
350 key_addr += sizeof(u64);
354 static int nicvf_rss_init(struct nicvf *nic)
356 struct nicvf_rss_info *rss = &nic->rss_info;
359 nicvf_get_rss_size(nic);
361 if (cpi_alg != CPI_ALG_NONE) {
369 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
370 nicvf_set_rss_key(nic);
372 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
373 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
375 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
377 for (idx = 0; idx < rss->rss_size; idx++)
378 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
380 nicvf_config_rss(nic);
384 /* Request PF to allocate additional Qsets */
385 static void nicvf_request_sqs(struct nicvf *nic)
387 union nic_mbx mbx = {};
389 int sqs_count = nic->sqs_count;
390 int rx_queues = 0, tx_queues = 0;
392 /* Only primary VF should request */
393 if (nic->sqs_mode || !nic->sqs_count)
396 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
397 mbx.sqs_alloc.vf_id = nic->vf_id;
398 mbx.sqs_alloc.qs_count = nic->sqs_count;
399 if (nicvf_send_msg_to_pf(nic, &mbx)) {
400 /* No response from PF */
405 /* Return if no Secondary Qsets available */
409 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
410 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
411 if (nic->tx_queues > MAX_SND_QUEUES_PER_QS)
412 tx_queues = nic->tx_queues - MAX_SND_QUEUES_PER_QS;
414 /* Set no of Rx/Tx queues in each of the SQsets */
415 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
416 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
417 mbx.nicvf.vf_id = nic->vf_id;
418 mbx.nicvf.sqs_id = sqs;
419 nicvf_send_msg_to_pf(nic, &mbx);
421 nic->snicvf[sqs]->sqs_id = sqs;
422 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
423 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
424 rx_queues -= MAX_RCV_QUEUES_PER_QS;
426 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
430 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
431 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
432 tx_queues -= MAX_SND_QUEUES_PER_QS;
434 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
438 nic->snicvf[sqs]->qs->cq_cnt =
439 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
441 /* Initialize secondary Qset's queues and its interrupts */
442 nicvf_open(nic->snicvf[sqs]->netdev);
445 /* Update stack with actual Rx/Tx queue count allocated */
446 if (sqs_count != nic->sqs_count)
447 nicvf_set_real_num_queues(nic->netdev,
448 nic->tx_queues, nic->rx_queues);
451 /* Send this Qset's nicvf pointer to PF.
452 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
453 * so that packets received by these Qsets can use primary VF's netdev
455 static void nicvf_send_vf_struct(struct nicvf *nic)
457 union nic_mbx mbx = {};
459 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
460 mbx.nicvf.sqs_mode = nic->sqs_mode;
461 mbx.nicvf.nicvf = (u64)nic;
462 nicvf_send_msg_to_pf(nic, &mbx);
465 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
467 union nic_mbx mbx = {};
469 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
470 nicvf_send_msg_to_pf(nic, &mbx);
473 int nicvf_set_real_num_queues(struct net_device *netdev,
474 int tx_queues, int rx_queues)
478 err = netif_set_real_num_tx_queues(netdev, tx_queues);
481 "Failed to set no of Tx queues: %d\n", tx_queues);
485 err = netif_set_real_num_rx_queues(netdev, rx_queues);
488 "Failed to set no of Rx queues: %d\n", rx_queues);
492 static int nicvf_init_resources(struct nicvf *nic)
495 union nic_mbx mbx = {};
497 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
500 nicvf_qset_config(nic, true);
502 /* Initialize queues and HW for data transfer */
503 err = nicvf_config_data_transfer(nic, true);
505 netdev_err(nic->netdev,
506 "Failed to alloc/config VF's QSet resources\n");
510 /* Send VF config done msg to PF */
511 nicvf_write_to_mbx(nic, &mbx);
516 static void nicvf_snd_pkt_handler(struct net_device *netdev,
517 struct cmp_queue *cq,
518 struct cqe_send_t *cqe_tx,
519 int cqe_type, int budget)
521 struct sk_buff *skb = NULL;
522 struct nicvf *nic = netdev_priv(netdev);
523 struct snd_queue *sq;
524 struct sq_hdr_subdesc *hdr;
526 sq = &nic->qs->sq[cqe_tx->sq_idx];
528 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
529 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
532 netdev_dbg(nic->netdev,
533 "%s Qset #%d SQ #%d SQ ptr #%d subdesc count %d\n",
534 __func__, cqe_tx->sq_qs, cqe_tx->sq_idx,
535 cqe_tx->sqe_ptr, hdr->subdesc_cnt);
537 nicvf_check_cqe_tx_errs(nic, cq, cqe_tx);
538 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
539 /* For TSO offloaded packets only one SQE will have a valid SKB */
541 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
543 napi_consume_skb(skb, budget);
544 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
546 /* In case of HW TSO, HW sends a CQE for each segment of a TSO
547 * packet instead of a single CQE for the whole TSO packet
548 * transmitted. Each of this CQE points to the same SQE, so
549 * avoid freeing same SQE multiple times.
552 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
556 static inline void nicvf_set_rxhash(struct net_device *netdev,
557 struct cqe_rx_t *cqe_rx,
563 if (!(netdev->features & NETIF_F_RXHASH))
566 switch (cqe_rx->rss_alg) {
569 hash_type = PKT_HASH_TYPE_L4;
570 hash = cqe_rx->rss_tag;
573 hash_type = PKT_HASH_TYPE_L3;
574 hash = cqe_rx->rss_tag;
577 hash_type = PKT_HASH_TYPE_NONE;
581 skb_set_hash(skb, hash, hash_type);
584 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
585 struct napi_struct *napi,
586 struct cqe_rx_t *cqe_rx)
589 struct nicvf *nic = netdev_priv(netdev);
593 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
596 /* Use primary VF's 'nicvf' struct */
598 netdev = nic->netdev;
601 /* Check for errors */
602 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
603 if (err && !cqe_rx->rb_cnt)
606 skb = nicvf_get_rcv_skb(nic, cqe_rx);
608 netdev_dbg(nic->netdev, "Packet not received\n");
612 if (netif_msg_pktdata(nic)) {
613 netdev_info(nic->netdev, "%s: skb 0x%p, len=%d\n", netdev->name,
615 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
616 skb->data, skb->len, true);
619 /* If error packet, drop it here */
621 dev_kfree_skb_any(skb);
625 nicvf_set_rx_frame_cnt(nic, skb);
627 nicvf_set_rxhash(netdev, cqe_rx, skb);
629 skb_record_rx_queue(skb, rq_idx);
630 if (netdev->hw_features & NETIF_F_RXCSUM) {
631 /* HW by default verifies TCP/UDP/SCTP checksums */
632 skb->ip_summed = CHECKSUM_UNNECESSARY;
634 skb_checksum_none_assert(skb);
637 skb->protocol = eth_type_trans(skb, netdev);
639 /* Check for stripped VLAN */
640 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
641 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
642 ntohs((__force __be16)cqe_rx->vlan_tci));
644 if (napi && (netdev->features & NETIF_F_GRO))
645 napi_gro_receive(napi, skb);
647 netif_receive_skb(skb);
650 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
651 struct napi_struct *napi, int budget)
653 int processed_cqe, work_done = 0, tx_done = 0;
654 int cqe_count, cqe_head;
655 struct nicvf *nic = netdev_priv(netdev);
656 struct queue_set *qs = nic->qs;
657 struct cmp_queue *cq = &qs->cq[cq_idx];
658 struct cqe_rx_t *cq_desc;
659 struct netdev_queue *txq;
661 spin_lock_bh(&cq->lock);
664 /* Get no of valid CQ entries to process */
665 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
666 cqe_count &= CQ_CQE_COUNT;
670 /* Get head of the valid CQ entries */
671 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
674 netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n",
675 __func__, cq_idx, cqe_count, cqe_head);
676 while (processed_cqe < cqe_count) {
677 /* Get the CQ descriptor */
678 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
680 cqe_head &= (cq->dmem.q_len - 1);
681 /* Initiate prefetch for next descriptor */
682 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
684 if ((work_done >= budget) && napi &&
685 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
689 netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n",
690 cq_idx, cq_desc->cqe_type);
691 switch (cq_desc->cqe_type) {
693 nicvf_rcv_pkt_handler(netdev, napi, cq_desc);
697 nicvf_snd_pkt_handler(netdev, cq,
698 (void *)cq_desc, CQE_TYPE_SEND,
702 case CQE_TYPE_INVALID:
703 case CQE_TYPE_RX_SPLIT:
704 case CQE_TYPE_RX_TCP:
705 case CQE_TYPE_SEND_PTP:
711 netdev_dbg(nic->netdev,
712 "%s CQ%d processed_cqe %d work_done %d budget %d\n",
713 __func__, cq_idx, processed_cqe, work_done, budget);
715 /* Ring doorbell to inform H/W to reuse processed CQEs */
716 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
717 cq_idx, processed_cqe);
719 if ((work_done < budget) && napi)
723 /* Wakeup TXQ if its stopped earlier due to SQ full */
725 netdev = nic->pnicvf->netdev;
726 txq = netdev_get_tx_queue(netdev,
727 nicvf_netdev_qidx(nic, cq_idx));
729 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
730 netif_tx_start_queue(txq);
731 nic->drv_stats.txq_wake++;
732 if (netif_msg_tx_err(nic))
734 "%s: Transmit queue wakeup SQ%d\n",
735 netdev->name, cq_idx);
739 spin_unlock_bh(&cq->lock);
743 static int nicvf_poll(struct napi_struct *napi, int budget)
747 struct net_device *netdev = napi->dev;
748 struct nicvf *nic = netdev_priv(netdev);
749 struct nicvf_cq_poll *cq;
751 cq = container_of(napi, struct nicvf_cq_poll, napi);
752 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
754 if (work_done < budget) {
755 /* Slow packet rate, exit polling */
757 /* Re-enable interrupts */
758 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
760 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
761 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
762 cq->cq_idx, cq_head);
763 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
768 /* Qset error interrupt handler
770 * As of now only CQ errors are handled
772 static void nicvf_handle_qs_err(unsigned long data)
774 struct nicvf *nic = (struct nicvf *)data;
775 struct queue_set *qs = nic->qs;
779 netif_tx_disable(nic->netdev);
781 /* Check if it is CQ err */
782 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
783 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
785 if (!(status & CQ_ERR_MASK))
787 /* Process already queued CQEs and reconfig CQ */
788 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
789 nicvf_sq_disable(nic, qidx);
790 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
791 nicvf_cmp_queue_config(nic, qs, qidx, true);
792 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
793 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
795 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
798 netif_tx_start_all_queues(nic->netdev);
799 /* Re-enable Qset error interrupt */
800 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
803 static void nicvf_dump_intr_status(struct nicvf *nic)
805 if (netif_msg_intr(nic))
806 netdev_info(nic->netdev, "%s: interrupt status 0x%llx\n",
807 nic->netdev->name, nicvf_reg_read(nic, NIC_VF_INT));
810 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
812 struct nicvf *nic = (struct nicvf *)nicvf_irq;
815 nicvf_dump_intr_status(nic);
817 intr = nicvf_reg_read(nic, NIC_VF_INT);
818 /* Check for spurious interrupt */
819 if (!(intr & NICVF_INTR_MBOX_MASK))
822 nicvf_handle_mbx_intr(nic);
827 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
829 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
830 struct nicvf *nic = cq_poll->nicvf;
831 int qidx = cq_poll->cq_idx;
833 nicvf_dump_intr_status(nic);
835 /* Disable interrupts */
836 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
839 napi_schedule_irqoff(&cq_poll->napi);
841 /* Clear interrupt */
842 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
847 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
849 struct nicvf *nic = (struct nicvf *)nicvf_irq;
853 nicvf_dump_intr_status(nic);
855 /* Disable RBDR interrupt and schedule softirq */
856 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
857 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
859 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
860 tasklet_hi_schedule(&nic->rbdr_task);
861 /* Clear interrupt */
862 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
868 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
870 struct nicvf *nic = (struct nicvf *)nicvf_irq;
872 nicvf_dump_intr_status(nic);
874 /* Disable Qset err interrupt and schedule softirq */
875 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
876 tasklet_hi_schedule(&nic->qs_err_task);
877 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
882 static int nicvf_enable_msix(struct nicvf *nic)
886 nic->num_vec = NIC_VF_MSIX_VECTORS;
888 for (vec = 0; vec < nic->num_vec; vec++)
889 nic->msix_entries[vec].entry = vec;
891 ret = pci_enable_msix(nic->pdev, nic->msix_entries, nic->num_vec);
893 netdev_err(nic->netdev,
894 "Req for #%d msix vectors failed\n", nic->num_vec);
897 nic->msix_enabled = 1;
901 static void nicvf_disable_msix(struct nicvf *nic)
903 if (nic->msix_enabled) {
904 pci_disable_msix(nic->pdev);
905 nic->msix_enabled = 0;
910 static void nicvf_set_irq_affinity(struct nicvf *nic)
915 for (vec = 0; vec < nic->num_vec; vec++) {
916 if (!nic->irq_allocated[vec])
919 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
922 if (vec < NICVF_INTR_ID_SQ)
923 /* Leave CPU0 for RBDR and other interrupts */
924 cpu = nicvf_netdev_qidx(nic, vec) + 1;
928 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
929 nic->affinity_mask[vec]);
930 irqnum = nic->msix_entries[vec].vector;
931 irq_set_affinity_hint(irqnum, nic->affinity_mask[vec]);
935 static int nicvf_register_interrupts(struct nicvf *nic)
941 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
942 nic->pnicvf->netdev->name,
943 nicvf_netdev_qidx(nic, irq));
946 sprintf(nic->irq_name[irq], "%s-sq-%d",
947 nic->pnicvf->netdev->name,
948 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
950 for_each_rbdr_irq(irq)
951 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
952 nic->pnicvf->netdev->name,
953 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
955 /* Register CQ interrupts */
956 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
957 vector = nic->msix_entries[irq].vector;
958 ret = request_irq(vector, nicvf_intr_handler,
959 0, nic->irq_name[irq], nic->napi[irq]);
962 nic->irq_allocated[irq] = true;
965 /* Register RBDR interrupt */
966 for (irq = NICVF_INTR_ID_RBDR;
967 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
968 vector = nic->msix_entries[irq].vector;
969 ret = request_irq(vector, nicvf_rbdr_intr_handler,
970 0, nic->irq_name[irq], nic);
973 nic->irq_allocated[irq] = true;
976 /* Register QS error interrupt */
977 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
978 nic->pnicvf->netdev->name,
979 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
980 irq = NICVF_INTR_ID_QS_ERR;
981 ret = request_irq(nic->msix_entries[irq].vector,
982 nicvf_qs_err_intr_handler,
983 0, nic->irq_name[irq], nic);
987 nic->irq_allocated[irq] = true;
989 /* Set IRQ affinities */
990 nicvf_set_irq_affinity(nic);
994 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
999 static void nicvf_unregister_interrupts(struct nicvf *nic)
1003 /* Free registered interrupts */
1004 for (irq = 0; irq < nic->num_vec; irq++) {
1005 if (!nic->irq_allocated[irq])
1008 irq_set_affinity_hint(nic->msix_entries[irq].vector, NULL);
1009 free_cpumask_var(nic->affinity_mask[irq]);
1011 if (irq < NICVF_INTR_ID_SQ)
1012 free_irq(nic->msix_entries[irq].vector, nic->napi[irq]);
1014 free_irq(nic->msix_entries[irq].vector, nic);
1016 nic->irq_allocated[irq] = false;
1020 nicvf_disable_msix(nic);
1023 /* Initialize MSIX vectors and register MISC interrupt.
1024 * Send READY message to PF to check if its alive
1026 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1029 int irq = NICVF_INTR_ID_MISC;
1031 /* Return if mailbox interrupt is already registered */
1032 if (nic->msix_enabled)
1036 if (!nicvf_enable_msix(nic))
1039 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1040 /* Register Misc interrupt */
1041 ret = request_irq(nic->msix_entries[irq].vector,
1042 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1046 nic->irq_allocated[irq] = true;
1048 /* Enable mailbox interrupt */
1049 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1051 /* Check if VF is able to communicate with PF */
1052 if (!nicvf_check_pf_ready(nic)) {
1053 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1054 nicvf_unregister_interrupts(nic);
1061 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1063 struct nicvf *nic = netdev_priv(netdev);
1064 int qid = skb_get_queue_mapping(skb);
1065 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1067 /* Check for minimum packet length */
1068 if (skb->len <= ETH_HLEN) {
1070 return NETDEV_TX_OK;
1073 if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
1074 netif_tx_stop_queue(txq);
1075 nic->drv_stats.txq_stop++;
1076 if (netif_msg_tx_err(nic))
1078 "%s: Transmit ring full, stopping SQ%d\n",
1080 return NETDEV_TX_BUSY;
1083 return NETDEV_TX_OK;
1086 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1088 struct nicvf_cq_poll *cq_poll;
1091 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1092 cq_poll = nic->napi[qidx];
1095 nic->napi[qidx] = NULL;
1100 int nicvf_stop(struct net_device *netdev)
1103 struct nicvf *nic = netdev_priv(netdev);
1104 struct queue_set *qs = nic->qs;
1105 struct nicvf_cq_poll *cq_poll = NULL;
1106 union nic_mbx mbx = {};
1108 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1109 nicvf_send_msg_to_pf(nic, &mbx);
1111 netif_carrier_off(netdev);
1112 netif_tx_stop_all_queues(nic->netdev);
1113 nic->link_up = false;
1115 /* Teardown secondary qsets first */
1116 if (!nic->sqs_mode) {
1117 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1118 if (!nic->snicvf[qidx])
1120 nicvf_stop(nic->snicvf[qidx]->netdev);
1121 nic->snicvf[qidx] = NULL;
1125 /* Disable RBDR & QS error interrupts */
1126 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1127 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1128 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1130 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1131 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1133 /* Wait for pending IRQ handlers to finish */
1134 for (irq = 0; irq < nic->num_vec; irq++)
1135 synchronize_irq(nic->msix_entries[irq].vector);
1137 tasklet_kill(&nic->rbdr_task);
1138 tasklet_kill(&nic->qs_err_task);
1139 if (nic->rb_work_scheduled)
1140 cancel_delayed_work_sync(&nic->rbdr_work);
1142 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1143 cq_poll = nic->napi[qidx];
1146 napi_synchronize(&cq_poll->napi);
1147 /* CQ intr is enabled while napi_complete,
1150 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1151 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1152 napi_disable(&cq_poll->napi);
1153 netif_napi_del(&cq_poll->napi);
1156 netif_tx_disable(netdev);
1158 /* Free resources */
1159 nicvf_config_data_transfer(nic, false);
1161 /* Disable HW Qset */
1162 nicvf_qset_config(nic, false);
1164 /* disable mailbox interrupt */
1165 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1167 nicvf_unregister_interrupts(nic);
1169 nicvf_free_cq_poll(nic);
1171 /* Clear multiqset info */
1177 int nicvf_open(struct net_device *netdev)
1180 struct nicvf *nic = netdev_priv(netdev);
1181 struct queue_set *qs = nic->qs;
1182 struct nicvf_cq_poll *cq_poll = NULL;
1184 nic->mtu = netdev->mtu;
1186 netif_carrier_off(netdev);
1188 err = nicvf_register_misc_interrupt(nic);
1192 /* Register NAPI handler for processing CQEs */
1193 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1194 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1199 cq_poll->cq_idx = qidx;
1200 cq_poll->nicvf = nic;
1201 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1203 napi_enable(&cq_poll->napi);
1204 nic->napi[qidx] = cq_poll;
1207 /* Check if we got MAC address from PF or else generate a radom MAC */
1208 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1209 eth_hw_addr_random(netdev);
1210 nicvf_hw_set_mac_addr(nic, netdev);
1213 if (nic->set_mac_pending) {
1214 nic->set_mac_pending = false;
1215 nicvf_hw_set_mac_addr(nic, netdev);
1218 /* Init tasklet for handling Qset err interrupt */
1219 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1220 (unsigned long)nic);
1222 /* Init RBDR tasklet which will refill RBDR */
1223 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1224 (unsigned long)nic);
1225 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1227 /* Configure CPI alorithm */
1228 nic->cpi_alg = cpi_alg;
1230 nicvf_config_cpi(nic);
1232 nicvf_request_sqs(nic);
1234 nicvf_get_primary_vf_struct(nic);
1236 /* Configure receive side scaling */
1238 nicvf_rss_init(nic);
1240 err = nicvf_register_interrupts(nic);
1244 /* Initialize the queues */
1245 err = nicvf_init_resources(nic);
1249 /* Make sure queue initialization is written */
1252 nicvf_reg_write(nic, NIC_VF_INT, -1);
1253 /* Enable Qset err interrupt */
1254 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1256 /* Enable completion queue interrupt */
1257 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1258 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1260 /* Enable RBDR threshold interrupt */
1261 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1262 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1264 nic->drv_stats.txq_stop = 0;
1265 nic->drv_stats.txq_wake = 0;
1269 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1270 nicvf_unregister_interrupts(nic);
1271 tasklet_kill(&nic->qs_err_task);
1272 tasklet_kill(&nic->rbdr_task);
1274 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1275 cq_poll = nic->napi[qidx];
1278 napi_disable(&cq_poll->napi);
1279 netif_napi_del(&cq_poll->napi);
1281 nicvf_free_cq_poll(nic);
1285 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1287 union nic_mbx mbx = {};
1289 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1290 mbx.frs.max_frs = mtu;
1291 mbx.frs.vf_id = nic->vf_id;
1293 return nicvf_send_msg_to_pf(nic, &mbx);
1296 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1298 struct nicvf *nic = netdev_priv(netdev);
1300 if (new_mtu > NIC_HW_MAX_FRS)
1303 if (new_mtu < NIC_HW_MIN_FRS)
1306 if (nicvf_update_hw_max_frs(nic, new_mtu))
1308 netdev->mtu = new_mtu;
1314 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1316 struct sockaddr *addr = p;
1317 struct nicvf *nic = netdev_priv(netdev);
1319 if (!is_valid_ether_addr(addr->sa_data))
1320 return -EADDRNOTAVAIL;
1322 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1324 if (nic->msix_enabled) {
1325 if (nicvf_hw_set_mac_addr(nic, netdev))
1328 nic->set_mac_pending = true;
1334 void nicvf_update_lmac_stats(struct nicvf *nic)
1337 union nic_mbx mbx = {};
1339 if (!netif_running(nic->netdev))
1342 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1343 mbx.bgx_stats.vf_id = nic->vf_id;
1345 mbx.bgx_stats.rx = 1;
1346 while (stat < BGX_RX_STATS_COUNT) {
1347 mbx.bgx_stats.idx = stat;
1348 if (nicvf_send_msg_to_pf(nic, &mbx))
1356 mbx.bgx_stats.rx = 0;
1357 while (stat < BGX_TX_STATS_COUNT) {
1358 mbx.bgx_stats.idx = stat;
1359 if (nicvf_send_msg_to_pf(nic, &mbx))
1365 void nicvf_update_stats(struct nicvf *nic)
1368 struct nicvf_hw_stats *stats = &nic->hw_stats;
1369 struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
1370 struct queue_set *qs = nic->qs;
1372 #define GET_RX_STATS(reg) \
1373 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1374 #define GET_TX_STATS(reg) \
1375 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1377 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1378 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1379 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1380 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1381 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1382 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1383 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1384 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1385 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1386 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1387 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1388 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1389 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1390 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1392 stats->tx_bytes_ok = GET_TX_STATS(TX_OCTS);
1393 stats->tx_ucast_frames_ok = GET_TX_STATS(TX_UCAST);
1394 stats->tx_bcast_frames_ok = GET_TX_STATS(TX_BCAST);
1395 stats->tx_mcast_frames_ok = GET_TX_STATS(TX_MCAST);
1396 stats->tx_drops = GET_TX_STATS(TX_DROP);
1398 drv_stats->tx_frames_ok = stats->tx_ucast_frames_ok +
1399 stats->tx_bcast_frames_ok +
1400 stats->tx_mcast_frames_ok;
1401 drv_stats->rx_frames_ok = stats->rx_ucast_frames +
1402 stats->rx_bcast_frames +
1403 stats->rx_mcast_frames;
1404 drv_stats->rx_drops = stats->rx_drop_red +
1405 stats->rx_drop_overrun;
1406 drv_stats->tx_drops = stats->tx_drops;
1408 /* Update RQ and SQ stats */
1409 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1410 nicvf_update_rq_stats(nic, qidx);
1411 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1412 nicvf_update_sq_stats(nic, qidx);
1415 static struct rtnl_link_stats64 *nicvf_get_stats64(struct net_device *netdev,
1416 struct rtnl_link_stats64 *stats)
1418 struct nicvf *nic = netdev_priv(netdev);
1419 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1420 struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
1422 nicvf_update_stats(nic);
1424 stats->rx_bytes = hw_stats->rx_bytes;
1425 stats->rx_packets = drv_stats->rx_frames_ok;
1426 stats->rx_dropped = drv_stats->rx_drops;
1427 stats->multicast = hw_stats->rx_mcast_frames;
1429 stats->tx_bytes = hw_stats->tx_bytes_ok;
1430 stats->tx_packets = drv_stats->tx_frames_ok;
1431 stats->tx_dropped = drv_stats->tx_drops;
1436 static void nicvf_tx_timeout(struct net_device *dev)
1438 struct nicvf *nic = netdev_priv(dev);
1440 if (netif_msg_tx_err(nic))
1441 netdev_warn(dev, "%s: Transmit timed out, resetting\n",
1444 nic->drv_stats.tx_timeout++;
1445 schedule_work(&nic->reset_task);
1448 static void nicvf_reset_task(struct work_struct *work)
1452 nic = container_of(work, struct nicvf, reset_task);
1454 if (!netif_running(nic->netdev))
1457 nicvf_stop(nic->netdev);
1458 nicvf_open(nic->netdev);
1459 netif_trans_update(nic->netdev);
1462 static int nicvf_config_loopback(struct nicvf *nic,
1463 netdev_features_t features)
1465 union nic_mbx mbx = {};
1467 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1468 mbx.lbk.vf_id = nic->vf_id;
1469 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1471 return nicvf_send_msg_to_pf(nic, &mbx);
1474 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1475 netdev_features_t features)
1477 struct nicvf *nic = netdev_priv(netdev);
1479 if ((features & NETIF_F_LOOPBACK) &&
1480 netif_running(netdev) && !nic->loopback_supported)
1481 features &= ~NETIF_F_LOOPBACK;
1486 static int nicvf_set_features(struct net_device *netdev,
1487 netdev_features_t features)
1489 struct nicvf *nic = netdev_priv(netdev);
1490 netdev_features_t changed = features ^ netdev->features;
1492 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1493 nicvf_config_vlan_stripping(nic, features);
1495 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1496 return nicvf_config_loopback(nic, features);
1501 static const struct net_device_ops nicvf_netdev_ops = {
1502 .ndo_open = nicvf_open,
1503 .ndo_stop = nicvf_stop,
1504 .ndo_start_xmit = nicvf_xmit,
1505 .ndo_change_mtu = nicvf_change_mtu,
1506 .ndo_set_mac_address = nicvf_set_mac_address,
1507 .ndo_get_stats64 = nicvf_get_stats64,
1508 .ndo_tx_timeout = nicvf_tx_timeout,
1509 .ndo_fix_features = nicvf_fix_features,
1510 .ndo_set_features = nicvf_set_features,
1513 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1515 struct device *dev = &pdev->dev;
1516 struct net_device *netdev;
1520 err = pci_enable_device(pdev);
1522 dev_err(dev, "Failed to enable PCI device\n");
1526 err = pci_request_regions(pdev, DRV_NAME);
1528 dev_err(dev, "PCI request regions failed 0x%x\n", err);
1529 goto err_disable_device;
1532 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
1534 dev_err(dev, "Unable to get usable DMA configuration\n");
1535 goto err_release_regions;
1538 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
1540 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
1541 goto err_release_regions;
1544 qcount = netif_get_num_default_rss_queues();
1546 /* Restrict multiqset support only for host bound VFs */
1547 if (pdev->is_virtfn) {
1548 /* Set max number of queues per VF */
1549 qcount = min_t(int, num_online_cpus(),
1550 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
1553 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
1556 goto err_release_regions;
1559 pci_set_drvdata(pdev, netdev);
1561 SET_NETDEV_DEV(netdev, &pdev->dev);
1563 nic = netdev_priv(netdev);
1564 nic->netdev = netdev;
1567 nic->max_queues = qcount;
1569 /* MAP VF's configuration registers */
1570 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
1571 if (!nic->reg_base) {
1572 dev_err(dev, "Cannot map config register space, aborting\n");
1574 goto err_free_netdev;
1577 err = nicvf_set_qset_resources(nic);
1579 goto err_free_netdev;
1581 /* Check if PF is alive and get MAC address for this VF */
1582 err = nicvf_register_misc_interrupt(nic);
1584 goto err_free_netdev;
1586 nicvf_send_vf_struct(nic);
1588 if (!pass1_silicon(nic->pdev))
1591 /* Check if this VF is in QS only mode */
1595 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
1597 goto err_unregister_interrupts;
1599 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
1600 NETIF_F_TSO | NETIF_F_GRO |
1601 NETIF_F_HW_VLAN_CTAG_RX);
1603 netdev->hw_features |= NETIF_F_RXHASH;
1605 netdev->features |= netdev->hw_features;
1606 netdev->hw_features |= NETIF_F_LOOPBACK;
1608 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
1610 netdev->netdev_ops = &nicvf_netdev_ops;
1611 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
1613 INIT_WORK(&nic->reset_task, nicvf_reset_task);
1615 err = register_netdev(netdev);
1617 dev_err(dev, "Failed to register netdevice\n");
1618 goto err_unregister_interrupts;
1621 nic->msg_enable = debug;
1623 nicvf_set_ethtool_ops(netdev);
1627 err_unregister_interrupts:
1628 nicvf_unregister_interrupts(nic);
1630 pci_set_drvdata(pdev, NULL);
1631 free_netdev(netdev);
1632 err_release_regions:
1633 pci_release_regions(pdev);
1635 pci_disable_device(pdev);
1639 static void nicvf_remove(struct pci_dev *pdev)
1641 struct net_device *netdev = pci_get_drvdata(pdev);
1643 struct net_device *pnetdev;
1648 nic = netdev_priv(netdev);
1649 pnetdev = nic->pnicvf->netdev;
1651 /* Check if this Qset is assigned to different VF.
1652 * If yes, clean primary and all secondary Qsets.
1654 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
1655 unregister_netdev(pnetdev);
1656 nicvf_unregister_interrupts(nic);
1657 pci_set_drvdata(pdev, NULL);
1658 free_netdev(netdev);
1659 pci_release_regions(pdev);
1660 pci_disable_device(pdev);
1663 static void nicvf_shutdown(struct pci_dev *pdev)
1668 static struct pci_driver nicvf_driver = {
1670 .id_table = nicvf_id_table,
1671 .probe = nicvf_probe,
1672 .remove = nicvf_remove,
1673 .shutdown = nicvf_shutdown,
1676 static int __init nicvf_init_module(void)
1678 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
1680 return pci_register_driver(&nicvf_driver);
1683 static void __exit nicvf_cleanup_module(void)
1685 pci_unregister_driver(&nicvf_driver);
1688 module_init(nicvf_init_module);
1689 module_exit(nicvf_cleanup_module);