drivers/net/ethernet/emulex/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2015 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            BIT(31)
  48 #define CQE_FLAGS_ASYNC_MASK            BIT(30)
  49 #define CQE_FLAGS_COMPLETED_MASK        BIT(28)
  50 #define CQE_FLAGS_CONSUMED_MASK         BIT(27)
  51
  52 /* Completion Status */
  53 enum mcc_base_status {
  54         MCC_STATUS_SUCCESS = 0,
  55         MCC_STATUS_FAILED = 1,
  56         MCC_STATUS_ILLEGAL_REQUEST = 2,
  57         MCC_STATUS_ILLEGAL_FIELD = 3,
  58         MCC_STATUS_INSUFFICIENT_BUFFER = 4,
  59         MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
  60         MCC_STATUS_NOT_SUPPORTED = 66,
  61         MCC_STATUS_FEATURE_NOT_SUPPORTED = 68
  62 };
  63
  64 /* Additional status */
  65 enum mcc_addl_status {
  66         MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16,
  67         MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d,
  68         MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a,
  69         MCC_ADDL_STATUS_INSUFFICIENT_VLANS = 0xab
  70 };
  71
  72 #define CQE_BASE_STATUS_MASK            0xFFFF
  73 #define CQE_BASE_STATUS_SHIFT           0       /* bits 0 - 15 */
  74 #define CQE_ADDL_STATUS_MASK            0xFF
  75 #define CQE_ADDL_STATUS_SHIFT           16      /* bits 16 - 31 */
  76
  77 #define base_status(status)             \
  78                 ((enum mcc_base_status) \
  79                         (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0))
  80 #define addl_status(status)             \
  81                 ((enum mcc_addl_status) \
  82                         (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \
  83                                         CQE_ADDL_STATUS_MASK : 0))
  84
  85 struct be_mcc_compl {
  86         u32 status;             /* dword 0 */
  87         u32 tag0;               /* dword 1 */
  88         u32 tag1;               /* dword 2 */
  89         u32 flags;              /* dword 3 */
  90 };
  91
  92 /* When the async bit of mcc_compl flags is set, flags
  93  * is interpreted as follows:
  94  */
  95 #define ASYNC_EVENT_CODE_SHIFT          8       /* bits 8 - 15 */
  96 #define ASYNC_EVENT_CODE_MASK           0xFF
  97 #define ASYNC_EVENT_TYPE_SHIFT          16
  98 #define ASYNC_EVENT_TYPE_MASK           0xFF
  99 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
 100 #define ASYNC_EVENT_CODE_GRP_5          0x5
 101 #define ASYNC_EVENT_QOS_SPEED           0x1
 102 #define ASYNC_EVENT_COS_PRIORITY        0x2
 103 #define ASYNC_EVENT_PVID_STATE          0x3
 104 #define ASYNC_EVENT_CODE_QNQ            0x6
 105 #define ASYNC_DEBUG_EVENT_TYPE_QNQ      1
 106 #define ASYNC_EVENT_CODE_SLIPORT        0x11
 107 #define ASYNC_EVENT_PORT_MISCONFIG      0x9
 108 #define ASYNC_EVENT_FW_CONTROL          0x5
 109
 110 enum {
 111         LINK_DOWN       = 0x0,
 112         LINK_UP         = 0x1
 113 };
 114 #define LINK_STATUS_MASK                        0x1
 115 #define LOGICAL_LINK_STATUS_MASK                0x2
 116
 117 /* When the event code of compl->flags is link-state, the mcc_compl
 118  * must be interpreted as follows
 119  */
 120 struct be_async_event_link_state {
 121         u8 physical_port;
 122         u8 port_link_status;
 123         u8 port_duplex;
 124         u8 port_speed;
 125         u8 port_fault;
 126         u8 rsvd0[7];
 127         u32 flags;
 128 } __packed;
 129
 130 /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED
 131  * the mcc_compl must be interpreted as follows
 132  */
 133 struct be_async_event_grp5_qos_link_speed {
 134         u8 physical_port;
 135         u8 rsvd[5];
 136         u16 qos_link_speed;
 137         u32 event_tag;
 138         u32 flags;
 139 } __packed;
 140
 141 /* When the event code of compl->flags is GRP5 and event type is
 142  * CoS-Priority, the mcc_compl must be interpreted as follows
 143  */
 144 struct be_async_event_grp5_cos_priority {
 145         u8 physical_port;
 146         u8 available_priority_bmap;
 147         u8 reco_default_priority;
 148         u8 valid;
 149         u8 rsvd0;
 150         u8 event_tag;
 151         u32 flags;
 152 } __packed;
 153
 154 /* When the event code of compl->flags is GRP5 and event type is
 155  * PVID state, the mcc_compl must be interpreted as follows
 156  */
 157 struct be_async_event_grp5_pvid_state {
 158         u8 enabled;
 159         u8 rsvd0;
 160         u16 tag;
 161         u32 event_tag;
 162         u32 rsvd1;
 163         u32 flags;
 164 } __packed;
 165
 166 /* async event indicating outer VLAN tag in QnQ */
 167 struct be_async_event_qnq {
 168         u8 valid;       /* Indicates if outer VLAN is valid */
 169         u8 rsvd0;
 170         u16 vlan_tag;
 171         u32 event_tag;
 172         u8 rsvd1[4];
 173         u32 flags;
 174 } __packed;
 175
 176 #define INCOMPATIBLE_SFP                0x3
 177 /* async event indicating misconfigured port */
 178 struct be_async_event_misconfig_port {
 179         u32 event_data_word1;
 180         u32 event_data_word2;
 181         u32 rsvd0;
 182         u32 flags;
 183 } __packed;
 184
 185 #define BMC_FILT_BROADCAST_ARP                          BIT(0)
 186 #define BMC_FILT_BROADCAST_DHCP_CLIENT                  BIT(1)
 187 #define BMC_FILT_BROADCAST_DHCP_SERVER                  BIT(2)
 188 #define BMC_FILT_BROADCAST_NET_BIOS                     BIT(3)
 189 #define BMC_FILT_BROADCAST                              BIT(7)
 190 #define BMC_FILT_MULTICAST_IPV6_NEIGH_ADVER             BIT(8)
 191 #define BMC_FILT_MULTICAST_IPV6_RA                      BIT(9)
 192 #define BMC_FILT_MULTICAST_IPV6_RAS                     BIT(10)
 193 #define BMC_FILT_MULTICAST                              BIT(15)
 194 struct be_async_fw_control {
 195         u32 event_data_word1;
 196         u32 event_data_word2;
 197         u32 evt_tag;
 198         u32 event_data_word4;
 199 } __packed;
 200
 201 struct be_mcc_mailbox {
 202         struct be_mcc_wrb wrb;
 203         struct be_mcc_compl compl;
 204 };
 205
 206 #define CMD_SUBSYSTEM_COMMON    0x1
 207 #define CMD_SUBSYSTEM_ETH       0x3
 208 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 209
 210 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 211 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 212 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 213 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 214 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 215 #define OPCODE_COMMON_READ_FLASHROM                     6
 216 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 217 #define OPCODE_COMMON_CQ_CREATE                         12
 218 #define OPCODE_COMMON_EQ_CREATE                         13
 219 #define OPCODE_COMMON_MCC_CREATE                        21
 220 #define OPCODE_COMMON_SET_QOS                           28
 221 #define OPCODE_COMMON_MCC_CREATE_EXT                    90
 222 #define OPCODE_COMMON_SEEPROM_READ                      30
 223 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES               32
 224 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 225 #define OPCODE_COMMON_GET_FW_VERSION                    35
 226 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 227 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 228 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 229 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 230 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 231 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 232 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 233 #define OPCODE_COMMON_MCC_DESTROY                       53
 234 #define OPCODE_COMMON_CQ_DESTROY                        54
 235 #define OPCODE_COMMON_EQ_DESTROY                        55
 236 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 237 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 238 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 239 #define OPCODE_COMMON_FUNCTION_RESET                    61
 240 #define OPCODE_COMMON_MANAGE_FAT                        68
 241 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 242 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 243 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 244 #define OPCODE_COMMON_GET_PORT_NAME                     77
 245 #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG           80
 246 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE              89
 247 #define OPCODE_COMMON_SET_FN_PRIVILEGES                 100
 248 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 249 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP           103
 250 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES    121
 251 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES           125
 252 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES           126
 253 #define OPCODE_COMMON_GET_MAC_LIST                      147
 254 #define OPCODE_COMMON_SET_MAC_LIST                      148
 255 #define OPCODE_COMMON_GET_HSW_CONFIG                    152
 256 #define OPCODE_COMMON_GET_FUNC_CONFIG                   160
 257 #define OPCODE_COMMON_GET_PROFILE_CONFIG                164
 258 #define OPCODE_COMMON_SET_PROFILE_CONFIG                165
 259 #define OPCODE_COMMON_GET_ACTIVE_PROFILE                167
 260 #define OPCODE_COMMON_SET_HSW_CONFIG                    153
 261 #define OPCODE_COMMON_GET_FN_PRIVILEGES                 170
 262 #define OPCODE_COMMON_READ_OBJECT                       171
 263 #define OPCODE_COMMON_WRITE_OBJECT                      172
 264 #define OPCODE_COMMON_DELETE_OBJECT                     174
 265 #define OPCODE_COMMON_MANAGE_IFACE_FILTERS              193
 266 #define OPCODE_COMMON_GET_IFACE_LIST                    194
 267 #define OPCODE_COMMON_ENABLE_DISABLE_VF                 196
 268
 269 #define OPCODE_ETH_RSS_CONFIG                           1
 270 #define OPCODE_ETH_ACPI_CONFIG                          2
 271 #define OPCODE_ETH_PROMISCUOUS                          3
 272 #define OPCODE_ETH_GET_STATISTICS                       4
 273 #define OPCODE_ETH_TX_CREATE                            7
 274 #define OPCODE_ETH_RX_CREATE                            8
 275 #define OPCODE_ETH_TX_DESTROY                           9
 276 #define OPCODE_ETH_RX_DESTROY                           10
 277 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 278 #define OPCODE_ETH_GET_PPORT_STATS                      18
 279
 280 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 281 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 282 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 283
 284 struct be_cmd_req_hdr {
 285         u8 opcode;              /* dword 0 */
 286         u8 subsystem;           /* dword 0 */
 287         u8 port_number;         /* dword 0 */
 288         u8 domain;              /* dword 0 */
 289         u32 timeout;            /* dword 1 */
 290         u32 request_length;     /* dword 2 */
 291         u8 version;             /* dword 3 */
 292         u8 rsvd[3];             /* dword 3 */
 293 };
 294
 295 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 296 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 297 struct be_cmd_resp_hdr {
 298         u8 opcode;              /* dword 0 */
 299         u8 subsystem;           /* dword 0 */
 300         u8 rsvd[2];             /* dword 0 */
 301         u8 base_status;         /* dword 1 */
 302         u8 addl_status;         /* dword 1 */
 303         u8 rsvd1[2];            /* dword 1 */
 304         u32 response_length;    /* dword 2 */
 305         u32 actual_resp_len;    /* dword 3 */
 306 };
 307
 308 struct phys_addr {
 309         u32 lo;
 310         u32 hi;
 311 };
 312
 313 /**************************
 314  * BE Command definitions *
 315  **************************/
 316
 317 /* Pseudo amap definition in which each bit of the actual structure is defined
 318  * as a byte: used to calculate offset/shift/mask of each field */
 319 struct amap_eq_context {
 320         u8 cidx[13];            /* dword 0*/
 321         u8 rsvd0[3];            /* dword 0*/
 322         u8 epidx[13];           /* dword 0*/
 323         u8 valid;               /* dword 0*/
 324         u8 rsvd1;               /* dword 0*/
 325         u8 size;                /* dword 0*/
 326         u8 pidx[13];            /* dword 1*/
 327         u8 rsvd2[3];            /* dword 1*/
 328         u8 pd[10];              /* dword 1*/
 329         u8 count[3];            /* dword 1*/
 330         u8 solevent;            /* dword 1*/
 331         u8 stalled;             /* dword 1*/
 332         u8 armed;               /* dword 1*/
 333         u8 rsvd3[4];            /* dword 2*/
 334         u8 func[8];             /* dword 2*/
 335         u8 rsvd4;               /* dword 2*/
 336         u8 delaymult[10];       /* dword 2*/
 337         u8 rsvd5[2];            /* dword 2*/
 338         u8 phase[2];            /* dword 2*/
 339         u8 nodelay;             /* dword 2*/
 340         u8 rsvd6[4];            /* dword 2*/
 341         u8 rsvd7[32];           /* dword 3*/
 342 } __packed;
 343
 344 struct be_cmd_req_eq_create {
 345         struct be_cmd_req_hdr hdr;
 346         u16 num_pages;          /* sword */
 347         u16 rsvd0;              /* sword */
 348         u8 context[sizeof(struct amap_eq_context) / 8];
 349         struct phys_addr pages[8];
 350 } __packed;
 351
 352 struct be_cmd_resp_eq_create {
 353         struct be_cmd_resp_hdr resp_hdr;
 354         u16 eq_id;              /* sword */
 355         u16 msix_idx;           /* available only in v2 */
 356 } __packed;
 357
 358 /******************** Mac query ***************************/
 359 enum {
 360         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 361         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 362         MAC_ADDRESS_TYPE_PD = 0x2,
 363         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 364 };
 365
 366 struct mac_addr {
 367         u16 size_of_struct;
 368         u8 addr[ETH_ALEN];
 369 } __packed;
 370
 371 struct be_cmd_req_mac_query {
 372         struct be_cmd_req_hdr hdr;
 373         u8 type;
 374         u8 permanent;
 375         u16 if_id;
 376         u32 pmac_id;
 377 } __packed;
 378
 379 struct be_cmd_resp_mac_query {
 380         struct be_cmd_resp_hdr hdr;
 381         struct mac_addr mac;
 382 };
 383
 384 /******************** PMac Add ***************************/
 385 struct be_cmd_req_pmac_add {
 386         struct be_cmd_req_hdr hdr;
 387         u32 if_id;
 388         u8 mac_address[ETH_ALEN];
 389         u8 rsvd0[2];
 390 } __packed;
 391
 392 struct be_cmd_resp_pmac_add {
 393         struct be_cmd_resp_hdr hdr;
 394         u32 pmac_id;
 395 };
 396
 397 /******************** PMac Del ***************************/
 398 struct be_cmd_req_pmac_del {
 399         struct be_cmd_req_hdr hdr;
 400         u32 if_id;
 401         u32 pmac_id;
 402 };
 403
 404 /******************** Create CQ ***************************/
 405 /* Pseudo amap definition in which each bit of the actual structure is defined
 406  * as a byte: used to calculate offset/shift/mask of each field */
 407 struct amap_cq_context_be {
 408         u8 cidx[11];            /* dword 0*/
 409         u8 rsvd0;               /* dword 0*/
 410         u8 coalescwm[2];        /* dword 0*/
 411         u8 nodelay;             /* dword 0*/
 412         u8 epidx[11];           /* dword 0*/
 413         u8 rsvd1;               /* dword 0*/
 414         u8 count[2];            /* dword 0*/
 415         u8 valid;               /* dword 0*/
 416         u8 solevent;            /* dword 0*/
 417         u8 eventable;           /* dword 0*/
 418         u8 pidx[11];            /* dword 1*/
 419         u8 rsvd2;               /* dword 1*/
 420         u8 pd[10];              /* dword 1*/
 421         u8 eqid[8];             /* dword 1*/
 422         u8 stalled;             /* dword 1*/
 423         u8 armed;               /* dword 1*/
 424         u8 rsvd3[4];            /* dword 2*/
 425         u8 func[8];             /* dword 2*/
 426         u8 rsvd4[20];           /* dword 2*/
 427         u8 rsvd5[32];           /* dword 3*/
 428 } __packed;
 429
 430 struct amap_cq_context_v2 {
 431         u8 rsvd0[12];           /* dword 0*/
 432         u8 coalescwm[2];        /* dword 0*/
 433         u8 nodelay;             /* dword 0*/
 434         u8 rsvd1[12];           /* dword 0*/
 435         u8 count[2];            /* dword 0*/
 436         u8 valid;               /* dword 0*/
 437         u8 rsvd2;               /* dword 0*/
 438         u8 eventable;           /* dword 0*/
 439         u8 eqid[16];            /* dword 1*/
 440         u8 rsvd3[15];           /* dword 1*/
 441         u8 armed;               /* dword 1*/
 442         u8 rsvd4[32];           /* dword 2*/
 443         u8 rsvd5[32];           /* dword 3*/
 444 } __packed;
 445
 446 struct be_cmd_req_cq_create {
 447         struct be_cmd_req_hdr hdr;
 448         u16 num_pages;
 449         u8 page_size;
 450         u8 rsvd0;
 451         u8 context[sizeof(struct amap_cq_context_be) / 8];
 452         struct phys_addr pages[8];
 453 } __packed;
 454
 455
 456 struct be_cmd_resp_cq_create {
 457         struct be_cmd_resp_hdr hdr;
 458         u16 cq_id;
 459         u16 rsvd0;
 460 } __packed;
 461
 462 struct be_cmd_req_get_fat {
 463         struct be_cmd_req_hdr hdr;
 464         u32 fat_operation;
 465         u32 read_log_offset;
 466         u32 read_log_length;
 467         u32 data_buffer_size;
 468         u32 data_buffer[1];
 469 } __packed;
 470
 471 struct be_cmd_resp_get_fat {
 472         struct be_cmd_resp_hdr hdr;
 473         u32 log_size;
 474         u32 read_log_length;
 475         u32 rsvd[2];
 476         u32 data_buffer[1];
 477 } __packed;
 478
 479
 480 /******************** Create MCCQ ***************************/
 481 /* Pseudo amap definition in which each bit of the actual structure is defined
 482  * as a byte: used to calculate offset/shift/mask of each field */
 483 struct amap_mcc_context_be {
 484         u8 con_index[14];
 485         u8 rsvd0[2];
 486         u8 ring_size[4];
 487         u8 fetch_wrb;
 488         u8 fetch_r2t;
 489         u8 cq_id[10];
 490         u8 prod_index[14];
 491         u8 fid[8];
 492         u8 pdid[9];
 493         u8 valid;
 494         u8 rsvd1[32];
 495         u8 rsvd2[32];
 496 } __packed;
 497
 498 struct amap_mcc_context_v1 {
 499         u8 async_cq_id[16];
 500         u8 ring_size[4];
 501         u8 rsvd0[12];
 502         u8 rsvd1[31];
 503         u8 valid;
 504         u8 async_cq_valid[1];
 505         u8 rsvd2[31];
 506         u8 rsvd3[32];
 507 } __packed;
 508
 509 struct be_cmd_req_mcc_create {
 510         struct be_cmd_req_hdr hdr;
 511         u16 num_pages;
 512         u16 cq_id;
 513         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 514         struct phys_addr pages[8];
 515 } __packed;
 516
 517 struct be_cmd_req_mcc_ext_create {
 518         struct be_cmd_req_hdr hdr;
 519         u16 num_pages;
 520         u16 cq_id;
 521         u32 async_event_bitmap[1];
 522         u8 context[sizeof(struct amap_mcc_context_v1) / 8];
 523         struct phys_addr pages[8];
 524 } __packed;
 525
 526 struct be_cmd_resp_mcc_create {
 527         struct be_cmd_resp_hdr hdr;
 528         u16 id;
 529         u16 rsvd0;
 530 } __packed;
 531
 532 /******************** Create TxQ ***************************/
 533 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 534 #define BE_ULP1_NUM                             1
 535
 536 struct be_cmd_req_eth_tx_create {
 537         struct be_cmd_req_hdr hdr;
 538         u8 num_pages;
 539         u8 ulp_num;
 540         u16 type;
 541         u16 if_id;
 542         u8 queue_size;
 543         u8 rsvd0;
 544         u32 rsvd1;
 545         u16 cq_id;
 546         u16 rsvd2;
 547         u32 rsvd3[13];
 548         struct phys_addr pages[8];
 549 } __packed;
 550
 551 struct be_cmd_resp_eth_tx_create {
 552         struct be_cmd_resp_hdr hdr;
 553         u16 cid;
 554         u16 rid;
 555         u32 db_offset;
 556         u32 rsvd0[4];
 557 } __packed;
 558
 559 /******************** Create RxQ ***************************/
 560 struct be_cmd_req_eth_rx_create {
 561         struct be_cmd_req_hdr hdr;
 562         u16 cq_id;
 563         u8 frag_size;
 564         u8 num_pages;
 565         struct phys_addr pages[2];
 566         u32 interface_id;
 567         u16 max_frame_size;
 568         u16 rsvd0;
 569         u32 rss_queue;
 570 } __packed;
 571
 572 struct be_cmd_resp_eth_rx_create {
 573         struct be_cmd_resp_hdr hdr;
 574         u16 id;
 575         u8 rss_id;
 576         u8 rsvd0;
 577 } __packed;
 578
 579 /******************** Q Destroy  ***************************/
 580 /* Type of Queue to be destroyed */
 581 enum {
 582         QTYPE_EQ = 1,
 583         QTYPE_CQ,
 584         QTYPE_TXQ,
 585         QTYPE_RXQ,
 586         QTYPE_MCCQ
 587 };
 588
 589 struct be_cmd_req_q_destroy {
 590         struct be_cmd_req_hdr hdr;
 591         u16 id;
 592         u16 bypass_flush;       /* valid only for rx q destroy */
 593 } __packed;
 594
 595 /************ I/f Create (it's actually I/f Config Create)**********/
 596
 597 /* Capability flags for the i/f */
 598 enum be_if_flags {
 599         BE_IF_FLAGS_RSS = 0x4,
 600         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 601         BE_IF_FLAGS_BROADCAST = 0x10,
 602         BE_IF_FLAGS_UNTAGGED = 0x20,
 603         BE_IF_FLAGS_ULP = 0x40,
 604         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 605         BE_IF_FLAGS_VLAN = 0x100,
 606         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 607         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 608         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
 609         BE_IF_FLAGS_MULTICAST = 0x1000,
 610         BE_IF_FLAGS_DEFQ_RSS = 0x1000000
 611 };
 612
 613 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
 614                          BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 615                          BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
 616                          BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
 617                          BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_DEFQ_RSS)
 618
 619 #define BE_IF_FLAGS_ALL_PROMISCUOUS     (BE_IF_FLAGS_PROMISCUOUS | \
 620                                          BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 621                                          BE_IF_FLAGS_MCAST_PROMISCUOUS)
 622
 623 /* An RX interface is an object with one or more MAC addresses and
 624  * filtering capabilities. */
 625 struct be_cmd_req_if_create {
 626         struct be_cmd_req_hdr hdr;
 627         u32 version;            /* ignore currently */
 628         u32 capability_flags;
 629         u32 enable_flags;
 630         u8 mac_addr[ETH_ALEN];
 631         u8 rsvd0;
 632         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 633         u32 vlan_tag;    /* not used currently */
 634 } __packed;
 635
 636 struct be_cmd_resp_if_create {
 637         struct be_cmd_resp_hdr hdr;
 638         u32 interface_id;
 639         u32 pmac_id;
 640 };
 641
 642 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 643 struct be_cmd_req_if_destroy {
 644         struct be_cmd_req_hdr hdr;
 645         u32 interface_id;
 646 };
 647
 648 /*************** HW Stats Get **********************************/
 649 struct be_port_rxf_stats_v0 {
 650         u32 rx_bytes_lsd;       /* dword 0*/
 651         u32 rx_bytes_msd;       /* dword 1*/
 652         u32 rx_total_frames;    /* dword 2*/
 653         u32 rx_unicast_frames;  /* dword 3*/
 654         u32 rx_multicast_frames;        /* dword 4*/
 655         u32 rx_broadcast_frames;        /* dword 5*/
 656         u32 rx_crc_errors;      /* dword 6*/
 657         u32 rx_alignment_symbol_errors; /* dword 7*/
 658         u32 rx_pause_frames;    /* dword 8*/
 659         u32 rx_control_frames;  /* dword 9*/
 660         u32 rx_in_range_errors; /* dword 10*/
 661         u32 rx_out_range_errors;        /* dword 11*/
 662         u32 rx_frame_too_long;  /* dword 12*/
 663         u32 rx_address_filtered;        /* dword 13*/
 664         u32 rx_vlan_filtered;   /* dword 14*/
 665         u32 rx_dropped_too_small;       /* dword 15*/
 666         u32 rx_dropped_too_short;       /* dword 16*/
 667         u32 rx_dropped_header_too_small;        /* dword 17*/
 668         u32 rx_dropped_tcp_length;      /* dword 18*/
 669         u32 rx_dropped_runt;    /* dword 19*/
 670         u32 rx_64_byte_packets; /* dword 20*/
 671         u32 rx_65_127_byte_packets;     /* dword 21*/
 672         u32 rx_128_256_byte_packets;    /* dword 22*/
 673         u32 rx_256_511_byte_packets;    /* dword 23*/
 674         u32 rx_512_1023_byte_packets;   /* dword 24*/
 675         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 676         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 677         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 678         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 679         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 680         u32 rx_ip_checksum_errs;        /* dword 30*/
 681         u32 rx_tcp_checksum_errs;       /* dword 31*/
 682         u32 rx_udp_checksum_errs;       /* dword 32*/
 683         u32 rx_non_rss_packets; /* dword 33*/
 684         u32 rx_ipv4_packets;    /* dword 34*/
 685         u32 rx_ipv6_packets;    /* dword 35*/
 686         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 687         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 688         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 689         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 690         u32 rx_chute1_packets;  /* dword 40*/
 691         u32 rx_chute2_packets;  /* dword 41*/
 692         u32 rx_chute3_packets;  /* dword 42*/
 693         u32 rx_management_packets;      /* dword 43*/
 694         u32 rx_switched_unicast_packets;        /* dword 44*/
 695         u32 rx_switched_multicast_packets;      /* dword 45*/
 696         u32 rx_switched_broadcast_packets;      /* dword 46*/
 697         u32 tx_bytes_lsd;       /* dword 47*/
 698         u32 tx_bytes_msd;       /* dword 48*/
 699         u32 tx_unicastframes;   /* dword 49*/
 700         u32 tx_multicastframes; /* dword 50*/
 701         u32 tx_broadcastframes; /* dword 51*/
 702         u32 tx_pauseframes;     /* dword 52*/
 703         u32 tx_controlframes;   /* dword 53*/
 704         u32 tx_64_byte_packets; /* dword 54*/
 705         u32 tx_65_127_byte_packets;     /* dword 55*/
 706         u32 tx_128_256_byte_packets;    /* dword 56*/
 707         u32 tx_256_511_byte_packets;    /* dword 57*/
 708         u32 tx_512_1023_byte_packets;   /* dword 58*/
 709         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 710         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 711         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 712         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 713         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 714         u32 rx_fifo_overflow;   /* dword 64*/
 715         u32 rx_input_fifo_overflow;     /* dword 65*/
 716 };
 717
 718 struct be_rxf_stats_v0 {
 719         struct be_port_rxf_stats_v0 port[2];
 720         u32 rx_drops_no_pbuf;   /* dword 132*/
 721         u32 rx_drops_no_txpb;   /* dword 133*/
 722         u32 rx_drops_no_erx_descr;      /* dword 134*/
 723         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 724         u32 management_rx_port_packets; /* dword 136*/
 725         u32 management_rx_port_bytes;   /* dword 137*/
 726         u32 management_rx_port_pause_frames;    /* dword 138*/
 727         u32 management_rx_port_errors;  /* dword 139*/
 728         u32 management_tx_port_packets; /* dword 140*/
 729         u32 management_tx_port_bytes;   /* dword 141*/
 730         u32 management_tx_port_pause;   /* dword 142*/
 731         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 732         u32 rx_drops_too_many_frags;    /* dword 144*/
 733         u32 rx_drops_invalid_ring;      /* dword 145*/
 734         u32 forwarded_packets;  /* dword 146*/
 735         u32 rx_drops_mtu;       /* dword 147*/
 736         u32 rsvd0[7];
 737         u32 port0_jabber_events;
 738         u32 port1_jabber_events;
 739         u32 rsvd1[6];
 740 };
 741
 742 struct be_erx_stats_v0 {
 743         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 744         u32 rsvd[4];
 745 };
 746
 747 struct be_pmem_stats {
 748         u32 eth_red_drops;
 749         u32 rsvd[5];
 750 };
 751
 752 struct be_hw_stats_v0 {
 753         struct be_rxf_stats_v0 rxf;
 754         u32 rsvd[48];
 755         struct be_erx_stats_v0 erx;
 756         struct be_pmem_stats pmem;
 757 };
 758
 759 struct be_cmd_req_get_stats_v0 {
 760         struct be_cmd_req_hdr hdr;
 761         u8 rsvd[sizeof(struct be_hw_stats_v0)];
 762 };
 763
 764 struct be_cmd_resp_get_stats_v0 {
 765         struct be_cmd_resp_hdr hdr;
 766         struct be_hw_stats_v0 hw_stats;
 767 };
 768
 769 struct lancer_pport_stats {
 770         u32 tx_packets_lo;
 771         u32 tx_packets_hi;
 772         u32 tx_unicast_packets_lo;
 773         u32 tx_unicast_packets_hi;
 774         u32 tx_multicast_packets_lo;
 775         u32 tx_multicast_packets_hi;
 776         u32 tx_broadcast_packets_lo;
 777         u32 tx_broadcast_packets_hi;
 778         u32 tx_bytes_lo;
 779         u32 tx_bytes_hi;
 780         u32 tx_unicast_bytes_lo;
 781         u32 tx_unicast_bytes_hi;
 782         u32 tx_multicast_bytes_lo;
 783         u32 tx_multicast_bytes_hi;
 784         u32 tx_broadcast_bytes_lo;
 785         u32 tx_broadcast_bytes_hi;
 786         u32 tx_discards_lo;
 787         u32 tx_discards_hi;
 788         u32 tx_errors_lo;
 789         u32 tx_errors_hi;
 790         u32 tx_pause_frames_lo;
 791         u32 tx_pause_frames_hi;
 792         u32 tx_pause_on_frames_lo;
 793         u32 tx_pause_on_frames_hi;
 794         u32 tx_pause_off_frames_lo;
 795         u32 tx_pause_off_frames_hi;
 796         u32 tx_internal_mac_errors_lo;
 797         u32 tx_internal_mac_errors_hi;
 798         u32 tx_control_frames_lo;
 799         u32 tx_control_frames_hi;
 800         u32 tx_packets_64_bytes_lo;
 801         u32 tx_packets_64_bytes_hi;
 802         u32 tx_packets_65_to_127_bytes_lo;
 803         u32 tx_packets_65_to_127_bytes_hi;
 804         u32 tx_packets_128_to_255_bytes_lo;
 805         u32 tx_packets_128_to_255_bytes_hi;
 806         u32 tx_packets_256_to_511_bytes_lo;
 807         u32 tx_packets_256_to_511_bytes_hi;
 808         u32 tx_packets_512_to_1023_bytes_lo;
 809         u32 tx_packets_512_to_1023_bytes_hi;
 810         u32 tx_packets_1024_to_1518_bytes_lo;
 811         u32 tx_packets_1024_to_1518_bytes_hi;
 812         u32 tx_packets_1519_to_2047_bytes_lo;
 813         u32 tx_packets_1519_to_2047_bytes_hi;
 814         u32 tx_packets_2048_to_4095_bytes_lo;
 815         u32 tx_packets_2048_to_4095_bytes_hi;
 816         u32 tx_packets_4096_to_8191_bytes_lo;
 817         u32 tx_packets_4096_to_8191_bytes_hi;
 818         u32 tx_packets_8192_to_9216_bytes_lo;
 819         u32 tx_packets_8192_to_9216_bytes_hi;
 820         u32 tx_lso_packets_lo;
 821         u32 tx_lso_packets_hi;
 822         u32 rx_packets_lo;
 823         u32 rx_packets_hi;
 824         u32 rx_unicast_packets_lo;
 825         u32 rx_unicast_packets_hi;
 826         u32 rx_multicast_packets_lo;
 827         u32 rx_multicast_packets_hi;
 828         u32 rx_broadcast_packets_lo;
 829         u32 rx_broadcast_packets_hi;
 830         u32 rx_bytes_lo;
 831         u32 rx_bytes_hi;
 832         u32 rx_unicast_bytes_lo;
 833         u32 rx_unicast_bytes_hi;
 834         u32 rx_multicast_bytes_lo;
 835         u32 rx_multicast_bytes_hi;
 836         u32 rx_broadcast_bytes_lo;
 837         u32 rx_broadcast_bytes_hi;
 838         u32 rx_unknown_protos;
 839         u32 rsvd_69; /* Word 69 is reserved */
 840         u32 rx_discards_lo;
 841         u32 rx_discards_hi;
 842         u32 rx_errors_lo;
 843         u32 rx_errors_hi;
 844         u32 rx_crc_errors_lo;
 845         u32 rx_crc_errors_hi;
 846         u32 rx_alignment_errors_lo;
 847         u32 rx_alignment_errors_hi;
 848         u32 rx_symbol_errors_lo;
 849         u32 rx_symbol_errors_hi;
 850         u32 rx_pause_frames_lo;
 851         u32 rx_pause_frames_hi;
 852         u32 rx_pause_on_frames_lo;
 853         u32 rx_pause_on_frames_hi;
 854         u32 rx_pause_off_frames_lo;
 855         u32 rx_pause_off_frames_hi;
 856         u32 rx_frames_too_long_lo;
 857         u32 rx_frames_too_long_hi;
 858         u32 rx_internal_mac_errors_lo;
 859         u32 rx_internal_mac_errors_hi;
 860         u32 rx_undersize_packets;
 861         u32 rx_oversize_packets;
 862         u32 rx_fragment_packets;
 863         u32 rx_jabbers;
 864         u32 rx_control_frames_lo;
 865         u32 rx_control_frames_hi;
 866         u32 rx_control_frames_unknown_opcode_lo;
 867         u32 rx_control_frames_unknown_opcode_hi;
 868         u32 rx_in_range_errors;
 869         u32 rx_out_of_range_errors;
 870         u32 rx_address_filtered;
 871         u32 rx_vlan_filtered;
 872         u32 rx_dropped_too_small;
 873         u32 rx_dropped_too_short;
 874         u32 rx_dropped_header_too_small;
 875         u32 rx_dropped_invalid_tcp_length;
 876         u32 rx_dropped_runt;
 877         u32 rx_ip_checksum_errors;
 878         u32 rx_tcp_checksum_errors;
 879         u32 rx_udp_checksum_errors;
 880         u32 rx_non_rss_packets;
 881         u32 rsvd_111;
 882         u32 rx_ipv4_packets_lo;
 883         u32 rx_ipv4_packets_hi;
 884         u32 rx_ipv6_packets_lo;
 885         u32 rx_ipv6_packets_hi;
 886         u32 rx_ipv4_bytes_lo;
 887         u32 rx_ipv4_bytes_hi;
 888         u32 rx_ipv6_bytes_lo;
 889         u32 rx_ipv6_bytes_hi;
 890         u32 rx_nic_packets_lo;
 891         u32 rx_nic_packets_hi;
 892         u32 rx_tcp_packets_lo;
 893         u32 rx_tcp_packets_hi;
 894         u32 rx_iscsi_packets_lo;
 895         u32 rx_iscsi_packets_hi;
 896         u32 rx_management_packets_lo;
 897         u32 rx_management_packets_hi;
 898         u32 rx_switched_unicast_packets_lo;
 899         u32 rx_switched_unicast_packets_hi;
 900         u32 rx_switched_multicast_packets_lo;
 901         u32 rx_switched_multicast_packets_hi;
 902         u32 rx_switched_broadcast_packets_lo;
 903         u32 rx_switched_broadcast_packets_hi;
 904         u32 num_forwards_lo;
 905         u32 num_forwards_hi;
 906         u32 rx_fifo_overflow;
 907         u32 rx_input_fifo_overflow;
 908         u32 rx_drops_too_many_frags_lo;
 909         u32 rx_drops_too_many_frags_hi;
 910         u32 rx_drops_invalid_queue;
 911         u32 rsvd_141;
 912         u32 rx_drops_mtu_lo;
 913         u32 rx_drops_mtu_hi;
 914         u32 rx_packets_64_bytes_lo;
 915         u32 rx_packets_64_bytes_hi;
 916         u32 rx_packets_65_to_127_bytes_lo;
 917         u32 rx_packets_65_to_127_bytes_hi;
 918         u32 rx_packets_128_to_255_bytes_lo;
 919         u32 rx_packets_128_to_255_bytes_hi;
 920         u32 rx_packets_256_to_511_bytes_lo;
 921         u32 rx_packets_256_to_511_bytes_hi;
 922         u32 rx_packets_512_to_1023_bytes_lo;
 923         u32 rx_packets_512_to_1023_bytes_hi;
 924         u32 rx_packets_1024_to_1518_bytes_lo;
 925         u32 rx_packets_1024_to_1518_bytes_hi;
 926         u32 rx_packets_1519_to_2047_bytes_lo;
 927         u32 rx_packets_1519_to_2047_bytes_hi;
 928         u32 rx_packets_2048_to_4095_bytes_lo;
 929         u32 rx_packets_2048_to_4095_bytes_hi;
 930         u32 rx_packets_4096_to_8191_bytes_lo;
 931         u32 rx_packets_4096_to_8191_bytes_hi;
 932         u32 rx_packets_8192_to_9216_bytes_lo;
 933         u32 rx_packets_8192_to_9216_bytes_hi;
 934 };
 935
 936 struct pport_stats_params {
 937         u16 pport_num;
 938         u8 rsvd;
 939         u8 reset_stats;
 940 };
 941
 942 struct lancer_cmd_req_pport_stats {
 943         struct be_cmd_req_hdr hdr;
 944         union {
 945                 struct pport_stats_params params;
 946                 u8 rsvd[sizeof(struct lancer_pport_stats)];
 947         } cmd_params;
 948 };
 949
 950 struct lancer_cmd_resp_pport_stats {
 951         struct be_cmd_resp_hdr hdr;
 952         struct lancer_pport_stats pport_stats;
 953 };
 954
 955 static inline struct lancer_pport_stats*
 956         pport_stats_from_cmd(struct be_adapter *adapter)
 957 {
 958         struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
 959         return &cmd->pport_stats;
 960 }
 961
 962 struct be_cmd_req_get_cntl_addnl_attribs {
 963         struct be_cmd_req_hdr hdr;
 964         u8 rsvd[8];
 965 };
 966
 967 struct be_cmd_resp_get_cntl_addnl_attribs {
 968         struct be_cmd_resp_hdr hdr;
 969         u16 ipl_file_number;
 970         u8 ipl_file_version;
 971         u8 rsvd0;
 972         u8 on_die_temperature; /* in degrees centigrade*/
 973         u8 rsvd1[3];
 974 };
 975
 976 struct be_cmd_req_vlan_config {
 977         struct be_cmd_req_hdr hdr;
 978         u8 interface_id;
 979         u8 promiscuous;
 980         u8 untagged;
 981         u8 num_vlan;
 982         u16 normal_vlan[64];
 983 } __packed;
 984
 985 /******************* RX FILTER ******************************/
 986 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 987 struct macaddr {
 988         u8 byte[ETH_ALEN];
 989 };
 990
 991 struct be_cmd_req_rx_filter {
 992         struct be_cmd_req_hdr hdr;
 993         u32 global_flags_mask;
 994         u32 global_flags;
 995         u32 if_flags_mask;
 996         u32 if_flags;
 997         u32 if_id;
 998         u32 mcast_num;
 999         struct macaddr mcast_mac[BE_MAX_MC];
1000 };
1001
1002 /******************** Link Status Query *******************/
1003 struct be_cmd_req_link_status {
1004         struct be_cmd_req_hdr hdr;
1005         u32 rsvd;
1006 };
1007
1008 enum {
1009         PHY_LINK_DUPLEX_NONE = 0x0,
1010         PHY_LINK_DUPLEX_HALF = 0x1,
1011         PHY_LINK_DUPLEX_FULL = 0x2
1012 };
1013
1014 enum {
1015         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
1016         PHY_LINK_SPEED_10MBPS = 0x1,
1017         PHY_LINK_SPEED_100MBPS = 0x2,
1018         PHY_LINK_SPEED_1GBPS = 0x3,
1019         PHY_LINK_SPEED_10GBPS = 0x4,
1020         PHY_LINK_SPEED_20GBPS = 0x5,
1021         PHY_LINK_SPEED_25GBPS = 0x6,
1022         PHY_LINK_SPEED_40GBPS = 0x7
1023 };
1024
1025 struct be_cmd_resp_link_status {
1026         struct be_cmd_resp_hdr hdr;
1027         u8 physical_port;
1028         u8 mac_duplex;
1029         u8 mac_speed;
1030         u8 mac_fault;
1031         u8 mgmt_mac_duplex;
1032         u8 mgmt_mac_speed;
1033         u16 link_speed;
1034         u8 logical_link_status;
1035         u8 rsvd1[3];
1036 } __packed;
1037
1038 /******************** Port Identification ***************************/
1039 /*    Identifies the type of port attached to NIC     */
1040 struct be_cmd_req_port_type {
1041         struct be_cmd_req_hdr hdr;
1042         __le32 page_num;
1043         __le32 port;
1044 };
1045
1046 enum {
1047         TR_PAGE_A0 = 0xa0,
1048         TR_PAGE_A2 = 0xa2
1049 };
1050
1051 /* From SFF-8436 QSFP+ spec */
1052 #define QSFP_PLUS_CABLE_TYPE_OFFSET     0x83
1053 #define QSFP_PLUS_CR4_CABLE             0x8
1054 #define QSFP_PLUS_SR4_CABLE             0x4
1055 #define QSFP_PLUS_LR4_CABLE             0x2
1056
1057 /* From SFF-8472 spec */
1058 #define SFP_PLUS_SFF_8472_COMP          0x5E
1059 #define SFP_PLUS_CABLE_TYPE_OFFSET      0x8
1060 #define SFP_PLUS_COPPER_CABLE           0x4
1061 #define SFP_VENDOR_NAME_OFFSET          0x14
1062 #define SFP_VENDOR_PN_OFFSET            0x28
1063
1064 #define PAGE_DATA_LEN   256
1065 struct be_cmd_resp_port_type {
1066         struct be_cmd_resp_hdr hdr;
1067         u32 page_num;
1068         u32 port;
1069         u8  page_data[PAGE_DATA_LEN];
1070 };
1071
1072 /******************** Get FW Version *******************/
1073 struct be_cmd_req_get_fw_version {
1074         struct be_cmd_req_hdr hdr;
1075         u8 rsvd0[FW_VER_LEN];
1076         u8 rsvd1[FW_VER_LEN];
1077 } __packed;
1078
1079 struct be_cmd_resp_get_fw_version {
1080         struct be_cmd_resp_hdr hdr;
1081         u8 firmware_version_string[FW_VER_LEN];
1082         u8 fw_on_flash_version_string[FW_VER_LEN];
1083 } __packed;
1084
1085 /******************** Set Flow Contrl *******************/
1086 struct be_cmd_req_set_flow_control {
1087         struct be_cmd_req_hdr hdr;
1088         u16 tx_flow_control;
1089         u16 rx_flow_control;
1090 } __packed;
1091
1092 /******************** Get Flow Contrl *******************/
1093 struct be_cmd_req_get_flow_control {
1094         struct be_cmd_req_hdr hdr;
1095         u32 rsvd;
1096 };
1097
1098 struct be_cmd_resp_get_flow_control {
1099         struct be_cmd_resp_hdr hdr;
1100         u16 tx_flow_control;
1101         u16 rx_flow_control;
1102 } __packed;
1103
1104 /******************** Modify EQ Delay *******************/
1105 struct be_set_eqd {
1106         u32 eq_id;
1107         u32 phase;
1108         u32 delay_multiplier;
1109 };
1110
1111 struct be_cmd_req_modify_eq_delay {
1112         struct be_cmd_req_hdr hdr;
1113         u32 num_eq;
1114         struct be_set_eqd set_eqd[MAX_EVT_QS];
1115 } __packed;
1116
1117 /******************** Get FW Config *******************/
1118 /* The HW can come up in either of the following multi-channel modes
1119  * based on the skew/IPL.
1120  */
1121 #define RDMA_ENABLED                            0x4
1122 #define QNQ_MODE                                0x400
1123 #define VNIC_MODE                               0x20000
1124 #define UMC_ENABLED                             0x1000000
1125 struct be_cmd_req_query_fw_cfg {
1126         struct be_cmd_req_hdr hdr;
1127         u32 rsvd[31];
1128 };
1129
1130 struct be_cmd_resp_query_fw_cfg {
1131         struct be_cmd_resp_hdr hdr;
1132         u32 be_config_number;
1133         u32 asic_revision;
1134         u32 phys_port;
1135         u32 function_mode;
1136         u32 rsvd[26];
1137         u32 function_caps;
1138 };
1139
1140 /******************** RSS Config ****************************************/
1141 /* RSS type             Input parameters used to compute RX hash
1142  * RSS_ENABLE_IPV4      SRC IPv4, DST IPv4
1143  * RSS_ENABLE_TCP_IPV4  SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1144  * RSS_ENABLE_IPV6      SRC IPv6, DST IPv6
1145  * RSS_ENABLE_TCP_IPV6  SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1146  * RSS_ENABLE_UDP_IPV4  SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1147  * RSS_ENABLE_UDP_IPV6  SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1148  *
1149  * When multiple RSS types are enabled, HW picks the best hash policy
1150  * based on the type of the received packet.
1151  */
1152 #define RSS_ENABLE_NONE                         0x0
1153 #define RSS_ENABLE_IPV4                         0x1
1154 #define RSS_ENABLE_TCP_IPV4                     0x2
1155 #define RSS_ENABLE_IPV6                         0x4
1156 #define RSS_ENABLE_TCP_IPV6                     0x8
1157 #define RSS_ENABLE_UDP_IPV4                     0x10
1158 #define RSS_ENABLE_UDP_IPV6                     0x20
1159
1160 #define L3_RSS_FLAGS                            (RXH_IP_DST | RXH_IP_SRC)
1161 #define L4_RSS_FLAGS                            (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1162
1163 struct be_cmd_req_rss_config {
1164         struct be_cmd_req_hdr hdr;
1165         u32 if_id;
1166         u16 enable_rss;
1167         u16 cpu_table_size_log2;
1168         u32 hash[10];
1169         u8 cpu_table[128];
1170         u8 flush;
1171         u8 rsvd0[3];
1172 };
1173
1174 /******************** Port Beacon ***************************/
1175
1176 #define BEACON_STATE_ENABLED            0x1
1177 #define BEACON_STATE_DISABLED           0x0
1178
1179 struct be_cmd_req_enable_disable_beacon {
1180         struct be_cmd_req_hdr hdr;
1181         u8  port_num;
1182         u8  beacon_state;
1183         u8  beacon_duration;
1184         u8  status_duration;
1185 } __packed;
1186
1187 struct be_cmd_req_get_beacon_state {
1188         struct be_cmd_req_hdr hdr;
1189         u8  port_num;
1190         u8  rsvd0;
1191         u16 rsvd1;
1192 } __packed;
1193
1194 struct be_cmd_resp_get_beacon_state {
1195         struct be_cmd_resp_hdr resp_hdr;
1196         u8 beacon_state;
1197         u8 rsvd0[3];
1198 } __packed;
1199
1200 /* Flashrom related descriptors */
1201 #define MAX_FLASH_COMP                  32
1202
1203 #define OPTYPE_ISCSI_ACTIVE             0
1204 #define OPTYPE_REDBOOT                  1
1205 #define OPTYPE_BIOS                     2
1206 #define OPTYPE_PXE_BIOS                 3
1207 #define OPTYPE_OFFSET_SPECIFIED         7
1208 #define OPTYPE_FCOE_BIOS                8
1209 #define OPTYPE_ISCSI_BACKUP             9
1210 #define OPTYPE_FCOE_FW_ACTIVE           10
1211 #define OPTYPE_FCOE_FW_BACKUP           11
1212 #define OPTYPE_NCSI_FW                  13
1213 #define OPTYPE_REDBOOT_DIR              18
1214 #define OPTYPE_REDBOOT_CONFIG           19
1215 #define OPTYPE_SH_PHY_FW                21
1216 #define OPTYPE_FLASHISM_JUMPVECTOR      22
1217 #define OPTYPE_UFI_DIR                  23
1218 #define OPTYPE_PHY_FW                   99
1219
1220 #define FLASH_BIOS_IMAGE_MAX_SIZE_g2    262144  /* Max OPTION ROM image sz */
1221 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 262144  /* Max Redboot image sz    */
1222 #define FLASH_IMAGE_MAX_SIZE_g2         1310720 /* Max firmware image size */
1223
1224 #define FLASH_NCSI_IMAGE_MAX_SIZE_g3    262144
1225 #define FLASH_PHY_FW_IMAGE_MAX_SIZE_g3  262144
1226 #define FLASH_BIOS_IMAGE_MAX_SIZE_g3    524288  /* Max OPTION ROM image sz */
1227 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 1048576 /* Max Redboot image sz    */
1228 #define FLASH_IMAGE_MAX_SIZE_g3         2097152 /* Max firmware image size */
1229
1230 /* Offsets for components on Flash. */
1231 #define FLASH_REDBOOT_START_g2                  0
1232 #define FLASH_FCoE_BIOS_START_g2                524288
1233 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g2      1048576
1234 #define FLASH_iSCSI_BACKUP_IMAGE_START_g2       2359296
1235 #define FLASH_FCoE_PRIMARY_IMAGE_START_g2       3670016
1236 #define FLASH_FCoE_BACKUP_IMAGE_START_g2        4980736
1237 #define FLASH_iSCSI_BIOS_START_g2               7340032
1238 #define FLASH_PXE_BIOS_START_g2                 7864320
1239
1240 #define FLASH_REDBOOT_START_g3                  262144
1241 #define FLASH_PHY_FW_START_g3                   1310720
1242 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g3      2097152
1243 #define FLASH_iSCSI_BACKUP_IMAGE_START_g3       4194304
1244 #define FLASH_FCoE_PRIMARY_IMAGE_START_g3       6291456
1245 #define FLASH_FCoE_BACKUP_IMAGE_START_g3        8388608
1246 #define FLASH_iSCSI_BIOS_START_g3               12582912
1247 #define FLASH_PXE_BIOS_START_g3                 13107200
1248 #define FLASH_FCoE_BIOS_START_g3                13631488
1249 #define FLASH_NCSI_START_g3                     15990784
1250
1251 #define IMAGE_NCSI                      16
1252 #define IMAGE_OPTION_ROM_PXE            32
1253 #define IMAGE_OPTION_ROM_FCoE           33
1254 #define IMAGE_OPTION_ROM_ISCSI          34
1255 #define IMAGE_FLASHISM_JUMPVECTOR       48
1256 #define IMAGE_FIRMWARE_iSCSI            160
1257 #define IMAGE_FIRMWARE_FCoE             162
1258 #define IMAGE_FIRMWARE_BACKUP_iSCSI     176
1259 #define IMAGE_FIRMWARE_BACKUP_FCoE      178
1260 #define IMAGE_FIRMWARE_PHY              192
1261 #define IMAGE_REDBOOT_DIR               208
1262 #define IMAGE_REDBOOT_CONFIG            209
1263 #define IMAGE_UFI_DIR                   210
1264 #define IMAGE_BOOT_CODE                 224
1265
1266 struct controller_id {
1267         u32 vendor;
1268         u32 device;
1269         u32 subvendor;
1270         u32 subdevice;
1271 };
1272
1273 struct flash_comp {
1274         unsigned long offset;
1275         int optype;
1276         int size;
1277         int img_type;
1278 };
1279
1280 struct image_hdr {
1281         u32 imageid;
1282         u32 imageoffset;
1283         u32 imagelength;
1284         u32 image_checksum;
1285         u8 image_version[32];
1286 };
1287
1288 struct flash_file_hdr_g2 {
1289         u8 sign[32];
1290         u32 cksum;
1291         u32 antidote;
1292         struct controller_id cont_id;
1293         u32 file_len;
1294         u32 chunk_num;
1295         u32 total_chunks;
1296         u32 num_imgs;
1297         u8 build[24];
1298 };
1299
1300 /* First letter of the build version of the image */
1301 #define BLD_STR_UFI_TYPE_BE2    '2'
1302 #define BLD_STR_UFI_TYPE_BE3    '3'
1303 #define BLD_STR_UFI_TYPE_SH     '4'
1304
1305 struct flash_file_hdr_g3 {
1306         u8 sign[52];
1307         u8 ufi_version[4];
1308         u32 file_len;
1309         u32 cksum;
1310         u32 antidote;
1311         u32 num_imgs;
1312         u8 build[24];
1313         u8 asic_type_rev;
1314         u8 rsvd[31];
1315 };
1316
1317 struct flash_section_hdr {
1318         u32 format_rev;
1319         u32 cksum;
1320         u32 antidote;
1321         u32 num_images;
1322         u8 id_string[128];
1323         u32 rsvd[4];
1324 } __packed;
1325
1326 struct flash_section_hdr_g2 {
1327         u32 format_rev;
1328         u32 cksum;
1329         u32 antidote;
1330         u32 build_num;
1331         u8 id_string[128];
1332         u32 rsvd[8];
1333 } __packed;
1334
1335 struct flash_section_entry {
1336         u32 type;
1337         u32 offset;
1338         u32 pad_size;
1339         u32 image_size;
1340         u32 cksum;
1341         u32 entry_point;
1342         u16 optype;
1343         u16 rsvd0;
1344         u32 rsvd1;
1345         u8 ver_data[32];
1346 } __packed;
1347
1348 struct flash_section_info {
1349         u8 cookie[32];
1350         struct flash_section_hdr fsec_hdr;
1351         struct flash_section_entry fsec_entry[32];
1352 } __packed;
1353
1354 struct flash_section_info_g2 {
1355         u8 cookie[32];
1356         struct flash_section_hdr_g2 fsec_hdr;
1357         struct flash_section_entry fsec_entry[32];
1358 } __packed;
1359
1360 /****************** Firmware Flash ******************/
1361 #define FLASHROM_OPER_FLASH             1
1362 #define FLASHROM_OPER_SAVE              2
1363 #define FLASHROM_OPER_REPORT            4
1364 #define FLASHROM_OPER_PHY_FLASH         9
1365 #define FLASHROM_OPER_PHY_SAVE          10
1366
1367 struct flashrom_params {
1368         u32 op_code;
1369         u32 op_type;
1370         u32 data_buf_size;
1371         u32 offset;
1372 };
1373
1374 struct be_cmd_write_flashrom {
1375         struct be_cmd_req_hdr hdr;
1376         struct flashrom_params params;
1377         u8 data_buf[32768];
1378         u8 rsvd[4];
1379 } __packed;
1380
1381 /* cmd to read flash crc */
1382 struct be_cmd_read_flash_crc {
1383         struct be_cmd_req_hdr hdr;
1384         struct flashrom_params params;
1385         u8 crc[4];
1386         u8 rsvd[4];
1387 } __packed;
1388
1389 /**************** Lancer Firmware Flash ************/
1390 struct amap_lancer_write_obj_context {
1391         u8 write_length[24];
1392         u8 reserved1[7];
1393         u8 eof;
1394 } __packed;
1395
1396 struct lancer_cmd_req_write_object {
1397         struct be_cmd_req_hdr hdr;
1398         u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1399         u32 write_offset;
1400         u8 object_name[104];
1401         u32 descriptor_count;
1402         u32 buf_len;
1403         u32 addr_low;
1404         u32 addr_high;
1405 };
1406
1407 #define LANCER_NO_RESET_NEEDED          0x00
1408 #define LANCER_FW_RESET_NEEDED          0x02
1409 struct lancer_cmd_resp_write_object {
1410         u8 opcode;
1411         u8 subsystem;
1412         u8 rsvd1[2];
1413         u8 status;
1414         u8 additional_status;
1415         u8 rsvd2[2];
1416         u32 resp_len;
1417         u32 actual_resp_len;
1418         u32 actual_write_len;
1419         u8 change_status;
1420         u8 rsvd3[3];
1421 };
1422
1423 /************************ Lancer Read FW info **************/
1424 #define LANCER_READ_FILE_CHUNK                  (32*1024)
1425 #define LANCER_READ_FILE_EOF_MASK               0x80000000
1426
1427 #define LANCER_FW_DUMP_FILE                     "/dbg/dump.bin"
1428 #define LANCER_VPD_PF_FILE                      "/vpd/ntr_pf.vpd"
1429 #define LANCER_VPD_VF_FILE                      "/vpd/ntr_vf.vpd"
1430
1431 struct lancer_cmd_req_read_object {
1432         struct be_cmd_req_hdr hdr;
1433         u32 desired_read_len;
1434         u32 read_offset;
1435         u8 object_name[104];
1436         u32 descriptor_count;
1437         u32 buf_len;
1438         u32 addr_low;
1439         u32 addr_high;
1440 };
1441
1442 struct lancer_cmd_resp_read_object {
1443         u8 opcode;
1444         u8 subsystem;
1445         u8 rsvd1[2];
1446         u8 status;
1447         u8 additional_status;
1448         u8 rsvd2[2];
1449         u32 resp_len;
1450         u32 actual_resp_len;
1451         u32 actual_read_len;
1452         u32 eof;
1453 };
1454
1455 struct lancer_cmd_req_delete_object {
1456         struct be_cmd_req_hdr hdr;
1457         u32 rsvd1;
1458         u32 rsvd2;
1459         u8 object_name[104];
1460 };
1461
1462 /************************ WOL *******************************/
1463 struct be_cmd_req_acpi_wol_magic_config{
1464         struct be_cmd_req_hdr hdr;
1465         u32 rsvd0[145];
1466         u8 magic_mac[6];
1467         u8 rsvd2[2];
1468 } __packed;
1469
1470 struct be_cmd_req_acpi_wol_magic_config_v1 {
1471         struct be_cmd_req_hdr hdr;
1472         u8 rsvd0[2];
1473         u8 query_options;
1474         u8 rsvd1[5];
1475         u32 rsvd2[288];
1476         u8 magic_mac[6];
1477         u8 rsvd3[22];
1478 } __packed;
1479
1480 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1481         struct be_cmd_resp_hdr hdr;
1482         u8 rsvd0[2];
1483         u8 wol_settings;
1484         u8 rsvd1[5];
1485         u32 rsvd2[295];
1486 } __packed;
1487
1488 #define BE_GET_WOL_CAP                  2
1489
1490 #define BE_WOL_CAP                      0x1
1491 #define BE_PME_D0_CAP                   0x8
1492 #define BE_PME_D1_CAP                   0x10
1493 #define BE_PME_D2_CAP                   0x20
1494 #define BE_PME_D3HOT_CAP                0x40
1495 #define BE_PME_D3COLD_CAP               0x80
1496
1497 /********************** LoopBack test *********************/
1498 #define SET_LB_MODE_TIMEOUT             12000
1499
1500 struct be_cmd_req_loopback_test {
1501         struct be_cmd_req_hdr hdr;
1502         u32 loopback_type;
1503         u32 num_pkts;
1504         u64 pattern;
1505         u32 src_port;
1506         u32 dest_port;
1507         u32 pkt_size;
1508 };
1509
1510 struct be_cmd_resp_loopback_test {
1511         struct be_cmd_resp_hdr resp_hdr;
1512         u32    status;
1513         u32    num_txfer;
1514         u32    num_rx;
1515         u32    miscomp_off;
1516         u32    ticks_compl;
1517 };
1518
1519 struct be_cmd_req_set_lmode {
1520         struct be_cmd_req_hdr hdr;
1521         u8 src_port;
1522         u8 dest_port;
1523         u8 loopback_type;
1524         u8 loopback_state;
1525 };
1526
1527 /********************** DDR DMA test *********************/
1528 struct be_cmd_req_ddrdma_test {
1529         struct be_cmd_req_hdr hdr;
1530         u64 pattern;
1531         u32 byte_count;
1532         u32 rsvd0;
1533         u8  snd_buff[4096];
1534         u8  rsvd1[4096];
1535 };
1536
1537 struct be_cmd_resp_ddrdma_test {
1538         struct be_cmd_resp_hdr hdr;
1539         u64 pattern;
1540         u32 byte_cnt;
1541         u32 snd_err;
1542         u8  rsvd0[4096];
1543         u8  rcv_buff[4096];
1544 };
1545
1546 /*********************** SEEPROM Read ***********************/
1547
1548 #define BE_READ_SEEPROM_LEN 1024
1549 struct be_cmd_req_seeprom_read {
1550         struct be_cmd_req_hdr hdr;
1551         u8 rsvd0[BE_READ_SEEPROM_LEN];
1552 };
1553
1554 struct be_cmd_resp_seeprom_read {
1555         struct be_cmd_req_hdr hdr;
1556         u8 seeprom_data[BE_READ_SEEPROM_LEN];
1557 };
1558
1559 enum {
1560         PHY_TYPE_CX4_10GB = 0,
1561         PHY_TYPE_XFP_10GB,
1562         PHY_TYPE_SFP_1GB,
1563         PHY_TYPE_SFP_PLUS_10GB,
1564         PHY_TYPE_KR_10GB,
1565         PHY_TYPE_KX4_10GB,
1566         PHY_TYPE_BASET_10GB,
1567         PHY_TYPE_BASET_1GB,
1568         PHY_TYPE_BASEX_1GB,
1569         PHY_TYPE_SGMII,
1570         PHY_TYPE_QSFP,
1571         PHY_TYPE_KR4_40GB,
1572         PHY_TYPE_KR2_20GB,
1573         PHY_TYPE_TN_8022,
1574         PHY_TYPE_DISABLED = 255
1575 };
1576
1577 #define BE_SUPPORTED_SPEED_NONE         0
1578 #define BE_SUPPORTED_SPEED_10MBPS       1
1579 #define BE_SUPPORTED_SPEED_100MBPS      2
1580 #define BE_SUPPORTED_SPEED_1GBPS        4
1581 #define BE_SUPPORTED_SPEED_10GBPS       8
1582 #define BE_SUPPORTED_SPEED_20GBPS       0x10
1583 #define BE_SUPPORTED_SPEED_40GBPS       0x20
1584
1585 #define BE_AN_EN                        0x2
1586 #define BE_PAUSE_SYM_EN                 0x80
1587
1588 /* MAC speed valid values */
1589 #define SPEED_DEFAULT  0x0
1590 #define SPEED_FORCED_10GB  0x1
1591 #define SPEED_FORCED_1GB  0x2
1592 #define SPEED_AUTONEG_10GB  0x3
1593 #define SPEED_AUTONEG_1GB  0x4
1594 #define SPEED_AUTONEG_100MB  0x5
1595 #define SPEED_AUTONEG_10GB_1GB 0x6
1596 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1597 #define SPEED_AUTONEG_1GB_100MB  0x8
1598 #define SPEED_AUTONEG_10MB  0x9
1599 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1600 #define SPEED_AUTONEG_100MB_10MB 0xb
1601 #define SPEED_FORCED_100MB  0xc
1602 #define SPEED_FORCED_10MB  0xd
1603
1604 struct be_cmd_req_get_phy_info {
1605         struct be_cmd_req_hdr hdr;
1606         u8 rsvd0[24];
1607 };
1608
1609 struct be_phy_info {
1610         u16 phy_type;
1611         u16 interface_type;
1612         u32 misc_params;
1613         u16 ext_phy_details;
1614         u16 rsvd;
1615         u16 auto_speeds_supported;
1616         u16 fixed_speeds_supported;
1617         u32 future_use[2];
1618 };
1619
1620 struct be_cmd_resp_get_phy_info {
1621         struct be_cmd_req_hdr hdr;
1622         struct be_phy_info phy_info;
1623 };
1624
1625 /*********************** Set QOS ***********************/
1626
1627 #define BE_QOS_BITS_NIC                         1
1628
1629 struct be_cmd_req_set_qos {
1630         struct be_cmd_req_hdr hdr;
1631         u32 valid_bits;
1632         u32 max_bps_nic;
1633         u32 rsvd[7];
1634 };
1635
1636 /*********************** Controller Attributes ***********************/
1637 struct mgmt_hba_attribs {
1638         u32 rsvd0[24];
1639         u8 controller_model_number[32];
1640         u32 rsvd1[79];
1641         u8 rsvd2[3];
1642         u8 phy_port;
1643         u32 rsvd3[13];
1644 } __packed;
1645
1646 struct mgmt_controller_attrib {
1647         struct mgmt_hba_attribs hba_attribs;
1648         u32 rsvd0[10];
1649 } __packed;
1650
1651 struct be_cmd_req_cntl_attribs {
1652         struct be_cmd_req_hdr hdr;
1653 };
1654
1655 struct be_cmd_resp_cntl_attribs {
1656         struct be_cmd_resp_hdr hdr;
1657         struct mgmt_controller_attrib attribs;
1658 };
1659
1660 /*********************** Set driver function ***********************/
1661 #define CAPABILITY_SW_TIMESTAMPS        2
1662 #define CAPABILITY_BE3_NATIVE_ERX_API   4
1663
1664 struct be_cmd_req_set_func_cap {
1665         struct be_cmd_req_hdr hdr;
1666         u32 valid_cap_flags;
1667         u32 cap_flags;
1668         u8 rsvd[212];
1669 };
1670
1671 struct be_cmd_resp_set_func_cap {
1672         struct be_cmd_resp_hdr hdr;
1673         u32 valid_cap_flags;
1674         u32 cap_flags;
1675         u8 rsvd[212];
1676 };
1677
1678 /*********************** Function Privileges ***********************/
1679 enum {
1680         BE_PRIV_DEFAULT = 0x1,
1681         BE_PRIV_LNKQUERY = 0x2,
1682         BE_PRIV_LNKSTATS = 0x4,
1683         BE_PRIV_LNKMGMT = 0x8,
1684         BE_PRIV_LNKDIAG = 0x10,
1685         BE_PRIV_UTILQUERY = 0x20,
1686         BE_PRIV_FILTMGMT = 0x40,
1687         BE_PRIV_IFACEMGMT = 0x80,
1688         BE_PRIV_VHADM = 0x100,
1689         BE_PRIV_DEVCFG = 0x200,
1690         BE_PRIV_DEVSEC = 0x400
1691 };
1692 #define MAX_PRIVILEGES          (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1693                                  BE_PRIV_DEVSEC)
1694 #define MIN_PRIVILEGES          BE_PRIV_DEFAULT
1695
1696 struct be_cmd_priv_map {
1697         u8 opcode;
1698         u8 subsystem;
1699         u32 priv_mask;
1700 };
1701
1702 struct be_cmd_req_get_fn_privileges {
1703         struct be_cmd_req_hdr hdr;
1704         u32 rsvd;
1705 };
1706
1707 struct be_cmd_resp_get_fn_privileges {
1708         struct be_cmd_resp_hdr hdr;
1709         u32 privilege_mask;
1710 };
1711
1712 struct be_cmd_req_set_fn_privileges {
1713         struct be_cmd_req_hdr hdr;
1714         u32 privileges;         /* Used by BE3, SH-R */
1715         u32 privileges_lancer;  /* Used by Lancer */
1716 };
1717
1718 /******************** GET/SET_MACLIST  **************************/
1719 #define BE_MAX_MAC                      64
1720 struct be_cmd_req_get_mac_list {
1721         struct be_cmd_req_hdr hdr;
1722         u8 mac_type;
1723         u8 perm_override;
1724         u16 iface_id;
1725         u32 mac_id;
1726         u32 rsvd[3];
1727 } __packed;
1728
1729 struct get_list_macaddr {
1730         u16 mac_addr_size;
1731         union {
1732                 u8 macaddr[6];
1733                 struct {
1734                         u8 rsvd[2];
1735                         u32 mac_id;
1736                 } __packed s_mac_id;
1737         } __packed mac_addr_id;
1738 } __packed;
1739
1740 struct be_cmd_resp_get_mac_list {
1741         struct be_cmd_resp_hdr hdr;
1742         struct get_list_macaddr fd_macaddr; /* Factory default mac */
1743         struct get_list_macaddr macid_macaddr; /* soft mac */
1744         u8 true_mac_count;
1745         u8 pseudo_mac_count;
1746         u8 mac_list_size;
1747         u8 rsvd;
1748         /* perm override mac */
1749         struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1750 } __packed;
1751
1752 struct be_cmd_req_set_mac_list {
1753         struct be_cmd_req_hdr hdr;
1754         u8 mac_count;
1755         u8 rsvd1;
1756         u16 rsvd2;
1757         struct macaddr mac[BE_MAX_MAC];
1758 } __packed;
1759
1760 /*********************** HSW Config ***********************/
1761 #define PORT_FWD_TYPE_VEPA              0x3
1762 #define PORT_FWD_TYPE_VEB               0x2
1763 #define PORT_FWD_TYPE_PASSTHRU          0x1
1764
1765 #define ENABLE_MAC_SPOOFCHK             0x2
1766 #define DISABLE_MAC_SPOOFCHK            0x3
1767
1768 struct amap_set_hsw_context {
1769         u8 interface_id[16];
1770         u8 rsvd0[8];
1771         u8 mac_spoofchk[2];
1772         u8 rsvd1[4];
1773         u8 pvid_valid;
1774         u8 pport;
1775         u8 rsvd2[6];
1776         u8 port_fwd_type[3];
1777         u8 rsvd3[5];
1778         u8 vlan_spoofchk[2];
1779         u8 pvid[16];
1780         u8 rsvd4[32];
1781         u8 rsvd5[32];
1782         u8 rsvd6[32];
1783 } __packed;
1784
1785 struct be_cmd_req_set_hsw_config {
1786         struct be_cmd_req_hdr hdr;
1787         u8 context[sizeof(struct amap_set_hsw_context) / 8];
1788 } __packed;
1789
1790 struct amap_get_hsw_req_context {
1791         u8 interface_id[16];
1792         u8 rsvd0[14];
1793         u8 pvid_valid;
1794         u8 pport;
1795 } __packed;
1796
1797 struct amap_get_hsw_resp_context {
1798         u8 rsvd0[6];
1799         u8 port_fwd_type[3];
1800         u8 rsvd1[5];
1801         u8 spoofchk;
1802         u8 rsvd2;
1803         u8 pvid[16];
1804         u8 rsvd3[32];
1805         u8 rsvd4[32];
1806         u8 rsvd5[32];
1807 } __packed;
1808
1809 struct be_cmd_req_get_hsw_config {
1810         struct be_cmd_req_hdr hdr;
1811         u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1812 } __packed;
1813
1814 struct be_cmd_resp_get_hsw_config {
1815         struct be_cmd_resp_hdr hdr;
1816         u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1817         u32 rsvd;
1818 };
1819
1820 /******************* get port names ***************/
1821 struct be_cmd_req_get_port_name {
1822         struct be_cmd_req_hdr hdr;
1823         u32 rsvd0;
1824 };
1825
1826 struct be_cmd_resp_get_port_name {
1827         struct be_cmd_req_hdr hdr;
1828         u8 port_name[4];
1829 };
1830
1831 /*************** HW Stats Get v1 **********************************/
1832 #define BE_TXP_SW_SZ                    48
1833 struct be_port_rxf_stats_v1 {
1834         u32 rsvd0[12];
1835         u32 rx_crc_errors;
1836         u32 rx_alignment_symbol_errors;
1837         u32 rx_pause_frames;
1838         u32 rx_priority_pause_frames;
1839         u32 rx_control_frames;
1840         u32 rx_in_range_errors;
1841         u32 rx_out_range_errors;
1842         u32 rx_frame_too_long;
1843         u32 rx_address_filtered;
1844         u32 rx_dropped_too_small;
1845         u32 rx_dropped_too_short;
1846         u32 rx_dropped_header_too_small;
1847         u32 rx_dropped_tcp_length;
1848         u32 rx_dropped_runt;
1849         u32 rsvd1[10];
1850         u32 rx_ip_checksum_errs;
1851         u32 rx_tcp_checksum_errs;
1852         u32 rx_udp_checksum_errs;
1853         u32 rsvd2[7];
1854         u32 rx_switched_unicast_packets;
1855         u32 rx_switched_multicast_packets;
1856         u32 rx_switched_broadcast_packets;
1857         u32 rsvd3[3];
1858         u32 tx_pauseframes;
1859         u32 tx_priority_pauseframes;
1860         u32 tx_controlframes;
1861         u32 rsvd4[10];
1862         u32 rxpp_fifo_overflow_drop;
1863         u32 rx_input_fifo_overflow_drop;
1864         u32 pmem_fifo_overflow_drop;
1865         u32 jabber_events;
1866         u32 rsvd5[3];
1867 };
1868
1869
1870 struct be_rxf_stats_v1 {
1871         struct be_port_rxf_stats_v1 port[4];
1872         u32 rsvd0[2];
1873         u32 rx_drops_no_pbuf;
1874         u32 rx_drops_no_txpb;
1875         u32 rx_drops_no_erx_descr;
1876         u32 rx_drops_no_tpre_descr;
1877         u32 rsvd1[6];
1878         u32 rx_drops_too_many_frags;
1879         u32 rx_drops_invalid_ring;
1880         u32 forwarded_packets;
1881         u32 rx_drops_mtu;
1882         u32 rsvd2[14];
1883 };
1884
1885 struct be_erx_stats_v1 {
1886         u32 rx_drops_no_fragments[68];     /* dwordS 0 to 67*/
1887         u32 rsvd[4];
1888 };
1889
1890 struct be_port_rxf_stats_v2 {
1891         u32 rsvd0[10];
1892         u32 roce_bytes_received_lsd;
1893         u32 roce_bytes_received_msd;
1894         u32 rsvd1[5];
1895         u32 roce_frames_received;
1896         u32 rx_crc_errors;
1897         u32 rx_alignment_symbol_errors;
1898         u32 rx_pause_frames;
1899         u32 rx_priority_pause_frames;
1900         u32 rx_control_frames;
1901         u32 rx_in_range_errors;
1902         u32 rx_out_range_errors;
1903         u32 rx_frame_too_long;
1904         u32 rx_address_filtered;
1905         u32 rx_dropped_too_small;
1906         u32 rx_dropped_too_short;
1907         u32 rx_dropped_header_too_small;
1908         u32 rx_dropped_tcp_length;
1909         u32 rx_dropped_runt;
1910         u32 rsvd2[10];
1911         u32 rx_ip_checksum_errs;
1912         u32 rx_tcp_checksum_errs;
1913         u32 rx_udp_checksum_errs;
1914         u32 rsvd3[7];
1915         u32 rx_switched_unicast_packets;
1916         u32 rx_switched_multicast_packets;
1917         u32 rx_switched_broadcast_packets;
1918         u32 rsvd4[3];
1919         u32 tx_pauseframes;
1920         u32 tx_priority_pauseframes;
1921         u32 tx_controlframes;
1922         u32 rsvd5[10];
1923         u32 rxpp_fifo_overflow_drop;
1924         u32 rx_input_fifo_overflow_drop;
1925         u32 pmem_fifo_overflow_drop;
1926         u32 jabber_events;
1927         u32 rsvd6[3];
1928         u32 rx_drops_payload_size;
1929         u32 rx_drops_clipped_header;
1930         u32 rx_drops_crc;
1931         u32 roce_drops_payload_len;
1932         u32 roce_drops_crc;
1933         u32 rsvd7[19];
1934 };
1935
1936 struct be_rxf_stats_v2 {
1937         struct be_port_rxf_stats_v2 port[4];
1938         u32 rsvd0[2];
1939         u32 rx_drops_no_pbuf;
1940         u32 rx_drops_no_txpb;
1941         u32 rx_drops_no_erx_descr;
1942         u32 rx_drops_no_tpre_descr;
1943         u32 rsvd1[6];
1944         u32 rx_drops_too_many_frags;
1945         u32 rx_drops_invalid_ring;
1946         u32 forwarded_packets;
1947         u32 rx_drops_mtu;
1948         u32 rsvd2[35];
1949 };
1950
1951 struct be_hw_stats_v1 {
1952         struct be_rxf_stats_v1 rxf;
1953         u32 rsvd0[BE_TXP_SW_SZ];
1954         struct be_erx_stats_v1 erx;
1955         struct be_pmem_stats pmem;
1956         u32 rsvd1[18];
1957 };
1958
1959 struct be_cmd_req_get_stats_v1 {
1960         struct be_cmd_req_hdr hdr;
1961         u8 rsvd[sizeof(struct be_hw_stats_v1)];
1962 };
1963
1964 struct be_cmd_resp_get_stats_v1 {
1965         struct be_cmd_resp_hdr hdr;
1966         struct be_hw_stats_v1 hw_stats;
1967 };
1968
1969 struct be_erx_stats_v2 {
1970         u32 rx_drops_no_fragments[136];     /* dwordS 0 to 135*/
1971         u32 rsvd[3];
1972 };
1973
1974 struct be_hw_stats_v2 {
1975         struct be_rxf_stats_v2 rxf;
1976         u32 rsvd0[BE_TXP_SW_SZ];
1977         struct be_erx_stats_v2 erx;
1978         struct be_pmem_stats pmem;
1979         u32 rsvd1[18];
1980 };
1981
1982 struct be_cmd_req_get_stats_v2 {
1983         struct be_cmd_req_hdr hdr;
1984         u8 rsvd[sizeof(struct be_hw_stats_v2)];
1985 };
1986
1987 struct be_cmd_resp_get_stats_v2 {
1988         struct be_cmd_resp_hdr hdr;
1989         struct be_hw_stats_v2 hw_stats;
1990 };
1991
1992 /************** get fat capabilites *******************/
1993 #define MAX_MODULES 27
1994 #define MAX_MODES 4
1995 #define MODE_UART 0
1996 #define FW_LOG_LEVEL_DEFAULT 48
1997 #define FW_LOG_LEVEL_FATAL 64
1998
1999 struct ext_fat_mode {
2000         u8 mode;
2001         u8 rsvd0;
2002         u16 port_mask;
2003         u32 dbg_lvl;
2004         u64 fun_mask;
2005 } __packed;
2006
2007 struct ext_fat_modules {
2008         u8 modules_str[32];
2009         u32 modules_id;
2010         u32 num_modes;
2011         struct ext_fat_mode trace_lvl[MAX_MODES];
2012 } __packed;
2013
2014 struct be_fat_conf_params {
2015         u32 max_log_entries;
2016         u32 log_entry_size;
2017         u8 log_type;
2018         u8 max_log_funs;
2019         u8 max_log_ports;
2020         u8 rsvd0;
2021         u32 supp_modes;
2022         u32 num_modules;
2023         struct ext_fat_modules module[MAX_MODULES];
2024 } __packed;
2025
2026 struct be_cmd_req_get_ext_fat_caps {
2027         struct be_cmd_req_hdr hdr;
2028         u32 parameter_type;
2029 };
2030
2031 struct be_cmd_resp_get_ext_fat_caps {
2032         struct be_cmd_resp_hdr hdr;
2033         struct be_fat_conf_params get_params;
2034 };
2035
2036 struct be_cmd_req_set_ext_fat_caps {
2037         struct be_cmd_req_hdr hdr;
2038         struct be_fat_conf_params set_params;
2039 };
2040
2041 #define RESOURCE_DESC_SIZE_V0                   72
2042 #define RESOURCE_DESC_SIZE_V1                   88
2043 #define PCIE_RESOURCE_DESC_TYPE_V0              0x40
2044 #define NIC_RESOURCE_DESC_TYPE_V0               0x41
2045 #define PCIE_RESOURCE_DESC_TYPE_V1              0x50
2046 #define NIC_RESOURCE_DESC_TYPE_V1               0x51
2047 #define PORT_RESOURCE_DESC_TYPE_V1              0x55
2048 #define MAX_RESOURCE_DESC                       264
2049
2050 #define IF_CAPS_FLAGS_VALID_SHIFT               0       /* IF caps valid */
2051 #define VFT_SHIFT                               3       /* VF template */
2052 #define IMM_SHIFT                               6       /* Immediate */
2053 #define NOSV_SHIFT                              7       /* No save */
2054
2055 struct be_res_desc_hdr {
2056         u8 desc_type;
2057         u8 desc_len;
2058 } __packed;
2059
2060 struct be_port_res_desc {
2061         struct be_res_desc_hdr hdr;
2062         u8 rsvd0;
2063         u8 flags;
2064         u8 link_num;
2065         u8 mc_type;
2066         u16 rsvd1;
2067
2068 #define NV_TYPE_MASK                            0x3     /* bits 0-1 */
2069 #define NV_TYPE_DISABLED                        1
2070 #define NV_TYPE_VXLAN                           3
2071 #define SOCVID_SHIFT                            2       /* Strip outer vlan */
2072 #define RCVID_SHIFT                             4       /* Report vlan */
2073         u8 nv_flags;
2074         u8 rsvd2;
2075         __le16 nv_port;                                 /* vxlan/gre port */
2076         u32 rsvd3[19];
2077 } __packed;
2078
2079 struct be_pcie_res_desc {
2080         struct be_res_desc_hdr hdr;
2081         u8 rsvd0;
2082         u8 flags;
2083         u16 rsvd1;
2084         u8 pf_num;
2085         u8 rsvd2;
2086         u32 rsvd3;
2087         u8 sriov_state;
2088         u8 pf_state;
2089         u8 pf_type;
2090         u8 rsvd4;
2091         u16 num_vfs;
2092         u16 rsvd5;
2093         u32 rsvd6[17];
2094 } __packed;
2095
2096 struct be_nic_res_desc {
2097         struct be_res_desc_hdr hdr;
2098         u8 rsvd1;
2099
2100 #define QUN_SHIFT                               4 /* QoS is in absolute units */
2101         u8 flags;
2102         u8 vf_num;
2103         u8 rsvd2;
2104         u8 pf_num;
2105         u8 rsvd3;
2106         u16 unicast_mac_count;
2107         u8 rsvd4[6];
2108         u16 mcc_count;
2109         u16 vlan_count;
2110         u16 mcast_mac_count;
2111         u16 txq_count;
2112         u16 rq_count;
2113         u16 rssq_count;
2114         u16 lro_count;
2115         u16 cq_count;
2116         u16 toe_conn_count;
2117         u16 eq_count;
2118         u16 vlan_id;
2119         u16 iface_count;
2120         u32 cap_flags;
2121         u8 link_param;
2122         u8 rsvd6;
2123         u16 channel_id_param;
2124         u32 bw_min;
2125         u32 bw_max;
2126         u8 acpi_params;
2127         u8 wol_param;
2128         u16 rsvd7;
2129         u16 tunnel_iface_count;
2130         u16 direct_tenant_iface_count;
2131         u32 rsvd8[6];
2132 } __packed;
2133
2134 /************ Multi-Channel type ***********/
2135 enum mc_type {
2136         MC_NONE = 0x01,
2137         UMC = 0x02,
2138         FLEX10 = 0x03,
2139         vNIC1 = 0x04,
2140         nPAR = 0x05,
2141         UFP = 0x06,
2142         vNIC2 = 0x07
2143 };
2144
2145 /* Is BE in a multi-channel mode */
2146 static inline bool be_is_mc(struct be_adapter *adapter)
2147 {
2148         return adapter->mc_type > MC_NONE;
2149 }
2150
2151 struct be_cmd_req_get_func_config {
2152         struct be_cmd_req_hdr hdr;
2153 };
2154
2155 struct be_cmd_resp_get_func_config {
2156         struct be_cmd_resp_hdr hdr;
2157         u32 desc_count;
2158         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2159 };
2160
2161 enum {
2162         RESOURCE_LIMITS,
2163         RESOURCE_MODIFIABLE
2164 };
2165
2166 struct be_cmd_req_get_profile_config {
2167         struct be_cmd_req_hdr hdr;
2168         u8 rsvd;
2169 #define ACTIVE_PROFILE_TYPE                     0x2
2170 #define QUERY_MODIFIABLE_FIELDS_TYPE            BIT(3)
2171         u8 type;
2172         u16 rsvd1;
2173 };
2174
2175 struct be_cmd_resp_get_profile_config {
2176         struct be_cmd_resp_hdr hdr;
2177         __le16 desc_count;
2178         u16 rsvd;
2179         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
2180 };
2181
2182 #define FIELD_MODIFIABLE                        0xFFFF
2183 struct be_cmd_req_set_profile_config {
2184         struct be_cmd_req_hdr hdr;
2185         u32 rsvd;
2186         u32 desc_count;
2187         u8 desc[2 * RESOURCE_DESC_SIZE_V1];
2188 } __packed;
2189
2190 struct be_cmd_req_get_active_profile {
2191         struct be_cmd_req_hdr hdr;
2192         u32 rsvd;
2193 } __packed;
2194
2195 struct be_cmd_resp_get_active_profile {
2196         struct be_cmd_resp_hdr hdr;
2197         u16 active_profile_id;
2198         u16 next_profile_id;
2199 } __packed;
2200
2201 struct be_cmd_enable_disable_vf {
2202         struct be_cmd_req_hdr hdr;
2203         u8 enable;
2204         u8 rsvd[3];
2205 };
2206
2207 struct be_cmd_req_intr_set {
2208         struct be_cmd_req_hdr hdr;
2209         u8 intr_enabled;
2210         u8 rsvd[3];
2211 };
2212
2213 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
2214 {
2215         return flags & adapter->cmd_privileges ? true : false;
2216 }
2217
2218 /************** Get IFACE LIST *******************/
2219 struct be_if_desc {
2220         u32 if_id;
2221         u32 cap_flags;
2222         u32 en_flags;
2223 };
2224
2225 struct be_cmd_req_get_iface_list {
2226         struct be_cmd_req_hdr hdr;
2227 };
2228
2229 struct be_cmd_resp_get_iface_list {
2230         struct be_cmd_req_hdr hdr;
2231         u32 if_cnt;
2232         struct be_if_desc if_desc;
2233 };
2234
2235 /*************** Set logical link ********************/
2236 #define PLINK_TRACK_SHIFT       8
2237 struct be_cmd_req_set_ll_link {
2238         struct be_cmd_req_hdr hdr;
2239         u32 link_config; /* Bit 0: UP_DOWN, Bit 9: PLINK */
2240 };
2241
2242 /************** Manage IFACE Filters *******************/
2243 #define OP_CONVERT_NORMAL_TO_TUNNEL             0
2244 #define OP_CONVERT_TUNNEL_TO_NORMAL             1
2245
2246 struct be_cmd_req_manage_iface_filters {
2247         struct be_cmd_req_hdr hdr;
2248         u8  op;
2249         u8  rsvd0;
2250         u8  flags;
2251         u8  rsvd1;
2252         u32 tunnel_iface_id;
2253         u32 target_iface_id;
2254         u8  mac[6];
2255         u16 vlan_tag;
2256         u32 tenant_id;
2257         u32 filter_id;
2258         u32 cap_flags;
2259         u32 cap_control_flags;
2260 } __packed;
2261
2262 int be_pci_fnum_get(struct be_adapter *adapter);
2263 int be_fw_wait_ready(struct be_adapter *adapter);
2264 int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
2265                           bool permanent, u32 if_handle, u32 pmac_id);
2266 int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id,
2267                     u32 *pmac_id, u32 domain);
2268 int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id,
2269                     u32 domain);
2270 int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
2271                      u32 *if_handle, u32 domain);
2272 int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain);
2273 int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo);
2274 int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
2275                      struct be_queue_info *eq, bool no_delay,
2276                      int num_cqe_dma_coalesce);
2277 int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq,
2278                        struct be_queue_info *cq);
2279 int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo);
2280 int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq,
2281                       u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
2282 int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
2283                      int type);
2284 int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q);
2285 int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
2286                              u8 *link_status, u32 dom);
2287 int be_cmd_reset(struct be_adapter *adapter);
2288 int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd);
2289 int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
2290                                struct be_dma_mem *nonemb_cmd);
2291 int be_cmd_get_fw_ver(struct be_adapter *adapter);
2292 int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num);
2293 int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
2294                        u32 num, u32 domain);
2295 int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
2296 int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc);
2297 int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc);
2298 int be_cmd_query_fw_cfg(struct be_adapter *adapter);
2299 int be_cmd_reset_function(struct be_adapter *adapter);
2300 int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2301                       u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey);
2302 int be_process_mcc(struct be_adapter *adapter);
2303 int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon,
2304                             u8 status, u8 state);
2305 int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num,
2306                             u32 *state);
2307 int be_cmd_read_port_transceiver_data(struct be_adapter *adapter,
2308                                       u8 page_num, u8 *data);
2309 int be_cmd_query_cable_type(struct be_adapter *adapter);
2310 int be_cmd_query_sfp_info(struct be_adapter *adapter);
2311 int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2312                           u32 flash_oper, u32 flash_opcode, u32 img_offset,
2313                           u32 buf_size);
2314 int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2315                             u32 data_size, u32 data_offset,
2316                             const char *obj_name, u32 *data_written,
2317                             u8 *change_status, u8 *addn_status);
2318 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2319                            u32 data_size, u32 data_offset, const char *obj_name,
2320                            u32 *data_read, u32 *eof, u8 *addn_status);
2321 int lancer_cmd_delete_object(struct be_adapter *adapter, const char *obj_name);
2322 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
2323                          u16 img_optype, u32 img_offset, u32 crc_offset);
2324 int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2325                             struct be_dma_mem *nonemb_cmd);
2326 int be_cmd_fw_init(struct be_adapter *adapter);
2327 int be_cmd_fw_clean(struct be_adapter *adapter);
2328 void be_async_mcc_enable(struct be_adapter *adapter);
2329 void be_async_mcc_disable(struct be_adapter *adapter);
2330 int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2331                          u32 loopback_type, u32 pkt_size, u32 num_pkts,
2332                          u64 pattern);
2333 int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt,
2334                         struct be_dma_mem *cmd);
2335 int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2336                             struct be_dma_mem *nonemb_cmd);
2337 int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2338                         u8 loopback_type, u8 enable);
2339 int be_cmd_get_phy_info(struct be_adapter *adapter);
2340 int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate,
2341                       u16 link_speed, u8 domain);
2342 void be_detect_error(struct be_adapter *adapter);
2343 int be_cmd_get_die_temperature(struct be_adapter *adapter);
2344 int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
2345 int be_cmd_req_native_mode(struct be_adapter *adapter);
2346 int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
2347 int be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
2348 int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
2349                              u32 domain);
2350 int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
2351                              u32 vf_num);
2352 int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2353                              bool *pmac_id_active, u32 *pmac_id,
2354                              u32 if_handle, u8 domain);
2355 int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac,
2356                           u32 if_handle, bool active, u32 domain);
2357 int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac);
2358 int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count,
2359                         u32 domain);
2360 int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom);
2361 int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain,
2362                           u16 intf_id, u16 hsw_mode, u8 spoofchk);
2363 int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain,
2364                           u16 intf_id, u8 *mode, bool *spoofchk);
2365 int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
2366 int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level);
2367 int be_cmd_get_fw_log_level(struct be_adapter *adapter);
2368 int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
2369                                    struct be_dma_mem *cmd);
2370 int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
2371                                    struct be_dma_mem *cmd,
2372                                    struct be_fat_conf_params *cfgs);
2373 int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
2374 int lancer_initiate_dump(struct be_adapter *adapter);
2375 int lancer_delete_dump(struct be_adapter *adapter);
2376 bool dump_present(struct be_adapter *adapter);
2377 int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
2378 int be_cmd_query_port_name(struct be_adapter *adapter);
2379 int be_cmd_get_func_config(struct be_adapter *adapter,
2380                            struct be_resources *res);
2381 int be_cmd_get_profile_config(struct be_adapter *adapter,
2382                               struct be_resources *res, u8 query, u8 domain);
2383 int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile);
2384 int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
2385                      int vf_num);
2386 int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
2387 int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);
2388 int be_cmd_set_logical_link_config(struct be_adapter *adapter,
2389                                           int link_state, u8 domain);
2390 int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port);
2391 int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op);
2392 int be_cmd_set_sriov_config(struct be_adapter *adapter,
2393                             struct be_resources res, u16 num_vfs,
2394                             u16 num_vf_qs);