drivers/net/ethernet/emulex/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2014 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@emulex.com
  12  *
  13  * Emulex
  14  * 3333 Susan Street
  15  * Costa Mesa, CA 92626
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum mcc_base_status {
  54         MCC_STATUS_SUCCESS = 0,
  55         MCC_STATUS_FAILED = 1,
  56         MCC_STATUS_ILLEGAL_REQUEST = 2,
  57         MCC_STATUS_ILLEGAL_FIELD = 3,
  58         MCC_STATUS_INSUFFICIENT_BUFFER = 4,
  59         MCC_STATUS_UNAUTHORIZED_REQUEST = 5,
  60         MCC_STATUS_NOT_SUPPORTED = 66
  61 };
  62
  63 /* Additional status */
  64 enum mcc_addl_status {
  65         MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES = 0x16,
  66         MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH = 0x4d,
  67         MCC_ADDL_STATUS_TOO_MANY_INTERFACES = 0x4a
  68 };
  69
  70 #define CQE_BASE_STATUS_MASK            0xFFFF
  71 #define CQE_BASE_STATUS_SHIFT           0       /* bits 0 - 15 */
  72 #define CQE_ADDL_STATUS_MASK            0xFF
  73 #define CQE_ADDL_STATUS_SHIFT           16      /* bits 16 - 31 */
  74
  75 #define base_status(status)             \
  76                 ((enum mcc_base_status) \
  77                         (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0))
  78 #define addl_status(status)             \
  79                 ((enum mcc_addl_status) \
  80                         (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \
  81                                         CQE_ADDL_STATUS_MASK : 0))
  82
  83 struct be_mcc_compl {
  84         u32 status;             /* dword 0 */
  85         u32 tag0;               /* dword 1 */
  86         u32 tag1;               /* dword 2 */
  87         u32 flags;              /* dword 3 */
  88 };
  89
  90 /* When the async bit of mcc_compl flags is set, flags
  91  * is interpreted as follows:
  92  */
  93 #define ASYNC_EVENT_CODE_SHIFT          8       /* bits 8 - 15 */
  94 #define ASYNC_EVENT_CODE_MASK           0xFF
  95 #define ASYNC_EVENT_TYPE_SHIFT          16
  96 #define ASYNC_EVENT_TYPE_MASK           0xFF
  97 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  98 #define ASYNC_EVENT_CODE_GRP_5          0x5
  99 #define ASYNC_EVENT_QOS_SPEED           0x1
 100 #define ASYNC_EVENT_COS_PRIORITY        0x2
 101 #define ASYNC_EVENT_PVID_STATE          0x3
 102 #define ASYNC_EVENT_CODE_QNQ            0x6
 103 #define ASYNC_DEBUG_EVENT_TYPE_QNQ      1
 104
 105 enum {
 106         LINK_DOWN       = 0x0,
 107         LINK_UP         = 0x1
 108 };
 109 #define LINK_STATUS_MASK                        0x1
 110 #define LOGICAL_LINK_STATUS_MASK                0x2
 111
 112 /* When the event code of compl->flags is link-state, the mcc_compl
 113  * must be interpreted as follows
 114  */
 115 struct be_async_event_link_state {
 116         u8 physical_port;
 117         u8 port_link_status;
 118         u8 port_duplex;
 119         u8 port_speed;
 120         u8 port_fault;
 121         u8 rsvd0[7];
 122         u32 flags;
 123 } __packed;
 124
 125 /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED
 126  * the mcc_compl must be interpreted as follows
 127  */
 128 struct be_async_event_grp5_qos_link_speed {
 129         u8 physical_port;
 130         u8 rsvd[5];
 131         u16 qos_link_speed;
 132         u32 event_tag;
 133         u32 flags;
 134 } __packed;
 135
 136 /* When the event code of compl->flags is GRP5 and event type is
 137  * CoS-Priority, the mcc_compl must be interpreted as follows
 138  */
 139 struct be_async_event_grp5_cos_priority {
 140         u8 physical_port;
 141         u8 available_priority_bmap;
 142         u8 reco_default_priority;
 143         u8 valid;
 144         u8 rsvd0;
 145         u8 event_tag;
 146         u32 flags;
 147 } __packed;
 148
 149 /* When the event code of compl->flags is GRP5 and event type is
 150  * PVID state, the mcc_compl must be interpreted as follows
 151  */
 152 struct be_async_event_grp5_pvid_state {
 153         u8 enabled;
 154         u8 rsvd0;
 155         u16 tag;
 156         u32 event_tag;
 157         u32 rsvd1;
 158         u32 flags;
 159 } __packed;
 160
 161 /* async event indicating outer VLAN tag in QnQ */
 162 struct be_async_event_qnq {
 163         u8 valid;       /* Indicates if outer VLAN is valid */
 164         u8 rsvd0;
 165         u16 vlan_tag;
 166         u32 event_tag;
 167         u8 rsvd1[4];
 168         u32 flags;
 169 } __packed;
 170
 171 struct be_mcc_mailbox {
 172         struct be_mcc_wrb wrb;
 173         struct be_mcc_compl compl;
 174 };
 175
 176 #define CMD_SUBSYSTEM_COMMON    0x1
 177 #define CMD_SUBSYSTEM_ETH       0x3
 178 #define CMD_SUBSYSTEM_LOWLEVEL  0xb
 179
 180 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 181 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 182 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 183 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 184 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 185 #define OPCODE_COMMON_READ_FLASHROM                     6
 186 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 187 #define OPCODE_COMMON_CQ_CREATE                         12
 188 #define OPCODE_COMMON_EQ_CREATE                         13
 189 #define OPCODE_COMMON_MCC_CREATE                        21
 190 #define OPCODE_COMMON_SET_QOS                           28
 191 #define OPCODE_COMMON_MCC_CREATE_EXT                    90
 192 #define OPCODE_COMMON_SEEPROM_READ                      30
 193 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES               32
 194 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 195 #define OPCODE_COMMON_GET_FW_VERSION                    35
 196 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 197 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 198 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 199 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 200 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 201 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 202 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 203 #define OPCODE_COMMON_MCC_DESTROY                       53
 204 #define OPCODE_COMMON_CQ_DESTROY                        54
 205 #define OPCODE_COMMON_EQ_DESTROY                        55
 206 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 207 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 208 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 209 #define OPCODE_COMMON_FUNCTION_RESET                    61
 210 #define OPCODE_COMMON_MANAGE_FAT                        68
 211 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 212 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 213 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 214 #define OPCODE_COMMON_GET_PORT_NAME                     77
 215 #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG           80
 216 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE              89
 217 #define OPCODE_COMMON_SET_FN_PRIVILEGES                 100
 218 #define OPCODE_COMMON_GET_PHY_DETAILS                   102
 219 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP           103
 220 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES    121
 221 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES           125
 222 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES           126
 223 #define OPCODE_COMMON_GET_MAC_LIST                      147
 224 #define OPCODE_COMMON_SET_MAC_LIST                      148
 225 #define OPCODE_COMMON_GET_HSW_CONFIG                    152
 226 #define OPCODE_COMMON_GET_FUNC_CONFIG                   160
 227 #define OPCODE_COMMON_GET_PROFILE_CONFIG                164
 228 #define OPCODE_COMMON_SET_PROFILE_CONFIG                165
 229 #define OPCODE_COMMON_GET_ACTIVE_PROFILE                167
 230 #define OPCODE_COMMON_SET_HSW_CONFIG                    153
 231 #define OPCODE_COMMON_GET_FN_PRIVILEGES                 170
 232 #define OPCODE_COMMON_READ_OBJECT                       171
 233 #define OPCODE_COMMON_WRITE_OBJECT                      172
 234 #define OPCODE_COMMON_DELETE_OBJECT                     174
 235 #define OPCODE_COMMON_MANAGE_IFACE_FILTERS              193
 236 #define OPCODE_COMMON_GET_IFACE_LIST                    194
 237 #define OPCODE_COMMON_ENABLE_DISABLE_VF                 196
 238
 239 #define OPCODE_ETH_RSS_CONFIG                           1
 240 #define OPCODE_ETH_ACPI_CONFIG                          2
 241 #define OPCODE_ETH_PROMISCUOUS                          3
 242 #define OPCODE_ETH_GET_STATISTICS                       4
 243 #define OPCODE_ETH_TX_CREATE                            7
 244 #define OPCODE_ETH_RX_CREATE                            8
 245 #define OPCODE_ETH_TX_DESTROY                           9
 246 #define OPCODE_ETH_RX_DESTROY                           10
 247 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG                12
 248 #define OPCODE_ETH_GET_PPORT_STATS                      18
 249
 250 #define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 251 #define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
 252 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE               19
 253
 254 struct be_cmd_req_hdr {
 255         u8 opcode;              /* dword 0 */
 256         u8 subsystem;           /* dword 0 */
 257         u8 port_number;         /* dword 0 */
 258         u8 domain;              /* dword 0 */
 259         u32 timeout;            /* dword 1 */
 260         u32 request_length;     /* dword 2 */
 261         u8 version;             /* dword 3 */
 262         u8 rsvd[3];             /* dword 3 */
 263 };
 264
 265 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 266 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 267 struct be_cmd_resp_hdr {
 268         u8 opcode;              /* dword 0 */
 269         u8 subsystem;           /* dword 0 */
 270         u8 rsvd[2];             /* dword 0 */
 271         u8 base_status;         /* dword 1 */
 272         u8 addl_status;         /* dword 1 */
 273         u8 rsvd1[2];            /* dword 1 */
 274         u32 response_length;    /* dword 2 */
 275         u32 actual_resp_len;    /* dword 3 */
 276 };
 277
 278 struct phys_addr {
 279         u32 lo;
 280         u32 hi;
 281 };
 282
 283 /**************************
 284  * BE Command definitions *
 285  **************************/
 286
 287 /* Pseudo amap definition in which each bit of the actual structure is defined
 288  * as a byte: used to calculate offset/shift/mask of each field */
 289 struct amap_eq_context {
 290         u8 cidx[13];            /* dword 0*/
 291         u8 rsvd0[3];            /* dword 0*/
 292         u8 epidx[13];           /* dword 0*/
 293         u8 valid;               /* dword 0*/
 294         u8 rsvd1;               /* dword 0*/
 295         u8 size;                /* dword 0*/
 296         u8 pidx[13];            /* dword 1*/
 297         u8 rsvd2[3];            /* dword 1*/
 298         u8 pd[10];              /* dword 1*/
 299         u8 count[3];            /* dword 1*/
 300         u8 solevent;            /* dword 1*/
 301         u8 stalled;             /* dword 1*/
 302         u8 armed;               /* dword 1*/
 303         u8 rsvd3[4];            /* dword 2*/
 304         u8 func[8];             /* dword 2*/
 305         u8 rsvd4;               /* dword 2*/
 306         u8 delaymult[10];       /* dword 2*/
 307         u8 rsvd5[2];            /* dword 2*/
 308         u8 phase[2];            /* dword 2*/
 309         u8 nodelay;             /* dword 2*/
 310         u8 rsvd6[4];            /* dword 2*/
 311         u8 rsvd7[32];           /* dword 3*/
 312 } __packed;
 313
 314 struct be_cmd_req_eq_create {
 315         struct be_cmd_req_hdr hdr;
 316         u16 num_pages;          /* sword */
 317         u16 rsvd0;              /* sword */
 318         u8 context[sizeof(struct amap_eq_context) / 8];
 319         struct phys_addr pages[8];
 320 } __packed;
 321
 322 struct be_cmd_resp_eq_create {
 323         struct be_cmd_resp_hdr resp_hdr;
 324         u16 eq_id;              /* sword */
 325         u16 msix_idx;           /* available only in v2 */
 326 } __packed;
 327
 328 /******************** Mac query ***************************/
 329 enum {
 330         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 331         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 332         MAC_ADDRESS_TYPE_PD = 0x2,
 333         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 334 };
 335
 336 struct mac_addr {
 337         u16 size_of_struct;
 338         u8 addr[ETH_ALEN];
 339 } __packed;
 340
 341 struct be_cmd_req_mac_query {
 342         struct be_cmd_req_hdr hdr;
 343         u8 type;
 344         u8 permanent;
 345         u16 if_id;
 346         u32 pmac_id;
 347 } __packed;
 348
 349 struct be_cmd_resp_mac_query {
 350         struct be_cmd_resp_hdr hdr;
 351         struct mac_addr mac;
 352 };
 353
 354 /******************** PMac Add ***************************/
 355 struct be_cmd_req_pmac_add {
 356         struct be_cmd_req_hdr hdr;
 357         u32 if_id;
 358         u8 mac_address[ETH_ALEN];
 359         u8 rsvd0[2];
 360 } __packed;
 361
 362 struct be_cmd_resp_pmac_add {
 363         struct be_cmd_resp_hdr hdr;
 364         u32 pmac_id;
 365 };
 366
 367 /******************** PMac Del ***************************/
 368 struct be_cmd_req_pmac_del {
 369         struct be_cmd_req_hdr hdr;
 370         u32 if_id;
 371         u32 pmac_id;
 372 };
 373
 374 /******************** Create CQ ***************************/
 375 /* Pseudo amap definition in which each bit of the actual structure is defined
 376  * as a byte: used to calculate offset/shift/mask of each field */
 377 struct amap_cq_context_be {
 378         u8 cidx[11];            /* dword 0*/
 379         u8 rsvd0;               /* dword 0*/
 380         u8 coalescwm[2];        /* dword 0*/
 381         u8 nodelay;             /* dword 0*/
 382         u8 epidx[11];           /* dword 0*/
 383         u8 rsvd1;               /* dword 0*/
 384         u8 count[2];            /* dword 0*/
 385         u8 valid;               /* dword 0*/
 386         u8 solevent;            /* dword 0*/
 387         u8 eventable;           /* dword 0*/
 388         u8 pidx[11];            /* dword 1*/
 389         u8 rsvd2;               /* dword 1*/
 390         u8 pd[10];              /* dword 1*/
 391         u8 eqid[8];             /* dword 1*/
 392         u8 stalled;             /* dword 1*/
 393         u8 armed;               /* dword 1*/
 394         u8 rsvd3[4];            /* dword 2*/
 395         u8 func[8];             /* dword 2*/
 396         u8 rsvd4[20];           /* dword 2*/
 397         u8 rsvd5[32];           /* dword 3*/
 398 } __packed;
 399
 400 struct amap_cq_context_v2 {
 401         u8 rsvd0[12];           /* dword 0*/
 402         u8 coalescwm[2];        /* dword 0*/
 403         u8 nodelay;             /* dword 0*/
 404         u8 rsvd1[12];           /* dword 0*/
 405         u8 count[2];            /* dword 0*/
 406         u8 valid;               /* dword 0*/
 407         u8 rsvd2;               /* dword 0*/
 408         u8 eventable;           /* dword 0*/
 409         u8 eqid[16];            /* dword 1*/
 410         u8 rsvd3[15];           /* dword 1*/
 411         u8 armed;               /* dword 1*/
 412         u8 rsvd4[32];           /* dword 2*/
 413         u8 rsvd5[32];           /* dword 3*/
 414 } __packed;
 415
 416 struct be_cmd_req_cq_create {
 417         struct be_cmd_req_hdr hdr;
 418         u16 num_pages;
 419         u8 page_size;
 420         u8 rsvd0;
 421         u8 context[sizeof(struct amap_cq_context_be) / 8];
 422         struct phys_addr pages[8];
 423 } __packed;
 424
 425
 426 struct be_cmd_resp_cq_create {
 427         struct be_cmd_resp_hdr hdr;
 428         u16 cq_id;
 429         u16 rsvd0;
 430 } __packed;
 431
 432 struct be_cmd_req_get_fat {
 433         struct be_cmd_req_hdr hdr;
 434         u32 fat_operation;
 435         u32 read_log_offset;
 436         u32 read_log_length;
 437         u32 data_buffer_size;
 438         u32 data_buffer[1];
 439 } __packed;
 440
 441 struct be_cmd_resp_get_fat {
 442         struct be_cmd_resp_hdr hdr;
 443         u32 log_size;
 444         u32 read_log_length;
 445         u32 rsvd[2];
 446         u32 data_buffer[1];
 447 } __packed;
 448
 449
 450 /******************** Create MCCQ ***************************/
 451 /* Pseudo amap definition in which each bit of the actual structure is defined
 452  * as a byte: used to calculate offset/shift/mask of each field */
 453 struct amap_mcc_context_be {
 454         u8 con_index[14];
 455         u8 rsvd0[2];
 456         u8 ring_size[4];
 457         u8 fetch_wrb;
 458         u8 fetch_r2t;
 459         u8 cq_id[10];
 460         u8 prod_index[14];
 461         u8 fid[8];
 462         u8 pdid[9];
 463         u8 valid;
 464         u8 rsvd1[32];
 465         u8 rsvd2[32];
 466 } __packed;
 467
 468 struct amap_mcc_context_v1 {
 469         u8 async_cq_id[16];
 470         u8 ring_size[4];
 471         u8 rsvd0[12];
 472         u8 rsvd1[31];
 473         u8 valid;
 474         u8 async_cq_valid[1];
 475         u8 rsvd2[31];
 476         u8 rsvd3[32];
 477 } __packed;
 478
 479 struct be_cmd_req_mcc_create {
 480         struct be_cmd_req_hdr hdr;
 481         u16 num_pages;
 482         u16 cq_id;
 483         u8 context[sizeof(struct amap_mcc_context_be) / 8];
 484         struct phys_addr pages[8];
 485 } __packed;
 486
 487 struct be_cmd_req_mcc_ext_create {
 488         struct be_cmd_req_hdr hdr;
 489         u16 num_pages;
 490         u16 cq_id;
 491         u32 async_event_bitmap[1];
 492         u8 context[sizeof(struct amap_mcc_context_v1) / 8];
 493         struct phys_addr pages[8];
 494 } __packed;
 495
 496 struct be_cmd_resp_mcc_create {
 497         struct be_cmd_resp_hdr hdr;
 498         u16 id;
 499         u16 rsvd0;
 500 } __packed;
 501
 502 /******************** Create TxQ ***************************/
 503 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 504 #define BE_ULP1_NUM                             1
 505
 506 struct be_cmd_req_eth_tx_create {
 507         struct be_cmd_req_hdr hdr;
 508         u8 num_pages;
 509         u8 ulp_num;
 510         u16 type;
 511         u16 if_id;
 512         u8 queue_size;
 513         u8 rsvd0;
 514         u32 rsvd1;
 515         u16 cq_id;
 516         u16 rsvd2;
 517         u32 rsvd3[13];
 518         struct phys_addr pages[8];
 519 } __packed;
 520
 521 struct be_cmd_resp_eth_tx_create {
 522         struct be_cmd_resp_hdr hdr;
 523         u16 cid;
 524         u16 rid;
 525         u32 db_offset;
 526         u32 rsvd0[4];
 527 } __packed;
 528
 529 /******************** Create RxQ ***************************/
 530 struct be_cmd_req_eth_rx_create {
 531         struct be_cmd_req_hdr hdr;
 532         u16 cq_id;
 533         u8 frag_size;
 534         u8 num_pages;
 535         struct phys_addr pages[2];
 536         u32 interface_id;
 537         u16 max_frame_size;
 538         u16 rsvd0;
 539         u32 rss_queue;
 540 } __packed;
 541
 542 struct be_cmd_resp_eth_rx_create {
 543         struct be_cmd_resp_hdr hdr;
 544         u16 id;
 545         u8 rss_id;
 546         u8 rsvd0;
 547 } __packed;
 548
 549 /******************** Q Destroy  ***************************/
 550 /* Type of Queue to be destroyed */
 551 enum {
 552         QTYPE_EQ = 1,
 553         QTYPE_CQ,
 554         QTYPE_TXQ,
 555         QTYPE_RXQ,
 556         QTYPE_MCCQ
 557 };
 558
 559 struct be_cmd_req_q_destroy {
 560         struct be_cmd_req_hdr hdr;
 561         u16 id;
 562         u16 bypass_flush;       /* valid only for rx q destroy */
 563 } __packed;
 564
 565 /************ I/f Create (it's actually I/f Config Create)**********/
 566
 567 /* Capability flags for the i/f */
 568 enum be_if_flags {
 569         BE_IF_FLAGS_RSS = 0x4,
 570         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 571         BE_IF_FLAGS_BROADCAST = 0x10,
 572         BE_IF_FLAGS_UNTAGGED = 0x20,
 573         BE_IF_FLAGS_ULP = 0x40,
 574         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 575         BE_IF_FLAGS_VLAN = 0x100,
 576         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 577         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 578         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800,
 579         BE_IF_FLAGS_MULTICAST = 0x1000
 580 };
 581
 582 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
 583                          BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 584                          BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
 585                          BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
 586                          BE_IF_FLAGS_UNTAGGED)
 587
 588 /* An RX interface is an object with one or more MAC addresses and
 589  * filtering capabilities. */
 590 struct be_cmd_req_if_create {
 591         struct be_cmd_req_hdr hdr;
 592         u32 version;            /* ignore currently */
 593         u32 capability_flags;
 594         u32 enable_flags;
 595         u8 mac_addr[ETH_ALEN];
 596         u8 rsvd0;
 597         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 598         u32 vlan_tag;    /* not used currently */
 599 } __packed;
 600
 601 struct be_cmd_resp_if_create {
 602         struct be_cmd_resp_hdr hdr;
 603         u32 interface_id;
 604         u32 pmac_id;
 605 };
 606
 607 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 608 struct be_cmd_req_if_destroy {
 609         struct be_cmd_req_hdr hdr;
 610         u32 interface_id;
 611 };
 612
 613 /*************** HW Stats Get **********************************/
 614 struct be_port_rxf_stats_v0 {
 615         u32 rx_bytes_lsd;       /* dword 0*/
 616         u32 rx_bytes_msd;       /* dword 1*/
 617         u32 rx_total_frames;    /* dword 2*/
 618         u32 rx_unicast_frames;  /* dword 3*/
 619         u32 rx_multicast_frames;        /* dword 4*/
 620         u32 rx_broadcast_frames;        /* dword 5*/
 621         u32 rx_crc_errors;      /* dword 6*/
 622         u32 rx_alignment_symbol_errors; /* dword 7*/
 623         u32 rx_pause_frames;    /* dword 8*/
 624         u32 rx_control_frames;  /* dword 9*/
 625         u32 rx_in_range_errors; /* dword 10*/
 626         u32 rx_out_range_errors;        /* dword 11*/
 627         u32 rx_frame_too_long;  /* dword 12*/
 628         u32 rx_address_filtered;        /* dword 13*/
 629         u32 rx_vlan_filtered;   /* dword 14*/
 630         u32 rx_dropped_too_small;       /* dword 15*/
 631         u32 rx_dropped_too_short;       /* dword 16*/
 632         u32 rx_dropped_header_too_small;        /* dword 17*/
 633         u32 rx_dropped_tcp_length;      /* dword 18*/
 634         u32 rx_dropped_runt;    /* dword 19*/
 635         u32 rx_64_byte_packets; /* dword 20*/
 636         u32 rx_65_127_byte_packets;     /* dword 21*/
 637         u32 rx_128_256_byte_packets;    /* dword 22*/
 638         u32 rx_256_511_byte_packets;    /* dword 23*/
 639         u32 rx_512_1023_byte_packets;   /* dword 24*/
 640         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 641         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 642         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 643         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 644         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 645         u32 rx_ip_checksum_errs;        /* dword 30*/
 646         u32 rx_tcp_checksum_errs;       /* dword 31*/
 647         u32 rx_udp_checksum_errs;       /* dword 32*/
 648         u32 rx_non_rss_packets; /* dword 33*/
 649         u32 rx_ipv4_packets;    /* dword 34*/
 650         u32 rx_ipv6_packets;    /* dword 35*/
 651         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 652         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 653         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 654         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 655         u32 rx_chute1_packets;  /* dword 40*/
 656         u32 rx_chute2_packets;  /* dword 41*/
 657         u32 rx_chute3_packets;  /* dword 42*/
 658         u32 rx_management_packets;      /* dword 43*/
 659         u32 rx_switched_unicast_packets;        /* dword 44*/
 660         u32 rx_switched_multicast_packets;      /* dword 45*/
 661         u32 rx_switched_broadcast_packets;      /* dword 46*/
 662         u32 tx_bytes_lsd;       /* dword 47*/
 663         u32 tx_bytes_msd;       /* dword 48*/
 664         u32 tx_unicastframes;   /* dword 49*/
 665         u32 tx_multicastframes; /* dword 50*/
 666         u32 tx_broadcastframes; /* dword 51*/
 667         u32 tx_pauseframes;     /* dword 52*/
 668         u32 tx_controlframes;   /* dword 53*/
 669         u32 tx_64_byte_packets; /* dword 54*/
 670         u32 tx_65_127_byte_packets;     /* dword 55*/
 671         u32 tx_128_256_byte_packets;    /* dword 56*/
 672         u32 tx_256_511_byte_packets;    /* dword 57*/
 673         u32 tx_512_1023_byte_packets;   /* dword 58*/
 674         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 675         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 676         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 677         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 678         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 679         u32 rx_fifo_overflow;   /* dword 64*/
 680         u32 rx_input_fifo_overflow;     /* dword 65*/
 681 };
 682
 683 struct be_rxf_stats_v0 {
 684         struct be_port_rxf_stats_v0 port[2];
 685         u32 rx_drops_no_pbuf;   /* dword 132*/
 686         u32 rx_drops_no_txpb;   /* dword 133*/
 687         u32 rx_drops_no_erx_descr;      /* dword 134*/
 688         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 689         u32 management_rx_port_packets; /* dword 136*/
 690         u32 management_rx_port_bytes;   /* dword 137*/
 691         u32 management_rx_port_pause_frames;    /* dword 138*/
 692         u32 management_rx_port_errors;  /* dword 139*/
 693         u32 management_tx_port_packets; /* dword 140*/
 694         u32 management_tx_port_bytes;   /* dword 141*/
 695         u32 management_tx_port_pause;   /* dword 142*/
 696         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 697         u32 rx_drops_too_many_frags;    /* dword 144*/
 698         u32 rx_drops_invalid_ring;      /* dword 145*/
 699         u32 forwarded_packets;  /* dword 146*/
 700         u32 rx_drops_mtu;       /* dword 147*/
 701         u32 rsvd0[7];
 702         u32 port0_jabber_events;
 703         u32 port1_jabber_events;
 704         u32 rsvd1[6];
 705 };
 706
 707 struct be_erx_stats_v0 {
 708         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 709         u32 rsvd[4];
 710 };
 711
 712 struct be_pmem_stats {
 713         u32 eth_red_drops;
 714         u32 rsvd[5];
 715 };
 716
 717 struct be_hw_stats_v0 {
 718         struct be_rxf_stats_v0 rxf;
 719         u32 rsvd[48];
 720         struct be_erx_stats_v0 erx;
 721         struct be_pmem_stats pmem;
 722 };
 723
 724 struct be_cmd_req_get_stats_v0 {
 725         struct be_cmd_req_hdr hdr;
 726         u8 rsvd[sizeof(struct be_hw_stats_v0)];
 727 };
 728
 729 struct be_cmd_resp_get_stats_v0 {
 730         struct be_cmd_resp_hdr hdr;
 731         struct be_hw_stats_v0 hw_stats;
 732 };
 733
 734 struct lancer_pport_stats {
 735         u32 tx_packets_lo;
 736         u32 tx_packets_hi;
 737         u32 tx_unicast_packets_lo;
 738         u32 tx_unicast_packets_hi;
 739         u32 tx_multicast_packets_lo;
 740         u32 tx_multicast_packets_hi;
 741         u32 tx_broadcast_packets_lo;
 742         u32 tx_broadcast_packets_hi;
 743         u32 tx_bytes_lo;
 744         u32 tx_bytes_hi;
 745         u32 tx_unicast_bytes_lo;
 746         u32 tx_unicast_bytes_hi;
 747         u32 tx_multicast_bytes_lo;
 748         u32 tx_multicast_bytes_hi;
 749         u32 tx_broadcast_bytes_lo;
 750         u32 tx_broadcast_bytes_hi;
 751         u32 tx_discards_lo;
 752         u32 tx_discards_hi;
 753         u32 tx_errors_lo;
 754         u32 tx_errors_hi;
 755         u32 tx_pause_frames_lo;
 756         u32 tx_pause_frames_hi;
 757         u32 tx_pause_on_frames_lo;
 758         u32 tx_pause_on_frames_hi;
 759         u32 tx_pause_off_frames_lo;
 760         u32 tx_pause_off_frames_hi;
 761         u32 tx_internal_mac_errors_lo;
 762         u32 tx_internal_mac_errors_hi;
 763         u32 tx_control_frames_lo;
 764         u32 tx_control_frames_hi;
 765         u32 tx_packets_64_bytes_lo;
 766         u32 tx_packets_64_bytes_hi;
 767         u32 tx_packets_65_to_127_bytes_lo;
 768         u32 tx_packets_65_to_127_bytes_hi;
 769         u32 tx_packets_128_to_255_bytes_lo;
 770         u32 tx_packets_128_to_255_bytes_hi;
 771         u32 tx_packets_256_to_511_bytes_lo;
 772         u32 tx_packets_256_to_511_bytes_hi;
 773         u32 tx_packets_512_to_1023_bytes_lo;
 774         u32 tx_packets_512_to_1023_bytes_hi;
 775         u32 tx_packets_1024_to_1518_bytes_lo;
 776         u32 tx_packets_1024_to_1518_bytes_hi;
 777         u32 tx_packets_1519_to_2047_bytes_lo;
 778         u32 tx_packets_1519_to_2047_bytes_hi;
 779         u32 tx_packets_2048_to_4095_bytes_lo;
 780         u32 tx_packets_2048_to_4095_bytes_hi;
 781         u32 tx_packets_4096_to_8191_bytes_lo;
 782         u32 tx_packets_4096_to_8191_bytes_hi;
 783         u32 tx_packets_8192_to_9216_bytes_lo;
 784         u32 tx_packets_8192_to_9216_bytes_hi;
 785         u32 tx_lso_packets_lo;
 786         u32 tx_lso_packets_hi;
 787         u32 rx_packets_lo;
 788         u32 rx_packets_hi;
 789         u32 rx_unicast_packets_lo;
 790         u32 rx_unicast_packets_hi;
 791         u32 rx_multicast_packets_lo;
 792         u32 rx_multicast_packets_hi;
 793         u32 rx_broadcast_packets_lo;
 794         u32 rx_broadcast_packets_hi;
 795         u32 rx_bytes_lo;
 796         u32 rx_bytes_hi;
 797         u32 rx_unicast_bytes_lo;
 798         u32 rx_unicast_bytes_hi;
 799         u32 rx_multicast_bytes_lo;
 800         u32 rx_multicast_bytes_hi;
 801         u32 rx_broadcast_bytes_lo;
 802         u32 rx_broadcast_bytes_hi;
 803         u32 rx_unknown_protos;
 804         u32 rsvd_69; /* Word 69 is reserved */
 805         u32 rx_discards_lo;
 806         u32 rx_discards_hi;
 807         u32 rx_errors_lo;
 808         u32 rx_errors_hi;
 809         u32 rx_crc_errors_lo;
 810         u32 rx_crc_errors_hi;
 811         u32 rx_alignment_errors_lo;
 812         u32 rx_alignment_errors_hi;
 813         u32 rx_symbol_errors_lo;
 814         u32 rx_symbol_errors_hi;
 815         u32 rx_pause_frames_lo;
 816         u32 rx_pause_frames_hi;
 817         u32 rx_pause_on_frames_lo;
 818         u32 rx_pause_on_frames_hi;
 819         u32 rx_pause_off_frames_lo;
 820         u32 rx_pause_off_frames_hi;
 821         u32 rx_frames_too_long_lo;
 822         u32 rx_frames_too_long_hi;
 823         u32 rx_internal_mac_errors_lo;
 824         u32 rx_internal_mac_errors_hi;
 825         u32 rx_undersize_packets;
 826         u32 rx_oversize_packets;
 827         u32 rx_fragment_packets;
 828         u32 rx_jabbers;
 829         u32 rx_control_frames_lo;
 830         u32 rx_control_frames_hi;
 831         u32 rx_control_frames_unknown_opcode_lo;
 832         u32 rx_control_frames_unknown_opcode_hi;
 833         u32 rx_in_range_errors;
 834         u32 rx_out_of_range_errors;
 835         u32 rx_address_filtered;
 836         u32 rx_vlan_filtered;
 837         u32 rx_dropped_too_small;
 838         u32 rx_dropped_too_short;
 839         u32 rx_dropped_header_too_small;
 840         u32 rx_dropped_invalid_tcp_length;
 841         u32 rx_dropped_runt;
 842         u32 rx_ip_checksum_errors;
 843         u32 rx_tcp_checksum_errors;
 844         u32 rx_udp_checksum_errors;
 845         u32 rx_non_rss_packets;
 846         u32 rsvd_111;
 847         u32 rx_ipv4_packets_lo;
 848         u32 rx_ipv4_packets_hi;
 849         u32 rx_ipv6_packets_lo;
 850         u32 rx_ipv6_packets_hi;
 851         u32 rx_ipv4_bytes_lo;
 852         u32 rx_ipv4_bytes_hi;
 853         u32 rx_ipv6_bytes_lo;
 854         u32 rx_ipv6_bytes_hi;
 855         u32 rx_nic_packets_lo;
 856         u32 rx_nic_packets_hi;
 857         u32 rx_tcp_packets_lo;
 858         u32 rx_tcp_packets_hi;
 859         u32 rx_iscsi_packets_lo;
 860         u32 rx_iscsi_packets_hi;
 861         u32 rx_management_packets_lo;
 862         u32 rx_management_packets_hi;
 863         u32 rx_switched_unicast_packets_lo;
 864         u32 rx_switched_unicast_packets_hi;
 865         u32 rx_switched_multicast_packets_lo;
 866         u32 rx_switched_multicast_packets_hi;
 867         u32 rx_switched_broadcast_packets_lo;
 868         u32 rx_switched_broadcast_packets_hi;
 869         u32 num_forwards_lo;
 870         u32 num_forwards_hi;
 871         u32 rx_fifo_overflow;
 872         u32 rx_input_fifo_overflow;
 873         u32 rx_drops_too_many_frags_lo;
 874         u32 rx_drops_too_many_frags_hi;
 875         u32 rx_drops_invalid_queue;
 876         u32 rsvd_141;
 877         u32 rx_drops_mtu_lo;
 878         u32 rx_drops_mtu_hi;
 879         u32 rx_packets_64_bytes_lo;
 880         u32 rx_packets_64_bytes_hi;
 881         u32 rx_packets_65_to_127_bytes_lo;
 882         u32 rx_packets_65_to_127_bytes_hi;
 883         u32 rx_packets_128_to_255_bytes_lo;
 884         u32 rx_packets_128_to_255_bytes_hi;
 885         u32 rx_packets_256_to_511_bytes_lo;
 886         u32 rx_packets_256_to_511_bytes_hi;
 887         u32 rx_packets_512_to_1023_bytes_lo;
 888         u32 rx_packets_512_to_1023_bytes_hi;
 889         u32 rx_packets_1024_to_1518_bytes_lo;
 890         u32 rx_packets_1024_to_1518_bytes_hi;
 891         u32 rx_packets_1519_to_2047_bytes_lo;
 892         u32 rx_packets_1519_to_2047_bytes_hi;
 893         u32 rx_packets_2048_to_4095_bytes_lo;
 894         u32 rx_packets_2048_to_4095_bytes_hi;
 895         u32 rx_packets_4096_to_8191_bytes_lo;
 896         u32 rx_packets_4096_to_8191_bytes_hi;
 897         u32 rx_packets_8192_to_9216_bytes_lo;
 898         u32 rx_packets_8192_to_9216_bytes_hi;
 899 };
 900
 901 struct pport_stats_params {
 902         u16 pport_num;
 903         u8 rsvd;
 904         u8 reset_stats;
 905 };
 906
 907 struct lancer_cmd_req_pport_stats {
 908         struct be_cmd_req_hdr hdr;
 909         union {
 910                 struct pport_stats_params params;
 911                 u8 rsvd[sizeof(struct lancer_pport_stats)];
 912         } cmd_params;
 913 };
 914
 915 struct lancer_cmd_resp_pport_stats {
 916         struct be_cmd_resp_hdr hdr;
 917         struct lancer_pport_stats pport_stats;
 918 };
 919
 920 static inline struct lancer_pport_stats*
 921         pport_stats_from_cmd(struct be_adapter *adapter)
 922 {
 923         struct lancer_cmd_resp_pport_stats *cmd = adapter->stats_cmd.va;
 924         return &cmd->pport_stats;
 925 }
 926
 927 struct be_cmd_req_get_cntl_addnl_attribs {
 928         struct be_cmd_req_hdr hdr;
 929         u8 rsvd[8];
 930 };
 931
 932 struct be_cmd_resp_get_cntl_addnl_attribs {
 933         struct be_cmd_resp_hdr hdr;
 934         u16 ipl_file_number;
 935         u8 ipl_file_version;
 936         u8 rsvd0;
 937         u8 on_die_temperature; /* in degrees centigrade*/
 938         u8 rsvd1[3];
 939 };
 940
 941 struct be_cmd_req_vlan_config {
 942         struct be_cmd_req_hdr hdr;
 943         u8 interface_id;
 944         u8 promiscuous;
 945         u8 untagged;
 946         u8 num_vlan;
 947         u16 normal_vlan[64];
 948 } __packed;
 949
 950 /******************* RX FILTER ******************************/
 951 #define BE_MAX_MC               64 /* set mcast promisc if > 64 */
 952 struct macaddr {
 953         u8 byte[ETH_ALEN];
 954 };
 955
 956 struct be_cmd_req_rx_filter {
 957         struct be_cmd_req_hdr hdr;
 958         u32 global_flags_mask;
 959         u32 global_flags;
 960         u32 if_flags_mask;
 961         u32 if_flags;
 962         u32 if_id;
 963         u32 mcast_num;
 964         struct macaddr mcast_mac[BE_MAX_MC];
 965 };
 966
 967 /******************** Link Status Query *******************/
 968 struct be_cmd_req_link_status {
 969         struct be_cmd_req_hdr hdr;
 970         u32 rsvd;
 971 };
 972
 973 enum {
 974         PHY_LINK_DUPLEX_NONE = 0x0,
 975         PHY_LINK_DUPLEX_HALF = 0x1,
 976         PHY_LINK_DUPLEX_FULL = 0x2
 977 };
 978
 979 enum {
 980         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 981         PHY_LINK_SPEED_10MBPS = 0x1,
 982         PHY_LINK_SPEED_100MBPS = 0x2,
 983         PHY_LINK_SPEED_1GBPS = 0x3,
 984         PHY_LINK_SPEED_10GBPS = 0x4,
 985         PHY_LINK_SPEED_20GBPS = 0x5,
 986         PHY_LINK_SPEED_25GBPS = 0x6,
 987         PHY_LINK_SPEED_40GBPS = 0x7
 988 };
 989
 990 struct be_cmd_resp_link_status {
 991         struct be_cmd_resp_hdr hdr;
 992         u8 physical_port;
 993         u8 mac_duplex;
 994         u8 mac_speed;
 995         u8 mac_fault;
 996         u8 mgmt_mac_duplex;
 997         u8 mgmt_mac_speed;
 998         u16 link_speed;
 999         u8 logical_link_status;
1000         u8 rsvd1[3];
1001 } __packed;
1002
1003 /******************** Port Identification ***************************/
1004 /*    Identifies the type of port attached to NIC     */
1005 struct be_cmd_req_port_type {
1006         struct be_cmd_req_hdr hdr;
1007         u32 page_num;
1008         u32 port;
1009 };
1010
1011 enum {
1012         TR_PAGE_A0 = 0xa0,
1013         TR_PAGE_A2 = 0xa2
1014 };
1015
1016 struct be_cmd_resp_port_type {
1017         struct be_cmd_resp_hdr hdr;
1018         u32 page_num;
1019         u32 port;
1020         struct data {
1021                 u8 identifier;
1022                 u8 identifier_ext;
1023                 u8 connector;
1024                 u8 transceiver[8];
1025                 u8 rsvd0[3];
1026                 u8 length_km;
1027                 u8 length_hm;
1028                 u8 length_om1;
1029                 u8 length_om2;
1030                 u8 length_cu;
1031                 u8 length_cu_m;
1032                 u8 vendor_name[16];
1033                 u8 rsvd;
1034                 u8 vendor_oui[3];
1035                 u8 vendor_pn[16];
1036                 u8 vendor_rev[4];
1037         } data;
1038 };
1039
1040 /******************** Get FW Version *******************/
1041 struct be_cmd_req_get_fw_version {
1042         struct be_cmd_req_hdr hdr;
1043         u8 rsvd0[FW_VER_LEN];
1044         u8 rsvd1[FW_VER_LEN];
1045 } __packed;
1046
1047 struct be_cmd_resp_get_fw_version {
1048         struct be_cmd_resp_hdr hdr;
1049         u8 firmware_version_string[FW_VER_LEN];
1050         u8 fw_on_flash_version_string[FW_VER_LEN];
1051 } __packed;
1052
1053 /******************** Set Flow Contrl *******************/
1054 struct be_cmd_req_set_flow_control {
1055         struct be_cmd_req_hdr hdr;
1056         u16 tx_flow_control;
1057         u16 rx_flow_control;
1058 } __packed;
1059
1060 /******************** Get Flow Contrl *******************/
1061 struct be_cmd_req_get_flow_control {
1062         struct be_cmd_req_hdr hdr;
1063         u32 rsvd;
1064 };
1065
1066 struct be_cmd_resp_get_flow_control {
1067         struct be_cmd_resp_hdr hdr;
1068         u16 tx_flow_control;
1069         u16 rx_flow_control;
1070 } __packed;
1071
1072 /******************** Modify EQ Delay *******************/
1073 struct be_set_eqd {
1074         u32 eq_id;
1075         u32 phase;
1076         u32 delay_multiplier;
1077 };
1078
1079 struct be_cmd_req_modify_eq_delay {
1080         struct be_cmd_req_hdr hdr;
1081         u32 num_eq;
1082         struct be_set_eqd set_eqd[MAX_EVT_QS];
1083 } __packed;
1084
1085 /******************** Get FW Config *******************/
1086 /* The HW can come up in either of the following multi-channel modes
1087  * based on the skew/IPL.
1088  */
1089 #define RDMA_ENABLED                            0x4
1090 #define QNQ_MODE                                0x400
1091 #define VNIC_MODE                               0x20000
1092 #define UMC_ENABLED                             0x1000000
1093 struct be_cmd_req_query_fw_cfg {
1094         struct be_cmd_req_hdr hdr;
1095         u32 rsvd[31];
1096 };
1097
1098 struct be_cmd_resp_query_fw_cfg {
1099         struct be_cmd_resp_hdr hdr;
1100         u32 be_config_number;
1101         u32 asic_revision;
1102         u32 phys_port;
1103         u32 function_mode;
1104         u32 rsvd[26];
1105         u32 function_caps;
1106 };
1107
1108 /******************** RSS Config ****************************************/
1109 /* RSS type             Input parameters used to compute RX hash
1110  * RSS_ENABLE_IPV4      SRC IPv4, DST IPv4
1111  * RSS_ENABLE_TCP_IPV4  SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1112  * RSS_ENABLE_IPV6      SRC IPv6, DST IPv6
1113  * RSS_ENABLE_TCP_IPV6  SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1114  * RSS_ENABLE_UDP_IPV4  SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1115  * RSS_ENABLE_UDP_IPV6  SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1116  *
1117  * When multiple RSS types are enabled, HW picks the best hash policy
1118  * based on the type of the received packet.
1119  */
1120 #define RSS_ENABLE_NONE                         0x0
1121 #define RSS_ENABLE_IPV4                         0x1
1122 #define RSS_ENABLE_TCP_IPV4                     0x2
1123 #define RSS_ENABLE_IPV6                         0x4
1124 #define RSS_ENABLE_TCP_IPV6                     0x8
1125 #define RSS_ENABLE_UDP_IPV4                     0x10
1126 #define RSS_ENABLE_UDP_IPV6                     0x20
1127
1128 #define L3_RSS_FLAGS                            (RXH_IP_DST | RXH_IP_SRC)
1129 #define L4_RSS_FLAGS                            (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1130
1131 struct be_cmd_req_rss_config {
1132         struct be_cmd_req_hdr hdr;
1133         u32 if_id;
1134         u16 enable_rss;
1135         u16 cpu_table_size_log2;
1136         u32 hash[10];
1137         u8 cpu_table[128];
1138         u8 flush;
1139         u8 rsvd0[3];
1140 };
1141
1142 /******************** Port Beacon ***************************/
1143
1144 #define BEACON_STATE_ENABLED            0x1
1145 #define BEACON_STATE_DISABLED           0x0
1146
1147 struct be_cmd_req_enable_disable_beacon {
1148         struct be_cmd_req_hdr hdr;
1149         u8  port_num;
1150         u8  beacon_state;
1151         u8  beacon_duration;
1152         u8  status_duration;
1153 } __packed;
1154
1155 struct be_cmd_req_get_beacon_state {
1156         struct be_cmd_req_hdr hdr;
1157         u8  port_num;
1158         u8  rsvd0;
1159         u16 rsvd1;
1160 } __packed;
1161
1162 struct be_cmd_resp_get_beacon_state {
1163         struct be_cmd_resp_hdr resp_hdr;
1164         u8 beacon_state;
1165         u8 rsvd0[3];
1166 } __packed;
1167
1168 /****************** Firmware Flash ******************/
1169 struct flashrom_params {
1170         u32 op_code;
1171         u32 op_type;
1172         u32 data_buf_size;
1173         u32 offset;
1174 };
1175
1176 struct be_cmd_write_flashrom {
1177         struct be_cmd_req_hdr hdr;
1178         struct flashrom_params params;
1179         u8 data_buf[32768];
1180         u8 rsvd[4];
1181 } __packed;
1182
1183 /* cmd to read flash crc */
1184 struct be_cmd_read_flash_crc {
1185         struct be_cmd_req_hdr hdr;
1186         struct flashrom_params params;
1187         u8 crc[4];
1188         u8 rsvd[4];
1189 } __packed;
1190
1191 /**************** Lancer Firmware Flash ************/
1192 struct amap_lancer_write_obj_context {
1193         u8 write_length[24];
1194         u8 reserved1[7];
1195         u8 eof;
1196 } __packed;
1197
1198 struct lancer_cmd_req_write_object {
1199         struct be_cmd_req_hdr hdr;
1200         u8 context[sizeof(struct amap_lancer_write_obj_context) / 8];
1201         u32 write_offset;
1202         u8 object_name[104];
1203         u32 descriptor_count;
1204         u32 buf_len;
1205         u32 addr_low;
1206         u32 addr_high;
1207 };
1208
1209 #define LANCER_NO_RESET_NEEDED          0x00
1210 #define LANCER_FW_RESET_NEEDED          0x02
1211 struct lancer_cmd_resp_write_object {
1212         u8 opcode;
1213         u8 subsystem;
1214         u8 rsvd1[2];
1215         u8 status;
1216         u8 additional_status;
1217         u8 rsvd2[2];
1218         u32 resp_len;
1219         u32 actual_resp_len;
1220         u32 actual_write_len;
1221         u8 change_status;
1222         u8 rsvd3[3];
1223 };
1224
1225 /************************ Lancer Read FW info **************/
1226 #define LANCER_READ_FILE_CHUNK                  (32*1024)
1227 #define LANCER_READ_FILE_EOF_MASK               0x80000000
1228
1229 #define LANCER_FW_DUMP_FILE                     "/dbg/dump.bin"
1230 #define LANCER_VPD_PF_FILE                      "/vpd/ntr_pf.vpd"
1231 #define LANCER_VPD_VF_FILE                      "/vpd/ntr_vf.vpd"
1232
1233 struct lancer_cmd_req_read_object {
1234         struct be_cmd_req_hdr hdr;
1235         u32 desired_read_len;
1236         u32 read_offset;
1237         u8 object_name[104];
1238         u32 descriptor_count;
1239         u32 buf_len;
1240         u32 addr_low;
1241         u32 addr_high;
1242 };
1243
1244 struct lancer_cmd_resp_read_object {
1245         u8 opcode;
1246         u8 subsystem;
1247         u8 rsvd1[2];
1248         u8 status;
1249         u8 additional_status;
1250         u8 rsvd2[2];
1251         u32 resp_len;
1252         u32 actual_resp_len;
1253         u32 actual_read_len;
1254         u32 eof;
1255 };
1256
1257 struct lancer_cmd_req_delete_object {
1258         struct be_cmd_req_hdr hdr;
1259         u32 rsvd1;
1260         u32 rsvd2;
1261         u8 object_name[104];
1262 };
1263
1264 /************************ WOL *******************************/
1265 struct be_cmd_req_acpi_wol_magic_config{
1266         struct be_cmd_req_hdr hdr;
1267         u32 rsvd0[145];
1268         u8 magic_mac[6];
1269         u8 rsvd2[2];
1270 } __packed;
1271
1272 struct be_cmd_req_acpi_wol_magic_config_v1 {
1273         struct be_cmd_req_hdr hdr;
1274         u8 rsvd0[2];
1275         u8 query_options;
1276         u8 rsvd1[5];
1277         u32 rsvd2[288];
1278         u8 magic_mac[6];
1279         u8 rsvd3[22];
1280 } __packed;
1281
1282 struct be_cmd_resp_acpi_wol_magic_config_v1 {
1283         struct be_cmd_resp_hdr hdr;
1284         u8 rsvd0[2];
1285         u8 wol_settings;
1286         u8 rsvd1[5];
1287         u32 rsvd2[295];
1288 } __packed;
1289
1290 #define BE_GET_WOL_CAP                  2
1291
1292 #define BE_WOL_CAP                      0x1
1293 #define BE_PME_D0_CAP                   0x8
1294 #define BE_PME_D1_CAP                   0x10
1295 #define BE_PME_D2_CAP                   0x20
1296 #define BE_PME_D3HOT_CAP                0x40
1297 #define BE_PME_D3COLD_CAP               0x80
1298
1299 /********************** LoopBack test *********************/
1300 struct be_cmd_req_loopback_test {
1301         struct be_cmd_req_hdr hdr;
1302         u32 loopback_type;
1303         u32 num_pkts;
1304         u64 pattern;
1305         u32 src_port;
1306         u32 dest_port;
1307         u32 pkt_size;
1308 };
1309
1310 struct be_cmd_resp_loopback_test {
1311         struct be_cmd_resp_hdr resp_hdr;
1312         u32    status;
1313         u32    num_txfer;
1314         u32    num_rx;
1315         u32    miscomp_off;
1316         u32    ticks_compl;
1317 };
1318
1319 struct be_cmd_req_set_lmode {
1320         struct be_cmd_req_hdr hdr;
1321         u8 src_port;
1322         u8 dest_port;
1323         u8 loopback_type;
1324         u8 loopback_state;
1325 };
1326
1327 /********************** DDR DMA test *********************/
1328 struct be_cmd_req_ddrdma_test {
1329         struct be_cmd_req_hdr hdr;
1330         u64 pattern;
1331         u32 byte_count;
1332         u32 rsvd0;
1333         u8  snd_buff[4096];
1334         u8  rsvd1[4096];
1335 };
1336
1337 struct be_cmd_resp_ddrdma_test {
1338         struct be_cmd_resp_hdr hdr;
1339         u64 pattern;
1340         u32 byte_cnt;
1341         u32 snd_err;
1342         u8  rsvd0[4096];
1343         u8  rcv_buff[4096];
1344 };
1345
1346 /*********************** SEEPROM Read ***********************/
1347
1348 #define BE_READ_SEEPROM_LEN 1024
1349 struct be_cmd_req_seeprom_read {
1350         struct be_cmd_req_hdr hdr;
1351         u8 rsvd0[BE_READ_SEEPROM_LEN];
1352 };
1353
1354 struct be_cmd_resp_seeprom_read {
1355         struct be_cmd_req_hdr hdr;
1356         u8 seeprom_data[BE_READ_SEEPROM_LEN];
1357 };
1358
1359 enum {
1360         PHY_TYPE_CX4_10GB = 0,
1361         PHY_TYPE_XFP_10GB,
1362         PHY_TYPE_SFP_1GB,
1363         PHY_TYPE_SFP_PLUS_10GB,
1364         PHY_TYPE_KR_10GB,
1365         PHY_TYPE_KX4_10GB,
1366         PHY_TYPE_BASET_10GB,
1367         PHY_TYPE_BASET_1GB,
1368         PHY_TYPE_BASEX_1GB,
1369         PHY_TYPE_SGMII,
1370         PHY_TYPE_DISABLED = 255
1371 };
1372
1373 #define BE_SUPPORTED_SPEED_NONE         0
1374 #define BE_SUPPORTED_SPEED_10MBPS       1
1375 #define BE_SUPPORTED_SPEED_100MBPS      2
1376 #define BE_SUPPORTED_SPEED_1GBPS        4
1377 #define BE_SUPPORTED_SPEED_10GBPS       8
1378
1379 #define BE_AN_EN                        0x2
1380 #define BE_PAUSE_SYM_EN                 0x80
1381
1382 /* MAC speed valid values */
1383 #define SPEED_DEFAULT  0x0
1384 #define SPEED_FORCED_10GB  0x1
1385 #define SPEED_FORCED_1GB  0x2
1386 #define SPEED_AUTONEG_10GB  0x3
1387 #define SPEED_AUTONEG_1GB  0x4
1388 #define SPEED_AUTONEG_100MB  0x5
1389 #define SPEED_AUTONEG_10GB_1GB 0x6
1390 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1391 #define SPEED_AUTONEG_1GB_100MB  0x8
1392 #define SPEED_AUTONEG_10MB  0x9
1393 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1394 #define SPEED_AUTONEG_100MB_10MB 0xb
1395 #define SPEED_FORCED_100MB  0xc
1396 #define SPEED_FORCED_10MB  0xd
1397
1398 struct be_cmd_req_get_phy_info {
1399         struct be_cmd_req_hdr hdr;
1400         u8 rsvd0[24];
1401 };
1402
1403 struct be_phy_info {
1404         u16 phy_type;
1405         u16 interface_type;
1406         u32 misc_params;
1407         u16 ext_phy_details;
1408         u16 rsvd;
1409         u16 auto_speeds_supported;
1410         u16 fixed_speeds_supported;
1411         u32 future_use[2];
1412 };
1413
1414 struct be_cmd_resp_get_phy_info {
1415         struct be_cmd_req_hdr hdr;
1416         struct be_phy_info phy_info;
1417 };
1418
1419 /*********************** Set QOS ***********************/
1420
1421 #define BE_QOS_BITS_NIC                         1
1422
1423 struct be_cmd_req_set_qos {
1424         struct be_cmd_req_hdr hdr;
1425         u32 valid_bits;
1426         u32 max_bps_nic;
1427         u32 rsvd[7];
1428 };
1429
1430 /*********************** Controller Attributes ***********************/
1431 struct be_cmd_req_cntl_attribs {
1432         struct be_cmd_req_hdr hdr;
1433 };
1434
1435 struct be_cmd_resp_cntl_attribs {
1436         struct be_cmd_resp_hdr hdr;
1437         struct mgmt_controller_attrib attribs;
1438 };
1439
1440 /*********************** Set driver function ***********************/
1441 #define CAPABILITY_SW_TIMESTAMPS        2
1442 #define CAPABILITY_BE3_NATIVE_ERX_API   4
1443
1444 struct be_cmd_req_set_func_cap {
1445         struct be_cmd_req_hdr hdr;
1446         u32 valid_cap_flags;
1447         u32 cap_flags;
1448         u8 rsvd[212];
1449 };
1450
1451 struct be_cmd_resp_set_func_cap {
1452         struct be_cmd_resp_hdr hdr;
1453         u32 valid_cap_flags;
1454         u32 cap_flags;
1455         u8 rsvd[212];
1456 };
1457
1458 /*********************** Function Privileges ***********************/
1459 enum {
1460         BE_PRIV_DEFAULT = 0x1,
1461         BE_PRIV_LNKQUERY = 0x2,
1462         BE_PRIV_LNKSTATS = 0x4,
1463         BE_PRIV_LNKMGMT = 0x8,
1464         BE_PRIV_LNKDIAG = 0x10,
1465         BE_PRIV_UTILQUERY = 0x20,
1466         BE_PRIV_FILTMGMT = 0x40,
1467         BE_PRIV_IFACEMGMT = 0x80,
1468         BE_PRIV_VHADM = 0x100,
1469         BE_PRIV_DEVCFG = 0x200,
1470         BE_PRIV_DEVSEC = 0x400
1471 };
1472 #define MAX_PRIVILEGES          (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1473                                  BE_PRIV_DEVSEC)
1474 #define MIN_PRIVILEGES          BE_PRIV_DEFAULT
1475
1476 struct be_cmd_priv_map {
1477         u8 opcode;
1478         u8 subsystem;
1479         u32 priv_mask;
1480 };
1481
1482 struct be_cmd_req_get_fn_privileges {
1483         struct be_cmd_req_hdr hdr;
1484         u32 rsvd;
1485 };
1486
1487 struct be_cmd_resp_get_fn_privileges {
1488         struct be_cmd_resp_hdr hdr;
1489         u32 privilege_mask;
1490 };
1491
1492 struct be_cmd_req_set_fn_privileges {
1493         struct be_cmd_req_hdr hdr;
1494         u32 privileges;         /* Used by BE3, SH-R */
1495         u32 privileges_lancer;  /* Used by Lancer */
1496 };
1497
1498 /******************** GET/SET_MACLIST  **************************/
1499 #define BE_MAX_MAC                      64
1500 struct be_cmd_req_get_mac_list {
1501         struct be_cmd_req_hdr hdr;
1502         u8 mac_type;
1503         u8 perm_override;
1504         u16 iface_id;
1505         u32 mac_id;
1506         u32 rsvd[3];
1507 } __packed;
1508
1509 struct get_list_macaddr {
1510         u16 mac_addr_size;
1511         union {
1512                 u8 macaddr[6];
1513                 struct {
1514                         u8 rsvd[2];
1515                         u32 mac_id;
1516                 } __packed s_mac_id;
1517         } __packed mac_addr_id;
1518 } __packed;
1519
1520 struct be_cmd_resp_get_mac_list {
1521         struct be_cmd_resp_hdr hdr;
1522         struct get_list_macaddr fd_macaddr; /* Factory default mac */
1523         struct get_list_macaddr macid_macaddr; /* soft mac */
1524         u8 true_mac_count;
1525         u8 pseudo_mac_count;
1526         u8 mac_list_size;
1527         u8 rsvd;
1528         /* perm override mac */
1529         struct get_list_macaddr macaddr_list[BE_MAX_MAC];
1530 } __packed;
1531
1532 struct be_cmd_req_set_mac_list {
1533         struct be_cmd_req_hdr hdr;
1534         u8 mac_count;
1535         u8 rsvd1;
1536         u16 rsvd2;
1537         struct macaddr mac[BE_MAX_MAC];
1538 } __packed;
1539
1540 /*********************** HSW Config ***********************/
1541 #define PORT_FWD_TYPE_VEPA              0x3
1542 #define PORT_FWD_TYPE_VEB               0x2
1543
1544 struct amap_set_hsw_context {
1545         u8 interface_id[16];
1546         u8 rsvd0[14];
1547         u8 pvid_valid;
1548         u8 pport;
1549         u8 rsvd1[6];
1550         u8 port_fwd_type[3];
1551         u8 rsvd2[7];
1552         u8 pvid[16];
1553         u8 rsvd3[32];
1554         u8 rsvd4[32];
1555         u8 rsvd5[32];
1556 } __packed;
1557
1558 struct be_cmd_req_set_hsw_config {
1559         struct be_cmd_req_hdr hdr;
1560         u8 context[sizeof(struct amap_set_hsw_context) / 8];
1561 } __packed;
1562
1563 struct amap_get_hsw_req_context {
1564         u8 interface_id[16];
1565         u8 rsvd0[14];
1566         u8 pvid_valid;
1567         u8 pport;
1568 } __packed;
1569
1570 struct amap_get_hsw_resp_context {
1571         u8 rsvd0[6];
1572         u8 port_fwd_type[3];
1573         u8 rsvd1[7];
1574         u8 pvid[16];
1575         u8 rsvd2[32];
1576         u8 rsvd3[32];
1577         u8 rsvd4[32];
1578 } __packed;
1579
1580 struct be_cmd_req_get_hsw_config {
1581         struct be_cmd_req_hdr hdr;
1582         u8 context[sizeof(struct amap_get_hsw_req_context) / 8];
1583 } __packed;
1584
1585 struct be_cmd_resp_get_hsw_config {
1586         struct be_cmd_resp_hdr hdr;
1587         u8 context[sizeof(struct amap_get_hsw_resp_context) / 8];
1588         u32 rsvd;
1589 };
1590
1591 /******************* get port names ***************/
1592 struct be_cmd_req_get_port_name {
1593         struct be_cmd_req_hdr hdr;
1594         u32 rsvd0;
1595 };
1596
1597 struct be_cmd_resp_get_port_name {
1598         struct be_cmd_req_hdr hdr;
1599         u8 port_name[4];
1600 };
1601
1602 /*************** HW Stats Get v1 **********************************/
1603 #define BE_TXP_SW_SZ                    48
1604 struct be_port_rxf_stats_v1 {
1605         u32 rsvd0[12];
1606         u32 rx_crc_errors;
1607         u32 rx_alignment_symbol_errors;
1608         u32 rx_pause_frames;
1609         u32 rx_priority_pause_frames;
1610         u32 rx_control_frames;
1611         u32 rx_in_range_errors;
1612         u32 rx_out_range_errors;
1613         u32 rx_frame_too_long;
1614         u32 rx_address_filtered;
1615         u32 rx_dropped_too_small;
1616         u32 rx_dropped_too_short;
1617         u32 rx_dropped_header_too_small;
1618         u32 rx_dropped_tcp_length;
1619         u32 rx_dropped_runt;
1620         u32 rsvd1[10];
1621         u32 rx_ip_checksum_errs;
1622         u32 rx_tcp_checksum_errs;
1623         u32 rx_udp_checksum_errs;
1624         u32 rsvd2[7];
1625         u32 rx_switched_unicast_packets;
1626         u32 rx_switched_multicast_packets;
1627         u32 rx_switched_broadcast_packets;
1628         u32 rsvd3[3];
1629         u32 tx_pauseframes;
1630         u32 tx_priority_pauseframes;
1631         u32 tx_controlframes;
1632         u32 rsvd4[10];
1633         u32 rxpp_fifo_overflow_drop;
1634         u32 rx_input_fifo_overflow_drop;
1635         u32 pmem_fifo_overflow_drop;
1636         u32 jabber_events;
1637         u32 rsvd5[3];
1638 };
1639
1640
1641 struct be_rxf_stats_v1 {
1642         struct be_port_rxf_stats_v1 port[4];
1643         u32 rsvd0[2];
1644         u32 rx_drops_no_pbuf;
1645         u32 rx_drops_no_txpb;
1646         u32 rx_drops_no_erx_descr;
1647         u32 rx_drops_no_tpre_descr;
1648         u32 rsvd1[6];
1649         u32 rx_drops_too_many_frags;
1650         u32 rx_drops_invalid_ring;
1651         u32 forwarded_packets;
1652         u32 rx_drops_mtu;
1653         u32 rsvd2[14];
1654 };
1655
1656 struct be_erx_stats_v1 {
1657         u32 rx_drops_no_fragments[68];     /* dwordS 0 to 67*/
1658         u32 rsvd[4];
1659 };
1660
1661 struct be_port_rxf_stats_v2 {
1662         u32 rsvd0[10];
1663         u32 roce_bytes_received_lsd;
1664         u32 roce_bytes_received_msd;
1665         u32 rsvd1[5];
1666         u32 roce_frames_received;
1667         u32 rx_crc_errors;
1668         u32 rx_alignment_symbol_errors;
1669         u32 rx_pause_frames;
1670         u32 rx_priority_pause_frames;
1671         u32 rx_control_frames;
1672         u32 rx_in_range_errors;
1673         u32 rx_out_range_errors;
1674         u32 rx_frame_too_long;
1675         u32 rx_address_filtered;
1676         u32 rx_dropped_too_small;
1677         u32 rx_dropped_too_short;
1678         u32 rx_dropped_header_too_small;
1679         u32 rx_dropped_tcp_length;
1680         u32 rx_dropped_runt;
1681         u32 rsvd2[10];
1682         u32 rx_ip_checksum_errs;
1683         u32 rx_tcp_checksum_errs;
1684         u32 rx_udp_checksum_errs;
1685         u32 rsvd3[7];
1686         u32 rx_switched_unicast_packets;
1687         u32 rx_switched_multicast_packets;
1688         u32 rx_switched_broadcast_packets;
1689         u32 rsvd4[3];
1690         u32 tx_pauseframes;
1691         u32 tx_priority_pauseframes;
1692         u32 tx_controlframes;
1693         u32 rsvd5[10];
1694         u32 rxpp_fifo_overflow_drop;
1695         u32 rx_input_fifo_overflow_drop;
1696         u32 pmem_fifo_overflow_drop;
1697         u32 jabber_events;
1698         u32 rsvd6[3];
1699         u32 rx_drops_payload_size;
1700         u32 rx_drops_clipped_header;
1701         u32 rx_drops_crc;
1702         u32 roce_drops_payload_len;
1703         u32 roce_drops_crc;
1704         u32 rsvd7[19];
1705 };
1706
1707 struct be_rxf_stats_v2 {
1708         struct be_port_rxf_stats_v2 port[4];
1709         u32 rsvd0[2];
1710         u32 rx_drops_no_pbuf;
1711         u32 rx_drops_no_txpb;
1712         u32 rx_drops_no_erx_descr;
1713         u32 rx_drops_no_tpre_descr;
1714         u32 rsvd1[6];
1715         u32 rx_drops_too_many_frags;
1716         u32 rx_drops_invalid_ring;
1717         u32 forwarded_packets;
1718         u32 rx_drops_mtu;
1719         u32 rsvd2[35];
1720 };
1721
1722 struct be_hw_stats_v1 {
1723         struct be_rxf_stats_v1 rxf;
1724         u32 rsvd0[BE_TXP_SW_SZ];
1725         struct be_erx_stats_v1 erx;
1726         struct be_pmem_stats pmem;
1727         u32 rsvd1[18];
1728 };
1729
1730 struct be_cmd_req_get_stats_v1 {
1731         struct be_cmd_req_hdr hdr;
1732         u8 rsvd[sizeof(struct be_hw_stats_v1)];
1733 };
1734
1735 struct be_cmd_resp_get_stats_v1 {
1736         struct be_cmd_resp_hdr hdr;
1737         struct be_hw_stats_v1 hw_stats;
1738 };
1739
1740 struct be_erx_stats_v2 {
1741         u32 rx_drops_no_fragments[136];     /* dwordS 0 to 135*/
1742         u32 rsvd[3];
1743 };
1744
1745 struct be_hw_stats_v2 {
1746         struct be_rxf_stats_v2 rxf;
1747         u32 rsvd0[BE_TXP_SW_SZ];
1748         struct be_erx_stats_v2 erx;
1749         struct be_pmem_stats pmem;
1750         u32 rsvd1[18];
1751 };
1752
1753 struct be_cmd_req_get_stats_v2 {
1754         struct be_cmd_req_hdr hdr;
1755         u8 rsvd[sizeof(struct be_hw_stats_v2)];
1756 };
1757
1758 struct be_cmd_resp_get_stats_v2 {
1759         struct be_cmd_resp_hdr hdr;
1760         struct be_hw_stats_v2 hw_stats;
1761 };
1762
1763 /************** get fat capabilites *******************/
1764 #define MAX_MODULES 27
1765 #define MAX_MODES 4
1766 #define MODE_UART 0
1767 #define FW_LOG_LEVEL_DEFAULT 48
1768 #define FW_LOG_LEVEL_FATAL 64
1769
1770 struct ext_fat_mode {
1771         u8 mode;
1772         u8 rsvd0;
1773         u16 port_mask;
1774         u32 dbg_lvl;
1775         u64 fun_mask;
1776 } __packed;
1777
1778 struct ext_fat_modules {
1779         u8 modules_str[32];
1780         u32 modules_id;
1781         u32 num_modes;
1782         struct ext_fat_mode trace_lvl[MAX_MODES];
1783 } __packed;
1784
1785 struct be_fat_conf_params {
1786         u32 max_log_entries;
1787         u32 log_entry_size;
1788         u8 log_type;
1789         u8 max_log_funs;
1790         u8 max_log_ports;
1791         u8 rsvd0;
1792         u32 supp_modes;
1793         u32 num_modules;
1794         struct ext_fat_modules module[MAX_MODULES];
1795 } __packed;
1796
1797 struct be_cmd_req_get_ext_fat_caps {
1798         struct be_cmd_req_hdr hdr;
1799         u32 parameter_type;
1800 };
1801
1802 struct be_cmd_resp_get_ext_fat_caps {
1803         struct be_cmd_resp_hdr hdr;
1804         struct be_fat_conf_params get_params;
1805 };
1806
1807 struct be_cmd_req_set_ext_fat_caps {
1808         struct be_cmd_req_hdr hdr;
1809         struct be_fat_conf_params set_params;
1810 };
1811
1812 #define RESOURCE_DESC_SIZE_V0                   72
1813 #define RESOURCE_DESC_SIZE_V1                   88
1814 #define PCIE_RESOURCE_DESC_TYPE_V0              0x40
1815 #define NIC_RESOURCE_DESC_TYPE_V0               0x41
1816 #define PCIE_RESOURCE_DESC_TYPE_V1              0x50
1817 #define NIC_RESOURCE_DESC_TYPE_V1               0x51
1818 #define PORT_RESOURCE_DESC_TYPE_V1              0x55
1819 #define MAX_RESOURCE_DESC                       264
1820
1821 #define VFT_SHIFT                               3       /* VF template */
1822 #define IMM_SHIFT                               6       /* Immediate */
1823 #define NOSV_SHIFT                              7       /* No save */
1824
1825 struct be_res_desc_hdr {
1826         u8 desc_type;
1827         u8 desc_len;
1828 } __packed;
1829
1830 struct be_port_res_desc {
1831         struct be_res_desc_hdr hdr;
1832         u8 rsvd0;
1833         u8 flags;
1834         u8 link_num;
1835         u8 mc_type;
1836         u16 rsvd1;
1837
1838 #define NV_TYPE_MASK                            0x3     /* bits 0-1 */
1839 #define NV_TYPE_DISABLED                        1
1840 #define NV_TYPE_VXLAN                           3
1841 #define SOCVID_SHIFT                            2       /* Strip outer vlan */
1842 #define RCVID_SHIFT                             4       /* Report vlan */
1843         u8 nv_flags;
1844         u8 rsvd2;
1845         __le16 nv_port;                                 /* vxlan/gre port */
1846         u32 rsvd3[19];
1847 } __packed;
1848
1849 struct be_pcie_res_desc {
1850         struct be_res_desc_hdr hdr;
1851         u8 rsvd0;
1852         u8 flags;
1853         u16 rsvd1;
1854         u8 pf_num;
1855         u8 rsvd2;
1856         u32 rsvd3;
1857         u8 sriov_state;
1858         u8 pf_state;
1859         u8 pf_type;
1860         u8 rsvd4;
1861         u16 num_vfs;
1862         u16 rsvd5;
1863         u32 rsvd6[17];
1864 } __packed;
1865
1866 struct be_nic_res_desc {
1867         struct be_res_desc_hdr hdr;
1868         u8 rsvd1;
1869
1870 #define QUN_SHIFT                               4 /* QoS is in absolute units */
1871         u8 flags;
1872         u8 vf_num;
1873         u8 rsvd2;
1874         u8 pf_num;
1875         u8 rsvd3;
1876         u16 unicast_mac_count;
1877         u8 rsvd4[6];
1878         u16 mcc_count;
1879         u16 vlan_count;
1880         u16 mcast_mac_count;
1881         u16 txq_count;
1882         u16 rq_count;
1883         u16 rssq_count;
1884         u16 lro_count;
1885         u16 cq_count;
1886         u16 toe_conn_count;
1887         u16 eq_count;
1888         u16 vlan_id;
1889         u16 iface_count;
1890         u32 cap_flags;
1891         u8 link_param;
1892         u8 rsvd6;
1893         u16 channel_id_param;
1894         u32 bw_min;
1895         u32 bw_max;
1896         u8 acpi_params;
1897         u8 wol_param;
1898         u16 rsvd7;
1899         u16 tunnel_iface_count;
1900         u16 direct_tenant_iface_count;
1901         u32 rsvd8[6];
1902 } __packed;
1903
1904 /************ Multi-Channel type ***********/
1905 enum mc_type {
1906         MC_NONE = 0x01,
1907         UMC = 0x02,
1908         FLEX10 = 0x03,
1909         vNIC1 = 0x04,
1910         nPAR = 0x05,
1911         UFP = 0x06,
1912         vNIC2 = 0x07
1913 };
1914
1915 /* Is BE in a multi-channel mode */
1916 static inline bool be_is_mc(struct be_adapter *adapter)
1917 {
1918         return adapter->mc_type > MC_NONE;
1919 }
1920
1921 struct be_cmd_req_get_func_config {
1922         struct be_cmd_req_hdr hdr;
1923 };
1924
1925 struct be_cmd_resp_get_func_config {
1926         struct be_cmd_resp_hdr hdr;
1927         u32 desc_count;
1928         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
1929 };
1930
1931 #define ACTIVE_PROFILE_TYPE                     0x2
1932 struct be_cmd_req_get_profile_config {
1933         struct be_cmd_req_hdr hdr;
1934         u8 rsvd;
1935         u8 type;
1936         u16 rsvd1;
1937 };
1938
1939 struct be_cmd_resp_get_profile_config {
1940         struct be_cmd_resp_hdr hdr;
1941         u32 desc_count;
1942         u8 func_param[MAX_RESOURCE_DESC * RESOURCE_DESC_SIZE_V1];
1943 };
1944
1945 struct be_cmd_req_set_profile_config {
1946         struct be_cmd_req_hdr hdr;
1947         u32 rsvd;
1948         u32 desc_count;
1949         u8 desc[2 * RESOURCE_DESC_SIZE_V1];
1950 } __packed;
1951
1952 struct be_cmd_req_get_active_profile {
1953         struct be_cmd_req_hdr hdr;
1954         u32 rsvd;
1955 } __packed;
1956
1957 struct be_cmd_resp_get_active_profile {
1958         struct be_cmd_resp_hdr hdr;
1959         u16 active_profile_id;
1960         u16 next_profile_id;
1961 } __packed;
1962
1963 struct be_cmd_enable_disable_vf {
1964         struct be_cmd_req_hdr hdr;
1965         u8 enable;
1966         u8 rsvd[3];
1967 };
1968
1969 struct be_cmd_req_intr_set {
1970         struct be_cmd_req_hdr hdr;
1971         u8 intr_enabled;
1972         u8 rsvd[3];
1973 };
1974
1975 static inline bool check_privilege(struct be_adapter *adapter, u32 flags)
1976 {
1977         return flags & adapter->cmd_privileges ? true : false;
1978 }
1979
1980 /************** Get IFACE LIST *******************/
1981 struct be_if_desc {
1982         u32 if_id;
1983         u32 cap_flags;
1984         u32 en_flags;
1985 };
1986
1987 struct be_cmd_req_get_iface_list {
1988         struct be_cmd_req_hdr hdr;
1989 };
1990
1991 struct be_cmd_resp_get_iface_list {
1992         struct be_cmd_req_hdr hdr;
1993         u32 if_cnt;
1994         struct be_if_desc if_desc;
1995 };
1996
1997 /*************** Set logical link ********************/
1998 #define PLINK_TRACK_SHIFT       8
1999 struct be_cmd_req_set_ll_link {
2000         struct be_cmd_req_hdr hdr;
2001         u32 link_config; /* Bit 0: UP_DOWN, Bit 9: PLINK */
2002 };
2003
2004 /************** Manage IFACE Filters *******************/
2005 #define OP_CONVERT_NORMAL_TO_TUNNEL             0
2006 #define OP_CONVERT_TUNNEL_TO_NORMAL             1
2007
2008 struct be_cmd_req_manage_iface_filters {
2009         struct be_cmd_req_hdr hdr;
2010         u8  op;
2011         u8  rsvd0;
2012         u8  flags;
2013         u8  rsvd1;
2014         u32 tunnel_iface_id;
2015         u32 target_iface_id;
2016         u8  mac[6];
2017         u16 vlan_tag;
2018         u32 tenant_id;
2019         u32 filter_id;
2020         u32 cap_flags;
2021         u32 cap_control_flags;
2022 } __packed;
2023
2024 int be_pci_fnum_get(struct be_adapter *adapter);
2025 int be_fw_wait_ready(struct be_adapter *adapter);
2026 int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
2027                           bool permanent, u32 if_handle, u32 pmac_id);
2028 int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id,
2029                     u32 *pmac_id, u32 domain);
2030 int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id,
2031                     u32 domain);
2032 int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
2033                      u32 *if_handle, u32 domain);
2034 int be_cmd_if_destroy(struct be_adapter *adapter, int if_handle, u32 domain);
2035 int be_cmd_eq_create(struct be_adapter *adapter, struct be_eq_obj *eqo);
2036 int be_cmd_cq_create(struct be_adapter *adapter, struct be_queue_info *cq,
2037                      struct be_queue_info *eq, bool no_delay,
2038                      int num_cqe_dma_coalesce);
2039 int be_cmd_mccq_create(struct be_adapter *adapter, struct be_queue_info *mccq,
2040                        struct be_queue_info *cq);
2041 int be_cmd_txq_create(struct be_adapter *adapter, struct be_tx_obj *txo);
2042 int be_cmd_rxq_create(struct be_adapter *adapter, struct be_queue_info *rxq,
2043                       u16 cq_id, u16 frag_size, u32 if_id, u32 rss, u8 *rss_id);
2044 int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
2045                      int type);
2046 int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q);
2047 int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,
2048                              u8 *link_status, u32 dom);
2049 int be_cmd_reset(struct be_adapter *adapter);
2050 int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd);
2051 int lancer_cmd_get_pport_stats(struct be_adapter *adapter,
2052                                struct be_dma_mem *nonemb_cmd);
2053 int be_cmd_get_fw_ver(struct be_adapter *adapter);
2054 int be_cmd_modify_eqd(struct be_adapter *adapter, struct be_set_eqd *, int num);
2055 int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,
2056                        u32 num);
2057 int be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 status);
2058 int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc);
2059 int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc);
2060 int be_cmd_query_fw_cfg(struct be_adapter *adapter);
2061 int be_cmd_reset_function(struct be_adapter *adapter);
2062 int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,
2063                       u32 rss_hash_opts, u16 table_size, const u8 *rss_hkey);
2064 int be_process_mcc(struct be_adapter *adapter);
2065 int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num, u8 beacon,
2066                             u8 status, u8 state);
2067 int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num,
2068                             u32 *state);
2069 int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
2070                           u32 flash_oper, u32 flash_opcode, u32 buf_size);
2071 int lancer_cmd_write_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2072                             u32 data_size, u32 data_offset,
2073                             const char *obj_name, u32 *data_written,
2074                             u8 *change_status, u8 *addn_status);
2075 int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,
2076                            u32 data_size, u32 data_offset, const char *obj_name,
2077                            u32 *data_read, u32 *eof, u8 *addn_status);
2078 int lancer_cmd_delete_object(struct be_adapter *adapter, const char *obj_name);
2079 int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,
2080                           u16 optype, int offset);
2081 int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
2082                             struct be_dma_mem *nonemb_cmd);
2083 int be_cmd_fw_init(struct be_adapter *adapter);
2084 int be_cmd_fw_clean(struct be_adapter *adapter);
2085 void be_async_mcc_enable(struct be_adapter *adapter);
2086 void be_async_mcc_disable(struct be_adapter *adapter);
2087 int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
2088                          u32 loopback_type, u32 pkt_size, u32 num_pkts,
2089                          u64 pattern);
2090 int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, u32 byte_cnt,
2091                         struct be_dma_mem *cmd);
2092 int be_cmd_get_seeprom_data(struct be_adapter *adapter,
2093                             struct be_dma_mem *nonemb_cmd);
2094 int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
2095                         u8 loopback_type, u8 enable);
2096 int be_cmd_get_phy_info(struct be_adapter *adapter);
2097 int be_cmd_config_qos(struct be_adapter *adapter, u32 max_rate,
2098                       u16 link_speed, u8 domain);
2099 void be_detect_error(struct be_adapter *adapter);
2100 int be_cmd_get_die_temperature(struct be_adapter *adapter);
2101 int be_cmd_get_cntl_attributes(struct be_adapter *adapter);
2102 int be_cmd_req_native_mode(struct be_adapter *adapter);
2103 int be_cmd_get_reg_len(struct be_adapter *adapter, u32 *log_size);
2104 void be_cmd_get_regs(struct be_adapter *adapter, u32 buf_len, void *buf);
2105 int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,
2106                              u32 domain);
2107 int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,
2108                              u32 vf_num);
2109 int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,
2110                              bool *pmac_id_active, u32 *pmac_id,
2111                              u32 if_handle, u8 domain);
2112 int be_cmd_get_active_mac(struct be_adapter *adapter, u32 pmac_id, u8 *mac,
2113                           u32 if_handle, bool active, u32 domain);
2114 int be_cmd_get_perm_mac(struct be_adapter *adapter, u8 *mac);
2115 int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array, u8 mac_count,
2116                         u32 domain);
2117 int be_cmd_set_mac(struct be_adapter *adapter, u8 *mac, int if_id, u32 dom);
2118 int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid, u32 domain,
2119                           u16 intf_id, u16 hsw_mode);
2120 int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid, u32 domain,
2121                           u16 intf_id, u8 *mode);
2122 int be_cmd_get_acpi_wol_cap(struct be_adapter *adapter);
2123 int be_cmd_set_fw_log_level(struct be_adapter *adapter, u32 level);
2124 int be_cmd_get_fw_log_level(struct be_adapter *adapter);
2125 int be_cmd_get_ext_fat_capabilites(struct be_adapter *adapter,
2126                                    struct be_dma_mem *cmd);
2127 int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,
2128                                    struct be_dma_mem *cmd,
2129                                    struct be_fat_conf_params *cfgs);
2130 int lancer_physdev_ctrl(struct be_adapter *adapter, u32 mask);
2131 int lancer_initiate_dump(struct be_adapter *adapter);
2132 int lancer_delete_dump(struct be_adapter *adapter);
2133 bool dump_present(struct be_adapter *adapter);
2134 int lancer_test_and_set_rdy_state(struct be_adapter *adapter);
2135 int be_cmd_query_port_name(struct be_adapter *adapter, u8 *port_name);
2136 int be_cmd_get_func_config(struct be_adapter *adapter,
2137                            struct be_resources *res);
2138 int be_cmd_get_profile_config(struct be_adapter *adapter,
2139                               struct be_resources *res, u8 domain);
2140 int be_cmd_get_active_profile(struct be_adapter *adapter, u16 *profile);
2141 int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,
2142                      int vf_num);
2143 int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain);
2144 int be_cmd_intr_set(struct be_adapter *adapter, bool intr_enable);
2145 int be_cmd_set_logical_link_config(struct be_adapter *adapter,
2146                                           int link_state, u8 domain);
2147 int be_cmd_set_vxlan_port(struct be_adapter *adapter, __be16 port);
2148 int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op);
2149 int be_cmd_set_sriov_config(struct be_adapter *adapter,
2150                             struct be_resources res, u16 num_vfs);