1 /* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
21 #include <linux/types.h>
22 #include <linux/module.h>
26 #include <linux/if_macvlan.h>
27 #include <linux/prefetch.h>
31 #define DRV_VERSION "0.12.2-k"
32 const char fm10k_driver_version[] = DRV_VERSION;
33 char fm10k_driver_name[] = "fm10k";
34 static const char fm10k_driver_string[] =
35 "Intel(R) Ethernet Switch Host Interface Driver";
36 static const char fm10k_copyright[] =
37 "Copyright (c) 2013 Intel Corporation.";
39 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
40 MODULE_DESCRIPTION("Intel(R) Ethernet Switch Host Interface Driver");
41 MODULE_LICENSE("GPL");
42 MODULE_VERSION(DRV_VERSION);
45 * fm10k_init_module - Driver Registration Routine
47 * fm10k_init_module is the first routine called when the driver is
48 * loaded. All it does is register with the PCI subsystem.
50 static int __init fm10k_init_module(void)
52 pr_info("%s - version %s\n", fm10k_driver_string, fm10k_driver_version);
53 pr_info("%s\n", fm10k_copyright);
57 return fm10k_register_pci_driver();
59 module_init(fm10k_init_module);
62 * fm10k_exit_module - Driver Exit Cleanup Routine
64 * fm10k_exit_module is called just before the driver is removed
67 static void __exit fm10k_exit_module(void)
69 fm10k_unregister_pci_driver();
73 module_exit(fm10k_exit_module);
75 static bool fm10k_alloc_mapped_page(struct fm10k_ring *rx_ring,
76 struct fm10k_rx_buffer *bi)
78 struct page *page = bi->page;
81 /* Only page will be NULL if buffer was consumed */
85 /* alloc new page for storage */
86 page = alloc_page(GFP_ATOMIC | __GFP_COLD);
87 if (unlikely(!page)) {
88 rx_ring->rx_stats.alloc_failed++;
92 /* map page for use */
93 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
95 /* if mapping failed free memory back to system since
96 * there isn't much point in holding memory we can't use
98 if (dma_mapping_error(rx_ring->dev, dma)) {
102 rx_ring->rx_stats.alloc_failed++;
114 * fm10k_alloc_rx_buffers - Replace used receive buffers
115 * @rx_ring: ring to place buffers on
116 * @cleaned_count: number of buffers to replace
118 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count)
120 union fm10k_rx_desc *rx_desc;
121 struct fm10k_rx_buffer *bi;
122 u16 i = rx_ring->next_to_use;
128 rx_desc = FM10K_RX_DESC(rx_ring, i);
129 bi = &rx_ring->rx_buffer[i];
133 if (!fm10k_alloc_mapped_page(rx_ring, bi))
136 /* Refresh the desc even if buffer_addrs didn't change
137 * because each write-back erases this info.
139 rx_desc->q.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
145 rx_desc = FM10K_RX_DESC(rx_ring, 0);
146 bi = rx_ring->rx_buffer;
150 /* clear the hdr_addr for the next_to_use descriptor */
151 rx_desc->q.hdr_addr = 0;
154 } while (cleaned_count);
158 if (rx_ring->next_to_use != i) {
159 /* record the next descriptor to use */
160 rx_ring->next_to_use = i;
162 /* update next to alloc since we have filled the ring */
163 rx_ring->next_to_alloc = i;
165 /* Force memory writes to complete before letting h/w
166 * know there are new descriptors to fetch. (Only
167 * applicable for weak-ordered memory model archs,
172 /* notify hardware of new descriptors */
173 writel(i, rx_ring->tail);
178 * fm10k_reuse_rx_page - page flip buffer and store it back on the ring
179 * @rx_ring: rx descriptor ring to store buffers on
180 * @old_buff: donor buffer to have page reused
182 * Synchronizes page for reuse by the interface
184 static void fm10k_reuse_rx_page(struct fm10k_ring *rx_ring,
185 struct fm10k_rx_buffer *old_buff)
187 struct fm10k_rx_buffer *new_buff;
188 u16 nta = rx_ring->next_to_alloc;
190 new_buff = &rx_ring->rx_buffer[nta];
192 /* update, and store next to alloc */
194 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
196 /* transfer page from old buffer to new buffer */
197 memcpy(new_buff, old_buff, sizeof(struct fm10k_rx_buffer));
199 /* sync the buffer for use by the device */
200 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
201 old_buff->page_offset,
206 static bool fm10k_can_reuse_rx_page(struct fm10k_rx_buffer *rx_buffer,
208 unsigned int truesize)
210 /* avoid re-using remote pages */
211 if (unlikely(page_to_nid(page) != numa_mem_id()))
214 #if (PAGE_SIZE < 8192)
215 /* if we are only owner of page we can reuse it */
216 if (unlikely(page_count(page) != 1))
219 /* flip page offset to other buffer */
220 rx_buffer->page_offset ^= FM10K_RX_BUFSZ;
222 /* since we are the only owner of the page and we need to
223 * increment it, just set the value to 2 in order to avoid
224 * an unnecessary locked operation
226 atomic_set(&page->_count, 2);
228 /* move offset up to the next cache line */
229 rx_buffer->page_offset += truesize;
231 if (rx_buffer->page_offset > (PAGE_SIZE - FM10K_RX_BUFSZ))
234 /* bump ref count on page before it is given to the stack */
242 * fm10k_add_rx_frag - Add contents of Rx buffer to sk_buff
243 * @rx_ring: rx descriptor ring to transact packets on
244 * @rx_buffer: buffer containing page to add
245 * @rx_desc: descriptor containing length of buffer written by hardware
246 * @skb: sk_buff to place the data into
248 * This function will add the data contained in rx_buffer->page to the skb.
249 * This is done either through a direct copy if the data in the buffer is
250 * less than the skb header size, otherwise it will just attach the page as
253 * The function will then update the page offset if necessary and return
254 * true if the buffer can be reused by the interface.
256 static bool fm10k_add_rx_frag(struct fm10k_ring *rx_ring,
257 struct fm10k_rx_buffer *rx_buffer,
258 union fm10k_rx_desc *rx_desc,
261 struct page *page = rx_buffer->page;
262 unsigned int size = le16_to_cpu(rx_desc->w.length);
263 #if (PAGE_SIZE < 8192)
264 unsigned int truesize = FM10K_RX_BUFSZ;
266 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
269 if ((size <= FM10K_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
270 unsigned char *va = page_address(page) + rx_buffer->page_offset;
272 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
274 /* we can reuse buffer as-is, just make sure it is local */
275 if (likely(page_to_nid(page) == numa_mem_id()))
278 /* this page cannot be reused so discard it */
283 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
284 rx_buffer->page_offset, size, truesize);
286 return fm10k_can_reuse_rx_page(rx_buffer, page, truesize);
289 static struct sk_buff *fm10k_fetch_rx_buffer(struct fm10k_ring *rx_ring,
290 union fm10k_rx_desc *rx_desc,
293 struct fm10k_rx_buffer *rx_buffer;
296 rx_buffer = &rx_ring->rx_buffer[rx_ring->next_to_clean];
298 page = rx_buffer->page;
302 void *page_addr = page_address(page) +
303 rx_buffer->page_offset;
305 /* prefetch first cache line of first page */
307 #if L1_CACHE_BYTES < 128
308 prefetch(page_addr + L1_CACHE_BYTES);
311 /* allocate a skb to store the frags */
312 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
314 if (unlikely(!skb)) {
315 rx_ring->rx_stats.alloc_failed++;
319 /* we will be copying header into skb->data in
320 * pskb_may_pull so it is in our interest to prefetch
321 * it now to avoid a possible cache miss
323 prefetchw(skb->data);
326 /* we are reusing so sync this buffer for CPU use */
327 dma_sync_single_range_for_cpu(rx_ring->dev,
329 rx_buffer->page_offset,
333 /* pull page into skb */
334 if (fm10k_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
335 /* hand second half of page back to the ring */
336 fm10k_reuse_rx_page(rx_ring, rx_buffer);
338 /* we are not reusing the buffer so unmap it */
339 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
340 PAGE_SIZE, DMA_FROM_DEVICE);
343 /* clear contents of rx_buffer */
344 rx_buffer->page = NULL;
349 static inline void fm10k_rx_checksum(struct fm10k_ring *ring,
350 union fm10k_rx_desc *rx_desc,
353 skb_checksum_none_assert(skb);
355 /* Rx checksum disabled via ethtool */
356 if (!(ring->netdev->features & NETIF_F_RXCSUM))
359 /* TCP/UDP checksum error bit is set */
360 if (fm10k_test_staterr(rx_desc,
361 FM10K_RXD_STATUS_L4E |
362 FM10K_RXD_STATUS_L4E2 |
363 FM10K_RXD_STATUS_IPE |
364 FM10K_RXD_STATUS_IPE2)) {
365 ring->rx_stats.csum_err++;
369 /* It must be a TCP or UDP packet with a valid checksum */
370 if (fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS2))
371 skb->encapsulation = true;
372 else if (!fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_L4CS))
375 skb->ip_summed = CHECKSUM_UNNECESSARY;
378 #define FM10K_RSS_L4_TYPES_MASK \
379 ((1ul << FM10K_RSSTYPE_IPV4_TCP) | \
380 (1ul << FM10K_RSSTYPE_IPV4_UDP) | \
381 (1ul << FM10K_RSSTYPE_IPV6_TCP) | \
382 (1ul << FM10K_RSSTYPE_IPV6_UDP))
384 static inline void fm10k_rx_hash(struct fm10k_ring *ring,
385 union fm10k_rx_desc *rx_desc,
390 if (!(ring->netdev->features & NETIF_F_RXHASH))
393 rss_type = le16_to_cpu(rx_desc->w.pkt_info) & FM10K_RXD_RSSTYPE_MASK;
397 skb_set_hash(skb, le32_to_cpu(rx_desc->d.rss),
398 (FM10K_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
399 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
402 static void fm10k_rx_hwtstamp(struct fm10k_ring *rx_ring,
403 union fm10k_rx_desc *rx_desc,
406 struct fm10k_intfc *interface = rx_ring->q_vector->interface;
408 FM10K_CB(skb)->tstamp = rx_desc->q.timestamp;
410 if (unlikely(interface->flags & FM10K_FLAG_RX_TS_ENABLED))
411 fm10k_systime_to_hwtstamp(interface, skb_hwtstamps(skb),
412 le64_to_cpu(rx_desc->q.timestamp));
415 static void fm10k_type_trans(struct fm10k_ring *rx_ring,
416 union fm10k_rx_desc *rx_desc,
419 struct net_device *dev = rx_ring->netdev;
420 struct fm10k_l2_accel *l2_accel = rcu_dereference_bh(rx_ring->l2_accel);
422 /* check to see if DGLORT belongs to a MACVLAN */
424 u16 idx = le16_to_cpu(FM10K_CB(skb)->fi.w.dglort) - 1;
426 idx -= l2_accel->dglort;
427 if (idx < l2_accel->size && l2_accel->macvlan[idx])
428 dev = l2_accel->macvlan[idx];
433 skb->protocol = eth_type_trans(skb, dev);
438 /* update MACVLAN statistics */
439 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, 1,
440 !!(rx_desc->w.hdr_info &
441 cpu_to_le16(FM10K_RXD_HDR_INFO_XC_MASK)));
445 * fm10k_process_skb_fields - Populate skb header fields from Rx descriptor
446 * @rx_ring: rx descriptor ring packet is being transacted on
447 * @rx_desc: pointer to the EOP Rx descriptor
448 * @skb: pointer to current skb being populated
450 * This function checks the ring, descriptor, and packet information in
451 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
452 * other fields within the skb.
454 static unsigned int fm10k_process_skb_fields(struct fm10k_ring *rx_ring,
455 union fm10k_rx_desc *rx_desc,
458 unsigned int len = skb->len;
460 fm10k_rx_hash(rx_ring, rx_desc, skb);
462 fm10k_rx_checksum(rx_ring, rx_desc, skb);
464 fm10k_rx_hwtstamp(rx_ring, rx_desc, skb);
466 FM10K_CB(skb)->fi.w.vlan = rx_desc->w.vlan;
468 skb_record_rx_queue(skb, rx_ring->queue_index);
470 FM10K_CB(skb)->fi.d.glort = rx_desc->d.glort;
472 if (rx_desc->w.vlan) {
473 u16 vid = le16_to_cpu(rx_desc->w.vlan);
475 if (vid != rx_ring->vid)
476 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
479 fm10k_type_trans(rx_ring, rx_desc, skb);
485 * fm10k_is_non_eop - process handling of non-EOP buffers
486 * @rx_ring: Rx ring being processed
487 * @rx_desc: Rx descriptor for current buffer
489 * This function updates next to clean. If the buffer is an EOP buffer
490 * this function exits returning false, otherwise it will place the
491 * sk_buff in the next buffer to be chained and return true indicating
492 * that this is in fact a non-EOP buffer.
494 static bool fm10k_is_non_eop(struct fm10k_ring *rx_ring,
495 union fm10k_rx_desc *rx_desc)
497 u32 ntc = rx_ring->next_to_clean + 1;
499 /* fetch, update, and store next to clean */
500 ntc = (ntc < rx_ring->count) ? ntc : 0;
501 rx_ring->next_to_clean = ntc;
503 prefetch(FM10K_RX_DESC(rx_ring, ntc));
505 if (likely(fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_EOP)))
512 * fm10k_pull_tail - fm10k specific version of skb_pull_tail
513 * @rx_ring: rx descriptor ring packet is being transacted on
514 * @rx_desc: pointer to the EOP Rx descriptor
515 * @skb: pointer to current skb being adjusted
517 * This function is an fm10k specific version of __pskb_pull_tail. The
518 * main difference between this version and the original function is that
519 * this function can make several assumptions about the state of things
520 * that allow for significant optimizations versus the standard function.
521 * As a result we can do things like drop a frag and maintain an accurate
522 * truesize for the skb.
524 static void fm10k_pull_tail(struct fm10k_ring *rx_ring,
525 union fm10k_rx_desc *rx_desc,
528 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
530 unsigned int pull_len;
532 /* it is valid to use page_address instead of kmap since we are
533 * working with pages allocated out of the lomem pool per
534 * alloc_page(GFP_ATOMIC)
536 va = skb_frag_address(frag);
538 /* we need the header to contain the greater of either ETH_HLEN or
539 * 60 bytes if the skb->len is less than 60 for skb_pad.
541 pull_len = eth_get_headlen(va, FM10K_RX_HDR_LEN);
543 /* align pull length to size of long to optimize memcpy performance */
544 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
546 /* update all of the pointers */
547 skb_frag_size_sub(frag, pull_len);
548 frag->page_offset += pull_len;
549 skb->data_len -= pull_len;
550 skb->tail += pull_len;
554 * fm10k_cleanup_headers - Correct corrupted or empty headers
555 * @rx_ring: rx descriptor ring packet is being transacted on
556 * @rx_desc: pointer to the EOP Rx descriptor
557 * @skb: pointer to current skb being fixed
559 * Address the case where we are pulling data in on pages only
560 * and as such no data is present in the skb header.
562 * In addition if skb is not at least 60 bytes we need to pad it so that
563 * it is large enough to qualify as a valid Ethernet frame.
565 * Returns true if an error was encountered and skb was freed.
567 static bool fm10k_cleanup_headers(struct fm10k_ring *rx_ring,
568 union fm10k_rx_desc *rx_desc,
571 if (unlikely((fm10k_test_staterr(rx_desc,
572 FM10K_RXD_STATUS_RXE)))) {
573 dev_kfree_skb_any(skb);
574 rx_ring->rx_stats.errors++;
578 /* place header in linear portion of buffer */
579 if (skb_is_nonlinear(skb))
580 fm10k_pull_tail(rx_ring, rx_desc, skb);
582 /* if skb_pad returns an error the skb was freed */
583 if (unlikely(skb->len < 60)) {
584 int pad_len = 60 - skb->len;
586 if (skb_pad(skb, pad_len))
588 __skb_put(skb, pad_len);
595 * fm10k_receive_skb - helper function to handle rx indications
596 * @q_vector: structure containing interrupt and ring information
597 * @skb: packet to send up
599 static void fm10k_receive_skb(struct fm10k_q_vector *q_vector,
602 napi_gro_receive(&q_vector->napi, skb);
605 static bool fm10k_clean_rx_irq(struct fm10k_q_vector *q_vector,
606 struct fm10k_ring *rx_ring,
609 struct sk_buff *skb = rx_ring->skb;
610 unsigned int total_bytes = 0, total_packets = 0;
611 u16 cleaned_count = fm10k_desc_unused(rx_ring);
614 union fm10k_rx_desc *rx_desc;
616 /* return some buffers to hardware, one at a time is too slow */
617 if (cleaned_count >= FM10K_RX_BUFFER_WRITE) {
618 fm10k_alloc_rx_buffers(rx_ring, cleaned_count);
622 rx_desc = FM10K_RX_DESC(rx_ring, rx_ring->next_to_clean);
624 if (!fm10k_test_staterr(rx_desc, FM10K_RXD_STATUS_DD))
627 /* This memory barrier is needed to keep us from reading
628 * any other fields out of the rx_desc until we know the
629 * RXD_STATUS_DD bit is set
633 /* retrieve a buffer from the ring */
634 skb = fm10k_fetch_rx_buffer(rx_ring, rx_desc, skb);
636 /* exit if we failed to retrieve a buffer */
642 /* fetch next buffer in frame if non-eop */
643 if (fm10k_is_non_eop(rx_ring, rx_desc))
646 /* verify the packet layout is correct */
647 if (fm10k_cleanup_headers(rx_ring, rx_desc, skb)) {
652 /* populate checksum, timestamp, VLAN, and protocol */
653 total_bytes += fm10k_process_skb_fields(rx_ring, rx_desc, skb);
655 fm10k_receive_skb(q_vector, skb);
657 /* reset skb pointer */
660 /* update budget accounting */
662 } while (likely(total_packets < budget));
664 /* place incomplete frames back on ring for completion */
667 u64_stats_update_begin(&rx_ring->syncp);
668 rx_ring->stats.packets += total_packets;
669 rx_ring->stats.bytes += total_bytes;
670 u64_stats_update_end(&rx_ring->syncp);
671 q_vector->rx.total_packets += total_packets;
672 q_vector->rx.total_bytes += total_bytes;
674 return total_packets < budget;
677 #define VXLAN_HLEN (sizeof(struct udphdr) + 8)
678 static struct ethhdr *fm10k_port_is_vxlan(struct sk_buff *skb)
680 struct fm10k_intfc *interface = netdev_priv(skb->dev);
681 struct fm10k_vxlan_port *vxlan_port;
683 /* we can only offload a vxlan if we recognize it as such */
684 vxlan_port = list_first_entry_or_null(&interface->vxlan_port,
685 struct fm10k_vxlan_port, list);
689 if (vxlan_port->port != udp_hdr(skb)->dest)
692 /* return offset of udp_hdr plus 8 bytes for VXLAN header */
693 return (struct ethhdr *)(skb_transport_header(skb) + VXLAN_HLEN);
696 #define FM10K_NVGRE_RESERVED0_FLAGS htons(0x9FFF)
697 #define NVGRE_TNI htons(0x2000)
698 struct fm10k_nvgre_hdr {
704 static struct ethhdr *fm10k_gre_is_nvgre(struct sk_buff *skb)
706 struct fm10k_nvgre_hdr *nvgre_hdr;
707 int hlen = ip_hdrlen(skb);
709 /* currently only IPv4 is supported due to hlen above */
710 if (vlan_get_protocol(skb) != htons(ETH_P_IP))
713 /* our transport header should be NVGRE */
714 nvgre_hdr = (struct fm10k_nvgre_hdr *)(skb_network_header(skb) + hlen);
716 /* verify all reserved flags are 0 */
717 if (nvgre_hdr->flags & FM10K_NVGRE_RESERVED0_FLAGS)
720 /* verify protocol is transparent Ethernet bridging */
721 if (nvgre_hdr->proto != htons(ETH_P_TEB))
724 /* report start of ethernet header */
725 if (nvgre_hdr->flags & NVGRE_TNI)
726 return (struct ethhdr *)(nvgre_hdr + 1);
728 return (struct ethhdr *)(&nvgre_hdr->tni);
731 static __be16 fm10k_tx_encap_offload(struct sk_buff *skb)
733 struct ethhdr *eth_hdr;
736 switch (vlan_get_protocol(skb)) {
737 case htons(ETH_P_IP):
738 l4_hdr = ip_hdr(skb)->protocol;
740 case htons(ETH_P_IPV6):
741 l4_hdr = ipv6_hdr(skb)->nexthdr;
749 eth_hdr = fm10k_port_is_vxlan(skb);
752 eth_hdr = fm10k_gre_is_nvgre(skb);
761 switch (eth_hdr->h_proto) {
762 case htons(ETH_P_IP):
763 case htons(ETH_P_IPV6):
769 return eth_hdr->h_proto;
772 static int fm10k_tso(struct fm10k_ring *tx_ring,
773 struct fm10k_tx_buffer *first)
775 struct sk_buff *skb = first->skb;
776 struct fm10k_tx_desc *tx_desc;
780 if (skb->ip_summed != CHECKSUM_PARTIAL)
783 if (!skb_is_gso(skb))
786 /* compute header lengths */
787 if (skb->encapsulation) {
788 if (!fm10k_tx_encap_offload(skb))
790 th = skb_inner_transport_header(skb);
792 th = skb_transport_header(skb);
795 /* compute offset from SOF to transport header and add header len */
796 hdrlen = (th - skb->data) + (((struct tcphdr *)th)->doff << 2);
798 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
800 /* update gso size and bytecount with header size */
801 first->gso_segs = skb_shinfo(skb)->gso_segs;
802 first->bytecount += (first->gso_segs - 1) * hdrlen;
804 /* populate Tx descriptor header size and mss */
805 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
806 tx_desc->hdrlen = hdrlen;
807 tx_desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
811 tx_ring->netdev->features &= ~NETIF_F_GSO_UDP_TUNNEL;
812 if (!net_ratelimit())
813 netdev_err(tx_ring->netdev,
814 "TSO requested for unsupported tunnel, disabling offload\n");
818 static void fm10k_tx_csum(struct fm10k_ring *tx_ring,
819 struct fm10k_tx_buffer *first)
821 struct sk_buff *skb = first->skb;
822 struct fm10k_tx_desc *tx_desc;
825 struct ipv6hdr *ipv6;
831 if (skb->ip_summed != CHECKSUM_PARTIAL)
834 if (skb->encapsulation) {
835 protocol = fm10k_tx_encap_offload(skb);
837 if (skb_checksum_help(skb)) {
838 dev_warn(tx_ring->dev,
839 "failed to offload encap csum!\n");
840 tx_ring->tx_stats.csum_err++;
844 network_hdr.raw = skb_inner_network_header(skb);
846 protocol = vlan_get_protocol(skb);
847 network_hdr.raw = skb_network_header(skb);
851 case htons(ETH_P_IP):
852 l4_hdr = network_hdr.ipv4->protocol;
854 case htons(ETH_P_IPV6):
855 l4_hdr = network_hdr.ipv6->nexthdr;
858 if (unlikely(net_ratelimit())) {
859 dev_warn(tx_ring->dev,
860 "partial checksum but ip version=%x!\n",
863 tx_ring->tx_stats.csum_err++;
872 if (skb->encapsulation)
875 if (unlikely(net_ratelimit())) {
876 dev_warn(tx_ring->dev,
877 "partial checksum but l4 proto=%x!\n",
880 tx_ring->tx_stats.csum_err++;
884 /* update TX checksum flag */
885 first->tx_flags |= FM10K_TX_FLAGS_CSUM;
888 /* populate Tx descriptor header size and mss */
889 tx_desc = FM10K_TX_DESC(tx_ring, tx_ring->next_to_use);
894 #define FM10K_SET_FLAG(_input, _flag, _result) \
895 ((_flag <= _result) ? \
896 ((u32)(_input & _flag) * (_result / _flag)) : \
897 ((u32)(_input & _flag) / (_flag / _result)))
899 static u8 fm10k_tx_desc_flags(struct sk_buff *skb, u32 tx_flags)
901 /* set type for advanced descriptor with frame checksum insertion */
904 /* set timestamping bits */
905 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
906 likely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS))
907 desc_flags |= FM10K_TXD_FLAG_TIME;
909 /* set checksum offload bits */
910 desc_flags |= FM10K_SET_FLAG(tx_flags, FM10K_TX_FLAGS_CSUM,
911 FM10K_TXD_FLAG_CSUM);
916 static bool fm10k_tx_desc_push(struct fm10k_ring *tx_ring,
917 struct fm10k_tx_desc *tx_desc, u16 i,
918 dma_addr_t dma, unsigned int size, u8 desc_flags)
920 /* set RS and INT for last frame in a cache line */
921 if ((++i & (FM10K_TXD_WB_FIFO_SIZE - 1)) == 0)
922 desc_flags |= FM10K_TXD_FLAG_RS | FM10K_TXD_FLAG_INT;
924 /* record values to descriptor */
925 tx_desc->buffer_addr = cpu_to_le64(dma);
926 tx_desc->flags = desc_flags;
927 tx_desc->buflen = cpu_to_le16(size);
929 /* return true if we just wrapped the ring */
930 return i == tx_ring->count;
933 static void fm10k_tx_map(struct fm10k_ring *tx_ring,
934 struct fm10k_tx_buffer *first)
936 struct sk_buff *skb = first->skb;
937 struct fm10k_tx_buffer *tx_buffer;
938 struct fm10k_tx_desc *tx_desc;
939 struct skb_frag_struct *frag;
942 unsigned int data_len, size;
943 u32 tx_flags = first->tx_flags;
944 u16 i = tx_ring->next_to_use;
945 u8 flags = fm10k_tx_desc_flags(skb, tx_flags);
947 tx_desc = FM10K_TX_DESC(tx_ring, i);
949 /* add HW VLAN tag */
950 if (vlan_tx_tag_present(skb))
951 tx_desc->vlan = cpu_to_le16(vlan_tx_tag_get(skb));
955 size = skb_headlen(skb);
958 dma = dma_map_single(tx_ring->dev, data, size, DMA_TO_DEVICE);
960 data_len = skb->data_len;
963 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
964 if (dma_mapping_error(tx_ring->dev, dma))
967 /* record length, and DMA address */
968 dma_unmap_len_set(tx_buffer, len, size);
969 dma_unmap_addr_set(tx_buffer, dma, dma);
971 while (unlikely(size > FM10K_MAX_DATA_PER_TXD)) {
972 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++, dma,
973 FM10K_MAX_DATA_PER_TXD, flags)) {
974 tx_desc = FM10K_TX_DESC(tx_ring, 0);
978 dma += FM10K_MAX_DATA_PER_TXD;
979 size -= FM10K_MAX_DATA_PER_TXD;
982 if (likely(!data_len))
985 if (fm10k_tx_desc_push(tx_ring, tx_desc++, i++,
987 tx_desc = FM10K_TX_DESC(tx_ring, 0);
991 size = skb_frag_size(frag);
994 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
997 tx_buffer = &tx_ring->tx_buffer[i];
1000 /* write last descriptor with LAST bit set */
1001 flags |= FM10K_TXD_FLAG_LAST;
1003 if (fm10k_tx_desc_push(tx_ring, tx_desc, i++, dma, size, flags))
1006 /* record bytecount for BQL */
1007 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
1009 /* record SW timestamp if HW timestamp is not available */
1010 skb_tx_timestamp(first->skb);
1012 /* Force memory writes to complete before letting h/w know there
1013 * are new descriptors to fetch. (Only applicable for weak-ordered
1014 * memory model archs, such as IA-64).
1016 * We also need this memory barrier to make certain all of the
1017 * status bits have been updated before next_to_watch is written.
1021 /* set next_to_watch value indicating a packet is present */
1022 first->next_to_watch = tx_desc;
1024 tx_ring->next_to_use = i;
1026 /* notify HW of packet */
1027 writel(i, tx_ring->tail);
1029 /* we need this if more than one processor can write to our tail
1030 * at a time, it synchronizes IO on IA64/Altix systems
1036 dev_err(tx_ring->dev, "TX DMA map failed\n");
1038 /* clear dma mappings for failed tx_buffer map */
1040 tx_buffer = &tx_ring->tx_buffer[i];
1041 fm10k_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1042 if (tx_buffer == first)
1049 tx_ring->next_to_use = i;
1052 static int __fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
1054 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1058 /* We need to check again in a case another CPU has just
1059 * made room available. */
1060 if (likely(fm10k_desc_unused(tx_ring) < size))
1063 /* A reprieve! - use start_queue because it doesn't call schedule */
1064 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
1065 ++tx_ring->tx_stats.restart_queue;
1069 static inline int fm10k_maybe_stop_tx(struct fm10k_ring *tx_ring, u16 size)
1071 if (likely(fm10k_desc_unused(tx_ring) >= size))
1073 return __fm10k_maybe_stop_tx(tx_ring, size);
1076 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
1077 struct fm10k_ring *tx_ring)
1079 struct fm10k_tx_buffer *first;
1082 #if PAGE_SIZE > FM10K_MAX_DATA_PER_TXD
1085 u16 count = TXD_USE_COUNT(skb_headlen(skb));
1087 /* need: 1 descriptor per page * PAGE_SIZE/FM10K_MAX_DATA_PER_TXD,
1088 * + 1 desc for skb_headlen/FM10K_MAX_DATA_PER_TXD,
1089 * + 2 desc gap to keep tail from touching head
1090 * otherwise try next time
1092 #if PAGE_SIZE > FM10K_MAX_DATA_PER_TXD
1093 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
1094 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
1096 count += skb_shinfo(skb)->nr_frags;
1098 if (fm10k_maybe_stop_tx(tx_ring, count + 3)) {
1099 tx_ring->tx_stats.tx_busy++;
1100 return NETDEV_TX_BUSY;
1103 /* record the location of the first descriptor for this packet */
1104 first = &tx_ring->tx_buffer[tx_ring->next_to_use];
1106 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
1107 first->gso_segs = 1;
1109 /* record initial flags and protocol */
1110 first->tx_flags = tx_flags;
1112 tso = fm10k_tso(tx_ring, first);
1116 fm10k_tx_csum(tx_ring, first);
1118 fm10k_tx_map(tx_ring, first);
1120 fm10k_maybe_stop_tx(tx_ring, DESC_NEEDED);
1122 return NETDEV_TX_OK;
1125 dev_kfree_skb_any(first->skb);
1128 return NETDEV_TX_OK;
1131 static u64 fm10k_get_tx_completed(struct fm10k_ring *ring)
1133 return ring->stats.packets;
1136 static u64 fm10k_get_tx_pending(struct fm10k_ring *ring)
1138 /* use SW head and tail until we have real hardware */
1139 u32 head = ring->next_to_clean;
1140 u32 tail = ring->next_to_use;
1142 return ((head <= tail) ? tail : tail + ring->count) - head;
1145 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring)
1147 u32 tx_done = fm10k_get_tx_completed(tx_ring);
1148 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1149 u32 tx_pending = fm10k_get_tx_pending(tx_ring);
1151 clear_check_for_tx_hang(tx_ring);
1153 /* Check for a hung queue, but be thorough. This verifies
1154 * that a transmit has been completed since the previous
1155 * check AND there is at least one packet pending. By
1156 * requiring this to fail twice we avoid races with
1157 * clearing the ARMED bit and conditions where we
1158 * run the check_tx_hang logic with a transmit completion
1159 * pending but without time to complete it yet.
1161 if (!tx_pending || (tx_done_old != tx_done)) {
1162 /* update completed stats and continue */
1163 tx_ring->tx_stats.tx_done_old = tx_done;
1164 /* reset the countdown */
1165 clear_bit(__FM10K_HANG_CHECK_ARMED, &tx_ring->state);
1170 /* make sure it is true for two checks in a row */
1171 return test_and_set_bit(__FM10K_HANG_CHECK_ARMED, &tx_ring->state);
1175 * fm10k_tx_timeout_reset - initiate reset due to Tx timeout
1176 * @interface: driver private struct
1178 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface)
1180 /* Do the reset outside of interrupt context */
1181 if (!test_bit(__FM10K_DOWN, &interface->state)) {
1182 netdev_err(interface->netdev, "Reset interface\n");
1183 interface->tx_timeout_count++;
1184 interface->flags |= FM10K_FLAG_RESET_REQUESTED;
1185 fm10k_service_event_schedule(interface);
1190 * fm10k_clean_tx_irq - Reclaim resources after transmit completes
1191 * @q_vector: structure containing interrupt and ring information
1192 * @tx_ring: tx ring to clean
1194 static bool fm10k_clean_tx_irq(struct fm10k_q_vector *q_vector,
1195 struct fm10k_ring *tx_ring)
1197 struct fm10k_intfc *interface = q_vector->interface;
1198 struct fm10k_tx_buffer *tx_buffer;
1199 struct fm10k_tx_desc *tx_desc;
1200 unsigned int total_bytes = 0, total_packets = 0;
1201 unsigned int budget = q_vector->tx.work_limit;
1202 unsigned int i = tx_ring->next_to_clean;
1204 if (test_bit(__FM10K_DOWN, &interface->state))
1207 tx_buffer = &tx_ring->tx_buffer[i];
1208 tx_desc = FM10K_TX_DESC(tx_ring, i);
1209 i -= tx_ring->count;
1212 struct fm10k_tx_desc *eop_desc = tx_buffer->next_to_watch;
1214 /* if next_to_watch is not set then there is no work pending */
1218 /* prevent any other reads prior to eop_desc */
1219 read_barrier_depends();
1221 /* if DD is not set pending work has not been completed */
1222 if (!(eop_desc->flags & FM10K_TXD_FLAG_DONE))
1225 /* clear next_to_watch to prevent false hangs */
1226 tx_buffer->next_to_watch = NULL;
1228 /* update the statistics for this packet */
1229 total_bytes += tx_buffer->bytecount;
1230 total_packets += tx_buffer->gso_segs;
1233 dev_consume_skb_any(tx_buffer->skb);
1235 /* unmap skb header data */
1236 dma_unmap_single(tx_ring->dev,
1237 dma_unmap_addr(tx_buffer, dma),
1238 dma_unmap_len(tx_buffer, len),
1241 /* clear tx_buffer data */
1242 tx_buffer->skb = NULL;
1243 dma_unmap_len_set(tx_buffer, len, 0);
1245 /* unmap remaining buffers */
1246 while (tx_desc != eop_desc) {
1251 i -= tx_ring->count;
1252 tx_buffer = tx_ring->tx_buffer;
1253 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1256 /* unmap any remaining paged data */
1257 if (dma_unmap_len(tx_buffer, len)) {
1258 dma_unmap_page(tx_ring->dev,
1259 dma_unmap_addr(tx_buffer, dma),
1260 dma_unmap_len(tx_buffer, len),
1262 dma_unmap_len_set(tx_buffer, len, 0);
1266 /* move us one more past the eop_desc for start of next pkt */
1271 i -= tx_ring->count;
1272 tx_buffer = tx_ring->tx_buffer;
1273 tx_desc = FM10K_TX_DESC(tx_ring, 0);
1276 /* issue prefetch for next Tx descriptor */
1279 /* update budget accounting */
1281 } while (likely(budget));
1283 i += tx_ring->count;
1284 tx_ring->next_to_clean = i;
1285 u64_stats_update_begin(&tx_ring->syncp);
1286 tx_ring->stats.bytes += total_bytes;
1287 tx_ring->stats.packets += total_packets;
1288 u64_stats_update_end(&tx_ring->syncp);
1289 q_vector->tx.total_bytes += total_bytes;
1290 q_vector->tx.total_packets += total_packets;
1292 if (check_for_tx_hang(tx_ring) && fm10k_check_tx_hang(tx_ring)) {
1293 /* schedule immediate reset if we believe we hung */
1294 struct fm10k_hw *hw = &interface->hw;
1296 netif_err(interface, drv, tx_ring->netdev,
1297 "Detected Tx Unit Hang\n"
1299 " TDH, TDT <%x>, <%x>\n"
1300 " next_to_use <%x>\n"
1301 " next_to_clean <%x>\n",
1302 tx_ring->queue_index,
1303 fm10k_read_reg(hw, FM10K_TDH(tx_ring->reg_idx)),
1304 fm10k_read_reg(hw, FM10K_TDT(tx_ring->reg_idx)),
1305 tx_ring->next_to_use, i);
1307 netif_stop_subqueue(tx_ring->netdev,
1308 tx_ring->queue_index);
1310 netif_info(interface, probe, tx_ring->netdev,
1311 "tx hang %d detected on queue %d, resetting interface\n",
1312 interface->tx_timeout_count + 1,
1313 tx_ring->queue_index);
1315 fm10k_tx_timeout_reset(interface);
1317 /* the netdev is about to reset, no point in enabling stuff */
1321 /* notify netdev of completed buffers */
1322 netdev_tx_completed_queue(txring_txq(tx_ring),
1323 total_packets, total_bytes);
1325 #define TX_WAKE_THRESHOLD min_t(u16, FM10K_MIN_TXD - 1, DESC_NEEDED * 2)
1326 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1327 (fm10k_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1328 /* Make sure that anybody stopping the queue after this
1329 * sees the new next_to_clean.
1332 if (__netif_subqueue_stopped(tx_ring->netdev,
1333 tx_ring->queue_index) &&
1334 !test_bit(__FM10K_DOWN, &interface->state)) {
1335 netif_wake_subqueue(tx_ring->netdev,
1336 tx_ring->queue_index);
1337 ++tx_ring->tx_stats.restart_queue;
1345 * fm10k_update_itr - update the dynamic ITR value based on packet size
1347 * Stores a new ITR value based on strictly on packet size. The
1348 * divisors and thresholds used by this function were determined based
1349 * on theoretical maximum wire speed and testing data, in order to
1350 * minimize response time while increasing bulk throughput.
1352 * @ring_container: Container for rings to have ITR updated
1354 static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
1356 unsigned int avg_wire_size, packets;
1358 /* Only update ITR if we are using adaptive setting */
1359 if (!(ring_container->itr & FM10K_ITR_ADAPTIVE))
1362 packets = ring_container->total_packets;
1366 avg_wire_size = ring_container->total_bytes / packets;
1368 /* Add 24 bytes to size to account for CRC, preamble, and gap */
1369 avg_wire_size += 24;
1371 /* Don't starve jumbo frames */
1372 if (avg_wire_size > 3000)
1373 avg_wire_size = 3000;
1375 /* Give a little boost to mid-size frames */
1376 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
1381 /* write back value and retain adaptive flag */
1382 ring_container->itr = avg_wire_size | FM10K_ITR_ADAPTIVE;
1385 ring_container->total_bytes = 0;
1386 ring_container->total_packets = 0;
1389 static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
1391 /* Enable auto-mask and clear the current mask */
1392 u32 itr = FM10K_ITR_ENABLE;
1395 fm10k_update_itr(&q_vector->tx);
1398 fm10k_update_itr(&q_vector->rx);
1400 /* Store Tx itr in timer slot 0 */
1401 itr |= (q_vector->tx.itr & FM10K_ITR_MAX);
1403 /* Shift Rx itr to timer slot 1 */
1404 itr |= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;
1406 /* Write the final value to the ITR register */
1407 writel(itr, q_vector->itr);
1410 static int fm10k_poll(struct napi_struct *napi, int budget)
1412 struct fm10k_q_vector *q_vector =
1413 container_of(napi, struct fm10k_q_vector, napi);
1414 struct fm10k_ring *ring;
1415 int per_ring_budget;
1416 bool clean_complete = true;
1418 fm10k_for_each_ring(ring, q_vector->tx)
1419 clean_complete &= fm10k_clean_tx_irq(q_vector, ring);
1421 /* attempt to distribute budget to each queue fairly, but don't
1422 * allow the budget to go below 1 because we'll exit polling
1424 if (q_vector->rx.count > 1)
1425 per_ring_budget = max(budget/q_vector->rx.count, 1);
1427 per_ring_budget = budget;
1429 fm10k_for_each_ring(ring, q_vector->rx)
1430 clean_complete &= fm10k_clean_rx_irq(q_vector, ring,
1433 /* If all work not completed, return budget and keep polling */
1434 if (!clean_complete)
1437 /* all work done, exit the polling mode */
1438 napi_complete(napi);
1440 /* re-enable the q_vector */
1441 fm10k_qv_enable(q_vector);
1447 * fm10k_set_qos_queues: Allocate queues for a QOS-enabled device
1448 * @interface: board private structure to initialize
1450 * When QoS (Quality of Service) is enabled, allocate queues for
1451 * each traffic class. If multiqueue isn't available,then abort QoS
1454 * This function handles all combinations of Qos and RSS.
1457 static bool fm10k_set_qos_queues(struct fm10k_intfc *interface)
1459 struct net_device *dev = interface->netdev;
1460 struct fm10k_ring_feature *f;
1464 /* Map queue offset and counts onto allocated tx queues */
1465 pcs = netdev_get_num_tc(dev);
1470 /* set QoS mask and indices */
1471 f = &interface->ring_feature[RING_F_QOS];
1473 f->mask = (1 << fls(pcs - 1)) - 1;
1475 /* determine the upper limit for our current DCB mode */
1476 rss_i = interface->hw.mac.max_queues / pcs;
1477 rss_i = 1 << (fls(rss_i) - 1);
1479 /* set RSS mask and indices */
1480 f = &interface->ring_feature[RING_F_RSS];
1481 rss_i = min_t(u16, rss_i, f->limit);
1483 f->mask = (1 << fls(rss_i - 1)) - 1;
1485 /* configure pause class to queue mapping */
1486 for (i = 0; i < pcs; i++)
1487 netdev_set_tc_queue(dev, i, rss_i, rss_i * i);
1489 interface->num_rx_queues = rss_i * pcs;
1490 interface->num_tx_queues = rss_i * pcs;
1496 * fm10k_set_rss_queues: Allocate queues for RSS
1497 * @interface: board private structure to initialize
1499 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
1500 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
1503 static bool fm10k_set_rss_queues(struct fm10k_intfc *interface)
1505 struct fm10k_ring_feature *f;
1508 f = &interface->ring_feature[RING_F_RSS];
1509 rss_i = min_t(u16, interface->hw.mac.max_queues, f->limit);
1511 /* record indices and power of 2 mask for RSS */
1513 f->mask = (1 << fls(rss_i - 1)) - 1;
1515 interface->num_rx_queues = rss_i;
1516 interface->num_tx_queues = rss_i;
1522 * fm10k_set_num_queues: Allocate queues for device, feature dependent
1523 * @interface: board private structure to initialize
1525 * This is the top level queue allocation routine. The order here is very
1526 * important, starting with the "most" number of features turned on at once,
1527 * and ending with the smallest set of features. This way large combinations
1528 * can be allocated if they're turned on, and smaller combinations are the
1529 * fallthrough conditions.
1532 static void fm10k_set_num_queues(struct fm10k_intfc *interface)
1534 /* Start with base case */
1535 interface->num_rx_queues = 1;
1536 interface->num_tx_queues = 1;
1538 if (fm10k_set_qos_queues(interface))
1541 fm10k_set_rss_queues(interface);
1545 * fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
1546 * @interface: board private structure to initialize
1547 * @v_count: q_vectors allocated on interface, used for ring interleaving
1548 * @v_idx: index of vector in interface struct
1549 * @txr_count: total number of Tx rings to allocate
1550 * @txr_idx: index of first Tx ring to allocate
1551 * @rxr_count: total number of Rx rings to allocate
1552 * @rxr_idx: index of first Rx ring to allocate
1554 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1556 static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
1557 unsigned int v_count, unsigned int v_idx,
1558 unsigned int txr_count, unsigned int txr_idx,
1559 unsigned int rxr_count, unsigned int rxr_idx)
1561 struct fm10k_q_vector *q_vector;
1562 struct fm10k_ring *ring;
1563 int ring_count, size;
1565 ring_count = txr_count + rxr_count;
1566 size = sizeof(struct fm10k_q_vector) +
1567 (sizeof(struct fm10k_ring) * ring_count);
1569 /* allocate q_vector and rings */
1570 q_vector = kzalloc(size, GFP_KERNEL);
1574 /* initialize NAPI */
1575 netif_napi_add(interface->netdev, &q_vector->napi,
1576 fm10k_poll, NAPI_POLL_WEIGHT);
1578 /* tie q_vector and interface together */
1579 interface->q_vector[v_idx] = q_vector;
1580 q_vector->interface = interface;
1581 q_vector->v_idx = v_idx;
1583 /* initialize pointer to rings */
1584 ring = q_vector->ring;
1586 /* save Tx ring container info */
1587 q_vector->tx.ring = ring;
1588 q_vector->tx.work_limit = FM10K_DEFAULT_TX_WORK;
1589 q_vector->tx.itr = interface->tx_itr;
1590 q_vector->tx.count = txr_count;
1593 /* assign generic ring traits */
1594 ring->dev = &interface->pdev->dev;
1595 ring->netdev = interface->netdev;
1597 /* configure backlink on ring */
1598 ring->q_vector = q_vector;
1600 /* apply Tx specific ring traits */
1601 ring->count = interface->tx_ring_count;
1602 ring->queue_index = txr_idx;
1604 /* assign ring to interface */
1605 interface->tx_ring[txr_idx] = ring;
1607 /* update count and index */
1611 /* push pointer to next ring */
1615 /* save Rx ring container info */
1616 q_vector->rx.ring = ring;
1617 q_vector->rx.itr = interface->rx_itr;
1618 q_vector->rx.count = rxr_count;
1621 /* assign generic ring traits */
1622 ring->dev = &interface->pdev->dev;
1623 ring->netdev = interface->netdev;
1624 rcu_assign_pointer(ring->l2_accel, interface->l2_accel);
1626 /* configure backlink on ring */
1627 ring->q_vector = q_vector;
1629 /* apply Rx specific ring traits */
1630 ring->count = interface->rx_ring_count;
1631 ring->queue_index = rxr_idx;
1633 /* assign ring to interface */
1634 interface->rx_ring[rxr_idx] = ring;
1636 /* update count and index */
1640 /* push pointer to next ring */
1644 fm10k_dbg_q_vector_init(q_vector);
1650 * fm10k_free_q_vector - Free memory allocated for specific interrupt vector
1651 * @interface: board private structure to initialize
1652 * @v_idx: Index of vector to be freed
1654 * This function frees the memory allocated to the q_vector. In addition if
1655 * NAPI is enabled it will delete any references to the NAPI struct prior
1656 * to freeing the q_vector.
1658 static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
1660 struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];
1661 struct fm10k_ring *ring;
1663 fm10k_dbg_q_vector_exit(q_vector);
1665 fm10k_for_each_ring(ring, q_vector->tx)
1666 interface->tx_ring[ring->queue_index] = NULL;
1668 fm10k_for_each_ring(ring, q_vector->rx)
1669 interface->rx_ring[ring->queue_index] = NULL;
1671 interface->q_vector[v_idx] = NULL;
1672 netif_napi_del(&q_vector->napi);
1673 kfree_rcu(q_vector, rcu);
1677 * fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
1678 * @interface: board private structure to initialize
1680 * We allocate one q_vector per queue interrupt. If allocation fails we
1683 static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
1685 unsigned int q_vectors = interface->num_q_vectors;
1686 unsigned int rxr_remaining = interface->num_rx_queues;
1687 unsigned int txr_remaining = interface->num_tx_queues;
1688 unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1691 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1692 for (; rxr_remaining; v_idx++) {
1693 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1698 /* update counts and index */
1704 for (; v_idx < q_vectors; v_idx++) {
1705 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1706 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1708 err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
1715 /* update counts and index */
1716 rxr_remaining -= rqpv;
1717 txr_remaining -= tqpv;
1725 interface->num_tx_queues = 0;
1726 interface->num_rx_queues = 0;
1727 interface->num_q_vectors = 0;
1730 fm10k_free_q_vector(interface, v_idx);
1736 * fm10k_free_q_vectors - Free memory allocated for interrupt vectors
1737 * @interface: board private structure to initialize
1739 * This function frees the memory allocated to the q_vectors. In addition if
1740 * NAPI is enabled it will delete any references to the NAPI struct prior
1741 * to freeing the q_vector.
1743 static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
1745 int v_idx = interface->num_q_vectors;
1747 interface->num_tx_queues = 0;
1748 interface->num_rx_queues = 0;
1749 interface->num_q_vectors = 0;
1752 fm10k_free_q_vector(interface, v_idx);
1756 * f10k_reset_msix_capability - reset MSI-X capability
1757 * @interface: board private structure to initialize
1759 * Reset the MSI-X capability back to its starting state
1761 static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
1763 pci_disable_msix(interface->pdev);
1764 kfree(interface->msix_entries);
1765 interface->msix_entries = NULL;
1769 * f10k_init_msix_capability - configure MSI-X capability
1770 * @interface: board private structure to initialize
1772 * Attempt to configure the interrupts using the best available
1773 * capabilities of the hardware and the kernel.
1775 static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
1777 struct fm10k_hw *hw = &interface->hw;
1778 int v_budget, vector;
1780 /* It's easy to be greedy for MSI-X vectors, but it really
1781 * doesn't do us much good if we have a lot more vectors
1782 * than CPU's. So let's be conservative and only ask for
1783 * (roughly) the same number of vectors as there are CPU's.
1784 * the default is to use pairs of vectors
1786 v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
1787 v_budget = min_t(u16, v_budget, num_online_cpus());
1789 /* account for vectors not related to queues */
1790 v_budget += NON_Q_VECTORS(hw);
1792 /* At the same time, hardware can only support a maximum of
1793 * hw.mac->max_msix_vectors vectors. With features
1794 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
1795 * descriptor queues supported by our device. Thus, we cap it off in
1796 * those rare cases where the cpu count also exceeds our vector limit.
1798 v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);
1800 /* A failure in MSI-X entry allocation is fatal. */
1801 interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
1803 if (!interface->msix_entries)
1806 /* populate entry values */
1807 for (vector = 0; vector < v_budget; vector++)
1808 interface->msix_entries[vector].entry = vector;
1810 /* Attempt to enable MSI-X with requested value */
1811 v_budget = pci_enable_msix_range(interface->pdev,
1812 interface->msix_entries,
1816 kfree(interface->msix_entries);
1817 interface->msix_entries = NULL;
1821 /* record the number of queues available for q_vectors */
1822 interface->num_q_vectors = v_budget - NON_Q_VECTORS(hw);
1828 * fm10k_cache_ring_qos - Descriptor ring to register mapping for QoS
1829 * @interface: Interface structure continaining rings and devices
1831 * Cache the descriptor ring offsets for Qos
1833 static bool fm10k_cache_ring_qos(struct fm10k_intfc *interface)
1835 struct net_device *dev = interface->netdev;
1836 int pc, offset, rss_i, i, q_idx;
1837 u16 pc_stride = interface->ring_feature[RING_F_QOS].mask + 1;
1838 u8 num_pcs = netdev_get_num_tc(dev);
1843 rss_i = interface->ring_feature[RING_F_RSS].indices;
1845 for (pc = 0, offset = 0; pc < num_pcs; pc++, offset += rss_i) {
1847 for (i = 0; i < rss_i; i++) {
1848 interface->tx_ring[offset + i]->reg_idx = q_idx;
1849 interface->tx_ring[offset + i]->qos_pc = pc;
1850 interface->rx_ring[offset + i]->reg_idx = q_idx;
1851 interface->rx_ring[offset + i]->qos_pc = pc;
1860 * fm10k_cache_ring_rss - Descriptor ring to register mapping for RSS
1861 * @interface: Interface structure continaining rings and devices
1863 * Cache the descriptor ring offsets for RSS
1865 static void fm10k_cache_ring_rss(struct fm10k_intfc *interface)
1869 for (i = 0; i < interface->num_rx_queues; i++)
1870 interface->rx_ring[i]->reg_idx = i;
1872 for (i = 0; i < interface->num_tx_queues; i++)
1873 interface->tx_ring[i]->reg_idx = i;
1877 * fm10k_assign_rings - Map rings to network devices
1878 * @interface: Interface structure containing rings and devices
1880 * This function is meant to go though and configure both the network
1881 * devices so that they contain rings, and configure the rings so that
1882 * they function with their network devices.
1884 static void fm10k_assign_rings(struct fm10k_intfc *interface)
1886 if (fm10k_cache_ring_qos(interface))
1889 fm10k_cache_ring_rss(interface);
1892 static void fm10k_init_reta(struct fm10k_intfc *interface)
1894 u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
1897 /* If the netdev is initialized we have to maintain table if possible */
1898 if (interface->netdev->reg_state) {
1899 for (i = FM10K_RETA_SIZE; i--;) {
1900 reta = interface->reta[i];
1901 if ((((reta << 24) >> 24) < rss_i) &&
1902 (((reta << 16) >> 24) < rss_i) &&
1903 (((reta << 8) >> 24) < rss_i) &&
1904 (((reta) >> 24) < rss_i))
1906 goto repopulate_reta;
1909 /* do nothing if all of the elements are in bounds */
1914 /* Populate the redirection table 4 entries at a time. To do this
1915 * we are generating the results for n and n+2 and then interleaving
1916 * those with the results with n+1 and n+3.
1918 for (i = FM10K_RETA_SIZE; i--;) {
1919 /* first pass generates n and n+2 */
1920 base = ((i * 0x00040004) + 0x00020000) * rss_i;
1921 reta = (base & 0x3F803F80) >> 7;
1923 /* second pass generates n+1 and n+3 */
1924 base += 0x00010001 * rss_i;
1925 reta |= (base & 0x3F803F80) << 1;
1927 interface->reta[i] = reta;
1932 * fm10k_init_queueing_scheme - Determine proper queueing scheme
1933 * @interface: board private structure to initialize
1935 * We determine which queueing scheme to use based on...
1936 * - Hardware queue count (num_*_queues)
1937 * - defined by miscellaneous hardware support/features (RSS, etc.)
1939 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
1943 /* Number of supported queues */
1944 fm10k_set_num_queues(interface);
1946 /* Configure MSI-X capability */
1947 err = fm10k_init_msix_capability(interface);
1949 dev_err(&interface->pdev->dev,
1950 "Unable to initialize MSI-X capability\n");
1954 /* Allocate memory for queues */
1955 err = fm10k_alloc_q_vectors(interface);
1959 /* Map rings to devices, and map devices to physical queues */
1960 fm10k_assign_rings(interface);
1962 /* Initialize RSS redirection table */
1963 fm10k_init_reta(interface);
1969 * fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
1970 * @interface: board private structure to clear queueing scheme on
1972 * We go through and clear queueing specific resources and reset the structure
1973 * to pre-load conditions
1975 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
1977 fm10k_free_q_vectors(interface);
1978 fm10k_reset_msix_capability(interface);