drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #ifdef CONFIG_IGB_DCA
  54 #include <linux/dca.h>
  55 #endif
  56 #include <linux/i2c.h>
  57 #include "igb.h"
  58
  59 #define MAJ 5
  60 #define MIN 2
  61 #define BUILD 15
  62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  63 __stringify(BUILD) "-k"
  64 char igb_driver_name[] = "igb";
  65 char igb_driver_version[] = DRV_VERSION;
  66 static const char igb_driver_string[] =
  67                                 "Intel(R) Gigabit Ethernet Network Driver";
  68 static const char igb_copyright[] =
  69                                 "Copyright (c) 2007-2014 Intel Corporation.";
  70
  71 static const struct e1000_info *igb_info_tbl[] = {
  72         [board_82575] = &e1000_82575_info,
  73 };
  74
  75 static const struct pci_device_id igb_pci_tbl[] = {
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 111         /* required last entry */
 112         {0, }
 113 };
 114
 115 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 116
 117 static int igb_setup_all_tx_resources(struct igb_adapter *);
 118 static int igb_setup_all_rx_resources(struct igb_adapter *);
 119 static void igb_free_all_tx_resources(struct igb_adapter *);
 120 static void igb_free_all_rx_resources(struct igb_adapter *);
 121 static void igb_setup_mrqc(struct igb_adapter *);
 122 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 123 static void igb_remove(struct pci_dev *pdev);
 124 static int igb_sw_init(struct igb_adapter *);
 125 static int igb_open(struct net_device *);
 126 static int igb_close(struct net_device *);
 127 static void igb_configure(struct igb_adapter *);
 128 static void igb_configure_tx(struct igb_adapter *);
 129 static void igb_configure_rx(struct igb_adapter *);
 130 static void igb_clean_all_tx_rings(struct igb_adapter *);
 131 static void igb_clean_all_rx_rings(struct igb_adapter *);
 132 static void igb_clean_tx_ring(struct igb_ring *);
 133 static void igb_clean_rx_ring(struct igb_ring *);
 134 static void igb_set_rx_mode(struct net_device *);
 135 static void igb_update_phy_info(unsigned long);
 136 static void igb_watchdog(unsigned long);
 137 static void igb_watchdog_task(struct work_struct *);
 138 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 139 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 140                                           struct rtnl_link_stats64 *stats);
 141 static int igb_change_mtu(struct net_device *, int);
 142 static int igb_set_mac(struct net_device *, void *);
 143 static void igb_set_uta(struct igb_adapter *adapter);
 144 static irqreturn_t igb_intr(int irq, void *);
 145 static irqreturn_t igb_intr_msi(int irq, void *);
 146 static irqreturn_t igb_msix_other(int irq, void *);
 147 static irqreturn_t igb_msix_ring(int irq, void *);
 148 #ifdef CONFIG_IGB_DCA
 149 static void igb_update_dca(struct igb_q_vector *);
 150 static void igb_setup_dca(struct igb_adapter *);
 151 #endif /* CONFIG_IGB_DCA */
 152 static int igb_poll(struct napi_struct *, int);
 153 static bool igb_clean_tx_irq(struct igb_q_vector *);
 154 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 155 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 156 static void igb_tx_timeout(struct net_device *);
 157 static void igb_reset_task(struct work_struct *);
 158 static void igb_vlan_mode(struct net_device *netdev,
 159                           netdev_features_t features);
 160 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 161 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 162 static void igb_restore_vlan(struct igb_adapter *);
 163 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 164 static void igb_ping_all_vfs(struct igb_adapter *);
 165 static void igb_msg_task(struct igb_adapter *);
 166 static void igb_vmm_control(struct igb_adapter *);
 167 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 168 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 169 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 170 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 171                                int vf, u16 vlan, u8 qos);
 172 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 173 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 174                                    bool setting);
 175 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 176                                  struct ifla_vf_info *ivi);
 177 static void igb_check_vf_rate_limit(struct igb_adapter *);
 178
 179 #ifdef CONFIG_PCI_IOV
 180 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 181 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 182 #endif
 183
 184 #ifdef CONFIG_PM
 185 #ifdef CONFIG_PM_SLEEP
 186 static int igb_suspend(struct device *);
 187 #endif
 188 static int igb_resume(struct device *);
 189 #ifdef CONFIG_PM_RUNTIME
 190 static int igb_runtime_suspend(struct device *dev);
 191 static int igb_runtime_resume(struct device *dev);
 192 static int igb_runtime_idle(struct device *dev);
 193 #endif
 194 static const struct dev_pm_ops igb_pm_ops = {
 195         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 196         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 197                         igb_runtime_idle)
 198 };
 199 #endif
 200 static void igb_shutdown(struct pci_dev *);
 201 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 202 #ifdef CONFIG_IGB_DCA
 203 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 204 static struct notifier_block dca_notifier = {
 205         .notifier_call  = igb_notify_dca,
 206         .next           = NULL,
 207         .priority       = 0
 208 };
 209 #endif
 210 #ifdef CONFIG_NET_POLL_CONTROLLER
 211 /* for netdump / net console */
 212 static void igb_netpoll(struct net_device *);
 213 #endif
 214 #ifdef CONFIG_PCI_IOV
 215 static unsigned int max_vfs;
 216 module_param(max_vfs, uint, 0);
 217 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 218 #endif /* CONFIG_PCI_IOV */
 219
 220 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 221                      pci_channel_state_t);
 222 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 223 static void igb_io_resume(struct pci_dev *);
 224
 225 static const struct pci_error_handlers igb_err_handler = {
 226         .error_detected = igb_io_error_detected,
 227         .slot_reset = igb_io_slot_reset,
 228         .resume = igb_io_resume,
 229 };
 230
 231 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 232
 233 static struct pci_driver igb_driver = {
 234         .name     = igb_driver_name,
 235         .id_table = igb_pci_tbl,
 236         .probe    = igb_probe,
 237         .remove   = igb_remove,
 238 #ifdef CONFIG_PM
 239         .driver.pm = &igb_pm_ops,
 240 #endif
 241         .shutdown = igb_shutdown,
 242         .sriov_configure = igb_pci_sriov_configure,
 243         .err_handler = &igb_err_handler
 244 };
 245
 246 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 247 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 248 MODULE_LICENSE("GPL");
 249 MODULE_VERSION(DRV_VERSION);
 250
 251 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 252 static int debug = -1;
 253 module_param(debug, int, 0);
 254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 255
 256 struct igb_reg_info {
 257         u32 ofs;
 258         char *name;
 259 };
 260
 261 static const struct igb_reg_info igb_reg_info_tbl[] = {
 262
 263         /* General Registers */
 264         {E1000_CTRL, "CTRL"},
 265         {E1000_STATUS, "STATUS"},
 266         {E1000_CTRL_EXT, "CTRL_EXT"},
 267
 268         /* Interrupt Registers */
 269         {E1000_ICR, "ICR"},
 270
 271         /* RX Registers */
 272         {E1000_RCTL, "RCTL"},
 273         {E1000_RDLEN(0), "RDLEN"},
 274         {E1000_RDH(0), "RDH"},
 275         {E1000_RDT(0), "RDT"},
 276         {E1000_RXDCTL(0), "RXDCTL"},
 277         {E1000_RDBAL(0), "RDBAL"},
 278         {E1000_RDBAH(0), "RDBAH"},
 279
 280         /* TX Registers */
 281         {E1000_TCTL, "TCTL"},
 282         {E1000_TDBAL(0), "TDBAL"},
 283         {E1000_TDBAH(0), "TDBAH"},
 284         {E1000_TDLEN(0), "TDLEN"},
 285         {E1000_TDH(0), "TDH"},
 286         {E1000_TDT(0), "TDT"},
 287         {E1000_TXDCTL(0), "TXDCTL"},
 288         {E1000_TDFH, "TDFH"},
 289         {E1000_TDFT, "TDFT"},
 290         {E1000_TDFHS, "TDFHS"},
 291         {E1000_TDFPC, "TDFPC"},
 292
 293         /* List Terminator */
 294         {}
 295 };
 296
 297 /* igb_regdump - register printout routine */
 298 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 299 {
 300         int n = 0;
 301         char rname[16];
 302         u32 regs[8];
 303
 304         switch (reginfo->ofs) {
 305         case E1000_RDLEN(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RDLEN(n));
 308                 break;
 309         case E1000_RDH(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDH(n));
 312                 break;
 313         case E1000_RDT(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDT(n));
 316                 break;
 317         case E1000_RXDCTL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RXDCTL(n));
 320                 break;
 321         case E1000_RDBAL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RDBAL(n));
 324                 break;
 325         case E1000_RDBAH(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAH(n));
 328                 break;
 329         case E1000_TDBAL(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAL(n));
 332                 break;
 333         case E1000_TDBAH(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDBAH(n));
 336                 break;
 337         case E1000_TDLEN(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDLEN(n));
 340                 break;
 341         case E1000_TDH(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDH(n));
 344                 break;
 345         case E1000_TDT(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDT(n));
 348                 break;
 349         case E1000_TXDCTL(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TXDCTL(n));
 352                 break;
 353         default:
 354                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 355                 return;
 356         }
 357
 358         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 359         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 360                 regs[2], regs[3]);
 361 }
 362
 363 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 364 static void igb_dump(struct igb_adapter *adapter)
 365 {
 366         struct net_device *netdev = adapter->netdev;
 367         struct e1000_hw *hw = &adapter->hw;
 368         struct igb_reg_info *reginfo;
 369         struct igb_ring *tx_ring;
 370         union e1000_adv_tx_desc *tx_desc;
 371         struct my_u0 { u64 a; u64 b; } *u0;
 372         struct igb_ring *rx_ring;
 373         union e1000_adv_rx_desc *rx_desc;
 374         u32 staterr;
 375         u16 i, n;
 376
 377         if (!netif_msg_hw(adapter))
 378                 return;
 379
 380         /* Print netdevice Info */
 381         if (netdev) {
 382                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 383                 pr_info("Device Name     state            trans_start      last_rx\n");
 384                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 385                         netdev->state, netdev->trans_start, netdev->last_rx);
 386         }
 387
 388         /* Print Registers */
 389         dev_info(&adapter->pdev->dev, "Register Dump\n");
 390         pr_info(" Register Name   Value\n");
 391         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 392              reginfo->name; reginfo++) {
 393                 igb_regdump(hw, reginfo);
 394         }
 395
 396         /* Print TX Ring Summary */
 397         if (!netdev || !netif_running(netdev))
 398                 goto exit;
 399
 400         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 401         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 402         for (n = 0; n < adapter->num_tx_queues; n++) {
 403                 struct igb_tx_buffer *buffer_info;
 404                 tx_ring = adapter->tx_ring[n];
 405                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 406                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 407                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 408                         (u64)dma_unmap_addr(buffer_info, dma),
 409                         dma_unmap_len(buffer_info, len),
 410                         buffer_info->next_to_watch,
 411                         (u64)buffer_info->time_stamp);
 412         }
 413
 414         /* Print TX Rings */
 415         if (!netif_msg_tx_done(adapter))
 416                 goto rx_ring_summary;
 417
 418         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 419
 420         /* Transmit Descriptor Formats
 421          *
 422          * Advanced Transmit Descriptor
 423          *   +--------------------------------------------------------------+
 424          * 0 |         Buffer Address [63:0]                                |
 425          *   +--------------------------------------------------------------+
 426          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 427          *   +--------------------------------------------------------------+
 428          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 429          */
 430
 431         for (n = 0; n < adapter->num_tx_queues; n++) {
 432                 tx_ring = adapter->tx_ring[n];
 433                 pr_info("------------------------------------\n");
 434                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 435                 pr_info("------------------------------------\n");
 436                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 437
 438                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 439                         const char *next_desc;
 440                         struct igb_tx_buffer *buffer_info;
 441                         tx_desc = IGB_TX_DESC(tx_ring, i);
 442                         buffer_info = &tx_ring->tx_buffer_info[i];
 443                         u0 = (struct my_u0 *)tx_desc;
 444                         if (i == tx_ring->next_to_use &&
 445                             i == tx_ring->next_to_clean)
 446                                 next_desc = " NTC/U";
 447                         else if (i == tx_ring->next_to_use)
 448                                 next_desc = " NTU";
 449                         else if (i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC";
 451                         else
 452                                 next_desc = "";
 453
 454                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 455                                 i, le64_to_cpu(u0->a),
 456                                 le64_to_cpu(u0->b),
 457                                 (u64)dma_unmap_addr(buffer_info, dma),
 458                                 dma_unmap_len(buffer_info, len),
 459                                 buffer_info->next_to_watch,
 460                                 (u64)buffer_info->time_stamp,
 461                                 buffer_info->skb, next_desc);
 462
 463                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 464                                 print_hex_dump(KERN_INFO, "",
 465                                         DUMP_PREFIX_ADDRESS,
 466                                         16, 1, buffer_info->skb->data,
 467                                         dma_unmap_len(buffer_info, len),
 468                                         true);
 469                 }
 470         }
 471
 472         /* Print RX Rings Summary */
 473 rx_ring_summary:
 474         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 475         pr_info("Queue [NTU] [NTC]\n");
 476         for (n = 0; n < adapter->num_rx_queues; n++) {
 477                 rx_ring = adapter->rx_ring[n];
 478                 pr_info(" %5d %5X %5X\n",
 479                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 480         }
 481
 482         /* Print RX Rings */
 483         if (!netif_msg_rx_status(adapter))
 484                 goto exit;
 485
 486         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 487
 488         /* Advanced Receive Descriptor (Read) Format
 489          *    63                                           1        0
 490          *    +-----------------------------------------------------+
 491          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 492          *    +----------------------------------------------+------+
 493          *  8 |       Header Buffer Address [63:1]           |  DD  |
 494          *    +-----------------------------------------------------+
 495          *
 496          *
 497          * Advanced Receive Descriptor (Write-Back) Format
 498          *
 499          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 500          *   +------------------------------------------------------+
 501          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 502          *   | Checksum   Ident  |   |           |    | Type | Type |
 503          *   +------------------------------------------------------+
 504          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 505          *   +------------------------------------------------------+
 506          *   63       48 47    32 31            20 19               0
 507          */
 508
 509         for (n = 0; n < adapter->num_rx_queues; n++) {
 510                 rx_ring = adapter->rx_ring[n];
 511                 pr_info("------------------------------------\n");
 512                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 513                 pr_info("------------------------------------\n");
 514                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 515                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 516
 517                 for (i = 0; i < rx_ring->count; i++) {
 518                         const char *next_desc;
 519                         struct igb_rx_buffer *buffer_info;
 520                         buffer_info = &rx_ring->rx_buffer_info[i];
 521                         rx_desc = IGB_RX_DESC(rx_ring, i);
 522                         u0 = (struct my_u0 *)rx_desc;
 523                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 524
 525                         if (i == rx_ring->next_to_use)
 526                                 next_desc = " NTU";
 527                         else if (i == rx_ring->next_to_clean)
 528                                 next_desc = " NTC";
 529                         else
 530                                 next_desc = "";
 531
 532                         if (staterr & E1000_RXD_STAT_DD) {
 533                                 /* Descriptor Done */
 534                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 535                                         "RWB", i,
 536                                         le64_to_cpu(u0->a),
 537                                         le64_to_cpu(u0->b),
 538                                         next_desc);
 539                         } else {
 540                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 541                                         "R  ", i,
 542                                         le64_to_cpu(u0->a),
 543                                         le64_to_cpu(u0->b),
 544                                         (u64)buffer_info->dma,
 545                                         next_desc);
 546
 547                                 if (netif_msg_pktdata(adapter) &&
 548                                     buffer_info->dma && buffer_info->page) {
 549                                         print_hex_dump(KERN_INFO, "",
 550                                           DUMP_PREFIX_ADDRESS,
 551                                           16, 1,
 552                                           page_address(buffer_info->page) +
 553                                                       buffer_info->page_offset,
 554                                           IGB_RX_BUFSZ, true);
 555                                 }
 556                         }
 557                 }
 558         }
 559
 560 exit:
 561         return;
 562 }
 563
 564 /**
 565  *  igb_get_i2c_data - Reads the I2C SDA data bit
 566  *  @hw: pointer to hardware structure
 567  *  @i2cctl: Current value of I2CCTL register
 568  *
 569  *  Returns the I2C data bit value
 570  **/
 571 static int igb_get_i2c_data(void *data)
 572 {
 573         struct igb_adapter *adapter = (struct igb_adapter *)data;
 574         struct e1000_hw *hw = &adapter->hw;
 575         s32 i2cctl = rd32(E1000_I2CPARAMS);
 576
 577         return !!(i2cctl & E1000_I2C_DATA_IN);
 578 }
 579
 580 /**
 581  *  igb_set_i2c_data - Sets the I2C data bit
 582  *  @data: pointer to hardware structure
 583  *  @state: I2C data value (0 or 1) to set
 584  *
 585  *  Sets the I2C data bit
 586  **/
 587 static void igb_set_i2c_data(void *data, int state)
 588 {
 589         struct igb_adapter *adapter = (struct igb_adapter *)data;
 590         struct e1000_hw *hw = &adapter->hw;
 591         s32 i2cctl = rd32(E1000_I2CPARAMS);
 592
 593         if (state)
 594                 i2cctl |= E1000_I2C_DATA_OUT;
 595         else
 596                 i2cctl &= ~E1000_I2C_DATA_OUT;
 597
 598         i2cctl &= ~E1000_I2C_DATA_OE_N;
 599         i2cctl |= E1000_I2C_CLK_OE_N;
 600         wr32(E1000_I2CPARAMS, i2cctl);
 601         wrfl();
 602
 603 }
 604
 605 /**
 606  *  igb_set_i2c_clk - Sets the I2C SCL clock
 607  *  @data: pointer to hardware structure
 608  *  @state: state to set clock
 609  *
 610  *  Sets the I2C clock line to state
 611  **/
 612 static void igb_set_i2c_clk(void *data, int state)
 613 {
 614         struct igb_adapter *adapter = (struct igb_adapter *)data;
 615         struct e1000_hw *hw = &adapter->hw;
 616         s32 i2cctl = rd32(E1000_I2CPARAMS);
 617
 618         if (state) {
 619                 i2cctl |= E1000_I2C_CLK_OUT;
 620                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 621         } else {
 622                 i2cctl &= ~E1000_I2C_CLK_OUT;
 623                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 624         }
 625         wr32(E1000_I2CPARAMS, i2cctl);
 626         wrfl();
 627 }
 628
 629 /**
 630  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 631  *  @data: pointer to hardware structure
 632  *
 633  *  Gets the I2C clock state
 634  **/
 635 static int igb_get_i2c_clk(void *data)
 636 {
 637         struct igb_adapter *adapter = (struct igb_adapter *)data;
 638         struct e1000_hw *hw = &adapter->hw;
 639         s32 i2cctl = rd32(E1000_I2CPARAMS);
 640
 641         return !!(i2cctl & E1000_I2C_CLK_IN);
 642 }
 643
 644 static const struct i2c_algo_bit_data igb_i2c_algo = {
 645         .setsda         = igb_set_i2c_data,
 646         .setscl         = igb_set_i2c_clk,
 647         .getsda         = igb_get_i2c_data,
 648         .getscl         = igb_get_i2c_clk,
 649         .udelay         = 5,
 650         .timeout        = 20,
 651 };
 652
 653 /**
 654  *  igb_get_hw_dev - return device
 655  *  @hw: pointer to hardware structure
 656  *
 657  *  used by hardware layer to print debugging information
 658  **/
 659 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 660 {
 661         struct igb_adapter *adapter = hw->back;
 662         return adapter->netdev;
 663 }
 664
 665 /**
 666  *  igb_init_module - Driver Registration Routine
 667  *
 668  *  igb_init_module is the first routine called when the driver is
 669  *  loaded. All it does is register with the PCI subsystem.
 670  **/
 671 static int __init igb_init_module(void)
 672 {
 673         int ret;
 674
 675         pr_info("%s - version %s\n",
 676                igb_driver_string, igb_driver_version);
 677         pr_info("%s\n", igb_copyright);
 678
 679 #ifdef CONFIG_IGB_DCA
 680         dca_register_notify(&dca_notifier);
 681 #endif
 682         ret = pci_register_driver(&igb_driver);
 683         return ret;
 684 }
 685
 686 module_init(igb_init_module);
 687
 688 /**
 689  *  igb_exit_module - Driver Exit Cleanup Routine
 690  *
 691  *  igb_exit_module is called just before the driver is removed
 692  *  from memory.
 693  **/
 694 static void __exit igb_exit_module(void)
 695 {
 696 #ifdef CONFIG_IGB_DCA
 697         dca_unregister_notify(&dca_notifier);
 698 #endif
 699         pci_unregister_driver(&igb_driver);
 700 }
 701
 702 module_exit(igb_exit_module);
 703
 704 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 705 /**
 706  *  igb_cache_ring_register - Descriptor ring to register mapping
 707  *  @adapter: board private structure to initialize
 708  *
 709  *  Once we know the feature-set enabled for the device, we'll cache
 710  *  the register offset the descriptor ring is assigned to.
 711  **/
 712 static void igb_cache_ring_register(struct igb_adapter *adapter)
 713 {
 714         int i = 0, j = 0;
 715         u32 rbase_offset = adapter->vfs_allocated_count;
 716
 717         switch (adapter->hw.mac.type) {
 718         case e1000_82576:
 719                 /* The queues are allocated for virtualization such that VF 0
 720                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 721                  * In order to avoid collision we start at the first free queue
 722                  * and continue consuming queues in the same sequence
 723                  */
 724                 if (adapter->vfs_allocated_count) {
 725                         for (; i < adapter->rss_queues; i++)
 726                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 727                                                                Q_IDX_82576(i);
 728                 }
 729                 /* Fall through */
 730         case e1000_82575:
 731         case e1000_82580:
 732         case e1000_i350:
 733         case e1000_i354:
 734         case e1000_i210:
 735         case e1000_i211:
 736                 /* Fall through */
 737         default:
 738                 for (; i < adapter->num_rx_queues; i++)
 739                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 740                 for (; j < adapter->num_tx_queues; j++)
 741                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 742                 break;
 743         }
 744 }
 745
 746 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 747 {
 748         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 749         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 750         u32 value = 0;
 751
 752         if (E1000_REMOVED(hw_addr))
 753                 return ~value;
 754
 755         value = readl(&hw_addr[reg]);
 756
 757         /* reads should not return all F's */
 758         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 759                 struct net_device *netdev = igb->netdev;
 760                 hw->hw_addr = NULL;
 761                 netif_device_detach(netdev);
 762                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 763         }
 764
 765         return value;
 766 }
 767
 768 /**
 769  *  igb_write_ivar - configure ivar for given MSI-X vector
 770  *  @hw: pointer to the HW structure
 771  *  @msix_vector: vector number we are allocating to a given ring
 772  *  @index: row index of IVAR register to write within IVAR table
 773  *  @offset: column offset of in IVAR, should be multiple of 8
 774  *
 775  *  This function is intended to handle the writing of the IVAR register
 776  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 777  *  each containing an cause allocation for an Rx and Tx ring, and a
 778  *  variable number of rows depending on the number of queues supported.
 779  **/
 780 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 781                            int index, int offset)
 782 {
 783         u32 ivar = array_rd32(E1000_IVAR0, index);
 784
 785         /* clear any bits that are currently set */
 786         ivar &= ~((u32)0xFF << offset);
 787
 788         /* write vector and valid bit */
 789         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 790
 791         array_wr32(E1000_IVAR0, index, ivar);
 792 }
 793
 794 #define IGB_N0_QUEUE -1
 795 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 796 {
 797         struct igb_adapter *adapter = q_vector->adapter;
 798         struct e1000_hw *hw = &adapter->hw;
 799         int rx_queue = IGB_N0_QUEUE;
 800         int tx_queue = IGB_N0_QUEUE;
 801         u32 msixbm = 0;
 802
 803         if (q_vector->rx.ring)
 804                 rx_queue = q_vector->rx.ring->reg_idx;
 805         if (q_vector->tx.ring)
 806                 tx_queue = q_vector->tx.ring->reg_idx;
 807
 808         switch (hw->mac.type) {
 809         case e1000_82575:
 810                 /* The 82575 assigns vectors using a bitmask, which matches the
 811                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 812                  * or more queues to a vector, we write the appropriate bits
 813                  * into the MSIXBM register for that vector.
 814                  */
 815                 if (rx_queue > IGB_N0_QUEUE)
 816                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 817                 if (tx_queue > IGB_N0_QUEUE)
 818                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 819                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 820                         msixbm |= E1000_EIMS_OTHER;
 821                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 822                 q_vector->eims_value = msixbm;
 823                 break;
 824         case e1000_82576:
 825                 /* 82576 uses a table that essentially consists of 2 columns
 826                  * with 8 rows.  The ordering is column-major so we use the
 827                  * lower 3 bits as the row index, and the 4th bit as the
 828                  * column offset.
 829                  */
 830                 if (rx_queue > IGB_N0_QUEUE)
 831                         igb_write_ivar(hw, msix_vector,
 832                                        rx_queue & 0x7,
 833                                        (rx_queue & 0x8) << 1);
 834                 if (tx_queue > IGB_N0_QUEUE)
 835                         igb_write_ivar(hw, msix_vector,
 836                                        tx_queue & 0x7,
 837                                        ((tx_queue & 0x8) << 1) + 8);
 838                 q_vector->eims_value = 1 << msix_vector;
 839                 break;
 840         case e1000_82580:
 841         case e1000_i350:
 842         case e1000_i354:
 843         case e1000_i210:
 844         case e1000_i211:
 845                 /* On 82580 and newer adapters the scheme is similar to 82576
 846                  * however instead of ordering column-major we have things
 847                  * ordered row-major.  So we traverse the table by using
 848                  * bit 0 as the column offset, and the remaining bits as the
 849                  * row index.
 850                  */
 851                 if (rx_queue > IGB_N0_QUEUE)
 852                         igb_write_ivar(hw, msix_vector,
 853                                        rx_queue >> 1,
 854                                        (rx_queue & 0x1) << 4);
 855                 if (tx_queue > IGB_N0_QUEUE)
 856                         igb_write_ivar(hw, msix_vector,
 857                                        tx_queue >> 1,
 858                                        ((tx_queue & 0x1) << 4) + 8);
 859                 q_vector->eims_value = 1 << msix_vector;
 860                 break;
 861         default:
 862                 BUG();
 863                 break;
 864         }
 865
 866         /* add q_vector eims value to global eims_enable_mask */
 867         adapter->eims_enable_mask |= q_vector->eims_value;
 868
 869         /* configure q_vector to set itr on first interrupt */
 870         q_vector->set_itr = 1;
 871 }
 872
 873 /**
 874  *  igb_configure_msix - Configure MSI-X hardware
 875  *  @adapter: board private structure to initialize
 876  *
 877  *  igb_configure_msix sets up the hardware to properly
 878  *  generate MSI-X interrupts.
 879  **/
 880 static void igb_configure_msix(struct igb_adapter *adapter)
 881 {
 882         u32 tmp;
 883         int i, vector = 0;
 884         struct e1000_hw *hw = &adapter->hw;
 885
 886         adapter->eims_enable_mask = 0;
 887
 888         /* set vector for other causes, i.e. link changes */
 889         switch (hw->mac.type) {
 890         case e1000_82575:
 891                 tmp = rd32(E1000_CTRL_EXT);
 892                 /* enable MSI-X PBA support*/
 893                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 894
 895                 /* Auto-Mask interrupts upon ICR read. */
 896                 tmp |= E1000_CTRL_EXT_EIAME;
 897                 tmp |= E1000_CTRL_EXT_IRCA;
 898
 899                 wr32(E1000_CTRL_EXT, tmp);
 900
 901                 /* enable msix_other interrupt */
 902                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 903                 adapter->eims_other = E1000_EIMS_OTHER;
 904
 905                 break;
 906
 907         case e1000_82576:
 908         case e1000_82580:
 909         case e1000_i350:
 910         case e1000_i354:
 911         case e1000_i210:
 912         case e1000_i211:
 913                 /* Turn on MSI-X capability first, or our settings
 914                  * won't stick.  And it will take days to debug.
 915                  */
 916                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 917                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 918                      E1000_GPIE_NSICR);
 919
 920                 /* enable msix_other interrupt */
 921                 adapter->eims_other = 1 << vector;
 922                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 923
 924                 wr32(E1000_IVAR_MISC, tmp);
 925                 break;
 926         default:
 927                 /* do nothing, since nothing else supports MSI-X */
 928                 break;
 929         } /* switch (hw->mac.type) */
 930
 931         adapter->eims_enable_mask |= adapter->eims_other;
 932
 933         for (i = 0; i < adapter->num_q_vectors; i++)
 934                 igb_assign_vector(adapter->q_vector[i], vector++);
 935
 936         wrfl();
 937 }
 938
 939 /**
 940  *  igb_request_msix - Initialize MSI-X interrupts
 941  *  @adapter: board private structure to initialize
 942  *
 943  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 944  *  kernel.
 945  **/
 946 static int igb_request_msix(struct igb_adapter *adapter)
 947 {
 948         struct net_device *netdev = adapter->netdev;
 949         struct e1000_hw *hw = &adapter->hw;
 950         int i, err = 0, vector = 0, free_vector = 0;
 951
 952         err = request_irq(adapter->msix_entries[vector].vector,
 953                           igb_msix_other, 0, netdev->name, adapter);
 954         if (err)
 955                 goto err_out;
 956
 957         for (i = 0; i < adapter->num_q_vectors; i++) {
 958                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 959
 960                 vector++;
 961
 962                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 963
 964                 if (q_vector->rx.ring && q_vector->tx.ring)
 965                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 966                                 q_vector->rx.ring->queue_index);
 967                 else if (q_vector->tx.ring)
 968                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 969                                 q_vector->tx.ring->queue_index);
 970                 else if (q_vector->rx.ring)
 971                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 972                                 q_vector->rx.ring->queue_index);
 973                 else
 974                         sprintf(q_vector->name, "%s-unused", netdev->name);
 975
 976                 err = request_irq(adapter->msix_entries[vector].vector,
 977                                   igb_msix_ring, 0, q_vector->name,
 978                                   q_vector);
 979                 if (err)
 980                         goto err_free;
 981         }
 982
 983         igb_configure_msix(adapter);
 984         return 0;
 985
 986 err_free:
 987         /* free already assigned IRQs */
 988         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 989
 990         vector--;
 991         for (i = 0; i < vector; i++) {
 992                 free_irq(adapter->msix_entries[free_vector++].vector,
 993                          adapter->q_vector[i]);
 994         }
 995 err_out:
 996         return err;
 997 }
 998
 999 /**
1000  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1001  *  @adapter: board private structure to initialize
1002  *  @v_idx: Index of vector to be freed
1003  *
1004  *  This function frees the memory allocated to the q_vector.
1005  **/
1006 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1007 {
1008         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1009
1010         adapter->q_vector[v_idx] = NULL;
1011
1012         /* igb_get_stats64() might access the rings on this vector,
1013          * we must wait a grace period before freeing it.
1014          */
1015         if (q_vector)
1016                 kfree_rcu(q_vector, rcu);
1017 }
1018
1019 /**
1020  *  igb_reset_q_vector - Reset config for interrupt vector
1021  *  @adapter: board private structure to initialize
1022  *  @v_idx: Index of vector to be reset
1023  *
1024  *  If NAPI is enabled it will delete any references to the
1025  *  NAPI struct. This is preparation for igb_free_q_vector.
1026  **/
1027 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1028 {
1029         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1030
1031         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1032          * allocated. So, q_vector is NULL so we should stop here.
1033          */
1034         if (!q_vector)
1035                 return;
1036
1037         if (q_vector->tx.ring)
1038                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1039
1040         if (q_vector->rx.ring)
1041                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1042
1043         netif_napi_del(&q_vector->napi);
1044
1045 }
1046
1047 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1048 {
1049         int v_idx = adapter->num_q_vectors;
1050
1051         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1052                 pci_disable_msix(adapter->pdev);
1053         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1054                 pci_disable_msi(adapter->pdev);
1055
1056         while (v_idx--)
1057                 igb_reset_q_vector(adapter, v_idx);
1058 }
1059
1060 /**
1061  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1062  *  @adapter: board private structure to initialize
1063  *
1064  *  This function frees the memory allocated to the q_vectors.  In addition if
1065  *  NAPI is enabled it will delete any references to the NAPI struct prior
1066  *  to freeing the q_vector.
1067  **/
1068 static void igb_free_q_vectors(struct igb_adapter *adapter)
1069 {
1070         int v_idx = adapter->num_q_vectors;
1071
1072         adapter->num_tx_queues = 0;
1073         adapter->num_rx_queues = 0;
1074         adapter->num_q_vectors = 0;
1075
1076         while (v_idx--) {
1077                 igb_reset_q_vector(adapter, v_idx);
1078                 igb_free_q_vector(adapter, v_idx);
1079         }
1080 }
1081
1082 /**
1083  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1084  *  @adapter: board private structure to initialize
1085  *
1086  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1087  *  MSI-X interrupts allocated.
1088  */
1089 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1090 {
1091         igb_free_q_vectors(adapter);
1092         igb_reset_interrupt_capability(adapter);
1093 }
1094
1095 /**
1096  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1097  *  @adapter: board private structure to initialize
1098  *  @msix: boolean value of MSIX capability
1099  *
1100  *  Attempt to configure interrupts using the best available
1101  *  capabilities of the hardware and kernel.
1102  **/
1103 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1104 {
1105         int err;
1106         int numvecs, i;
1107
1108         if (!msix)
1109                 goto msi_only;
1110         adapter->flags |= IGB_FLAG_HAS_MSIX;
1111
1112         /* Number of supported queues. */
1113         adapter->num_rx_queues = adapter->rss_queues;
1114         if (adapter->vfs_allocated_count)
1115                 adapter->num_tx_queues = 1;
1116         else
1117                 adapter->num_tx_queues = adapter->rss_queues;
1118
1119         /* start with one vector for every Rx queue */
1120         numvecs = adapter->num_rx_queues;
1121
1122         /* if Tx handler is separate add 1 for every Tx queue */
1123         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1124                 numvecs += adapter->num_tx_queues;
1125
1126         /* store the number of vectors reserved for queues */
1127         adapter->num_q_vectors = numvecs;
1128
1129         /* add 1 vector for link status interrupts */
1130         numvecs++;
1131         for (i = 0; i < numvecs; i++)
1132                 adapter->msix_entries[i].entry = i;
1133
1134         err = pci_enable_msix_range(adapter->pdev,
1135                                     adapter->msix_entries,
1136                                     numvecs,
1137                                     numvecs);
1138         if (err > 0)
1139                 return;
1140
1141         igb_reset_interrupt_capability(adapter);
1142
1143         /* If we can't do MSI-X, try MSI */
1144 msi_only:
1145         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1146 #ifdef CONFIG_PCI_IOV
1147         /* disable SR-IOV for non MSI-X configurations */
1148         if (adapter->vf_data) {
1149                 struct e1000_hw *hw = &adapter->hw;
1150                 /* disable iov and allow time for transactions to clear */
1151                 pci_disable_sriov(adapter->pdev);
1152                 msleep(500);
1153
1154                 kfree(adapter->vf_data);
1155                 adapter->vf_data = NULL;
1156                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1157                 wrfl();
1158                 msleep(100);
1159                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1160         }
1161 #endif
1162         adapter->vfs_allocated_count = 0;
1163         adapter->rss_queues = 1;
1164         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1165         adapter->num_rx_queues = 1;
1166         adapter->num_tx_queues = 1;
1167         adapter->num_q_vectors = 1;
1168         if (!pci_enable_msi(adapter->pdev))
1169                 adapter->flags |= IGB_FLAG_HAS_MSI;
1170 }
1171
1172 static void igb_add_ring(struct igb_ring *ring,
1173                          struct igb_ring_container *head)
1174 {
1175         head->ring = ring;
1176         head->count++;
1177 }
1178
1179 /**
1180  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1181  *  @adapter: board private structure to initialize
1182  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1183  *  @v_idx: index of vector in adapter struct
1184  *  @txr_count: total number of Tx rings to allocate
1185  *  @txr_idx: index of first Tx ring to allocate
1186  *  @rxr_count: total number of Rx rings to allocate
1187  *  @rxr_idx: index of first Rx ring to allocate
1188  *
1189  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1190  **/
1191 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1192                               int v_count, int v_idx,
1193                               int txr_count, int txr_idx,
1194                               int rxr_count, int rxr_idx)
1195 {
1196         struct igb_q_vector *q_vector;
1197         struct igb_ring *ring;
1198         int ring_count, size;
1199
1200         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1201         if (txr_count > 1 || rxr_count > 1)
1202                 return -ENOMEM;
1203
1204         ring_count = txr_count + rxr_count;
1205         size = sizeof(struct igb_q_vector) +
1206                (sizeof(struct igb_ring) * ring_count);
1207
1208         /* allocate q_vector and rings */
1209         q_vector = adapter->q_vector[v_idx];
1210         if (!q_vector)
1211                 q_vector = kzalloc(size, GFP_KERNEL);
1212         if (!q_vector)
1213                 return -ENOMEM;
1214
1215         /* initialize NAPI */
1216         netif_napi_add(adapter->netdev, &q_vector->napi,
1217                        igb_poll, 64);
1218
1219         /* tie q_vector and adapter together */
1220         adapter->q_vector[v_idx] = q_vector;
1221         q_vector->adapter = adapter;
1222
1223         /* initialize work limits */
1224         q_vector->tx.work_limit = adapter->tx_work_limit;
1225
1226         /* initialize ITR configuration */
1227         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1228         q_vector->itr_val = IGB_START_ITR;
1229
1230         /* initialize pointer to rings */
1231         ring = q_vector->ring;
1232
1233         /* intialize ITR */
1234         if (rxr_count) {
1235                 /* rx or rx/tx vector */
1236                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1237                         q_vector->itr_val = adapter->rx_itr_setting;
1238         } else {
1239                 /* tx only vector */
1240                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1241                         q_vector->itr_val = adapter->tx_itr_setting;
1242         }
1243
1244         if (txr_count) {
1245                 /* assign generic ring traits */
1246                 ring->dev = &adapter->pdev->dev;
1247                 ring->netdev = adapter->netdev;
1248
1249                 /* configure backlink on ring */
1250                 ring->q_vector = q_vector;
1251
1252                 /* update q_vector Tx values */
1253                 igb_add_ring(ring, &q_vector->tx);
1254
1255                 /* For 82575, context index must be unique per ring. */
1256                 if (adapter->hw.mac.type == e1000_82575)
1257                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1258
1259                 /* apply Tx specific ring traits */
1260                 ring->count = adapter->tx_ring_count;
1261                 ring->queue_index = txr_idx;
1262
1263                 u64_stats_init(&ring->tx_syncp);
1264                 u64_stats_init(&ring->tx_syncp2);
1265
1266                 /* assign ring to adapter */
1267                 adapter->tx_ring[txr_idx] = ring;
1268
1269                 /* push pointer to next ring */
1270                 ring++;
1271         }
1272
1273         if (rxr_count) {
1274                 /* assign generic ring traits */
1275                 ring->dev = &adapter->pdev->dev;
1276                 ring->netdev = adapter->netdev;
1277
1278                 /* configure backlink on ring */
1279                 ring->q_vector = q_vector;
1280
1281                 /* update q_vector Rx values */
1282                 igb_add_ring(ring, &q_vector->rx);
1283
1284                 /* set flag indicating ring supports SCTP checksum offload */
1285                 if (adapter->hw.mac.type >= e1000_82576)
1286                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1287
1288                 /* On i350, i354, i210, and i211, loopback VLAN packets
1289                  * have the tag byte-swapped.
1290                  */
1291                 if (adapter->hw.mac.type >= e1000_i350)
1292                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1293
1294                 /* apply Rx specific ring traits */
1295                 ring->count = adapter->rx_ring_count;
1296                 ring->queue_index = rxr_idx;
1297
1298                 u64_stats_init(&ring->rx_syncp);
1299
1300                 /* assign ring to adapter */
1301                 adapter->rx_ring[rxr_idx] = ring;
1302         }
1303
1304         return 0;
1305 }
1306
1307
1308 /**
1309  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1310  *  @adapter: board private structure to initialize
1311  *
1312  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1313  *  return -ENOMEM.
1314  **/
1315 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1316 {
1317         int q_vectors = adapter->num_q_vectors;
1318         int rxr_remaining = adapter->num_rx_queues;
1319         int txr_remaining = adapter->num_tx_queues;
1320         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1321         int err;
1322
1323         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1324                 for (; rxr_remaining; v_idx++) {
1325                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1326                                                  0, 0, 1, rxr_idx);
1327
1328                         if (err)
1329                                 goto err_out;
1330
1331                         /* update counts and index */
1332                         rxr_remaining--;
1333                         rxr_idx++;
1334                 }
1335         }
1336
1337         for (; v_idx < q_vectors; v_idx++) {
1338                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1339                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1340
1341                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1342                                          tqpv, txr_idx, rqpv, rxr_idx);
1343
1344                 if (err)
1345                         goto err_out;
1346
1347                 /* update counts and index */
1348                 rxr_remaining -= rqpv;
1349                 txr_remaining -= tqpv;
1350                 rxr_idx++;
1351                 txr_idx++;
1352         }
1353
1354         return 0;
1355
1356 err_out:
1357         adapter->num_tx_queues = 0;
1358         adapter->num_rx_queues = 0;
1359         adapter->num_q_vectors = 0;
1360
1361         while (v_idx--)
1362                 igb_free_q_vector(adapter, v_idx);
1363
1364         return -ENOMEM;
1365 }
1366
1367 /**
1368  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1369  *  @adapter: board private structure to initialize
1370  *  @msix: boolean value of MSIX capability
1371  *
1372  *  This function initializes the interrupts and allocates all of the queues.
1373  **/
1374 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1375 {
1376         struct pci_dev *pdev = adapter->pdev;
1377         int err;
1378
1379         igb_set_interrupt_capability(adapter, msix);
1380
1381         err = igb_alloc_q_vectors(adapter);
1382         if (err) {
1383                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1384                 goto err_alloc_q_vectors;
1385         }
1386
1387         igb_cache_ring_register(adapter);
1388
1389         return 0;
1390
1391 err_alloc_q_vectors:
1392         igb_reset_interrupt_capability(adapter);
1393         return err;
1394 }
1395
1396 /**
1397  *  igb_request_irq - initialize interrupts
1398  *  @adapter: board private structure to initialize
1399  *
1400  *  Attempts to configure interrupts using the best available
1401  *  capabilities of the hardware and kernel.
1402  **/
1403 static int igb_request_irq(struct igb_adapter *adapter)
1404 {
1405         struct net_device *netdev = adapter->netdev;
1406         struct pci_dev *pdev = adapter->pdev;
1407         int err = 0;
1408
1409         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1410                 err = igb_request_msix(adapter);
1411                 if (!err)
1412                         goto request_done;
1413                 /* fall back to MSI */
1414                 igb_free_all_tx_resources(adapter);
1415                 igb_free_all_rx_resources(adapter);
1416
1417                 igb_clear_interrupt_scheme(adapter);
1418                 err = igb_init_interrupt_scheme(adapter, false);
1419                 if (err)
1420                         goto request_done;
1421
1422                 igb_setup_all_tx_resources(adapter);
1423                 igb_setup_all_rx_resources(adapter);
1424                 igb_configure(adapter);
1425         }
1426
1427         igb_assign_vector(adapter->q_vector[0], 0);
1428
1429         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1430                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1431                                   netdev->name, adapter);
1432                 if (!err)
1433                         goto request_done;
1434
1435                 /* fall back to legacy interrupts */
1436                 igb_reset_interrupt_capability(adapter);
1437                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1438         }
1439
1440         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1441                           netdev->name, adapter);
1442
1443         if (err)
1444                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1445                         err);
1446
1447 request_done:
1448         return err;
1449 }
1450
1451 static void igb_free_irq(struct igb_adapter *adapter)
1452 {
1453         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1454                 int vector = 0, i;
1455
1456                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1457
1458                 for (i = 0; i < adapter->num_q_vectors; i++)
1459                         free_irq(adapter->msix_entries[vector++].vector,
1460                                  adapter->q_vector[i]);
1461         } else {
1462                 free_irq(adapter->pdev->irq, adapter);
1463         }
1464 }
1465
1466 /**
1467  *  igb_irq_disable - Mask off interrupt generation on the NIC
1468  *  @adapter: board private structure
1469  **/
1470 static void igb_irq_disable(struct igb_adapter *adapter)
1471 {
1472         struct e1000_hw *hw = &adapter->hw;
1473
1474         /* we need to be careful when disabling interrupts.  The VFs are also
1475          * mapped into these registers and so clearing the bits can cause
1476          * issues on the VF drivers so we only need to clear what we set
1477          */
1478         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1479                 u32 regval = rd32(E1000_EIAM);
1480
1481                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1482                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1483                 regval = rd32(E1000_EIAC);
1484                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1485         }
1486
1487         wr32(E1000_IAM, 0);
1488         wr32(E1000_IMC, ~0);
1489         wrfl();
1490         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1491                 int i;
1492
1493                 for (i = 0; i < adapter->num_q_vectors; i++)
1494                         synchronize_irq(adapter->msix_entries[i].vector);
1495         } else {
1496                 synchronize_irq(adapter->pdev->irq);
1497         }
1498 }
1499
1500 /**
1501  *  igb_irq_enable - Enable default interrupt generation settings
1502  *  @adapter: board private structure
1503  **/
1504 static void igb_irq_enable(struct igb_adapter *adapter)
1505 {
1506         struct e1000_hw *hw = &adapter->hw;
1507
1508         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1509                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1510                 u32 regval = rd32(E1000_EIAC);
1511
1512                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1513                 regval = rd32(E1000_EIAM);
1514                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1515                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1516                 if (adapter->vfs_allocated_count) {
1517                         wr32(E1000_MBVFIMR, 0xFF);
1518                         ims |= E1000_IMS_VMMB;
1519                 }
1520                 wr32(E1000_IMS, ims);
1521         } else {
1522                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1523                                 E1000_IMS_DRSTA);
1524                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1525                                 E1000_IMS_DRSTA);
1526         }
1527 }
1528
1529 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1530 {
1531         struct e1000_hw *hw = &adapter->hw;
1532         u16 vid = adapter->hw.mng_cookie.vlan_id;
1533         u16 old_vid = adapter->mng_vlan_id;
1534
1535         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1536                 /* add VID to filter table */
1537                 igb_vfta_set(hw, vid, true);
1538                 adapter->mng_vlan_id = vid;
1539         } else {
1540                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1541         }
1542
1543         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1544             (vid != old_vid) &&
1545             !test_bit(old_vid, adapter->active_vlans)) {
1546                 /* remove VID from filter table */
1547                 igb_vfta_set(hw, old_vid, false);
1548         }
1549 }
1550
1551 /**
1552  *  igb_release_hw_control - release control of the h/w to f/w
1553  *  @adapter: address of board private structure
1554  *
1555  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1556  *  For ASF and Pass Through versions of f/w this means that the
1557  *  driver is no longer loaded.
1558  **/
1559 static void igb_release_hw_control(struct igb_adapter *adapter)
1560 {
1561         struct e1000_hw *hw = &adapter->hw;
1562         u32 ctrl_ext;
1563
1564         /* Let firmware take over control of h/w */
1565         ctrl_ext = rd32(E1000_CTRL_EXT);
1566         wr32(E1000_CTRL_EXT,
1567                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1568 }
1569
1570 /**
1571  *  igb_get_hw_control - get control of the h/w from f/w
1572  *  @adapter: address of board private structure
1573  *
1574  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1575  *  For ASF and Pass Through versions of f/w this means that
1576  *  the driver is loaded.
1577  **/
1578 static void igb_get_hw_control(struct igb_adapter *adapter)
1579 {
1580         struct e1000_hw *hw = &adapter->hw;
1581         u32 ctrl_ext;
1582
1583         /* Let firmware know the driver has taken over */
1584         ctrl_ext = rd32(E1000_CTRL_EXT);
1585         wr32(E1000_CTRL_EXT,
1586                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1587 }
1588
1589 /**
1590  *  igb_configure - configure the hardware for RX and TX
1591  *  @adapter: private board structure
1592  **/
1593 static void igb_configure(struct igb_adapter *adapter)
1594 {
1595         struct net_device *netdev = adapter->netdev;
1596         int i;
1597
1598         igb_get_hw_control(adapter);
1599         igb_set_rx_mode(netdev);
1600
1601         igb_restore_vlan(adapter);
1602
1603         igb_setup_tctl(adapter);
1604         igb_setup_mrqc(adapter);
1605         igb_setup_rctl(adapter);
1606
1607         igb_configure_tx(adapter);
1608         igb_configure_rx(adapter);
1609
1610         igb_rx_fifo_flush_82575(&adapter->hw);
1611
1612         /* call igb_desc_unused which always leaves
1613          * at least 1 descriptor unused to make sure
1614          * next_to_use != next_to_clean
1615          */
1616         for (i = 0; i < adapter->num_rx_queues; i++) {
1617                 struct igb_ring *ring = adapter->rx_ring[i];
1618                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1619         }
1620 }
1621
1622 /**
1623  *  igb_power_up_link - Power up the phy/serdes link
1624  *  @adapter: address of board private structure
1625  **/
1626 void igb_power_up_link(struct igb_adapter *adapter)
1627 {
1628         igb_reset_phy(&adapter->hw);
1629
1630         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1631                 igb_power_up_phy_copper(&adapter->hw);
1632         else
1633                 igb_power_up_serdes_link_82575(&adapter->hw);
1634
1635         igb_setup_link(&adapter->hw);
1636 }
1637
1638 /**
1639  *  igb_power_down_link - Power down the phy/serdes link
1640  *  @adapter: address of board private structure
1641  */
1642 static void igb_power_down_link(struct igb_adapter *adapter)
1643 {
1644         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1645                 igb_power_down_phy_copper_82575(&adapter->hw);
1646         else
1647                 igb_shutdown_serdes_link_82575(&adapter->hw);
1648 }
1649
1650 /**
1651  * Detect and switch function for Media Auto Sense
1652  * @adapter: address of the board private structure
1653  **/
1654 static void igb_check_swap_media(struct igb_adapter *adapter)
1655 {
1656         struct e1000_hw *hw = &adapter->hw;
1657         u32 ctrl_ext, connsw;
1658         bool swap_now = false;
1659
1660         ctrl_ext = rd32(E1000_CTRL_EXT);
1661         connsw = rd32(E1000_CONNSW);
1662
1663         /* need to live swap if current media is copper and we have fiber/serdes
1664          * to go to.
1665          */
1666
1667         if ((hw->phy.media_type == e1000_media_type_copper) &&
1668             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1669                 swap_now = true;
1670         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1671                 /* copper signal takes time to appear */
1672                 if (adapter->copper_tries < 4) {
1673                         adapter->copper_tries++;
1674                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1675                         wr32(E1000_CONNSW, connsw);
1676                         return;
1677                 } else {
1678                         adapter->copper_tries = 0;
1679                         if ((connsw & E1000_CONNSW_PHYSD) &&
1680                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1681                                 swap_now = true;
1682                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1683                                 wr32(E1000_CONNSW, connsw);
1684                         }
1685                 }
1686         }
1687
1688         if (!swap_now)
1689                 return;
1690
1691         switch (hw->phy.media_type) {
1692         case e1000_media_type_copper:
1693                 netdev_info(adapter->netdev,
1694                         "MAS: changing media to fiber/serdes\n");
1695                 ctrl_ext |=
1696                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1697                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1698                 adapter->copper_tries = 0;
1699                 break;
1700         case e1000_media_type_internal_serdes:
1701         case e1000_media_type_fiber:
1702                 netdev_info(adapter->netdev,
1703                         "MAS: changing media to copper\n");
1704                 ctrl_ext &=
1705                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1706                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1707                 break;
1708         default:
1709                 /* shouldn't get here during regular operation */
1710                 netdev_err(adapter->netdev,
1711                         "AMS: Invalid media type found, returning\n");
1712                 break;
1713         }
1714         wr32(E1000_CTRL_EXT, ctrl_ext);
1715 }
1716
1717 /**
1718  *  igb_up - Open the interface and prepare it to handle traffic
1719  *  @adapter: board private structure
1720  **/
1721 int igb_up(struct igb_adapter *adapter)
1722 {
1723         struct e1000_hw *hw = &adapter->hw;
1724         int i;
1725
1726         /* hardware has been reset, we need to reload some things */
1727         igb_configure(adapter);
1728
1729         clear_bit(__IGB_DOWN, &adapter->state);
1730
1731         for (i = 0; i < adapter->num_q_vectors; i++)
1732                 napi_enable(&(adapter->q_vector[i]->napi));
1733
1734         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1735                 igb_configure_msix(adapter);
1736         else
1737                 igb_assign_vector(adapter->q_vector[0], 0);
1738
1739         /* Clear any pending interrupts. */
1740         rd32(E1000_ICR);
1741         igb_irq_enable(adapter);
1742
1743         /* notify VFs that reset has been completed */
1744         if (adapter->vfs_allocated_count) {
1745                 u32 reg_data = rd32(E1000_CTRL_EXT);
1746
1747                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1748                 wr32(E1000_CTRL_EXT, reg_data);
1749         }
1750
1751         netif_tx_start_all_queues(adapter->netdev);
1752
1753         /* start the watchdog. */
1754         hw->mac.get_link_status = 1;
1755         schedule_work(&adapter->watchdog_task);
1756
1757         if ((adapter->flags & IGB_FLAG_EEE) &&
1758             (!hw->dev_spec._82575.eee_disable))
1759                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1760
1761         return 0;
1762 }
1763
1764 void igb_down(struct igb_adapter *adapter)
1765 {
1766         struct net_device *netdev = adapter->netdev;
1767         struct e1000_hw *hw = &adapter->hw;
1768         u32 tctl, rctl;
1769         int i;
1770
1771         /* signal that we're down so the interrupt handler does not
1772          * reschedule our watchdog timer
1773          */
1774         set_bit(__IGB_DOWN, &adapter->state);
1775
1776         /* disable receives in the hardware */
1777         rctl = rd32(E1000_RCTL);
1778         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1779         /* flush and sleep below */
1780
1781         netif_tx_stop_all_queues(netdev);
1782
1783         /* disable transmits in the hardware */
1784         tctl = rd32(E1000_TCTL);
1785         tctl &= ~E1000_TCTL_EN;
1786         wr32(E1000_TCTL, tctl);
1787         /* flush both disables and wait for them to finish */
1788         wrfl();
1789         usleep_range(10000, 11000);
1790
1791         igb_irq_disable(adapter);
1792
1793         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1794
1795         for (i = 0; i < adapter->num_q_vectors; i++) {
1796                 if (adapter->q_vector[i]) {
1797                         napi_synchronize(&adapter->q_vector[i]->napi);
1798                         napi_disable(&adapter->q_vector[i]->napi);
1799                 }
1800         }
1801
1802
1803         del_timer_sync(&adapter->watchdog_timer);
1804         del_timer_sync(&adapter->phy_info_timer);
1805
1806         netif_carrier_off(netdev);
1807
1808         /* record the stats before reset*/
1809         spin_lock(&adapter->stats64_lock);
1810         igb_update_stats(adapter, &adapter->stats64);
1811         spin_unlock(&adapter->stats64_lock);
1812
1813         adapter->link_speed = 0;
1814         adapter->link_duplex = 0;
1815
1816         if (!pci_channel_offline(adapter->pdev))
1817                 igb_reset(adapter);
1818         igb_clean_all_tx_rings(adapter);
1819         igb_clean_all_rx_rings(adapter);
1820 #ifdef CONFIG_IGB_DCA
1821
1822         /* since we reset the hardware DCA settings were cleared */
1823         igb_setup_dca(adapter);
1824 #endif
1825 }
1826
1827 void igb_reinit_locked(struct igb_adapter *adapter)
1828 {
1829         WARN_ON(in_interrupt());
1830         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1831                 usleep_range(1000, 2000);
1832         igb_down(adapter);
1833         igb_up(adapter);
1834         clear_bit(__IGB_RESETTING, &adapter->state);
1835 }
1836
1837 /** igb_enable_mas - Media Autosense re-enable after swap
1838  *
1839  * @adapter: adapter struct
1840  **/
1841 static s32 igb_enable_mas(struct igb_adapter *adapter)
1842 {
1843         struct e1000_hw *hw = &adapter->hw;
1844         u32 connsw;
1845         s32 ret_val = 0;
1846
1847         connsw = rd32(E1000_CONNSW);
1848         if (!(hw->phy.media_type == e1000_media_type_copper))
1849                 return ret_val;
1850
1851         /* configure for SerDes media detect */
1852         if (!(connsw & E1000_CONNSW_SERDESD)) {
1853                 connsw |= E1000_CONNSW_ENRGSRC;
1854                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1855                 wr32(E1000_CONNSW, connsw);
1856                 wrfl();
1857         } else if (connsw & E1000_CONNSW_SERDESD) {
1858                 /* already SerDes, no need to enable anything */
1859                 return ret_val;
1860         } else {
1861                 netdev_info(adapter->netdev,
1862                         "MAS: Unable to configure feature, disabling..\n");
1863                 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1864         }
1865         return ret_val;
1866 }
1867
1868 void igb_reset(struct igb_adapter *adapter)
1869 {
1870         struct pci_dev *pdev = adapter->pdev;
1871         struct e1000_hw *hw = &adapter->hw;
1872         struct e1000_mac_info *mac = &hw->mac;
1873         struct e1000_fc_info *fc = &hw->fc;
1874         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1875
1876         /* Repartition Pba for greater than 9k mtu
1877          * To take effect CTRL.RST is required.
1878          */
1879         switch (mac->type) {
1880         case e1000_i350:
1881         case e1000_i354:
1882         case e1000_82580:
1883                 pba = rd32(E1000_RXPBS);
1884                 pba = igb_rxpbs_adjust_82580(pba);
1885                 break;
1886         case e1000_82576:
1887                 pba = rd32(E1000_RXPBS);
1888                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1889                 break;
1890         case e1000_82575:
1891         case e1000_i210:
1892         case e1000_i211:
1893         default:
1894                 pba = E1000_PBA_34K;
1895                 break;
1896         }
1897
1898         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1899             (mac->type < e1000_82576)) {
1900                 /* adjust PBA for jumbo frames */
1901                 wr32(E1000_PBA, pba);
1902
1903                 /* To maintain wire speed transmits, the Tx FIFO should be
1904                  * large enough to accommodate two full transmit packets,
1905                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1906                  * the Rx FIFO should be large enough to accommodate at least
1907                  * one full receive packet and is similarly rounded up and
1908                  * expressed in KB.
1909                  */
1910                 pba = rd32(E1000_PBA);
1911                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1912                 tx_space = pba >> 16;
1913                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1914                 pba &= 0xffff;
1915                 /* the Tx fifo also stores 16 bytes of information about the Tx
1916                  * but don't include ethernet FCS because hardware appends it
1917                  */
1918                 min_tx_space = (adapter->max_frame_size +
1919                                 sizeof(union e1000_adv_tx_desc) -
1920                                 ETH_FCS_LEN) * 2;
1921                 min_tx_space = ALIGN(min_tx_space, 1024);
1922                 min_tx_space >>= 10;
1923                 /* software strips receive CRC, so leave room for it */
1924                 min_rx_space = adapter->max_frame_size;
1925                 min_rx_space = ALIGN(min_rx_space, 1024);
1926                 min_rx_space >>= 10;
1927
1928                 /* If current Tx allocation is less than the min Tx FIFO size,
1929                  * and the min Tx FIFO size is less than the current Rx FIFO
1930                  * allocation, take space away from current Rx allocation
1931                  */
1932                 if (tx_space < min_tx_space &&
1933                     ((min_tx_space - tx_space) < pba)) {
1934                         pba = pba - (min_tx_space - tx_space);
1935
1936                         /* if short on Rx space, Rx wins and must trump Tx
1937                          * adjustment
1938                          */
1939                         if (pba < min_rx_space)
1940                                 pba = min_rx_space;
1941                 }
1942                 wr32(E1000_PBA, pba);
1943         }
1944
1945         /* flow control settings */
1946         /* The high water mark must be low enough to fit one full frame
1947          * (or the size used for early receive) above it in the Rx FIFO.
1948          * Set it to the lower of:
1949          * - 90% of the Rx FIFO size, or
1950          * - the full Rx FIFO size minus one full frame
1951          */
1952         hwm = min(((pba << 10) * 9 / 10),
1953                         ((pba << 10) - 2 * adapter->max_frame_size));
1954
1955         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1956         fc->low_water = fc->high_water - 16;
1957         fc->pause_time = 0xFFFF;
1958         fc->send_xon = 1;
1959         fc->current_mode = fc->requested_mode;
1960
1961         /* disable receive for all VFs and wait one second */
1962         if (adapter->vfs_allocated_count) {
1963                 int i;
1964
1965                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1966                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1967
1968                 /* ping all the active vfs to let them know we are going down */
1969                 igb_ping_all_vfs(adapter);
1970
1971                 /* disable transmits and receives */
1972                 wr32(E1000_VFRE, 0);
1973                 wr32(E1000_VFTE, 0);
1974         }
1975
1976         /* Allow time for pending master requests to run */
1977         hw->mac.ops.reset_hw(hw);
1978         wr32(E1000_WUC, 0);
1979
1980         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1981                 /* need to resetup here after media swap */
1982                 adapter->ei.get_invariants(hw);
1983                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1984         }
1985         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1986                 if (igb_enable_mas(adapter))
1987                         dev_err(&pdev->dev,
1988                                 "Error enabling Media Auto Sense\n");
1989         }
1990         if (hw->mac.ops.init_hw(hw))
1991                 dev_err(&pdev->dev, "Hardware Error\n");
1992
1993         /* Flow control settings reset on hardware reset, so guarantee flow
1994          * control is off when forcing speed.
1995          */
1996         if (!hw->mac.autoneg)
1997                 igb_force_mac_fc(hw);
1998
1999         igb_init_dmac(adapter, pba);
2000 #ifdef CONFIG_IGB_HWMON
2001         /* Re-initialize the thermal sensor on i350 devices. */
2002         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2003                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2004                         /* If present, re-initialize the external thermal sensor
2005                          * interface.
2006                          */
2007                         if (adapter->ets)
2008                                 mac->ops.init_thermal_sensor_thresh(hw);
2009                 }
2010         }
2011 #endif
2012         /* Re-establish EEE setting */
2013         if (hw->phy.media_type == e1000_media_type_copper) {
2014                 switch (mac->type) {
2015                 case e1000_i350:
2016                 case e1000_i210:
2017                 case e1000_i211:
2018                         igb_set_eee_i350(hw, true, true);
2019                         break;
2020                 case e1000_i354:
2021                         igb_set_eee_i354(hw, true, true);
2022                         break;
2023                 default:
2024                         break;
2025                 }
2026         }
2027         if (!netif_running(adapter->netdev))
2028                 igb_power_down_link(adapter);
2029
2030         igb_update_mng_vlan(adapter);
2031
2032         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2033         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2034
2035         /* Re-enable PTP, where applicable. */
2036         igb_ptp_reset(adapter);
2037
2038         igb_get_phy_info(hw);
2039 }
2040
2041 static netdev_features_t igb_fix_features(struct net_device *netdev,
2042         netdev_features_t features)
2043 {
2044         /* Since there is no support for separate Rx/Tx vlan accel
2045          * enable/disable make sure Tx flag is always in same state as Rx.
2046          */
2047         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2048                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2049         else
2050                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2051
2052         return features;
2053 }
2054
2055 static int igb_set_features(struct net_device *netdev,
2056         netdev_features_t features)
2057 {
2058         netdev_features_t changed = netdev->features ^ features;
2059         struct igb_adapter *adapter = netdev_priv(netdev);
2060
2061         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2062                 igb_vlan_mode(netdev, features);
2063
2064         if (!(changed & NETIF_F_RXALL))
2065                 return 0;
2066
2067         netdev->features = features;
2068
2069         if (netif_running(netdev))
2070                 igb_reinit_locked(adapter);
2071         else
2072                 igb_reset(adapter);
2073
2074         return 0;
2075 }
2076
2077 static const struct net_device_ops igb_netdev_ops = {
2078         .ndo_open               = igb_open,
2079         .ndo_stop               = igb_close,
2080         .ndo_start_xmit         = igb_xmit_frame,
2081         .ndo_get_stats64        = igb_get_stats64,
2082         .ndo_set_rx_mode        = igb_set_rx_mode,
2083         .ndo_set_mac_address    = igb_set_mac,
2084         .ndo_change_mtu         = igb_change_mtu,
2085         .ndo_do_ioctl           = igb_ioctl,
2086         .ndo_tx_timeout         = igb_tx_timeout,
2087         .ndo_validate_addr      = eth_validate_addr,
2088         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2089         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2090         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2091         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2092         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2093         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2094         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2095 #ifdef CONFIG_NET_POLL_CONTROLLER
2096         .ndo_poll_controller    = igb_netpoll,
2097 #endif
2098         .ndo_fix_features       = igb_fix_features,
2099         .ndo_set_features       = igb_set_features,
2100 };
2101
2102 /**
2103  * igb_set_fw_version - Configure version string for ethtool
2104  * @adapter: adapter struct
2105  **/
2106 void igb_set_fw_version(struct igb_adapter *adapter)
2107 {
2108         struct e1000_hw *hw = &adapter->hw;
2109         struct e1000_fw_version fw;
2110
2111         igb_get_fw_version(hw, &fw);
2112
2113         switch (hw->mac.type) {
2114         case e1000_i210:
2115         case e1000_i211:
2116                 if (!(igb_get_flash_presence_i210(hw))) {
2117                         snprintf(adapter->fw_version,
2118                                  sizeof(adapter->fw_version),
2119                                  "%2d.%2d-%d",
2120                                  fw.invm_major, fw.invm_minor,
2121                                  fw.invm_img_type);
2122                         break;
2123                 }
2124                 /* fall through */
2125         default:
2126                 /* if option is rom valid, display its version too */
2127                 if (fw.or_valid) {
2128                         snprintf(adapter->fw_version,
2129                                  sizeof(adapter->fw_version),
2130                                  "%d.%d, 0x%08x, %d.%d.%d",
2131                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2132                                  fw.or_major, fw.or_build, fw.or_patch);
2133                 /* no option rom */
2134                 } else if (fw.etrack_id != 0X0000) {
2135                         snprintf(adapter->fw_version,
2136                             sizeof(adapter->fw_version),
2137                             "%d.%d, 0x%08x",
2138                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2139                 } else {
2140                 snprintf(adapter->fw_version,
2141                     sizeof(adapter->fw_version),
2142                     "%d.%d.%d",
2143                     fw.eep_major, fw.eep_minor, fw.eep_build);
2144                 }
2145                 break;
2146         }
2147 }
2148
2149 /**
2150  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2151  *
2152  * @adapter: adapter struct
2153  **/
2154 static void igb_init_mas(struct igb_adapter *adapter)
2155 {
2156         struct e1000_hw *hw = &adapter->hw;
2157         u16 eeprom_data;
2158
2159         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2160         switch (hw->bus.func) {
2161         case E1000_FUNC_0:
2162                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2163                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2164                         netdev_info(adapter->netdev,
2165                                 "MAS: Enabling Media Autosense for port %d\n",
2166                                 hw->bus.func);
2167                 }
2168                 break;
2169         case E1000_FUNC_1:
2170                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2171                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2172                         netdev_info(adapter->netdev,
2173                                 "MAS: Enabling Media Autosense for port %d\n",
2174                                 hw->bus.func);
2175                 }
2176                 break;
2177         case E1000_FUNC_2:
2178                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2179                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2180                         netdev_info(adapter->netdev,
2181                                 "MAS: Enabling Media Autosense for port %d\n",
2182                                 hw->bus.func);
2183                 }
2184                 break;
2185         case E1000_FUNC_3:
2186                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2187                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2188                         netdev_info(adapter->netdev,
2189                                 "MAS: Enabling Media Autosense for port %d\n",
2190                                 hw->bus.func);
2191                 }
2192                 break;
2193         default:
2194                 /* Shouldn't get here */
2195                 netdev_err(adapter->netdev,
2196                         "MAS: Invalid port configuration, returning\n");
2197                 break;
2198         }
2199 }
2200
2201 /**
2202  *  igb_init_i2c - Init I2C interface
2203  *  @adapter: pointer to adapter structure
2204  **/
2205 static s32 igb_init_i2c(struct igb_adapter *adapter)
2206 {
2207         s32 status = 0;
2208
2209         /* I2C interface supported on i350 devices */
2210         if (adapter->hw.mac.type != e1000_i350)
2211                 return 0;
2212
2213         /* Initialize the i2c bus which is controlled by the registers.
2214          * This bus will use the i2c_algo_bit structue that implements
2215          * the protocol through toggling of the 4 bits in the register.
2216          */
2217         adapter->i2c_adap.owner = THIS_MODULE;
2218         adapter->i2c_algo = igb_i2c_algo;
2219         adapter->i2c_algo.data = adapter;
2220         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2221         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2222         strlcpy(adapter->i2c_adap.name, "igb BB",
2223                 sizeof(adapter->i2c_adap.name));
2224         status = i2c_bit_add_bus(&adapter->i2c_adap);
2225         return status;
2226 }
2227
2228 /**
2229  *  igb_probe - Device Initialization Routine
2230  *  @pdev: PCI device information struct
2231  *  @ent: entry in igb_pci_tbl
2232  *
2233  *  Returns 0 on success, negative on failure
2234  *
2235  *  igb_probe initializes an adapter identified by a pci_dev structure.
2236  *  The OS initialization, configuring of the adapter private structure,
2237  *  and a hardware reset occur.
2238  **/
2239 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2240 {
2241         struct net_device *netdev;
2242         struct igb_adapter *adapter;
2243         struct e1000_hw *hw;
2244         u16 eeprom_data = 0;
2245         s32 ret_val;
2246         static int global_quad_port_a; /* global quad port a indication */
2247         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2248         int err, pci_using_dac;
2249         u8 part_str[E1000_PBANUM_LENGTH];
2250
2251         /* Catch broken hardware that put the wrong VF device ID in
2252          * the PCIe SR-IOV capability.
2253          */
2254         if (pdev->is_virtfn) {
2255                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2256                         pci_name(pdev), pdev->vendor, pdev->device);
2257                 return -EINVAL;
2258         }
2259
2260         err = pci_enable_device_mem(pdev);
2261         if (err)
2262                 return err;
2263
2264         pci_using_dac = 0;
2265         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2266         if (!err) {
2267                 pci_using_dac = 1;
2268         } else {
2269                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2270                 if (err) {
2271                         dev_err(&pdev->dev,
2272                                 "No usable DMA configuration, aborting\n");
2273                         goto err_dma;
2274                 }
2275         }
2276
2277         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2278                                            IORESOURCE_MEM),
2279                                            igb_driver_name);
2280         if (err)
2281                 goto err_pci_reg;
2282
2283         pci_enable_pcie_error_reporting(pdev);
2284
2285         pci_set_master(pdev);
2286         pci_save_state(pdev);
2287
2288         err = -ENOMEM;
2289         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2290                                    IGB_MAX_TX_QUEUES);
2291         if (!netdev)
2292                 goto err_alloc_etherdev;
2293
2294         SET_NETDEV_DEV(netdev, &pdev->dev);
2295
2296         pci_set_drvdata(pdev, netdev);
2297         adapter = netdev_priv(netdev);
2298         adapter->netdev = netdev;
2299         adapter->pdev = pdev;
2300         hw = &adapter->hw;
2301         hw->back = adapter;
2302         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2303
2304         err = -EIO;
2305         hw->hw_addr = pci_iomap(pdev, 0, 0);
2306         if (!hw->hw_addr)
2307                 goto err_ioremap;
2308
2309         netdev->netdev_ops = &igb_netdev_ops;
2310         igb_set_ethtool_ops(netdev);
2311         netdev->watchdog_timeo = 5 * HZ;
2312
2313         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2314
2315         netdev->mem_start = pci_resource_start(pdev, 0);
2316         netdev->mem_end = pci_resource_end(pdev, 0);
2317
2318         /* PCI config space info */
2319         hw->vendor_id = pdev->vendor;
2320         hw->device_id = pdev->device;
2321         hw->revision_id = pdev->revision;
2322         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2323         hw->subsystem_device_id = pdev->subsystem_device;
2324
2325         /* Copy the default MAC, PHY and NVM function pointers */
2326         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2327         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2328         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2329         /* Initialize skew-specific constants */
2330         err = ei->get_invariants(hw);
2331         if (err)
2332                 goto err_sw_init;
2333
2334         /* setup the private structure */
2335         err = igb_sw_init(adapter);
2336         if (err)
2337                 goto err_sw_init;
2338
2339         igb_get_bus_info_pcie(hw);
2340
2341         hw->phy.autoneg_wait_to_complete = false;
2342
2343         /* Copper options */
2344         if (hw->phy.media_type == e1000_media_type_copper) {
2345                 hw->phy.mdix = AUTO_ALL_MODES;
2346                 hw->phy.disable_polarity_correction = false;
2347                 hw->phy.ms_type = e1000_ms_hw_default;
2348         }
2349
2350         if (igb_check_reset_block(hw))
2351                 dev_info(&pdev->dev,
2352                         "PHY reset is blocked due to SOL/IDER session.\n");
2353
2354         /* features is initialized to 0 in allocation, it might have bits
2355          * set by igb_sw_init so we should use an or instead of an
2356          * assignment.
2357          */
2358         netdev->features |= NETIF_F_SG |
2359                             NETIF_F_IP_CSUM |
2360                             NETIF_F_IPV6_CSUM |
2361                             NETIF_F_TSO |
2362                             NETIF_F_TSO6 |
2363                             NETIF_F_RXHASH |
2364                             NETIF_F_RXCSUM |
2365                             NETIF_F_HW_VLAN_CTAG_RX |
2366                             NETIF_F_HW_VLAN_CTAG_TX;
2367
2368         /* copy netdev features into list of user selectable features */
2369         netdev->hw_features |= netdev->features;
2370         netdev->hw_features |= NETIF_F_RXALL;
2371
2372         /* set this bit last since it cannot be part of hw_features */
2373         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2374
2375         netdev->vlan_features |= NETIF_F_TSO |
2376                                  NETIF_F_TSO6 |
2377                                  NETIF_F_IP_CSUM |
2378                                  NETIF_F_IPV6_CSUM |
2379                                  NETIF_F_SG;
2380
2381         netdev->priv_flags |= IFF_SUPP_NOFCS;
2382
2383         if (pci_using_dac) {
2384                 netdev->features |= NETIF_F_HIGHDMA;
2385                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2386         }
2387
2388         if (hw->mac.type >= e1000_82576) {
2389                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2390                 netdev->features |= NETIF_F_SCTP_CSUM;
2391         }
2392
2393         netdev->priv_flags |= IFF_UNICAST_FLT;
2394
2395         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2396
2397         /* before reading the NVM, reset the controller to put the device in a
2398          * known good starting state
2399          */
2400         hw->mac.ops.reset_hw(hw);
2401
2402         /* make sure the NVM is good , i211/i210 parts can have special NVM
2403          * that doesn't contain a checksum
2404          */
2405         switch (hw->mac.type) {
2406         case e1000_i210:
2407         case e1000_i211:
2408                 if (igb_get_flash_presence_i210(hw)) {
2409                         if (hw->nvm.ops.validate(hw) < 0) {
2410                                 dev_err(&pdev->dev,
2411                                         "The NVM Checksum Is Not Valid\n");
2412                                 err = -EIO;
2413                                 goto err_eeprom;
2414                         }
2415                 }
2416                 break;
2417         default:
2418                 if (hw->nvm.ops.validate(hw) < 0) {
2419                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2420                         err = -EIO;
2421                         goto err_eeprom;
2422                 }
2423                 break;
2424         }
2425
2426         /* copy the MAC address out of the NVM */
2427         if (hw->mac.ops.read_mac_addr(hw))
2428                 dev_err(&pdev->dev, "NVM Read Error\n");
2429
2430         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2431
2432         if (!is_valid_ether_addr(netdev->dev_addr)) {
2433                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2434                 err = -EIO;
2435                 goto err_eeprom;
2436         }
2437
2438         /* get firmware version for ethtool -i */
2439         igb_set_fw_version(adapter);
2440
2441         /* configure RXPBSIZE and TXPBSIZE */
2442         if (hw->mac.type == e1000_i210) {
2443                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2444                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2445         }
2446
2447         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2448                     (unsigned long) adapter);
2449         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2450                     (unsigned long) adapter);
2451
2452         INIT_WORK(&adapter->reset_task, igb_reset_task);
2453         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2454
2455         /* Initialize link properties that are user-changeable */
2456         adapter->fc_autoneg = true;
2457         hw->mac.autoneg = true;
2458         hw->phy.autoneg_advertised = 0x2f;
2459
2460         hw->fc.requested_mode = e1000_fc_default;
2461         hw->fc.current_mode = e1000_fc_default;
2462
2463         igb_validate_mdi_setting(hw);
2464
2465         /* By default, support wake on port A */
2466         if (hw->bus.func == 0)
2467                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2468
2469         /* Check the NVM for wake support on non-port A ports */
2470         if (hw->mac.type >= e1000_82580)
2471                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2472                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2473                                  &eeprom_data);
2474         else if (hw->bus.func == 1)
2475                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2476
2477         if (eeprom_data & IGB_EEPROM_APME)
2478                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2479
2480         /* now that we have the eeprom settings, apply the special cases where
2481          * the eeprom may be wrong or the board simply won't support wake on
2482          * lan on a particular port
2483          */
2484         switch (pdev->device) {
2485         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2486                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2487                 break;
2488         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2489         case E1000_DEV_ID_82576_FIBER:
2490         case E1000_DEV_ID_82576_SERDES:
2491                 /* Wake events only supported on port A for dual fiber
2492                  * regardless of eeprom setting
2493                  */
2494                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2495                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2496                 break;
2497         case E1000_DEV_ID_82576_QUAD_COPPER:
2498         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2499                 /* if quad port adapter, disable WoL on all but port A */
2500                 if (global_quad_port_a != 0)
2501                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2502                 else
2503                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2504                 /* Reset for multiple quad port adapters */
2505                 if (++global_quad_port_a == 4)
2506                         global_quad_port_a = 0;
2507                 break;
2508         default:
2509                 /* If the device can't wake, don't set software support */
2510                 if (!device_can_wakeup(&adapter->pdev->dev))
2511                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2512         }
2513
2514         /* initialize the wol settings based on the eeprom settings */
2515         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2516                 adapter->wol |= E1000_WUFC_MAG;
2517
2518         /* Some vendors want WoL disabled by default, but still supported */
2519         if ((hw->mac.type == e1000_i350) &&
2520             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2521                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2522                 adapter->wol = 0;
2523         }
2524
2525         device_set_wakeup_enable(&adapter->pdev->dev,
2526                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2527
2528         /* reset the hardware with the new settings */
2529         igb_reset(adapter);
2530
2531         /* Init the I2C interface */
2532         err = igb_init_i2c(adapter);
2533         if (err) {
2534                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2535                 goto err_eeprom;
2536         }
2537
2538         /* let the f/w know that the h/w is now under the control of the
2539          * driver.
2540          */
2541         igb_get_hw_control(adapter);
2542
2543         strcpy(netdev->name, "eth%d");
2544         err = register_netdev(netdev);
2545         if (err)
2546                 goto err_register;
2547
2548         /* carrier off reporting is important to ethtool even BEFORE open */
2549         netif_carrier_off(netdev);
2550
2551 #ifdef CONFIG_IGB_DCA
2552         if (dca_add_requester(&pdev->dev) == 0) {
2553                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2554                 dev_info(&pdev->dev, "DCA enabled\n");
2555                 igb_setup_dca(adapter);
2556         }
2557
2558 #endif
2559 #ifdef CONFIG_IGB_HWMON
2560         /* Initialize the thermal sensor on i350 devices. */
2561         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2562                 u16 ets_word;
2563
2564                 /* Read the NVM to determine if this i350 device supports an
2565                  * external thermal sensor.
2566                  */
2567                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2568                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2569                         adapter->ets = true;
2570                 else
2571                         adapter->ets = false;
2572                 if (igb_sysfs_init(adapter))
2573                         dev_err(&pdev->dev,
2574                                 "failed to allocate sysfs resources\n");
2575         } else {
2576                 adapter->ets = false;
2577         }
2578 #endif
2579         /* Check if Media Autosense is enabled */
2580         adapter->ei = *ei;
2581         if (hw->dev_spec._82575.mas_capable)
2582                 igb_init_mas(adapter);
2583
2584         /* do hw tstamp init after resetting */
2585         igb_ptp_init(adapter);
2586
2587         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2588         /* print bus type/speed/width info, not applicable to i354 */
2589         if (hw->mac.type != e1000_i354) {
2590                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2591                          netdev->name,
2592                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2593                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2594                            "unknown"),
2595                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2596                           "Width x4" :
2597                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2598                           "Width x2" :
2599                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2600                           "Width x1" : "unknown"), netdev->dev_addr);
2601         }
2602
2603         if ((hw->mac.type >= e1000_i210 ||
2604              igb_get_flash_presence_i210(hw))) {
2605                 ret_val = igb_read_part_string(hw, part_str,
2606                                                E1000_PBANUM_LENGTH);
2607         } else {
2608                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2609         }
2610
2611         if (ret_val)
2612                 strcpy(part_str, "Unknown");
2613         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2614         dev_info(&pdev->dev,
2615                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2616                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2617                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2618                 adapter->num_rx_queues, adapter->num_tx_queues);
2619         if (hw->phy.media_type == e1000_media_type_copper) {
2620                 switch (hw->mac.type) {
2621                 case e1000_i350:
2622                 case e1000_i210:
2623                 case e1000_i211:
2624                         /* Enable EEE for internal copper PHY devices */
2625                         err = igb_set_eee_i350(hw, true, true);
2626                         if ((!err) &&
2627                             (!hw->dev_spec._82575.eee_disable)) {
2628                                 adapter->eee_advert =
2629                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2630                                 adapter->flags |= IGB_FLAG_EEE;
2631                         }
2632                         break;
2633                 case e1000_i354:
2634                         if ((rd32(E1000_CTRL_EXT) &
2635                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2636                                 err = igb_set_eee_i354(hw, true, true);
2637                                 if ((!err) &&
2638                                         (!hw->dev_spec._82575.eee_disable)) {
2639                                         adapter->eee_advert =
2640                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2641                                         adapter->flags |= IGB_FLAG_EEE;
2642                                 }
2643                         }
2644                         break;
2645                 default:
2646                         break;
2647                 }
2648         }
2649         pm_runtime_put_noidle(&pdev->dev);
2650         return 0;
2651
2652 err_register:
2653         igb_release_hw_control(adapter);
2654         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2655 err_eeprom:
2656         if (!igb_check_reset_block(hw))
2657                 igb_reset_phy(hw);
2658
2659         if (hw->flash_address)
2660                 iounmap(hw->flash_address);
2661 err_sw_init:
2662         igb_clear_interrupt_scheme(adapter);
2663         pci_iounmap(pdev, hw->hw_addr);
2664 err_ioremap:
2665         free_netdev(netdev);
2666 err_alloc_etherdev:
2667         pci_release_selected_regions(pdev,
2668                                      pci_select_bars(pdev, IORESOURCE_MEM));
2669 err_pci_reg:
2670 err_dma:
2671         pci_disable_device(pdev);
2672         return err;
2673 }
2674
2675 #ifdef CONFIG_PCI_IOV
2676 static int igb_disable_sriov(struct pci_dev *pdev)
2677 {
2678         struct net_device *netdev = pci_get_drvdata(pdev);
2679         struct igb_adapter *adapter = netdev_priv(netdev);
2680         struct e1000_hw *hw = &adapter->hw;
2681
2682         /* reclaim resources allocated to VFs */
2683         if (adapter->vf_data) {
2684                 /* disable iov and allow time for transactions to clear */
2685                 if (pci_vfs_assigned(pdev)) {
2686                         dev_warn(&pdev->dev,
2687                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2688                         return -EPERM;
2689                 } else {
2690                         pci_disable_sriov(pdev);
2691                         msleep(500);
2692                 }
2693
2694                 kfree(adapter->vf_data);
2695                 adapter->vf_data = NULL;
2696                 adapter->vfs_allocated_count = 0;
2697                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2698                 wrfl();
2699                 msleep(100);
2700                 dev_info(&pdev->dev, "IOV Disabled\n");
2701
2702                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2703                 adapter->flags |= IGB_FLAG_DMAC;
2704         }
2705
2706         return 0;
2707 }
2708
2709 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2710 {
2711         struct net_device *netdev = pci_get_drvdata(pdev);
2712         struct igb_adapter *adapter = netdev_priv(netdev);
2713         int old_vfs = pci_num_vf(pdev);
2714         int err = 0;
2715         int i;
2716
2717         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2718                 err = -EPERM;
2719                 goto out;
2720         }
2721         if (!num_vfs)
2722                 goto out;
2723
2724         if (old_vfs) {
2725                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2726                          old_vfs, max_vfs);
2727                 adapter->vfs_allocated_count = old_vfs;
2728         } else
2729                 adapter->vfs_allocated_count = num_vfs;
2730
2731         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2732                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2733
2734         /* if allocation failed then we do not support SR-IOV */
2735         if (!adapter->vf_data) {
2736                 adapter->vfs_allocated_count = 0;
2737                 dev_err(&pdev->dev,
2738                         "Unable to allocate memory for VF Data Storage\n");
2739                 err = -ENOMEM;
2740                 goto out;
2741         }
2742
2743         /* only call pci_enable_sriov() if no VFs are allocated already */
2744         if (!old_vfs) {
2745                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2746                 if (err)
2747                         goto err_out;
2748         }
2749         dev_info(&pdev->dev, "%d VFs allocated\n",
2750                  adapter->vfs_allocated_count);
2751         for (i = 0; i < adapter->vfs_allocated_count; i++)
2752                 igb_vf_configure(adapter, i);
2753
2754         /* DMA Coalescing is not supported in IOV mode. */
2755         adapter->flags &= ~IGB_FLAG_DMAC;
2756         goto out;
2757
2758 err_out:
2759         kfree(adapter->vf_data);
2760         adapter->vf_data = NULL;
2761         adapter->vfs_allocated_count = 0;
2762 out:
2763         return err;
2764 }
2765
2766 #endif
2767 /**
2768  *  igb_remove_i2c - Cleanup  I2C interface
2769  *  @adapter: pointer to adapter structure
2770  **/
2771 static void igb_remove_i2c(struct igb_adapter *adapter)
2772 {
2773         /* free the adapter bus structure */
2774         i2c_del_adapter(&adapter->i2c_adap);
2775 }
2776
2777 /**
2778  *  igb_remove - Device Removal Routine
2779  *  @pdev: PCI device information struct
2780  *
2781  *  igb_remove is called by the PCI subsystem to alert the driver
2782  *  that it should release a PCI device.  The could be caused by a
2783  *  Hot-Plug event, or because the driver is going to be removed from
2784  *  memory.
2785  **/
2786 static void igb_remove(struct pci_dev *pdev)
2787 {
2788         struct net_device *netdev = pci_get_drvdata(pdev);
2789         struct igb_adapter *adapter = netdev_priv(netdev);
2790         struct e1000_hw *hw = &adapter->hw;
2791
2792         pm_runtime_get_noresume(&pdev->dev);
2793 #ifdef CONFIG_IGB_HWMON
2794         igb_sysfs_exit(adapter);
2795 #endif
2796         igb_remove_i2c(adapter);
2797         igb_ptp_stop(adapter);
2798         /* The watchdog timer may be rescheduled, so explicitly
2799          * disable watchdog from being rescheduled.
2800          */
2801         set_bit(__IGB_DOWN, &adapter->state);
2802         del_timer_sync(&adapter->watchdog_timer);
2803         del_timer_sync(&adapter->phy_info_timer);
2804
2805         cancel_work_sync(&adapter->reset_task);
2806         cancel_work_sync(&adapter->watchdog_task);
2807
2808 #ifdef CONFIG_IGB_DCA
2809         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2810                 dev_info(&pdev->dev, "DCA disabled\n");
2811                 dca_remove_requester(&pdev->dev);
2812                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2813                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2814         }
2815 #endif
2816
2817         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2818          * would have already happened in close and is redundant.
2819          */
2820         igb_release_hw_control(adapter);
2821
2822         unregister_netdev(netdev);
2823
2824         igb_clear_interrupt_scheme(adapter);
2825
2826 #ifdef CONFIG_PCI_IOV
2827         igb_disable_sriov(pdev);
2828 #endif
2829
2830         pci_iounmap(pdev, hw->hw_addr);
2831         if (hw->flash_address)
2832                 iounmap(hw->flash_address);
2833         pci_release_selected_regions(pdev,
2834                                      pci_select_bars(pdev, IORESOURCE_MEM));
2835
2836         kfree(adapter->shadow_vfta);
2837         free_netdev(netdev);
2838
2839         pci_disable_pcie_error_reporting(pdev);
2840
2841         pci_disable_device(pdev);
2842 }
2843
2844 /**
2845  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2846  *  @adapter: board private structure to initialize
2847  *
2848  *  This function initializes the vf specific data storage and then attempts to
2849  *  allocate the VFs.  The reason for ordering it this way is because it is much
2850  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2851  *  the memory for the VFs.
2852  **/
2853 static void igb_probe_vfs(struct igb_adapter *adapter)
2854 {
2855 #ifdef CONFIG_PCI_IOV
2856         struct pci_dev *pdev = adapter->pdev;
2857         struct e1000_hw *hw = &adapter->hw;
2858
2859         /* Virtualization features not supported on i210 family. */
2860         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2861                 return;
2862
2863         pci_sriov_set_totalvfs(pdev, 7);
2864         igb_pci_enable_sriov(pdev, max_vfs);
2865
2866 #endif /* CONFIG_PCI_IOV */
2867 }
2868
2869 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2870 {
2871         struct e1000_hw *hw = &adapter->hw;
2872         u32 max_rss_queues;
2873
2874         /* Determine the maximum number of RSS queues supported. */
2875         switch (hw->mac.type) {
2876         case e1000_i211:
2877                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2878                 break;
2879         case e1000_82575:
2880         case e1000_i210:
2881                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2882                 break;
2883         case e1000_i350:
2884                 /* I350 cannot do RSS and SR-IOV at the same time */
2885                 if (!!adapter->vfs_allocated_count) {
2886                         max_rss_queues = 1;
2887                         break;
2888                 }
2889                 /* fall through */
2890         case e1000_82576:
2891                 if (!!adapter->vfs_allocated_count) {
2892                         max_rss_queues = 2;
2893                         break;
2894                 }
2895                 /* fall through */
2896         case e1000_82580:
2897         case e1000_i354:
2898         default:
2899                 max_rss_queues = IGB_MAX_RX_QUEUES;
2900                 break;
2901         }
2902
2903         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2904
2905         /* Determine if we need to pair queues. */
2906         switch (hw->mac.type) {
2907         case e1000_82575:
2908         case e1000_i211:
2909                 /* Device supports enough interrupts without queue pairing. */
2910                 break;
2911         case e1000_82576:
2912                 /* If VFs are going to be allocated with RSS queues then we
2913                  * should pair the queues in order to conserve interrupts due
2914                  * to limited supply.
2915                  */
2916                 if ((adapter->rss_queues > 1) &&
2917                     (adapter->vfs_allocated_count > 6))
2918                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2919                 /* fall through */
2920         case e1000_82580:
2921         case e1000_i350:
2922         case e1000_i354:
2923         case e1000_i210:
2924         default:
2925                 /* If rss_queues > half of max_rss_queues, pair the queues in
2926                  * order to conserve interrupts due to limited supply.
2927                  */
2928                 if (adapter->rss_queues > (max_rss_queues / 2))
2929                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2930                 break;
2931         }
2932 }
2933
2934 /**
2935  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2936  *  @adapter: board private structure to initialize
2937  *
2938  *  igb_sw_init initializes the Adapter private data structure.
2939  *  Fields are initialized based on PCI device information and
2940  *  OS network device settings (MTU size).
2941  **/
2942 static int igb_sw_init(struct igb_adapter *adapter)
2943 {
2944         struct e1000_hw *hw = &adapter->hw;
2945         struct net_device *netdev = adapter->netdev;
2946         struct pci_dev *pdev = adapter->pdev;
2947
2948         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2949
2950         /* set default ring sizes */
2951         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2952         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2953
2954         /* set default ITR values */
2955         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2956         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2957
2958         /* set default work limits */
2959         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2960
2961         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2962                                   VLAN_HLEN;
2963         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2964
2965         spin_lock_init(&adapter->stats64_lock);
2966 #ifdef CONFIG_PCI_IOV
2967         switch (hw->mac.type) {
2968         case e1000_82576:
2969         case e1000_i350:
2970                 if (max_vfs > 7) {
2971                         dev_warn(&pdev->dev,
2972                                  "Maximum of 7 VFs per PF, using max\n");
2973                         max_vfs = adapter->vfs_allocated_count = 7;
2974                 } else
2975                         adapter->vfs_allocated_count = max_vfs;
2976                 if (adapter->vfs_allocated_count)
2977                         dev_warn(&pdev->dev,
2978                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2979                 break;
2980         default:
2981                 break;
2982         }
2983 #endif /* CONFIG_PCI_IOV */
2984
2985         igb_init_queue_configuration(adapter);
2986
2987         /* Setup and initialize a copy of the hw vlan table array */
2988         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2989                                        GFP_ATOMIC);
2990
2991         /* This call may decrease the number of queues */
2992         if (igb_init_interrupt_scheme(adapter, true)) {
2993                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2994                 return -ENOMEM;
2995         }
2996
2997         igb_probe_vfs(adapter);
2998
2999         /* Explicitly disable IRQ since the NIC can be in any state. */
3000         igb_irq_disable(adapter);
3001
3002         if (hw->mac.type >= e1000_i350)
3003                 adapter->flags &= ~IGB_FLAG_DMAC;
3004
3005         set_bit(__IGB_DOWN, &adapter->state);
3006         return 0;
3007 }
3008
3009 /**
3010  *  igb_open - Called when a network interface is made active
3011  *  @netdev: network interface device structure
3012  *
3013  *  Returns 0 on success, negative value on failure
3014  *
3015  *  The open entry point is called when a network interface is made
3016  *  active by the system (IFF_UP).  At this point all resources needed
3017  *  for transmit and receive operations are allocated, the interrupt
3018  *  handler is registered with the OS, the watchdog timer is started,
3019  *  and the stack is notified that the interface is ready.
3020  **/
3021 static int __igb_open(struct net_device *netdev, bool resuming)
3022 {
3023         struct igb_adapter *adapter = netdev_priv(netdev);
3024         struct e1000_hw *hw = &adapter->hw;
3025         struct pci_dev *pdev = adapter->pdev;
3026         int err;
3027         int i;
3028
3029         /* disallow open during test */
3030         if (test_bit(__IGB_TESTING, &adapter->state)) {
3031                 WARN_ON(resuming);
3032                 return -EBUSY;
3033         }
3034
3035         if (!resuming)
3036                 pm_runtime_get_sync(&pdev->dev);
3037
3038         netif_carrier_off(netdev);
3039
3040         /* allocate transmit descriptors */
3041         err = igb_setup_all_tx_resources(adapter);
3042         if (err)
3043                 goto err_setup_tx;
3044
3045         /* allocate receive descriptors */
3046         err = igb_setup_all_rx_resources(adapter);
3047         if (err)
3048                 goto err_setup_rx;
3049
3050         igb_power_up_link(adapter);
3051
3052         /* before we allocate an interrupt, we must be ready to handle it.
3053          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3054          * as soon as we call pci_request_irq, so we have to setup our
3055          * clean_rx handler before we do so.
3056          */
3057         igb_configure(adapter);
3058
3059         err = igb_request_irq(adapter);
3060         if (err)
3061                 goto err_req_irq;
3062
3063         /* Notify the stack of the actual queue counts. */
3064         err = netif_set_real_num_tx_queues(adapter->netdev,
3065                                            adapter->num_tx_queues);
3066         if (err)
3067                 goto err_set_queues;
3068
3069         err = netif_set_real_num_rx_queues(adapter->netdev,
3070                                            adapter->num_rx_queues);
3071         if (err)
3072                 goto err_set_queues;
3073
3074         /* From here on the code is the same as igb_up() */
3075         clear_bit(__IGB_DOWN, &adapter->state);
3076
3077         for (i = 0; i < adapter->num_q_vectors; i++)
3078                 napi_enable(&(adapter->q_vector[i]->napi));
3079
3080         /* Clear any pending interrupts. */
3081         rd32(E1000_ICR);
3082
3083         igb_irq_enable(adapter);
3084
3085         /* notify VFs that reset has been completed */
3086         if (adapter->vfs_allocated_count) {
3087                 u32 reg_data = rd32(E1000_CTRL_EXT);
3088
3089                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3090                 wr32(E1000_CTRL_EXT, reg_data);
3091         }
3092
3093         netif_tx_start_all_queues(netdev);
3094
3095         if (!resuming)
3096                 pm_runtime_put(&pdev->dev);
3097
3098         /* start the watchdog. */
3099         hw->mac.get_link_status = 1;
3100         schedule_work(&adapter->watchdog_task);
3101
3102         return 0;
3103
3104 err_set_queues:
3105         igb_free_irq(adapter);
3106 err_req_irq:
3107         igb_release_hw_control(adapter);
3108         igb_power_down_link(adapter);
3109         igb_free_all_rx_resources(adapter);
3110 err_setup_rx:
3111         igb_free_all_tx_resources(adapter);
3112 err_setup_tx:
3113         igb_reset(adapter);
3114         if (!resuming)
3115                 pm_runtime_put(&pdev->dev);
3116
3117         return err;
3118 }
3119
3120 static int igb_open(struct net_device *netdev)
3121 {
3122         return __igb_open(netdev, false);
3123 }
3124
3125 /**
3126  *  igb_close - Disables a network interface
3127  *  @netdev: network interface device structure
3128  *
3129  *  Returns 0, this is not allowed to fail
3130  *
3131  *  The close entry point is called when an interface is de-activated
3132  *  by the OS.  The hardware is still under the driver's control, but
3133  *  needs to be disabled.  A global MAC reset is issued to stop the
3134  *  hardware, and all transmit and receive resources are freed.
3135  **/
3136 static int __igb_close(struct net_device *netdev, bool suspending)
3137 {
3138         struct igb_adapter *adapter = netdev_priv(netdev);
3139         struct pci_dev *pdev = adapter->pdev;
3140
3141         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3142
3143         if (!suspending)
3144                 pm_runtime_get_sync(&pdev->dev);
3145
3146         igb_down(adapter);
3147         igb_free_irq(adapter);
3148
3149         igb_free_all_tx_resources(adapter);
3150         igb_free_all_rx_resources(adapter);
3151
3152         if (!suspending)
3153                 pm_runtime_put_sync(&pdev->dev);
3154         return 0;
3155 }
3156
3157 static int igb_close(struct net_device *netdev)
3158 {
3159         return __igb_close(netdev, false);
3160 }
3161
3162 /**
3163  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3164  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3165  *
3166  *  Return 0 on success, negative on failure
3167  **/
3168 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3169 {
3170         struct device *dev = tx_ring->dev;
3171         int size;
3172
3173         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3174
3175         tx_ring->tx_buffer_info = vzalloc(size);
3176         if (!tx_ring->tx_buffer_info)
3177                 goto err;
3178
3179         /* round up to nearest 4K */
3180         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3181         tx_ring->size = ALIGN(tx_ring->size, 4096);
3182
3183         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3184                                            &tx_ring->dma, GFP_KERNEL);
3185         if (!tx_ring->desc)
3186                 goto err;
3187
3188         tx_ring->next_to_use = 0;
3189         tx_ring->next_to_clean = 0;
3190
3191         return 0;
3192
3193 err:
3194         vfree(tx_ring->tx_buffer_info);
3195         tx_ring->tx_buffer_info = NULL;
3196         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3197         return -ENOMEM;
3198 }
3199
3200 /**
3201  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3202  *                               (Descriptors) for all queues
3203  *  @adapter: board private structure
3204  *
3205  *  Return 0 on success, negative on failure
3206  **/
3207 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3208 {
3209         struct pci_dev *pdev = adapter->pdev;
3210         int i, err = 0;
3211
3212         for (i = 0; i < adapter->num_tx_queues; i++) {
3213                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3214                 if (err) {
3215                         dev_err(&pdev->dev,
3216                                 "Allocation for Tx Queue %u failed\n", i);
3217                         for (i--; i >= 0; i--)
3218                                 igb_free_tx_resources(adapter->tx_ring[i]);
3219                         break;
3220                 }
3221         }
3222
3223         return err;
3224 }
3225
3226 /**
3227  *  igb_setup_tctl - configure the transmit control registers
3228  *  @adapter: Board private structure
3229  **/
3230 void igb_setup_tctl(struct igb_adapter *adapter)
3231 {
3232         struct e1000_hw *hw = &adapter->hw;
3233         u32 tctl;
3234
3235         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3236         wr32(E1000_TXDCTL(0), 0);
3237
3238         /* Program the Transmit Control Register */
3239         tctl = rd32(E1000_TCTL);
3240         tctl &= ~E1000_TCTL_CT;
3241         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3242                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3243
3244         igb_config_collision_dist(hw);
3245
3246         /* Enable transmits */
3247         tctl |= E1000_TCTL_EN;
3248
3249         wr32(E1000_TCTL, tctl);
3250 }
3251
3252 /**
3253  *  igb_configure_tx_ring - Configure transmit ring after Reset
3254  *  @adapter: board private structure
3255  *  @ring: tx ring to configure
3256  *
3257  *  Configure a transmit ring after a reset.
3258  **/
3259 void igb_configure_tx_ring(struct igb_adapter *adapter,
3260                            struct igb_ring *ring)
3261 {
3262         struct e1000_hw *hw = &adapter->hw;
3263         u32 txdctl = 0;
3264         u64 tdba = ring->dma;
3265         int reg_idx = ring->reg_idx;
3266
3267         /* disable the queue */
3268         wr32(E1000_TXDCTL(reg_idx), 0);
3269         wrfl();
3270         mdelay(10);
3271
3272         wr32(E1000_TDLEN(reg_idx),
3273              ring->count * sizeof(union e1000_adv_tx_desc));
3274         wr32(E1000_TDBAL(reg_idx),
3275              tdba & 0x00000000ffffffffULL);
3276         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3277
3278         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3279         wr32(E1000_TDH(reg_idx), 0);
3280         writel(0, ring->tail);
3281
3282         txdctl |= IGB_TX_PTHRESH;
3283         txdctl |= IGB_TX_HTHRESH << 8;
3284         txdctl |= IGB_TX_WTHRESH << 16;
3285
3286         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3287         wr32(E1000_TXDCTL(reg_idx), txdctl);
3288 }
3289
3290 /**
3291  *  igb_configure_tx - Configure transmit Unit after Reset
3292  *  @adapter: board private structure
3293  *
3294  *  Configure the Tx unit of the MAC after a reset.
3295  **/
3296 static void igb_configure_tx(struct igb_adapter *adapter)
3297 {
3298         int i;
3299
3300         for (i = 0; i < adapter->num_tx_queues; i++)
3301                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3302 }
3303
3304 /**
3305  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3306  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3307  *
3308  *  Returns 0 on success, negative on failure
3309  **/
3310 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3311 {
3312         struct device *dev = rx_ring->dev;
3313         int size;
3314
3315         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3316
3317         rx_ring->rx_buffer_info = vzalloc(size);
3318         if (!rx_ring->rx_buffer_info)
3319                 goto err;
3320
3321         /* Round up to nearest 4K */
3322         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3323         rx_ring->size = ALIGN(rx_ring->size, 4096);
3324
3325         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3326                                            &rx_ring->dma, GFP_KERNEL);
3327         if (!rx_ring->desc)
3328                 goto err;
3329
3330         rx_ring->next_to_alloc = 0;
3331         rx_ring->next_to_clean = 0;
3332         rx_ring->next_to_use = 0;
3333
3334         return 0;
3335
3336 err:
3337         vfree(rx_ring->rx_buffer_info);
3338         rx_ring->rx_buffer_info = NULL;
3339         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3340         return -ENOMEM;
3341 }
3342
3343 /**
3344  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3345  *                               (Descriptors) for all queues
3346  *  @adapter: board private structure
3347  *
3348  *  Return 0 on success, negative on failure
3349  **/
3350 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3351 {
3352         struct pci_dev *pdev = adapter->pdev;
3353         int i, err = 0;
3354
3355         for (i = 0; i < adapter->num_rx_queues; i++) {
3356                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3357                 if (err) {
3358                         dev_err(&pdev->dev,
3359                                 "Allocation for Rx Queue %u failed\n", i);
3360                         for (i--; i >= 0; i--)
3361                                 igb_free_rx_resources(adapter->rx_ring[i]);
3362                         break;
3363                 }
3364         }
3365
3366         return err;
3367 }
3368
3369 /**
3370  *  igb_setup_mrqc - configure the multiple receive queue control registers
3371  *  @adapter: Board private structure
3372  **/
3373 static void igb_setup_mrqc(struct igb_adapter *adapter)
3374 {
3375         struct e1000_hw *hw = &adapter->hw;
3376         u32 mrqc, rxcsum;
3377         u32 j, num_rx_queues;
3378         u32 rss_key[10];
3379
3380         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3381         for (j = 0; j < 10; j++)
3382                 wr32(E1000_RSSRK(j), rss_key[j]);
3383
3384         num_rx_queues = adapter->rss_queues;
3385
3386         switch (hw->mac.type) {
3387         case e1000_82576:
3388                 /* 82576 supports 2 RSS queues for SR-IOV */
3389                 if (adapter->vfs_allocated_count)
3390                         num_rx_queues = 2;
3391                 break;
3392         default:
3393                 break;
3394         }
3395
3396         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3397                 for (j = 0; j < IGB_RETA_SIZE; j++)
3398                         adapter->rss_indir_tbl[j] =
3399                         (j * num_rx_queues) / IGB_RETA_SIZE;
3400                 adapter->rss_indir_tbl_init = num_rx_queues;
3401         }
3402         igb_write_rss_indir_tbl(adapter);
3403
3404         /* Disable raw packet checksumming so that RSS hash is placed in
3405          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3406          * offloads as they are enabled by default
3407          */
3408         rxcsum = rd32(E1000_RXCSUM);
3409         rxcsum |= E1000_RXCSUM_PCSD;
3410
3411         if (adapter->hw.mac.type >= e1000_82576)
3412                 /* Enable Receive Checksum Offload for SCTP */
3413                 rxcsum |= E1000_RXCSUM_CRCOFL;
3414
3415         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3416         wr32(E1000_RXCSUM, rxcsum);
3417
3418         /* Generate RSS hash based on packet types, TCP/UDP
3419          * port numbers and/or IPv4/v6 src and dst addresses
3420          */
3421         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3422                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3423                E1000_MRQC_RSS_FIELD_IPV6 |
3424                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3425                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3426
3427         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3428                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3429         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3430                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3431
3432         /* If VMDq is enabled then we set the appropriate mode for that, else
3433          * we default to RSS so that an RSS hash is calculated per packet even
3434          * if we are only using one queue
3435          */
3436         if (adapter->vfs_allocated_count) {
3437                 if (hw->mac.type > e1000_82575) {
3438                         /* Set the default pool for the PF's first queue */
3439                         u32 vtctl = rd32(E1000_VT_CTL);
3440
3441                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3442                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3443                         vtctl |= adapter->vfs_allocated_count <<
3444                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3445                         wr32(E1000_VT_CTL, vtctl);
3446                 }
3447                 if (adapter->rss_queues > 1)
3448                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3449                 else
3450                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3451         } else {
3452                 if (hw->mac.type != e1000_i211)
3453                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3454         }
3455         igb_vmm_control(adapter);
3456
3457         wr32(E1000_MRQC, mrqc);
3458 }
3459
3460 /**
3461  *  igb_setup_rctl - configure the receive control registers
3462  *  @adapter: Board private structure
3463  **/
3464 void igb_setup_rctl(struct igb_adapter *adapter)
3465 {
3466         struct e1000_hw *hw = &adapter->hw;
3467         u32 rctl;
3468
3469         rctl = rd32(E1000_RCTL);
3470
3471         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3472         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3473
3474         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3475                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3476
3477         /* enable stripping of CRC. It's unlikely this will break BMC
3478          * redirection as it did with e1000. Newer features require
3479          * that the HW strips the CRC.
3480          */
3481         rctl |= E1000_RCTL_SECRC;
3482
3483         /* disable store bad packets and clear size bits. */
3484         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3485
3486         /* enable LPE to prevent packets larger than max_frame_size */
3487         rctl |= E1000_RCTL_LPE;
3488
3489         /* disable queue 0 to prevent tail write w/o re-config */
3490         wr32(E1000_RXDCTL(0), 0);
3491
3492         /* Attention!!!  For SR-IOV PF driver operations you must enable
3493          * queue drop for all VF and PF queues to prevent head of line blocking
3494          * if an un-trusted VF does not provide descriptors to hardware.
3495          */
3496         if (adapter->vfs_allocated_count) {
3497                 /* set all queue drop enable bits */
3498                 wr32(E1000_QDE, ALL_QUEUES);
3499         }
3500
3501         /* This is useful for sniffing bad packets. */
3502         if (adapter->netdev->features & NETIF_F_RXALL) {
3503                 /* UPE and MPE will be handled by normal PROMISC logic
3504                  * in e1000e_set_rx_mode
3505                  */
3506                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3507                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3508                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3509
3510                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3511                           E1000_RCTL_DPF | /* Allow filtered pause */
3512                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3513                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3514                  * and that breaks VLANs.
3515                  */
3516         }
3517
3518         wr32(E1000_RCTL, rctl);
3519 }
3520
3521 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3522                                    int vfn)
3523 {
3524         struct e1000_hw *hw = &adapter->hw;
3525         u32 vmolr;
3526
3527         /* if it isn't the PF check to see if VFs are enabled and
3528          * increase the size to support vlan tags
3529          */
3530         if (vfn < adapter->vfs_allocated_count &&
3531             adapter->vf_data[vfn].vlans_enabled)
3532                 size += VLAN_TAG_SIZE;
3533
3534         vmolr = rd32(E1000_VMOLR(vfn));
3535         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3536         vmolr |= size | E1000_VMOLR_LPE;
3537         wr32(E1000_VMOLR(vfn), vmolr);
3538
3539         return 0;
3540 }
3541
3542 /**
3543  *  igb_rlpml_set - set maximum receive packet size
3544  *  @adapter: board private structure
3545  *
3546  *  Configure maximum receivable packet size.
3547  **/
3548 static void igb_rlpml_set(struct igb_adapter *adapter)
3549 {
3550         u32 max_frame_size = adapter->max_frame_size;
3551         struct e1000_hw *hw = &adapter->hw;
3552         u16 pf_id = adapter->vfs_allocated_count;
3553
3554         if (pf_id) {
3555                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3556                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3557                  * to our max jumbo frame size, in case we need to enable
3558                  * jumbo frames on one of the rings later.
3559                  * This will not pass over-length frames into the default
3560                  * queue because it's gated by the VMOLR.RLPML.
3561                  */
3562                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3563         }
3564
3565         wr32(E1000_RLPML, max_frame_size);
3566 }
3567
3568 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3569                                  int vfn, bool aupe)
3570 {
3571         struct e1000_hw *hw = &adapter->hw;
3572         u32 vmolr;
3573
3574         /* This register exists only on 82576 and newer so if we are older then
3575          * we should exit and do nothing
3576          */
3577         if (hw->mac.type < e1000_82576)
3578                 return;
3579
3580         vmolr = rd32(E1000_VMOLR(vfn));
3581         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3582         if (hw->mac.type == e1000_i350) {
3583                 u32 dvmolr;
3584
3585                 dvmolr = rd32(E1000_DVMOLR(vfn));
3586                 dvmolr |= E1000_DVMOLR_STRVLAN;
3587                 wr32(E1000_DVMOLR(vfn), dvmolr);
3588         }
3589         if (aupe)
3590                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3591         else
3592                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3593
3594         /* clear all bits that might not be set */
3595         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3596
3597         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3598                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3599         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3600          * multicast packets
3601          */
3602         if (vfn <= adapter->vfs_allocated_count)
3603                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3604
3605         wr32(E1000_VMOLR(vfn), vmolr);
3606 }
3607
3608 /**
3609  *  igb_configure_rx_ring - Configure a receive ring after Reset
3610  *  @adapter: board private structure
3611  *  @ring: receive ring to be configured
3612  *
3613  *  Configure the Rx unit of the MAC after a reset.
3614  **/
3615 void igb_configure_rx_ring(struct igb_adapter *adapter,
3616                            struct igb_ring *ring)
3617 {
3618         struct e1000_hw *hw = &adapter->hw;
3619         u64 rdba = ring->dma;
3620         int reg_idx = ring->reg_idx;
3621         u32 srrctl = 0, rxdctl = 0;
3622
3623         /* disable the queue */
3624         wr32(E1000_RXDCTL(reg_idx), 0);
3625
3626         /* Set DMA base address registers */
3627         wr32(E1000_RDBAL(reg_idx),
3628              rdba & 0x00000000ffffffffULL);
3629         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3630         wr32(E1000_RDLEN(reg_idx),
3631              ring->count * sizeof(union e1000_adv_rx_desc));
3632
3633         /* initialize head and tail */
3634         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3635         wr32(E1000_RDH(reg_idx), 0);
3636         writel(0, ring->tail);
3637
3638         /* set descriptor configuration */
3639         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3640         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3641         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3642         if (hw->mac.type >= e1000_82580)
3643                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3644         /* Only set Drop Enable if we are supporting multiple queues */
3645         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3646                 srrctl |= E1000_SRRCTL_DROP_EN;
3647
3648         wr32(E1000_SRRCTL(reg_idx), srrctl);
3649
3650         /* set filtering for VMDQ pools */
3651         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3652
3653         rxdctl |= IGB_RX_PTHRESH;
3654         rxdctl |= IGB_RX_HTHRESH << 8;
3655         rxdctl |= IGB_RX_WTHRESH << 16;
3656
3657         /* enable receive descriptor fetching */
3658         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3659         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3660 }
3661
3662 /**
3663  *  igb_configure_rx - Configure receive Unit after Reset
3664  *  @adapter: board private structure
3665  *
3666  *  Configure the Rx unit of the MAC after a reset.
3667  **/
3668 static void igb_configure_rx(struct igb_adapter *adapter)
3669 {
3670         int i;
3671
3672         /* set UTA to appropriate mode */
3673         igb_set_uta(adapter);
3674
3675         /* set the correct pool for the PF default MAC address in entry 0 */
3676         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3677                          adapter->vfs_allocated_count);
3678
3679         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3680          * the Base and Length of the Rx Descriptor Ring
3681          */
3682         for (i = 0; i < adapter->num_rx_queues; i++)
3683                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3684 }
3685
3686 /**
3687  *  igb_free_tx_resources - Free Tx Resources per Queue
3688  *  @tx_ring: Tx descriptor ring for a specific queue
3689  *
3690  *  Free all transmit software resources
3691  **/
3692 void igb_free_tx_resources(struct igb_ring *tx_ring)
3693 {
3694         igb_clean_tx_ring(tx_ring);
3695
3696         vfree(tx_ring->tx_buffer_info);
3697         tx_ring->tx_buffer_info = NULL;
3698
3699         /* if not set, then don't free */
3700         if (!tx_ring->desc)
3701                 return;
3702
3703         dma_free_coherent(tx_ring->dev, tx_ring->size,
3704                           tx_ring->desc, tx_ring->dma);
3705
3706         tx_ring->desc = NULL;
3707 }
3708
3709 /**
3710  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3711  *  @adapter: board private structure
3712  *
3713  *  Free all transmit software resources
3714  **/
3715 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3716 {
3717         int i;
3718
3719         for (i = 0; i < adapter->num_tx_queues; i++)
3720                 if (adapter->tx_ring[i])
3721                         igb_free_tx_resources(adapter->tx_ring[i]);
3722 }
3723
3724 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3725                                     struct igb_tx_buffer *tx_buffer)
3726 {
3727         if (tx_buffer->skb) {
3728                 dev_kfree_skb_any(tx_buffer->skb);
3729                 if (dma_unmap_len(tx_buffer, len))
3730                         dma_unmap_single(ring->dev,
3731                                          dma_unmap_addr(tx_buffer, dma),
3732                                          dma_unmap_len(tx_buffer, len),
3733                                          DMA_TO_DEVICE);
3734         } else if (dma_unmap_len(tx_buffer, len)) {
3735                 dma_unmap_page(ring->dev,
3736                                dma_unmap_addr(tx_buffer, dma),
3737                                dma_unmap_len(tx_buffer, len),
3738                                DMA_TO_DEVICE);
3739         }
3740         tx_buffer->next_to_watch = NULL;
3741         tx_buffer->skb = NULL;
3742         dma_unmap_len_set(tx_buffer, len, 0);
3743         /* buffer_info must be completely set up in the transmit path */
3744 }
3745
3746 /**
3747  *  igb_clean_tx_ring - Free Tx Buffers
3748  *  @tx_ring: ring to be cleaned
3749  **/
3750 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3751 {
3752         struct igb_tx_buffer *buffer_info;
3753         unsigned long size;
3754         u16 i;
3755
3756         if (!tx_ring->tx_buffer_info)
3757                 return;
3758         /* Free all the Tx ring sk_buffs */
3759
3760         for (i = 0; i < tx_ring->count; i++) {
3761                 buffer_info = &tx_ring->tx_buffer_info[i];
3762                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3763         }
3764
3765         netdev_tx_reset_queue(txring_txq(tx_ring));
3766
3767         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3768         memset(tx_ring->tx_buffer_info, 0, size);
3769
3770         /* Zero out the descriptor ring */
3771         memset(tx_ring->desc, 0, tx_ring->size);
3772
3773         tx_ring->next_to_use = 0;
3774         tx_ring->next_to_clean = 0;
3775 }
3776
3777 /**
3778  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3779  *  @adapter: board private structure
3780  **/
3781 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3782 {
3783         int i;
3784
3785         for (i = 0; i < adapter->num_tx_queues; i++)
3786                 if (adapter->tx_ring[i])
3787                         igb_clean_tx_ring(adapter->tx_ring[i]);
3788 }
3789
3790 /**
3791  *  igb_free_rx_resources - Free Rx Resources
3792  *  @rx_ring: ring to clean the resources from
3793  *
3794  *  Free all receive software resources
3795  **/
3796 void igb_free_rx_resources(struct igb_ring *rx_ring)
3797 {
3798         igb_clean_rx_ring(rx_ring);
3799
3800         vfree(rx_ring->rx_buffer_info);
3801         rx_ring->rx_buffer_info = NULL;
3802
3803         /* if not set, then don't free */
3804         if (!rx_ring->desc)
3805                 return;
3806
3807         dma_free_coherent(rx_ring->dev, rx_ring->size,
3808                           rx_ring->desc, rx_ring->dma);
3809
3810         rx_ring->desc = NULL;
3811 }
3812
3813 /**
3814  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3815  *  @adapter: board private structure
3816  *
3817  *  Free all receive software resources
3818  **/
3819 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3820 {
3821         int i;
3822
3823         for (i = 0; i < adapter->num_rx_queues; i++)
3824                 if (adapter->rx_ring[i])
3825                         igb_free_rx_resources(adapter->rx_ring[i]);
3826 }
3827
3828 /**
3829  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3830  *  @rx_ring: ring to free buffers from
3831  **/
3832 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3833 {
3834         unsigned long size;
3835         u16 i;
3836
3837         if (rx_ring->skb)
3838                 dev_kfree_skb(rx_ring->skb);
3839         rx_ring->skb = NULL;
3840
3841         if (!rx_ring->rx_buffer_info)
3842                 return;
3843
3844         /* Free all the Rx ring sk_buffs */
3845         for (i = 0; i < rx_ring->count; i++) {
3846                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3847
3848                 if (!buffer_info->page)
3849                         continue;
3850
3851                 dma_unmap_page(rx_ring->dev,
3852                                buffer_info->dma,
3853                                PAGE_SIZE,
3854                                DMA_FROM_DEVICE);
3855                 __free_page(buffer_info->page);
3856
3857                 buffer_info->page = NULL;
3858         }
3859
3860         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3861         memset(rx_ring->rx_buffer_info, 0, size);
3862
3863         /* Zero out the descriptor ring */
3864         memset(rx_ring->desc, 0, rx_ring->size);
3865
3866         rx_ring->next_to_alloc = 0;
3867         rx_ring->next_to_clean = 0;
3868         rx_ring->next_to_use = 0;
3869 }
3870
3871 /**
3872  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3873  *  @adapter: board private structure
3874  **/
3875 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3876 {
3877         int i;
3878
3879         for (i = 0; i < adapter->num_rx_queues; i++)
3880                 if (adapter->rx_ring[i])
3881                         igb_clean_rx_ring(adapter->rx_ring[i]);
3882 }
3883
3884 /**
3885  *  igb_set_mac - Change the Ethernet Address of the NIC
3886  *  @netdev: network interface device structure
3887  *  @p: pointer to an address structure
3888  *
3889  *  Returns 0 on success, negative on failure
3890  **/
3891 static int igb_set_mac(struct net_device *netdev, void *p)
3892 {
3893         struct igb_adapter *adapter = netdev_priv(netdev);
3894         struct e1000_hw *hw = &adapter->hw;
3895         struct sockaddr *addr = p;
3896
3897         if (!is_valid_ether_addr(addr->sa_data))
3898                 return -EADDRNOTAVAIL;
3899
3900         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3901         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3902
3903         /* set the correct pool for the new PF MAC address in entry 0 */
3904         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3905                          adapter->vfs_allocated_count);
3906
3907         return 0;
3908 }
3909
3910 /**
3911  *  igb_write_mc_addr_list - write multicast addresses to MTA
3912  *  @netdev: network interface device structure
3913  *
3914  *  Writes multicast address list to the MTA hash table.
3915  *  Returns: -ENOMEM on failure
3916  *           0 on no addresses written
3917  *           X on writing X addresses to MTA
3918  **/
3919 static int igb_write_mc_addr_list(struct net_device *netdev)
3920 {
3921         struct igb_adapter *adapter = netdev_priv(netdev);
3922         struct e1000_hw *hw = &adapter->hw;
3923         struct netdev_hw_addr *ha;
3924         u8  *mta_list;
3925         int i;
3926
3927         if (netdev_mc_empty(netdev)) {
3928                 /* nothing to program, so clear mc list */
3929                 igb_update_mc_addr_list(hw, NULL, 0);
3930                 igb_restore_vf_multicasts(adapter);
3931                 return 0;
3932         }
3933
3934         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3935         if (!mta_list)
3936                 return -ENOMEM;
3937
3938         /* The shared function expects a packed array of only addresses. */
3939         i = 0;
3940         netdev_for_each_mc_addr(ha, netdev)
3941                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3942
3943         igb_update_mc_addr_list(hw, mta_list, i);
3944         kfree(mta_list);
3945
3946         return netdev_mc_count(netdev);
3947 }
3948
3949 /**
3950  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3951  *  @netdev: network interface device structure
3952  *
3953  *  Writes unicast address list to the RAR table.
3954  *  Returns: -ENOMEM on failure/insufficient address space
3955  *           0 on no addresses written
3956  *           X on writing X addresses to the RAR table
3957  **/
3958 static int igb_write_uc_addr_list(struct net_device *netdev)
3959 {
3960         struct igb_adapter *adapter = netdev_priv(netdev);
3961         struct e1000_hw *hw = &adapter->hw;
3962         unsigned int vfn = adapter->vfs_allocated_count;
3963         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3964         int count = 0;
3965
3966         /* return ENOMEM indicating insufficient memory for addresses */
3967         if (netdev_uc_count(netdev) > rar_entries)
3968                 return -ENOMEM;
3969
3970         if (!netdev_uc_empty(netdev) && rar_entries) {
3971                 struct netdev_hw_addr *ha;
3972
3973                 netdev_for_each_uc_addr(ha, netdev) {
3974                         if (!rar_entries)
3975                                 break;
3976                         igb_rar_set_qsel(adapter, ha->addr,
3977                                          rar_entries--,
3978                                          vfn);
3979                         count++;
3980                 }
3981         }
3982         /* write the addresses in reverse order to avoid write combining */
3983         for (; rar_entries > 0 ; rar_entries--) {
3984                 wr32(E1000_RAH(rar_entries), 0);
3985                 wr32(E1000_RAL(rar_entries), 0);
3986         }
3987         wrfl();
3988
3989         return count;
3990 }
3991
3992 /**
3993  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3994  *  @netdev: network interface device structure
3995  *
3996  *  The set_rx_mode entry point is called whenever the unicast or multicast
3997  *  address lists or the network interface flags are updated.  This routine is
3998  *  responsible for configuring the hardware for proper unicast, multicast,
3999  *  promiscuous mode, and all-multi behavior.
4000  **/
4001 static void igb_set_rx_mode(struct net_device *netdev)
4002 {
4003         struct igb_adapter *adapter = netdev_priv(netdev);
4004         struct e1000_hw *hw = &adapter->hw;
4005         unsigned int vfn = adapter->vfs_allocated_count;
4006         u32 rctl, vmolr = 0;
4007         int count;
4008
4009         /* Check for Promiscuous and All Multicast modes */
4010         rctl = rd32(E1000_RCTL);
4011
4012         /* clear the effected bits */
4013         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4014
4015         if (netdev->flags & IFF_PROMISC) {
4016                 /* retain VLAN HW filtering if in VT mode */
4017                 if (adapter->vfs_allocated_count)
4018                         rctl |= E1000_RCTL_VFE;
4019                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4020                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4021         } else {
4022                 if (netdev->flags & IFF_ALLMULTI) {
4023                         rctl |= E1000_RCTL_MPE;
4024                         vmolr |= E1000_VMOLR_MPME;
4025                 } else {
4026                         /* Write addresses to the MTA, if the attempt fails
4027                          * then we should just turn on promiscuous mode so
4028                          * that we can at least receive multicast traffic
4029                          */
4030                         count = igb_write_mc_addr_list(netdev);
4031                         if (count < 0) {
4032                                 rctl |= E1000_RCTL_MPE;
4033                                 vmolr |= E1000_VMOLR_MPME;
4034                         } else if (count) {
4035                                 vmolr |= E1000_VMOLR_ROMPE;
4036                         }
4037                 }
4038                 /* Write addresses to available RAR registers, if there is not
4039                  * sufficient space to store all the addresses then enable
4040                  * unicast promiscuous mode
4041                  */
4042                 count = igb_write_uc_addr_list(netdev);
4043                 if (count < 0) {
4044                         rctl |= E1000_RCTL_UPE;
4045                         vmolr |= E1000_VMOLR_ROPE;
4046                 }
4047                 rctl |= E1000_RCTL_VFE;
4048         }
4049         wr32(E1000_RCTL, rctl);
4050
4051         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4052          * the VMOLR to enable the appropriate modes.  Without this workaround
4053          * we will have issues with VLAN tag stripping not being done for frames
4054          * that are only arriving because we are the default pool
4055          */
4056         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4057                 return;
4058
4059         vmolr |= rd32(E1000_VMOLR(vfn)) &
4060                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4061         wr32(E1000_VMOLR(vfn), vmolr);
4062         igb_restore_vf_multicasts(adapter);
4063 }
4064
4065 static void igb_check_wvbr(struct igb_adapter *adapter)
4066 {
4067         struct e1000_hw *hw = &adapter->hw;
4068         u32 wvbr = 0;
4069
4070         switch (hw->mac.type) {
4071         case e1000_82576:
4072         case e1000_i350:
4073                 wvbr = rd32(E1000_WVBR);
4074                 if (!wvbr)
4075                         return;
4076                 break;
4077         default:
4078                 break;
4079         }
4080
4081         adapter->wvbr |= wvbr;
4082 }
4083
4084 #define IGB_STAGGERED_QUEUE_OFFSET 8
4085
4086 static void igb_spoof_check(struct igb_adapter *adapter)
4087 {
4088         int j;
4089
4090         if (!adapter->wvbr)
4091                 return;
4092
4093         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4094                 if (adapter->wvbr & (1 << j) ||
4095                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4096                         dev_warn(&adapter->pdev->dev,
4097                                 "Spoof event(s) detected on VF %d\n", j);
4098                         adapter->wvbr &=
4099                                 ~((1 << j) |
4100                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4101                 }
4102         }
4103 }
4104
4105 /* Need to wait a few seconds after link up to get diagnostic information from
4106  * the phy
4107  */
4108 static void igb_update_phy_info(unsigned long data)
4109 {
4110         struct igb_adapter *adapter = (struct igb_adapter *) data;
4111         igb_get_phy_info(&adapter->hw);
4112 }
4113
4114 /**
4115  *  igb_has_link - check shared code for link and determine up/down
4116  *  @adapter: pointer to driver private info
4117  **/
4118 bool igb_has_link(struct igb_adapter *adapter)
4119 {
4120         struct e1000_hw *hw = &adapter->hw;
4121         bool link_active = false;
4122
4123         /* get_link_status is set on LSC (link status) interrupt or
4124          * rx sequence error interrupt.  get_link_status will stay
4125          * false until the e1000_check_for_link establishes link
4126          * for copper adapters ONLY
4127          */
4128         switch (hw->phy.media_type) {
4129         case e1000_media_type_copper:
4130                 if (!hw->mac.get_link_status)
4131                         return true;
4132         case e1000_media_type_internal_serdes:
4133                 hw->mac.ops.check_for_link(hw);
4134                 link_active = !hw->mac.get_link_status;
4135                 break;
4136         default:
4137         case e1000_media_type_unknown:
4138                 break;
4139         }
4140
4141         if (((hw->mac.type == e1000_i210) ||
4142              (hw->mac.type == e1000_i211)) &&
4143              (hw->phy.id == I210_I_PHY_ID)) {
4144                 if (!netif_carrier_ok(adapter->netdev)) {
4145                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4146                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4147                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4148                         adapter->link_check_timeout = jiffies;
4149                 }
4150         }
4151
4152         return link_active;
4153 }
4154
4155 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4156 {
4157         bool ret = false;
4158         u32 ctrl_ext, thstat;
4159
4160         /* check for thermal sensor event on i350 copper only */
4161         if (hw->mac.type == e1000_i350) {
4162                 thstat = rd32(E1000_THSTAT);
4163                 ctrl_ext = rd32(E1000_CTRL_EXT);
4164
4165                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4166                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4167                         ret = !!(thstat & event);
4168         }
4169
4170         return ret;
4171 }
4172
4173 /**
4174  *  igb_check_lvmmc - check for malformed packets received
4175  *  and indicated in LVMMC register
4176  *  @adapter: pointer to adapter
4177  **/
4178 static void igb_check_lvmmc(struct igb_adapter *adapter)
4179 {
4180         struct e1000_hw *hw = &adapter->hw;
4181         u32 lvmmc;
4182
4183         lvmmc = rd32(E1000_LVMMC);
4184         if (lvmmc) {
4185                 if (unlikely(net_ratelimit())) {
4186                         netdev_warn(adapter->netdev,
4187                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4188                                     lvmmc);
4189                 }
4190         }
4191 }
4192
4193 /**
4194  *  igb_watchdog - Timer Call-back
4195  *  @data: pointer to adapter cast into an unsigned long
4196  **/
4197 static void igb_watchdog(unsigned long data)
4198 {
4199         struct igb_adapter *adapter = (struct igb_adapter *)data;
4200         /* Do the rest outside of interrupt context */
4201         schedule_work(&adapter->watchdog_task);
4202 }
4203
4204 static void igb_watchdog_task(struct work_struct *work)
4205 {
4206         struct igb_adapter *adapter = container_of(work,
4207                                                    struct igb_adapter,
4208                                                    watchdog_task);
4209         struct e1000_hw *hw = &adapter->hw;
4210         struct e1000_phy_info *phy = &hw->phy;
4211         struct net_device *netdev = adapter->netdev;
4212         u32 link;
4213         int i;
4214         u32 connsw;
4215
4216         link = igb_has_link(adapter);
4217
4218         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4219                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4220                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4221                 else
4222                         link = false;
4223         }
4224
4225         /* Force link down if we have fiber to swap to */
4226         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4227                 if (hw->phy.media_type == e1000_media_type_copper) {
4228                         connsw = rd32(E1000_CONNSW);
4229                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4230                                 link = 0;
4231                 }
4232         }
4233         if (link) {
4234                 /* Perform a reset if the media type changed. */
4235                 if (hw->dev_spec._82575.media_changed) {
4236                         hw->dev_spec._82575.media_changed = false;
4237                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4238                         igb_reset(adapter);
4239                 }
4240                 /* Cancel scheduled suspend requests. */
4241                 pm_runtime_resume(netdev->dev.parent);
4242
4243                 if (!netif_carrier_ok(netdev)) {
4244                         u32 ctrl;
4245
4246                         hw->mac.ops.get_speed_and_duplex(hw,
4247                                                          &adapter->link_speed,
4248                                                          &adapter->link_duplex);
4249
4250                         ctrl = rd32(E1000_CTRL);
4251                         /* Links status message must follow this format */
4252                         netdev_info(netdev,
4253                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4254                                netdev->name,
4255                                adapter->link_speed,
4256                                adapter->link_duplex == FULL_DUPLEX ?
4257                                "Full" : "Half",
4258                                (ctrl & E1000_CTRL_TFCE) &&
4259                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4260                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4261                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4262
4263                         /* disable EEE if enabled */
4264                         if ((adapter->flags & IGB_FLAG_EEE) &&
4265                                 (adapter->link_duplex == HALF_DUPLEX)) {
4266                                 dev_info(&adapter->pdev->dev,
4267                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4268                                 adapter->hw.dev_spec._82575.eee_disable = true;
4269                                 adapter->flags &= ~IGB_FLAG_EEE;
4270                         }
4271
4272                         /* check if SmartSpeed worked */
4273                         igb_check_downshift(hw);
4274                         if (phy->speed_downgraded)
4275                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4276
4277                         /* check for thermal sensor event */
4278                         if (igb_thermal_sensor_event(hw,
4279                             E1000_THSTAT_LINK_THROTTLE))
4280                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4281
4282                         /* adjust timeout factor according to speed/duplex */
4283                         adapter->tx_timeout_factor = 1;
4284                         switch (adapter->link_speed) {
4285                         case SPEED_10:
4286                                 adapter->tx_timeout_factor = 14;
4287                                 break;
4288                         case SPEED_100:
4289                                 /* maybe add some timeout factor ? */
4290                                 break;
4291                         }
4292
4293                         netif_carrier_on(netdev);
4294
4295                         igb_ping_all_vfs(adapter);
4296                         igb_check_vf_rate_limit(adapter);
4297
4298                         /* link state has changed, schedule phy info update */
4299                         if (!test_bit(__IGB_DOWN, &adapter->state))
4300                                 mod_timer(&adapter->phy_info_timer,
4301                                           round_jiffies(jiffies + 2 * HZ));
4302                 }
4303         } else {
4304                 if (netif_carrier_ok(netdev)) {
4305                         adapter->link_speed = 0;
4306                         adapter->link_duplex = 0;
4307
4308                         /* check for thermal sensor event */
4309                         if (igb_thermal_sensor_event(hw,
4310                             E1000_THSTAT_PWR_DOWN)) {
4311                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4312                         }
4313
4314                         /* Links status message must follow this format */
4315                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4316                                netdev->name);
4317                         netif_carrier_off(netdev);
4318
4319                         igb_ping_all_vfs(adapter);
4320
4321                         /* link state has changed, schedule phy info update */
4322                         if (!test_bit(__IGB_DOWN, &adapter->state))
4323                                 mod_timer(&adapter->phy_info_timer,
4324                                           round_jiffies(jiffies + 2 * HZ));
4325
4326                         /* link is down, time to check for alternate media */
4327                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4328                                 igb_check_swap_media(adapter);
4329                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4330                                         schedule_work(&adapter->reset_task);
4331                                         /* return immediately */
4332                                         return;
4333                                 }
4334                         }
4335                         pm_schedule_suspend(netdev->dev.parent,
4336                                             MSEC_PER_SEC * 5);
4337
4338                 /* also check for alternate media here */
4339                 } else if (!netif_carrier_ok(netdev) &&
4340                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4341                         igb_check_swap_media(adapter);
4342                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4343                                 schedule_work(&adapter->reset_task);
4344                                 /* return immediately */
4345                                 return;
4346                         }
4347                 }
4348         }
4349
4350         spin_lock(&adapter->stats64_lock);
4351         igb_update_stats(adapter, &adapter->stats64);
4352         spin_unlock(&adapter->stats64_lock);
4353
4354         for (i = 0; i < adapter->num_tx_queues; i++) {
4355                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4356                 if (!netif_carrier_ok(netdev)) {
4357                         /* We've lost link, so the controller stops DMA,
4358                          * but we've got queued Tx work that's never going
4359                          * to get done, so reset controller to flush Tx.
4360                          * (Do the reset outside of interrupt context).
4361                          */
4362                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4363                                 adapter->tx_timeout_count++;
4364                                 schedule_work(&adapter->reset_task);
4365                                 /* return immediately since reset is imminent */
4366                                 return;
4367                         }
4368                 }
4369
4370                 /* Force detection of hung controller every watchdog period */
4371                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4372         }
4373
4374         /* Cause software interrupt to ensure Rx ring is cleaned */
4375         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4376                 u32 eics = 0;
4377
4378                 for (i = 0; i < adapter->num_q_vectors; i++)
4379                         eics |= adapter->q_vector[i]->eims_value;
4380                 wr32(E1000_EICS, eics);
4381         } else {
4382                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4383         }
4384
4385         igb_spoof_check(adapter);
4386         igb_ptp_rx_hang(adapter);
4387
4388         /* Check LVMMC register on i350/i354 only */
4389         if ((adapter->hw.mac.type == e1000_i350) ||
4390             (adapter->hw.mac.type == e1000_i354))
4391                 igb_check_lvmmc(adapter);
4392
4393         /* Reset the timer */
4394         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4395                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4396                         mod_timer(&adapter->watchdog_timer,
4397                                   round_jiffies(jiffies +  HZ));
4398                 else
4399                         mod_timer(&adapter->watchdog_timer,
4400                                   round_jiffies(jiffies + 2 * HZ));
4401         }
4402 }
4403
4404 enum latency_range {
4405         lowest_latency = 0,
4406         low_latency = 1,
4407         bulk_latency = 2,
4408         latency_invalid = 255
4409 };
4410
4411 /**
4412  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4413  *  @q_vector: pointer to q_vector
4414  *
4415  *  Stores a new ITR value based on strictly on packet size.  This
4416  *  algorithm is less sophisticated than that used in igb_update_itr,
4417  *  due to the difficulty of synchronizing statistics across multiple
4418  *  receive rings.  The divisors and thresholds used by this function
4419  *  were determined based on theoretical maximum wire speed and testing
4420  *  data, in order to minimize response time while increasing bulk
4421  *  throughput.
4422  *  This functionality is controlled by ethtool's coalescing settings.
4423  *  NOTE:  This function is called only when operating in a multiqueue
4424  *         receive environment.
4425  **/
4426 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4427 {
4428         int new_val = q_vector->itr_val;
4429         int avg_wire_size = 0;
4430         struct igb_adapter *adapter = q_vector->adapter;
4431         unsigned int packets;
4432
4433         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4434          * ints/sec - ITR timer value of 120 ticks.
4435          */
4436         if (adapter->link_speed != SPEED_1000) {
4437                 new_val = IGB_4K_ITR;
4438                 goto set_itr_val;
4439         }
4440
4441         packets = q_vector->rx.total_packets;
4442         if (packets)
4443                 avg_wire_size = q_vector->rx.total_bytes / packets;
4444
4445         packets = q_vector->tx.total_packets;
4446         if (packets)
4447                 avg_wire_size = max_t(u32, avg_wire_size,
4448                                       q_vector->tx.total_bytes / packets);
4449
4450         /* if avg_wire_size isn't set no work was done */
4451         if (!avg_wire_size)
4452                 goto clear_counts;
4453
4454         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4455         avg_wire_size += 24;
4456
4457         /* Don't starve jumbo frames */
4458         avg_wire_size = min(avg_wire_size, 3000);
4459
4460         /* Give a little boost to mid-size frames */
4461         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4462                 new_val = avg_wire_size / 3;
4463         else
4464                 new_val = avg_wire_size / 2;
4465
4466         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4467         if (new_val < IGB_20K_ITR &&
4468             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4469              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4470                 new_val = IGB_20K_ITR;
4471
4472 set_itr_val:
4473         if (new_val != q_vector->itr_val) {
4474                 q_vector->itr_val = new_val;
4475                 q_vector->set_itr = 1;
4476         }
4477 clear_counts:
4478         q_vector->rx.total_bytes = 0;
4479         q_vector->rx.total_packets = 0;
4480         q_vector->tx.total_bytes = 0;
4481         q_vector->tx.total_packets = 0;
4482 }
4483
4484 /**
4485  *  igb_update_itr - update the dynamic ITR value based on statistics
4486  *  @q_vector: pointer to q_vector
4487  *  @ring_container: ring info to update the itr for
4488  *
4489  *  Stores a new ITR value based on packets and byte
4490  *  counts during the last interrupt.  The advantage of per interrupt
4491  *  computation is faster updates and more accurate ITR for the current
4492  *  traffic pattern.  Constants in this function were computed
4493  *  based on theoretical maximum wire speed and thresholds were set based
4494  *  on testing data as well as attempting to minimize response time
4495  *  while increasing bulk throughput.
4496  *  This functionality is controlled by ethtool's coalescing settings.
4497  *  NOTE:  These calculations are only valid when operating in a single-
4498  *         queue environment.
4499  **/
4500 static void igb_update_itr(struct igb_q_vector *q_vector,
4501                            struct igb_ring_container *ring_container)
4502 {
4503         unsigned int packets = ring_container->total_packets;
4504         unsigned int bytes = ring_container->total_bytes;
4505         u8 itrval = ring_container->itr;
4506
4507         /* no packets, exit with status unchanged */
4508         if (packets == 0)
4509                 return;
4510
4511         switch (itrval) {
4512         case lowest_latency:
4513                 /* handle TSO and jumbo frames */
4514                 if (bytes/packets > 8000)
4515                         itrval = bulk_latency;
4516                 else if ((packets < 5) && (bytes > 512))
4517                         itrval = low_latency;
4518                 break;
4519         case low_latency:  /* 50 usec aka 20000 ints/s */
4520                 if (bytes > 10000) {
4521                         /* this if handles the TSO accounting */
4522                         if (bytes/packets > 8000)
4523                                 itrval = bulk_latency;
4524                         else if ((packets < 10) || ((bytes/packets) > 1200))
4525                                 itrval = bulk_latency;
4526                         else if ((packets > 35))
4527                                 itrval = lowest_latency;
4528                 } else if (bytes/packets > 2000) {
4529                         itrval = bulk_latency;
4530                 } else if (packets <= 2 && bytes < 512) {
4531                         itrval = lowest_latency;
4532                 }
4533                 break;
4534         case bulk_latency: /* 250 usec aka 4000 ints/s */
4535                 if (bytes > 25000) {
4536                         if (packets > 35)
4537                                 itrval = low_latency;
4538                 } else if (bytes < 1500) {
4539                         itrval = low_latency;
4540                 }
4541                 break;
4542         }
4543
4544         /* clear work counters since we have the values we need */
4545         ring_container->total_bytes = 0;
4546         ring_container->total_packets = 0;
4547
4548         /* write updated itr to ring container */
4549         ring_container->itr = itrval;
4550 }
4551
4552 static void igb_set_itr(struct igb_q_vector *q_vector)
4553 {
4554         struct igb_adapter *adapter = q_vector->adapter;
4555         u32 new_itr = q_vector->itr_val;
4556         u8 current_itr = 0;
4557
4558         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4559         if (adapter->link_speed != SPEED_1000) {
4560                 current_itr = 0;
4561                 new_itr = IGB_4K_ITR;
4562                 goto set_itr_now;
4563         }
4564
4565         igb_update_itr(q_vector, &q_vector->tx);
4566         igb_update_itr(q_vector, &q_vector->rx);
4567
4568         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4569
4570         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4571         if (current_itr == lowest_latency &&
4572             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4573              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4574                 current_itr = low_latency;
4575
4576         switch (current_itr) {
4577         /* counts and packets in update_itr are dependent on these numbers */
4578         case lowest_latency:
4579                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4580                 break;
4581         case low_latency:
4582                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4583                 break;
4584         case bulk_latency:
4585                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4586                 break;
4587         default:
4588                 break;
4589         }
4590
4591 set_itr_now:
4592         if (new_itr != q_vector->itr_val) {
4593                 /* this attempts to bias the interrupt rate towards Bulk
4594                  * by adding intermediate steps when interrupt rate is
4595                  * increasing
4596                  */
4597                 new_itr = new_itr > q_vector->itr_val ?
4598                           max((new_itr * q_vector->itr_val) /
4599                           (new_itr + (q_vector->itr_val >> 2)),
4600                           new_itr) : new_itr;
4601                 /* Don't write the value here; it resets the adapter's
4602                  * internal timer, and causes us to delay far longer than
4603                  * we should between interrupts.  Instead, we write the ITR
4604                  * value at the beginning of the next interrupt so the timing
4605                  * ends up being correct.
4606                  */
4607                 q_vector->itr_val = new_itr;
4608                 q_vector->set_itr = 1;
4609         }
4610 }
4611
4612 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4613                             u32 type_tucmd, u32 mss_l4len_idx)
4614 {
4615         struct e1000_adv_tx_context_desc *context_desc;
4616         u16 i = tx_ring->next_to_use;
4617
4618         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4619
4620         i++;
4621         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4622
4623         /* set bits to identify this as an advanced context descriptor */
4624         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4625
4626         /* For 82575, context index must be unique per ring. */
4627         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4628                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4629
4630         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4631         context_desc->seqnum_seed       = 0;
4632         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4633         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4634 }
4635
4636 static int igb_tso(struct igb_ring *tx_ring,
4637                    struct igb_tx_buffer *first,
4638                    u8 *hdr_len)
4639 {
4640         struct sk_buff *skb = first->skb;
4641         u32 vlan_macip_lens, type_tucmd;
4642         u32 mss_l4len_idx, l4len;
4643         int err;
4644
4645         if (skb->ip_summed != CHECKSUM_PARTIAL)
4646                 return 0;
4647
4648         if (!skb_is_gso(skb))
4649                 return 0;
4650
4651         err = skb_cow_head(skb, 0);
4652         if (err < 0)
4653                 return err;
4654
4655         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4656         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4657
4658         if (first->protocol == htons(ETH_P_IP)) {
4659                 struct iphdr *iph = ip_hdr(skb);
4660                 iph->tot_len = 0;
4661                 iph->check = 0;
4662                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4663                                                          iph->daddr, 0,
4664                                                          IPPROTO_TCP,
4665                                                          0);
4666                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4667                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4668                                    IGB_TX_FLAGS_CSUM |
4669                                    IGB_TX_FLAGS_IPV4;
4670         } else if (skb_is_gso_v6(skb)) {
4671                 ipv6_hdr(skb)->payload_len = 0;
4672                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4673                                                        &ipv6_hdr(skb)->daddr,
4674                                                        0, IPPROTO_TCP, 0);
4675                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4676                                    IGB_TX_FLAGS_CSUM;
4677         }
4678
4679         /* compute header lengths */
4680         l4len = tcp_hdrlen(skb);
4681         *hdr_len = skb_transport_offset(skb) + l4len;
4682
4683         /* update gso size and bytecount with header size */
4684         first->gso_segs = skb_shinfo(skb)->gso_segs;
4685         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4686
4687         /* MSS L4LEN IDX */
4688         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4689         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4690
4691         /* VLAN MACLEN IPLEN */
4692         vlan_macip_lens = skb_network_header_len(skb);
4693         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4694         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4695
4696         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4697
4698         return 1;
4699 }
4700
4701 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4702 {
4703         struct sk_buff *skb = first->skb;
4704         u32 vlan_macip_lens = 0;
4705         u32 mss_l4len_idx = 0;
4706         u32 type_tucmd = 0;
4707
4708         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4709                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4710                         return;
4711         } else {
4712                 u8 l4_hdr = 0;
4713
4714                 switch (first->protocol) {
4715                 case htons(ETH_P_IP):
4716                         vlan_macip_lens |= skb_network_header_len(skb);
4717                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4718                         l4_hdr = ip_hdr(skb)->protocol;
4719                         break;
4720                 case htons(ETH_P_IPV6):
4721                         vlan_macip_lens |= skb_network_header_len(skb);
4722                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4723                         break;
4724                 default:
4725                         if (unlikely(net_ratelimit())) {
4726                                 dev_warn(tx_ring->dev,
4727                                          "partial checksum but proto=%x!\n",
4728                                          first->protocol);
4729                         }
4730                         break;
4731                 }
4732
4733                 switch (l4_hdr) {
4734                 case IPPROTO_TCP:
4735                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4736                         mss_l4len_idx = tcp_hdrlen(skb) <<
4737                                         E1000_ADVTXD_L4LEN_SHIFT;
4738                         break;
4739                 case IPPROTO_SCTP:
4740                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4741                         mss_l4len_idx = sizeof(struct sctphdr) <<
4742                                         E1000_ADVTXD_L4LEN_SHIFT;
4743                         break;
4744                 case IPPROTO_UDP:
4745                         mss_l4len_idx = sizeof(struct udphdr) <<
4746                                         E1000_ADVTXD_L4LEN_SHIFT;
4747                         break;
4748                 default:
4749                         if (unlikely(net_ratelimit())) {
4750                                 dev_warn(tx_ring->dev,
4751                                          "partial checksum but l4 proto=%x!\n",
4752                                          l4_hdr);
4753                         }
4754                         break;
4755                 }
4756
4757                 /* update TX checksum flag */
4758                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4759         }
4760
4761         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4762         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4763
4764         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4765 }
4766
4767 #define IGB_SET_FLAG(_input, _flag, _result) \
4768         ((_flag <= _result) ? \
4769          ((u32)(_input & _flag) * (_result / _flag)) : \
4770          ((u32)(_input & _flag) / (_flag / _result)))
4771
4772 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4773 {
4774         /* set type for advanced descriptor with frame checksum insertion */
4775         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4776                        E1000_ADVTXD_DCMD_DEXT |
4777                        E1000_ADVTXD_DCMD_IFCS;
4778
4779         /* set HW vlan bit if vlan is present */
4780         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4781                                  (E1000_ADVTXD_DCMD_VLE));
4782
4783         /* set segmentation bits for TSO */
4784         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4785                                  (E1000_ADVTXD_DCMD_TSE));
4786
4787         /* set timestamp bit if present */
4788         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4789                                  (E1000_ADVTXD_MAC_TSTAMP));
4790
4791         /* insert frame checksum */
4792         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4793
4794         return cmd_type;
4795 }
4796
4797 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4798                                  union e1000_adv_tx_desc *tx_desc,
4799                                  u32 tx_flags, unsigned int paylen)
4800 {
4801         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4802
4803         /* 82575 requires a unique index per ring */
4804         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4805                 olinfo_status |= tx_ring->reg_idx << 4;
4806
4807         /* insert L4 checksum */
4808         olinfo_status |= IGB_SET_FLAG(tx_flags,
4809                                       IGB_TX_FLAGS_CSUM,
4810                                       (E1000_TXD_POPTS_TXSM << 8));
4811
4812         /* insert IPv4 checksum */
4813         olinfo_status |= IGB_SET_FLAG(tx_flags,
4814                                       IGB_TX_FLAGS_IPV4,
4815                                       (E1000_TXD_POPTS_IXSM << 8));
4816
4817         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4818 }
4819
4820 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4821 {
4822         struct net_device *netdev = tx_ring->netdev;
4823
4824         netif_stop_subqueue(netdev, tx_ring->queue_index);
4825
4826         /* Herbert's original patch had:
4827          *  smp_mb__after_netif_stop_queue();
4828          * but since that doesn't exist yet, just open code it.
4829          */
4830         smp_mb();
4831
4832         /* We need to check again in a case another CPU has just
4833          * made room available.
4834          */
4835         if (igb_desc_unused(tx_ring) < size)
4836                 return -EBUSY;
4837
4838         /* A reprieve! */
4839         netif_wake_subqueue(netdev, tx_ring->queue_index);
4840
4841         u64_stats_update_begin(&tx_ring->tx_syncp2);
4842         tx_ring->tx_stats.restart_queue2++;
4843         u64_stats_update_end(&tx_ring->tx_syncp2);
4844
4845         return 0;
4846 }
4847
4848 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4849 {
4850         if (igb_desc_unused(tx_ring) >= size)
4851                 return 0;
4852         return __igb_maybe_stop_tx(tx_ring, size);
4853 }
4854
4855 static void igb_tx_map(struct igb_ring *tx_ring,
4856                        struct igb_tx_buffer *first,
4857                        const u8 hdr_len)
4858 {
4859         struct sk_buff *skb = first->skb;
4860         struct igb_tx_buffer *tx_buffer;
4861         union e1000_adv_tx_desc *tx_desc;
4862         struct skb_frag_struct *frag;
4863         dma_addr_t dma;
4864         unsigned int data_len, size;
4865         u32 tx_flags = first->tx_flags;
4866         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4867         u16 i = tx_ring->next_to_use;
4868
4869         tx_desc = IGB_TX_DESC(tx_ring, i);
4870
4871         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4872
4873         size = skb_headlen(skb);
4874         data_len = skb->data_len;
4875
4876         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4877
4878         tx_buffer = first;
4879
4880         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4881                 if (dma_mapping_error(tx_ring->dev, dma))
4882                         goto dma_error;
4883
4884                 /* record length, and DMA address */
4885                 dma_unmap_len_set(tx_buffer, len, size);
4886                 dma_unmap_addr_set(tx_buffer, dma, dma);
4887
4888                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4889
4890                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4891                         tx_desc->read.cmd_type_len =
4892                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4893
4894                         i++;
4895                         tx_desc++;
4896                         if (i == tx_ring->count) {
4897                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4898                                 i = 0;
4899                         }
4900                         tx_desc->read.olinfo_status = 0;
4901
4902                         dma += IGB_MAX_DATA_PER_TXD;
4903                         size -= IGB_MAX_DATA_PER_TXD;
4904
4905                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4906                 }
4907
4908                 if (likely(!data_len))
4909                         break;
4910
4911                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4912
4913                 i++;
4914                 tx_desc++;
4915                 if (i == tx_ring->count) {
4916                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4917                         i = 0;
4918                 }
4919                 tx_desc->read.olinfo_status = 0;
4920
4921                 size = skb_frag_size(frag);
4922                 data_len -= size;
4923
4924                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4925                                        size, DMA_TO_DEVICE);
4926
4927                 tx_buffer = &tx_ring->tx_buffer_info[i];
4928         }
4929
4930         /* write last descriptor with RS and EOP bits */
4931         cmd_type |= size | IGB_TXD_DCMD;
4932         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4933
4934         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4935
4936         /* set the timestamp */
4937         first->time_stamp = jiffies;
4938
4939         /* Force memory writes to complete before letting h/w know there
4940          * are new descriptors to fetch.  (Only applicable for weak-ordered
4941          * memory model archs, such as IA-64).
4942          *
4943          * We also need this memory barrier to make certain all of the
4944          * status bits have been updated before next_to_watch is written.
4945          */
4946         wmb();
4947
4948         /* set next_to_watch value indicating a packet is present */
4949         first->next_to_watch = tx_desc;
4950
4951         i++;
4952         if (i == tx_ring->count)
4953                 i = 0;
4954
4955         tx_ring->next_to_use = i;
4956
4957         /* Make sure there is space in the ring for the next send. */
4958         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4959
4960         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
4961                 writel(i, tx_ring->tail);
4962
4963                 /* we need this if more than one processor can write to our tail
4964                  * at a time, it synchronizes IO on IA64/Altix systems
4965                  */
4966                 mmiowb();
4967         }
4968         return;
4969
4970 dma_error:
4971         dev_err(tx_ring->dev, "TX DMA map failed\n");
4972
4973         /* clear dma mappings for failed tx_buffer_info map */
4974         for (;;) {
4975                 tx_buffer = &tx_ring->tx_buffer_info[i];
4976                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4977                 if (tx_buffer == first)
4978                         break;
4979                 if (i == 0)
4980                         i = tx_ring->count;
4981                 i--;
4982         }
4983
4984         tx_ring->next_to_use = i;
4985 }
4986
4987 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4988                                 struct igb_ring *tx_ring)
4989 {
4990         struct igb_tx_buffer *first;
4991         int tso;
4992         u32 tx_flags = 0;
4993         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4994         __be16 protocol = vlan_get_protocol(skb);
4995         u8 hdr_len = 0;
4996
4997         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4998          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4999          *       + 2 desc gap to keep tail from touching head,
5000          *       + 1 desc for context descriptor,
5001          * otherwise try next time
5002          */
5003         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
5004                 unsigned short f;
5005
5006                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5007                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5008         } else {
5009                 count += skb_shinfo(skb)->nr_frags;
5010         }
5011
5012         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5013                 /* this is a hard error */
5014                 return NETDEV_TX_BUSY;
5015         }
5016
5017         /* record the location of the first descriptor for this packet */
5018         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5019         first->skb = skb;
5020         first->bytecount = skb->len;
5021         first->gso_segs = 1;
5022
5023         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5024                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5025
5026                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5027                                            &adapter->state)) {
5028                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5029                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5030
5031                         adapter->ptp_tx_skb = skb_get(skb);
5032                         adapter->ptp_tx_start = jiffies;
5033                         if (adapter->hw.mac.type == e1000_82576)
5034                                 schedule_work(&adapter->ptp_tx_work);
5035                 }
5036         }
5037
5038         skb_tx_timestamp(skb);
5039
5040         if (vlan_tx_tag_present(skb)) {
5041                 tx_flags |= IGB_TX_FLAGS_VLAN;
5042                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5043         }
5044
5045         /* record initial flags and protocol */
5046         first->tx_flags = tx_flags;
5047         first->protocol = protocol;
5048
5049         tso = igb_tso(tx_ring, first, &hdr_len);
5050         if (tso < 0)
5051                 goto out_drop;
5052         else if (!tso)
5053                 igb_tx_csum(tx_ring, first);
5054
5055         igb_tx_map(tx_ring, first, hdr_len);
5056
5057         return NETDEV_TX_OK;
5058
5059 out_drop:
5060         igb_unmap_and_free_tx_resource(tx_ring, first);
5061
5062         return NETDEV_TX_OK;
5063 }
5064
5065 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5066                                                     struct sk_buff *skb)
5067 {
5068         unsigned int r_idx = skb->queue_mapping;
5069
5070         if (r_idx >= adapter->num_tx_queues)
5071                 r_idx = r_idx % adapter->num_tx_queues;
5072
5073         return adapter->tx_ring[r_idx];
5074 }
5075
5076 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5077                                   struct net_device *netdev)
5078 {
5079         struct igb_adapter *adapter = netdev_priv(netdev);
5080
5081         if (test_bit(__IGB_DOWN, &adapter->state)) {
5082                 dev_kfree_skb_any(skb);
5083                 return NETDEV_TX_OK;
5084         }
5085
5086         if (skb->len <= 0) {
5087                 dev_kfree_skb_any(skb);
5088                 return NETDEV_TX_OK;
5089         }
5090
5091         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5092          * in order to meet this minimum size requirement.
5093          */
5094         if (unlikely(skb->len < 17)) {
5095                 if (skb_pad(skb, 17 - skb->len))
5096                         return NETDEV_TX_OK;
5097                 skb->len = 17;
5098                 skb_set_tail_pointer(skb, 17);
5099         }
5100
5101         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5102 }
5103
5104 /**
5105  *  igb_tx_timeout - Respond to a Tx Hang
5106  *  @netdev: network interface device structure
5107  **/
5108 static void igb_tx_timeout(struct net_device *netdev)
5109 {
5110         struct igb_adapter *adapter = netdev_priv(netdev);
5111         struct e1000_hw *hw = &adapter->hw;
5112
5113         /* Do the reset outside of interrupt context */
5114         adapter->tx_timeout_count++;
5115
5116         if (hw->mac.type >= e1000_82580)
5117                 hw->dev_spec._82575.global_device_reset = true;
5118
5119         schedule_work(&adapter->reset_task);
5120         wr32(E1000_EICS,
5121              (adapter->eims_enable_mask & ~adapter->eims_other));
5122 }
5123
5124 static void igb_reset_task(struct work_struct *work)
5125 {
5126         struct igb_adapter *adapter;
5127         adapter = container_of(work, struct igb_adapter, reset_task);
5128
5129         igb_dump(adapter);
5130         netdev_err(adapter->netdev, "Reset adapter\n");
5131         igb_reinit_locked(adapter);
5132 }
5133
5134 /**
5135  *  igb_get_stats64 - Get System Network Statistics
5136  *  @netdev: network interface device structure
5137  *  @stats: rtnl_link_stats64 pointer
5138  **/
5139 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5140                                                 struct rtnl_link_stats64 *stats)
5141 {
5142         struct igb_adapter *adapter = netdev_priv(netdev);
5143
5144         spin_lock(&adapter->stats64_lock);
5145         igb_update_stats(adapter, &adapter->stats64);
5146         memcpy(stats, &adapter->stats64, sizeof(*stats));
5147         spin_unlock(&adapter->stats64_lock);
5148
5149         return stats;
5150 }
5151
5152 /**
5153  *  igb_change_mtu - Change the Maximum Transfer Unit
5154  *  @netdev: network interface device structure
5155  *  @new_mtu: new value for maximum frame size
5156  *
5157  *  Returns 0 on success, negative on failure
5158  **/
5159 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5160 {
5161         struct igb_adapter *adapter = netdev_priv(netdev);
5162         struct pci_dev *pdev = adapter->pdev;
5163         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5164
5165         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5166                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5167                 return -EINVAL;
5168         }
5169
5170 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5171         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5172                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5173                 return -EINVAL;
5174         }
5175
5176         /* adjust max frame to be at least the size of a standard frame */
5177         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5178                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5179
5180         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5181                 usleep_range(1000, 2000);
5182
5183         /* igb_down has a dependency on max_frame_size */
5184         adapter->max_frame_size = max_frame;
5185
5186         if (netif_running(netdev))
5187                 igb_down(adapter);
5188
5189         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5190                  netdev->mtu, new_mtu);
5191         netdev->mtu = new_mtu;
5192
5193         if (netif_running(netdev))
5194                 igb_up(adapter);
5195         else
5196                 igb_reset(adapter);
5197
5198         clear_bit(__IGB_RESETTING, &adapter->state);
5199
5200         return 0;
5201 }
5202
5203 /**
5204  *  igb_update_stats - Update the board statistics counters
5205  *  @adapter: board private structure
5206  **/
5207 void igb_update_stats(struct igb_adapter *adapter,
5208                       struct rtnl_link_stats64 *net_stats)
5209 {
5210         struct e1000_hw *hw = &adapter->hw;
5211         struct pci_dev *pdev = adapter->pdev;
5212         u32 reg, mpc;
5213         int i;
5214         u64 bytes, packets;
5215         unsigned int start;
5216         u64 _bytes, _packets;
5217
5218         /* Prevent stats update while adapter is being reset, or if the pci
5219          * connection is down.
5220          */
5221         if (adapter->link_speed == 0)
5222                 return;
5223         if (pci_channel_offline(pdev))
5224                 return;
5225
5226         bytes = 0;
5227         packets = 0;
5228
5229         rcu_read_lock();
5230         for (i = 0; i < adapter->num_rx_queues; i++) {
5231                 struct igb_ring *ring = adapter->rx_ring[i];
5232                 u32 rqdpc = rd32(E1000_RQDPC(i));
5233                 if (hw->mac.type >= e1000_i210)
5234                         wr32(E1000_RQDPC(i), 0);
5235
5236                 if (rqdpc) {
5237                         ring->rx_stats.drops += rqdpc;
5238                         net_stats->rx_fifo_errors += rqdpc;
5239                 }
5240
5241                 do {
5242                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5243                         _bytes = ring->rx_stats.bytes;
5244                         _packets = ring->rx_stats.packets;
5245                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5246                 bytes += _bytes;
5247                 packets += _packets;
5248         }
5249
5250         net_stats->rx_bytes = bytes;
5251         net_stats->rx_packets = packets;
5252
5253         bytes = 0;
5254         packets = 0;
5255         for (i = 0; i < adapter->num_tx_queues; i++) {
5256                 struct igb_ring *ring = adapter->tx_ring[i];
5257                 do {
5258                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5259                         _bytes = ring->tx_stats.bytes;
5260                         _packets = ring->tx_stats.packets;
5261                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5262                 bytes += _bytes;
5263                 packets += _packets;
5264         }
5265         net_stats->tx_bytes = bytes;
5266         net_stats->tx_packets = packets;
5267         rcu_read_unlock();
5268
5269         /* read stats registers */
5270         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5271         adapter->stats.gprc += rd32(E1000_GPRC);
5272         adapter->stats.gorc += rd32(E1000_GORCL);
5273         rd32(E1000_GORCH); /* clear GORCL */
5274         adapter->stats.bprc += rd32(E1000_BPRC);
5275         adapter->stats.mprc += rd32(E1000_MPRC);
5276         adapter->stats.roc += rd32(E1000_ROC);
5277
5278         adapter->stats.prc64 += rd32(E1000_PRC64);
5279         adapter->stats.prc127 += rd32(E1000_PRC127);
5280         adapter->stats.prc255 += rd32(E1000_PRC255);
5281         adapter->stats.prc511 += rd32(E1000_PRC511);
5282         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5283         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5284         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5285         adapter->stats.sec += rd32(E1000_SEC);
5286
5287         mpc = rd32(E1000_MPC);
5288         adapter->stats.mpc += mpc;
5289         net_stats->rx_fifo_errors += mpc;
5290         adapter->stats.scc += rd32(E1000_SCC);
5291         adapter->stats.ecol += rd32(E1000_ECOL);
5292         adapter->stats.mcc += rd32(E1000_MCC);
5293         adapter->stats.latecol += rd32(E1000_LATECOL);
5294         adapter->stats.dc += rd32(E1000_DC);
5295         adapter->stats.rlec += rd32(E1000_RLEC);
5296         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5297         adapter->stats.xontxc += rd32(E1000_XONTXC);
5298         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5299         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5300         adapter->stats.fcruc += rd32(E1000_FCRUC);
5301         adapter->stats.gptc += rd32(E1000_GPTC);
5302         adapter->stats.gotc += rd32(E1000_GOTCL);
5303         rd32(E1000_GOTCH); /* clear GOTCL */
5304         adapter->stats.rnbc += rd32(E1000_RNBC);
5305         adapter->stats.ruc += rd32(E1000_RUC);
5306         adapter->stats.rfc += rd32(E1000_RFC);
5307         adapter->stats.rjc += rd32(E1000_RJC);
5308         adapter->stats.tor += rd32(E1000_TORH);
5309         adapter->stats.tot += rd32(E1000_TOTH);
5310         adapter->stats.tpr += rd32(E1000_TPR);
5311
5312         adapter->stats.ptc64 += rd32(E1000_PTC64);
5313         adapter->stats.ptc127 += rd32(E1000_PTC127);
5314         adapter->stats.ptc255 += rd32(E1000_PTC255);
5315         adapter->stats.ptc511 += rd32(E1000_PTC511);
5316         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5317         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5318
5319         adapter->stats.mptc += rd32(E1000_MPTC);
5320         adapter->stats.bptc += rd32(E1000_BPTC);
5321
5322         adapter->stats.tpt += rd32(E1000_TPT);
5323         adapter->stats.colc += rd32(E1000_COLC);
5324
5325         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5326         /* read internal phy specific stats */
5327         reg = rd32(E1000_CTRL_EXT);
5328         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5329                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5330
5331                 /* this stat has invalid values on i210/i211 */
5332                 if ((hw->mac.type != e1000_i210) &&
5333                     (hw->mac.type != e1000_i211))
5334                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5335         }
5336
5337         adapter->stats.tsctc += rd32(E1000_TSCTC);
5338         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5339
5340         adapter->stats.iac += rd32(E1000_IAC);
5341         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5342         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5343         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5344         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5345         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5346         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5347         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5348         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5349
5350         /* Fill out the OS statistics structure */
5351         net_stats->multicast = adapter->stats.mprc;
5352         net_stats->collisions = adapter->stats.colc;
5353
5354         /* Rx Errors */
5355
5356         /* RLEC on some newer hardware can be incorrect so build
5357          * our own version based on RUC and ROC
5358          */
5359         net_stats->rx_errors = adapter->stats.rxerrc +
5360                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5361                 adapter->stats.ruc + adapter->stats.roc +
5362                 adapter->stats.cexterr;
5363         net_stats->rx_length_errors = adapter->stats.ruc +
5364                                       adapter->stats.roc;
5365         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5366         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5367         net_stats->rx_missed_errors = adapter->stats.mpc;
5368
5369         /* Tx Errors */
5370         net_stats->tx_errors = adapter->stats.ecol +
5371                                adapter->stats.latecol;
5372         net_stats->tx_aborted_errors = adapter->stats.ecol;
5373         net_stats->tx_window_errors = adapter->stats.latecol;
5374         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5375
5376         /* Tx Dropped needs to be maintained elsewhere */
5377
5378         /* Management Stats */
5379         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5380         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5381         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5382
5383         /* OS2BMC Stats */
5384         reg = rd32(E1000_MANC);
5385         if (reg & E1000_MANC_EN_BMC2OS) {
5386                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5387                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5388                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5389                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5390         }
5391 }
5392
5393 static irqreturn_t igb_msix_other(int irq, void *data)
5394 {
5395         struct igb_adapter *adapter = data;
5396         struct e1000_hw *hw = &adapter->hw;
5397         u32 icr = rd32(E1000_ICR);
5398         /* reading ICR causes bit 31 of EICR to be cleared */
5399
5400         if (icr & E1000_ICR_DRSTA)
5401                 schedule_work(&adapter->reset_task);
5402
5403         if (icr & E1000_ICR_DOUTSYNC) {
5404                 /* HW is reporting DMA is out of sync */
5405                 adapter->stats.doosync++;
5406                 /* The DMA Out of Sync is also indication of a spoof event
5407                  * in IOV mode. Check the Wrong VM Behavior register to
5408                  * see if it is really a spoof event.
5409                  */
5410                 igb_check_wvbr(adapter);
5411         }
5412
5413         /* Check for a mailbox event */
5414         if (icr & E1000_ICR_VMMB)
5415                 igb_msg_task(adapter);
5416
5417         if (icr & E1000_ICR_LSC) {
5418                 hw->mac.get_link_status = 1;
5419                 /* guard against interrupt when we're going down */
5420                 if (!test_bit(__IGB_DOWN, &adapter->state))
5421                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5422         }
5423
5424         if (icr & E1000_ICR_TS) {
5425                 u32 tsicr = rd32(E1000_TSICR);
5426
5427                 if (tsicr & E1000_TSICR_TXTS) {
5428                         /* acknowledge the interrupt */
5429                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5430                         /* retrieve hardware timestamp */
5431                         schedule_work(&adapter->ptp_tx_work);
5432                 }
5433         }
5434
5435         wr32(E1000_EIMS, adapter->eims_other);
5436
5437         return IRQ_HANDLED;
5438 }
5439
5440 static void igb_write_itr(struct igb_q_vector *q_vector)
5441 {
5442         struct igb_adapter *adapter = q_vector->adapter;
5443         u32 itr_val = q_vector->itr_val & 0x7FFC;
5444
5445         if (!q_vector->set_itr)
5446                 return;
5447
5448         if (!itr_val)
5449                 itr_val = 0x4;
5450
5451         if (adapter->hw.mac.type == e1000_82575)
5452                 itr_val |= itr_val << 16;
5453         else
5454                 itr_val |= E1000_EITR_CNT_IGNR;
5455
5456         writel(itr_val, q_vector->itr_register);
5457         q_vector->set_itr = 0;
5458 }
5459
5460 static irqreturn_t igb_msix_ring(int irq, void *data)
5461 {
5462         struct igb_q_vector *q_vector = data;
5463
5464         /* Write the ITR value calculated from the previous interrupt. */
5465         igb_write_itr(q_vector);
5466
5467         napi_schedule(&q_vector->napi);
5468
5469         return IRQ_HANDLED;
5470 }
5471
5472 #ifdef CONFIG_IGB_DCA
5473 static void igb_update_tx_dca(struct igb_adapter *adapter,
5474                               struct igb_ring *tx_ring,
5475                               int cpu)
5476 {
5477         struct e1000_hw *hw = &adapter->hw;
5478         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5479
5480         if (hw->mac.type != e1000_82575)
5481                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5482
5483         /* We can enable relaxed ordering for reads, but not writes when
5484          * DCA is enabled.  This is due to a known issue in some chipsets
5485          * which will cause the DCA tag to be cleared.
5486          */
5487         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5488                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5489                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5490
5491         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5492 }
5493
5494 static void igb_update_rx_dca(struct igb_adapter *adapter,
5495                               struct igb_ring *rx_ring,
5496                               int cpu)
5497 {
5498         struct e1000_hw *hw = &adapter->hw;
5499         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5500
5501         if (hw->mac.type != e1000_82575)
5502                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5503
5504         /* We can enable relaxed ordering for reads, but not writes when
5505          * DCA is enabled.  This is due to a known issue in some chipsets
5506          * which will cause the DCA tag to be cleared.
5507          */
5508         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5509                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5510
5511         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5512 }
5513
5514 static void igb_update_dca(struct igb_q_vector *q_vector)
5515 {
5516         struct igb_adapter *adapter = q_vector->adapter;
5517         int cpu = get_cpu();
5518
5519         if (q_vector->cpu == cpu)
5520                 goto out_no_update;
5521
5522         if (q_vector->tx.ring)
5523                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5524
5525         if (q_vector->rx.ring)
5526                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5527
5528         q_vector->cpu = cpu;
5529 out_no_update:
5530         put_cpu();
5531 }
5532
5533 static void igb_setup_dca(struct igb_adapter *adapter)
5534 {
5535         struct e1000_hw *hw = &adapter->hw;
5536         int i;
5537
5538         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5539                 return;
5540
5541         /* Always use CB2 mode, difference is masked in the CB driver. */
5542         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5543
5544         for (i = 0; i < adapter->num_q_vectors; i++) {
5545                 adapter->q_vector[i]->cpu = -1;
5546                 igb_update_dca(adapter->q_vector[i]);
5547         }
5548 }
5549
5550 static int __igb_notify_dca(struct device *dev, void *data)
5551 {
5552         struct net_device *netdev = dev_get_drvdata(dev);
5553         struct igb_adapter *adapter = netdev_priv(netdev);
5554         struct pci_dev *pdev = adapter->pdev;
5555         struct e1000_hw *hw = &adapter->hw;
5556         unsigned long event = *(unsigned long *)data;
5557
5558         switch (event) {
5559         case DCA_PROVIDER_ADD:
5560                 /* if already enabled, don't do it again */
5561                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5562                         break;
5563                 if (dca_add_requester(dev) == 0) {
5564                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5565                         dev_info(&pdev->dev, "DCA enabled\n");
5566                         igb_setup_dca(adapter);
5567                         break;
5568                 }
5569                 /* Fall Through since DCA is disabled. */
5570         case DCA_PROVIDER_REMOVE:
5571                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5572                         /* without this a class_device is left
5573                          * hanging around in the sysfs model
5574                          */
5575                         dca_remove_requester(dev);
5576                         dev_info(&pdev->dev, "DCA disabled\n");
5577                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5578                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5579                 }
5580                 break;
5581         }
5582
5583         return 0;
5584 }
5585
5586 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5587                           void *p)
5588 {
5589         int ret_val;
5590
5591         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5592                                          __igb_notify_dca);
5593
5594         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5595 }
5596 #endif /* CONFIG_IGB_DCA */
5597
5598 #ifdef CONFIG_PCI_IOV
5599 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5600 {
5601         unsigned char mac_addr[ETH_ALEN];
5602
5603         eth_zero_addr(mac_addr);
5604         igb_set_vf_mac(adapter, vf, mac_addr);
5605
5606         /* By default spoof check is enabled for all VFs */
5607         adapter->vf_data[vf].spoofchk_enabled = true;
5608
5609         return 0;
5610 }
5611
5612 #endif
5613 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5614 {
5615         struct e1000_hw *hw = &adapter->hw;
5616         u32 ping;
5617         int i;
5618
5619         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5620                 ping = E1000_PF_CONTROL_MSG;
5621                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5622                         ping |= E1000_VT_MSGTYPE_CTS;
5623                 igb_write_mbx(hw, &ping, 1, i);
5624         }
5625 }
5626
5627 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5628 {
5629         struct e1000_hw *hw = &adapter->hw;
5630         u32 vmolr = rd32(E1000_VMOLR(vf));
5631         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5632
5633         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5634                             IGB_VF_FLAG_MULTI_PROMISC);
5635         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5636
5637         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5638                 vmolr |= E1000_VMOLR_MPME;
5639                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5640                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5641         } else {
5642                 /* if we have hashes and we are clearing a multicast promisc
5643                  * flag we need to write the hashes to the MTA as this step
5644                  * was previously skipped
5645                  */
5646                 if (vf_data->num_vf_mc_hashes > 30) {
5647                         vmolr |= E1000_VMOLR_MPME;
5648                 } else if (vf_data->num_vf_mc_hashes) {
5649                         int j;
5650
5651                         vmolr |= E1000_VMOLR_ROMPE;
5652                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5653                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5654                 }
5655         }
5656
5657         wr32(E1000_VMOLR(vf), vmolr);
5658
5659         /* there are flags left unprocessed, likely not supported */
5660         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5661                 return -EINVAL;
5662
5663         return 0;
5664 }
5665
5666 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5667                                   u32 *msgbuf, u32 vf)
5668 {
5669         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5670         u16 *hash_list = (u16 *)&msgbuf[1];
5671         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5672         int i;
5673
5674         /* salt away the number of multicast addresses assigned
5675          * to this VF for later use to restore when the PF multi cast
5676          * list changes
5677          */
5678         vf_data->num_vf_mc_hashes = n;
5679
5680         /* only up to 30 hash values supported */
5681         if (n > 30)
5682                 n = 30;
5683
5684         /* store the hashes for later use */
5685         for (i = 0; i < n; i++)
5686                 vf_data->vf_mc_hashes[i] = hash_list[i];
5687
5688         /* Flush and reset the mta with the new values */
5689         igb_set_rx_mode(adapter->netdev);
5690
5691         return 0;
5692 }
5693
5694 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5695 {
5696         struct e1000_hw *hw = &adapter->hw;
5697         struct vf_data_storage *vf_data;
5698         int i, j;
5699
5700         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5701                 u32 vmolr = rd32(E1000_VMOLR(i));
5702
5703                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5704
5705                 vf_data = &adapter->vf_data[i];
5706
5707                 if ((vf_data->num_vf_mc_hashes > 30) ||
5708                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5709                         vmolr |= E1000_VMOLR_MPME;
5710                 } else if (vf_data->num_vf_mc_hashes) {
5711                         vmolr |= E1000_VMOLR_ROMPE;
5712                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5713                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5714                 }
5715                 wr32(E1000_VMOLR(i), vmolr);
5716         }
5717 }
5718
5719 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5720 {
5721         struct e1000_hw *hw = &adapter->hw;
5722         u32 pool_mask, reg, vid;
5723         int i;
5724
5725         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5726
5727         /* Find the vlan filter for this id */
5728         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5729                 reg = rd32(E1000_VLVF(i));
5730
5731                 /* remove the vf from the pool */
5732                 reg &= ~pool_mask;
5733
5734                 /* if pool is empty then remove entry from vfta */
5735                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5736                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5737                         reg = 0;
5738                         vid = reg & E1000_VLVF_VLANID_MASK;
5739                         igb_vfta_set(hw, vid, false);
5740                 }
5741
5742                 wr32(E1000_VLVF(i), reg);
5743         }
5744
5745         adapter->vf_data[vf].vlans_enabled = 0;
5746 }
5747
5748 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5749 {
5750         struct e1000_hw *hw = &adapter->hw;
5751         u32 reg, i;
5752
5753         /* The vlvf table only exists on 82576 hardware and newer */
5754         if (hw->mac.type < e1000_82576)
5755                 return -1;
5756
5757         /* we only need to do this if VMDq is enabled */
5758         if (!adapter->vfs_allocated_count)
5759                 return -1;
5760
5761         /* Find the vlan filter for this id */
5762         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5763                 reg = rd32(E1000_VLVF(i));
5764                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5765                     vid == (reg & E1000_VLVF_VLANID_MASK))
5766                         break;
5767         }
5768
5769         if (add) {
5770                 if (i == E1000_VLVF_ARRAY_SIZE) {
5771                         /* Did not find a matching VLAN ID entry that was
5772                          * enabled.  Search for a free filter entry, i.e.
5773                          * one without the enable bit set
5774                          */
5775                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5776                                 reg = rd32(E1000_VLVF(i));
5777                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5778                                         break;
5779                         }
5780                 }
5781                 if (i < E1000_VLVF_ARRAY_SIZE) {
5782                         /* Found an enabled/available entry */
5783                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5784
5785                         /* if !enabled we need to set this up in vfta */
5786                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5787                                 /* add VID to filter table */
5788                                 igb_vfta_set(hw, vid, true);
5789                                 reg |= E1000_VLVF_VLANID_ENABLE;
5790                         }
5791                         reg &= ~E1000_VLVF_VLANID_MASK;
5792                         reg |= vid;
5793                         wr32(E1000_VLVF(i), reg);
5794
5795                         /* do not modify RLPML for PF devices */
5796                         if (vf >= adapter->vfs_allocated_count)
5797                                 return 0;
5798
5799                         if (!adapter->vf_data[vf].vlans_enabled) {
5800                                 u32 size;
5801
5802                                 reg = rd32(E1000_VMOLR(vf));
5803                                 size = reg & E1000_VMOLR_RLPML_MASK;
5804                                 size += 4;
5805                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5806                                 reg |= size;
5807                                 wr32(E1000_VMOLR(vf), reg);
5808                         }
5809
5810                         adapter->vf_data[vf].vlans_enabled++;
5811                 }
5812         } else {
5813                 if (i < E1000_VLVF_ARRAY_SIZE) {
5814                         /* remove vf from the pool */
5815                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5816                         /* if pool is empty then remove entry from vfta */
5817                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5818                                 reg = 0;
5819                                 igb_vfta_set(hw, vid, false);
5820                         }
5821                         wr32(E1000_VLVF(i), reg);
5822
5823                         /* do not modify RLPML for PF devices */
5824                         if (vf >= adapter->vfs_allocated_count)
5825                                 return 0;
5826
5827                         adapter->vf_data[vf].vlans_enabled--;
5828                         if (!adapter->vf_data[vf].vlans_enabled) {
5829                                 u32 size;
5830
5831                                 reg = rd32(E1000_VMOLR(vf));
5832                                 size = reg & E1000_VMOLR_RLPML_MASK;
5833                                 size -= 4;
5834                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5835                                 reg |= size;
5836                                 wr32(E1000_VMOLR(vf), reg);
5837                         }
5838                 }
5839         }
5840         return 0;
5841 }
5842
5843 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5844 {
5845         struct e1000_hw *hw = &adapter->hw;
5846
5847         if (vid)
5848                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5849         else
5850                 wr32(E1000_VMVIR(vf), 0);
5851 }
5852
5853 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5854                                int vf, u16 vlan, u8 qos)
5855 {
5856         int err = 0;
5857         struct igb_adapter *adapter = netdev_priv(netdev);
5858
5859         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5860                 return -EINVAL;
5861         if (vlan || qos) {
5862                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5863                 if (err)
5864                         goto out;
5865                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5866                 igb_set_vmolr(adapter, vf, !vlan);
5867                 adapter->vf_data[vf].pf_vlan = vlan;
5868                 adapter->vf_data[vf].pf_qos = qos;
5869                 dev_info(&adapter->pdev->dev,
5870                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5871                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5872                         dev_warn(&adapter->pdev->dev,
5873                                  "The VF VLAN has been set, but the PF device is not up.\n");
5874                         dev_warn(&adapter->pdev->dev,
5875                                  "Bring the PF device up before attempting to use the VF device.\n");
5876                 }
5877         } else {
5878                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5879                              false, vf);
5880                 igb_set_vmvir(adapter, vlan, vf);
5881                 igb_set_vmolr(adapter, vf, true);
5882                 adapter->vf_data[vf].pf_vlan = 0;
5883                 adapter->vf_data[vf].pf_qos = 0;
5884         }
5885 out:
5886         return err;
5887 }
5888
5889 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5890 {
5891         struct e1000_hw *hw = &adapter->hw;
5892         int i;
5893         u32 reg;
5894
5895         /* Find the vlan filter for this id */
5896         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5897                 reg = rd32(E1000_VLVF(i));
5898                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5899                     vid == (reg & E1000_VLVF_VLANID_MASK))
5900                         break;
5901         }
5902
5903         if (i >= E1000_VLVF_ARRAY_SIZE)
5904                 i = -1;
5905
5906         return i;
5907 }
5908
5909 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5910 {
5911         struct e1000_hw *hw = &adapter->hw;
5912         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5913         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5914         int err = 0;
5915
5916         /* If in promiscuous mode we need to make sure the PF also has
5917          * the VLAN filter set.
5918          */
5919         if (add && (adapter->netdev->flags & IFF_PROMISC))
5920                 err = igb_vlvf_set(adapter, vid, add,
5921                                    adapter->vfs_allocated_count);
5922         if (err)
5923                 goto out;
5924
5925         err = igb_vlvf_set(adapter, vid, add, vf);
5926
5927         if (err)
5928                 goto out;
5929
5930         /* Go through all the checks to see if the VLAN filter should
5931          * be wiped completely.
5932          */
5933         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5934                 u32 vlvf, bits;
5935                 int regndx = igb_find_vlvf_entry(adapter, vid);
5936
5937                 if (regndx < 0)
5938                         goto out;
5939                 /* See if any other pools are set for this VLAN filter
5940                  * entry other than the PF.
5941                  */
5942                 vlvf = bits = rd32(E1000_VLVF(regndx));
5943                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5944                               adapter->vfs_allocated_count);
5945                 /* If the filter was removed then ensure PF pool bit
5946                  * is cleared if the PF only added itself to the pool
5947                  * because the PF is in promiscuous mode.
5948                  */
5949                 if ((vlvf & VLAN_VID_MASK) == vid &&
5950                     !test_bit(vid, adapter->active_vlans) &&
5951                     !bits)
5952                         igb_vlvf_set(adapter, vid, add,
5953                                      adapter->vfs_allocated_count);
5954         }
5955
5956 out:
5957         return err;
5958 }
5959
5960 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5961 {
5962         /* clear flags - except flag that indicates PF has set the MAC */
5963         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5964         adapter->vf_data[vf].last_nack = jiffies;
5965
5966         /* reset offloads to defaults */
5967         igb_set_vmolr(adapter, vf, true);
5968
5969         /* reset vlans for device */
5970         igb_clear_vf_vfta(adapter, vf);
5971         if (adapter->vf_data[vf].pf_vlan)
5972                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5973                                     adapter->vf_data[vf].pf_vlan,
5974                                     adapter->vf_data[vf].pf_qos);
5975         else
5976                 igb_clear_vf_vfta(adapter, vf);
5977
5978         /* reset multicast table array for vf */
5979         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5980
5981         /* Flush and reset the mta with the new values */
5982         igb_set_rx_mode(adapter->netdev);
5983 }
5984
5985 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5986 {
5987         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5988
5989         /* clear mac address as we were hotplug removed/added */
5990         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5991                 eth_zero_addr(vf_mac);
5992
5993         /* process remaining reset events */
5994         igb_vf_reset(adapter, vf);
5995 }
5996
5997 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5998 {
5999         struct e1000_hw *hw = &adapter->hw;
6000         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6001         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
6002         u32 reg, msgbuf[3];
6003         u8 *addr = (u8 *)(&msgbuf[1]);
6004
6005         /* process all the same items cleared in a function level reset */
6006         igb_vf_reset(adapter, vf);
6007
6008         /* set vf mac address */
6009         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6010
6011         /* enable transmit and receive for vf */
6012         reg = rd32(E1000_VFTE);
6013         wr32(E1000_VFTE, reg | (1 << vf));
6014         reg = rd32(E1000_VFRE);
6015         wr32(E1000_VFRE, reg | (1 << vf));
6016
6017         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6018
6019         /* reply to reset with ack and vf mac address */
6020         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6021         memcpy(addr, vf_mac, ETH_ALEN);
6022         igb_write_mbx(hw, msgbuf, 3, vf);
6023 }
6024
6025 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6026 {
6027         /* The VF MAC Address is stored in a packed array of bytes
6028          * starting at the second 32 bit word of the msg array
6029          */
6030         unsigned char *addr = (char *)&msg[1];
6031         int err = -1;
6032
6033         if (is_valid_ether_addr(addr))
6034                 err = igb_set_vf_mac(adapter, vf, addr);
6035
6036         return err;
6037 }
6038
6039 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6040 {
6041         struct e1000_hw *hw = &adapter->hw;
6042         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6043         u32 msg = E1000_VT_MSGTYPE_NACK;
6044
6045         /* if device isn't clear to send it shouldn't be reading either */
6046         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6047             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6048                 igb_write_mbx(hw, &msg, 1, vf);
6049                 vf_data->last_nack = jiffies;
6050         }
6051 }
6052
6053 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6054 {
6055         struct pci_dev *pdev = adapter->pdev;
6056         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6057         struct e1000_hw *hw = &adapter->hw;
6058         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6059         s32 retval;
6060
6061         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6062
6063         if (retval) {
6064                 /* if receive failed revoke VF CTS stats and restart init */
6065                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6066                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6067                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6068                         return;
6069                 goto out;
6070         }
6071
6072         /* this is a message we already processed, do nothing */
6073         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6074                 return;
6075
6076         /* until the vf completes a reset it should not be
6077          * allowed to start any configuration.
6078          */
6079         if (msgbuf[0] == E1000_VF_RESET) {
6080                 igb_vf_reset_msg(adapter, vf);
6081                 return;
6082         }
6083
6084         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6085                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6086                         return;
6087                 retval = -1;
6088                 goto out;
6089         }
6090
6091         switch ((msgbuf[0] & 0xFFFF)) {
6092         case E1000_VF_SET_MAC_ADDR:
6093                 retval = -EINVAL;
6094                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6095                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6096                 else
6097                         dev_warn(&pdev->dev,
6098                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6099                                  vf);
6100                 break;
6101         case E1000_VF_SET_PROMISC:
6102                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6103                 break;
6104         case E1000_VF_SET_MULTICAST:
6105                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6106                 break;
6107         case E1000_VF_SET_LPE:
6108                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6109                 break;
6110         case E1000_VF_SET_VLAN:
6111                 retval = -1;
6112                 if (vf_data->pf_vlan)
6113                         dev_warn(&pdev->dev,
6114                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6115                                  vf);
6116                 else
6117                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6118                 break;
6119         default:
6120                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6121                 retval = -1;
6122                 break;
6123         }
6124
6125         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6126 out:
6127         /* notify the VF of the results of what it sent us */
6128         if (retval)
6129                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6130         else
6131                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6132
6133         igb_write_mbx(hw, msgbuf, 1, vf);
6134 }
6135
6136 static void igb_msg_task(struct igb_adapter *adapter)
6137 {
6138         struct e1000_hw *hw = &adapter->hw;
6139         u32 vf;
6140
6141         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6142                 /* process any reset requests */
6143                 if (!igb_check_for_rst(hw, vf))
6144                         igb_vf_reset_event(adapter, vf);
6145
6146                 /* process any messages pending */
6147                 if (!igb_check_for_msg(hw, vf))
6148                         igb_rcv_msg_from_vf(adapter, vf);
6149
6150                 /* process any acks */
6151                 if (!igb_check_for_ack(hw, vf))
6152                         igb_rcv_ack_from_vf(adapter, vf);
6153         }
6154 }
6155
6156 /**
6157  *  igb_set_uta - Set unicast filter table address
6158  *  @adapter: board private structure
6159  *
6160  *  The unicast table address is a register array of 32-bit registers.
6161  *  The table is meant to be used in a way similar to how the MTA is used
6162  *  however due to certain limitations in the hardware it is necessary to
6163  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6164  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6165  **/
6166 static void igb_set_uta(struct igb_adapter *adapter)
6167 {
6168         struct e1000_hw *hw = &adapter->hw;
6169         int i;
6170
6171         /* The UTA table only exists on 82576 hardware and newer */
6172         if (hw->mac.type < e1000_82576)
6173                 return;
6174
6175         /* we only need to do this if VMDq is enabled */
6176         if (!adapter->vfs_allocated_count)
6177                 return;
6178
6179         for (i = 0; i < hw->mac.uta_reg_count; i++)
6180                 array_wr32(E1000_UTA, i, ~0);
6181 }
6182
6183 /**
6184  *  igb_intr_msi - Interrupt Handler
6185  *  @irq: interrupt number
6186  *  @data: pointer to a network interface device structure
6187  **/
6188 static irqreturn_t igb_intr_msi(int irq, void *data)
6189 {
6190         struct igb_adapter *adapter = data;
6191         struct igb_q_vector *q_vector = adapter->q_vector[0];
6192         struct e1000_hw *hw = &adapter->hw;
6193         /* read ICR disables interrupts using IAM */
6194         u32 icr = rd32(E1000_ICR);
6195
6196         igb_write_itr(q_vector);
6197
6198         if (icr & E1000_ICR_DRSTA)
6199                 schedule_work(&adapter->reset_task);
6200
6201         if (icr & E1000_ICR_DOUTSYNC) {
6202                 /* HW is reporting DMA is out of sync */
6203                 adapter->stats.doosync++;
6204         }
6205
6206         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6207                 hw->mac.get_link_status = 1;
6208                 if (!test_bit(__IGB_DOWN, &adapter->state))
6209                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6210         }
6211
6212         if (icr & E1000_ICR_TS) {
6213                 u32 tsicr = rd32(E1000_TSICR);
6214
6215                 if (tsicr & E1000_TSICR_TXTS) {
6216                         /* acknowledge the interrupt */
6217                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6218                         /* retrieve hardware timestamp */
6219                         schedule_work(&adapter->ptp_tx_work);
6220                 }
6221         }
6222
6223         napi_schedule(&q_vector->napi);
6224
6225         return IRQ_HANDLED;
6226 }
6227
6228 /**
6229  *  igb_intr - Legacy Interrupt Handler
6230  *  @irq: interrupt number
6231  *  @data: pointer to a network interface device structure
6232  **/
6233 static irqreturn_t igb_intr(int irq, void *data)
6234 {
6235         struct igb_adapter *adapter = data;
6236         struct igb_q_vector *q_vector = adapter->q_vector[0];
6237         struct e1000_hw *hw = &adapter->hw;
6238         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6239          * need for the IMC write
6240          */
6241         u32 icr = rd32(E1000_ICR);
6242
6243         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6244          * not set, then the adapter didn't send an interrupt
6245          */
6246         if (!(icr & E1000_ICR_INT_ASSERTED))
6247                 return IRQ_NONE;
6248
6249         igb_write_itr(q_vector);
6250
6251         if (icr & E1000_ICR_DRSTA)
6252                 schedule_work(&adapter->reset_task);
6253
6254         if (icr & E1000_ICR_DOUTSYNC) {
6255                 /* HW is reporting DMA is out of sync */
6256                 adapter->stats.doosync++;
6257         }
6258
6259         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6260                 hw->mac.get_link_status = 1;
6261                 /* guard against interrupt when we're going down */
6262                 if (!test_bit(__IGB_DOWN, &adapter->state))
6263                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6264         }
6265
6266         if (icr & E1000_ICR_TS) {
6267                 u32 tsicr = rd32(E1000_TSICR);
6268
6269                 if (tsicr & E1000_TSICR_TXTS) {
6270                         /* acknowledge the interrupt */
6271                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6272                         /* retrieve hardware timestamp */
6273                         schedule_work(&adapter->ptp_tx_work);
6274                 }
6275         }
6276
6277         napi_schedule(&q_vector->napi);
6278
6279         return IRQ_HANDLED;
6280 }
6281
6282 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6283 {
6284         struct igb_adapter *adapter = q_vector->adapter;
6285         struct e1000_hw *hw = &adapter->hw;
6286
6287         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6288             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6289                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6290                         igb_set_itr(q_vector);
6291                 else
6292                         igb_update_ring_itr(q_vector);
6293         }
6294
6295         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6296                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6297                         wr32(E1000_EIMS, q_vector->eims_value);
6298                 else
6299                         igb_irq_enable(adapter);
6300         }
6301 }
6302
6303 /**
6304  *  igb_poll - NAPI Rx polling callback
6305  *  @napi: napi polling structure
6306  *  @budget: count of how many packets we should handle
6307  **/
6308 static int igb_poll(struct napi_struct *napi, int budget)
6309 {
6310         struct igb_q_vector *q_vector = container_of(napi,
6311                                                      struct igb_q_vector,
6312                                                      napi);
6313         bool clean_complete = true;
6314
6315 #ifdef CONFIG_IGB_DCA
6316         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6317                 igb_update_dca(q_vector);
6318 #endif
6319         if (q_vector->tx.ring)
6320                 clean_complete = igb_clean_tx_irq(q_vector);
6321
6322         if (q_vector->rx.ring)
6323                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6324
6325         /* If all work not completed, return budget and keep polling */
6326         if (!clean_complete)
6327                 return budget;
6328
6329         /* If not enough Rx work done, exit the polling mode */
6330         napi_complete(napi);
6331         igb_ring_irq_enable(q_vector);
6332
6333         return 0;
6334 }
6335
6336 /**
6337  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6338  *  @q_vector: pointer to q_vector containing needed info
6339  *
6340  *  returns true if ring is completely cleaned
6341  **/
6342 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6343 {
6344         struct igb_adapter *adapter = q_vector->adapter;
6345         struct igb_ring *tx_ring = q_vector->tx.ring;
6346         struct igb_tx_buffer *tx_buffer;
6347         union e1000_adv_tx_desc *tx_desc;
6348         unsigned int total_bytes = 0, total_packets = 0;
6349         unsigned int budget = q_vector->tx.work_limit;
6350         unsigned int i = tx_ring->next_to_clean;
6351
6352         if (test_bit(__IGB_DOWN, &adapter->state))
6353                 return true;
6354
6355         tx_buffer = &tx_ring->tx_buffer_info[i];
6356         tx_desc = IGB_TX_DESC(tx_ring, i);
6357         i -= tx_ring->count;
6358
6359         do {
6360                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6361
6362                 /* if next_to_watch is not set then there is no work pending */
6363                 if (!eop_desc)
6364                         break;
6365
6366                 /* prevent any other reads prior to eop_desc */
6367                 read_barrier_depends();
6368
6369                 /* if DD is not set pending work has not been completed */
6370                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6371                         break;
6372
6373                 /* clear next_to_watch to prevent false hangs */
6374                 tx_buffer->next_to_watch = NULL;
6375
6376                 /* update the statistics for this packet */
6377                 total_bytes += tx_buffer->bytecount;
6378                 total_packets += tx_buffer->gso_segs;
6379
6380                 /* free the skb */
6381                 dev_consume_skb_any(tx_buffer->skb);
6382
6383                 /* unmap skb header data */
6384                 dma_unmap_single(tx_ring->dev,
6385                                  dma_unmap_addr(tx_buffer, dma),
6386                                  dma_unmap_len(tx_buffer, len),
6387                                  DMA_TO_DEVICE);
6388
6389                 /* clear tx_buffer data */
6390                 tx_buffer->skb = NULL;
6391                 dma_unmap_len_set(tx_buffer, len, 0);
6392
6393                 /* clear last DMA location and unmap remaining buffers */
6394                 while (tx_desc != eop_desc) {
6395                         tx_buffer++;
6396                         tx_desc++;
6397                         i++;
6398                         if (unlikely(!i)) {
6399                                 i -= tx_ring->count;
6400                                 tx_buffer = tx_ring->tx_buffer_info;
6401                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6402                         }
6403
6404                         /* unmap any remaining paged data */
6405                         if (dma_unmap_len(tx_buffer, len)) {
6406                                 dma_unmap_page(tx_ring->dev,
6407                                                dma_unmap_addr(tx_buffer, dma),
6408                                                dma_unmap_len(tx_buffer, len),
6409                                                DMA_TO_DEVICE);
6410                                 dma_unmap_len_set(tx_buffer, len, 0);
6411                         }
6412                 }
6413
6414                 /* move us one more past the eop_desc for start of next pkt */
6415                 tx_buffer++;
6416                 tx_desc++;
6417                 i++;
6418                 if (unlikely(!i)) {
6419                         i -= tx_ring->count;
6420                         tx_buffer = tx_ring->tx_buffer_info;
6421                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6422                 }
6423
6424                 /* issue prefetch for next Tx descriptor */
6425                 prefetch(tx_desc);
6426
6427                 /* update budget accounting */
6428                 budget--;
6429         } while (likely(budget));
6430
6431         netdev_tx_completed_queue(txring_txq(tx_ring),
6432                                   total_packets, total_bytes);
6433         i += tx_ring->count;
6434         tx_ring->next_to_clean = i;
6435         u64_stats_update_begin(&tx_ring->tx_syncp);
6436         tx_ring->tx_stats.bytes += total_bytes;
6437         tx_ring->tx_stats.packets += total_packets;
6438         u64_stats_update_end(&tx_ring->tx_syncp);
6439         q_vector->tx.total_bytes += total_bytes;
6440         q_vector->tx.total_packets += total_packets;
6441
6442         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6443                 struct e1000_hw *hw = &adapter->hw;
6444
6445                 /* Detect a transmit hang in hardware, this serializes the
6446                  * check with the clearing of time_stamp and movement of i
6447                  */
6448                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6449                 if (tx_buffer->next_to_watch &&
6450                     time_after(jiffies, tx_buffer->time_stamp +
6451                                (adapter->tx_timeout_factor * HZ)) &&
6452                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6453
6454                         /* detected Tx unit hang */
6455                         dev_err(tx_ring->dev,
6456                                 "Detected Tx Unit Hang\n"
6457                                 "  Tx Queue             <%d>\n"
6458                                 "  TDH                  <%x>\n"
6459                                 "  TDT                  <%x>\n"
6460                                 "  next_to_use          <%x>\n"
6461                                 "  next_to_clean        <%x>\n"
6462                                 "buffer_info[next_to_clean]\n"
6463                                 "  time_stamp           <%lx>\n"
6464                                 "  next_to_watch        <%p>\n"
6465                                 "  jiffies              <%lx>\n"
6466                                 "  desc.status          <%x>\n",
6467                                 tx_ring->queue_index,
6468                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6469                                 readl(tx_ring->tail),
6470                                 tx_ring->next_to_use,
6471                                 tx_ring->next_to_clean,
6472                                 tx_buffer->time_stamp,
6473                                 tx_buffer->next_to_watch,
6474                                 jiffies,
6475                                 tx_buffer->next_to_watch->wb.status);
6476                         netif_stop_subqueue(tx_ring->netdev,
6477                                             tx_ring->queue_index);
6478
6479                         /* we are about to reset, no point in enabling stuff */
6480                         return true;
6481                 }
6482         }
6483
6484 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6485         if (unlikely(total_packets &&
6486             netif_carrier_ok(tx_ring->netdev) &&
6487             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6488                 /* Make sure that anybody stopping the queue after this
6489                  * sees the new next_to_clean.
6490                  */
6491                 smp_mb();
6492                 if (__netif_subqueue_stopped(tx_ring->netdev,
6493                                              tx_ring->queue_index) &&
6494                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6495                         netif_wake_subqueue(tx_ring->netdev,
6496                                             tx_ring->queue_index);
6497
6498                         u64_stats_update_begin(&tx_ring->tx_syncp);
6499                         tx_ring->tx_stats.restart_queue++;
6500                         u64_stats_update_end(&tx_ring->tx_syncp);
6501                 }
6502         }
6503
6504         return !!budget;
6505 }
6506
6507 /**
6508  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6509  *  @rx_ring: rx descriptor ring to store buffers on
6510  *  @old_buff: donor buffer to have page reused
6511  *
6512  *  Synchronizes page for reuse by the adapter
6513  **/
6514 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6515                               struct igb_rx_buffer *old_buff)
6516 {
6517         struct igb_rx_buffer *new_buff;
6518         u16 nta = rx_ring->next_to_alloc;
6519
6520         new_buff = &rx_ring->rx_buffer_info[nta];
6521
6522         /* update, and store next to alloc */
6523         nta++;
6524         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6525
6526         /* transfer page from old buffer to new buffer */
6527         *new_buff = *old_buff;
6528
6529         /* sync the buffer for use by the device */
6530         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6531                                          old_buff->page_offset,
6532                                          IGB_RX_BUFSZ,
6533                                          DMA_FROM_DEVICE);
6534 }
6535
6536 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6537                                   struct page *page,
6538                                   unsigned int truesize)
6539 {
6540         /* avoid re-using remote pages */
6541         if (unlikely(page_to_nid(page) != numa_node_id()))
6542                 return false;
6543
6544         if (unlikely(page->pfmemalloc))
6545                 return false;
6546
6547 #if (PAGE_SIZE < 8192)
6548         /* if we are only owner of page we can reuse it */
6549         if (unlikely(page_count(page) != 1))
6550                 return false;
6551
6552         /* flip page offset to other buffer */
6553         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6554
6555         /* Even if we own the page, we are not allowed to use atomic_set()
6556          * This would break get_page_unless_zero() users.
6557          */
6558         atomic_inc(&page->_count);
6559 #else
6560         /* move offset up to the next cache line */
6561         rx_buffer->page_offset += truesize;
6562
6563         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6564                 return false;
6565
6566         /* bump ref count on page before it is given to the stack */
6567         get_page(page);
6568 #endif
6569
6570         return true;
6571 }
6572
6573 /**
6574  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6575  *  @rx_ring: rx descriptor ring to transact packets on
6576  *  @rx_buffer: buffer containing page to add
6577  *  @rx_desc: descriptor containing length of buffer written by hardware
6578  *  @skb: sk_buff to place the data into
6579  *
6580  *  This function will add the data contained in rx_buffer->page to the skb.
6581  *  This is done either through a direct copy if the data in the buffer is
6582  *  less than the skb header size, otherwise it will just attach the page as
6583  *  a frag to the skb.
6584  *
6585  *  The function will then update the page offset if necessary and return
6586  *  true if the buffer can be reused by the adapter.
6587  **/
6588 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6589                             struct igb_rx_buffer *rx_buffer,
6590                             union e1000_adv_rx_desc *rx_desc,
6591                             struct sk_buff *skb)
6592 {
6593         struct page *page = rx_buffer->page;
6594         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6595 #if (PAGE_SIZE < 8192)
6596         unsigned int truesize = IGB_RX_BUFSZ;
6597 #else
6598         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6599 #endif
6600
6601         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6602                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6603
6604                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6605                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6606                         va += IGB_TS_HDR_LEN;
6607                         size -= IGB_TS_HDR_LEN;
6608                 }
6609
6610                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6611
6612                 /* we can reuse buffer as-is, just make sure it is local */
6613                 if (likely((page_to_nid(page) == numa_node_id()) &&
6614                            !page->pfmemalloc))
6615                         return true;
6616
6617                 /* this page cannot be reused so discard it */
6618                 put_page(page);
6619                 return false;
6620         }
6621
6622         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6623                         rx_buffer->page_offset, size, truesize);
6624
6625         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6626 }
6627
6628 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6629                                            union e1000_adv_rx_desc *rx_desc,
6630                                            struct sk_buff *skb)
6631 {
6632         struct igb_rx_buffer *rx_buffer;
6633         struct page *page;
6634
6635         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6636
6637         page = rx_buffer->page;
6638         prefetchw(page);
6639
6640         if (likely(!skb)) {
6641                 void *page_addr = page_address(page) +
6642                                   rx_buffer->page_offset;
6643
6644                 /* prefetch first cache line of first page */
6645                 prefetch(page_addr);
6646 #if L1_CACHE_BYTES < 128
6647                 prefetch(page_addr + L1_CACHE_BYTES);
6648 #endif
6649
6650                 /* allocate a skb to store the frags */
6651                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6652                                                 IGB_RX_HDR_LEN);
6653                 if (unlikely(!skb)) {
6654                         rx_ring->rx_stats.alloc_failed++;
6655                         return NULL;
6656                 }
6657
6658                 /* we will be copying header into skb->data in
6659                  * pskb_may_pull so it is in our interest to prefetch
6660                  * it now to avoid a possible cache miss
6661                  */
6662                 prefetchw(skb->data);
6663         }
6664
6665         /* we are reusing so sync this buffer for CPU use */
6666         dma_sync_single_range_for_cpu(rx_ring->dev,
6667                                       rx_buffer->dma,
6668                                       rx_buffer->page_offset,
6669                                       IGB_RX_BUFSZ,
6670                                       DMA_FROM_DEVICE);
6671
6672         /* pull page into skb */
6673         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6674                 /* hand second half of page back to the ring */
6675                 igb_reuse_rx_page(rx_ring, rx_buffer);
6676         } else {
6677                 /* we are not reusing the buffer so unmap it */
6678                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6679                                PAGE_SIZE, DMA_FROM_DEVICE);
6680         }
6681
6682         /* clear contents of rx_buffer */
6683         rx_buffer->page = NULL;
6684
6685         return skb;
6686 }
6687
6688 static inline void igb_rx_checksum(struct igb_ring *ring,
6689                                    union e1000_adv_rx_desc *rx_desc,
6690                                    struct sk_buff *skb)
6691 {
6692         skb_checksum_none_assert(skb);
6693
6694         /* Ignore Checksum bit is set */
6695         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6696                 return;
6697
6698         /* Rx checksum disabled via ethtool */
6699         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6700                 return;
6701
6702         /* TCP/UDP checksum error bit is set */
6703         if (igb_test_staterr(rx_desc,
6704                              E1000_RXDEXT_STATERR_TCPE |
6705                              E1000_RXDEXT_STATERR_IPE)) {
6706                 /* work around errata with sctp packets where the TCPE aka
6707                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6708                  * packets, (aka let the stack check the crc32c)
6709                  */
6710                 if (!((skb->len == 60) &&
6711                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6712                         u64_stats_update_begin(&ring->rx_syncp);
6713                         ring->rx_stats.csum_err++;
6714                         u64_stats_update_end(&ring->rx_syncp);
6715                 }
6716                 /* let the stack verify checksum errors */
6717                 return;
6718         }
6719         /* It must be a TCP or UDP packet with a valid checksum */
6720         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6721                                       E1000_RXD_STAT_UDPCS))
6722                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6723
6724         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6725                 le32_to_cpu(rx_desc->wb.upper.status_error));
6726 }
6727
6728 static inline void igb_rx_hash(struct igb_ring *ring,
6729                                union e1000_adv_rx_desc *rx_desc,
6730                                struct sk_buff *skb)
6731 {
6732         if (ring->netdev->features & NETIF_F_RXHASH)
6733                 skb_set_hash(skb,
6734                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
6735                              PKT_HASH_TYPE_L3);
6736 }
6737
6738 /**
6739  *  igb_is_non_eop - process handling of non-EOP buffers
6740  *  @rx_ring: Rx ring being processed
6741  *  @rx_desc: Rx descriptor for current buffer
6742  *  @skb: current socket buffer containing buffer in progress
6743  *
6744  *  This function updates next to clean.  If the buffer is an EOP buffer
6745  *  this function exits returning false, otherwise it will place the
6746  *  sk_buff in the next buffer to be chained and return true indicating
6747  *  that this is in fact a non-EOP buffer.
6748  **/
6749 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6750                            union e1000_adv_rx_desc *rx_desc)
6751 {
6752         u32 ntc = rx_ring->next_to_clean + 1;
6753
6754         /* fetch, update, and store next to clean */
6755         ntc = (ntc < rx_ring->count) ? ntc : 0;
6756         rx_ring->next_to_clean = ntc;
6757
6758         prefetch(IGB_RX_DESC(rx_ring, ntc));
6759
6760         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6761                 return false;
6762
6763         return true;
6764 }
6765
6766 /**
6767  *  igb_pull_tail - igb specific version of skb_pull_tail
6768  *  @rx_ring: rx descriptor ring packet is being transacted on
6769  *  @rx_desc: pointer to the EOP Rx descriptor
6770  *  @skb: pointer to current skb being adjusted
6771  *
6772  *  This function is an igb specific version of __pskb_pull_tail.  The
6773  *  main difference between this version and the original function is that
6774  *  this function can make several assumptions about the state of things
6775  *  that allow for significant optimizations versus the standard function.
6776  *  As a result we can do things like drop a frag and maintain an accurate
6777  *  truesize for the skb.
6778  */
6779 static void igb_pull_tail(struct igb_ring *rx_ring,
6780                           union e1000_adv_rx_desc *rx_desc,
6781                           struct sk_buff *skb)
6782 {
6783         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6784         unsigned char *va;
6785         unsigned int pull_len;
6786
6787         /* it is valid to use page_address instead of kmap since we are
6788          * working with pages allocated out of the lomem pool per
6789          * alloc_page(GFP_ATOMIC)
6790          */
6791         va = skb_frag_address(frag);
6792
6793         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6794                 /* retrieve timestamp from buffer */
6795                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6796
6797                 /* update pointers to remove timestamp header */
6798                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6799                 frag->page_offset += IGB_TS_HDR_LEN;
6800                 skb->data_len -= IGB_TS_HDR_LEN;
6801                 skb->len -= IGB_TS_HDR_LEN;
6802
6803                 /* move va to start of packet data */
6804                 va += IGB_TS_HDR_LEN;
6805         }
6806
6807         /* we need the header to contain the greater of either ETH_HLEN or
6808          * 60 bytes if the skb->len is less than 60 for skb_pad.
6809          */
6810         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6811
6812         /* align pull length to size of long to optimize memcpy performance */
6813         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6814
6815         /* update all of the pointers */
6816         skb_frag_size_sub(frag, pull_len);
6817         frag->page_offset += pull_len;
6818         skb->data_len -= pull_len;
6819         skb->tail += pull_len;
6820 }
6821
6822 /**
6823  *  igb_cleanup_headers - Correct corrupted or empty headers
6824  *  @rx_ring: rx descriptor ring packet is being transacted on
6825  *  @rx_desc: pointer to the EOP Rx descriptor
6826  *  @skb: pointer to current skb being fixed
6827  *
6828  *  Address the case where we are pulling data in on pages only
6829  *  and as such no data is present in the skb header.
6830  *
6831  *  In addition if skb is not at least 60 bytes we need to pad it so that
6832  *  it is large enough to qualify as a valid Ethernet frame.
6833  *
6834  *  Returns true if an error was encountered and skb was freed.
6835  **/
6836 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6837                                 union e1000_adv_rx_desc *rx_desc,
6838                                 struct sk_buff *skb)
6839 {
6840         if (unlikely((igb_test_staterr(rx_desc,
6841                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6842                 struct net_device *netdev = rx_ring->netdev;
6843                 if (!(netdev->features & NETIF_F_RXALL)) {
6844                         dev_kfree_skb_any(skb);
6845                         return true;
6846                 }
6847         }
6848
6849         /* place header in linear portion of buffer */
6850         if (skb_is_nonlinear(skb))
6851                 igb_pull_tail(rx_ring, rx_desc, skb);
6852
6853         /* if skb_pad returns an error the skb was freed */
6854         if (unlikely(skb->len < 60)) {
6855                 int pad_len = 60 - skb->len;
6856
6857                 if (skb_pad(skb, pad_len))
6858                         return true;
6859                 __skb_put(skb, pad_len);
6860         }
6861
6862         return false;
6863 }
6864
6865 /**
6866  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6867  *  @rx_ring: rx descriptor ring packet is being transacted on
6868  *  @rx_desc: pointer to the EOP Rx descriptor
6869  *  @skb: pointer to current skb being populated
6870  *
6871  *  This function checks the ring, descriptor, and packet information in
6872  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6873  *  other fields within the skb.
6874  **/
6875 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6876                                    union e1000_adv_rx_desc *rx_desc,
6877                                    struct sk_buff *skb)
6878 {
6879         struct net_device *dev = rx_ring->netdev;
6880
6881         igb_rx_hash(rx_ring, rx_desc, skb);
6882
6883         igb_rx_checksum(rx_ring, rx_desc, skb);
6884
6885         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
6886             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
6887                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
6888
6889         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6890             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6891                 u16 vid;
6892
6893                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6894                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6895                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6896                 else
6897                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6898
6899                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6900         }
6901
6902         skb_record_rx_queue(skb, rx_ring->queue_index);
6903
6904         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6905 }
6906
6907 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6908 {
6909         struct igb_ring *rx_ring = q_vector->rx.ring;
6910         struct sk_buff *skb = rx_ring->skb;
6911         unsigned int total_bytes = 0, total_packets = 0;
6912         u16 cleaned_count = igb_desc_unused(rx_ring);
6913
6914         while (likely(total_packets < budget)) {
6915                 union e1000_adv_rx_desc *rx_desc;
6916
6917                 /* return some buffers to hardware, one at a time is too slow */
6918                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6919                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6920                         cleaned_count = 0;
6921                 }
6922
6923                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6924
6925                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6926                         break;
6927
6928                 /* This memory barrier is needed to keep us from reading
6929                  * any other fields out of the rx_desc until we know the
6930                  * RXD_STAT_DD bit is set
6931                  */
6932                 rmb();
6933
6934                 /* retrieve a buffer from the ring */
6935                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6936
6937                 /* exit if we failed to retrieve a buffer */
6938                 if (!skb)
6939                         break;
6940
6941                 cleaned_count++;
6942
6943                 /* fetch next buffer in frame if non-eop */
6944                 if (igb_is_non_eop(rx_ring, rx_desc))
6945                         continue;
6946
6947                 /* verify the packet layout is correct */
6948                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6949                         skb = NULL;
6950                         continue;
6951                 }
6952
6953                 /* probably a little skewed due to removing CRC */
6954                 total_bytes += skb->len;
6955
6956                 /* populate checksum, timestamp, VLAN, and protocol */
6957                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6958
6959                 napi_gro_receive(&q_vector->napi, skb);
6960
6961                 /* reset skb pointer */
6962                 skb = NULL;
6963
6964                 /* update budget accounting */
6965                 total_packets++;
6966         }
6967
6968         /* place incomplete frames back on ring for completion */
6969         rx_ring->skb = skb;
6970
6971         u64_stats_update_begin(&rx_ring->rx_syncp);
6972         rx_ring->rx_stats.packets += total_packets;
6973         rx_ring->rx_stats.bytes += total_bytes;
6974         u64_stats_update_end(&rx_ring->rx_syncp);
6975         q_vector->rx.total_packets += total_packets;
6976         q_vector->rx.total_bytes += total_bytes;
6977
6978         if (cleaned_count)
6979                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6980
6981         return total_packets < budget;
6982 }
6983
6984 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6985                                   struct igb_rx_buffer *bi)
6986 {
6987         struct page *page = bi->page;
6988         dma_addr_t dma;
6989
6990         /* since we are recycling buffers we should seldom need to alloc */
6991         if (likely(page))
6992                 return true;
6993
6994         /* alloc new page for storage */
6995         page = dev_alloc_page();
6996         if (unlikely(!page)) {
6997                 rx_ring->rx_stats.alloc_failed++;
6998                 return false;
6999         }
7000
7001         /* map page for use */
7002         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7003
7004         /* if mapping failed free memory back to system since
7005          * there isn't much point in holding memory we can't use
7006          */
7007         if (dma_mapping_error(rx_ring->dev, dma)) {
7008                 __free_page(page);
7009
7010                 rx_ring->rx_stats.alloc_failed++;
7011                 return false;
7012         }
7013
7014         bi->dma = dma;
7015         bi->page = page;
7016         bi->page_offset = 0;
7017
7018         return true;
7019 }
7020
7021 /**
7022  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7023  *  @adapter: address of board private structure
7024  **/
7025 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7026 {
7027         union e1000_adv_rx_desc *rx_desc;
7028         struct igb_rx_buffer *bi;
7029         u16 i = rx_ring->next_to_use;
7030
7031         /* nothing to do */
7032         if (!cleaned_count)
7033                 return;
7034
7035         rx_desc = IGB_RX_DESC(rx_ring, i);
7036         bi = &rx_ring->rx_buffer_info[i];
7037         i -= rx_ring->count;
7038
7039         do {
7040                 if (!igb_alloc_mapped_page(rx_ring, bi))
7041                         break;
7042
7043                 /* Refresh the desc even if buffer_addrs didn't change
7044                  * because each write-back erases this info.
7045                  */
7046                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7047
7048                 rx_desc++;
7049                 bi++;
7050                 i++;
7051                 if (unlikely(!i)) {
7052                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7053                         bi = rx_ring->rx_buffer_info;
7054                         i -= rx_ring->count;
7055                 }
7056
7057                 /* clear the hdr_addr for the next_to_use descriptor */
7058                 rx_desc->read.hdr_addr = 0;
7059
7060                 cleaned_count--;
7061         } while (cleaned_count);
7062
7063         i += rx_ring->count;
7064
7065         if (rx_ring->next_to_use != i) {
7066                 /* record the next descriptor to use */
7067                 rx_ring->next_to_use = i;
7068
7069                 /* update next to alloc since we have filled the ring */
7070                 rx_ring->next_to_alloc = i;
7071
7072                 /* Force memory writes to complete before letting h/w
7073                  * know there are new descriptors to fetch.  (Only
7074                  * applicable for weak-ordered memory model archs,
7075                  * such as IA-64).
7076                  */
7077                 wmb();
7078                 writel(i, rx_ring->tail);
7079         }
7080 }
7081
7082 /**
7083  * igb_mii_ioctl -
7084  * @netdev:
7085  * @ifreq:
7086  * @cmd:
7087  **/
7088 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7089 {
7090         struct igb_adapter *adapter = netdev_priv(netdev);
7091         struct mii_ioctl_data *data = if_mii(ifr);
7092
7093         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7094                 return -EOPNOTSUPP;
7095
7096         switch (cmd) {
7097         case SIOCGMIIPHY:
7098                 data->phy_id = adapter->hw.phy.addr;
7099                 break;
7100         case SIOCGMIIREG:
7101                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7102                                      &data->val_out))
7103                         return -EIO;
7104                 break;
7105         case SIOCSMIIREG:
7106         default:
7107                 return -EOPNOTSUPP;
7108         }
7109         return 0;
7110 }
7111
7112 /**
7113  * igb_ioctl -
7114  * @netdev:
7115  * @ifreq:
7116  * @cmd:
7117  **/
7118 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7119 {
7120         switch (cmd) {
7121         case SIOCGMIIPHY:
7122         case SIOCGMIIREG:
7123         case SIOCSMIIREG:
7124                 return igb_mii_ioctl(netdev, ifr, cmd);
7125         case SIOCGHWTSTAMP:
7126                 return igb_ptp_get_ts_config(netdev, ifr);
7127         case SIOCSHWTSTAMP:
7128                 return igb_ptp_set_ts_config(netdev, ifr);
7129         default:
7130                 return -EOPNOTSUPP;
7131         }
7132 }
7133
7134 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7135 {
7136         struct igb_adapter *adapter = hw->back;
7137
7138         pci_read_config_word(adapter->pdev, reg, value);
7139 }
7140
7141 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7142 {
7143         struct igb_adapter *adapter = hw->back;
7144
7145         pci_write_config_word(adapter->pdev, reg, *value);
7146 }
7147
7148 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7149 {
7150         struct igb_adapter *adapter = hw->back;
7151
7152         if (pcie_capability_read_word(adapter->pdev, reg, value))
7153                 return -E1000_ERR_CONFIG;
7154
7155         return 0;
7156 }
7157
7158 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7159 {
7160         struct igb_adapter *adapter = hw->back;
7161
7162         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7163                 return -E1000_ERR_CONFIG;
7164
7165         return 0;
7166 }
7167
7168 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7169 {
7170         struct igb_adapter *adapter = netdev_priv(netdev);
7171         struct e1000_hw *hw = &adapter->hw;
7172         u32 ctrl, rctl;
7173         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7174
7175         if (enable) {
7176                 /* enable VLAN tag insert/strip */
7177                 ctrl = rd32(E1000_CTRL);
7178                 ctrl |= E1000_CTRL_VME;
7179                 wr32(E1000_CTRL, ctrl);
7180
7181                 /* Disable CFI check */
7182                 rctl = rd32(E1000_RCTL);
7183                 rctl &= ~E1000_RCTL_CFIEN;
7184                 wr32(E1000_RCTL, rctl);
7185         } else {
7186                 /* disable VLAN tag insert/strip */
7187                 ctrl = rd32(E1000_CTRL);
7188                 ctrl &= ~E1000_CTRL_VME;
7189                 wr32(E1000_CTRL, ctrl);
7190         }
7191
7192         igb_rlpml_set(adapter);
7193 }
7194
7195 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7196                                __be16 proto, u16 vid)
7197 {
7198         struct igb_adapter *adapter = netdev_priv(netdev);
7199         struct e1000_hw *hw = &adapter->hw;
7200         int pf_id = adapter->vfs_allocated_count;
7201
7202         /* attempt to add filter to vlvf array */
7203         igb_vlvf_set(adapter, vid, true, pf_id);
7204
7205         /* add the filter since PF can receive vlans w/o entry in vlvf */
7206         igb_vfta_set(hw, vid, true);
7207
7208         set_bit(vid, adapter->active_vlans);
7209
7210         return 0;
7211 }
7212
7213 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7214                                 __be16 proto, u16 vid)
7215 {
7216         struct igb_adapter *adapter = netdev_priv(netdev);
7217         struct e1000_hw *hw = &adapter->hw;
7218         int pf_id = adapter->vfs_allocated_count;
7219         s32 err;
7220
7221         /* remove vlan from VLVF table array */
7222         err = igb_vlvf_set(adapter, vid, false, pf_id);
7223
7224         /* if vid was not present in VLVF just remove it from table */
7225         if (err)
7226                 igb_vfta_set(hw, vid, false);
7227
7228         clear_bit(vid, adapter->active_vlans);
7229
7230         return 0;
7231 }
7232
7233 static void igb_restore_vlan(struct igb_adapter *adapter)
7234 {
7235         u16 vid;
7236
7237         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7238
7239         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7240                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7241 }
7242
7243 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7244 {
7245         struct pci_dev *pdev = adapter->pdev;
7246         struct e1000_mac_info *mac = &adapter->hw.mac;
7247
7248         mac->autoneg = 0;
7249
7250         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7251          * for the switch() below to work
7252          */
7253         if ((spd & 1) || (dplx & ~1))
7254                 goto err_inval;
7255
7256         /* Fiber NIC's only allow 1000 gbps Full duplex
7257          * and 100Mbps Full duplex for 100baseFx sfp
7258          */
7259         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7260                 switch (spd + dplx) {
7261                 case SPEED_10 + DUPLEX_HALF:
7262                 case SPEED_10 + DUPLEX_FULL:
7263                 case SPEED_100 + DUPLEX_HALF:
7264                         goto err_inval;
7265                 default:
7266                         break;
7267                 }
7268         }
7269
7270         switch (spd + dplx) {
7271         case SPEED_10 + DUPLEX_HALF:
7272                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7273                 break;
7274         case SPEED_10 + DUPLEX_FULL:
7275                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7276                 break;
7277         case SPEED_100 + DUPLEX_HALF:
7278                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7279                 break;
7280         case SPEED_100 + DUPLEX_FULL:
7281                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7282                 break;
7283         case SPEED_1000 + DUPLEX_FULL:
7284                 mac->autoneg = 1;
7285                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7286                 break;
7287         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7288         default:
7289                 goto err_inval;
7290         }
7291
7292         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7293         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7294
7295         return 0;
7296
7297 err_inval:
7298         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7299         return -EINVAL;
7300 }
7301
7302 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7303                           bool runtime)
7304 {
7305         struct net_device *netdev = pci_get_drvdata(pdev);
7306         struct igb_adapter *adapter = netdev_priv(netdev);
7307         struct e1000_hw *hw = &adapter->hw;
7308         u32 ctrl, rctl, status;
7309         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7310 #ifdef CONFIG_PM
7311         int retval = 0;
7312 #endif
7313
7314         netif_device_detach(netdev);
7315
7316         if (netif_running(netdev))
7317                 __igb_close(netdev, true);
7318
7319         igb_clear_interrupt_scheme(adapter);
7320
7321 #ifdef CONFIG_PM
7322         retval = pci_save_state(pdev);
7323         if (retval)
7324                 return retval;
7325 #endif
7326
7327         status = rd32(E1000_STATUS);
7328         if (status & E1000_STATUS_LU)
7329                 wufc &= ~E1000_WUFC_LNKC;
7330
7331         if (wufc) {
7332                 igb_setup_rctl(adapter);
7333                 igb_set_rx_mode(netdev);
7334
7335                 /* turn on all-multi mode if wake on multicast is enabled */
7336                 if (wufc & E1000_WUFC_MC) {
7337                         rctl = rd32(E1000_RCTL);
7338                         rctl |= E1000_RCTL_MPE;
7339                         wr32(E1000_RCTL, rctl);
7340                 }
7341
7342                 ctrl = rd32(E1000_CTRL);
7343                 /* advertise wake from D3Cold */
7344                 #define E1000_CTRL_ADVD3WUC 0x00100000
7345                 /* phy power management enable */
7346                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7347                 ctrl |= E1000_CTRL_ADVD3WUC;
7348                 wr32(E1000_CTRL, ctrl);
7349
7350                 /* Allow time for pending master requests to run */
7351                 igb_disable_pcie_master(hw);
7352
7353                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7354                 wr32(E1000_WUFC, wufc);
7355         } else {
7356                 wr32(E1000_WUC, 0);
7357                 wr32(E1000_WUFC, 0);
7358         }
7359
7360         *enable_wake = wufc || adapter->en_mng_pt;
7361         if (!*enable_wake)
7362                 igb_power_down_link(adapter);
7363         else
7364                 igb_power_up_link(adapter);
7365
7366         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7367          * would have already happened in close and is redundant.
7368          */
7369         igb_release_hw_control(adapter);
7370
7371         pci_disable_device(pdev);
7372
7373         return 0;
7374 }
7375
7376 #ifdef CONFIG_PM
7377 #ifdef CONFIG_PM_SLEEP
7378 static int igb_suspend(struct device *dev)
7379 {
7380         int retval;
7381         bool wake;
7382         struct pci_dev *pdev = to_pci_dev(dev);
7383
7384         retval = __igb_shutdown(pdev, &wake, 0);
7385         if (retval)
7386                 return retval;
7387
7388         if (wake) {
7389                 pci_prepare_to_sleep(pdev);
7390         } else {
7391                 pci_wake_from_d3(pdev, false);
7392                 pci_set_power_state(pdev, PCI_D3hot);
7393         }
7394
7395         return 0;
7396 }
7397 #endif /* CONFIG_PM_SLEEP */
7398
7399 static int igb_resume(struct device *dev)
7400 {
7401         struct pci_dev *pdev = to_pci_dev(dev);
7402         struct net_device *netdev = pci_get_drvdata(pdev);
7403         struct igb_adapter *adapter = netdev_priv(netdev);
7404         struct e1000_hw *hw = &adapter->hw;
7405         u32 err;
7406
7407         pci_set_power_state(pdev, PCI_D0);
7408         pci_restore_state(pdev);
7409         pci_save_state(pdev);
7410
7411         if (!pci_device_is_present(pdev))
7412                 return -ENODEV;
7413         err = pci_enable_device_mem(pdev);
7414         if (err) {
7415                 dev_err(&pdev->dev,
7416                         "igb: Cannot enable PCI device from suspend\n");
7417                 return err;
7418         }
7419         pci_set_master(pdev);
7420
7421         pci_enable_wake(pdev, PCI_D3hot, 0);
7422         pci_enable_wake(pdev, PCI_D3cold, 0);
7423
7424         if (igb_init_interrupt_scheme(adapter, true)) {
7425                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7426                 return -ENOMEM;
7427         }
7428
7429         igb_reset(adapter);
7430
7431         /* let the f/w know that the h/w is now under the control of the
7432          * driver.
7433          */
7434         igb_get_hw_control(adapter);
7435
7436         wr32(E1000_WUS, ~0);
7437
7438         if (netdev->flags & IFF_UP) {
7439                 rtnl_lock();
7440                 err = __igb_open(netdev, true);
7441                 rtnl_unlock();
7442                 if (err)
7443                         return err;
7444         }
7445
7446         netif_device_attach(netdev);
7447         return 0;
7448 }
7449
7450 #ifdef CONFIG_PM_RUNTIME
7451 static int igb_runtime_idle(struct device *dev)
7452 {
7453         struct pci_dev *pdev = to_pci_dev(dev);
7454         struct net_device *netdev = pci_get_drvdata(pdev);
7455         struct igb_adapter *adapter = netdev_priv(netdev);
7456
7457         if (!igb_has_link(adapter))
7458                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7459
7460         return -EBUSY;
7461 }
7462
7463 static int igb_runtime_suspend(struct device *dev)
7464 {
7465         struct pci_dev *pdev = to_pci_dev(dev);
7466         int retval;
7467         bool wake;
7468
7469         retval = __igb_shutdown(pdev, &wake, 1);
7470         if (retval)
7471                 return retval;
7472
7473         if (wake) {
7474                 pci_prepare_to_sleep(pdev);
7475         } else {
7476                 pci_wake_from_d3(pdev, false);
7477                 pci_set_power_state(pdev, PCI_D3hot);
7478         }
7479
7480         return 0;
7481 }
7482
7483 static int igb_runtime_resume(struct device *dev)
7484 {
7485         return igb_resume(dev);
7486 }
7487 #endif /* CONFIG_PM_RUNTIME */
7488 #endif
7489
7490 static void igb_shutdown(struct pci_dev *pdev)
7491 {
7492         bool wake;
7493
7494         __igb_shutdown(pdev, &wake, 0);
7495
7496         if (system_state == SYSTEM_POWER_OFF) {
7497                 pci_wake_from_d3(pdev, wake);
7498                 pci_set_power_state(pdev, PCI_D3hot);
7499         }
7500 }
7501
7502 #ifdef CONFIG_PCI_IOV
7503 static int igb_sriov_reinit(struct pci_dev *dev)
7504 {
7505         struct net_device *netdev = pci_get_drvdata(dev);
7506         struct igb_adapter *adapter = netdev_priv(netdev);
7507         struct pci_dev *pdev = adapter->pdev;
7508
7509         rtnl_lock();
7510
7511         if (netif_running(netdev))
7512                 igb_close(netdev);
7513         else
7514                 igb_reset(adapter);
7515
7516         igb_clear_interrupt_scheme(adapter);
7517
7518         igb_init_queue_configuration(adapter);
7519
7520         if (igb_init_interrupt_scheme(adapter, true)) {
7521                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7522                 return -ENOMEM;
7523         }
7524
7525         if (netif_running(netdev))
7526                 igb_open(netdev);
7527
7528         rtnl_unlock();
7529
7530         return 0;
7531 }
7532
7533 static int igb_pci_disable_sriov(struct pci_dev *dev)
7534 {
7535         int err = igb_disable_sriov(dev);
7536
7537         if (!err)
7538                 err = igb_sriov_reinit(dev);
7539
7540         return err;
7541 }
7542
7543 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7544 {
7545         int err = igb_enable_sriov(dev, num_vfs);
7546
7547         if (err)
7548                 goto out;
7549
7550         err = igb_sriov_reinit(dev);
7551         if (!err)
7552                 return num_vfs;
7553
7554 out:
7555         return err;
7556 }
7557
7558 #endif
7559 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7560 {
7561 #ifdef CONFIG_PCI_IOV
7562         if (num_vfs == 0)
7563                 return igb_pci_disable_sriov(dev);
7564         else
7565                 return igb_pci_enable_sriov(dev, num_vfs);
7566 #endif
7567         return 0;
7568 }
7569
7570 #ifdef CONFIG_NET_POLL_CONTROLLER
7571 /* Polling 'interrupt' - used by things like netconsole to send skbs
7572  * without having to re-enable interrupts. It's not called while
7573  * the interrupt routine is executing.
7574  */
7575 static void igb_netpoll(struct net_device *netdev)
7576 {
7577         struct igb_adapter *adapter = netdev_priv(netdev);
7578         struct e1000_hw *hw = &adapter->hw;
7579         struct igb_q_vector *q_vector;
7580         int i;
7581
7582         for (i = 0; i < adapter->num_q_vectors; i++) {
7583                 q_vector = adapter->q_vector[i];
7584                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7585                         wr32(E1000_EIMC, q_vector->eims_value);
7586                 else
7587                         igb_irq_disable(adapter);
7588                 napi_schedule(&q_vector->napi);
7589         }
7590 }
7591 #endif /* CONFIG_NET_POLL_CONTROLLER */
7592
7593 /**
7594  *  igb_io_error_detected - called when PCI error is detected
7595  *  @pdev: Pointer to PCI device
7596  *  @state: The current pci connection state
7597  *
7598  *  This function is called after a PCI bus error affecting
7599  *  this device has been detected.
7600  **/
7601 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7602                                               pci_channel_state_t state)
7603 {
7604         struct net_device *netdev = pci_get_drvdata(pdev);
7605         struct igb_adapter *adapter = netdev_priv(netdev);
7606
7607         netif_device_detach(netdev);
7608
7609         if (state == pci_channel_io_perm_failure)
7610                 return PCI_ERS_RESULT_DISCONNECT;
7611
7612         if (netif_running(netdev))
7613                 igb_down(adapter);
7614         pci_disable_device(pdev);
7615
7616         /* Request a slot slot reset. */
7617         return PCI_ERS_RESULT_NEED_RESET;
7618 }
7619
7620 /**
7621  *  igb_io_slot_reset - called after the pci bus has been reset.
7622  *  @pdev: Pointer to PCI device
7623  *
7624  *  Restart the card from scratch, as if from a cold-boot. Implementation
7625  *  resembles the first-half of the igb_resume routine.
7626  **/
7627 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7628 {
7629         struct net_device *netdev = pci_get_drvdata(pdev);
7630         struct igb_adapter *adapter = netdev_priv(netdev);
7631         struct e1000_hw *hw = &adapter->hw;
7632         pci_ers_result_t result;
7633         int err;
7634
7635         if (pci_enable_device_mem(pdev)) {
7636                 dev_err(&pdev->dev,
7637                         "Cannot re-enable PCI device after reset.\n");
7638                 result = PCI_ERS_RESULT_DISCONNECT;
7639         } else {
7640                 pci_set_master(pdev);
7641                 pci_restore_state(pdev);
7642                 pci_save_state(pdev);
7643
7644                 pci_enable_wake(pdev, PCI_D3hot, 0);
7645                 pci_enable_wake(pdev, PCI_D3cold, 0);
7646
7647                 igb_reset(adapter);
7648                 wr32(E1000_WUS, ~0);
7649                 result = PCI_ERS_RESULT_RECOVERED;
7650         }
7651
7652         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7653         if (err) {
7654                 dev_err(&pdev->dev,
7655                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7656                         err);
7657                 /* non-fatal, continue */
7658         }
7659
7660         return result;
7661 }
7662
7663 /**
7664  *  igb_io_resume - called when traffic can start flowing again.
7665  *  @pdev: Pointer to PCI device
7666  *
7667  *  This callback is called when the error recovery driver tells us that
7668  *  its OK to resume normal operation. Implementation resembles the
7669  *  second-half of the igb_resume routine.
7670  */
7671 static void igb_io_resume(struct pci_dev *pdev)
7672 {
7673         struct net_device *netdev = pci_get_drvdata(pdev);
7674         struct igb_adapter *adapter = netdev_priv(netdev);
7675
7676         if (netif_running(netdev)) {
7677                 if (igb_up(adapter)) {
7678                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7679                         return;
7680                 }
7681         }
7682
7683         netif_device_attach(netdev);
7684
7685         /* let the f/w know that the h/w is now under the control of the
7686          * driver.
7687          */
7688         igb_get_hw_control(adapter);
7689 }
7690
7691 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7692                              u8 qsel)
7693 {
7694         u32 rar_low, rar_high;
7695         struct e1000_hw *hw = &adapter->hw;
7696
7697         /* HW expects these in little endian so we reverse the byte order
7698          * from network order (big endian) to little endian
7699          */
7700         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7701                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7702         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7703
7704         /* Indicate to hardware the Address is Valid. */
7705         rar_high |= E1000_RAH_AV;
7706
7707         if (hw->mac.type == e1000_82575)
7708                 rar_high |= E1000_RAH_POOL_1 * qsel;
7709         else
7710                 rar_high |= E1000_RAH_POOL_1 << qsel;
7711
7712         wr32(E1000_RAL(index), rar_low);
7713         wrfl();
7714         wr32(E1000_RAH(index), rar_high);
7715         wrfl();
7716 }
7717
7718 static int igb_set_vf_mac(struct igb_adapter *adapter,
7719                           int vf, unsigned char *mac_addr)
7720 {
7721         struct e1000_hw *hw = &adapter->hw;
7722         /* VF MAC addresses start at end of receive addresses and moves
7723          * towards the first, as a result a collision should not be possible
7724          */
7725         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7726
7727         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7728
7729         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7730
7731         return 0;
7732 }
7733
7734 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7735 {
7736         struct igb_adapter *adapter = netdev_priv(netdev);
7737         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7738                 return -EINVAL;
7739         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7740         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7741         dev_info(&adapter->pdev->dev,
7742                  "Reload the VF driver to make this change effective.");
7743         if (test_bit(__IGB_DOWN, &adapter->state)) {
7744                 dev_warn(&adapter->pdev->dev,
7745                          "The VF MAC address has been set, but the PF device is not up.\n");
7746                 dev_warn(&adapter->pdev->dev,
7747                          "Bring the PF device up before attempting to use the VF device.\n");
7748         }
7749         return igb_set_vf_mac(adapter, vf, mac);
7750 }
7751
7752 static int igb_link_mbps(int internal_link_speed)
7753 {
7754         switch (internal_link_speed) {
7755         case SPEED_100:
7756                 return 100;
7757         case SPEED_1000:
7758                 return 1000;
7759         default:
7760                 return 0;
7761         }
7762 }
7763
7764 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7765                                   int link_speed)
7766 {
7767         int rf_dec, rf_int;
7768         u32 bcnrc_val;
7769
7770         if (tx_rate != 0) {
7771                 /* Calculate the rate factor values to set */
7772                 rf_int = link_speed / tx_rate;
7773                 rf_dec = (link_speed - (rf_int * tx_rate));
7774                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7775                          tx_rate;
7776
7777                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7778                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7779                               E1000_RTTBCNRC_RF_INT_MASK);
7780                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7781         } else {
7782                 bcnrc_val = 0;
7783         }
7784
7785         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7786         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7787          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7788          */
7789         wr32(E1000_RTTBCNRM, 0x14);
7790         wr32(E1000_RTTBCNRC, bcnrc_val);
7791 }
7792
7793 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7794 {
7795         int actual_link_speed, i;
7796         bool reset_rate = false;
7797
7798         /* VF TX rate limit was not set or not supported */
7799         if ((adapter->vf_rate_link_speed == 0) ||
7800             (adapter->hw.mac.type != e1000_82576))
7801                 return;
7802
7803         actual_link_speed = igb_link_mbps(adapter->link_speed);
7804         if (actual_link_speed != adapter->vf_rate_link_speed) {
7805                 reset_rate = true;
7806                 adapter->vf_rate_link_speed = 0;
7807                 dev_info(&adapter->pdev->dev,
7808                          "Link speed has been changed. VF Transmit rate is disabled\n");
7809         }
7810
7811         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7812                 if (reset_rate)
7813                         adapter->vf_data[i].tx_rate = 0;
7814
7815                 igb_set_vf_rate_limit(&adapter->hw, i,
7816                                       adapter->vf_data[i].tx_rate,
7817                                       actual_link_speed);
7818         }
7819 }
7820
7821 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
7822                              int min_tx_rate, int max_tx_rate)
7823 {
7824         struct igb_adapter *adapter = netdev_priv(netdev);
7825         struct e1000_hw *hw = &adapter->hw;
7826         int actual_link_speed;
7827
7828         if (hw->mac.type != e1000_82576)
7829                 return -EOPNOTSUPP;
7830
7831         if (min_tx_rate)
7832                 return -EINVAL;
7833
7834         actual_link_speed = igb_link_mbps(adapter->link_speed);
7835         if ((vf >= adapter->vfs_allocated_count) ||
7836             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7837             (max_tx_rate < 0) ||
7838             (max_tx_rate > actual_link_speed))
7839                 return -EINVAL;
7840
7841         adapter->vf_rate_link_speed = actual_link_speed;
7842         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
7843         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
7844
7845         return 0;
7846 }
7847
7848 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7849                                    bool setting)
7850 {
7851         struct igb_adapter *adapter = netdev_priv(netdev);
7852         struct e1000_hw *hw = &adapter->hw;
7853         u32 reg_val, reg_offset;
7854
7855         if (!adapter->vfs_allocated_count)
7856                 return -EOPNOTSUPP;
7857
7858         if (vf >= adapter->vfs_allocated_count)
7859                 return -EINVAL;
7860
7861         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7862         reg_val = rd32(reg_offset);
7863         if (setting)
7864                 reg_val |= ((1 << vf) |
7865                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7866         else
7867                 reg_val &= ~((1 << vf) |
7868                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7869         wr32(reg_offset, reg_val);
7870
7871         adapter->vf_data[vf].spoofchk_enabled = setting;
7872         return 0;
7873 }
7874
7875 static int igb_ndo_get_vf_config(struct net_device *netdev,
7876                                  int vf, struct ifla_vf_info *ivi)
7877 {
7878         struct igb_adapter *adapter = netdev_priv(netdev);
7879         if (vf >= adapter->vfs_allocated_count)
7880                 return -EINVAL;
7881         ivi->vf = vf;
7882         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7883         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
7884         ivi->min_tx_rate = 0;
7885         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7886         ivi->qos = adapter->vf_data[vf].pf_qos;
7887         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7888         return 0;
7889 }
7890
7891 static void igb_vmm_control(struct igb_adapter *adapter)
7892 {
7893         struct e1000_hw *hw = &adapter->hw;
7894         u32 reg;
7895
7896         switch (hw->mac.type) {
7897         case e1000_82575:
7898         case e1000_i210:
7899         case e1000_i211:
7900         case e1000_i354:
7901         default:
7902                 /* replication is not supported for 82575 */
7903                 return;
7904         case e1000_82576:
7905                 /* notify HW that the MAC is adding vlan tags */
7906                 reg = rd32(E1000_DTXCTL);
7907                 reg |= E1000_DTXCTL_VLAN_ADDED;
7908                 wr32(E1000_DTXCTL, reg);
7909                 /* Fall through */
7910         case e1000_82580:
7911                 /* enable replication vlan tag stripping */
7912                 reg = rd32(E1000_RPLOLR);
7913                 reg |= E1000_RPLOLR_STRVLAN;
7914                 wr32(E1000_RPLOLR, reg);
7915                 /* Fall through */
7916         case e1000_i350:
7917                 /* none of the above registers are supported by i350 */
7918                 break;
7919         }
7920
7921         if (adapter->vfs_allocated_count) {
7922                 igb_vmdq_set_loopback_pf(hw, true);
7923                 igb_vmdq_set_replication_pf(hw, true);
7924                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7925                                               adapter->vfs_allocated_count);
7926         } else {
7927                 igb_vmdq_set_loopback_pf(hw, false);
7928                 igb_vmdq_set_replication_pf(hw, false);
7929         }
7930 }
7931
7932 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7933 {
7934         struct e1000_hw *hw = &adapter->hw;
7935         u32 dmac_thr;
7936         u16 hwm;
7937
7938         if (hw->mac.type > e1000_82580) {
7939                 if (adapter->flags & IGB_FLAG_DMAC) {
7940                         u32 reg;
7941
7942                         /* force threshold to 0. */
7943                         wr32(E1000_DMCTXTH, 0);
7944
7945                         /* DMA Coalescing high water mark needs to be greater
7946                          * than the Rx threshold. Set hwm to PBA - max frame
7947                          * size in 16B units, capping it at PBA - 6KB.
7948                          */
7949                         hwm = 64 * pba - adapter->max_frame_size / 16;
7950                         if (hwm < 64 * (pba - 6))
7951                                 hwm = 64 * (pba - 6);
7952                         reg = rd32(E1000_FCRTC);
7953                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7954                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7955                                 & E1000_FCRTC_RTH_COAL_MASK);
7956                         wr32(E1000_FCRTC, reg);
7957
7958                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7959                          * frame size, capping it at PBA - 10KB.
7960                          */
7961                         dmac_thr = pba - adapter->max_frame_size / 512;
7962                         if (dmac_thr < pba - 10)
7963                                 dmac_thr = pba - 10;
7964                         reg = rd32(E1000_DMACR);
7965                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7966                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7967                                 & E1000_DMACR_DMACTHR_MASK);
7968
7969                         /* transition to L0x or L1 if available..*/
7970                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7971
7972                         /* watchdog timer= +-1000 usec in 32usec intervals */
7973                         reg |= (1000 >> 5);
7974
7975                         /* Disable BMC-to-OS Watchdog Enable */
7976                         if (hw->mac.type != e1000_i354)
7977                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7978
7979                         wr32(E1000_DMACR, reg);
7980
7981                         /* no lower threshold to disable
7982                          * coalescing(smart fifb)-UTRESH=0
7983                          */
7984                         wr32(E1000_DMCRTRH, 0);
7985
7986                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7987
7988                         wr32(E1000_DMCTLX, reg);
7989
7990                         /* free space in tx packet buffer to wake from
7991                          * DMA coal
7992                          */
7993                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7994                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7995
7996                         /* make low power state decision controlled
7997                          * by DMA coal
7998                          */
7999                         reg = rd32(E1000_PCIEMISC);
8000                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8001                         wr32(E1000_PCIEMISC, reg);
8002                 } /* endif adapter->dmac is not disabled */
8003         } else if (hw->mac.type == e1000_82580) {
8004                 u32 reg = rd32(E1000_PCIEMISC);
8005
8006                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8007                 wr32(E1000_DMACR, 0);
8008         }
8009 }
8010
8011 /**
8012  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8013  *  @hw: pointer to hardware structure
8014  *  @byte_offset: byte offset to read
8015  *  @dev_addr: device address
8016  *  @data: value read
8017  *
8018  *  Performs byte read operation over I2C interface at
8019  *  a specified device address.
8020  **/
8021 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8022                       u8 dev_addr, u8 *data)
8023 {
8024         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8025         struct i2c_client *this_client = adapter->i2c_client;
8026         s32 status;
8027         u16 swfw_mask = 0;
8028
8029         if (!this_client)
8030                 return E1000_ERR_I2C;
8031
8032         swfw_mask = E1000_SWFW_PHY0_SM;
8033
8034         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8035                 return E1000_ERR_SWFW_SYNC;
8036
8037         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8038         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8039
8040         if (status < 0)
8041                 return E1000_ERR_I2C;
8042         else {
8043                 *data = status;
8044                 return 0;
8045         }
8046 }
8047
8048 /**
8049  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8050  *  @hw: pointer to hardware structure
8051  *  @byte_offset: byte offset to write
8052  *  @dev_addr: device address
8053  *  @data: value to write
8054  *
8055  *  Performs byte write operation over I2C interface at
8056  *  a specified device address.
8057  **/
8058 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8059                        u8 dev_addr, u8 data)
8060 {
8061         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8062         struct i2c_client *this_client = adapter->i2c_client;
8063         s32 status;
8064         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8065
8066         if (!this_client)
8067                 return E1000_ERR_I2C;
8068
8069         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8070                 return E1000_ERR_SWFW_SYNC;
8071         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8072         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8073
8074         if (status)
8075                 return E1000_ERR_I2C;
8076         else
8077                 return 0;
8078
8079 }
8080
8081 int igb_reinit_queues(struct igb_adapter *adapter)
8082 {
8083         struct net_device *netdev = adapter->netdev;
8084         struct pci_dev *pdev = adapter->pdev;
8085         int err = 0;
8086
8087         if (netif_running(netdev))
8088                 igb_close(netdev);
8089
8090         igb_reset_interrupt_capability(adapter);
8091
8092         if (igb_init_interrupt_scheme(adapter, true)) {
8093                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8094                 return -ENOMEM;
8095         }
8096
8097         if (netif_running(netdev))
8098                 err = igb_open(netdev);
8099
8100         return err;
8101 }
8102 /* igb_main.c */