drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #include <linux/etherdevice.h>
  54 #ifdef CONFIG_IGB_DCA
  55 #include <linux/dca.h>
  56 #endif
  57 #include <linux/i2c.h>
  58 #include "igb.h"
  59
  60 #define MAJ 5
  61 #define MIN 3
  62 #define BUILD 0
  63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  64 __stringify(BUILD) "-k"
  65 char igb_driver_name[] = "igb";
  66 char igb_driver_version[] = DRV_VERSION;
  67 static const char igb_driver_string[] =
  68                                 "Intel(R) Gigabit Ethernet Network Driver";
  69 static const char igb_copyright[] =
  70                                 "Copyright (c) 2007-2014 Intel Corporation.";
  71
  72 static const struct e1000_info *igb_info_tbl[] = {
  73         [board_82575] = &e1000_82575_info,
  74 };
  75
  76 static const struct pci_device_id igb_pci_tbl[] = {
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 112         /* required last entry */
 113         {0, }
 114 };
 115
 116 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 117
 118 static int igb_setup_all_tx_resources(struct igb_adapter *);
 119 static int igb_setup_all_rx_resources(struct igb_adapter *);
 120 static void igb_free_all_tx_resources(struct igb_adapter *);
 121 static void igb_free_all_rx_resources(struct igb_adapter *);
 122 static void igb_setup_mrqc(struct igb_adapter *);
 123 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 124 static void igb_remove(struct pci_dev *pdev);
 125 static int igb_sw_init(struct igb_adapter *);
 126 int igb_open(struct net_device *);
 127 int igb_close(struct net_device *);
 128 static void igb_configure(struct igb_adapter *);
 129 static void igb_configure_tx(struct igb_adapter *);
 130 static void igb_configure_rx(struct igb_adapter *);
 131 static void igb_clean_all_tx_rings(struct igb_adapter *);
 132 static void igb_clean_all_rx_rings(struct igb_adapter *);
 133 static void igb_clean_tx_ring(struct igb_ring *);
 134 static void igb_clean_rx_ring(struct igb_ring *);
 135 static void igb_set_rx_mode(struct net_device *);
 136 static void igb_update_phy_info(unsigned long);
 137 static void igb_watchdog(unsigned long);
 138 static void igb_watchdog_task(struct work_struct *);
 139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 140 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 141                                           struct rtnl_link_stats64 *stats);
 142 static int igb_change_mtu(struct net_device *, int);
 143 static int igb_set_mac(struct net_device *, void *);
 144 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 145 static irqreturn_t igb_intr(int irq, void *);
 146 static irqreturn_t igb_intr_msi(int irq, void *);
 147 static irqreturn_t igb_msix_other(int irq, void *);
 148 static irqreturn_t igb_msix_ring(int irq, void *);
 149 #ifdef CONFIG_IGB_DCA
 150 static void igb_update_dca(struct igb_q_vector *);
 151 static void igb_setup_dca(struct igb_adapter *);
 152 #endif /* CONFIG_IGB_DCA */
 153 static int igb_poll(struct napi_struct *, int);
 154 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 155 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 157 static void igb_tx_timeout(struct net_device *);
 158 static void igb_reset_task(struct work_struct *);
 159 static void igb_vlan_mode(struct net_device *netdev,
 160                           netdev_features_t features);
 161 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 162 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 163 static void igb_restore_vlan(struct igb_adapter *);
 164 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 165 static void igb_ping_all_vfs(struct igb_adapter *);
 166 static void igb_msg_task(struct igb_adapter *);
 167 static void igb_vmm_control(struct igb_adapter *);
 168 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 169 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 170 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 171 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 172                                int vf, u16 vlan, u8 qos);
 173 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 174 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 175                                    bool setting);
 176 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 177                                  struct ifla_vf_info *ivi);
 178 static void igb_check_vf_rate_limit(struct igb_adapter *);
 179
 180 #ifdef CONFIG_PCI_IOV
 181 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 182 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 183 static int igb_disable_sriov(struct pci_dev *dev);
 184 static int igb_pci_disable_sriov(struct pci_dev *dev);
 185 #endif
 186
 187 #ifdef CONFIG_PM
 188 #ifdef CONFIG_PM_SLEEP
 189 static int igb_suspend(struct device *);
 190 #endif
 191 static int igb_resume(struct device *);
 192 static int igb_runtime_suspend(struct device *dev);
 193 static int igb_runtime_resume(struct device *dev);
 194 static int igb_runtime_idle(struct device *dev);
 195 static const struct dev_pm_ops igb_pm_ops = {
 196         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 197         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 198                         igb_runtime_idle)
 199 };
 200 #endif
 201 static void igb_shutdown(struct pci_dev *);
 202 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 203 #ifdef CONFIG_IGB_DCA
 204 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 205 static struct notifier_block dca_notifier = {
 206         .notifier_call  = igb_notify_dca,
 207         .next           = NULL,
 208         .priority       = 0
 209 };
 210 #endif
 211 #ifdef CONFIG_NET_POLL_CONTROLLER
 212 /* for netdump / net console */
 213 static void igb_netpoll(struct net_device *);
 214 #endif
 215 #ifdef CONFIG_PCI_IOV
 216 static unsigned int max_vfs;
 217 module_param(max_vfs, uint, 0);
 218 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 219 #endif /* CONFIG_PCI_IOV */
 220
 221 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 222                      pci_channel_state_t);
 223 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 224 static void igb_io_resume(struct pci_dev *);
 225
 226 static const struct pci_error_handlers igb_err_handler = {
 227         .error_detected = igb_io_error_detected,
 228         .slot_reset = igb_io_slot_reset,
 229         .resume = igb_io_resume,
 230 };
 231
 232 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 233
 234 static struct pci_driver igb_driver = {
 235         .name     = igb_driver_name,
 236         .id_table = igb_pci_tbl,
 237         .probe    = igb_probe,
 238         .remove   = igb_remove,
 239 #ifdef CONFIG_PM
 240         .driver.pm = &igb_pm_ops,
 241 #endif
 242         .shutdown = igb_shutdown,
 243         .sriov_configure = igb_pci_sriov_configure,
 244         .err_handler = &igb_err_handler
 245 };
 246
 247 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 248 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 249 MODULE_LICENSE("GPL");
 250 MODULE_VERSION(DRV_VERSION);
 251
 252 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 253 static int debug = -1;
 254 module_param(debug, int, 0);
 255 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 256
 257 struct igb_reg_info {
 258         u32 ofs;
 259         char *name;
 260 };
 261
 262 static const struct igb_reg_info igb_reg_info_tbl[] = {
 263
 264         /* General Registers */
 265         {E1000_CTRL, "CTRL"},
 266         {E1000_STATUS, "STATUS"},
 267         {E1000_CTRL_EXT, "CTRL_EXT"},
 268
 269         /* Interrupt Registers */
 270         {E1000_ICR, "ICR"},
 271
 272         /* RX Registers */
 273         {E1000_RCTL, "RCTL"},
 274         {E1000_RDLEN(0), "RDLEN"},
 275         {E1000_RDH(0), "RDH"},
 276         {E1000_RDT(0), "RDT"},
 277         {E1000_RXDCTL(0), "RXDCTL"},
 278         {E1000_RDBAL(0), "RDBAL"},
 279         {E1000_RDBAH(0), "RDBAH"},
 280
 281         /* TX Registers */
 282         {E1000_TCTL, "TCTL"},
 283         {E1000_TDBAL(0), "TDBAL"},
 284         {E1000_TDBAH(0), "TDBAH"},
 285         {E1000_TDLEN(0), "TDLEN"},
 286         {E1000_TDH(0), "TDH"},
 287         {E1000_TDT(0), "TDT"},
 288         {E1000_TXDCTL(0), "TXDCTL"},
 289         {E1000_TDFH, "TDFH"},
 290         {E1000_TDFT, "TDFT"},
 291         {E1000_TDFHS, "TDFHS"},
 292         {E1000_TDFPC, "TDFPC"},
 293
 294         /* List Terminator */
 295         {}
 296 };
 297
 298 /* igb_regdump - register printout routine */
 299 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 300 {
 301         int n = 0;
 302         char rname[16];
 303         u32 regs[8];
 304
 305         switch (reginfo->ofs) {
 306         case E1000_RDLEN(0):
 307                 for (n = 0; n < 4; n++)
 308                         regs[n] = rd32(E1000_RDLEN(n));
 309                 break;
 310         case E1000_RDH(0):
 311                 for (n = 0; n < 4; n++)
 312                         regs[n] = rd32(E1000_RDH(n));
 313                 break;
 314         case E1000_RDT(0):
 315                 for (n = 0; n < 4; n++)
 316                         regs[n] = rd32(E1000_RDT(n));
 317                 break;
 318         case E1000_RXDCTL(0):
 319                 for (n = 0; n < 4; n++)
 320                         regs[n] = rd32(E1000_RXDCTL(n));
 321                 break;
 322         case E1000_RDBAL(0):
 323                 for (n = 0; n < 4; n++)
 324                         regs[n] = rd32(E1000_RDBAL(n));
 325                 break;
 326         case E1000_RDBAH(0):
 327                 for (n = 0; n < 4; n++)
 328                         regs[n] = rd32(E1000_RDBAH(n));
 329                 break;
 330         case E1000_TDBAL(0):
 331                 for (n = 0; n < 4; n++)
 332                         regs[n] = rd32(E1000_RDBAL(n));
 333                 break;
 334         case E1000_TDBAH(0):
 335                 for (n = 0; n < 4; n++)
 336                         regs[n] = rd32(E1000_TDBAH(n));
 337                 break;
 338         case E1000_TDLEN(0):
 339                 for (n = 0; n < 4; n++)
 340                         regs[n] = rd32(E1000_TDLEN(n));
 341                 break;
 342         case E1000_TDH(0):
 343                 for (n = 0; n < 4; n++)
 344                         regs[n] = rd32(E1000_TDH(n));
 345                 break;
 346         case E1000_TDT(0):
 347                 for (n = 0; n < 4; n++)
 348                         regs[n] = rd32(E1000_TDT(n));
 349                 break;
 350         case E1000_TXDCTL(0):
 351                 for (n = 0; n < 4; n++)
 352                         regs[n] = rd32(E1000_TXDCTL(n));
 353                 break;
 354         default:
 355                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 356                 return;
 357         }
 358
 359         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 360         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 361                 regs[2], regs[3]);
 362 }
 363
 364 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 365 static void igb_dump(struct igb_adapter *adapter)
 366 {
 367         struct net_device *netdev = adapter->netdev;
 368         struct e1000_hw *hw = &adapter->hw;
 369         struct igb_reg_info *reginfo;
 370         struct igb_ring *tx_ring;
 371         union e1000_adv_tx_desc *tx_desc;
 372         struct my_u0 { u64 a; u64 b; } *u0;
 373         struct igb_ring *rx_ring;
 374         union e1000_adv_rx_desc *rx_desc;
 375         u32 staterr;
 376         u16 i, n;
 377
 378         if (!netif_msg_hw(adapter))
 379                 return;
 380
 381         /* Print netdevice Info */
 382         if (netdev) {
 383                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 384                 pr_info("Device Name     state            trans_start      last_rx\n");
 385                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 386                         netdev->state, dev_trans_start(netdev), netdev->last_rx);
 387         }
 388
 389         /* Print Registers */
 390         dev_info(&adapter->pdev->dev, "Register Dump\n");
 391         pr_info(" Register Name   Value\n");
 392         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 393              reginfo->name; reginfo++) {
 394                 igb_regdump(hw, reginfo);
 395         }
 396
 397         /* Print TX Ring Summary */
 398         if (!netdev || !netif_running(netdev))
 399                 goto exit;
 400
 401         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 402         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 403         for (n = 0; n < adapter->num_tx_queues; n++) {
 404                 struct igb_tx_buffer *buffer_info;
 405                 tx_ring = adapter->tx_ring[n];
 406                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 407                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 408                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 409                         (u64)dma_unmap_addr(buffer_info, dma),
 410                         dma_unmap_len(buffer_info, len),
 411                         buffer_info->next_to_watch,
 412                         (u64)buffer_info->time_stamp);
 413         }
 414
 415         /* Print TX Rings */
 416         if (!netif_msg_tx_done(adapter))
 417                 goto rx_ring_summary;
 418
 419         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 420
 421         /* Transmit Descriptor Formats
 422          *
 423          * Advanced Transmit Descriptor
 424          *   +--------------------------------------------------------------+
 425          * 0 |         Buffer Address [63:0]                                |
 426          *   +--------------------------------------------------------------+
 427          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 428          *   +--------------------------------------------------------------+
 429          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 430          */
 431
 432         for (n = 0; n < adapter->num_tx_queues; n++) {
 433                 tx_ring = adapter->tx_ring[n];
 434                 pr_info("------------------------------------\n");
 435                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 436                 pr_info("------------------------------------\n");
 437                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 438
 439                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 440                         const char *next_desc;
 441                         struct igb_tx_buffer *buffer_info;
 442                         tx_desc = IGB_TX_DESC(tx_ring, i);
 443                         buffer_info = &tx_ring->tx_buffer_info[i];
 444                         u0 = (struct my_u0 *)tx_desc;
 445                         if (i == tx_ring->next_to_use &&
 446                             i == tx_ring->next_to_clean)
 447                                 next_desc = " NTC/U";
 448                         else if (i == tx_ring->next_to_use)
 449                                 next_desc = " NTU";
 450                         else if (i == tx_ring->next_to_clean)
 451                                 next_desc = " NTC";
 452                         else
 453                                 next_desc = "";
 454
 455                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 456                                 i, le64_to_cpu(u0->a),
 457                                 le64_to_cpu(u0->b),
 458                                 (u64)dma_unmap_addr(buffer_info, dma),
 459                                 dma_unmap_len(buffer_info, len),
 460                                 buffer_info->next_to_watch,
 461                                 (u64)buffer_info->time_stamp,
 462                                 buffer_info->skb, next_desc);
 463
 464                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 465                                 print_hex_dump(KERN_INFO, "",
 466                                         DUMP_PREFIX_ADDRESS,
 467                                         16, 1, buffer_info->skb->data,
 468                                         dma_unmap_len(buffer_info, len),
 469                                         true);
 470                 }
 471         }
 472
 473         /* Print RX Rings Summary */
 474 rx_ring_summary:
 475         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 476         pr_info("Queue [NTU] [NTC]\n");
 477         for (n = 0; n < adapter->num_rx_queues; n++) {
 478                 rx_ring = adapter->rx_ring[n];
 479                 pr_info(" %5d %5X %5X\n",
 480                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 481         }
 482
 483         /* Print RX Rings */
 484         if (!netif_msg_rx_status(adapter))
 485                 goto exit;
 486
 487         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 488
 489         /* Advanced Receive Descriptor (Read) Format
 490          *    63                                           1        0
 491          *    +-----------------------------------------------------+
 492          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 493          *    +----------------------------------------------+------+
 494          *  8 |       Header Buffer Address [63:1]           |  DD  |
 495          *    +-----------------------------------------------------+
 496          *
 497          *
 498          * Advanced Receive Descriptor (Write-Back) Format
 499          *
 500          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 501          *   +------------------------------------------------------+
 502          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 503          *   | Checksum   Ident  |   |           |    | Type | Type |
 504          *   +------------------------------------------------------+
 505          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 506          *   +------------------------------------------------------+
 507          *   63       48 47    32 31            20 19               0
 508          */
 509
 510         for (n = 0; n < adapter->num_rx_queues; n++) {
 511                 rx_ring = adapter->rx_ring[n];
 512                 pr_info("------------------------------------\n");
 513                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 514                 pr_info("------------------------------------\n");
 515                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 516                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 517
 518                 for (i = 0; i < rx_ring->count; i++) {
 519                         const char *next_desc;
 520                         struct igb_rx_buffer *buffer_info;
 521                         buffer_info = &rx_ring->rx_buffer_info[i];
 522                         rx_desc = IGB_RX_DESC(rx_ring, i);
 523                         u0 = (struct my_u0 *)rx_desc;
 524                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 525
 526                         if (i == rx_ring->next_to_use)
 527                                 next_desc = " NTU";
 528                         else if (i == rx_ring->next_to_clean)
 529                                 next_desc = " NTC";
 530                         else
 531                                 next_desc = "";
 532
 533                         if (staterr & E1000_RXD_STAT_DD) {
 534                                 /* Descriptor Done */
 535                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 536                                         "RWB", i,
 537                                         le64_to_cpu(u0->a),
 538                                         le64_to_cpu(u0->b),
 539                                         next_desc);
 540                         } else {
 541                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 542                                         "R  ", i,
 543                                         le64_to_cpu(u0->a),
 544                                         le64_to_cpu(u0->b),
 545                                         (u64)buffer_info->dma,
 546                                         next_desc);
 547
 548                                 if (netif_msg_pktdata(adapter) &&
 549                                     buffer_info->dma && buffer_info->page) {
 550                                         print_hex_dump(KERN_INFO, "",
 551                                           DUMP_PREFIX_ADDRESS,
 552                                           16, 1,
 553                                           page_address(buffer_info->page) +
 554                                                       buffer_info->page_offset,
 555                                           IGB_RX_BUFSZ, true);
 556                                 }
 557                         }
 558                 }
 559         }
 560
 561 exit:
 562         return;
 563 }
 564
 565 /**
 566  *  igb_get_i2c_data - Reads the I2C SDA data bit
 567  *  @hw: pointer to hardware structure
 568  *  @i2cctl: Current value of I2CCTL register
 569  *
 570  *  Returns the I2C data bit value
 571  **/
 572 static int igb_get_i2c_data(void *data)
 573 {
 574         struct igb_adapter *adapter = (struct igb_adapter *)data;
 575         struct e1000_hw *hw = &adapter->hw;
 576         s32 i2cctl = rd32(E1000_I2CPARAMS);
 577
 578         return !!(i2cctl & E1000_I2C_DATA_IN);
 579 }
 580
 581 /**
 582  *  igb_set_i2c_data - Sets the I2C data bit
 583  *  @data: pointer to hardware structure
 584  *  @state: I2C data value (0 or 1) to set
 585  *
 586  *  Sets the I2C data bit
 587  **/
 588 static void igb_set_i2c_data(void *data, int state)
 589 {
 590         struct igb_adapter *adapter = (struct igb_adapter *)data;
 591         struct e1000_hw *hw = &adapter->hw;
 592         s32 i2cctl = rd32(E1000_I2CPARAMS);
 593
 594         if (state)
 595                 i2cctl |= E1000_I2C_DATA_OUT;
 596         else
 597                 i2cctl &= ~E1000_I2C_DATA_OUT;
 598
 599         i2cctl &= ~E1000_I2C_DATA_OE_N;
 600         i2cctl |= E1000_I2C_CLK_OE_N;
 601         wr32(E1000_I2CPARAMS, i2cctl);
 602         wrfl();
 603
 604 }
 605
 606 /**
 607  *  igb_set_i2c_clk - Sets the I2C SCL clock
 608  *  @data: pointer to hardware structure
 609  *  @state: state to set clock
 610  *
 611  *  Sets the I2C clock line to state
 612  **/
 613 static void igb_set_i2c_clk(void *data, int state)
 614 {
 615         struct igb_adapter *adapter = (struct igb_adapter *)data;
 616         struct e1000_hw *hw = &adapter->hw;
 617         s32 i2cctl = rd32(E1000_I2CPARAMS);
 618
 619         if (state) {
 620                 i2cctl |= E1000_I2C_CLK_OUT;
 621                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 622         } else {
 623                 i2cctl &= ~E1000_I2C_CLK_OUT;
 624                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 625         }
 626         wr32(E1000_I2CPARAMS, i2cctl);
 627         wrfl();
 628 }
 629
 630 /**
 631  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 632  *  @data: pointer to hardware structure
 633  *
 634  *  Gets the I2C clock state
 635  **/
 636 static int igb_get_i2c_clk(void *data)
 637 {
 638         struct igb_adapter *adapter = (struct igb_adapter *)data;
 639         struct e1000_hw *hw = &adapter->hw;
 640         s32 i2cctl = rd32(E1000_I2CPARAMS);
 641
 642         return !!(i2cctl & E1000_I2C_CLK_IN);
 643 }
 644
 645 static const struct i2c_algo_bit_data igb_i2c_algo = {
 646         .setsda         = igb_set_i2c_data,
 647         .setscl         = igb_set_i2c_clk,
 648         .getsda         = igb_get_i2c_data,
 649         .getscl         = igb_get_i2c_clk,
 650         .udelay         = 5,
 651         .timeout        = 20,
 652 };
 653
 654 /**
 655  *  igb_get_hw_dev - return device
 656  *  @hw: pointer to hardware structure
 657  *
 658  *  used by hardware layer to print debugging information
 659  **/
 660 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 661 {
 662         struct igb_adapter *adapter = hw->back;
 663         return adapter->netdev;
 664 }
 665
 666 /**
 667  *  igb_init_module - Driver Registration Routine
 668  *
 669  *  igb_init_module is the first routine called when the driver is
 670  *  loaded. All it does is register with the PCI subsystem.
 671  **/
 672 static int __init igb_init_module(void)
 673 {
 674         int ret;
 675
 676         pr_info("%s - version %s\n",
 677                igb_driver_string, igb_driver_version);
 678         pr_info("%s\n", igb_copyright);
 679
 680 #ifdef CONFIG_IGB_DCA
 681         dca_register_notify(&dca_notifier);
 682 #endif
 683         ret = pci_register_driver(&igb_driver);
 684         return ret;
 685 }
 686
 687 module_init(igb_init_module);
 688
 689 /**
 690  *  igb_exit_module - Driver Exit Cleanup Routine
 691  *
 692  *  igb_exit_module is called just before the driver is removed
 693  *  from memory.
 694  **/
 695 static void __exit igb_exit_module(void)
 696 {
 697 #ifdef CONFIG_IGB_DCA
 698         dca_unregister_notify(&dca_notifier);
 699 #endif
 700         pci_unregister_driver(&igb_driver);
 701 }
 702
 703 module_exit(igb_exit_module);
 704
 705 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 706 /**
 707  *  igb_cache_ring_register - Descriptor ring to register mapping
 708  *  @adapter: board private structure to initialize
 709  *
 710  *  Once we know the feature-set enabled for the device, we'll cache
 711  *  the register offset the descriptor ring is assigned to.
 712  **/
 713 static void igb_cache_ring_register(struct igb_adapter *adapter)
 714 {
 715         int i = 0, j = 0;
 716         u32 rbase_offset = adapter->vfs_allocated_count;
 717
 718         switch (adapter->hw.mac.type) {
 719         case e1000_82576:
 720                 /* The queues are allocated for virtualization such that VF 0
 721                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 722                  * In order to avoid collision we start at the first free queue
 723                  * and continue consuming queues in the same sequence
 724                  */
 725                 if (adapter->vfs_allocated_count) {
 726                         for (; i < adapter->rss_queues; i++)
 727                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 728                                                                Q_IDX_82576(i);
 729                 }
 730                 /* Fall through */
 731         case e1000_82575:
 732         case e1000_82580:
 733         case e1000_i350:
 734         case e1000_i354:
 735         case e1000_i210:
 736         case e1000_i211:
 737                 /* Fall through */
 738         default:
 739                 for (; i < adapter->num_rx_queues; i++)
 740                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 741                 for (; j < adapter->num_tx_queues; j++)
 742                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 743                 break;
 744         }
 745 }
 746
 747 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 748 {
 749         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 750         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 751         u32 value = 0;
 752
 753         if (E1000_REMOVED(hw_addr))
 754                 return ~value;
 755
 756         value = readl(&hw_addr[reg]);
 757
 758         /* reads should not return all F's */
 759         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 760                 struct net_device *netdev = igb->netdev;
 761                 hw->hw_addr = NULL;
 762                 netif_device_detach(netdev);
 763                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 764         }
 765
 766         return value;
 767 }
 768
 769 /**
 770  *  igb_write_ivar - configure ivar for given MSI-X vector
 771  *  @hw: pointer to the HW structure
 772  *  @msix_vector: vector number we are allocating to a given ring
 773  *  @index: row index of IVAR register to write within IVAR table
 774  *  @offset: column offset of in IVAR, should be multiple of 8
 775  *
 776  *  This function is intended to handle the writing of the IVAR register
 777  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 778  *  each containing an cause allocation for an Rx and Tx ring, and a
 779  *  variable number of rows depending on the number of queues supported.
 780  **/
 781 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 782                            int index, int offset)
 783 {
 784         u32 ivar = array_rd32(E1000_IVAR0, index);
 785
 786         /* clear any bits that are currently set */
 787         ivar &= ~((u32)0xFF << offset);
 788
 789         /* write vector and valid bit */
 790         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 791
 792         array_wr32(E1000_IVAR0, index, ivar);
 793 }
 794
 795 #define IGB_N0_QUEUE -1
 796 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 797 {
 798         struct igb_adapter *adapter = q_vector->adapter;
 799         struct e1000_hw *hw = &adapter->hw;
 800         int rx_queue = IGB_N0_QUEUE;
 801         int tx_queue = IGB_N0_QUEUE;
 802         u32 msixbm = 0;
 803
 804         if (q_vector->rx.ring)
 805                 rx_queue = q_vector->rx.ring->reg_idx;
 806         if (q_vector->tx.ring)
 807                 tx_queue = q_vector->tx.ring->reg_idx;
 808
 809         switch (hw->mac.type) {
 810         case e1000_82575:
 811                 /* The 82575 assigns vectors using a bitmask, which matches the
 812                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 813                  * or more queues to a vector, we write the appropriate bits
 814                  * into the MSIXBM register for that vector.
 815                  */
 816                 if (rx_queue > IGB_N0_QUEUE)
 817                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 818                 if (tx_queue > IGB_N0_QUEUE)
 819                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 820                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 821                         msixbm |= E1000_EIMS_OTHER;
 822                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 823                 q_vector->eims_value = msixbm;
 824                 break;
 825         case e1000_82576:
 826                 /* 82576 uses a table that essentially consists of 2 columns
 827                  * with 8 rows.  The ordering is column-major so we use the
 828                  * lower 3 bits as the row index, and the 4th bit as the
 829                  * column offset.
 830                  */
 831                 if (rx_queue > IGB_N0_QUEUE)
 832                         igb_write_ivar(hw, msix_vector,
 833                                        rx_queue & 0x7,
 834                                        (rx_queue & 0x8) << 1);
 835                 if (tx_queue > IGB_N0_QUEUE)
 836                         igb_write_ivar(hw, msix_vector,
 837                                        tx_queue & 0x7,
 838                                        ((tx_queue & 0x8) << 1) + 8);
 839                 q_vector->eims_value = BIT(msix_vector);
 840                 break;
 841         case e1000_82580:
 842         case e1000_i350:
 843         case e1000_i354:
 844         case e1000_i210:
 845         case e1000_i211:
 846                 /* On 82580 and newer adapters the scheme is similar to 82576
 847                  * however instead of ordering column-major we have things
 848                  * ordered row-major.  So we traverse the table by using
 849                  * bit 0 as the column offset, and the remaining bits as the
 850                  * row index.
 851                  */
 852                 if (rx_queue > IGB_N0_QUEUE)
 853                         igb_write_ivar(hw, msix_vector,
 854                                        rx_queue >> 1,
 855                                        (rx_queue & 0x1) << 4);
 856                 if (tx_queue > IGB_N0_QUEUE)
 857                         igb_write_ivar(hw, msix_vector,
 858                                        tx_queue >> 1,
 859                                        ((tx_queue & 0x1) << 4) + 8);
 860                 q_vector->eims_value = BIT(msix_vector);
 861                 break;
 862         default:
 863                 BUG();
 864                 break;
 865         }
 866
 867         /* add q_vector eims value to global eims_enable_mask */
 868         adapter->eims_enable_mask |= q_vector->eims_value;
 869
 870         /* configure q_vector to set itr on first interrupt */
 871         q_vector->set_itr = 1;
 872 }
 873
 874 /**
 875  *  igb_configure_msix - Configure MSI-X hardware
 876  *  @adapter: board private structure to initialize
 877  *
 878  *  igb_configure_msix sets up the hardware to properly
 879  *  generate MSI-X interrupts.
 880  **/
 881 static void igb_configure_msix(struct igb_adapter *adapter)
 882 {
 883         u32 tmp;
 884         int i, vector = 0;
 885         struct e1000_hw *hw = &adapter->hw;
 886
 887         adapter->eims_enable_mask = 0;
 888
 889         /* set vector for other causes, i.e. link changes */
 890         switch (hw->mac.type) {
 891         case e1000_82575:
 892                 tmp = rd32(E1000_CTRL_EXT);
 893                 /* enable MSI-X PBA support*/
 894                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 895
 896                 /* Auto-Mask interrupts upon ICR read. */
 897                 tmp |= E1000_CTRL_EXT_EIAME;
 898                 tmp |= E1000_CTRL_EXT_IRCA;
 899
 900                 wr32(E1000_CTRL_EXT, tmp);
 901
 902                 /* enable msix_other interrupt */
 903                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 904                 adapter->eims_other = E1000_EIMS_OTHER;
 905
 906                 break;
 907
 908         case e1000_82576:
 909         case e1000_82580:
 910         case e1000_i350:
 911         case e1000_i354:
 912         case e1000_i210:
 913         case e1000_i211:
 914                 /* Turn on MSI-X capability first, or our settings
 915                  * won't stick.  And it will take days to debug.
 916                  */
 917                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 918                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 919                      E1000_GPIE_NSICR);
 920
 921                 /* enable msix_other interrupt */
 922                 adapter->eims_other = BIT(vector);
 923                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 924
 925                 wr32(E1000_IVAR_MISC, tmp);
 926                 break;
 927         default:
 928                 /* do nothing, since nothing else supports MSI-X */
 929                 break;
 930         } /* switch (hw->mac.type) */
 931
 932         adapter->eims_enable_mask |= adapter->eims_other;
 933
 934         for (i = 0; i < adapter->num_q_vectors; i++)
 935                 igb_assign_vector(adapter->q_vector[i], vector++);
 936
 937         wrfl();
 938 }
 939
 940 /**
 941  *  igb_request_msix - Initialize MSI-X interrupts
 942  *  @adapter: board private structure to initialize
 943  *
 944  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 945  *  kernel.
 946  **/
 947 static int igb_request_msix(struct igb_adapter *adapter)
 948 {
 949         struct net_device *netdev = adapter->netdev;
 950         int i, err = 0, vector = 0, free_vector = 0;
 951
 952         err = request_irq(adapter->msix_entries[vector].vector,
 953                           igb_msix_other, 0, netdev->name, adapter);
 954         if (err)
 955                 goto err_out;
 956
 957         for (i = 0; i < adapter->num_q_vectors; i++) {
 958                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 959
 960                 vector++;
 961
 962                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 963
 964                 if (q_vector->rx.ring && q_vector->tx.ring)
 965                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 966                                 q_vector->rx.ring->queue_index);
 967                 else if (q_vector->tx.ring)
 968                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 969                                 q_vector->tx.ring->queue_index);
 970                 else if (q_vector->rx.ring)
 971                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 972                                 q_vector->rx.ring->queue_index);
 973                 else
 974                         sprintf(q_vector->name, "%s-unused", netdev->name);
 975
 976                 err = request_irq(adapter->msix_entries[vector].vector,
 977                                   igb_msix_ring, 0, q_vector->name,
 978                                   q_vector);
 979                 if (err)
 980                         goto err_free;
 981         }
 982
 983         igb_configure_msix(adapter);
 984         return 0;
 985
 986 err_free:
 987         /* free already assigned IRQs */
 988         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 989
 990         vector--;
 991         for (i = 0; i < vector; i++) {
 992                 free_irq(adapter->msix_entries[free_vector++].vector,
 993                          adapter->q_vector[i]);
 994         }
 995 err_out:
 996         return err;
 997 }
 998
 999 /**
1000  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1001  *  @adapter: board private structure to initialize
1002  *  @v_idx: Index of vector to be freed
1003  *
1004  *  This function frees the memory allocated to the q_vector.
1005  **/
1006 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1007 {
1008         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1009
1010         adapter->q_vector[v_idx] = NULL;
1011
1012         /* igb_get_stats64() might access the rings on this vector,
1013          * we must wait a grace period before freeing it.
1014          */
1015         if (q_vector)
1016                 kfree_rcu(q_vector, rcu);
1017 }
1018
1019 /**
1020  *  igb_reset_q_vector - Reset config for interrupt vector
1021  *  @adapter: board private structure to initialize
1022  *  @v_idx: Index of vector to be reset
1023  *
1024  *  If NAPI is enabled it will delete any references to the
1025  *  NAPI struct. This is preparation for igb_free_q_vector.
1026  **/
1027 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1028 {
1029         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1030
1031         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1032          * allocated. So, q_vector is NULL so we should stop here.
1033          */
1034         if (!q_vector)
1035                 return;
1036
1037         if (q_vector->tx.ring)
1038                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1039
1040         if (q_vector->rx.ring)
1041                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1042
1043         netif_napi_del(&q_vector->napi);
1044
1045 }
1046
1047 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1048 {
1049         int v_idx = adapter->num_q_vectors;
1050
1051         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1052                 pci_disable_msix(adapter->pdev);
1053         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1054                 pci_disable_msi(adapter->pdev);
1055
1056         while (v_idx--)
1057                 igb_reset_q_vector(adapter, v_idx);
1058 }
1059
1060 /**
1061  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1062  *  @adapter: board private structure to initialize
1063  *
1064  *  This function frees the memory allocated to the q_vectors.  In addition if
1065  *  NAPI is enabled it will delete any references to the NAPI struct prior
1066  *  to freeing the q_vector.
1067  **/
1068 static void igb_free_q_vectors(struct igb_adapter *adapter)
1069 {
1070         int v_idx = adapter->num_q_vectors;
1071
1072         adapter->num_tx_queues = 0;
1073         adapter->num_rx_queues = 0;
1074         adapter->num_q_vectors = 0;
1075
1076         while (v_idx--) {
1077                 igb_reset_q_vector(adapter, v_idx);
1078                 igb_free_q_vector(adapter, v_idx);
1079         }
1080 }
1081
1082 /**
1083  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1084  *  @adapter: board private structure to initialize
1085  *
1086  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1087  *  MSI-X interrupts allocated.
1088  */
1089 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1090 {
1091         igb_free_q_vectors(adapter);
1092         igb_reset_interrupt_capability(adapter);
1093 }
1094
1095 /**
1096  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1097  *  @adapter: board private structure to initialize
1098  *  @msix: boolean value of MSIX capability
1099  *
1100  *  Attempt to configure interrupts using the best available
1101  *  capabilities of the hardware and kernel.
1102  **/
1103 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1104 {
1105         int err;
1106         int numvecs, i;
1107
1108         if (!msix)
1109                 goto msi_only;
1110         adapter->flags |= IGB_FLAG_HAS_MSIX;
1111
1112         /* Number of supported queues. */
1113         adapter->num_rx_queues = adapter->rss_queues;
1114         if (adapter->vfs_allocated_count)
1115                 adapter->num_tx_queues = 1;
1116         else
1117                 adapter->num_tx_queues = adapter->rss_queues;
1118
1119         /* start with one vector for every Rx queue */
1120         numvecs = adapter->num_rx_queues;
1121
1122         /* if Tx handler is separate add 1 for every Tx queue */
1123         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1124                 numvecs += adapter->num_tx_queues;
1125
1126         /* store the number of vectors reserved for queues */
1127         adapter->num_q_vectors = numvecs;
1128
1129         /* add 1 vector for link status interrupts */
1130         numvecs++;
1131         for (i = 0; i < numvecs; i++)
1132                 adapter->msix_entries[i].entry = i;
1133
1134         err = pci_enable_msix_range(adapter->pdev,
1135                                     adapter->msix_entries,
1136                                     numvecs,
1137                                     numvecs);
1138         if (err > 0)
1139                 return;
1140
1141         igb_reset_interrupt_capability(adapter);
1142
1143         /* If we can't do MSI-X, try MSI */
1144 msi_only:
1145         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1146 #ifdef CONFIG_PCI_IOV
1147         /* disable SR-IOV for non MSI-X configurations */
1148         if (adapter->vf_data) {
1149                 struct e1000_hw *hw = &adapter->hw;
1150                 /* disable iov and allow time for transactions to clear */
1151                 pci_disable_sriov(adapter->pdev);
1152                 msleep(500);
1153
1154                 kfree(adapter->vf_data);
1155                 adapter->vf_data = NULL;
1156                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1157                 wrfl();
1158                 msleep(100);
1159                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1160         }
1161 #endif
1162         adapter->vfs_allocated_count = 0;
1163         adapter->rss_queues = 1;
1164         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1165         adapter->num_rx_queues = 1;
1166         adapter->num_tx_queues = 1;
1167         adapter->num_q_vectors = 1;
1168         if (!pci_enable_msi(adapter->pdev))
1169                 adapter->flags |= IGB_FLAG_HAS_MSI;
1170 }
1171
1172 static void igb_add_ring(struct igb_ring *ring,
1173                          struct igb_ring_container *head)
1174 {
1175         head->ring = ring;
1176         head->count++;
1177 }
1178
1179 /**
1180  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1181  *  @adapter: board private structure to initialize
1182  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1183  *  @v_idx: index of vector in adapter struct
1184  *  @txr_count: total number of Tx rings to allocate
1185  *  @txr_idx: index of first Tx ring to allocate
1186  *  @rxr_count: total number of Rx rings to allocate
1187  *  @rxr_idx: index of first Rx ring to allocate
1188  *
1189  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1190  **/
1191 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1192                               int v_count, int v_idx,
1193                               int txr_count, int txr_idx,
1194                               int rxr_count, int rxr_idx)
1195 {
1196         struct igb_q_vector *q_vector;
1197         struct igb_ring *ring;
1198         int ring_count, size;
1199
1200         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1201         if (txr_count > 1 || rxr_count > 1)
1202                 return -ENOMEM;
1203
1204         ring_count = txr_count + rxr_count;
1205         size = sizeof(struct igb_q_vector) +
1206                (sizeof(struct igb_ring) * ring_count);
1207
1208         /* allocate q_vector and rings */
1209         q_vector = adapter->q_vector[v_idx];
1210         if (!q_vector) {
1211                 q_vector = kzalloc(size, GFP_KERNEL);
1212         } else if (size > ksize(q_vector)) {
1213                 kfree_rcu(q_vector, rcu);
1214                 q_vector = kzalloc(size, GFP_KERNEL);
1215         } else {
1216                 memset(q_vector, 0, size);
1217         }
1218         if (!q_vector)
1219                 return -ENOMEM;
1220
1221         /* initialize NAPI */
1222         netif_napi_add(adapter->netdev, &q_vector->napi,
1223                        igb_poll, 64);
1224
1225         /* tie q_vector and adapter together */
1226         adapter->q_vector[v_idx] = q_vector;
1227         q_vector->adapter = adapter;
1228
1229         /* initialize work limits */
1230         q_vector->tx.work_limit = adapter->tx_work_limit;
1231
1232         /* initialize ITR configuration */
1233         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1234         q_vector->itr_val = IGB_START_ITR;
1235
1236         /* initialize pointer to rings */
1237         ring = q_vector->ring;
1238
1239         /* intialize ITR */
1240         if (rxr_count) {
1241                 /* rx or rx/tx vector */
1242                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1243                         q_vector->itr_val = adapter->rx_itr_setting;
1244         } else {
1245                 /* tx only vector */
1246                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1247                         q_vector->itr_val = adapter->tx_itr_setting;
1248         }
1249
1250         if (txr_count) {
1251                 /* assign generic ring traits */
1252                 ring->dev = &adapter->pdev->dev;
1253                 ring->netdev = adapter->netdev;
1254
1255                 /* configure backlink on ring */
1256                 ring->q_vector = q_vector;
1257
1258                 /* update q_vector Tx values */
1259                 igb_add_ring(ring, &q_vector->tx);
1260
1261                 /* For 82575, context index must be unique per ring. */
1262                 if (adapter->hw.mac.type == e1000_82575)
1263                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1264
1265                 /* apply Tx specific ring traits */
1266                 ring->count = adapter->tx_ring_count;
1267                 ring->queue_index = txr_idx;
1268
1269                 u64_stats_init(&ring->tx_syncp);
1270                 u64_stats_init(&ring->tx_syncp2);
1271
1272                 /* assign ring to adapter */
1273                 adapter->tx_ring[txr_idx] = ring;
1274
1275                 /* push pointer to next ring */
1276                 ring++;
1277         }
1278
1279         if (rxr_count) {
1280                 /* assign generic ring traits */
1281                 ring->dev = &adapter->pdev->dev;
1282                 ring->netdev = adapter->netdev;
1283
1284                 /* configure backlink on ring */
1285                 ring->q_vector = q_vector;
1286
1287                 /* update q_vector Rx values */
1288                 igb_add_ring(ring, &q_vector->rx);
1289
1290                 /* set flag indicating ring supports SCTP checksum offload */
1291                 if (adapter->hw.mac.type >= e1000_82576)
1292                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1293
1294                 /* On i350, i354, i210, and i211, loopback VLAN packets
1295                  * have the tag byte-swapped.
1296                  */
1297                 if (adapter->hw.mac.type >= e1000_i350)
1298                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1299
1300                 /* apply Rx specific ring traits */
1301                 ring->count = adapter->rx_ring_count;
1302                 ring->queue_index = rxr_idx;
1303
1304                 u64_stats_init(&ring->rx_syncp);
1305
1306                 /* assign ring to adapter */
1307                 adapter->rx_ring[rxr_idx] = ring;
1308         }
1309
1310         return 0;
1311 }
1312
1313
1314 /**
1315  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1316  *  @adapter: board private structure to initialize
1317  *
1318  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1319  *  return -ENOMEM.
1320  **/
1321 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1322 {
1323         int q_vectors = adapter->num_q_vectors;
1324         int rxr_remaining = adapter->num_rx_queues;
1325         int txr_remaining = adapter->num_tx_queues;
1326         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1327         int err;
1328
1329         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1330                 for (; rxr_remaining; v_idx++) {
1331                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1332                                                  0, 0, 1, rxr_idx);
1333
1334                         if (err)
1335                                 goto err_out;
1336
1337                         /* update counts and index */
1338                         rxr_remaining--;
1339                         rxr_idx++;
1340                 }
1341         }
1342
1343         for (; v_idx < q_vectors; v_idx++) {
1344                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1345                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1346
1347                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1348                                          tqpv, txr_idx, rqpv, rxr_idx);
1349
1350                 if (err)
1351                         goto err_out;
1352
1353                 /* update counts and index */
1354                 rxr_remaining -= rqpv;
1355                 txr_remaining -= tqpv;
1356                 rxr_idx++;
1357                 txr_idx++;
1358         }
1359
1360         return 0;
1361
1362 err_out:
1363         adapter->num_tx_queues = 0;
1364         adapter->num_rx_queues = 0;
1365         adapter->num_q_vectors = 0;
1366
1367         while (v_idx--)
1368                 igb_free_q_vector(adapter, v_idx);
1369
1370         return -ENOMEM;
1371 }
1372
1373 /**
1374  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1375  *  @adapter: board private structure to initialize
1376  *  @msix: boolean value of MSIX capability
1377  *
1378  *  This function initializes the interrupts and allocates all of the queues.
1379  **/
1380 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1381 {
1382         struct pci_dev *pdev = adapter->pdev;
1383         int err;
1384
1385         igb_set_interrupt_capability(adapter, msix);
1386
1387         err = igb_alloc_q_vectors(adapter);
1388         if (err) {
1389                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1390                 goto err_alloc_q_vectors;
1391         }
1392
1393         igb_cache_ring_register(adapter);
1394
1395         return 0;
1396
1397 err_alloc_q_vectors:
1398         igb_reset_interrupt_capability(adapter);
1399         return err;
1400 }
1401
1402 /**
1403  *  igb_request_irq - initialize interrupts
1404  *  @adapter: board private structure to initialize
1405  *
1406  *  Attempts to configure interrupts using the best available
1407  *  capabilities of the hardware and kernel.
1408  **/
1409 static int igb_request_irq(struct igb_adapter *adapter)
1410 {
1411         struct net_device *netdev = adapter->netdev;
1412         struct pci_dev *pdev = adapter->pdev;
1413         int err = 0;
1414
1415         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1416                 err = igb_request_msix(adapter);
1417                 if (!err)
1418                         goto request_done;
1419                 /* fall back to MSI */
1420                 igb_free_all_tx_resources(adapter);
1421                 igb_free_all_rx_resources(adapter);
1422
1423                 igb_clear_interrupt_scheme(adapter);
1424                 err = igb_init_interrupt_scheme(adapter, false);
1425                 if (err)
1426                         goto request_done;
1427
1428                 igb_setup_all_tx_resources(adapter);
1429                 igb_setup_all_rx_resources(adapter);
1430                 igb_configure(adapter);
1431         }
1432
1433         igb_assign_vector(adapter->q_vector[0], 0);
1434
1435         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1436                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1437                                   netdev->name, adapter);
1438                 if (!err)
1439                         goto request_done;
1440
1441                 /* fall back to legacy interrupts */
1442                 igb_reset_interrupt_capability(adapter);
1443                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1444         }
1445
1446         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1447                           netdev->name, adapter);
1448
1449         if (err)
1450                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1451                         err);
1452
1453 request_done:
1454         return err;
1455 }
1456
1457 static void igb_free_irq(struct igb_adapter *adapter)
1458 {
1459         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1460                 int vector = 0, i;
1461
1462                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1463
1464                 for (i = 0; i < adapter->num_q_vectors; i++)
1465                         free_irq(adapter->msix_entries[vector++].vector,
1466                                  adapter->q_vector[i]);
1467         } else {
1468                 free_irq(adapter->pdev->irq, adapter);
1469         }
1470 }
1471
1472 /**
1473  *  igb_irq_disable - Mask off interrupt generation on the NIC
1474  *  @adapter: board private structure
1475  **/
1476 static void igb_irq_disable(struct igb_adapter *adapter)
1477 {
1478         struct e1000_hw *hw = &adapter->hw;
1479
1480         /* we need to be careful when disabling interrupts.  The VFs are also
1481          * mapped into these registers and so clearing the bits can cause
1482          * issues on the VF drivers so we only need to clear what we set
1483          */
1484         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1485                 u32 regval = rd32(E1000_EIAM);
1486
1487                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1488                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1489                 regval = rd32(E1000_EIAC);
1490                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1491         }
1492
1493         wr32(E1000_IAM, 0);
1494         wr32(E1000_IMC, ~0);
1495         wrfl();
1496         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1497                 int i;
1498
1499                 for (i = 0; i < adapter->num_q_vectors; i++)
1500                         synchronize_irq(adapter->msix_entries[i].vector);
1501         } else {
1502                 synchronize_irq(adapter->pdev->irq);
1503         }
1504 }
1505
1506 /**
1507  *  igb_irq_enable - Enable default interrupt generation settings
1508  *  @adapter: board private structure
1509  **/
1510 static void igb_irq_enable(struct igb_adapter *adapter)
1511 {
1512         struct e1000_hw *hw = &adapter->hw;
1513
1514         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1515                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1516                 u32 regval = rd32(E1000_EIAC);
1517
1518                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1519                 regval = rd32(E1000_EIAM);
1520                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1521                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1522                 if (adapter->vfs_allocated_count) {
1523                         wr32(E1000_MBVFIMR, 0xFF);
1524                         ims |= E1000_IMS_VMMB;
1525                 }
1526                 wr32(E1000_IMS, ims);
1527         } else {
1528                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1529                                 E1000_IMS_DRSTA);
1530                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1531                                 E1000_IMS_DRSTA);
1532         }
1533 }
1534
1535 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1536 {
1537         struct e1000_hw *hw = &adapter->hw;
1538         u16 pf_id = adapter->vfs_allocated_count;
1539         u16 vid = adapter->hw.mng_cookie.vlan_id;
1540         u16 old_vid = adapter->mng_vlan_id;
1541
1542         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1543                 /* add VID to filter table */
1544                 igb_vfta_set(hw, vid, pf_id, true, true);
1545                 adapter->mng_vlan_id = vid;
1546         } else {
1547                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1548         }
1549
1550         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1551             (vid != old_vid) &&
1552             !test_bit(old_vid, adapter->active_vlans)) {
1553                 /* remove VID from filter table */
1554                 igb_vfta_set(hw, vid, pf_id, false, true);
1555         }
1556 }
1557
1558 /**
1559  *  igb_release_hw_control - release control of the h/w to f/w
1560  *  @adapter: address of board private structure
1561  *
1562  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1563  *  For ASF and Pass Through versions of f/w this means that the
1564  *  driver is no longer loaded.
1565  **/
1566 static void igb_release_hw_control(struct igb_adapter *adapter)
1567 {
1568         struct e1000_hw *hw = &adapter->hw;
1569         u32 ctrl_ext;
1570
1571         /* Let firmware take over control of h/w */
1572         ctrl_ext = rd32(E1000_CTRL_EXT);
1573         wr32(E1000_CTRL_EXT,
1574                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1575 }
1576
1577 /**
1578  *  igb_get_hw_control - get control of the h/w from f/w
1579  *  @adapter: address of board private structure
1580  *
1581  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1582  *  For ASF and Pass Through versions of f/w this means that
1583  *  the driver is loaded.
1584  **/
1585 static void igb_get_hw_control(struct igb_adapter *adapter)
1586 {
1587         struct e1000_hw *hw = &adapter->hw;
1588         u32 ctrl_ext;
1589
1590         /* Let firmware know the driver has taken over */
1591         ctrl_ext = rd32(E1000_CTRL_EXT);
1592         wr32(E1000_CTRL_EXT,
1593                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1594 }
1595
1596 /**
1597  *  igb_configure - configure the hardware for RX and TX
1598  *  @adapter: private board structure
1599  **/
1600 static void igb_configure(struct igb_adapter *adapter)
1601 {
1602         struct net_device *netdev = adapter->netdev;
1603         int i;
1604
1605         igb_get_hw_control(adapter);
1606         igb_set_rx_mode(netdev);
1607
1608         igb_restore_vlan(adapter);
1609
1610         igb_setup_tctl(adapter);
1611         igb_setup_mrqc(adapter);
1612         igb_setup_rctl(adapter);
1613
1614         igb_configure_tx(adapter);
1615         igb_configure_rx(adapter);
1616
1617         igb_rx_fifo_flush_82575(&adapter->hw);
1618
1619         /* call igb_desc_unused which always leaves
1620          * at least 1 descriptor unused to make sure
1621          * next_to_use != next_to_clean
1622          */
1623         for (i = 0; i < adapter->num_rx_queues; i++) {
1624                 struct igb_ring *ring = adapter->rx_ring[i];
1625                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1626         }
1627 }
1628
1629 /**
1630  *  igb_power_up_link - Power up the phy/serdes link
1631  *  @adapter: address of board private structure
1632  **/
1633 void igb_power_up_link(struct igb_adapter *adapter)
1634 {
1635         igb_reset_phy(&adapter->hw);
1636
1637         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1638                 igb_power_up_phy_copper(&adapter->hw);
1639         else
1640                 igb_power_up_serdes_link_82575(&adapter->hw);
1641
1642         igb_setup_link(&adapter->hw);
1643 }
1644
1645 /**
1646  *  igb_power_down_link - Power down the phy/serdes link
1647  *  @adapter: address of board private structure
1648  */
1649 static void igb_power_down_link(struct igb_adapter *adapter)
1650 {
1651         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1652                 igb_power_down_phy_copper_82575(&adapter->hw);
1653         else
1654                 igb_shutdown_serdes_link_82575(&adapter->hw);
1655 }
1656
1657 /**
1658  * Detect and switch function for Media Auto Sense
1659  * @adapter: address of the board private structure
1660  **/
1661 static void igb_check_swap_media(struct igb_adapter *adapter)
1662 {
1663         struct e1000_hw *hw = &adapter->hw;
1664         u32 ctrl_ext, connsw;
1665         bool swap_now = false;
1666
1667         ctrl_ext = rd32(E1000_CTRL_EXT);
1668         connsw = rd32(E1000_CONNSW);
1669
1670         /* need to live swap if current media is copper and we have fiber/serdes
1671          * to go to.
1672          */
1673
1674         if ((hw->phy.media_type == e1000_media_type_copper) &&
1675             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1676                 swap_now = true;
1677         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1678                 /* copper signal takes time to appear */
1679                 if (adapter->copper_tries < 4) {
1680                         adapter->copper_tries++;
1681                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1682                         wr32(E1000_CONNSW, connsw);
1683                         return;
1684                 } else {
1685                         adapter->copper_tries = 0;
1686                         if ((connsw & E1000_CONNSW_PHYSD) &&
1687                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1688                                 swap_now = true;
1689                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1690                                 wr32(E1000_CONNSW, connsw);
1691                         }
1692                 }
1693         }
1694
1695         if (!swap_now)
1696                 return;
1697
1698         switch (hw->phy.media_type) {
1699         case e1000_media_type_copper:
1700                 netdev_info(adapter->netdev,
1701                         "MAS: changing media to fiber/serdes\n");
1702                 ctrl_ext |=
1703                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1704                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1705                 adapter->copper_tries = 0;
1706                 break;
1707         case e1000_media_type_internal_serdes:
1708         case e1000_media_type_fiber:
1709                 netdev_info(adapter->netdev,
1710                         "MAS: changing media to copper\n");
1711                 ctrl_ext &=
1712                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1713                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1714                 break;
1715         default:
1716                 /* shouldn't get here during regular operation */
1717                 netdev_err(adapter->netdev,
1718                         "AMS: Invalid media type found, returning\n");
1719                 break;
1720         }
1721         wr32(E1000_CTRL_EXT, ctrl_ext);
1722 }
1723
1724 /**
1725  *  igb_up - Open the interface and prepare it to handle traffic
1726  *  @adapter: board private structure
1727  **/
1728 int igb_up(struct igb_adapter *adapter)
1729 {
1730         struct e1000_hw *hw = &adapter->hw;
1731         int i;
1732
1733         /* hardware has been reset, we need to reload some things */
1734         igb_configure(adapter);
1735
1736         clear_bit(__IGB_DOWN, &adapter->state);
1737
1738         for (i = 0; i < adapter->num_q_vectors; i++)
1739                 napi_enable(&(adapter->q_vector[i]->napi));
1740
1741         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1742                 igb_configure_msix(adapter);
1743         else
1744                 igb_assign_vector(adapter->q_vector[0], 0);
1745
1746         /* Clear any pending interrupts. */
1747         rd32(E1000_ICR);
1748         igb_irq_enable(adapter);
1749
1750         /* notify VFs that reset has been completed */
1751         if (adapter->vfs_allocated_count) {
1752                 u32 reg_data = rd32(E1000_CTRL_EXT);
1753
1754                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1755                 wr32(E1000_CTRL_EXT, reg_data);
1756         }
1757
1758         netif_tx_start_all_queues(adapter->netdev);
1759
1760         /* start the watchdog. */
1761         hw->mac.get_link_status = 1;
1762         schedule_work(&adapter->watchdog_task);
1763
1764         if ((adapter->flags & IGB_FLAG_EEE) &&
1765             (!hw->dev_spec._82575.eee_disable))
1766                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1767
1768         return 0;
1769 }
1770
1771 void igb_down(struct igb_adapter *adapter)
1772 {
1773         struct net_device *netdev = adapter->netdev;
1774         struct e1000_hw *hw = &adapter->hw;
1775         u32 tctl, rctl;
1776         int i;
1777
1778         /* signal that we're down so the interrupt handler does not
1779          * reschedule our watchdog timer
1780          */
1781         set_bit(__IGB_DOWN, &adapter->state);
1782
1783         /* disable receives in the hardware */
1784         rctl = rd32(E1000_RCTL);
1785         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1786         /* flush and sleep below */
1787
1788         netif_carrier_off(netdev);
1789         netif_tx_stop_all_queues(netdev);
1790
1791         /* disable transmits in the hardware */
1792         tctl = rd32(E1000_TCTL);
1793         tctl &= ~E1000_TCTL_EN;
1794         wr32(E1000_TCTL, tctl);
1795         /* flush both disables and wait for them to finish */
1796         wrfl();
1797         usleep_range(10000, 11000);
1798
1799         igb_irq_disable(adapter);
1800
1801         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1802
1803         for (i = 0; i < adapter->num_q_vectors; i++) {
1804                 if (adapter->q_vector[i]) {
1805                         napi_synchronize(&adapter->q_vector[i]->napi);
1806                         napi_disable(&adapter->q_vector[i]->napi);
1807                 }
1808         }
1809
1810         del_timer_sync(&adapter->watchdog_timer);
1811         del_timer_sync(&adapter->phy_info_timer);
1812
1813         /* record the stats before reset*/
1814         spin_lock(&adapter->stats64_lock);
1815         igb_update_stats(adapter, &adapter->stats64);
1816         spin_unlock(&adapter->stats64_lock);
1817
1818         adapter->link_speed = 0;
1819         adapter->link_duplex = 0;
1820
1821         if (!pci_channel_offline(adapter->pdev))
1822                 igb_reset(adapter);
1823
1824         /* clear VLAN promisc flag so VFTA will be updated if necessary */
1825         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
1826
1827         igb_clean_all_tx_rings(adapter);
1828         igb_clean_all_rx_rings(adapter);
1829 #ifdef CONFIG_IGB_DCA
1830
1831         /* since we reset the hardware DCA settings were cleared */
1832         igb_setup_dca(adapter);
1833 #endif
1834 }
1835
1836 void igb_reinit_locked(struct igb_adapter *adapter)
1837 {
1838         WARN_ON(in_interrupt());
1839         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1840                 usleep_range(1000, 2000);
1841         igb_down(adapter);
1842         igb_up(adapter);
1843         clear_bit(__IGB_RESETTING, &adapter->state);
1844 }
1845
1846 /** igb_enable_mas - Media Autosense re-enable after swap
1847  *
1848  * @adapter: adapter struct
1849  **/
1850 static void igb_enable_mas(struct igb_adapter *adapter)
1851 {
1852         struct e1000_hw *hw = &adapter->hw;
1853         u32 connsw = rd32(E1000_CONNSW);
1854
1855         /* configure for SerDes media detect */
1856         if ((hw->phy.media_type == e1000_media_type_copper) &&
1857             (!(connsw & E1000_CONNSW_SERDESD))) {
1858                 connsw |= E1000_CONNSW_ENRGSRC;
1859                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1860                 wr32(E1000_CONNSW, connsw);
1861                 wrfl();
1862         }
1863 }
1864
1865 void igb_reset(struct igb_adapter *adapter)
1866 {
1867         struct pci_dev *pdev = adapter->pdev;
1868         struct e1000_hw *hw = &adapter->hw;
1869         struct e1000_mac_info *mac = &hw->mac;
1870         struct e1000_fc_info *fc = &hw->fc;
1871         u32 pba, hwm;
1872
1873         /* Repartition Pba for greater than 9k mtu
1874          * To take effect CTRL.RST is required.
1875          */
1876         switch (mac->type) {
1877         case e1000_i350:
1878         case e1000_i354:
1879         case e1000_82580:
1880                 pba = rd32(E1000_RXPBS);
1881                 pba = igb_rxpbs_adjust_82580(pba);
1882                 break;
1883         case e1000_82576:
1884                 pba = rd32(E1000_RXPBS);
1885                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1886                 break;
1887         case e1000_82575:
1888         case e1000_i210:
1889         case e1000_i211:
1890         default:
1891                 pba = E1000_PBA_34K;
1892                 break;
1893         }
1894
1895         if (mac->type == e1000_82575) {
1896                 u32 min_rx_space, min_tx_space, needed_tx_space;
1897
1898                 /* write Rx PBA so that hardware can report correct Tx PBA */
1899                 wr32(E1000_PBA, pba);
1900
1901                 /* To maintain wire speed transmits, the Tx FIFO should be
1902                  * large enough to accommodate two full transmit packets,
1903                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1904                  * the Rx FIFO should be large enough to accommodate at least
1905                  * one full receive packet and is similarly rounded up and
1906                  * expressed in KB.
1907                  */
1908                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
1909
1910                 /* The Tx FIFO also stores 16 bytes of information about the Tx
1911                  * but don't include Ethernet FCS because hardware appends it.
1912                  * We only need to round down to the nearest 512 byte block
1913                  * count since the value we care about is 2 frames, not 1.
1914                  */
1915                 min_tx_space = adapter->max_frame_size;
1916                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
1917                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
1918
1919                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1920                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
1921
1922                 /* If current Tx allocation is less than the min Tx FIFO size,
1923                  * and the min Tx FIFO size is less than the current Rx FIFO
1924                  * allocation, take space away from current Rx allocation.
1925                  */
1926                 if (needed_tx_space < pba) {
1927                         pba -= needed_tx_space;
1928
1929                         /* if short on Rx space, Rx wins and must trump Tx
1930                          * adjustment
1931                          */
1932                         if (pba < min_rx_space)
1933                                 pba = min_rx_space;
1934                 }
1935
1936                 /* adjust PBA for jumbo frames */
1937                 wr32(E1000_PBA, pba);
1938         }
1939
1940         /* flow control settings
1941          * The high water mark must be low enough to fit one full frame
1942          * after transmitting the pause frame.  As such we must have enough
1943          * space to allow for us to complete our current transmit and then
1944          * receive the frame that is in progress from the link partner.
1945          * Set it to:
1946          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1947          */
1948         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
1949
1950         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1951         fc->low_water = fc->high_water - 16;
1952         fc->pause_time = 0xFFFF;
1953         fc->send_xon = 1;
1954         fc->current_mode = fc->requested_mode;
1955
1956         /* disable receive for all VFs and wait one second */
1957         if (adapter->vfs_allocated_count) {
1958                 int i;
1959
1960                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1961                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1962
1963                 /* ping all the active vfs to let them know we are going down */
1964                 igb_ping_all_vfs(adapter);
1965
1966                 /* disable transmits and receives */
1967                 wr32(E1000_VFRE, 0);
1968                 wr32(E1000_VFTE, 0);
1969         }
1970
1971         /* Allow time for pending master requests to run */
1972         hw->mac.ops.reset_hw(hw);
1973         wr32(E1000_WUC, 0);
1974
1975         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1976                 /* need to resetup here after media swap */
1977                 adapter->ei.get_invariants(hw);
1978                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1979         }
1980         if ((mac->type == e1000_82575) &&
1981             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
1982                 igb_enable_mas(adapter);
1983         }
1984         if (hw->mac.ops.init_hw(hw))
1985                 dev_err(&pdev->dev, "Hardware Error\n");
1986
1987         /* Flow control settings reset on hardware reset, so guarantee flow
1988          * control is off when forcing speed.
1989          */
1990         if (!hw->mac.autoneg)
1991                 igb_force_mac_fc(hw);
1992
1993         igb_init_dmac(adapter, pba);
1994 #ifdef CONFIG_IGB_HWMON
1995         /* Re-initialize the thermal sensor on i350 devices. */
1996         if (!test_bit(__IGB_DOWN, &adapter->state)) {
1997                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1998                         /* If present, re-initialize the external thermal sensor
1999                          * interface.
2000                          */
2001                         if (adapter->ets)
2002                                 mac->ops.init_thermal_sensor_thresh(hw);
2003                 }
2004         }
2005 #endif
2006         /* Re-establish EEE setting */
2007         if (hw->phy.media_type == e1000_media_type_copper) {
2008                 switch (mac->type) {
2009                 case e1000_i350:
2010                 case e1000_i210:
2011                 case e1000_i211:
2012                         igb_set_eee_i350(hw, true, true);
2013                         break;
2014                 case e1000_i354:
2015                         igb_set_eee_i354(hw, true, true);
2016                         break;
2017                 default:
2018                         break;
2019                 }
2020         }
2021         if (!netif_running(adapter->netdev))
2022                 igb_power_down_link(adapter);
2023
2024         igb_update_mng_vlan(adapter);
2025
2026         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2027         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2028
2029         /* Re-enable PTP, where applicable. */
2030         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2031                 igb_ptp_reset(adapter);
2032
2033         igb_get_phy_info(hw);
2034 }
2035
2036 static netdev_features_t igb_fix_features(struct net_device *netdev,
2037         netdev_features_t features)
2038 {
2039         /* Since there is no support for separate Rx/Tx vlan accel
2040          * enable/disable make sure Tx flag is always in same state as Rx.
2041          */
2042         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2043                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2044         else
2045                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2046
2047         return features;
2048 }
2049
2050 static int igb_set_features(struct net_device *netdev,
2051         netdev_features_t features)
2052 {
2053         netdev_features_t changed = netdev->features ^ features;
2054         struct igb_adapter *adapter = netdev_priv(netdev);
2055
2056         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2057                 igb_vlan_mode(netdev, features);
2058
2059         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2060                 return 0;
2061
2062         netdev->features = features;
2063
2064         if (netif_running(netdev))
2065                 igb_reinit_locked(adapter);
2066         else
2067                 igb_reset(adapter);
2068
2069         return 0;
2070 }
2071
2072 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2073                            struct net_device *dev,
2074                            const unsigned char *addr, u16 vid,
2075                            u16 flags)
2076 {
2077         /* guarantee we can provide a unique filter for the unicast address */
2078         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2079                 struct igb_adapter *adapter = netdev_priv(dev);
2080                 struct e1000_hw *hw = &adapter->hw;
2081                 int vfn = adapter->vfs_allocated_count;
2082                 int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
2083
2084                 if (netdev_uc_count(dev) >= rar_entries)
2085                         return -ENOMEM;
2086         }
2087
2088         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2089 }
2090
2091 #define IGB_MAX_MAC_HDR_LEN     127
2092 #define IGB_MAX_NETWORK_HDR_LEN 511
2093
2094 static netdev_features_t
2095 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2096                    netdev_features_t features)
2097 {
2098         unsigned int network_hdr_len, mac_hdr_len;
2099
2100         /* Make certain the headers can be described by a context descriptor */
2101         mac_hdr_len = skb_network_header(skb) - skb->data;
2102         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2103                 return features & ~(NETIF_F_HW_CSUM |
2104                                     NETIF_F_SCTP_CRC |
2105                                     NETIF_F_HW_VLAN_CTAG_TX |
2106                                     NETIF_F_TSO |
2107                                     NETIF_F_TSO6);
2108
2109         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2110         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2111                 return features & ~(NETIF_F_HW_CSUM |
2112                                     NETIF_F_SCTP_CRC |
2113                                     NETIF_F_TSO |
2114                                     NETIF_F_TSO6);
2115
2116         /* We can only support IPV4 TSO in tunnels if we can mangle the
2117          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2118          */
2119         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2120                 features &= ~NETIF_F_TSO;
2121
2122         return features;
2123 }
2124
2125 static const struct net_device_ops igb_netdev_ops = {
2126         .ndo_open               = igb_open,
2127         .ndo_stop               = igb_close,
2128         .ndo_start_xmit         = igb_xmit_frame,
2129         .ndo_get_stats64        = igb_get_stats64,
2130         .ndo_set_rx_mode        = igb_set_rx_mode,
2131         .ndo_set_mac_address    = igb_set_mac,
2132         .ndo_change_mtu         = igb_change_mtu,
2133         .ndo_do_ioctl           = igb_ioctl,
2134         .ndo_tx_timeout         = igb_tx_timeout,
2135         .ndo_validate_addr      = eth_validate_addr,
2136         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2137         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2138         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2139         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2140         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2141         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2142         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2143 #ifdef CONFIG_NET_POLL_CONTROLLER
2144         .ndo_poll_controller    = igb_netpoll,
2145 #endif
2146         .ndo_fix_features       = igb_fix_features,
2147         .ndo_set_features       = igb_set_features,
2148         .ndo_fdb_add            = igb_ndo_fdb_add,
2149         .ndo_features_check     = igb_features_check,
2150 };
2151
2152 /**
2153  * igb_set_fw_version - Configure version string for ethtool
2154  * @adapter: adapter struct
2155  **/
2156 void igb_set_fw_version(struct igb_adapter *adapter)
2157 {
2158         struct e1000_hw *hw = &adapter->hw;
2159         struct e1000_fw_version fw;
2160
2161         igb_get_fw_version(hw, &fw);
2162
2163         switch (hw->mac.type) {
2164         case e1000_i210:
2165         case e1000_i211:
2166                 if (!(igb_get_flash_presence_i210(hw))) {
2167                         snprintf(adapter->fw_version,
2168                                  sizeof(adapter->fw_version),
2169                                  "%2d.%2d-%d",
2170                                  fw.invm_major, fw.invm_minor,
2171                                  fw.invm_img_type);
2172                         break;
2173                 }
2174                 /* fall through */
2175         default:
2176                 /* if option is rom valid, display its version too */
2177                 if (fw.or_valid) {
2178                         snprintf(adapter->fw_version,
2179                                  sizeof(adapter->fw_version),
2180                                  "%d.%d, 0x%08x, %d.%d.%d",
2181                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2182                                  fw.or_major, fw.or_build, fw.or_patch);
2183                 /* no option rom */
2184                 } else if (fw.etrack_id != 0X0000) {
2185                         snprintf(adapter->fw_version,
2186                             sizeof(adapter->fw_version),
2187                             "%d.%d, 0x%08x",
2188                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2189                 } else {
2190                 snprintf(adapter->fw_version,
2191                     sizeof(adapter->fw_version),
2192                     "%d.%d.%d",
2193                     fw.eep_major, fw.eep_minor, fw.eep_build);
2194                 }
2195                 break;
2196         }
2197 }
2198
2199 /**
2200  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2201  *
2202  * @adapter: adapter struct
2203  **/
2204 static void igb_init_mas(struct igb_adapter *adapter)
2205 {
2206         struct e1000_hw *hw = &adapter->hw;
2207         u16 eeprom_data;
2208
2209         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2210         switch (hw->bus.func) {
2211         case E1000_FUNC_0:
2212                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2213                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2214                         netdev_info(adapter->netdev,
2215                                 "MAS: Enabling Media Autosense for port %d\n",
2216                                 hw->bus.func);
2217                 }
2218                 break;
2219         case E1000_FUNC_1:
2220                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2221                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2222                         netdev_info(adapter->netdev,
2223                                 "MAS: Enabling Media Autosense for port %d\n",
2224                                 hw->bus.func);
2225                 }
2226                 break;
2227         case E1000_FUNC_2:
2228                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2229                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2230                         netdev_info(adapter->netdev,
2231                                 "MAS: Enabling Media Autosense for port %d\n",
2232                                 hw->bus.func);
2233                 }
2234                 break;
2235         case E1000_FUNC_3:
2236                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2237                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2238                         netdev_info(adapter->netdev,
2239                                 "MAS: Enabling Media Autosense for port %d\n",
2240                                 hw->bus.func);
2241                 }
2242                 break;
2243         default:
2244                 /* Shouldn't get here */
2245                 netdev_err(adapter->netdev,
2246                         "MAS: Invalid port configuration, returning\n");
2247                 break;
2248         }
2249 }
2250
2251 /**
2252  *  igb_init_i2c - Init I2C interface
2253  *  @adapter: pointer to adapter structure
2254  **/
2255 static s32 igb_init_i2c(struct igb_adapter *adapter)
2256 {
2257         s32 status = 0;
2258
2259         /* I2C interface supported on i350 devices */
2260         if (adapter->hw.mac.type != e1000_i350)
2261                 return 0;
2262
2263         /* Initialize the i2c bus which is controlled by the registers.
2264          * This bus will use the i2c_algo_bit structue that implements
2265          * the protocol through toggling of the 4 bits in the register.
2266          */
2267         adapter->i2c_adap.owner = THIS_MODULE;
2268         adapter->i2c_algo = igb_i2c_algo;
2269         adapter->i2c_algo.data = adapter;
2270         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2271         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2272         strlcpy(adapter->i2c_adap.name, "igb BB",
2273                 sizeof(adapter->i2c_adap.name));
2274         status = i2c_bit_add_bus(&adapter->i2c_adap);
2275         return status;
2276 }
2277
2278 /**
2279  *  igb_probe - Device Initialization Routine
2280  *  @pdev: PCI device information struct
2281  *  @ent: entry in igb_pci_tbl
2282  *
2283  *  Returns 0 on success, negative on failure
2284  *
2285  *  igb_probe initializes an adapter identified by a pci_dev structure.
2286  *  The OS initialization, configuring of the adapter private structure,
2287  *  and a hardware reset occur.
2288  **/
2289 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2290 {
2291         struct net_device *netdev;
2292         struct igb_adapter *adapter;
2293         struct e1000_hw *hw;
2294         u16 eeprom_data = 0;
2295         s32 ret_val;
2296         static int global_quad_port_a; /* global quad port a indication */
2297         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2298         int err, pci_using_dac;
2299         u8 part_str[E1000_PBANUM_LENGTH];
2300
2301         /* Catch broken hardware that put the wrong VF device ID in
2302          * the PCIe SR-IOV capability.
2303          */
2304         if (pdev->is_virtfn) {
2305                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2306                         pci_name(pdev), pdev->vendor, pdev->device);
2307                 return -EINVAL;
2308         }
2309
2310         err = pci_enable_device_mem(pdev);
2311         if (err)
2312                 return err;
2313
2314         pci_using_dac = 0;
2315         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2316         if (!err) {
2317                 pci_using_dac = 1;
2318         } else {
2319                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2320                 if (err) {
2321                         dev_err(&pdev->dev,
2322                                 "No usable DMA configuration, aborting\n");
2323                         goto err_dma;
2324                 }
2325         }
2326
2327         err = pci_request_mem_regions(pdev, igb_driver_name);
2328         if (err)
2329                 goto err_pci_reg;
2330
2331         pci_enable_pcie_error_reporting(pdev);
2332
2333         pci_set_master(pdev);
2334         pci_save_state(pdev);
2335
2336         err = -ENOMEM;
2337         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2338                                    IGB_MAX_TX_QUEUES);
2339         if (!netdev)
2340                 goto err_alloc_etherdev;
2341
2342         SET_NETDEV_DEV(netdev, &pdev->dev);
2343
2344         pci_set_drvdata(pdev, netdev);
2345         adapter = netdev_priv(netdev);
2346         adapter->netdev = netdev;
2347         adapter->pdev = pdev;
2348         hw = &adapter->hw;
2349         hw->back = adapter;
2350         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2351
2352         err = -EIO;
2353         adapter->io_addr = pci_iomap(pdev, 0, 0);
2354         if (!adapter->io_addr)
2355                 goto err_ioremap;
2356         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2357         hw->hw_addr = adapter->io_addr;
2358
2359         netdev->netdev_ops = &igb_netdev_ops;
2360         igb_set_ethtool_ops(netdev);
2361         netdev->watchdog_timeo = 5 * HZ;
2362
2363         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2364
2365         netdev->mem_start = pci_resource_start(pdev, 0);
2366         netdev->mem_end = pci_resource_end(pdev, 0);
2367
2368         /* PCI config space info */
2369         hw->vendor_id = pdev->vendor;
2370         hw->device_id = pdev->device;
2371         hw->revision_id = pdev->revision;
2372         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2373         hw->subsystem_device_id = pdev->subsystem_device;
2374
2375         /* Copy the default MAC, PHY and NVM function pointers */
2376         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2377         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2378         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2379         /* Initialize skew-specific constants */
2380         err = ei->get_invariants(hw);
2381         if (err)
2382                 goto err_sw_init;
2383
2384         /* setup the private structure */
2385         err = igb_sw_init(adapter);
2386         if (err)
2387                 goto err_sw_init;
2388
2389         igb_get_bus_info_pcie(hw);
2390
2391         hw->phy.autoneg_wait_to_complete = false;
2392
2393         /* Copper options */
2394         if (hw->phy.media_type == e1000_media_type_copper) {
2395                 hw->phy.mdix = AUTO_ALL_MODES;
2396                 hw->phy.disable_polarity_correction = false;
2397                 hw->phy.ms_type = e1000_ms_hw_default;
2398         }
2399
2400         if (igb_check_reset_block(hw))
2401                 dev_info(&pdev->dev,
2402                         "PHY reset is blocked due to SOL/IDER session.\n");
2403
2404         /* features is initialized to 0 in allocation, it might have bits
2405          * set by igb_sw_init so we should use an or instead of an
2406          * assignment.
2407          */
2408         netdev->features |= NETIF_F_SG |
2409                             NETIF_F_TSO |
2410                             NETIF_F_TSO6 |
2411                             NETIF_F_RXHASH |
2412                             NETIF_F_RXCSUM |
2413                             NETIF_F_HW_CSUM;
2414
2415         if (hw->mac.type >= e1000_82576)
2416                 netdev->features |= NETIF_F_SCTP_CRC;
2417
2418 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2419                                   NETIF_F_GSO_GRE_CSUM | \
2420                                   NETIF_F_GSO_IPXIP4 | \
2421                                   NETIF_F_GSO_IPXIP6 | \
2422                                   NETIF_F_GSO_UDP_TUNNEL | \
2423                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
2424
2425         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
2426         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
2427
2428         /* copy netdev features into list of user selectable features */
2429         netdev->hw_features |= netdev->features |
2430                                NETIF_F_HW_VLAN_CTAG_RX |
2431                                NETIF_F_HW_VLAN_CTAG_TX |
2432                                NETIF_F_RXALL;
2433
2434         if (hw->mac.type >= e1000_i350)
2435                 netdev->hw_features |= NETIF_F_NTUPLE;
2436
2437         if (pci_using_dac)
2438                 netdev->features |= NETIF_F_HIGHDMA;
2439
2440         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
2441         netdev->mpls_features |= NETIF_F_HW_CSUM;
2442         netdev->hw_enc_features |= netdev->vlan_features;
2443
2444         /* set this bit last since it cannot be part of vlan_features */
2445         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2446                             NETIF_F_HW_VLAN_CTAG_RX |
2447                             NETIF_F_HW_VLAN_CTAG_TX;
2448
2449         netdev->priv_flags |= IFF_SUPP_NOFCS;
2450
2451         netdev->priv_flags |= IFF_UNICAST_FLT;
2452
2453         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2454
2455         /* before reading the NVM, reset the controller to put the device in a
2456          * known good starting state
2457          */
2458         hw->mac.ops.reset_hw(hw);
2459
2460         /* make sure the NVM is good , i211/i210 parts can have special NVM
2461          * that doesn't contain a checksum
2462          */
2463         switch (hw->mac.type) {
2464         case e1000_i210:
2465         case e1000_i211:
2466                 if (igb_get_flash_presence_i210(hw)) {
2467                         if (hw->nvm.ops.validate(hw) < 0) {
2468                                 dev_err(&pdev->dev,
2469                                         "The NVM Checksum Is Not Valid\n");
2470                                 err = -EIO;
2471                                 goto err_eeprom;
2472                         }
2473                 }
2474                 break;
2475         default:
2476                 if (hw->nvm.ops.validate(hw) < 0) {
2477                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2478                         err = -EIO;
2479                         goto err_eeprom;
2480                 }
2481                 break;
2482         }
2483
2484         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
2485                 /* copy the MAC address out of the NVM */
2486                 if (hw->mac.ops.read_mac_addr(hw))
2487                         dev_err(&pdev->dev, "NVM Read Error\n");
2488         }
2489
2490         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2491
2492         if (!is_valid_ether_addr(netdev->dev_addr)) {
2493                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2494                 err = -EIO;
2495                 goto err_eeprom;
2496         }
2497
2498         /* get firmware version for ethtool -i */
2499         igb_set_fw_version(adapter);
2500
2501         /* configure RXPBSIZE and TXPBSIZE */
2502         if (hw->mac.type == e1000_i210) {
2503                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2504                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2505         }
2506
2507         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2508                     (unsigned long) adapter);
2509         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2510                     (unsigned long) adapter);
2511
2512         INIT_WORK(&adapter->reset_task, igb_reset_task);
2513         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2514
2515         /* Initialize link properties that are user-changeable */
2516         adapter->fc_autoneg = true;
2517         hw->mac.autoneg = true;
2518         hw->phy.autoneg_advertised = 0x2f;
2519
2520         hw->fc.requested_mode = e1000_fc_default;
2521         hw->fc.current_mode = e1000_fc_default;
2522
2523         igb_validate_mdi_setting(hw);
2524
2525         /* By default, support wake on port A */
2526         if (hw->bus.func == 0)
2527                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2528
2529         /* Check the NVM for wake support on non-port A ports */
2530         if (hw->mac.type >= e1000_82580)
2531                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2532                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2533                                  &eeprom_data);
2534         else if (hw->bus.func == 1)
2535                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2536
2537         if (eeprom_data & IGB_EEPROM_APME)
2538                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2539
2540         /* now that we have the eeprom settings, apply the special cases where
2541          * the eeprom may be wrong or the board simply won't support wake on
2542          * lan on a particular port
2543          */
2544         switch (pdev->device) {
2545         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2546                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2547                 break;
2548         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2549         case E1000_DEV_ID_82576_FIBER:
2550         case E1000_DEV_ID_82576_SERDES:
2551                 /* Wake events only supported on port A for dual fiber
2552                  * regardless of eeprom setting
2553                  */
2554                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2555                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2556                 break;
2557         case E1000_DEV_ID_82576_QUAD_COPPER:
2558         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2559                 /* if quad port adapter, disable WoL on all but port A */
2560                 if (global_quad_port_a != 0)
2561                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2562                 else
2563                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2564                 /* Reset for multiple quad port adapters */
2565                 if (++global_quad_port_a == 4)
2566                         global_quad_port_a = 0;
2567                 break;
2568         default:
2569                 /* If the device can't wake, don't set software support */
2570                 if (!device_can_wakeup(&adapter->pdev->dev))
2571                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2572         }
2573
2574         /* initialize the wol settings based on the eeprom settings */
2575         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2576                 adapter->wol |= E1000_WUFC_MAG;
2577
2578         /* Some vendors want WoL disabled by default, but still supported */
2579         if ((hw->mac.type == e1000_i350) &&
2580             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2581                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2582                 adapter->wol = 0;
2583         }
2584
2585         /* Some vendors want the ability to Use the EEPROM setting as
2586          * enable/disable only, and not for capability
2587          */
2588         if (((hw->mac.type == e1000_i350) ||
2589              (hw->mac.type == e1000_i354)) &&
2590             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
2591                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2592                 adapter->wol = 0;
2593         }
2594         if (hw->mac.type == e1000_i350) {
2595                 if (((pdev->subsystem_device == 0x5001) ||
2596                      (pdev->subsystem_device == 0x5002)) &&
2597                                 (hw->bus.func == 0)) {
2598                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2599                         adapter->wol = 0;
2600                 }
2601                 if (pdev->subsystem_device == 0x1F52)
2602                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2603         }
2604
2605         device_set_wakeup_enable(&adapter->pdev->dev,
2606                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2607
2608         /* reset the hardware with the new settings */
2609         igb_reset(adapter);
2610
2611         /* Init the I2C interface */
2612         err = igb_init_i2c(adapter);
2613         if (err) {
2614                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2615                 goto err_eeprom;
2616         }
2617
2618         /* let the f/w know that the h/w is now under the control of the
2619          * driver.
2620          */
2621         igb_get_hw_control(adapter);
2622
2623         strcpy(netdev->name, "eth%d");
2624         err = register_netdev(netdev);
2625         if (err)
2626                 goto err_register;
2627
2628         /* carrier off reporting is important to ethtool even BEFORE open */
2629         netif_carrier_off(netdev);
2630
2631 #ifdef CONFIG_IGB_DCA
2632         if (dca_add_requester(&pdev->dev) == 0) {
2633                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2634                 dev_info(&pdev->dev, "DCA enabled\n");
2635                 igb_setup_dca(adapter);
2636         }
2637
2638 #endif
2639 #ifdef CONFIG_IGB_HWMON
2640         /* Initialize the thermal sensor on i350 devices. */
2641         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2642                 u16 ets_word;
2643
2644                 /* Read the NVM to determine if this i350 device supports an
2645                  * external thermal sensor.
2646                  */
2647                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2648                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2649                         adapter->ets = true;
2650                 else
2651                         adapter->ets = false;
2652                 if (igb_sysfs_init(adapter))
2653                         dev_err(&pdev->dev,
2654                                 "failed to allocate sysfs resources\n");
2655         } else {
2656                 adapter->ets = false;
2657         }
2658 #endif
2659         /* Check if Media Autosense is enabled */
2660         adapter->ei = *ei;
2661         if (hw->dev_spec._82575.mas_capable)
2662                 igb_init_mas(adapter);
2663
2664         /* do hw tstamp init after resetting */
2665         igb_ptp_init(adapter);
2666
2667         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2668         /* print bus type/speed/width info, not applicable to i354 */
2669         if (hw->mac.type != e1000_i354) {
2670                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2671                          netdev->name,
2672                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2673                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2674                            "unknown"),
2675                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2676                           "Width x4" :
2677                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2678                           "Width x2" :
2679                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2680                           "Width x1" : "unknown"), netdev->dev_addr);
2681         }
2682
2683         if ((hw->mac.type >= e1000_i210 ||
2684              igb_get_flash_presence_i210(hw))) {
2685                 ret_val = igb_read_part_string(hw, part_str,
2686                                                E1000_PBANUM_LENGTH);
2687         } else {
2688                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2689         }
2690
2691         if (ret_val)
2692                 strcpy(part_str, "Unknown");
2693         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2694         dev_info(&pdev->dev,
2695                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2696                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2697                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2698                 adapter->num_rx_queues, adapter->num_tx_queues);
2699         if (hw->phy.media_type == e1000_media_type_copper) {
2700                 switch (hw->mac.type) {
2701                 case e1000_i350:
2702                 case e1000_i210:
2703                 case e1000_i211:
2704                         /* Enable EEE for internal copper PHY devices */
2705                         err = igb_set_eee_i350(hw, true, true);
2706                         if ((!err) &&
2707                             (!hw->dev_spec._82575.eee_disable)) {
2708                                 adapter->eee_advert =
2709                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2710                                 adapter->flags |= IGB_FLAG_EEE;
2711                         }
2712                         break;
2713                 case e1000_i354:
2714                         if ((rd32(E1000_CTRL_EXT) &
2715                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2716                                 err = igb_set_eee_i354(hw, true, true);
2717                                 if ((!err) &&
2718                                         (!hw->dev_spec._82575.eee_disable)) {
2719                                         adapter->eee_advert =
2720                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2721                                         adapter->flags |= IGB_FLAG_EEE;
2722                                 }
2723                         }
2724                         break;
2725                 default:
2726                         break;
2727                 }
2728         }
2729         pm_runtime_put_noidle(&pdev->dev);
2730         return 0;
2731
2732 err_register:
2733         igb_release_hw_control(adapter);
2734         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2735 err_eeprom:
2736         if (!igb_check_reset_block(hw))
2737                 igb_reset_phy(hw);
2738
2739         if (hw->flash_address)
2740                 iounmap(hw->flash_address);
2741 err_sw_init:
2742         kfree(adapter->shadow_vfta);
2743         igb_clear_interrupt_scheme(adapter);
2744 #ifdef CONFIG_PCI_IOV
2745         igb_disable_sriov(pdev);
2746 #endif
2747         pci_iounmap(pdev, adapter->io_addr);
2748 err_ioremap:
2749         free_netdev(netdev);
2750 err_alloc_etherdev:
2751         pci_release_mem_regions(pdev);
2752 err_pci_reg:
2753 err_dma:
2754         pci_disable_device(pdev);
2755         return err;
2756 }
2757
2758 #ifdef CONFIG_PCI_IOV
2759 static int igb_disable_sriov(struct pci_dev *pdev)
2760 {
2761         struct net_device *netdev = pci_get_drvdata(pdev);
2762         struct igb_adapter *adapter = netdev_priv(netdev);
2763         struct e1000_hw *hw = &adapter->hw;
2764
2765         /* reclaim resources allocated to VFs */
2766         if (adapter->vf_data) {
2767                 /* disable iov and allow time for transactions to clear */
2768                 if (pci_vfs_assigned(pdev)) {
2769                         dev_warn(&pdev->dev,
2770                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2771                         return -EPERM;
2772                 } else {
2773                         pci_disable_sriov(pdev);
2774                         msleep(500);
2775                 }
2776
2777                 kfree(adapter->vf_data);
2778                 adapter->vf_data = NULL;
2779                 adapter->vfs_allocated_count = 0;
2780                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2781                 wrfl();
2782                 msleep(100);
2783                 dev_info(&pdev->dev, "IOV Disabled\n");
2784
2785                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2786                 adapter->flags |= IGB_FLAG_DMAC;
2787         }
2788
2789         return 0;
2790 }
2791
2792 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2793 {
2794         struct net_device *netdev = pci_get_drvdata(pdev);
2795         struct igb_adapter *adapter = netdev_priv(netdev);
2796         int old_vfs = pci_num_vf(pdev);
2797         int err = 0;
2798         int i;
2799
2800         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2801                 err = -EPERM;
2802                 goto out;
2803         }
2804         if (!num_vfs)
2805                 goto out;
2806
2807         if (old_vfs) {
2808                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2809                          old_vfs, max_vfs);
2810                 adapter->vfs_allocated_count = old_vfs;
2811         } else
2812                 adapter->vfs_allocated_count = num_vfs;
2813
2814         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2815                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2816
2817         /* if allocation failed then we do not support SR-IOV */
2818         if (!adapter->vf_data) {
2819                 adapter->vfs_allocated_count = 0;
2820                 dev_err(&pdev->dev,
2821                         "Unable to allocate memory for VF Data Storage\n");
2822                 err = -ENOMEM;
2823                 goto out;
2824         }
2825
2826         /* only call pci_enable_sriov() if no VFs are allocated already */
2827         if (!old_vfs) {
2828                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2829                 if (err)
2830                         goto err_out;
2831         }
2832         dev_info(&pdev->dev, "%d VFs allocated\n",
2833                  adapter->vfs_allocated_count);
2834         for (i = 0; i < adapter->vfs_allocated_count; i++)
2835                 igb_vf_configure(adapter, i);
2836
2837         /* DMA Coalescing is not supported in IOV mode. */
2838         adapter->flags &= ~IGB_FLAG_DMAC;
2839         goto out;
2840
2841 err_out:
2842         kfree(adapter->vf_data);
2843         adapter->vf_data = NULL;
2844         adapter->vfs_allocated_count = 0;
2845 out:
2846         return err;
2847 }
2848
2849 #endif
2850 /**
2851  *  igb_remove_i2c - Cleanup  I2C interface
2852  *  @adapter: pointer to adapter structure
2853  **/
2854 static void igb_remove_i2c(struct igb_adapter *adapter)
2855 {
2856         /* free the adapter bus structure */
2857         i2c_del_adapter(&adapter->i2c_adap);
2858 }
2859
2860 /**
2861  *  igb_remove - Device Removal Routine
2862  *  @pdev: PCI device information struct
2863  *
2864  *  igb_remove is called by the PCI subsystem to alert the driver
2865  *  that it should release a PCI device.  The could be caused by a
2866  *  Hot-Plug event, or because the driver is going to be removed from
2867  *  memory.
2868  **/
2869 static void igb_remove(struct pci_dev *pdev)
2870 {
2871         struct net_device *netdev = pci_get_drvdata(pdev);
2872         struct igb_adapter *adapter = netdev_priv(netdev);
2873         struct e1000_hw *hw = &adapter->hw;
2874
2875         pm_runtime_get_noresume(&pdev->dev);
2876 #ifdef CONFIG_IGB_HWMON
2877         igb_sysfs_exit(adapter);
2878 #endif
2879         igb_remove_i2c(adapter);
2880         igb_ptp_stop(adapter);
2881         /* The watchdog timer may be rescheduled, so explicitly
2882          * disable watchdog from being rescheduled.
2883          */
2884         set_bit(__IGB_DOWN, &adapter->state);
2885         del_timer_sync(&adapter->watchdog_timer);
2886         del_timer_sync(&adapter->phy_info_timer);
2887
2888         cancel_work_sync(&adapter->reset_task);
2889         cancel_work_sync(&adapter->watchdog_task);
2890
2891 #ifdef CONFIG_IGB_DCA
2892         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2893                 dev_info(&pdev->dev, "DCA disabled\n");
2894                 dca_remove_requester(&pdev->dev);
2895                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2896                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2897         }
2898 #endif
2899
2900         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2901          * would have already happened in close and is redundant.
2902          */
2903         igb_release_hw_control(adapter);
2904
2905 #ifdef CONFIG_PCI_IOV
2906         igb_disable_sriov(pdev);
2907 #endif
2908
2909         unregister_netdev(netdev);
2910
2911         igb_clear_interrupt_scheme(adapter);
2912
2913         pci_iounmap(pdev, adapter->io_addr);
2914         if (hw->flash_address)
2915                 iounmap(hw->flash_address);
2916         pci_release_mem_regions(pdev);
2917
2918         kfree(adapter->shadow_vfta);
2919         free_netdev(netdev);
2920
2921         pci_disable_pcie_error_reporting(pdev);
2922
2923         pci_disable_device(pdev);
2924 }
2925
2926 /**
2927  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2928  *  @adapter: board private structure to initialize
2929  *
2930  *  This function initializes the vf specific data storage and then attempts to
2931  *  allocate the VFs.  The reason for ordering it this way is because it is much
2932  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2933  *  the memory for the VFs.
2934  **/
2935 static void igb_probe_vfs(struct igb_adapter *adapter)
2936 {
2937 #ifdef CONFIG_PCI_IOV
2938         struct pci_dev *pdev = adapter->pdev;
2939         struct e1000_hw *hw = &adapter->hw;
2940
2941         /* Virtualization features not supported on i210 family. */
2942         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2943                 return;
2944
2945         /* Of the below we really only want the effect of getting
2946          * IGB_FLAG_HAS_MSIX set (if available), without which
2947          * igb_enable_sriov() has no effect.
2948          */
2949         igb_set_interrupt_capability(adapter, true);
2950         igb_reset_interrupt_capability(adapter);
2951
2952         pci_sriov_set_totalvfs(pdev, 7);
2953         igb_enable_sriov(pdev, max_vfs);
2954
2955 #endif /* CONFIG_PCI_IOV */
2956 }
2957
2958 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2959 {
2960         struct e1000_hw *hw = &adapter->hw;
2961         u32 max_rss_queues;
2962
2963         /* Determine the maximum number of RSS queues supported. */
2964         switch (hw->mac.type) {
2965         case e1000_i211:
2966                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2967                 break;
2968         case e1000_82575:
2969         case e1000_i210:
2970                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2971                 break;
2972         case e1000_i350:
2973                 /* I350 cannot do RSS and SR-IOV at the same time */
2974                 if (!!adapter->vfs_allocated_count) {
2975                         max_rss_queues = 1;
2976                         break;
2977                 }
2978                 /* fall through */
2979         case e1000_82576:
2980                 if (!!adapter->vfs_allocated_count) {
2981                         max_rss_queues = 2;
2982                         break;
2983                 }
2984                 /* fall through */
2985         case e1000_82580:
2986         case e1000_i354:
2987         default:
2988                 max_rss_queues = IGB_MAX_RX_QUEUES;
2989                 break;
2990         }
2991
2992         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2993
2994         igb_set_flag_queue_pairs(adapter, max_rss_queues);
2995 }
2996
2997 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
2998                               const u32 max_rss_queues)
2999 {
3000         struct e1000_hw *hw = &adapter->hw;
3001
3002         /* Determine if we need to pair queues. */
3003         switch (hw->mac.type) {
3004         case e1000_82575:
3005         case e1000_i211:
3006                 /* Device supports enough interrupts without queue pairing. */
3007                 break;
3008         case e1000_82576:
3009         case e1000_82580:
3010         case e1000_i350:
3011         case e1000_i354:
3012         case e1000_i210:
3013         default:
3014                 /* If rss_queues > half of max_rss_queues, pair the queues in
3015                  * order to conserve interrupts due to limited supply.
3016                  */
3017                 if (adapter->rss_queues > (max_rss_queues / 2))
3018                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3019                 else
3020                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3021                 break;
3022         }
3023 }
3024
3025 /**
3026  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3027  *  @adapter: board private structure to initialize
3028  *
3029  *  igb_sw_init initializes the Adapter private data structure.
3030  *  Fields are initialized based on PCI device information and
3031  *  OS network device settings (MTU size).
3032  **/
3033 static int igb_sw_init(struct igb_adapter *adapter)
3034 {
3035         struct e1000_hw *hw = &adapter->hw;
3036         struct net_device *netdev = adapter->netdev;
3037         struct pci_dev *pdev = adapter->pdev;
3038
3039         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3040
3041         /* set default ring sizes */
3042         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3043         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3044
3045         /* set default ITR values */
3046         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3047         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3048
3049         /* set default work limits */
3050         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3051
3052         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3053                                   VLAN_HLEN;
3054         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3055
3056         spin_lock_init(&adapter->stats64_lock);
3057 #ifdef CONFIG_PCI_IOV
3058         switch (hw->mac.type) {
3059         case e1000_82576:
3060         case e1000_i350:
3061                 if (max_vfs > 7) {
3062                         dev_warn(&pdev->dev,
3063                                  "Maximum of 7 VFs per PF, using max\n");
3064                         max_vfs = adapter->vfs_allocated_count = 7;
3065                 } else
3066                         adapter->vfs_allocated_count = max_vfs;
3067                 if (adapter->vfs_allocated_count)
3068                         dev_warn(&pdev->dev,
3069                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3070                 break;
3071         default:
3072                 break;
3073         }
3074 #endif /* CONFIG_PCI_IOV */
3075
3076         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3077         adapter->flags |= IGB_FLAG_HAS_MSIX;
3078
3079         igb_probe_vfs(adapter);
3080
3081         igb_init_queue_configuration(adapter);
3082
3083         /* Setup and initialize a copy of the hw vlan table array */
3084         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3085                                        GFP_ATOMIC);
3086
3087         /* This call may decrease the number of queues */
3088         if (igb_init_interrupt_scheme(adapter, true)) {
3089                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3090                 return -ENOMEM;
3091         }
3092
3093         /* Explicitly disable IRQ since the NIC can be in any state. */
3094         igb_irq_disable(adapter);
3095
3096         if (hw->mac.type >= e1000_i350)
3097                 adapter->flags &= ~IGB_FLAG_DMAC;
3098
3099         set_bit(__IGB_DOWN, &adapter->state);
3100         return 0;
3101 }
3102
3103 /**
3104  *  igb_open - Called when a network interface is made active
3105  *  @netdev: network interface device structure
3106  *
3107  *  Returns 0 on success, negative value on failure
3108  *
3109  *  The open entry point is called when a network interface is made
3110  *  active by the system (IFF_UP).  At this point all resources needed
3111  *  for transmit and receive operations are allocated, the interrupt
3112  *  handler is registered with the OS, the watchdog timer is started,
3113  *  and the stack is notified that the interface is ready.
3114  **/
3115 static int __igb_open(struct net_device *netdev, bool resuming)
3116 {
3117         struct igb_adapter *adapter = netdev_priv(netdev);
3118         struct e1000_hw *hw = &adapter->hw;
3119         struct pci_dev *pdev = adapter->pdev;
3120         int err;
3121         int i;
3122
3123         /* disallow open during test */
3124         if (test_bit(__IGB_TESTING, &adapter->state)) {
3125                 WARN_ON(resuming);
3126                 return -EBUSY;
3127         }
3128
3129         if (!resuming)
3130                 pm_runtime_get_sync(&pdev->dev);
3131
3132         netif_carrier_off(netdev);
3133
3134         /* allocate transmit descriptors */
3135         err = igb_setup_all_tx_resources(adapter);
3136         if (err)
3137                 goto err_setup_tx;
3138
3139         /* allocate receive descriptors */
3140         err = igb_setup_all_rx_resources(adapter);
3141         if (err)
3142                 goto err_setup_rx;
3143
3144         igb_power_up_link(adapter);
3145
3146         /* before we allocate an interrupt, we must be ready to handle it.
3147          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3148          * as soon as we call pci_request_irq, so we have to setup our
3149          * clean_rx handler before we do so.
3150          */
3151         igb_configure(adapter);
3152
3153         err = igb_request_irq(adapter);
3154         if (err)
3155                 goto err_req_irq;
3156
3157         /* Notify the stack of the actual queue counts. */
3158         err = netif_set_real_num_tx_queues(adapter->netdev,
3159                                            adapter->num_tx_queues);
3160         if (err)
3161                 goto err_set_queues;
3162
3163         err = netif_set_real_num_rx_queues(adapter->netdev,
3164                                            adapter->num_rx_queues);
3165         if (err)
3166                 goto err_set_queues;
3167
3168         /* From here on the code is the same as igb_up() */
3169         clear_bit(__IGB_DOWN, &adapter->state);
3170
3171         for (i = 0; i < adapter->num_q_vectors; i++)
3172                 napi_enable(&(adapter->q_vector[i]->napi));
3173
3174         /* Clear any pending interrupts. */
3175         rd32(E1000_ICR);
3176
3177         igb_irq_enable(adapter);
3178
3179         /* notify VFs that reset has been completed */
3180         if (adapter->vfs_allocated_count) {
3181                 u32 reg_data = rd32(E1000_CTRL_EXT);
3182
3183                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3184                 wr32(E1000_CTRL_EXT, reg_data);
3185         }
3186
3187         netif_tx_start_all_queues(netdev);
3188
3189         if (!resuming)
3190                 pm_runtime_put(&pdev->dev);
3191
3192         /* start the watchdog. */
3193         hw->mac.get_link_status = 1;
3194         schedule_work(&adapter->watchdog_task);
3195
3196         return 0;
3197
3198 err_set_queues:
3199         igb_free_irq(adapter);
3200 err_req_irq:
3201         igb_release_hw_control(adapter);
3202         igb_power_down_link(adapter);
3203         igb_free_all_rx_resources(adapter);
3204 err_setup_rx:
3205         igb_free_all_tx_resources(adapter);
3206 err_setup_tx:
3207         igb_reset(adapter);
3208         if (!resuming)
3209                 pm_runtime_put(&pdev->dev);
3210
3211         return err;
3212 }
3213
3214 int igb_open(struct net_device *netdev)
3215 {
3216         return __igb_open(netdev, false);
3217 }
3218
3219 /**
3220  *  igb_close - Disables a network interface
3221  *  @netdev: network interface device structure
3222  *
3223  *  Returns 0, this is not allowed to fail
3224  *
3225  *  The close entry point is called when an interface is de-activated
3226  *  by the OS.  The hardware is still under the driver's control, but
3227  *  needs to be disabled.  A global MAC reset is issued to stop the
3228  *  hardware, and all transmit and receive resources are freed.
3229  **/
3230 static int __igb_close(struct net_device *netdev, bool suspending)
3231 {
3232         struct igb_adapter *adapter = netdev_priv(netdev);
3233         struct pci_dev *pdev = adapter->pdev;
3234
3235         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3236
3237         if (!suspending)
3238                 pm_runtime_get_sync(&pdev->dev);
3239
3240         igb_down(adapter);
3241         igb_free_irq(adapter);
3242
3243         igb_free_all_tx_resources(adapter);
3244         igb_free_all_rx_resources(adapter);
3245
3246         if (!suspending)
3247                 pm_runtime_put_sync(&pdev->dev);
3248         return 0;
3249 }
3250
3251 int igb_close(struct net_device *netdev)
3252 {
3253         return __igb_close(netdev, false);
3254 }
3255
3256 /**
3257  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3258  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3259  *
3260  *  Return 0 on success, negative on failure
3261  **/
3262 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3263 {
3264         struct device *dev = tx_ring->dev;
3265         int size;
3266
3267         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3268
3269         tx_ring->tx_buffer_info = vzalloc(size);
3270         if (!tx_ring->tx_buffer_info)
3271                 goto err;
3272
3273         /* round up to nearest 4K */
3274         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3275         tx_ring->size = ALIGN(tx_ring->size, 4096);
3276
3277         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3278                                            &tx_ring->dma, GFP_KERNEL);
3279         if (!tx_ring->desc)
3280                 goto err;
3281
3282         tx_ring->next_to_use = 0;
3283         tx_ring->next_to_clean = 0;
3284
3285         return 0;
3286
3287 err:
3288         vfree(tx_ring->tx_buffer_info);
3289         tx_ring->tx_buffer_info = NULL;
3290         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3291         return -ENOMEM;
3292 }
3293
3294 /**
3295  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3296  *                               (Descriptors) for all queues
3297  *  @adapter: board private structure
3298  *
3299  *  Return 0 on success, negative on failure
3300  **/
3301 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3302 {
3303         struct pci_dev *pdev = adapter->pdev;
3304         int i, err = 0;
3305
3306         for (i = 0; i < adapter->num_tx_queues; i++) {
3307                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3308                 if (err) {
3309                         dev_err(&pdev->dev,
3310                                 "Allocation for Tx Queue %u failed\n", i);
3311                         for (i--; i >= 0; i--)
3312                                 igb_free_tx_resources(adapter->tx_ring[i]);
3313                         break;
3314                 }
3315         }
3316
3317         return err;
3318 }
3319
3320 /**
3321  *  igb_setup_tctl - configure the transmit control registers
3322  *  @adapter: Board private structure
3323  **/
3324 void igb_setup_tctl(struct igb_adapter *adapter)
3325 {
3326         struct e1000_hw *hw = &adapter->hw;
3327         u32 tctl;
3328
3329         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3330         wr32(E1000_TXDCTL(0), 0);
3331
3332         /* Program the Transmit Control Register */
3333         tctl = rd32(E1000_TCTL);
3334         tctl &= ~E1000_TCTL_CT;
3335         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3336                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3337
3338         igb_config_collision_dist(hw);
3339
3340         /* Enable transmits */
3341         tctl |= E1000_TCTL_EN;
3342
3343         wr32(E1000_TCTL, tctl);
3344 }
3345
3346 /**
3347  *  igb_configure_tx_ring - Configure transmit ring after Reset
3348  *  @adapter: board private structure
3349  *  @ring: tx ring to configure
3350  *
3351  *  Configure a transmit ring after a reset.
3352  **/
3353 void igb_configure_tx_ring(struct igb_adapter *adapter,
3354                            struct igb_ring *ring)
3355 {
3356         struct e1000_hw *hw = &adapter->hw;
3357         u32 txdctl = 0;
3358         u64 tdba = ring->dma;
3359         int reg_idx = ring->reg_idx;
3360
3361         /* disable the queue */
3362         wr32(E1000_TXDCTL(reg_idx), 0);
3363         wrfl();
3364         mdelay(10);
3365
3366         wr32(E1000_TDLEN(reg_idx),
3367              ring->count * sizeof(union e1000_adv_tx_desc));
3368         wr32(E1000_TDBAL(reg_idx),
3369              tdba & 0x00000000ffffffffULL);
3370         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3371
3372         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3373         wr32(E1000_TDH(reg_idx), 0);
3374         writel(0, ring->tail);
3375
3376         txdctl |= IGB_TX_PTHRESH;
3377         txdctl |= IGB_TX_HTHRESH << 8;
3378         txdctl |= IGB_TX_WTHRESH << 16;
3379
3380         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3381         wr32(E1000_TXDCTL(reg_idx), txdctl);
3382 }
3383
3384 /**
3385  *  igb_configure_tx - Configure transmit Unit after Reset
3386  *  @adapter: board private structure
3387  *
3388  *  Configure the Tx unit of the MAC after a reset.
3389  **/
3390 static void igb_configure_tx(struct igb_adapter *adapter)
3391 {
3392         int i;
3393
3394         for (i = 0; i < adapter->num_tx_queues; i++)
3395                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3396 }
3397
3398 /**
3399  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3400  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3401  *
3402  *  Returns 0 on success, negative on failure
3403  **/
3404 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3405 {
3406         struct device *dev = rx_ring->dev;
3407         int size;
3408
3409         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3410
3411         rx_ring->rx_buffer_info = vzalloc(size);
3412         if (!rx_ring->rx_buffer_info)
3413                 goto err;
3414
3415         /* Round up to nearest 4K */
3416         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3417         rx_ring->size = ALIGN(rx_ring->size, 4096);
3418
3419         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3420                                            &rx_ring->dma, GFP_KERNEL);
3421         if (!rx_ring->desc)
3422                 goto err;
3423
3424         rx_ring->next_to_alloc = 0;
3425         rx_ring->next_to_clean = 0;
3426         rx_ring->next_to_use = 0;
3427
3428         return 0;
3429
3430 err:
3431         vfree(rx_ring->rx_buffer_info);
3432         rx_ring->rx_buffer_info = NULL;
3433         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3434         return -ENOMEM;
3435 }
3436
3437 /**
3438  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3439  *                               (Descriptors) for all queues
3440  *  @adapter: board private structure
3441  *
3442  *  Return 0 on success, negative on failure
3443  **/
3444 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3445 {
3446         struct pci_dev *pdev = adapter->pdev;
3447         int i, err = 0;
3448
3449         for (i = 0; i < adapter->num_rx_queues; i++) {
3450                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3451                 if (err) {
3452                         dev_err(&pdev->dev,
3453                                 "Allocation for Rx Queue %u failed\n", i);
3454                         for (i--; i >= 0; i--)
3455                                 igb_free_rx_resources(adapter->rx_ring[i]);
3456                         break;
3457                 }
3458         }
3459
3460         return err;
3461 }
3462
3463 /**
3464  *  igb_setup_mrqc - configure the multiple receive queue control registers
3465  *  @adapter: Board private structure
3466  **/
3467 static void igb_setup_mrqc(struct igb_adapter *adapter)
3468 {
3469         struct e1000_hw *hw = &adapter->hw;
3470         u32 mrqc, rxcsum;
3471         u32 j, num_rx_queues;
3472         u32 rss_key[10];
3473
3474         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3475         for (j = 0; j < 10; j++)
3476                 wr32(E1000_RSSRK(j), rss_key[j]);
3477
3478         num_rx_queues = adapter->rss_queues;
3479
3480         switch (hw->mac.type) {
3481         case e1000_82576:
3482                 /* 82576 supports 2 RSS queues for SR-IOV */
3483                 if (adapter->vfs_allocated_count)
3484                         num_rx_queues = 2;
3485                 break;
3486         default:
3487                 break;
3488         }
3489
3490         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3491                 for (j = 0; j < IGB_RETA_SIZE; j++)
3492                         adapter->rss_indir_tbl[j] =
3493                         (j * num_rx_queues) / IGB_RETA_SIZE;
3494                 adapter->rss_indir_tbl_init = num_rx_queues;
3495         }
3496         igb_write_rss_indir_tbl(adapter);
3497
3498         /* Disable raw packet checksumming so that RSS hash is placed in
3499          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3500          * offloads as they are enabled by default
3501          */
3502         rxcsum = rd32(E1000_RXCSUM);
3503         rxcsum |= E1000_RXCSUM_PCSD;
3504
3505         if (adapter->hw.mac.type >= e1000_82576)
3506                 /* Enable Receive Checksum Offload for SCTP */
3507                 rxcsum |= E1000_RXCSUM_CRCOFL;
3508
3509         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3510         wr32(E1000_RXCSUM, rxcsum);
3511
3512         /* Generate RSS hash based on packet types, TCP/UDP
3513          * port numbers and/or IPv4/v6 src and dst addresses
3514          */
3515         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3516                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3517                E1000_MRQC_RSS_FIELD_IPV6 |
3518                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3519                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3520
3521         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3522                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3523         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3524                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3525
3526         /* If VMDq is enabled then we set the appropriate mode for that, else
3527          * we default to RSS so that an RSS hash is calculated per packet even
3528          * if we are only using one queue
3529          */
3530         if (adapter->vfs_allocated_count) {
3531                 if (hw->mac.type > e1000_82575) {
3532                         /* Set the default pool for the PF's first queue */
3533                         u32 vtctl = rd32(E1000_VT_CTL);
3534
3535                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3536                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3537                         vtctl |= adapter->vfs_allocated_count <<
3538                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3539                         wr32(E1000_VT_CTL, vtctl);
3540                 }
3541                 if (adapter->rss_queues > 1)
3542                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
3543                 else
3544                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3545         } else {
3546                 if (hw->mac.type != e1000_i211)
3547                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
3548         }
3549         igb_vmm_control(adapter);
3550
3551         wr32(E1000_MRQC, mrqc);
3552 }
3553
3554 /**
3555  *  igb_setup_rctl - configure the receive control registers
3556  *  @adapter: Board private structure
3557  **/
3558 void igb_setup_rctl(struct igb_adapter *adapter)
3559 {
3560         struct e1000_hw *hw = &adapter->hw;
3561         u32 rctl;
3562
3563         rctl = rd32(E1000_RCTL);
3564
3565         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3566         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3567
3568         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3569                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3570
3571         /* enable stripping of CRC. It's unlikely this will break BMC
3572          * redirection as it did with e1000. Newer features require
3573          * that the HW strips the CRC.
3574          */
3575         rctl |= E1000_RCTL_SECRC;
3576
3577         /* disable store bad packets and clear size bits. */
3578         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3579
3580         /* enable LPE to allow for reception of jumbo frames */
3581         rctl |= E1000_RCTL_LPE;
3582
3583         /* disable queue 0 to prevent tail write w/o re-config */
3584         wr32(E1000_RXDCTL(0), 0);
3585
3586         /* Attention!!!  For SR-IOV PF driver operations you must enable
3587          * queue drop for all VF and PF queues to prevent head of line blocking
3588          * if an un-trusted VF does not provide descriptors to hardware.
3589          */
3590         if (adapter->vfs_allocated_count) {
3591                 /* set all queue drop enable bits */
3592                 wr32(E1000_QDE, ALL_QUEUES);
3593         }
3594
3595         /* This is useful for sniffing bad packets. */
3596         if (adapter->netdev->features & NETIF_F_RXALL) {
3597                 /* UPE and MPE will be handled by normal PROMISC logic
3598                  * in e1000e_set_rx_mode
3599                  */
3600                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3601                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3602                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3603
3604                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
3605                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3606                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3607                  * and that breaks VLANs.
3608                  */
3609         }
3610
3611         wr32(E1000_RCTL, rctl);
3612 }
3613
3614 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3615                                    int vfn)
3616 {
3617         struct e1000_hw *hw = &adapter->hw;
3618         u32 vmolr;
3619
3620         if (size > MAX_JUMBO_FRAME_SIZE)
3621                 size = MAX_JUMBO_FRAME_SIZE;
3622
3623         vmolr = rd32(E1000_VMOLR(vfn));
3624         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3625         vmolr |= size | E1000_VMOLR_LPE;
3626         wr32(E1000_VMOLR(vfn), vmolr);
3627
3628         return 0;
3629 }
3630
3631 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3632                                          int vfn, bool enable)
3633 {
3634         struct e1000_hw *hw = &adapter->hw;
3635         u32 val, reg;
3636
3637         if (hw->mac.type < e1000_82576)
3638                 return;
3639
3640         if (hw->mac.type == e1000_i350)
3641                 reg = E1000_DVMOLR(vfn);
3642         else
3643                 reg = E1000_VMOLR(vfn);
3644
3645         val = rd32(reg);
3646         if (enable)
3647                 val |= E1000_VMOLR_STRVLAN;
3648         else
3649                 val &= ~(E1000_VMOLR_STRVLAN);
3650         wr32(reg, val);
3651 }
3652
3653 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3654                                  int vfn, bool aupe)
3655 {
3656         struct e1000_hw *hw = &adapter->hw;
3657         u32 vmolr;
3658
3659         /* This register exists only on 82576 and newer so if we are older then
3660          * we should exit and do nothing
3661          */
3662         if (hw->mac.type < e1000_82576)
3663                 return;
3664
3665         vmolr = rd32(E1000_VMOLR(vfn));
3666         if (aupe)
3667                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3668         else
3669                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3670
3671         /* clear all bits that might not be set */
3672         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3673
3674         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3675                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3676         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3677          * multicast packets
3678          */
3679         if (vfn <= adapter->vfs_allocated_count)
3680                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3681
3682         wr32(E1000_VMOLR(vfn), vmolr);
3683 }
3684
3685 /**
3686  *  igb_configure_rx_ring - Configure a receive ring after Reset
3687  *  @adapter: board private structure
3688  *  @ring: receive ring to be configured
3689  *
3690  *  Configure the Rx unit of the MAC after a reset.
3691  **/
3692 void igb_configure_rx_ring(struct igb_adapter *adapter,
3693                            struct igb_ring *ring)
3694 {
3695         struct e1000_hw *hw = &adapter->hw;
3696         u64 rdba = ring->dma;
3697         int reg_idx = ring->reg_idx;
3698         u32 srrctl = 0, rxdctl = 0;
3699
3700         /* disable the queue */
3701         wr32(E1000_RXDCTL(reg_idx), 0);
3702
3703         /* Set DMA base address registers */
3704         wr32(E1000_RDBAL(reg_idx),
3705              rdba & 0x00000000ffffffffULL);
3706         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3707         wr32(E1000_RDLEN(reg_idx),
3708              ring->count * sizeof(union e1000_adv_rx_desc));
3709
3710         /* initialize head and tail */
3711         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3712         wr32(E1000_RDH(reg_idx), 0);
3713         writel(0, ring->tail);
3714
3715         /* set descriptor configuration */
3716         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3717         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3718         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3719         if (hw->mac.type >= e1000_82580)
3720                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3721         /* Only set Drop Enable if we are supporting multiple queues */
3722         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3723                 srrctl |= E1000_SRRCTL_DROP_EN;
3724
3725         wr32(E1000_SRRCTL(reg_idx), srrctl);
3726
3727         /* set filtering for VMDQ pools */
3728         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3729
3730         rxdctl |= IGB_RX_PTHRESH;
3731         rxdctl |= IGB_RX_HTHRESH << 8;
3732         rxdctl |= IGB_RX_WTHRESH << 16;
3733
3734         /* enable receive descriptor fetching */
3735         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3736         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3737 }
3738
3739 /**
3740  *  igb_configure_rx - Configure receive Unit after Reset
3741  *  @adapter: board private structure
3742  *
3743  *  Configure the Rx unit of the MAC after a reset.
3744  **/
3745 static void igb_configure_rx(struct igb_adapter *adapter)
3746 {
3747         int i;
3748
3749         /* set the correct pool for the PF default MAC address in entry 0 */
3750         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3751                          adapter->vfs_allocated_count);
3752
3753         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3754          * the Base and Length of the Rx Descriptor Ring
3755          */
3756         for (i = 0; i < adapter->num_rx_queues; i++)
3757                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3758 }
3759
3760 /**
3761  *  igb_free_tx_resources - Free Tx Resources per Queue
3762  *  @tx_ring: Tx descriptor ring for a specific queue
3763  *
3764  *  Free all transmit software resources
3765  **/
3766 void igb_free_tx_resources(struct igb_ring *tx_ring)
3767 {
3768         igb_clean_tx_ring(tx_ring);
3769
3770         vfree(tx_ring->tx_buffer_info);
3771         tx_ring->tx_buffer_info = NULL;
3772
3773         /* if not set, then don't free */
3774         if (!tx_ring->desc)
3775                 return;
3776
3777         dma_free_coherent(tx_ring->dev, tx_ring->size,
3778                           tx_ring->desc, tx_ring->dma);
3779
3780         tx_ring->desc = NULL;
3781 }
3782
3783 /**
3784  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3785  *  @adapter: board private structure
3786  *
3787  *  Free all transmit software resources
3788  **/
3789 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3790 {
3791         int i;
3792
3793         for (i = 0; i < adapter->num_tx_queues; i++)
3794                 if (adapter->tx_ring[i])
3795                         igb_free_tx_resources(adapter->tx_ring[i]);
3796 }
3797
3798 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3799                                     struct igb_tx_buffer *tx_buffer)
3800 {
3801         if (tx_buffer->skb) {
3802                 dev_kfree_skb_any(tx_buffer->skb);
3803                 if (dma_unmap_len(tx_buffer, len))
3804                         dma_unmap_single(ring->dev,
3805                                          dma_unmap_addr(tx_buffer, dma),
3806                                          dma_unmap_len(tx_buffer, len),
3807                                          DMA_TO_DEVICE);
3808         } else if (dma_unmap_len(tx_buffer, len)) {
3809                 dma_unmap_page(ring->dev,
3810                                dma_unmap_addr(tx_buffer, dma),
3811                                dma_unmap_len(tx_buffer, len),
3812                                DMA_TO_DEVICE);
3813         }
3814         tx_buffer->next_to_watch = NULL;
3815         tx_buffer->skb = NULL;
3816         dma_unmap_len_set(tx_buffer, len, 0);
3817         /* buffer_info must be completely set up in the transmit path */
3818 }
3819
3820 /**
3821  *  igb_clean_tx_ring - Free Tx Buffers
3822  *  @tx_ring: ring to be cleaned
3823  **/
3824 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3825 {
3826         struct igb_tx_buffer *buffer_info;
3827         unsigned long size;
3828         u16 i;
3829
3830         if (!tx_ring->tx_buffer_info)
3831                 return;
3832         /* Free all the Tx ring sk_buffs */
3833
3834         for (i = 0; i < tx_ring->count; i++) {
3835                 buffer_info = &tx_ring->tx_buffer_info[i];
3836                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3837         }
3838
3839         netdev_tx_reset_queue(txring_txq(tx_ring));
3840
3841         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3842         memset(tx_ring->tx_buffer_info, 0, size);
3843
3844         /* Zero out the descriptor ring */
3845         memset(tx_ring->desc, 0, tx_ring->size);
3846
3847         tx_ring->next_to_use = 0;
3848         tx_ring->next_to_clean = 0;
3849 }
3850
3851 /**
3852  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3853  *  @adapter: board private structure
3854  **/
3855 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3856 {
3857         int i;
3858
3859         for (i = 0; i < adapter->num_tx_queues; i++)
3860                 if (adapter->tx_ring[i])
3861                         igb_clean_tx_ring(adapter->tx_ring[i]);
3862 }
3863
3864 /**
3865  *  igb_free_rx_resources - Free Rx Resources
3866  *  @rx_ring: ring to clean the resources from
3867  *
3868  *  Free all receive software resources
3869  **/
3870 void igb_free_rx_resources(struct igb_ring *rx_ring)
3871 {
3872         igb_clean_rx_ring(rx_ring);
3873
3874         vfree(rx_ring->rx_buffer_info);
3875         rx_ring->rx_buffer_info = NULL;
3876
3877         /* if not set, then don't free */
3878         if (!rx_ring->desc)
3879                 return;
3880
3881         dma_free_coherent(rx_ring->dev, rx_ring->size,
3882                           rx_ring->desc, rx_ring->dma);
3883
3884         rx_ring->desc = NULL;
3885 }
3886
3887 /**
3888  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3889  *  @adapter: board private structure
3890  *
3891  *  Free all receive software resources
3892  **/
3893 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3894 {
3895         int i;
3896
3897         for (i = 0; i < adapter->num_rx_queues; i++)
3898                 if (adapter->rx_ring[i])
3899                         igb_free_rx_resources(adapter->rx_ring[i]);
3900 }
3901
3902 /**
3903  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3904  *  @rx_ring: ring to free buffers from
3905  **/
3906 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3907 {
3908         unsigned long size;
3909         u16 i;
3910
3911         if (rx_ring->skb)
3912                 dev_kfree_skb(rx_ring->skb);
3913         rx_ring->skb = NULL;
3914
3915         if (!rx_ring->rx_buffer_info)
3916                 return;
3917
3918         /* Free all the Rx ring sk_buffs */
3919         for (i = 0; i < rx_ring->count; i++) {
3920                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3921
3922                 if (!buffer_info->page)
3923                         continue;
3924
3925                 dma_unmap_page(rx_ring->dev,
3926                                buffer_info->dma,
3927                                PAGE_SIZE,
3928                                DMA_FROM_DEVICE);
3929                 __free_page(buffer_info->page);
3930
3931                 buffer_info->page = NULL;
3932         }
3933
3934         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3935         memset(rx_ring->rx_buffer_info, 0, size);
3936
3937         /* Zero out the descriptor ring */
3938         memset(rx_ring->desc, 0, rx_ring->size);
3939
3940         rx_ring->next_to_alloc = 0;
3941         rx_ring->next_to_clean = 0;
3942         rx_ring->next_to_use = 0;
3943 }
3944
3945 /**
3946  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3947  *  @adapter: board private structure
3948  **/
3949 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3950 {
3951         int i;
3952
3953         for (i = 0; i < adapter->num_rx_queues; i++)
3954                 if (adapter->rx_ring[i])
3955                         igb_clean_rx_ring(adapter->rx_ring[i]);
3956 }
3957
3958 /**
3959  *  igb_set_mac - Change the Ethernet Address of the NIC
3960  *  @netdev: network interface device structure
3961  *  @p: pointer to an address structure
3962  *
3963  *  Returns 0 on success, negative on failure
3964  **/
3965 static int igb_set_mac(struct net_device *netdev, void *p)
3966 {
3967         struct igb_adapter *adapter = netdev_priv(netdev);
3968         struct e1000_hw *hw = &adapter->hw;
3969         struct sockaddr *addr = p;
3970
3971         if (!is_valid_ether_addr(addr->sa_data))
3972                 return -EADDRNOTAVAIL;
3973
3974         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3975         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3976
3977         /* set the correct pool for the new PF MAC address in entry 0 */
3978         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3979                          adapter->vfs_allocated_count);
3980
3981         return 0;
3982 }
3983
3984 /**
3985  *  igb_write_mc_addr_list - write multicast addresses to MTA
3986  *  @netdev: network interface device structure
3987  *
3988  *  Writes multicast address list to the MTA hash table.
3989  *  Returns: -ENOMEM on failure
3990  *           0 on no addresses written
3991  *           X on writing X addresses to MTA
3992  **/
3993 static int igb_write_mc_addr_list(struct net_device *netdev)
3994 {
3995         struct igb_adapter *adapter = netdev_priv(netdev);
3996         struct e1000_hw *hw = &adapter->hw;
3997         struct netdev_hw_addr *ha;
3998         u8  *mta_list;
3999         int i;
4000
4001         if (netdev_mc_empty(netdev)) {
4002                 /* nothing to program, so clear mc list */
4003                 igb_update_mc_addr_list(hw, NULL, 0);
4004                 igb_restore_vf_multicasts(adapter);
4005                 return 0;
4006         }
4007
4008         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
4009         if (!mta_list)
4010                 return -ENOMEM;
4011
4012         /* The shared function expects a packed array of only addresses. */
4013         i = 0;
4014         netdev_for_each_mc_addr(ha, netdev)
4015                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4016
4017         igb_update_mc_addr_list(hw, mta_list, i);
4018         kfree(mta_list);
4019
4020         return netdev_mc_count(netdev);
4021 }
4022
4023 /**
4024  *  igb_write_uc_addr_list - write unicast addresses to RAR table
4025  *  @netdev: network interface device structure
4026  *
4027  *  Writes unicast address list to the RAR table.
4028  *  Returns: -ENOMEM on failure/insufficient address space
4029  *           0 on no addresses written
4030  *           X on writing X addresses to the RAR table
4031  **/
4032 static int igb_write_uc_addr_list(struct net_device *netdev)
4033 {
4034         struct igb_adapter *adapter = netdev_priv(netdev);
4035         struct e1000_hw *hw = &adapter->hw;
4036         unsigned int vfn = adapter->vfs_allocated_count;
4037         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
4038         int count = 0;
4039
4040         /* return ENOMEM indicating insufficient memory for addresses */
4041         if (netdev_uc_count(netdev) > rar_entries)
4042                 return -ENOMEM;
4043
4044         if (!netdev_uc_empty(netdev) && rar_entries) {
4045                 struct netdev_hw_addr *ha;
4046
4047                 netdev_for_each_uc_addr(ha, netdev) {
4048                         if (!rar_entries)
4049                                 break;
4050                         igb_rar_set_qsel(adapter, ha->addr,
4051                                          rar_entries--,
4052                                          vfn);
4053                         count++;
4054                 }
4055         }
4056         /* write the addresses in reverse order to avoid write combining */
4057         for (; rar_entries > 0 ; rar_entries--) {
4058                 wr32(E1000_RAH(rar_entries), 0);
4059                 wr32(E1000_RAL(rar_entries), 0);
4060         }
4061         wrfl();
4062
4063         return count;
4064 }
4065
4066 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4067 {
4068         struct e1000_hw *hw = &adapter->hw;
4069         u32 i, pf_id;
4070
4071         switch (hw->mac.type) {
4072         case e1000_i210:
4073         case e1000_i211:
4074         case e1000_i350:
4075                 /* VLAN filtering needed for VLAN prio filter */
4076                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4077                         break;
4078                 /* fall through */
4079         case e1000_82576:
4080         case e1000_82580:
4081         case e1000_i354:
4082                 /* VLAN filtering needed for pool filtering */
4083                 if (adapter->vfs_allocated_count)
4084                         break;
4085                 /* fall through */
4086         default:
4087                 return 1;
4088         }
4089
4090         /* We are already in VLAN promisc, nothing to do */
4091         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4092                 return 0;
4093
4094         if (!adapter->vfs_allocated_count)
4095                 goto set_vfta;
4096
4097         /* Add PF to all active pools */
4098         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4099
4100         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4101                 u32 vlvf = rd32(E1000_VLVF(i));
4102
4103                 vlvf |= BIT(pf_id);
4104                 wr32(E1000_VLVF(i), vlvf);
4105         }
4106
4107 set_vfta:
4108         /* Set all bits in the VLAN filter table array */
4109         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4110                 hw->mac.ops.write_vfta(hw, i, ~0U);
4111
4112         /* Set flag so we don't redo unnecessary work */
4113         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4114
4115         return 0;
4116 }
4117
4118 #define VFTA_BLOCK_SIZE 8
4119 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4120 {
4121         struct e1000_hw *hw = &adapter->hw;
4122         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4123         u32 vid_start = vfta_offset * 32;
4124         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4125         u32 i, vid, word, bits, pf_id;
4126
4127         /* guarantee that we don't scrub out management VLAN */
4128         vid = adapter->mng_vlan_id;
4129         if (vid >= vid_start && vid < vid_end)
4130                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4131
4132         if (!adapter->vfs_allocated_count)
4133                 goto set_vfta;
4134
4135         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4136
4137         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4138                 u32 vlvf = rd32(E1000_VLVF(i));
4139
4140                 /* pull VLAN ID from VLVF */
4141                 vid = vlvf & VLAN_VID_MASK;
4142
4143                 /* only concern ourselves with a certain range */
4144                 if (vid < vid_start || vid >= vid_end)
4145                         continue;
4146
4147                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4148                         /* record VLAN ID in VFTA */
4149                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4150
4151                         /* if PF is part of this then continue */
4152                         if (test_bit(vid, adapter->active_vlans))
4153                                 continue;
4154                 }
4155
4156                 /* remove PF from the pool */
4157                 bits = ~BIT(pf_id);
4158                 bits &= rd32(E1000_VLVF(i));
4159                 wr32(E1000_VLVF(i), bits);
4160         }
4161
4162 set_vfta:
4163         /* extract values from active_vlans and write back to VFTA */
4164         for (i = VFTA_BLOCK_SIZE; i--;) {
4165                 vid = (vfta_offset + i) * 32;
4166                 word = vid / BITS_PER_LONG;
4167                 bits = vid % BITS_PER_LONG;
4168
4169                 vfta[i] |= adapter->active_vlans[word] >> bits;
4170
4171                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4172         }
4173 }
4174
4175 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4176 {
4177         u32 i;
4178
4179         /* We are not in VLAN promisc, nothing to do */
4180         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4181                 return;
4182
4183         /* Set flag so we don't redo unnecessary work */
4184         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4185
4186         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4187                 igb_scrub_vfta(adapter, i);
4188 }
4189
4190 /**
4191  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4192  *  @netdev: network interface device structure
4193  *
4194  *  The set_rx_mode entry point is called whenever the unicast or multicast
4195  *  address lists or the network interface flags are updated.  This routine is
4196  *  responsible for configuring the hardware for proper unicast, multicast,
4197  *  promiscuous mode, and all-multi behavior.
4198  **/
4199 static void igb_set_rx_mode(struct net_device *netdev)
4200 {
4201         struct igb_adapter *adapter = netdev_priv(netdev);
4202         struct e1000_hw *hw = &adapter->hw;
4203         unsigned int vfn = adapter->vfs_allocated_count;
4204         u32 rctl = 0, vmolr = 0;
4205         int count;
4206
4207         /* Check for Promiscuous and All Multicast modes */
4208         if (netdev->flags & IFF_PROMISC) {
4209                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
4210                 vmolr |= E1000_VMOLR_MPME;
4211
4212                 /* enable use of UTA filter to force packets to default pool */
4213                 if (hw->mac.type == e1000_82576)
4214                         vmolr |= E1000_VMOLR_ROPE;
4215         } else {
4216                 if (netdev->flags & IFF_ALLMULTI) {
4217                         rctl |= E1000_RCTL_MPE;
4218                         vmolr |= E1000_VMOLR_MPME;
4219                 } else {
4220                         /* Write addresses to the MTA, if the attempt fails
4221                          * then we should just turn on promiscuous mode so
4222                          * that we can at least receive multicast traffic
4223                          */
4224                         count = igb_write_mc_addr_list(netdev);
4225                         if (count < 0) {
4226                                 rctl |= E1000_RCTL_MPE;
4227                                 vmolr |= E1000_VMOLR_MPME;
4228                         } else if (count) {
4229                                 vmolr |= E1000_VMOLR_ROMPE;
4230                         }
4231                 }
4232         }
4233
4234         /* Write addresses to available RAR registers, if there is not
4235          * sufficient space to store all the addresses then enable
4236          * unicast promiscuous mode
4237          */
4238         count = igb_write_uc_addr_list(netdev);
4239         if (count < 0) {
4240                 rctl |= E1000_RCTL_UPE;
4241                 vmolr |= E1000_VMOLR_ROPE;
4242         }
4243
4244         /* enable VLAN filtering by default */
4245         rctl |= E1000_RCTL_VFE;
4246
4247         /* disable VLAN filtering for modes that require it */
4248         if ((netdev->flags & IFF_PROMISC) ||
4249             (netdev->features & NETIF_F_RXALL)) {
4250                 /* if we fail to set all rules then just clear VFE */
4251                 if (igb_vlan_promisc_enable(adapter))
4252                         rctl &= ~E1000_RCTL_VFE;
4253         } else {
4254                 igb_vlan_promisc_disable(adapter);
4255         }
4256
4257         /* update state of unicast, multicast, and VLAN filtering modes */
4258         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
4259                                      E1000_RCTL_VFE);
4260         wr32(E1000_RCTL, rctl);
4261
4262         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4263          * the VMOLR to enable the appropriate modes.  Without this workaround
4264          * we will have issues with VLAN tag stripping not being done for frames
4265          * that are only arriving because we are the default pool
4266          */
4267         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4268                 return;
4269
4270         /* set UTA to appropriate mode */
4271         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
4272
4273         vmolr |= rd32(E1000_VMOLR(vfn)) &
4274                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4275
4276         /* enable Rx jumbo frames, no need for restriction */
4277         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4278         vmolr |= MAX_JUMBO_FRAME_SIZE | E1000_VMOLR_LPE;
4279
4280         wr32(E1000_VMOLR(vfn), vmolr);
4281         wr32(E1000_RLPML, MAX_JUMBO_FRAME_SIZE);
4282
4283         igb_restore_vf_multicasts(adapter);
4284 }
4285
4286 static void igb_check_wvbr(struct igb_adapter *adapter)
4287 {
4288         struct e1000_hw *hw = &adapter->hw;
4289         u32 wvbr = 0;
4290
4291         switch (hw->mac.type) {
4292         case e1000_82576:
4293         case e1000_i350:
4294                 wvbr = rd32(E1000_WVBR);
4295                 if (!wvbr)
4296                         return;
4297                 break;
4298         default:
4299                 break;
4300         }
4301
4302         adapter->wvbr |= wvbr;
4303 }
4304
4305 #define IGB_STAGGERED_QUEUE_OFFSET 8
4306
4307 static void igb_spoof_check(struct igb_adapter *adapter)
4308 {
4309         int j;
4310
4311         if (!adapter->wvbr)
4312                 return;
4313
4314         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4315                 if (adapter->wvbr & BIT(j) ||
4316                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
4317                         dev_warn(&adapter->pdev->dev,
4318                                 "Spoof event(s) detected on VF %d\n", j);
4319                         adapter->wvbr &=
4320                                 ~(BIT(j) |
4321                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
4322                 }
4323         }
4324 }
4325
4326 /* Need to wait a few seconds after link up to get diagnostic information from
4327  * the phy
4328  */
4329 static void igb_update_phy_info(unsigned long data)
4330 {
4331         struct igb_adapter *adapter = (struct igb_adapter *) data;
4332         igb_get_phy_info(&adapter->hw);
4333 }
4334
4335 /**
4336  *  igb_has_link - check shared code for link and determine up/down
4337  *  @adapter: pointer to driver private info
4338  **/
4339 bool igb_has_link(struct igb_adapter *adapter)
4340 {
4341         struct e1000_hw *hw = &adapter->hw;
4342         bool link_active = false;
4343
4344         /* get_link_status is set on LSC (link status) interrupt or
4345          * rx sequence error interrupt.  get_link_status will stay
4346          * false until the e1000_check_for_link establishes link
4347          * for copper adapters ONLY
4348          */
4349         switch (hw->phy.media_type) {
4350         case e1000_media_type_copper:
4351                 if (!hw->mac.get_link_status)
4352                         return true;
4353         case e1000_media_type_internal_serdes:
4354                 hw->mac.ops.check_for_link(hw);
4355                 link_active = !hw->mac.get_link_status;
4356                 break;
4357         default:
4358         case e1000_media_type_unknown:
4359                 break;
4360         }
4361
4362         if (((hw->mac.type == e1000_i210) ||
4363              (hw->mac.type == e1000_i211)) &&
4364              (hw->phy.id == I210_I_PHY_ID)) {
4365                 if (!netif_carrier_ok(adapter->netdev)) {
4366                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4367                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4368                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4369                         adapter->link_check_timeout = jiffies;
4370                 }
4371         }
4372
4373         return link_active;
4374 }
4375
4376 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4377 {
4378         bool ret = false;
4379         u32 ctrl_ext, thstat;
4380
4381         /* check for thermal sensor event on i350 copper only */
4382         if (hw->mac.type == e1000_i350) {
4383                 thstat = rd32(E1000_THSTAT);
4384                 ctrl_ext = rd32(E1000_CTRL_EXT);
4385
4386                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4387                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4388                         ret = !!(thstat & event);
4389         }
4390
4391         return ret;
4392 }
4393
4394 /**
4395  *  igb_check_lvmmc - check for malformed packets received
4396  *  and indicated in LVMMC register
4397  *  @adapter: pointer to adapter
4398  **/
4399 static void igb_check_lvmmc(struct igb_adapter *adapter)
4400 {
4401         struct e1000_hw *hw = &adapter->hw;
4402         u32 lvmmc;
4403
4404         lvmmc = rd32(E1000_LVMMC);
4405         if (lvmmc) {
4406                 if (unlikely(net_ratelimit())) {
4407                         netdev_warn(adapter->netdev,
4408                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4409                                     lvmmc);
4410                 }
4411         }
4412 }
4413
4414 /**
4415  *  igb_watchdog - Timer Call-back
4416  *  @data: pointer to adapter cast into an unsigned long
4417  **/
4418 static void igb_watchdog(unsigned long data)
4419 {
4420         struct igb_adapter *adapter = (struct igb_adapter *)data;
4421         /* Do the rest outside of interrupt context */
4422         schedule_work(&adapter->watchdog_task);
4423 }
4424
4425 static void igb_watchdog_task(struct work_struct *work)
4426 {
4427         struct igb_adapter *adapter = container_of(work,
4428                                                    struct igb_adapter,
4429                                                    watchdog_task);
4430         struct e1000_hw *hw = &adapter->hw;
4431         struct e1000_phy_info *phy = &hw->phy;
4432         struct net_device *netdev = adapter->netdev;
4433         u32 link;
4434         int i;
4435         u32 connsw;
4436         u16 phy_data, retry_count = 20;
4437
4438         link = igb_has_link(adapter);
4439
4440         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4441                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4442                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4443                 else
4444                         link = false;
4445         }
4446
4447         /* Force link down if we have fiber to swap to */
4448         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4449                 if (hw->phy.media_type == e1000_media_type_copper) {
4450                         connsw = rd32(E1000_CONNSW);
4451                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4452                                 link = 0;
4453                 }
4454         }
4455         if (link) {
4456                 /* Perform a reset if the media type changed. */
4457                 if (hw->dev_spec._82575.media_changed) {
4458                         hw->dev_spec._82575.media_changed = false;
4459                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4460                         igb_reset(adapter);
4461                 }
4462                 /* Cancel scheduled suspend requests. */
4463                 pm_runtime_resume(netdev->dev.parent);
4464
4465                 if (!netif_carrier_ok(netdev)) {
4466                         u32 ctrl;
4467
4468                         hw->mac.ops.get_speed_and_duplex(hw,
4469                                                          &adapter->link_speed,
4470                                                          &adapter->link_duplex);
4471
4472                         ctrl = rd32(E1000_CTRL);
4473                         /* Links status message must follow this format */
4474                         netdev_info(netdev,
4475                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4476                                netdev->name,
4477                                adapter->link_speed,
4478                                adapter->link_duplex == FULL_DUPLEX ?
4479                                "Full" : "Half",
4480                                (ctrl & E1000_CTRL_TFCE) &&
4481                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4482                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4483                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4484
4485                         /* disable EEE if enabled */
4486                         if ((adapter->flags & IGB_FLAG_EEE) &&
4487                                 (adapter->link_duplex == HALF_DUPLEX)) {
4488                                 dev_info(&adapter->pdev->dev,
4489                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4490                                 adapter->hw.dev_spec._82575.eee_disable = true;
4491                                 adapter->flags &= ~IGB_FLAG_EEE;
4492                         }
4493
4494                         /* check if SmartSpeed worked */
4495                         igb_check_downshift(hw);
4496                         if (phy->speed_downgraded)
4497                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4498
4499                         /* check for thermal sensor event */
4500                         if (igb_thermal_sensor_event(hw,
4501                             E1000_THSTAT_LINK_THROTTLE))
4502                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4503
4504                         /* adjust timeout factor according to speed/duplex */
4505                         adapter->tx_timeout_factor = 1;
4506                         switch (adapter->link_speed) {
4507                         case SPEED_10:
4508                                 adapter->tx_timeout_factor = 14;
4509                                 break;
4510                         case SPEED_100:
4511                                 /* maybe add some timeout factor ? */
4512                                 break;
4513                         }
4514
4515                         if (adapter->link_speed != SPEED_1000)
4516                                 goto no_wait;
4517
4518                         /* wait for Remote receiver status OK */
4519 retry_read_status:
4520                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
4521                                               &phy_data)) {
4522                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
4523                                     retry_count) {
4524                                         msleep(100);
4525                                         retry_count--;
4526                                         goto retry_read_status;
4527                                 } else if (!retry_count) {
4528                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
4529                                 }
4530                         } else {
4531                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
4532                         }
4533 no_wait:
4534                         netif_carrier_on(netdev);
4535
4536                         igb_ping_all_vfs(adapter);
4537                         igb_check_vf_rate_limit(adapter);
4538
4539                         /* link state has changed, schedule phy info update */
4540                         if (!test_bit(__IGB_DOWN, &adapter->state))
4541                                 mod_timer(&adapter->phy_info_timer,
4542                                           round_jiffies(jiffies + 2 * HZ));
4543                 }
4544         } else {
4545                 if (netif_carrier_ok(netdev)) {
4546                         adapter->link_speed = 0;
4547                         adapter->link_duplex = 0;
4548
4549                         /* check for thermal sensor event */
4550                         if (igb_thermal_sensor_event(hw,
4551                             E1000_THSTAT_PWR_DOWN)) {
4552                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4553                         }
4554
4555                         /* Links status message must follow this format */
4556                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4557                                netdev->name);
4558                         netif_carrier_off(netdev);
4559
4560                         igb_ping_all_vfs(adapter);
4561
4562                         /* link state has changed, schedule phy info update */
4563                         if (!test_bit(__IGB_DOWN, &adapter->state))
4564                                 mod_timer(&adapter->phy_info_timer,
4565                                           round_jiffies(jiffies + 2 * HZ));
4566
4567                         /* link is down, time to check for alternate media */
4568                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4569                                 igb_check_swap_media(adapter);
4570                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4571                                         schedule_work(&adapter->reset_task);
4572                                         /* return immediately */
4573                                         return;
4574                                 }
4575                         }
4576                         pm_schedule_suspend(netdev->dev.parent,
4577                                             MSEC_PER_SEC * 5);
4578
4579                 /* also check for alternate media here */
4580                 } else if (!netif_carrier_ok(netdev) &&
4581                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4582                         igb_check_swap_media(adapter);
4583                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4584                                 schedule_work(&adapter->reset_task);
4585                                 /* return immediately */
4586                                 return;
4587                         }
4588                 }
4589         }
4590
4591         spin_lock(&adapter->stats64_lock);
4592         igb_update_stats(adapter, &adapter->stats64);
4593         spin_unlock(&adapter->stats64_lock);
4594
4595         for (i = 0; i < adapter->num_tx_queues; i++) {
4596                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4597                 if (!netif_carrier_ok(netdev)) {
4598                         /* We've lost link, so the controller stops DMA,
4599                          * but we've got queued Tx work that's never going
4600                          * to get done, so reset controller to flush Tx.
4601                          * (Do the reset outside of interrupt context).
4602                          */
4603                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4604                                 adapter->tx_timeout_count++;
4605                                 schedule_work(&adapter->reset_task);
4606                                 /* return immediately since reset is imminent */
4607                                 return;
4608                         }
4609                 }
4610
4611                 /* Force detection of hung controller every watchdog period */
4612                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4613         }
4614
4615         /* Cause software interrupt to ensure Rx ring is cleaned */
4616         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4617                 u32 eics = 0;
4618
4619                 for (i = 0; i < adapter->num_q_vectors; i++)
4620                         eics |= adapter->q_vector[i]->eims_value;
4621                 wr32(E1000_EICS, eics);
4622         } else {
4623                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4624         }
4625
4626         igb_spoof_check(adapter);
4627         igb_ptp_rx_hang(adapter);
4628
4629         /* Check LVMMC register on i350/i354 only */
4630         if ((adapter->hw.mac.type == e1000_i350) ||
4631             (adapter->hw.mac.type == e1000_i354))
4632                 igb_check_lvmmc(adapter);
4633
4634         /* Reset the timer */
4635         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4636                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4637                         mod_timer(&adapter->watchdog_timer,
4638                                   round_jiffies(jiffies +  HZ));
4639                 else
4640                         mod_timer(&adapter->watchdog_timer,
4641                                   round_jiffies(jiffies + 2 * HZ));
4642         }
4643 }
4644
4645 enum latency_range {
4646         lowest_latency = 0,
4647         low_latency = 1,
4648         bulk_latency = 2,
4649         latency_invalid = 255
4650 };
4651
4652 /**
4653  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4654  *  @q_vector: pointer to q_vector
4655  *
4656  *  Stores a new ITR value based on strictly on packet size.  This
4657  *  algorithm is less sophisticated than that used in igb_update_itr,
4658  *  due to the difficulty of synchronizing statistics across multiple
4659  *  receive rings.  The divisors and thresholds used by this function
4660  *  were determined based on theoretical maximum wire speed and testing
4661  *  data, in order to minimize response time while increasing bulk
4662  *  throughput.
4663  *  This functionality is controlled by ethtool's coalescing settings.
4664  *  NOTE:  This function is called only when operating in a multiqueue
4665  *         receive environment.
4666  **/
4667 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4668 {
4669         int new_val = q_vector->itr_val;
4670         int avg_wire_size = 0;
4671         struct igb_adapter *adapter = q_vector->adapter;
4672         unsigned int packets;
4673
4674         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4675          * ints/sec - ITR timer value of 120 ticks.
4676          */
4677         if (adapter->link_speed != SPEED_1000) {
4678                 new_val = IGB_4K_ITR;
4679                 goto set_itr_val;
4680         }
4681
4682         packets = q_vector->rx.total_packets;
4683         if (packets)
4684                 avg_wire_size = q_vector->rx.total_bytes / packets;
4685
4686         packets = q_vector->tx.total_packets;
4687         if (packets)
4688                 avg_wire_size = max_t(u32, avg_wire_size,
4689                                       q_vector->tx.total_bytes / packets);
4690
4691         /* if avg_wire_size isn't set no work was done */
4692         if (!avg_wire_size)
4693                 goto clear_counts;
4694
4695         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4696         avg_wire_size += 24;
4697
4698         /* Don't starve jumbo frames */
4699         avg_wire_size = min(avg_wire_size, 3000);
4700
4701         /* Give a little boost to mid-size frames */
4702         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4703                 new_val = avg_wire_size / 3;
4704         else
4705                 new_val = avg_wire_size / 2;
4706
4707         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4708         if (new_val < IGB_20K_ITR &&
4709             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4710              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4711                 new_val = IGB_20K_ITR;
4712
4713 set_itr_val:
4714         if (new_val != q_vector->itr_val) {
4715                 q_vector->itr_val = new_val;
4716                 q_vector->set_itr = 1;
4717         }
4718 clear_counts:
4719         q_vector->rx.total_bytes = 0;
4720         q_vector->rx.total_packets = 0;
4721         q_vector->tx.total_bytes = 0;
4722         q_vector->tx.total_packets = 0;
4723 }
4724
4725 /**
4726  *  igb_update_itr - update the dynamic ITR value based on statistics
4727  *  @q_vector: pointer to q_vector
4728  *  @ring_container: ring info to update the itr for
4729  *
4730  *  Stores a new ITR value based on packets and byte
4731  *  counts during the last interrupt.  The advantage of per interrupt
4732  *  computation is faster updates and more accurate ITR for the current
4733  *  traffic pattern.  Constants in this function were computed
4734  *  based on theoretical maximum wire speed and thresholds were set based
4735  *  on testing data as well as attempting to minimize response time
4736  *  while increasing bulk throughput.
4737  *  This functionality is controlled by ethtool's coalescing settings.
4738  *  NOTE:  These calculations are only valid when operating in a single-
4739  *         queue environment.
4740  **/
4741 static void igb_update_itr(struct igb_q_vector *q_vector,
4742                            struct igb_ring_container *ring_container)
4743 {
4744         unsigned int packets = ring_container->total_packets;
4745         unsigned int bytes = ring_container->total_bytes;
4746         u8 itrval = ring_container->itr;
4747
4748         /* no packets, exit with status unchanged */
4749         if (packets == 0)
4750                 return;
4751
4752         switch (itrval) {
4753         case lowest_latency:
4754                 /* handle TSO and jumbo frames */
4755                 if (bytes/packets > 8000)
4756                         itrval = bulk_latency;
4757                 else if ((packets < 5) && (bytes > 512))
4758                         itrval = low_latency;
4759                 break;
4760         case low_latency:  /* 50 usec aka 20000 ints/s */
4761                 if (bytes > 10000) {
4762                         /* this if handles the TSO accounting */
4763                         if (bytes/packets > 8000)
4764                                 itrval = bulk_latency;
4765                         else if ((packets < 10) || ((bytes/packets) > 1200))
4766                                 itrval = bulk_latency;
4767                         else if ((packets > 35))
4768                                 itrval = lowest_latency;
4769                 } else if (bytes/packets > 2000) {
4770                         itrval = bulk_latency;
4771                 } else if (packets <= 2 && bytes < 512) {
4772                         itrval = lowest_latency;
4773                 }
4774                 break;
4775         case bulk_latency: /* 250 usec aka 4000 ints/s */
4776                 if (bytes > 25000) {
4777                         if (packets > 35)
4778                                 itrval = low_latency;
4779                 } else if (bytes < 1500) {
4780                         itrval = low_latency;
4781                 }
4782                 break;
4783         }
4784
4785         /* clear work counters since we have the values we need */
4786         ring_container->total_bytes = 0;
4787         ring_container->total_packets = 0;
4788
4789         /* write updated itr to ring container */
4790         ring_container->itr = itrval;
4791 }
4792
4793 static void igb_set_itr(struct igb_q_vector *q_vector)
4794 {
4795         struct igb_adapter *adapter = q_vector->adapter;
4796         u32 new_itr = q_vector->itr_val;
4797         u8 current_itr = 0;
4798
4799         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4800         if (adapter->link_speed != SPEED_1000) {
4801                 current_itr = 0;
4802                 new_itr = IGB_4K_ITR;
4803                 goto set_itr_now;
4804         }
4805
4806         igb_update_itr(q_vector, &q_vector->tx);
4807         igb_update_itr(q_vector, &q_vector->rx);
4808
4809         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4810
4811         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4812         if (current_itr == lowest_latency &&
4813             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4814              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4815                 current_itr = low_latency;
4816
4817         switch (current_itr) {
4818         /* counts and packets in update_itr are dependent on these numbers */
4819         case lowest_latency:
4820                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4821                 break;
4822         case low_latency:
4823                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4824                 break;
4825         case bulk_latency:
4826                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4827                 break;
4828         default:
4829                 break;
4830         }
4831
4832 set_itr_now:
4833         if (new_itr != q_vector->itr_val) {
4834                 /* this attempts to bias the interrupt rate towards Bulk
4835                  * by adding intermediate steps when interrupt rate is
4836                  * increasing
4837                  */
4838                 new_itr = new_itr > q_vector->itr_val ?
4839                           max((new_itr * q_vector->itr_val) /
4840                           (new_itr + (q_vector->itr_val >> 2)),
4841                           new_itr) : new_itr;
4842                 /* Don't write the value here; it resets the adapter's
4843                  * internal timer, and causes us to delay far longer than
4844                  * we should between interrupts.  Instead, we write the ITR
4845                  * value at the beginning of the next interrupt so the timing
4846                  * ends up being correct.
4847                  */
4848                 q_vector->itr_val = new_itr;
4849                 q_vector->set_itr = 1;
4850         }
4851 }
4852
4853 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4854                             u32 type_tucmd, u32 mss_l4len_idx)
4855 {
4856         struct e1000_adv_tx_context_desc *context_desc;
4857         u16 i = tx_ring->next_to_use;
4858
4859         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4860
4861         i++;
4862         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4863
4864         /* set bits to identify this as an advanced context descriptor */
4865         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4866
4867         /* For 82575, context index must be unique per ring. */
4868         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4869                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4870
4871         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4872         context_desc->seqnum_seed       = 0;
4873         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4874         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4875 }
4876
4877 static int igb_tso(struct igb_ring *tx_ring,
4878                    struct igb_tx_buffer *first,
4879                    u8 *hdr_len)
4880 {
4881         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
4882         struct sk_buff *skb = first->skb;
4883         union {
4884                 struct iphdr *v4;
4885                 struct ipv6hdr *v6;
4886                 unsigned char *hdr;
4887         } ip;
4888         union {
4889                 struct tcphdr *tcp;
4890                 unsigned char *hdr;
4891         } l4;
4892         u32 paylen, l4_offset;
4893         int err;
4894
4895         if (skb->ip_summed != CHECKSUM_PARTIAL)
4896                 return 0;
4897
4898         if (!skb_is_gso(skb))
4899                 return 0;
4900
4901         err = skb_cow_head(skb, 0);
4902         if (err < 0)
4903                 return err;
4904
4905         ip.hdr = skb_network_header(skb);
4906         l4.hdr = skb_checksum_start(skb);
4907
4908         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4909         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4910
4911         /* initialize outer IP header fields */
4912         if (ip.v4->version == 4) {
4913                 /* IP header will have to cancel out any data that
4914                  * is not a part of the outer IP header
4915                  */
4916                 ip.v4->check = csum_fold(csum_add(lco_csum(skb),
4917                                                   csum_unfold(l4.tcp->check)));
4918                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4919
4920                 ip.v4->tot_len = 0;
4921                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4922                                    IGB_TX_FLAGS_CSUM |
4923                                    IGB_TX_FLAGS_IPV4;
4924         } else {
4925                 ip.v6->payload_len = 0;
4926                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4927                                    IGB_TX_FLAGS_CSUM;
4928         }
4929
4930         /* determine offset of inner transport header */
4931         l4_offset = l4.hdr - skb->data;
4932
4933         /* compute length of segmentation header */
4934         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
4935
4936         /* remove payload length from inner checksum */
4937         paylen = skb->len - l4_offset;
4938         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
4939
4940         /* update gso size and bytecount with header size */
4941         first->gso_segs = skb_shinfo(skb)->gso_segs;
4942         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4943
4944         /* MSS L4LEN IDX */
4945         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
4946         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4947
4948         /* VLAN MACLEN IPLEN */
4949         vlan_macip_lens = l4.hdr - ip.hdr;
4950         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
4951         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4952
4953         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4954
4955         return 1;
4956 }
4957
4958 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
4959 {
4960         unsigned int offset = 0;
4961
4962         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
4963
4964         return offset == skb_checksum_start_offset(skb);
4965 }
4966
4967 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4968 {
4969         struct sk_buff *skb = first->skb;
4970         u32 vlan_macip_lens = 0;
4971         u32 type_tucmd = 0;
4972
4973         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4974 csum_failed:
4975                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4976                         return;
4977                 goto no_csum;
4978         }
4979
4980         switch (skb->csum_offset) {
4981         case offsetof(struct tcphdr, check):
4982                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4983                 /* fall through */
4984         case offsetof(struct udphdr, check):
4985                 break;
4986         case offsetof(struct sctphdr, checksum):
4987                 /* validate that this is actually an SCTP request */
4988                 if (((first->protocol == htons(ETH_P_IP)) &&
4989                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
4990                     ((first->protocol == htons(ETH_P_IPV6)) &&
4991                      igb_ipv6_csum_is_sctp(skb))) {
4992                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
4993                         break;
4994                 }
4995         default:
4996                 skb_checksum_help(skb);
4997                 goto csum_failed;
4998         }
4999
5000         /* update TX checksum flag */
5001         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5002         vlan_macip_lens = skb_checksum_start_offset(skb) -
5003                           skb_network_offset(skb);
5004 no_csum:
5005         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5006         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5007
5008         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, 0);
5009 }
5010
5011 #define IGB_SET_FLAG(_input, _flag, _result) \
5012         ((_flag <= _result) ? \
5013          ((u32)(_input & _flag) * (_result / _flag)) : \
5014          ((u32)(_input & _flag) / (_flag / _result)))
5015
5016 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5017 {
5018         /* set type for advanced descriptor with frame checksum insertion */
5019         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5020                        E1000_ADVTXD_DCMD_DEXT |
5021                        E1000_ADVTXD_DCMD_IFCS;
5022
5023         /* set HW vlan bit if vlan is present */
5024         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5025                                  (E1000_ADVTXD_DCMD_VLE));
5026
5027         /* set segmentation bits for TSO */
5028         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5029                                  (E1000_ADVTXD_DCMD_TSE));
5030
5031         /* set timestamp bit if present */
5032         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5033                                  (E1000_ADVTXD_MAC_TSTAMP));
5034
5035         /* insert frame checksum */
5036         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5037
5038         return cmd_type;
5039 }
5040
5041 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5042                                  union e1000_adv_tx_desc *tx_desc,
5043                                  u32 tx_flags, unsigned int paylen)
5044 {
5045         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5046
5047         /* 82575 requires a unique index per ring */
5048         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5049                 olinfo_status |= tx_ring->reg_idx << 4;
5050
5051         /* insert L4 checksum */
5052         olinfo_status |= IGB_SET_FLAG(tx_flags,
5053                                       IGB_TX_FLAGS_CSUM,
5054                                       (E1000_TXD_POPTS_TXSM << 8));
5055
5056         /* insert IPv4 checksum */
5057         olinfo_status |= IGB_SET_FLAG(tx_flags,
5058                                       IGB_TX_FLAGS_IPV4,
5059                                       (E1000_TXD_POPTS_IXSM << 8));
5060
5061         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5062 }
5063
5064 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5065 {
5066         struct net_device *netdev = tx_ring->netdev;
5067
5068         netif_stop_subqueue(netdev, tx_ring->queue_index);
5069
5070         /* Herbert's original patch had:
5071          *  smp_mb__after_netif_stop_queue();
5072          * but since that doesn't exist yet, just open code it.
5073          */
5074         smp_mb();
5075
5076         /* We need to check again in a case another CPU has just
5077          * made room available.
5078          */
5079         if (igb_desc_unused(tx_ring) < size)
5080                 return -EBUSY;
5081
5082         /* A reprieve! */
5083         netif_wake_subqueue(netdev, tx_ring->queue_index);
5084
5085         u64_stats_update_begin(&tx_ring->tx_syncp2);
5086         tx_ring->tx_stats.restart_queue2++;
5087         u64_stats_update_end(&tx_ring->tx_syncp2);
5088
5089         return 0;
5090 }
5091
5092 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5093 {
5094         if (igb_desc_unused(tx_ring) >= size)
5095                 return 0;
5096         return __igb_maybe_stop_tx(tx_ring, size);
5097 }
5098
5099 static void igb_tx_map(struct igb_ring *tx_ring,
5100                        struct igb_tx_buffer *first,
5101                        const u8 hdr_len)
5102 {
5103         struct sk_buff *skb = first->skb;
5104         struct igb_tx_buffer *tx_buffer;
5105         union e1000_adv_tx_desc *tx_desc;
5106         struct skb_frag_struct *frag;
5107         dma_addr_t dma;
5108         unsigned int data_len, size;
5109         u32 tx_flags = first->tx_flags;
5110         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5111         u16 i = tx_ring->next_to_use;
5112
5113         tx_desc = IGB_TX_DESC(tx_ring, i);
5114
5115         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5116
5117         size = skb_headlen(skb);
5118         data_len = skb->data_len;
5119
5120         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5121
5122         tx_buffer = first;
5123
5124         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5125                 if (dma_mapping_error(tx_ring->dev, dma))
5126                         goto dma_error;
5127
5128                 /* record length, and DMA address */
5129                 dma_unmap_len_set(tx_buffer, len, size);
5130                 dma_unmap_addr_set(tx_buffer, dma, dma);
5131
5132                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5133
5134                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5135                         tx_desc->read.cmd_type_len =
5136                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5137
5138                         i++;
5139                         tx_desc++;
5140                         if (i == tx_ring->count) {
5141                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5142                                 i = 0;
5143                         }
5144                         tx_desc->read.olinfo_status = 0;
5145
5146                         dma += IGB_MAX_DATA_PER_TXD;
5147                         size -= IGB_MAX_DATA_PER_TXD;
5148
5149                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5150                 }
5151
5152                 if (likely(!data_len))
5153                         break;
5154
5155                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5156
5157                 i++;
5158                 tx_desc++;
5159                 if (i == tx_ring->count) {
5160                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5161                         i = 0;
5162                 }
5163                 tx_desc->read.olinfo_status = 0;
5164
5165                 size = skb_frag_size(frag);
5166                 data_len -= size;
5167
5168                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5169                                        size, DMA_TO_DEVICE);
5170
5171                 tx_buffer = &tx_ring->tx_buffer_info[i];
5172         }
5173
5174         /* write last descriptor with RS and EOP bits */
5175         cmd_type |= size | IGB_TXD_DCMD;
5176         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5177
5178         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5179
5180         /* set the timestamp */
5181         first->time_stamp = jiffies;
5182
5183         /* Force memory writes to complete before letting h/w know there
5184          * are new descriptors to fetch.  (Only applicable for weak-ordered
5185          * memory model archs, such as IA-64).
5186          *
5187          * We also need this memory barrier to make certain all of the
5188          * status bits have been updated before next_to_watch is written.
5189          */
5190         wmb();
5191
5192         /* set next_to_watch value indicating a packet is present */
5193         first->next_to_watch = tx_desc;
5194
5195         i++;
5196         if (i == tx_ring->count)
5197                 i = 0;
5198
5199         tx_ring->next_to_use = i;
5200
5201         /* Make sure there is space in the ring for the next send. */
5202         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5203
5204         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
5205                 writel(i, tx_ring->tail);
5206
5207                 /* we need this if more than one processor can write to our tail
5208                  * at a time, it synchronizes IO on IA64/Altix systems
5209                  */
5210                 mmiowb();
5211         }
5212         return;
5213
5214 dma_error:
5215         dev_err(tx_ring->dev, "TX DMA map failed\n");
5216
5217         /* clear dma mappings for failed tx_buffer_info map */
5218         for (;;) {
5219                 tx_buffer = &tx_ring->tx_buffer_info[i];
5220                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5221                 if (tx_buffer == first)
5222                         break;
5223                 if (i == 0)
5224                         i = tx_ring->count;
5225                 i--;
5226         }
5227
5228         tx_ring->next_to_use = i;
5229 }
5230
5231 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5232                                 struct igb_ring *tx_ring)
5233 {
5234         struct igb_tx_buffer *first;
5235         int tso;
5236         u32 tx_flags = 0;
5237         unsigned short f;
5238         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5239         __be16 protocol = vlan_get_protocol(skb);
5240         u8 hdr_len = 0;
5241
5242         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5243          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5244          *       + 2 desc gap to keep tail from touching head,
5245          *       + 1 desc for context descriptor,
5246          * otherwise try next time
5247          */
5248         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5249                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5250
5251         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5252                 /* this is a hard error */
5253                 return NETDEV_TX_BUSY;
5254         }
5255
5256         /* record the location of the first descriptor for this packet */
5257         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5258         first->skb = skb;
5259         first->bytecount = skb->len;
5260         first->gso_segs = 1;
5261
5262         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5263                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5264
5265                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5266                                            &adapter->state)) {
5267                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5268                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5269
5270                         adapter->ptp_tx_skb = skb_get(skb);
5271                         adapter->ptp_tx_start = jiffies;
5272                         if (adapter->hw.mac.type == e1000_82576)
5273                                 schedule_work(&adapter->ptp_tx_work);
5274                 }
5275         }
5276
5277         skb_tx_timestamp(skb);
5278
5279         if (skb_vlan_tag_present(skb)) {
5280                 tx_flags |= IGB_TX_FLAGS_VLAN;
5281                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5282         }
5283
5284         /* record initial flags and protocol */
5285         first->tx_flags = tx_flags;
5286         first->protocol = protocol;
5287
5288         tso = igb_tso(tx_ring, first, &hdr_len);
5289         if (tso < 0)
5290                 goto out_drop;
5291         else if (!tso)
5292                 igb_tx_csum(tx_ring, first);
5293
5294         igb_tx_map(tx_ring, first, hdr_len);
5295
5296         return NETDEV_TX_OK;
5297
5298 out_drop:
5299         igb_unmap_and_free_tx_resource(tx_ring, first);
5300
5301         return NETDEV_TX_OK;
5302 }
5303
5304 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5305                                                     struct sk_buff *skb)
5306 {
5307         unsigned int r_idx = skb->queue_mapping;
5308
5309         if (r_idx >= adapter->num_tx_queues)
5310                 r_idx = r_idx % adapter->num_tx_queues;
5311
5312         return adapter->tx_ring[r_idx];
5313 }
5314
5315 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5316                                   struct net_device *netdev)
5317 {
5318         struct igb_adapter *adapter = netdev_priv(netdev);
5319
5320         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5321          * in order to meet this minimum size requirement.
5322          */
5323         if (skb_put_padto(skb, 17))
5324                 return NETDEV_TX_OK;
5325
5326         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5327 }
5328
5329 /**
5330  *  igb_tx_timeout - Respond to a Tx Hang
5331  *  @netdev: network interface device structure
5332  **/
5333 static void igb_tx_timeout(struct net_device *netdev)
5334 {
5335         struct igb_adapter *adapter = netdev_priv(netdev);
5336         struct e1000_hw *hw = &adapter->hw;
5337
5338         /* Do the reset outside of interrupt context */
5339         adapter->tx_timeout_count++;
5340
5341         if (hw->mac.type >= e1000_82580)
5342                 hw->dev_spec._82575.global_device_reset = true;
5343
5344         schedule_work(&adapter->reset_task);
5345         wr32(E1000_EICS,
5346              (adapter->eims_enable_mask & ~adapter->eims_other));
5347 }
5348
5349 static void igb_reset_task(struct work_struct *work)
5350 {
5351         struct igb_adapter *adapter;
5352         adapter = container_of(work, struct igb_adapter, reset_task);
5353
5354         igb_dump(adapter);
5355         netdev_err(adapter->netdev, "Reset adapter\n");
5356         igb_reinit_locked(adapter);
5357 }
5358
5359 /**
5360  *  igb_get_stats64 - Get System Network Statistics
5361  *  @netdev: network interface device structure
5362  *  @stats: rtnl_link_stats64 pointer
5363  **/
5364 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5365                                                 struct rtnl_link_stats64 *stats)
5366 {
5367         struct igb_adapter *adapter = netdev_priv(netdev);
5368
5369         spin_lock(&adapter->stats64_lock);
5370         igb_update_stats(adapter, &adapter->stats64);
5371         memcpy(stats, &adapter->stats64, sizeof(*stats));
5372         spin_unlock(&adapter->stats64_lock);
5373
5374         return stats;
5375 }
5376
5377 /**
5378  *  igb_change_mtu - Change the Maximum Transfer Unit
5379  *  @netdev: network interface device structure
5380  *  @new_mtu: new value for maximum frame size
5381  *
5382  *  Returns 0 on success, negative on failure
5383  **/
5384 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5385 {
5386         struct igb_adapter *adapter = netdev_priv(netdev);
5387         struct pci_dev *pdev = adapter->pdev;
5388         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5389
5390         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5391                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5392                 return -EINVAL;
5393         }
5394
5395 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5396         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5397                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5398                 return -EINVAL;
5399         }
5400
5401         /* adjust max frame to be at least the size of a standard frame */
5402         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5403                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5404
5405         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5406                 usleep_range(1000, 2000);
5407
5408         /* igb_down has a dependency on max_frame_size */
5409         adapter->max_frame_size = max_frame;
5410
5411         if (netif_running(netdev))
5412                 igb_down(adapter);
5413
5414         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5415                  netdev->mtu, new_mtu);
5416         netdev->mtu = new_mtu;
5417
5418         if (netif_running(netdev))
5419                 igb_up(adapter);
5420         else
5421                 igb_reset(adapter);
5422
5423         clear_bit(__IGB_RESETTING, &adapter->state);
5424
5425         return 0;
5426 }
5427
5428 /**
5429  *  igb_update_stats - Update the board statistics counters
5430  *  @adapter: board private structure
5431  **/
5432 void igb_update_stats(struct igb_adapter *adapter,
5433                       struct rtnl_link_stats64 *net_stats)
5434 {
5435         struct e1000_hw *hw = &adapter->hw;
5436         struct pci_dev *pdev = adapter->pdev;
5437         u32 reg, mpc;
5438         int i;
5439         u64 bytes, packets;
5440         unsigned int start;
5441         u64 _bytes, _packets;
5442
5443         /* Prevent stats update while adapter is being reset, or if the pci
5444          * connection is down.
5445          */
5446         if (adapter->link_speed == 0)
5447                 return;
5448         if (pci_channel_offline(pdev))
5449                 return;
5450
5451         bytes = 0;
5452         packets = 0;
5453
5454         rcu_read_lock();
5455         for (i = 0; i < adapter->num_rx_queues; i++) {
5456                 struct igb_ring *ring = adapter->rx_ring[i];
5457                 u32 rqdpc = rd32(E1000_RQDPC(i));
5458                 if (hw->mac.type >= e1000_i210)
5459                         wr32(E1000_RQDPC(i), 0);
5460
5461                 if (rqdpc) {
5462                         ring->rx_stats.drops += rqdpc;
5463                         net_stats->rx_fifo_errors += rqdpc;
5464                 }
5465
5466                 do {
5467                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5468                         _bytes = ring->rx_stats.bytes;
5469                         _packets = ring->rx_stats.packets;
5470                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5471                 bytes += _bytes;
5472                 packets += _packets;
5473         }
5474
5475         net_stats->rx_bytes = bytes;
5476         net_stats->rx_packets = packets;
5477
5478         bytes = 0;
5479         packets = 0;
5480         for (i = 0; i < adapter->num_tx_queues; i++) {
5481                 struct igb_ring *ring = adapter->tx_ring[i];
5482                 do {
5483                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5484                         _bytes = ring->tx_stats.bytes;
5485                         _packets = ring->tx_stats.packets;
5486                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5487                 bytes += _bytes;
5488                 packets += _packets;
5489         }
5490         net_stats->tx_bytes = bytes;
5491         net_stats->tx_packets = packets;
5492         rcu_read_unlock();
5493
5494         /* read stats registers */
5495         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5496         adapter->stats.gprc += rd32(E1000_GPRC);
5497         adapter->stats.gorc += rd32(E1000_GORCL);
5498         rd32(E1000_GORCH); /* clear GORCL */
5499         adapter->stats.bprc += rd32(E1000_BPRC);
5500         adapter->stats.mprc += rd32(E1000_MPRC);
5501         adapter->stats.roc += rd32(E1000_ROC);
5502
5503         adapter->stats.prc64 += rd32(E1000_PRC64);
5504         adapter->stats.prc127 += rd32(E1000_PRC127);
5505         adapter->stats.prc255 += rd32(E1000_PRC255);
5506         adapter->stats.prc511 += rd32(E1000_PRC511);
5507         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5508         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5509         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5510         adapter->stats.sec += rd32(E1000_SEC);
5511
5512         mpc = rd32(E1000_MPC);
5513         adapter->stats.mpc += mpc;
5514         net_stats->rx_fifo_errors += mpc;
5515         adapter->stats.scc += rd32(E1000_SCC);
5516         adapter->stats.ecol += rd32(E1000_ECOL);
5517         adapter->stats.mcc += rd32(E1000_MCC);
5518         adapter->stats.latecol += rd32(E1000_LATECOL);
5519         adapter->stats.dc += rd32(E1000_DC);
5520         adapter->stats.rlec += rd32(E1000_RLEC);
5521         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5522         adapter->stats.xontxc += rd32(E1000_XONTXC);
5523         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5524         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5525         adapter->stats.fcruc += rd32(E1000_FCRUC);
5526         adapter->stats.gptc += rd32(E1000_GPTC);
5527         adapter->stats.gotc += rd32(E1000_GOTCL);
5528         rd32(E1000_GOTCH); /* clear GOTCL */
5529         adapter->stats.rnbc += rd32(E1000_RNBC);
5530         adapter->stats.ruc += rd32(E1000_RUC);
5531         adapter->stats.rfc += rd32(E1000_RFC);
5532         adapter->stats.rjc += rd32(E1000_RJC);
5533         adapter->stats.tor += rd32(E1000_TORH);
5534         adapter->stats.tot += rd32(E1000_TOTH);
5535         adapter->stats.tpr += rd32(E1000_TPR);
5536
5537         adapter->stats.ptc64 += rd32(E1000_PTC64);
5538         adapter->stats.ptc127 += rd32(E1000_PTC127);
5539         adapter->stats.ptc255 += rd32(E1000_PTC255);
5540         adapter->stats.ptc511 += rd32(E1000_PTC511);
5541         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5542         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5543
5544         adapter->stats.mptc += rd32(E1000_MPTC);
5545         adapter->stats.bptc += rd32(E1000_BPTC);
5546
5547         adapter->stats.tpt += rd32(E1000_TPT);
5548         adapter->stats.colc += rd32(E1000_COLC);
5549
5550         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5551         /* read internal phy specific stats */
5552         reg = rd32(E1000_CTRL_EXT);
5553         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5554                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5555
5556                 /* this stat has invalid values on i210/i211 */
5557                 if ((hw->mac.type != e1000_i210) &&
5558                     (hw->mac.type != e1000_i211))
5559                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5560         }
5561
5562         adapter->stats.tsctc += rd32(E1000_TSCTC);
5563         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5564
5565         adapter->stats.iac += rd32(E1000_IAC);
5566         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5567         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5568         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5569         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5570         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5571         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5572         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5573         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5574
5575         /* Fill out the OS statistics structure */
5576         net_stats->multicast = adapter->stats.mprc;
5577         net_stats->collisions = adapter->stats.colc;
5578
5579         /* Rx Errors */
5580
5581         /* RLEC on some newer hardware can be incorrect so build
5582          * our own version based on RUC and ROC
5583          */
5584         net_stats->rx_errors = adapter->stats.rxerrc +
5585                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5586                 adapter->stats.ruc + adapter->stats.roc +
5587                 adapter->stats.cexterr;
5588         net_stats->rx_length_errors = adapter->stats.ruc +
5589                                       adapter->stats.roc;
5590         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5591         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5592         net_stats->rx_missed_errors = adapter->stats.mpc;
5593
5594         /* Tx Errors */
5595         net_stats->tx_errors = adapter->stats.ecol +
5596                                adapter->stats.latecol;
5597         net_stats->tx_aborted_errors = adapter->stats.ecol;
5598         net_stats->tx_window_errors = adapter->stats.latecol;
5599         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5600
5601         /* Tx Dropped needs to be maintained elsewhere */
5602
5603         /* Management Stats */
5604         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5605         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5606         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5607
5608         /* OS2BMC Stats */
5609         reg = rd32(E1000_MANC);
5610         if (reg & E1000_MANC_EN_BMC2OS) {
5611                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5612                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5613                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5614                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5615         }
5616 }
5617
5618 static void igb_tsync_interrupt(struct igb_adapter *adapter)
5619 {
5620         struct e1000_hw *hw = &adapter->hw;
5621         struct ptp_clock_event event;
5622         struct timespec64 ts;
5623         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
5624
5625         if (tsicr & TSINTR_SYS_WRAP) {
5626                 event.type = PTP_CLOCK_PPS;
5627                 if (adapter->ptp_caps.pps)
5628                         ptp_clock_event(adapter->ptp_clock, &event);
5629                 else
5630                         dev_err(&adapter->pdev->dev, "unexpected SYS WRAP");
5631                 ack |= TSINTR_SYS_WRAP;
5632         }
5633
5634         if (tsicr & E1000_TSICR_TXTS) {
5635                 /* retrieve hardware timestamp */
5636                 schedule_work(&adapter->ptp_tx_work);
5637                 ack |= E1000_TSICR_TXTS;
5638         }
5639
5640         if (tsicr & TSINTR_TT0) {
5641                 spin_lock(&adapter->tmreg_lock);
5642                 ts = timespec64_add(adapter->perout[0].start,
5643                                     adapter->perout[0].period);
5644                 /* u32 conversion of tv_sec is safe until y2106 */
5645                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
5646                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
5647                 tsauxc = rd32(E1000_TSAUXC);
5648                 tsauxc |= TSAUXC_EN_TT0;
5649                 wr32(E1000_TSAUXC, tsauxc);
5650                 adapter->perout[0].start = ts;
5651                 spin_unlock(&adapter->tmreg_lock);
5652                 ack |= TSINTR_TT0;
5653         }
5654
5655         if (tsicr & TSINTR_TT1) {
5656                 spin_lock(&adapter->tmreg_lock);
5657                 ts = timespec64_add(adapter->perout[1].start,
5658                                     adapter->perout[1].period);
5659                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
5660                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
5661                 tsauxc = rd32(E1000_TSAUXC);
5662                 tsauxc |= TSAUXC_EN_TT1;
5663                 wr32(E1000_TSAUXC, tsauxc);
5664                 adapter->perout[1].start = ts;
5665                 spin_unlock(&adapter->tmreg_lock);
5666                 ack |= TSINTR_TT1;
5667         }
5668
5669         if (tsicr & TSINTR_AUTT0) {
5670                 nsec = rd32(E1000_AUXSTMPL0);
5671                 sec  = rd32(E1000_AUXSTMPH0);
5672                 event.type = PTP_CLOCK_EXTTS;
5673                 event.index = 0;
5674                 event.timestamp = sec * 1000000000ULL + nsec;
5675                 ptp_clock_event(adapter->ptp_clock, &event);
5676                 ack |= TSINTR_AUTT0;
5677         }
5678
5679         if (tsicr & TSINTR_AUTT1) {
5680                 nsec = rd32(E1000_AUXSTMPL1);
5681                 sec  = rd32(E1000_AUXSTMPH1);
5682                 event.type = PTP_CLOCK_EXTTS;
5683                 event.index = 1;
5684                 event.timestamp = sec * 1000000000ULL + nsec;
5685                 ptp_clock_event(adapter->ptp_clock, &event);
5686                 ack |= TSINTR_AUTT1;
5687         }
5688
5689         /* acknowledge the interrupts */
5690         wr32(E1000_TSICR, ack);
5691 }
5692
5693 static irqreturn_t igb_msix_other(int irq, void *data)
5694 {
5695         struct igb_adapter *adapter = data;
5696         struct e1000_hw *hw = &adapter->hw;
5697         u32 icr = rd32(E1000_ICR);
5698         /* reading ICR causes bit 31 of EICR to be cleared */
5699
5700         if (icr & E1000_ICR_DRSTA)
5701                 schedule_work(&adapter->reset_task);
5702
5703         if (icr & E1000_ICR_DOUTSYNC) {
5704                 /* HW is reporting DMA is out of sync */
5705                 adapter->stats.doosync++;
5706                 /* The DMA Out of Sync is also indication of a spoof event
5707                  * in IOV mode. Check the Wrong VM Behavior register to
5708                  * see if it is really a spoof event.
5709                  */
5710                 igb_check_wvbr(adapter);
5711         }
5712
5713         /* Check for a mailbox event */
5714         if (icr & E1000_ICR_VMMB)
5715                 igb_msg_task(adapter);
5716
5717         if (icr & E1000_ICR_LSC) {
5718                 hw->mac.get_link_status = 1;
5719                 /* guard against interrupt when we're going down */
5720                 if (!test_bit(__IGB_DOWN, &adapter->state))
5721                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5722         }
5723
5724         if (icr & E1000_ICR_TS)
5725                 igb_tsync_interrupt(adapter);
5726
5727         wr32(E1000_EIMS, adapter->eims_other);
5728
5729         return IRQ_HANDLED;
5730 }
5731
5732 static void igb_write_itr(struct igb_q_vector *q_vector)
5733 {
5734         struct igb_adapter *adapter = q_vector->adapter;
5735         u32 itr_val = q_vector->itr_val & 0x7FFC;
5736
5737         if (!q_vector->set_itr)
5738                 return;
5739
5740         if (!itr_val)
5741                 itr_val = 0x4;
5742
5743         if (adapter->hw.mac.type == e1000_82575)
5744                 itr_val |= itr_val << 16;
5745         else
5746                 itr_val |= E1000_EITR_CNT_IGNR;
5747
5748         writel(itr_val, q_vector->itr_register);
5749         q_vector->set_itr = 0;
5750 }
5751
5752 static irqreturn_t igb_msix_ring(int irq, void *data)
5753 {
5754         struct igb_q_vector *q_vector = data;
5755
5756         /* Write the ITR value calculated from the previous interrupt. */
5757         igb_write_itr(q_vector);
5758
5759         napi_schedule(&q_vector->napi);
5760
5761         return IRQ_HANDLED;
5762 }
5763
5764 #ifdef CONFIG_IGB_DCA
5765 static void igb_update_tx_dca(struct igb_adapter *adapter,
5766                               struct igb_ring *tx_ring,
5767                               int cpu)
5768 {
5769         struct e1000_hw *hw = &adapter->hw;
5770         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5771
5772         if (hw->mac.type != e1000_82575)
5773                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5774
5775         /* We can enable relaxed ordering for reads, but not writes when
5776          * DCA is enabled.  This is due to a known issue in some chipsets
5777          * which will cause the DCA tag to be cleared.
5778          */
5779         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5780                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5781                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5782
5783         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5784 }
5785
5786 static void igb_update_rx_dca(struct igb_adapter *adapter,
5787                               struct igb_ring *rx_ring,
5788                               int cpu)
5789 {
5790         struct e1000_hw *hw = &adapter->hw;
5791         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5792
5793         if (hw->mac.type != e1000_82575)
5794                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5795
5796         /* We can enable relaxed ordering for reads, but not writes when
5797          * DCA is enabled.  This is due to a known issue in some chipsets
5798          * which will cause the DCA tag to be cleared.
5799          */
5800         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5801                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5802
5803         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5804 }
5805
5806 static void igb_update_dca(struct igb_q_vector *q_vector)
5807 {
5808         struct igb_adapter *adapter = q_vector->adapter;
5809         int cpu = get_cpu();
5810
5811         if (q_vector->cpu == cpu)
5812                 goto out_no_update;
5813
5814         if (q_vector->tx.ring)
5815                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5816
5817         if (q_vector->rx.ring)
5818                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5819
5820         q_vector->cpu = cpu;
5821 out_no_update:
5822         put_cpu();
5823 }
5824
5825 static void igb_setup_dca(struct igb_adapter *adapter)
5826 {
5827         struct e1000_hw *hw = &adapter->hw;
5828         int i;
5829
5830         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5831                 return;
5832
5833         /* Always use CB2 mode, difference is masked in the CB driver. */
5834         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5835
5836         for (i = 0; i < adapter->num_q_vectors; i++) {
5837                 adapter->q_vector[i]->cpu = -1;
5838                 igb_update_dca(adapter->q_vector[i]);
5839         }
5840 }
5841
5842 static int __igb_notify_dca(struct device *dev, void *data)
5843 {
5844         struct net_device *netdev = dev_get_drvdata(dev);
5845         struct igb_adapter *adapter = netdev_priv(netdev);
5846         struct pci_dev *pdev = adapter->pdev;
5847         struct e1000_hw *hw = &adapter->hw;
5848         unsigned long event = *(unsigned long *)data;
5849
5850         switch (event) {
5851         case DCA_PROVIDER_ADD:
5852                 /* if already enabled, don't do it again */
5853                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5854                         break;
5855                 if (dca_add_requester(dev) == 0) {
5856                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5857                         dev_info(&pdev->dev, "DCA enabled\n");
5858                         igb_setup_dca(adapter);
5859                         break;
5860                 }
5861                 /* Fall Through since DCA is disabled. */
5862         case DCA_PROVIDER_REMOVE:
5863                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5864                         /* without this a class_device is left
5865                          * hanging around in the sysfs model
5866                          */
5867                         dca_remove_requester(dev);
5868                         dev_info(&pdev->dev, "DCA disabled\n");
5869                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5870                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5871                 }
5872                 break;
5873         }
5874
5875         return 0;
5876 }
5877
5878 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5879                           void *p)
5880 {
5881         int ret_val;
5882
5883         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5884                                          __igb_notify_dca);
5885
5886         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5887 }
5888 #endif /* CONFIG_IGB_DCA */
5889
5890 #ifdef CONFIG_PCI_IOV
5891 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5892 {
5893         unsigned char mac_addr[ETH_ALEN];
5894
5895         eth_zero_addr(mac_addr);
5896         igb_set_vf_mac(adapter, vf, mac_addr);
5897
5898         /* By default spoof check is enabled for all VFs */
5899         adapter->vf_data[vf].spoofchk_enabled = true;
5900
5901         return 0;
5902 }
5903
5904 #endif
5905 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5906 {
5907         struct e1000_hw *hw = &adapter->hw;
5908         u32 ping;
5909         int i;
5910
5911         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5912                 ping = E1000_PF_CONTROL_MSG;
5913                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5914                         ping |= E1000_VT_MSGTYPE_CTS;
5915                 igb_write_mbx(hw, &ping, 1, i);
5916         }
5917 }
5918
5919 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5920 {
5921         struct e1000_hw *hw = &adapter->hw;
5922         u32 vmolr = rd32(E1000_VMOLR(vf));
5923         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5924
5925         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5926                             IGB_VF_FLAG_MULTI_PROMISC);
5927         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5928
5929         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5930                 vmolr |= E1000_VMOLR_MPME;
5931                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5932                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5933         } else {
5934                 /* if we have hashes and we are clearing a multicast promisc
5935                  * flag we need to write the hashes to the MTA as this step
5936                  * was previously skipped
5937                  */
5938                 if (vf_data->num_vf_mc_hashes > 30) {
5939                         vmolr |= E1000_VMOLR_MPME;
5940                 } else if (vf_data->num_vf_mc_hashes) {
5941                         int j;
5942
5943                         vmolr |= E1000_VMOLR_ROMPE;
5944                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5945                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5946                 }
5947         }
5948
5949         wr32(E1000_VMOLR(vf), vmolr);
5950
5951         /* there are flags left unprocessed, likely not supported */
5952         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5953                 return -EINVAL;
5954
5955         return 0;
5956 }
5957
5958 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5959                                   u32 *msgbuf, u32 vf)
5960 {
5961         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5962         u16 *hash_list = (u16 *)&msgbuf[1];
5963         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5964         int i;
5965
5966         /* salt away the number of multicast addresses assigned
5967          * to this VF for later use to restore when the PF multi cast
5968          * list changes
5969          */
5970         vf_data->num_vf_mc_hashes = n;
5971
5972         /* only up to 30 hash values supported */
5973         if (n > 30)
5974                 n = 30;
5975
5976         /* store the hashes for later use */
5977         for (i = 0; i < n; i++)
5978                 vf_data->vf_mc_hashes[i] = hash_list[i];
5979
5980         /* Flush and reset the mta with the new values */
5981         igb_set_rx_mode(adapter->netdev);
5982
5983         return 0;
5984 }
5985
5986 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5987 {
5988         struct e1000_hw *hw = &adapter->hw;
5989         struct vf_data_storage *vf_data;
5990         int i, j;
5991
5992         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5993                 u32 vmolr = rd32(E1000_VMOLR(i));
5994
5995                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5996
5997                 vf_data = &adapter->vf_data[i];
5998
5999                 if ((vf_data->num_vf_mc_hashes > 30) ||
6000                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6001                         vmolr |= E1000_VMOLR_MPME;
6002                 } else if (vf_data->num_vf_mc_hashes) {
6003                         vmolr |= E1000_VMOLR_ROMPE;
6004                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6005                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6006                 }
6007                 wr32(E1000_VMOLR(i), vmolr);
6008         }
6009 }
6010
6011 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6012 {
6013         struct e1000_hw *hw = &adapter->hw;
6014         u32 pool_mask, vlvf_mask, i;
6015
6016         /* create mask for VF and other pools */
6017         pool_mask = E1000_VLVF_POOLSEL_MASK;
6018         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6019
6020         /* drop PF from pool bits */
6021         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6022                              adapter->vfs_allocated_count);
6023
6024         /* Find the vlan filter for this id */
6025         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6026                 u32 vlvf = rd32(E1000_VLVF(i));
6027                 u32 vfta_mask, vid, vfta;
6028
6029                 /* remove the vf from the pool */
6030                 if (!(vlvf & vlvf_mask))
6031                         continue;
6032
6033                 /* clear out bit from VLVF */
6034                 vlvf ^= vlvf_mask;
6035
6036                 /* if other pools are present, just remove ourselves */
6037                 if (vlvf & pool_mask)
6038                         goto update_vlvfb;
6039
6040                 /* if PF is present, leave VFTA */
6041                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6042                         goto update_vlvf;
6043
6044                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6045                 vfta_mask = BIT(vid % 32);
6046
6047                 /* clear bit from VFTA */
6048                 vfta = adapter->shadow_vfta[vid / 32];
6049                 if (vfta & vfta_mask)
6050                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6051 update_vlvf:
6052                 /* clear pool selection enable */
6053                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6054                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6055                 else
6056                         vlvf = 0;
6057 update_vlvfb:
6058                 /* clear pool bits */
6059                 wr32(E1000_VLVF(i), vlvf);
6060         }
6061 }
6062
6063 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6064 {
6065         u32 vlvf;
6066         int idx;
6067
6068         /* short cut the special case */
6069         if (vlan == 0)
6070                 return 0;
6071
6072         /* Search for the VLAN id in the VLVF entries */
6073         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6074                 vlvf = rd32(E1000_VLVF(idx));
6075                 if ((vlvf & VLAN_VID_MASK) == vlan)
6076                         break;
6077         }
6078
6079         return idx;
6080 }
6081
6082 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6083 {
6084         struct e1000_hw *hw = &adapter->hw;
6085         u32 bits, pf_id;
6086         int idx;
6087
6088         idx = igb_find_vlvf_entry(hw, vid);
6089         if (!idx)
6090                 return;
6091
6092         /* See if any other pools are set for this VLAN filter
6093          * entry other than the PF.
6094          */
6095         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6096         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6097         bits &= rd32(E1000_VLVF(idx));
6098
6099         /* Disable the filter so this falls into the default pool. */
6100         if (!bits) {
6101                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6102                         wr32(E1000_VLVF(idx), BIT(pf_id));
6103                 else
6104                         wr32(E1000_VLVF(idx), 0);
6105         }
6106 }
6107
6108 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6109                            bool add, u32 vf)
6110 {
6111         int pf_id = adapter->vfs_allocated_count;
6112         struct e1000_hw *hw = &adapter->hw;
6113         int err;
6114
6115         /* If VLAN overlaps with one the PF is currently monitoring make
6116          * sure that we are able to allocate a VLVF entry.  This may be
6117          * redundant but it guarantees PF will maintain visibility to
6118          * the VLAN.
6119          */
6120         if (add && test_bit(vid, adapter->active_vlans)) {
6121                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6122                 if (err)
6123                         return err;
6124         }
6125
6126         err = igb_vfta_set(hw, vid, vf, add, false);
6127
6128         if (add && !err)
6129                 return err;
6130
6131         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6132          * we may need to drop the PF pool bit in order to allow us to free
6133          * up the VLVF resources.
6134          */
6135         if (test_bit(vid, adapter->active_vlans) ||
6136             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6137                 igb_update_pf_vlvf(adapter, vid);
6138
6139         return err;
6140 }
6141
6142 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6143 {
6144         struct e1000_hw *hw = &adapter->hw;
6145
6146         if (vid)
6147                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6148         else
6149                 wr32(E1000_VMVIR(vf), 0);
6150 }
6151
6152 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
6153                                 u16 vlan, u8 qos)
6154 {
6155         int err;
6156
6157         err = igb_set_vf_vlan(adapter, vlan, true, vf);
6158         if (err)
6159                 return err;
6160
6161         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6162         igb_set_vmolr(adapter, vf, !vlan);
6163
6164         /* revoke access to previous VLAN */
6165         if (vlan != adapter->vf_data[vf].pf_vlan)
6166                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6167                                 false, vf);
6168
6169         adapter->vf_data[vf].pf_vlan = vlan;
6170         adapter->vf_data[vf].pf_qos = qos;
6171         igb_set_vf_vlan_strip(adapter, vf, true);
6172         dev_info(&adapter->pdev->dev,
6173                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6174         if (test_bit(__IGB_DOWN, &adapter->state)) {
6175                 dev_warn(&adapter->pdev->dev,
6176                          "The VF VLAN has been set, but the PF device is not up.\n");
6177                 dev_warn(&adapter->pdev->dev,
6178                          "Bring the PF device up before attempting to use the VF device.\n");
6179         }
6180
6181         return err;
6182 }
6183
6184 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
6185 {
6186         /* Restore tagless access via VLAN 0 */
6187         igb_set_vf_vlan(adapter, 0, true, vf);
6188
6189         igb_set_vmvir(adapter, 0, vf);
6190         igb_set_vmolr(adapter, vf, true);
6191
6192         /* Remove any PF assigned VLAN */
6193         if (adapter->vf_data[vf].pf_vlan)
6194                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
6195                                 false, vf);
6196
6197         adapter->vf_data[vf].pf_vlan = 0;
6198         adapter->vf_data[vf].pf_qos = 0;
6199         igb_set_vf_vlan_strip(adapter, vf, false);
6200
6201         return 0;
6202 }
6203
6204 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6205                                int vf, u16 vlan, u8 qos)
6206 {
6207         struct igb_adapter *adapter = netdev_priv(netdev);
6208
6209         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
6210                 return -EINVAL;
6211
6212         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
6213                                igb_disable_port_vlan(adapter, vf);
6214 }
6215
6216 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6217 {
6218         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6219         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6220         int ret;
6221
6222         if (adapter->vf_data[vf].pf_vlan)
6223                 return -1;
6224
6225         /* VLAN 0 is a special case, don't allow it to be removed */
6226         if (!vid && !add)
6227                 return 0;
6228
6229         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
6230         if (!ret)
6231                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
6232         return ret;
6233 }
6234
6235 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6236 {
6237         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6238
6239         /* clear flags - except flag that indicates PF has set the MAC */
6240         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
6241         vf_data->last_nack = jiffies;
6242
6243         /* reset vlans for device */
6244         igb_clear_vf_vfta(adapter, vf);
6245         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
6246         igb_set_vmvir(adapter, vf_data->pf_vlan |
6247                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
6248         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
6249         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
6250
6251         /* reset multicast table array for vf */
6252         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6253
6254         /* Flush and reset the mta with the new values */
6255         igb_set_rx_mode(adapter->netdev);
6256 }
6257
6258 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6259 {
6260         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6261
6262         /* clear mac address as we were hotplug removed/added */
6263         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6264                 eth_zero_addr(vf_mac);
6265
6266         /* process remaining reset events */
6267         igb_vf_reset(adapter, vf);
6268 }
6269
6270 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6271 {
6272         struct e1000_hw *hw = &adapter->hw;
6273         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6274         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
6275         u32 reg, msgbuf[3];
6276         u8 *addr = (u8 *)(&msgbuf[1]);
6277
6278         /* process all the same items cleared in a function level reset */
6279         igb_vf_reset(adapter, vf);
6280
6281         /* set vf mac address */
6282         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6283
6284         /* enable transmit and receive for vf */
6285         reg = rd32(E1000_VFTE);
6286         wr32(E1000_VFTE, reg | BIT(vf));
6287         reg = rd32(E1000_VFRE);
6288         wr32(E1000_VFRE, reg | BIT(vf));
6289
6290         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6291
6292         /* reply to reset with ack and vf mac address */
6293         if (!is_zero_ether_addr(vf_mac)) {
6294                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6295                 memcpy(addr, vf_mac, ETH_ALEN);
6296         } else {
6297                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
6298         }
6299         igb_write_mbx(hw, msgbuf, 3, vf);
6300 }
6301
6302 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6303 {
6304         /* The VF MAC Address is stored in a packed array of bytes
6305          * starting at the second 32 bit word of the msg array
6306          */
6307         unsigned char *addr = (char *)&msg[1];
6308         int err = -1;
6309
6310         if (is_valid_ether_addr(addr))
6311                 err = igb_set_vf_mac(adapter, vf, addr);
6312
6313         return err;
6314 }
6315
6316 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6317 {
6318         struct e1000_hw *hw = &adapter->hw;
6319         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6320         u32 msg = E1000_VT_MSGTYPE_NACK;
6321
6322         /* if device isn't clear to send it shouldn't be reading either */
6323         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6324             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6325                 igb_write_mbx(hw, &msg, 1, vf);
6326                 vf_data->last_nack = jiffies;
6327         }
6328 }
6329
6330 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6331 {
6332         struct pci_dev *pdev = adapter->pdev;
6333         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6334         struct e1000_hw *hw = &adapter->hw;
6335         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6336         s32 retval;
6337
6338         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6339
6340         if (retval) {
6341                 /* if receive failed revoke VF CTS stats and restart init */
6342                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6343                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6344                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6345                         return;
6346                 goto out;
6347         }
6348
6349         /* this is a message we already processed, do nothing */
6350         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6351                 return;
6352
6353         /* until the vf completes a reset it should not be
6354          * allowed to start any configuration.
6355          */
6356         if (msgbuf[0] == E1000_VF_RESET) {
6357                 igb_vf_reset_msg(adapter, vf);
6358                 return;
6359         }
6360
6361         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6362                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6363                         return;
6364                 retval = -1;
6365                 goto out;
6366         }
6367
6368         switch ((msgbuf[0] & 0xFFFF)) {
6369         case E1000_VF_SET_MAC_ADDR:
6370                 retval = -EINVAL;
6371                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6372                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6373                 else
6374                         dev_warn(&pdev->dev,
6375                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6376                                  vf);
6377                 break;
6378         case E1000_VF_SET_PROMISC:
6379                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6380                 break;
6381         case E1000_VF_SET_MULTICAST:
6382                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6383                 break;
6384         case E1000_VF_SET_LPE:
6385                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6386                 break;
6387         case E1000_VF_SET_VLAN:
6388                 retval = -1;
6389                 if (vf_data->pf_vlan)
6390                         dev_warn(&pdev->dev,
6391                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6392                                  vf);
6393                 else
6394                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
6395                 break;
6396         default:
6397                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6398                 retval = -1;
6399                 break;
6400         }
6401
6402         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6403 out:
6404         /* notify the VF of the results of what it sent us */
6405         if (retval)
6406                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6407         else
6408                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6409
6410         igb_write_mbx(hw, msgbuf, 1, vf);
6411 }
6412
6413 static void igb_msg_task(struct igb_adapter *adapter)
6414 {
6415         struct e1000_hw *hw = &adapter->hw;
6416         u32 vf;
6417
6418         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6419                 /* process any reset requests */
6420                 if (!igb_check_for_rst(hw, vf))
6421                         igb_vf_reset_event(adapter, vf);
6422
6423                 /* process any messages pending */
6424                 if (!igb_check_for_msg(hw, vf))
6425                         igb_rcv_msg_from_vf(adapter, vf);
6426
6427                 /* process any acks */
6428                 if (!igb_check_for_ack(hw, vf))
6429                         igb_rcv_ack_from_vf(adapter, vf);
6430         }
6431 }
6432
6433 /**
6434  *  igb_set_uta - Set unicast filter table address
6435  *  @adapter: board private structure
6436  *  @set: boolean indicating if we are setting or clearing bits
6437  *
6438  *  The unicast table address is a register array of 32-bit registers.
6439  *  The table is meant to be used in a way similar to how the MTA is used
6440  *  however due to certain limitations in the hardware it is necessary to
6441  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6442  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6443  **/
6444 static void igb_set_uta(struct igb_adapter *adapter, bool set)
6445 {
6446         struct e1000_hw *hw = &adapter->hw;
6447         u32 uta = set ? ~0 : 0;
6448         int i;
6449
6450         /* we only need to do this if VMDq is enabled */
6451         if (!adapter->vfs_allocated_count)
6452                 return;
6453
6454         for (i = hw->mac.uta_reg_count; i--;)
6455                 array_wr32(E1000_UTA, i, uta);
6456 }
6457
6458 /**
6459  *  igb_intr_msi - Interrupt Handler
6460  *  @irq: interrupt number
6461  *  @data: pointer to a network interface device structure
6462  **/
6463 static irqreturn_t igb_intr_msi(int irq, void *data)
6464 {
6465         struct igb_adapter *adapter = data;
6466         struct igb_q_vector *q_vector = adapter->q_vector[0];
6467         struct e1000_hw *hw = &adapter->hw;
6468         /* read ICR disables interrupts using IAM */
6469         u32 icr = rd32(E1000_ICR);
6470
6471         igb_write_itr(q_vector);
6472
6473         if (icr & E1000_ICR_DRSTA)
6474                 schedule_work(&adapter->reset_task);
6475
6476         if (icr & E1000_ICR_DOUTSYNC) {
6477                 /* HW is reporting DMA is out of sync */
6478                 adapter->stats.doosync++;
6479         }
6480
6481         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6482                 hw->mac.get_link_status = 1;
6483                 if (!test_bit(__IGB_DOWN, &adapter->state))
6484                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6485         }
6486
6487         if (icr & E1000_ICR_TS)
6488                 igb_tsync_interrupt(adapter);
6489
6490         napi_schedule(&q_vector->napi);
6491
6492         return IRQ_HANDLED;
6493 }
6494
6495 /**
6496  *  igb_intr - Legacy Interrupt Handler
6497  *  @irq: interrupt number
6498  *  @data: pointer to a network interface device structure
6499  **/
6500 static irqreturn_t igb_intr(int irq, void *data)
6501 {
6502         struct igb_adapter *adapter = data;
6503         struct igb_q_vector *q_vector = adapter->q_vector[0];
6504         struct e1000_hw *hw = &adapter->hw;
6505         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6506          * need for the IMC write
6507          */
6508         u32 icr = rd32(E1000_ICR);
6509
6510         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6511          * not set, then the adapter didn't send an interrupt
6512          */
6513         if (!(icr & E1000_ICR_INT_ASSERTED))
6514                 return IRQ_NONE;
6515
6516         igb_write_itr(q_vector);
6517
6518         if (icr & E1000_ICR_DRSTA)
6519                 schedule_work(&adapter->reset_task);
6520
6521         if (icr & E1000_ICR_DOUTSYNC) {
6522                 /* HW is reporting DMA is out of sync */
6523                 adapter->stats.doosync++;
6524         }
6525
6526         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6527                 hw->mac.get_link_status = 1;
6528                 /* guard against interrupt when we're going down */
6529                 if (!test_bit(__IGB_DOWN, &adapter->state))
6530                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6531         }
6532
6533         if (icr & E1000_ICR_TS)
6534                 igb_tsync_interrupt(adapter);
6535
6536         napi_schedule(&q_vector->napi);
6537
6538         return IRQ_HANDLED;
6539 }
6540
6541 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6542 {
6543         struct igb_adapter *adapter = q_vector->adapter;
6544         struct e1000_hw *hw = &adapter->hw;
6545
6546         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6547             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6548                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6549                         igb_set_itr(q_vector);
6550                 else
6551                         igb_update_ring_itr(q_vector);
6552         }
6553
6554         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6555                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6556                         wr32(E1000_EIMS, q_vector->eims_value);
6557                 else
6558                         igb_irq_enable(adapter);
6559         }
6560 }
6561
6562 /**
6563  *  igb_poll - NAPI Rx polling callback
6564  *  @napi: napi polling structure
6565  *  @budget: count of how many packets we should handle
6566  **/
6567 static int igb_poll(struct napi_struct *napi, int budget)
6568 {
6569         struct igb_q_vector *q_vector = container_of(napi,
6570                                                      struct igb_q_vector,
6571                                                      napi);
6572         bool clean_complete = true;
6573         int work_done = 0;
6574
6575 #ifdef CONFIG_IGB_DCA
6576         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6577                 igb_update_dca(q_vector);
6578 #endif
6579         if (q_vector->tx.ring)
6580                 clean_complete = igb_clean_tx_irq(q_vector, budget);
6581
6582         if (q_vector->rx.ring) {
6583                 int cleaned = igb_clean_rx_irq(q_vector, budget);
6584
6585                 work_done += cleaned;
6586                 if (cleaned >= budget)
6587                         clean_complete = false;
6588         }
6589
6590         /* If all work not completed, return budget and keep polling */
6591         if (!clean_complete)
6592                 return budget;
6593
6594         /* If not enough Rx work done, exit the polling mode */
6595         napi_complete_done(napi, work_done);
6596         igb_ring_irq_enable(q_vector);
6597
6598         return 0;
6599 }
6600
6601 /**
6602  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6603  *  @q_vector: pointer to q_vector containing needed info
6604  *  @napi_budget: Used to determine if we are in netpoll
6605  *
6606  *  returns true if ring is completely cleaned
6607  **/
6608 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
6609 {
6610         struct igb_adapter *adapter = q_vector->adapter;
6611         struct igb_ring *tx_ring = q_vector->tx.ring;
6612         struct igb_tx_buffer *tx_buffer;
6613         union e1000_adv_tx_desc *tx_desc;
6614         unsigned int total_bytes = 0, total_packets = 0;
6615         unsigned int budget = q_vector->tx.work_limit;
6616         unsigned int i = tx_ring->next_to_clean;
6617
6618         if (test_bit(__IGB_DOWN, &adapter->state))
6619                 return true;
6620
6621         tx_buffer = &tx_ring->tx_buffer_info[i];
6622         tx_desc = IGB_TX_DESC(tx_ring, i);
6623         i -= tx_ring->count;
6624
6625         do {
6626                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6627
6628                 /* if next_to_watch is not set then there is no work pending */
6629                 if (!eop_desc)
6630                         break;
6631
6632                 /* prevent any other reads prior to eop_desc */
6633                 read_barrier_depends();
6634
6635                 /* if DD is not set pending work has not been completed */
6636                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6637                         break;
6638
6639                 /* clear next_to_watch to prevent false hangs */
6640                 tx_buffer->next_to_watch = NULL;
6641
6642                 /* update the statistics for this packet */
6643                 total_bytes += tx_buffer->bytecount;
6644                 total_packets += tx_buffer->gso_segs;
6645
6646                 /* free the skb */
6647                 napi_consume_skb(tx_buffer->skb, napi_budget);
6648
6649                 /* unmap skb header data */
6650                 dma_unmap_single(tx_ring->dev,
6651                                  dma_unmap_addr(tx_buffer, dma),
6652                                  dma_unmap_len(tx_buffer, len),
6653                                  DMA_TO_DEVICE);
6654
6655                 /* clear tx_buffer data */
6656                 tx_buffer->skb = NULL;
6657                 dma_unmap_len_set(tx_buffer, len, 0);
6658
6659                 /* clear last DMA location and unmap remaining buffers */
6660                 while (tx_desc != eop_desc) {
6661                         tx_buffer++;
6662                         tx_desc++;
6663                         i++;
6664                         if (unlikely(!i)) {
6665                                 i -= tx_ring->count;
6666                                 tx_buffer = tx_ring->tx_buffer_info;
6667                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6668                         }
6669
6670                         /* unmap any remaining paged data */
6671                         if (dma_unmap_len(tx_buffer, len)) {
6672                                 dma_unmap_page(tx_ring->dev,
6673                                                dma_unmap_addr(tx_buffer, dma),
6674                                                dma_unmap_len(tx_buffer, len),
6675                                                DMA_TO_DEVICE);
6676                                 dma_unmap_len_set(tx_buffer, len, 0);
6677                         }
6678                 }
6679
6680                 /* move us one more past the eop_desc for start of next pkt */
6681                 tx_buffer++;
6682                 tx_desc++;
6683                 i++;
6684                 if (unlikely(!i)) {
6685                         i -= tx_ring->count;
6686                         tx_buffer = tx_ring->tx_buffer_info;
6687                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6688                 }
6689
6690                 /* issue prefetch for next Tx descriptor */
6691                 prefetch(tx_desc);
6692
6693                 /* update budget accounting */
6694                 budget--;
6695         } while (likely(budget));
6696
6697         netdev_tx_completed_queue(txring_txq(tx_ring),
6698                                   total_packets, total_bytes);
6699         i += tx_ring->count;
6700         tx_ring->next_to_clean = i;
6701         u64_stats_update_begin(&tx_ring->tx_syncp);
6702         tx_ring->tx_stats.bytes += total_bytes;
6703         tx_ring->tx_stats.packets += total_packets;
6704         u64_stats_update_end(&tx_ring->tx_syncp);
6705         q_vector->tx.total_bytes += total_bytes;
6706         q_vector->tx.total_packets += total_packets;
6707
6708         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6709                 struct e1000_hw *hw = &adapter->hw;
6710
6711                 /* Detect a transmit hang in hardware, this serializes the
6712                  * check with the clearing of time_stamp and movement of i
6713                  */
6714                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6715                 if (tx_buffer->next_to_watch &&
6716                     time_after(jiffies, tx_buffer->time_stamp +
6717                                (adapter->tx_timeout_factor * HZ)) &&
6718                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6719
6720                         /* detected Tx unit hang */
6721                         dev_err(tx_ring->dev,
6722                                 "Detected Tx Unit Hang\n"
6723                                 "  Tx Queue             <%d>\n"
6724                                 "  TDH                  <%x>\n"
6725                                 "  TDT                  <%x>\n"
6726                                 "  next_to_use          <%x>\n"
6727                                 "  next_to_clean        <%x>\n"
6728                                 "buffer_info[next_to_clean]\n"
6729                                 "  time_stamp           <%lx>\n"
6730                                 "  next_to_watch        <%p>\n"
6731                                 "  jiffies              <%lx>\n"
6732                                 "  desc.status          <%x>\n",
6733                                 tx_ring->queue_index,
6734                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6735                                 readl(tx_ring->tail),
6736                                 tx_ring->next_to_use,
6737                                 tx_ring->next_to_clean,
6738                                 tx_buffer->time_stamp,
6739                                 tx_buffer->next_to_watch,
6740                                 jiffies,
6741                                 tx_buffer->next_to_watch->wb.status);
6742                         netif_stop_subqueue(tx_ring->netdev,
6743                                             tx_ring->queue_index);
6744
6745                         /* we are about to reset, no point in enabling stuff */
6746                         return true;
6747                 }
6748         }
6749
6750 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6751         if (unlikely(total_packets &&
6752             netif_carrier_ok(tx_ring->netdev) &&
6753             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6754                 /* Make sure that anybody stopping the queue after this
6755                  * sees the new next_to_clean.
6756                  */
6757                 smp_mb();
6758                 if (__netif_subqueue_stopped(tx_ring->netdev,
6759                                              tx_ring->queue_index) &&
6760                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6761                         netif_wake_subqueue(tx_ring->netdev,
6762                                             tx_ring->queue_index);
6763
6764                         u64_stats_update_begin(&tx_ring->tx_syncp);
6765                         tx_ring->tx_stats.restart_queue++;
6766                         u64_stats_update_end(&tx_ring->tx_syncp);
6767                 }
6768         }
6769
6770         return !!budget;
6771 }
6772
6773 /**
6774  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6775  *  @rx_ring: rx descriptor ring to store buffers on
6776  *  @old_buff: donor buffer to have page reused
6777  *
6778  *  Synchronizes page for reuse by the adapter
6779  **/
6780 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6781                               struct igb_rx_buffer *old_buff)
6782 {
6783         struct igb_rx_buffer *new_buff;
6784         u16 nta = rx_ring->next_to_alloc;
6785
6786         new_buff = &rx_ring->rx_buffer_info[nta];
6787
6788         /* update, and store next to alloc */
6789         nta++;
6790         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6791
6792         /* transfer page from old buffer to new buffer */
6793         *new_buff = *old_buff;
6794
6795         /* sync the buffer for use by the device */
6796         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6797                                          old_buff->page_offset,
6798                                          IGB_RX_BUFSZ,
6799                                          DMA_FROM_DEVICE);
6800 }
6801
6802 static inline bool igb_page_is_reserved(struct page *page)
6803 {
6804         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
6805 }
6806
6807 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6808                                   struct page *page,
6809                                   unsigned int truesize)
6810 {
6811         /* avoid re-using remote pages */
6812         if (unlikely(igb_page_is_reserved(page)))
6813                 return false;
6814
6815 #if (PAGE_SIZE < 8192)
6816         /* if we are only owner of page we can reuse it */
6817         if (unlikely(page_count(page) != 1))
6818                 return false;
6819
6820         /* flip page offset to other buffer */
6821         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6822 #else
6823         /* move offset up to the next cache line */
6824         rx_buffer->page_offset += truesize;
6825
6826         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6827                 return false;
6828 #endif
6829
6830         /* Even if we own the page, we are not allowed to use atomic_set()
6831          * This would break get_page_unless_zero() users.
6832          */
6833         page_ref_inc(page);
6834
6835         return true;
6836 }
6837
6838 /**
6839  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6840  *  @rx_ring: rx descriptor ring to transact packets on
6841  *  @rx_buffer: buffer containing page to add
6842  *  @rx_desc: descriptor containing length of buffer written by hardware
6843  *  @skb: sk_buff to place the data into
6844  *
6845  *  This function will add the data contained in rx_buffer->page to the skb.
6846  *  This is done either through a direct copy if the data in the buffer is
6847  *  less than the skb header size, otherwise it will just attach the page as
6848  *  a frag to the skb.
6849  *
6850  *  The function will then update the page offset if necessary and return
6851  *  true if the buffer can be reused by the adapter.
6852  **/
6853 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6854                             struct igb_rx_buffer *rx_buffer,
6855                             unsigned int size,
6856                             union e1000_adv_rx_desc *rx_desc,
6857                             struct sk_buff *skb)
6858 {
6859         struct page *page = rx_buffer->page;
6860         unsigned char *va = page_address(page) + rx_buffer->page_offset;
6861 #if (PAGE_SIZE < 8192)
6862         unsigned int truesize = IGB_RX_BUFSZ;
6863 #else
6864         unsigned int truesize = SKB_DATA_ALIGN(size);
6865 #endif
6866         unsigned int pull_len;
6867
6868         if (unlikely(skb_is_nonlinear(skb)))
6869                 goto add_tail_frag;
6870
6871         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
6872                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6873                 va += IGB_TS_HDR_LEN;
6874                 size -= IGB_TS_HDR_LEN;
6875         }
6876
6877         if (likely(size <= IGB_RX_HDR_LEN)) {
6878                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6879
6880                 /* page is not reserved, we can reuse buffer as-is */
6881                 if (likely(!igb_page_is_reserved(page)))
6882                         return true;
6883
6884                 /* this page cannot be reused so discard it */
6885                 __free_page(page);
6886                 return false;
6887         }
6888
6889         /* we need the header to contain the greater of either ETH_HLEN or
6890          * 60 bytes if the skb->len is less than 60 for skb_pad.
6891          */
6892         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6893
6894         /* align pull length to size of long to optimize memcpy performance */
6895         memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
6896
6897         /* update all of the pointers */
6898         va += pull_len;
6899         size -= pull_len;
6900
6901 add_tail_frag:
6902         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6903                         (unsigned long)va & ~PAGE_MASK, size, truesize);
6904
6905         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6906 }
6907
6908 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6909                                            union e1000_adv_rx_desc *rx_desc,
6910                                            struct sk_buff *skb)
6911 {
6912         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6913         struct igb_rx_buffer *rx_buffer;
6914         struct page *page;
6915
6916         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6917         page = rx_buffer->page;
6918         prefetchw(page);
6919
6920         if (likely(!skb)) {
6921                 void *page_addr = page_address(page) +
6922                                   rx_buffer->page_offset;
6923
6924                 /* prefetch first cache line of first page */
6925                 prefetch(page_addr);
6926 #if L1_CACHE_BYTES < 128
6927                 prefetch(page_addr + L1_CACHE_BYTES);
6928 #endif
6929
6930                 /* allocate a skb to store the frags */
6931                 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
6932                 if (unlikely(!skb)) {
6933                         rx_ring->rx_stats.alloc_failed++;
6934                         return NULL;
6935                 }
6936
6937                 /* we will be copying header into skb->data in
6938                  * pskb_may_pull so it is in our interest to prefetch
6939                  * it now to avoid a possible cache miss
6940                  */
6941                 prefetchw(skb->data);
6942         }
6943
6944         /* we are reusing so sync this buffer for CPU use */
6945         dma_sync_single_range_for_cpu(rx_ring->dev,
6946                                       rx_buffer->dma,
6947                                       rx_buffer->page_offset,
6948                                       size,
6949                                       DMA_FROM_DEVICE);
6950
6951         /* pull page into skb */
6952         if (igb_add_rx_frag(rx_ring, rx_buffer, size, rx_desc, skb)) {
6953                 /* hand second half of page back to the ring */
6954                 igb_reuse_rx_page(rx_ring, rx_buffer);
6955         } else {
6956                 /* we are not reusing the buffer so unmap it */
6957                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6958                                PAGE_SIZE, DMA_FROM_DEVICE);
6959         }
6960
6961         /* clear contents of rx_buffer */
6962         rx_buffer->page = NULL;
6963
6964         return skb;
6965 }
6966
6967 static inline void igb_rx_checksum(struct igb_ring *ring,
6968                                    union e1000_adv_rx_desc *rx_desc,
6969                                    struct sk_buff *skb)
6970 {
6971         skb_checksum_none_assert(skb);
6972
6973         /* Ignore Checksum bit is set */
6974         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6975                 return;
6976
6977         /* Rx checksum disabled via ethtool */
6978         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6979                 return;
6980
6981         /* TCP/UDP checksum error bit is set */
6982         if (igb_test_staterr(rx_desc,
6983                              E1000_RXDEXT_STATERR_TCPE |
6984                              E1000_RXDEXT_STATERR_IPE)) {
6985                 /* work around errata with sctp packets where the TCPE aka
6986                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6987                  * packets, (aka let the stack check the crc32c)
6988                  */
6989                 if (!((skb->len == 60) &&
6990                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6991                         u64_stats_update_begin(&ring->rx_syncp);
6992                         ring->rx_stats.csum_err++;
6993                         u64_stats_update_end(&ring->rx_syncp);
6994                 }
6995                 /* let the stack verify checksum errors */
6996                 return;
6997         }
6998         /* It must be a TCP or UDP packet with a valid checksum */
6999         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7000                                       E1000_RXD_STAT_UDPCS))
7001                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7002
7003         dev_dbg(ring->dev, "cksum success: bits %08X\n",
7004                 le32_to_cpu(rx_desc->wb.upper.status_error));
7005 }
7006
7007 static inline void igb_rx_hash(struct igb_ring *ring,
7008                                union e1000_adv_rx_desc *rx_desc,
7009                                struct sk_buff *skb)
7010 {
7011         if (ring->netdev->features & NETIF_F_RXHASH)
7012                 skb_set_hash(skb,
7013                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7014                              PKT_HASH_TYPE_L3);
7015 }
7016
7017 /**
7018  *  igb_is_non_eop - process handling of non-EOP buffers
7019  *  @rx_ring: Rx ring being processed
7020  *  @rx_desc: Rx descriptor for current buffer
7021  *  @skb: current socket buffer containing buffer in progress
7022  *
7023  *  This function updates next to clean.  If the buffer is an EOP buffer
7024  *  this function exits returning false, otherwise it will place the
7025  *  sk_buff in the next buffer to be chained and return true indicating
7026  *  that this is in fact a non-EOP buffer.
7027  **/
7028 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7029                            union e1000_adv_rx_desc *rx_desc)
7030 {
7031         u32 ntc = rx_ring->next_to_clean + 1;
7032
7033         /* fetch, update, and store next to clean */
7034         ntc = (ntc < rx_ring->count) ? ntc : 0;
7035         rx_ring->next_to_clean = ntc;
7036
7037         prefetch(IGB_RX_DESC(rx_ring, ntc));
7038
7039         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7040                 return false;
7041
7042         return true;
7043 }
7044
7045 /**
7046  *  igb_cleanup_headers - Correct corrupted or empty headers
7047  *  @rx_ring: rx descriptor ring packet is being transacted on
7048  *  @rx_desc: pointer to the EOP Rx descriptor
7049  *  @skb: pointer to current skb being fixed
7050  *
7051  *  Address the case where we are pulling data in on pages only
7052  *  and as such no data is present in the skb header.
7053  *
7054  *  In addition if skb is not at least 60 bytes we need to pad it so that
7055  *  it is large enough to qualify as a valid Ethernet frame.
7056  *
7057  *  Returns true if an error was encountered and skb was freed.
7058  **/
7059 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
7060                                 union e1000_adv_rx_desc *rx_desc,
7061                                 struct sk_buff *skb)
7062 {
7063         if (unlikely((igb_test_staterr(rx_desc,
7064                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
7065                 struct net_device *netdev = rx_ring->netdev;
7066                 if (!(netdev->features & NETIF_F_RXALL)) {
7067                         dev_kfree_skb_any(skb);
7068                         return true;
7069                 }
7070         }
7071
7072         /* if eth_skb_pad returns an error the skb was freed */
7073         if (eth_skb_pad(skb))
7074                 return true;
7075
7076         return false;
7077 }
7078
7079 /**
7080  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
7081  *  @rx_ring: rx descriptor ring packet is being transacted on
7082  *  @rx_desc: pointer to the EOP Rx descriptor
7083  *  @skb: pointer to current skb being populated
7084  *
7085  *  This function checks the ring, descriptor, and packet information in
7086  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
7087  *  other fields within the skb.
7088  **/
7089 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7090                                    union e1000_adv_rx_desc *rx_desc,
7091                                    struct sk_buff *skb)
7092 {
7093         struct net_device *dev = rx_ring->netdev;
7094
7095         igb_rx_hash(rx_ring, rx_desc, skb);
7096
7097         igb_rx_checksum(rx_ring, rx_desc, skb);
7098
7099         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
7100             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
7101                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
7102
7103         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7104             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7105                 u16 vid;
7106
7107                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7108                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7109                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7110                 else
7111                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7112
7113                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7114         }
7115
7116         skb_record_rx_queue(skb, rx_ring->queue_index);
7117
7118         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
7119 }
7120
7121 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
7122 {
7123         struct igb_ring *rx_ring = q_vector->rx.ring;
7124         struct sk_buff *skb = rx_ring->skb;
7125         unsigned int total_bytes = 0, total_packets = 0;
7126         u16 cleaned_count = igb_desc_unused(rx_ring);
7127
7128         while (likely(total_packets < budget)) {
7129                 union e1000_adv_rx_desc *rx_desc;
7130
7131                 /* return some buffers to hardware, one at a time is too slow */
7132                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7133                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7134                         cleaned_count = 0;
7135                 }
7136
7137                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7138
7139                 if (!rx_desc->wb.upper.status_error)
7140                         break;
7141
7142                 /* This memory barrier is needed to keep us from reading
7143                  * any other fields out of the rx_desc until we know the
7144                  * descriptor has been written back
7145                  */
7146                 dma_rmb();
7147
7148                 /* retrieve a buffer from the ring */
7149                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
7150
7151                 /* exit if we failed to retrieve a buffer */
7152                 if (!skb)
7153                         break;
7154
7155                 cleaned_count++;
7156
7157                 /* fetch next buffer in frame if non-eop */
7158                 if (igb_is_non_eop(rx_ring, rx_desc))
7159                         continue;
7160
7161                 /* verify the packet layout is correct */
7162                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7163                         skb = NULL;
7164                         continue;
7165                 }
7166
7167                 /* probably a little skewed due to removing CRC */
7168                 total_bytes += skb->len;
7169
7170                 /* populate checksum, timestamp, VLAN, and protocol */
7171                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7172
7173                 napi_gro_receive(&q_vector->napi, skb);
7174
7175                 /* reset skb pointer */
7176                 skb = NULL;
7177
7178                 /* update budget accounting */
7179                 total_packets++;
7180         }
7181
7182         /* place incomplete frames back on ring for completion */
7183         rx_ring->skb = skb;
7184
7185         u64_stats_update_begin(&rx_ring->rx_syncp);
7186         rx_ring->rx_stats.packets += total_packets;
7187         rx_ring->rx_stats.bytes += total_bytes;
7188         u64_stats_update_end(&rx_ring->rx_syncp);
7189         q_vector->rx.total_packets += total_packets;
7190         q_vector->rx.total_bytes += total_bytes;
7191
7192         if (cleaned_count)
7193                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7194
7195         return total_packets;
7196 }
7197
7198 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7199                                   struct igb_rx_buffer *bi)
7200 {
7201         struct page *page = bi->page;
7202         dma_addr_t dma;
7203
7204         /* since we are recycling buffers we should seldom need to alloc */
7205         if (likely(page))
7206                 return true;
7207
7208         /* alloc new page for storage */
7209         page = dev_alloc_page();
7210         if (unlikely(!page)) {
7211                 rx_ring->rx_stats.alloc_failed++;
7212                 return false;
7213         }
7214
7215         /* map page for use */
7216         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7217
7218         /* if mapping failed free memory back to system since
7219          * there isn't much point in holding memory we can't use
7220          */
7221         if (dma_mapping_error(rx_ring->dev, dma)) {
7222                 __free_page(page);
7223
7224                 rx_ring->rx_stats.alloc_failed++;
7225                 return false;
7226         }
7227
7228         bi->dma = dma;
7229         bi->page = page;
7230         bi->page_offset = 0;
7231
7232         return true;
7233 }
7234
7235 /**
7236  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7237  *  @adapter: address of board private structure
7238  **/
7239 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7240 {
7241         union e1000_adv_rx_desc *rx_desc;
7242         struct igb_rx_buffer *bi;
7243         u16 i = rx_ring->next_to_use;
7244
7245         /* nothing to do */
7246         if (!cleaned_count)
7247                 return;
7248
7249         rx_desc = IGB_RX_DESC(rx_ring, i);
7250         bi = &rx_ring->rx_buffer_info[i];
7251         i -= rx_ring->count;
7252
7253         do {
7254                 if (!igb_alloc_mapped_page(rx_ring, bi))
7255                         break;
7256
7257                 /* Refresh the desc even if buffer_addrs didn't change
7258                  * because each write-back erases this info.
7259                  */
7260                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7261
7262                 rx_desc++;
7263                 bi++;
7264                 i++;
7265                 if (unlikely(!i)) {
7266                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7267                         bi = rx_ring->rx_buffer_info;
7268                         i -= rx_ring->count;
7269                 }
7270
7271                 /* clear the status bits for the next_to_use descriptor */
7272                 rx_desc->wb.upper.status_error = 0;
7273
7274                 cleaned_count--;
7275         } while (cleaned_count);
7276
7277         i += rx_ring->count;
7278
7279         if (rx_ring->next_to_use != i) {
7280                 /* record the next descriptor to use */
7281                 rx_ring->next_to_use = i;
7282
7283                 /* update next to alloc since we have filled the ring */
7284                 rx_ring->next_to_alloc = i;
7285
7286                 /* Force memory writes to complete before letting h/w
7287                  * know there are new descriptors to fetch.  (Only
7288                  * applicable for weak-ordered memory model archs,
7289                  * such as IA-64).
7290                  */
7291                 wmb();
7292                 writel(i, rx_ring->tail);
7293         }
7294 }
7295
7296 /**
7297  * igb_mii_ioctl -
7298  * @netdev:
7299  * @ifreq:
7300  * @cmd:
7301  **/
7302 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7303 {
7304         struct igb_adapter *adapter = netdev_priv(netdev);
7305         struct mii_ioctl_data *data = if_mii(ifr);
7306
7307         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7308                 return -EOPNOTSUPP;
7309
7310         switch (cmd) {
7311         case SIOCGMIIPHY:
7312                 data->phy_id = adapter->hw.phy.addr;
7313                 break;
7314         case SIOCGMIIREG:
7315                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7316                                      &data->val_out))
7317                         return -EIO;
7318                 break;
7319         case SIOCSMIIREG:
7320         default:
7321                 return -EOPNOTSUPP;
7322         }
7323         return 0;
7324 }
7325
7326 /**
7327  * igb_ioctl -
7328  * @netdev:
7329  * @ifreq:
7330  * @cmd:
7331  **/
7332 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7333 {
7334         switch (cmd) {
7335         case SIOCGMIIPHY:
7336         case SIOCGMIIREG:
7337         case SIOCSMIIREG:
7338                 return igb_mii_ioctl(netdev, ifr, cmd);
7339         case SIOCGHWTSTAMP:
7340                 return igb_ptp_get_ts_config(netdev, ifr);
7341         case SIOCSHWTSTAMP:
7342                 return igb_ptp_set_ts_config(netdev, ifr);
7343         default:
7344                 return -EOPNOTSUPP;
7345         }
7346 }
7347
7348 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7349 {
7350         struct igb_adapter *adapter = hw->back;
7351
7352         pci_read_config_word(adapter->pdev, reg, value);
7353 }
7354
7355 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7356 {
7357         struct igb_adapter *adapter = hw->back;
7358
7359         pci_write_config_word(adapter->pdev, reg, *value);
7360 }
7361
7362 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7363 {
7364         struct igb_adapter *adapter = hw->back;
7365
7366         if (pcie_capability_read_word(adapter->pdev, reg, value))
7367                 return -E1000_ERR_CONFIG;
7368
7369         return 0;
7370 }
7371
7372 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7373 {
7374         struct igb_adapter *adapter = hw->back;
7375
7376         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7377                 return -E1000_ERR_CONFIG;
7378
7379         return 0;
7380 }
7381
7382 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7383 {
7384         struct igb_adapter *adapter = netdev_priv(netdev);
7385         struct e1000_hw *hw = &adapter->hw;
7386         u32 ctrl, rctl;
7387         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7388
7389         if (enable) {
7390                 /* enable VLAN tag insert/strip */
7391                 ctrl = rd32(E1000_CTRL);
7392                 ctrl |= E1000_CTRL_VME;
7393                 wr32(E1000_CTRL, ctrl);
7394
7395                 /* Disable CFI check */
7396                 rctl = rd32(E1000_RCTL);
7397                 rctl &= ~E1000_RCTL_CFIEN;
7398                 wr32(E1000_RCTL, rctl);
7399         } else {
7400                 /* disable VLAN tag insert/strip */
7401                 ctrl = rd32(E1000_CTRL);
7402                 ctrl &= ~E1000_CTRL_VME;
7403                 wr32(E1000_CTRL, ctrl);
7404         }
7405
7406         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
7407 }
7408
7409 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7410                                __be16 proto, u16 vid)
7411 {
7412         struct igb_adapter *adapter = netdev_priv(netdev);
7413         struct e1000_hw *hw = &adapter->hw;
7414         int pf_id = adapter->vfs_allocated_count;
7415
7416         /* add the filter since PF can receive vlans w/o entry in vlvf */
7417         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7418                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
7419
7420         set_bit(vid, adapter->active_vlans);
7421
7422         return 0;
7423 }
7424
7425 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7426                                 __be16 proto, u16 vid)
7427 {
7428         struct igb_adapter *adapter = netdev_priv(netdev);
7429         int pf_id = adapter->vfs_allocated_count;
7430         struct e1000_hw *hw = &adapter->hw;
7431
7432         /* remove VID from filter table */
7433         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
7434                 igb_vfta_set(hw, vid, pf_id, false, true);
7435
7436         clear_bit(vid, adapter->active_vlans);
7437
7438         return 0;
7439 }
7440
7441 static void igb_restore_vlan(struct igb_adapter *adapter)
7442 {
7443         u16 vid = 1;
7444
7445         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7446         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
7447
7448         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
7449                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7450 }
7451
7452 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7453 {
7454         struct pci_dev *pdev = adapter->pdev;
7455         struct e1000_mac_info *mac = &adapter->hw.mac;
7456
7457         mac->autoneg = 0;
7458
7459         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7460          * for the switch() below to work
7461          */
7462         if ((spd & 1) || (dplx & ~1))
7463                 goto err_inval;
7464
7465         /* Fiber NIC's only allow 1000 gbps Full duplex
7466          * and 100Mbps Full duplex for 100baseFx sfp
7467          */
7468         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7469                 switch (spd + dplx) {
7470                 case SPEED_10 + DUPLEX_HALF:
7471                 case SPEED_10 + DUPLEX_FULL:
7472                 case SPEED_100 + DUPLEX_HALF:
7473                         goto err_inval;
7474                 default:
7475                         break;
7476                 }
7477         }
7478
7479         switch (spd + dplx) {
7480         case SPEED_10 + DUPLEX_HALF:
7481                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7482                 break;
7483         case SPEED_10 + DUPLEX_FULL:
7484                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7485                 break;
7486         case SPEED_100 + DUPLEX_HALF:
7487                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7488                 break;
7489         case SPEED_100 + DUPLEX_FULL:
7490                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7491                 break;
7492         case SPEED_1000 + DUPLEX_FULL:
7493                 mac->autoneg = 1;
7494                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7495                 break;
7496         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7497         default:
7498                 goto err_inval;
7499         }
7500
7501         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7502         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7503
7504         return 0;
7505
7506 err_inval:
7507         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7508         return -EINVAL;
7509 }
7510
7511 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7512                           bool runtime)
7513 {
7514         struct net_device *netdev = pci_get_drvdata(pdev);
7515         struct igb_adapter *adapter = netdev_priv(netdev);
7516         struct e1000_hw *hw = &adapter->hw;
7517         u32 ctrl, rctl, status;
7518         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7519 #ifdef CONFIG_PM
7520         int retval = 0;
7521 #endif
7522
7523         netif_device_detach(netdev);
7524
7525         if (netif_running(netdev))
7526                 __igb_close(netdev, true);
7527
7528         igb_ptp_suspend(adapter);
7529
7530         igb_clear_interrupt_scheme(adapter);
7531
7532 #ifdef CONFIG_PM
7533         retval = pci_save_state(pdev);
7534         if (retval)
7535                 return retval;
7536 #endif
7537
7538         status = rd32(E1000_STATUS);
7539         if (status & E1000_STATUS_LU)
7540                 wufc &= ~E1000_WUFC_LNKC;
7541
7542         if (wufc) {
7543                 igb_setup_rctl(adapter);
7544                 igb_set_rx_mode(netdev);
7545
7546                 /* turn on all-multi mode if wake on multicast is enabled */
7547                 if (wufc & E1000_WUFC_MC) {
7548                         rctl = rd32(E1000_RCTL);
7549                         rctl |= E1000_RCTL_MPE;
7550                         wr32(E1000_RCTL, rctl);
7551                 }
7552
7553                 ctrl = rd32(E1000_CTRL);
7554                 /* advertise wake from D3Cold */
7555                 #define E1000_CTRL_ADVD3WUC 0x00100000
7556                 /* phy power management enable */
7557                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7558                 ctrl |= E1000_CTRL_ADVD3WUC;
7559                 wr32(E1000_CTRL, ctrl);
7560
7561                 /* Allow time for pending master requests to run */
7562                 igb_disable_pcie_master(hw);
7563
7564                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7565                 wr32(E1000_WUFC, wufc);
7566         } else {
7567                 wr32(E1000_WUC, 0);
7568                 wr32(E1000_WUFC, 0);
7569         }
7570
7571         *enable_wake = wufc || adapter->en_mng_pt;
7572         if (!*enable_wake)
7573                 igb_power_down_link(adapter);
7574         else
7575                 igb_power_up_link(adapter);
7576
7577         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7578          * would have already happened in close and is redundant.
7579          */
7580         igb_release_hw_control(adapter);
7581
7582         pci_disable_device(pdev);
7583
7584         return 0;
7585 }
7586
7587 #ifdef CONFIG_PM
7588 #ifdef CONFIG_PM_SLEEP
7589 static int igb_suspend(struct device *dev)
7590 {
7591         int retval;
7592         bool wake;
7593         struct pci_dev *pdev = to_pci_dev(dev);
7594
7595         retval = __igb_shutdown(pdev, &wake, 0);
7596         if (retval)
7597                 return retval;
7598
7599         if (wake) {
7600                 pci_prepare_to_sleep(pdev);
7601         } else {
7602                 pci_wake_from_d3(pdev, false);
7603                 pci_set_power_state(pdev, PCI_D3hot);
7604         }
7605
7606         return 0;
7607 }
7608 #endif /* CONFIG_PM_SLEEP */
7609
7610 static int igb_resume(struct device *dev)
7611 {
7612         struct pci_dev *pdev = to_pci_dev(dev);
7613         struct net_device *netdev = pci_get_drvdata(pdev);
7614         struct igb_adapter *adapter = netdev_priv(netdev);
7615         struct e1000_hw *hw = &adapter->hw;
7616         u32 err;
7617
7618         pci_set_power_state(pdev, PCI_D0);
7619         pci_restore_state(pdev);
7620         pci_save_state(pdev);
7621
7622         if (!pci_device_is_present(pdev))
7623                 return -ENODEV;
7624         err = pci_enable_device_mem(pdev);
7625         if (err) {
7626                 dev_err(&pdev->dev,
7627                         "igb: Cannot enable PCI device from suspend\n");
7628                 return err;
7629         }
7630         pci_set_master(pdev);
7631
7632         pci_enable_wake(pdev, PCI_D3hot, 0);
7633         pci_enable_wake(pdev, PCI_D3cold, 0);
7634
7635         if (igb_init_interrupt_scheme(adapter, true)) {
7636                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7637                 return -ENOMEM;
7638         }
7639
7640         igb_reset(adapter);
7641
7642         /* let the f/w know that the h/w is now under the control of the
7643          * driver.
7644          */
7645         igb_get_hw_control(adapter);
7646
7647         wr32(E1000_WUS, ~0);
7648
7649         if (netdev->flags & IFF_UP) {
7650                 rtnl_lock();
7651                 err = __igb_open(netdev, true);
7652                 rtnl_unlock();
7653                 if (err)
7654                         return err;
7655         }
7656
7657         netif_device_attach(netdev);
7658         return 0;
7659 }
7660
7661 static int igb_runtime_idle(struct device *dev)
7662 {
7663         struct pci_dev *pdev = to_pci_dev(dev);
7664         struct net_device *netdev = pci_get_drvdata(pdev);
7665         struct igb_adapter *adapter = netdev_priv(netdev);
7666
7667         if (!igb_has_link(adapter))
7668                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7669
7670         return -EBUSY;
7671 }
7672
7673 static int igb_runtime_suspend(struct device *dev)
7674 {
7675         struct pci_dev *pdev = to_pci_dev(dev);
7676         int retval;
7677         bool wake;
7678
7679         retval = __igb_shutdown(pdev, &wake, 1);
7680         if (retval)
7681                 return retval;
7682
7683         if (wake) {
7684                 pci_prepare_to_sleep(pdev);
7685         } else {
7686                 pci_wake_from_d3(pdev, false);
7687                 pci_set_power_state(pdev, PCI_D3hot);
7688         }
7689
7690         return 0;
7691 }
7692
7693 static int igb_runtime_resume(struct device *dev)
7694 {
7695         return igb_resume(dev);
7696 }
7697 #endif /* CONFIG_PM */
7698
7699 static void igb_shutdown(struct pci_dev *pdev)
7700 {
7701         bool wake;
7702
7703         __igb_shutdown(pdev, &wake, 0);
7704
7705         if (system_state == SYSTEM_POWER_OFF) {
7706                 pci_wake_from_d3(pdev, wake);
7707                 pci_set_power_state(pdev, PCI_D3hot);
7708         }
7709 }
7710
7711 #ifdef CONFIG_PCI_IOV
7712 static int igb_sriov_reinit(struct pci_dev *dev)
7713 {
7714         struct net_device *netdev = pci_get_drvdata(dev);
7715         struct igb_adapter *adapter = netdev_priv(netdev);
7716         struct pci_dev *pdev = adapter->pdev;
7717
7718         rtnl_lock();
7719
7720         if (netif_running(netdev))
7721                 igb_close(netdev);
7722         else
7723                 igb_reset(adapter);
7724
7725         igb_clear_interrupt_scheme(adapter);
7726
7727         igb_init_queue_configuration(adapter);
7728
7729         if (igb_init_interrupt_scheme(adapter, true)) {
7730                 rtnl_unlock();
7731                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7732                 return -ENOMEM;
7733         }
7734
7735         if (netif_running(netdev))
7736                 igb_open(netdev);
7737
7738         rtnl_unlock();
7739
7740         return 0;
7741 }
7742
7743 static int igb_pci_disable_sriov(struct pci_dev *dev)
7744 {
7745         int err = igb_disable_sriov(dev);
7746
7747         if (!err)
7748                 err = igb_sriov_reinit(dev);
7749
7750         return err;
7751 }
7752
7753 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7754 {
7755         int err = igb_enable_sriov(dev, num_vfs);
7756
7757         if (err)
7758                 goto out;
7759
7760         err = igb_sriov_reinit(dev);
7761         if (!err)
7762                 return num_vfs;
7763
7764 out:
7765         return err;
7766 }
7767
7768 #endif
7769 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7770 {
7771 #ifdef CONFIG_PCI_IOV
7772         if (num_vfs == 0)
7773                 return igb_pci_disable_sriov(dev);
7774         else
7775                 return igb_pci_enable_sriov(dev, num_vfs);
7776 #endif
7777         return 0;
7778 }
7779
7780 #ifdef CONFIG_NET_POLL_CONTROLLER
7781 /* Polling 'interrupt' - used by things like netconsole to send skbs
7782  * without having to re-enable interrupts. It's not called while
7783  * the interrupt routine is executing.
7784  */
7785 static void igb_netpoll(struct net_device *netdev)
7786 {
7787         struct igb_adapter *adapter = netdev_priv(netdev);
7788         struct e1000_hw *hw = &adapter->hw;
7789         struct igb_q_vector *q_vector;
7790         int i;
7791
7792         for (i = 0; i < adapter->num_q_vectors; i++) {
7793                 q_vector = adapter->q_vector[i];
7794                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7795                         wr32(E1000_EIMC, q_vector->eims_value);
7796                 else
7797                         igb_irq_disable(adapter);
7798                 napi_schedule(&q_vector->napi);
7799         }
7800 }
7801 #endif /* CONFIG_NET_POLL_CONTROLLER */
7802
7803 /**
7804  *  igb_io_error_detected - called when PCI error is detected
7805  *  @pdev: Pointer to PCI device
7806  *  @state: The current pci connection state
7807  *
7808  *  This function is called after a PCI bus error affecting
7809  *  this device has been detected.
7810  **/
7811 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7812                                               pci_channel_state_t state)
7813 {
7814         struct net_device *netdev = pci_get_drvdata(pdev);
7815         struct igb_adapter *adapter = netdev_priv(netdev);
7816
7817         netif_device_detach(netdev);
7818
7819         if (state == pci_channel_io_perm_failure)
7820                 return PCI_ERS_RESULT_DISCONNECT;
7821
7822         if (netif_running(netdev))
7823                 igb_down(adapter);
7824         pci_disable_device(pdev);
7825
7826         /* Request a slot slot reset. */
7827         return PCI_ERS_RESULT_NEED_RESET;
7828 }
7829
7830 /**
7831  *  igb_io_slot_reset - called after the pci bus has been reset.
7832  *  @pdev: Pointer to PCI device
7833  *
7834  *  Restart the card from scratch, as if from a cold-boot. Implementation
7835  *  resembles the first-half of the igb_resume routine.
7836  **/
7837 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7838 {
7839         struct net_device *netdev = pci_get_drvdata(pdev);
7840         struct igb_adapter *adapter = netdev_priv(netdev);
7841         struct e1000_hw *hw = &adapter->hw;
7842         pci_ers_result_t result;
7843         int err;
7844
7845         if (pci_enable_device_mem(pdev)) {
7846                 dev_err(&pdev->dev,
7847                         "Cannot re-enable PCI device after reset.\n");
7848                 result = PCI_ERS_RESULT_DISCONNECT;
7849         } else {
7850                 pci_set_master(pdev);
7851                 pci_restore_state(pdev);
7852                 pci_save_state(pdev);
7853
7854                 pci_enable_wake(pdev, PCI_D3hot, 0);
7855                 pci_enable_wake(pdev, PCI_D3cold, 0);
7856
7857                 igb_reset(adapter);
7858                 wr32(E1000_WUS, ~0);
7859                 result = PCI_ERS_RESULT_RECOVERED;
7860         }
7861
7862         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7863         if (err) {
7864                 dev_err(&pdev->dev,
7865                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7866                         err);
7867                 /* non-fatal, continue */
7868         }
7869
7870         return result;
7871 }
7872
7873 /**
7874  *  igb_io_resume - called when traffic can start flowing again.
7875  *  @pdev: Pointer to PCI device
7876  *
7877  *  This callback is called when the error recovery driver tells us that
7878  *  its OK to resume normal operation. Implementation resembles the
7879  *  second-half of the igb_resume routine.
7880  */
7881 static void igb_io_resume(struct pci_dev *pdev)
7882 {
7883         struct net_device *netdev = pci_get_drvdata(pdev);
7884         struct igb_adapter *adapter = netdev_priv(netdev);
7885
7886         if (netif_running(netdev)) {
7887                 if (igb_up(adapter)) {
7888                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7889                         return;
7890                 }
7891         }
7892
7893         netif_device_attach(netdev);
7894
7895         /* let the f/w know that the h/w is now under the control of the
7896          * driver.
7897          */
7898         igb_get_hw_control(adapter);
7899 }
7900
7901 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7902                              u8 qsel)
7903 {
7904         struct e1000_hw *hw = &adapter->hw;
7905         u32 rar_low, rar_high;
7906
7907         /* HW expects these to be in network order when they are plugged
7908          * into the registers which are little endian.  In order to guarantee
7909          * that ordering we need to do an leXX_to_cpup here in order to be
7910          * ready for the byteswap that occurs with writel
7911          */
7912         rar_low = le32_to_cpup((__le32 *)(addr));
7913         rar_high = le16_to_cpup((__le16 *)(addr + 4));
7914
7915         /* Indicate to hardware the Address is Valid. */
7916         rar_high |= E1000_RAH_AV;
7917
7918         if (hw->mac.type == e1000_82575)
7919                 rar_high |= E1000_RAH_POOL_1 * qsel;
7920         else
7921                 rar_high |= E1000_RAH_POOL_1 << qsel;
7922
7923         wr32(E1000_RAL(index), rar_low);
7924         wrfl();
7925         wr32(E1000_RAH(index), rar_high);
7926         wrfl();
7927 }
7928
7929 static int igb_set_vf_mac(struct igb_adapter *adapter,
7930                           int vf, unsigned char *mac_addr)
7931 {
7932         struct e1000_hw *hw = &adapter->hw;
7933         /* VF MAC addresses start at end of receive addresses and moves
7934          * towards the first, as a result a collision should not be possible
7935          */
7936         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7937
7938         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7939
7940         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7941
7942         return 0;
7943 }
7944
7945 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7946 {
7947         struct igb_adapter *adapter = netdev_priv(netdev);
7948         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7949                 return -EINVAL;
7950         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7951         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7952         dev_info(&adapter->pdev->dev,
7953                  "Reload the VF driver to make this change effective.");
7954         if (test_bit(__IGB_DOWN, &adapter->state)) {
7955                 dev_warn(&adapter->pdev->dev,
7956                          "The VF MAC address has been set, but the PF device is not up.\n");
7957                 dev_warn(&adapter->pdev->dev,
7958                          "Bring the PF device up before attempting to use the VF device.\n");
7959         }
7960         return igb_set_vf_mac(adapter, vf, mac);
7961 }
7962
7963 static int igb_link_mbps(int internal_link_speed)
7964 {
7965         switch (internal_link_speed) {
7966         case SPEED_100:
7967                 return 100;
7968         case SPEED_1000:
7969                 return 1000;
7970         default:
7971                 return 0;
7972         }
7973 }
7974
7975 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7976                                   int link_speed)
7977 {
7978         int rf_dec, rf_int;
7979         u32 bcnrc_val;
7980
7981         if (tx_rate != 0) {
7982                 /* Calculate the rate factor values to set */
7983                 rf_int = link_speed / tx_rate;
7984                 rf_dec = (link_speed - (rf_int * tx_rate));
7985                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
7986                          tx_rate;
7987
7988                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7989                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7990                               E1000_RTTBCNRC_RF_INT_MASK);
7991                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7992         } else {
7993                 bcnrc_val = 0;
7994         }
7995
7996         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7997         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7998          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7999          */
8000         wr32(E1000_RTTBCNRM, 0x14);
8001         wr32(E1000_RTTBCNRC, bcnrc_val);
8002 }
8003
8004 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
8005 {
8006         int actual_link_speed, i;
8007         bool reset_rate = false;
8008
8009         /* VF TX rate limit was not set or not supported */
8010         if ((adapter->vf_rate_link_speed == 0) ||
8011             (adapter->hw.mac.type != e1000_82576))
8012                 return;
8013
8014         actual_link_speed = igb_link_mbps(adapter->link_speed);
8015         if (actual_link_speed != adapter->vf_rate_link_speed) {
8016                 reset_rate = true;
8017                 adapter->vf_rate_link_speed = 0;
8018                 dev_info(&adapter->pdev->dev,
8019                          "Link speed has been changed. VF Transmit rate is disabled\n");
8020         }
8021
8022         for (i = 0; i < adapter->vfs_allocated_count; i++) {
8023                 if (reset_rate)
8024                         adapter->vf_data[i].tx_rate = 0;
8025
8026                 igb_set_vf_rate_limit(&adapter->hw, i,
8027                                       adapter->vf_data[i].tx_rate,
8028                                       actual_link_speed);
8029         }
8030 }
8031
8032 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
8033                              int min_tx_rate, int max_tx_rate)
8034 {
8035         struct igb_adapter *adapter = netdev_priv(netdev);
8036         struct e1000_hw *hw = &adapter->hw;
8037         int actual_link_speed;
8038
8039         if (hw->mac.type != e1000_82576)
8040                 return -EOPNOTSUPP;
8041
8042         if (min_tx_rate)
8043                 return -EINVAL;
8044
8045         actual_link_speed = igb_link_mbps(adapter->link_speed);
8046         if ((vf >= adapter->vfs_allocated_count) ||
8047             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
8048             (max_tx_rate < 0) ||
8049             (max_tx_rate > actual_link_speed))
8050                 return -EINVAL;
8051
8052         adapter->vf_rate_link_speed = actual_link_speed;
8053         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
8054         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
8055
8056         return 0;
8057 }
8058
8059 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
8060                                    bool setting)
8061 {
8062         struct igb_adapter *adapter = netdev_priv(netdev);
8063         struct e1000_hw *hw = &adapter->hw;
8064         u32 reg_val, reg_offset;
8065
8066         if (!adapter->vfs_allocated_count)
8067                 return -EOPNOTSUPP;
8068
8069         if (vf >= adapter->vfs_allocated_count)
8070                 return -EINVAL;
8071
8072         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
8073         reg_val = rd32(reg_offset);
8074         if (setting)
8075                 reg_val |= (BIT(vf) |
8076                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8077         else
8078                 reg_val &= ~(BIT(vf) |
8079                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
8080         wr32(reg_offset, reg_val);
8081
8082         adapter->vf_data[vf].spoofchk_enabled = setting;
8083         return 0;
8084 }
8085
8086 static int igb_ndo_get_vf_config(struct net_device *netdev,
8087                                  int vf, struct ifla_vf_info *ivi)
8088 {
8089         struct igb_adapter *adapter = netdev_priv(netdev);
8090         if (vf >= adapter->vfs_allocated_count)
8091                 return -EINVAL;
8092         ivi->vf = vf;
8093         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
8094         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
8095         ivi->min_tx_rate = 0;
8096         ivi->vlan = adapter->vf_data[vf].pf_vlan;
8097         ivi->qos = adapter->vf_data[vf].pf_qos;
8098         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
8099         return 0;
8100 }
8101
8102 static void igb_vmm_control(struct igb_adapter *adapter)
8103 {
8104         struct e1000_hw *hw = &adapter->hw;
8105         u32 reg;
8106
8107         switch (hw->mac.type) {
8108         case e1000_82575:
8109         case e1000_i210:
8110         case e1000_i211:
8111         case e1000_i354:
8112         default:
8113                 /* replication is not supported for 82575 */
8114                 return;
8115         case e1000_82576:
8116                 /* notify HW that the MAC is adding vlan tags */
8117                 reg = rd32(E1000_DTXCTL);
8118                 reg |= E1000_DTXCTL_VLAN_ADDED;
8119                 wr32(E1000_DTXCTL, reg);
8120                 /* Fall through */
8121         case e1000_82580:
8122                 /* enable replication vlan tag stripping */
8123                 reg = rd32(E1000_RPLOLR);
8124                 reg |= E1000_RPLOLR_STRVLAN;
8125                 wr32(E1000_RPLOLR, reg);
8126                 /* Fall through */
8127         case e1000_i350:
8128                 /* none of the above registers are supported by i350 */
8129                 break;
8130         }
8131
8132         if (adapter->vfs_allocated_count) {
8133                 igb_vmdq_set_loopback_pf(hw, true);
8134                 igb_vmdq_set_replication_pf(hw, true);
8135                 igb_vmdq_set_anti_spoofing_pf(hw, true,
8136                                               adapter->vfs_allocated_count);
8137         } else {
8138                 igb_vmdq_set_loopback_pf(hw, false);
8139                 igb_vmdq_set_replication_pf(hw, false);
8140         }
8141 }
8142
8143 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
8144 {
8145         struct e1000_hw *hw = &adapter->hw;
8146         u32 dmac_thr;
8147         u16 hwm;
8148
8149         if (hw->mac.type > e1000_82580) {
8150                 if (adapter->flags & IGB_FLAG_DMAC) {
8151                         u32 reg;
8152
8153                         /* force threshold to 0. */
8154                         wr32(E1000_DMCTXTH, 0);
8155
8156                         /* DMA Coalescing high water mark needs to be greater
8157                          * than the Rx threshold. Set hwm to PBA - max frame
8158                          * size in 16B units, capping it at PBA - 6KB.
8159                          */
8160                         hwm = 64 * (pba - 6);
8161                         reg = rd32(E1000_FCRTC);
8162                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8163                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8164                                 & E1000_FCRTC_RTH_COAL_MASK);
8165                         wr32(E1000_FCRTC, reg);
8166
8167                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8168                          * frame size, capping it at PBA - 10KB.
8169                          */
8170                         dmac_thr = pba - 10;
8171                         reg = rd32(E1000_DMACR);
8172                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8173                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8174                                 & E1000_DMACR_DMACTHR_MASK);
8175
8176                         /* transition to L0x or L1 if available..*/
8177                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8178
8179                         /* watchdog timer= +-1000 usec in 32usec intervals */
8180                         reg |= (1000 >> 5);
8181
8182                         /* Disable BMC-to-OS Watchdog Enable */
8183                         if (hw->mac.type != e1000_i354)
8184                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8185
8186                         wr32(E1000_DMACR, reg);
8187
8188                         /* no lower threshold to disable
8189                          * coalescing(smart fifb)-UTRESH=0
8190                          */
8191                         wr32(E1000_DMCRTRH, 0);
8192
8193                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8194
8195                         wr32(E1000_DMCTLX, reg);
8196
8197                         /* free space in tx packet buffer to wake from
8198                          * DMA coal
8199                          */
8200                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8201                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8202
8203                         /* make low power state decision controlled
8204                          * by DMA coal
8205                          */
8206                         reg = rd32(E1000_PCIEMISC);
8207                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8208                         wr32(E1000_PCIEMISC, reg);
8209                 } /* endif adapter->dmac is not disabled */
8210         } else if (hw->mac.type == e1000_82580) {
8211                 u32 reg = rd32(E1000_PCIEMISC);
8212
8213                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8214                 wr32(E1000_DMACR, 0);
8215         }
8216 }
8217
8218 /**
8219  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8220  *  @hw: pointer to hardware structure
8221  *  @byte_offset: byte offset to read
8222  *  @dev_addr: device address
8223  *  @data: value read
8224  *
8225  *  Performs byte read operation over I2C interface at
8226  *  a specified device address.
8227  **/
8228 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8229                       u8 dev_addr, u8 *data)
8230 {
8231         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8232         struct i2c_client *this_client = adapter->i2c_client;
8233         s32 status;
8234         u16 swfw_mask = 0;
8235
8236         if (!this_client)
8237                 return E1000_ERR_I2C;
8238
8239         swfw_mask = E1000_SWFW_PHY0_SM;
8240
8241         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8242                 return E1000_ERR_SWFW_SYNC;
8243
8244         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8245         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8246
8247         if (status < 0)
8248                 return E1000_ERR_I2C;
8249         else {
8250                 *data = status;
8251                 return 0;
8252         }
8253 }
8254
8255 /**
8256  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8257  *  @hw: pointer to hardware structure
8258  *  @byte_offset: byte offset to write
8259  *  @dev_addr: device address
8260  *  @data: value to write
8261  *
8262  *  Performs byte write operation over I2C interface at
8263  *  a specified device address.
8264  **/
8265 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8266                        u8 dev_addr, u8 data)
8267 {
8268         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8269         struct i2c_client *this_client = adapter->i2c_client;
8270         s32 status;
8271         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8272
8273         if (!this_client)
8274                 return E1000_ERR_I2C;
8275
8276         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8277                 return E1000_ERR_SWFW_SYNC;
8278         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8279         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8280
8281         if (status)
8282                 return E1000_ERR_I2C;
8283         else
8284                 return 0;
8285
8286 }
8287
8288 int igb_reinit_queues(struct igb_adapter *adapter)
8289 {
8290         struct net_device *netdev = adapter->netdev;
8291         struct pci_dev *pdev = adapter->pdev;
8292         int err = 0;
8293
8294         if (netif_running(netdev))
8295                 igb_close(netdev);
8296
8297         igb_reset_interrupt_capability(adapter);
8298
8299         if (igb_init_interrupt_scheme(adapter, true)) {
8300                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8301                 return -ENOMEM;
8302         }
8303
8304         if (netif_running(netdev))
8305                 err = igb_open(netdev);
8306
8307         return err;
8308 }
8309 /* igb_main.c */