drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #ifdef CONFIG_IGB_DCA
  54 #include <linux/dca.h>
  55 #endif
  56 #include <linux/i2c.h>
  57 #include "igb.h"
  58
  59 #define MAJ 5
  60 #define MIN 2
  61 #define BUILD 15
  62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  63 __stringify(BUILD) "-k"
  64 char igb_driver_name[] = "igb";
  65 char igb_driver_version[] = DRV_VERSION;
  66 static const char igb_driver_string[] =
  67                                 "Intel(R) Gigabit Ethernet Network Driver";
  68 static const char igb_copyright[] =
  69                                 "Copyright (c) 2007-2014 Intel Corporation.";
  70
  71 static const struct e1000_info *igb_info_tbl[] = {
  72         [board_82575] = &e1000_82575_info,
  73 };
  74
  75 static const struct pci_device_id igb_pci_tbl[] = {
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 111         /* required last entry */
 112         {0, }
 113 };
 114
 115 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 116
 117 static int igb_setup_all_tx_resources(struct igb_adapter *);
 118 static int igb_setup_all_rx_resources(struct igb_adapter *);
 119 static void igb_free_all_tx_resources(struct igb_adapter *);
 120 static void igb_free_all_rx_resources(struct igb_adapter *);
 121 static void igb_setup_mrqc(struct igb_adapter *);
 122 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 123 static void igb_remove(struct pci_dev *pdev);
 124 static int igb_sw_init(struct igb_adapter *);
 125 static int igb_open(struct net_device *);
 126 static int igb_close(struct net_device *);
 127 static void igb_configure(struct igb_adapter *);
 128 static void igb_configure_tx(struct igb_adapter *);
 129 static void igb_configure_rx(struct igb_adapter *);
 130 static void igb_clean_all_tx_rings(struct igb_adapter *);
 131 static void igb_clean_all_rx_rings(struct igb_adapter *);
 132 static void igb_clean_tx_ring(struct igb_ring *);
 133 static void igb_clean_rx_ring(struct igb_ring *);
 134 static void igb_set_rx_mode(struct net_device *);
 135 static void igb_update_phy_info(unsigned long);
 136 static void igb_watchdog(unsigned long);
 137 static void igb_watchdog_task(struct work_struct *);
 138 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 139 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 140                                           struct rtnl_link_stats64 *stats);
 141 static int igb_change_mtu(struct net_device *, int);
 142 static int igb_set_mac(struct net_device *, void *);
 143 static void igb_set_uta(struct igb_adapter *adapter);
 144 static irqreturn_t igb_intr(int irq, void *);
 145 static irqreturn_t igb_intr_msi(int irq, void *);
 146 static irqreturn_t igb_msix_other(int irq, void *);
 147 static irqreturn_t igb_msix_ring(int irq, void *);
 148 #ifdef CONFIG_IGB_DCA
 149 static void igb_update_dca(struct igb_q_vector *);
 150 static void igb_setup_dca(struct igb_adapter *);
 151 #endif /* CONFIG_IGB_DCA */
 152 static int igb_poll(struct napi_struct *, int);
 153 static bool igb_clean_tx_irq(struct igb_q_vector *);
 154 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 155 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 156 static void igb_tx_timeout(struct net_device *);
 157 static void igb_reset_task(struct work_struct *);
 158 static void igb_vlan_mode(struct net_device *netdev,
 159                           netdev_features_t features);
 160 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 161 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 162 static void igb_restore_vlan(struct igb_adapter *);
 163 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 164 static void igb_ping_all_vfs(struct igb_adapter *);
 165 static void igb_msg_task(struct igb_adapter *);
 166 static void igb_vmm_control(struct igb_adapter *);
 167 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 168 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 169 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 170 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 171                                int vf, u16 vlan, u8 qos);
 172 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 173 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 174                                    bool setting);
 175 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 176                                  struct ifla_vf_info *ivi);
 177 static void igb_check_vf_rate_limit(struct igb_adapter *);
 178
 179 #ifdef CONFIG_PCI_IOV
 180 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 181 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 182 #endif
 183
 184 #ifdef CONFIG_PM
 185 #ifdef CONFIG_PM_SLEEP
 186 static int igb_suspend(struct device *);
 187 #endif
 188 static int igb_resume(struct device *);
 189 #ifdef CONFIG_PM_RUNTIME
 190 static int igb_runtime_suspend(struct device *dev);
 191 static int igb_runtime_resume(struct device *dev);
 192 static int igb_runtime_idle(struct device *dev);
 193 #endif
 194 static const struct dev_pm_ops igb_pm_ops = {
 195         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 196         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 197                         igb_runtime_idle)
 198 };
 199 #endif
 200 static void igb_shutdown(struct pci_dev *);
 201 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 202 #ifdef CONFIG_IGB_DCA
 203 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 204 static struct notifier_block dca_notifier = {
 205         .notifier_call  = igb_notify_dca,
 206         .next           = NULL,
 207         .priority       = 0
 208 };
 209 #endif
 210 #ifdef CONFIG_NET_POLL_CONTROLLER
 211 /* for netdump / net console */
 212 static void igb_netpoll(struct net_device *);
 213 #endif
 214 #ifdef CONFIG_PCI_IOV
 215 static unsigned int max_vfs;
 216 module_param(max_vfs, uint, 0);
 217 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 218 #endif /* CONFIG_PCI_IOV */
 219
 220 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 221                      pci_channel_state_t);
 222 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 223 static void igb_io_resume(struct pci_dev *);
 224
 225 static const struct pci_error_handlers igb_err_handler = {
 226         .error_detected = igb_io_error_detected,
 227         .slot_reset = igb_io_slot_reset,
 228         .resume = igb_io_resume,
 229 };
 230
 231 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 232
 233 static struct pci_driver igb_driver = {
 234         .name     = igb_driver_name,
 235         .id_table = igb_pci_tbl,
 236         .probe    = igb_probe,
 237         .remove   = igb_remove,
 238 #ifdef CONFIG_PM
 239         .driver.pm = &igb_pm_ops,
 240 #endif
 241         .shutdown = igb_shutdown,
 242         .sriov_configure = igb_pci_sriov_configure,
 243         .err_handler = &igb_err_handler
 244 };
 245
 246 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 247 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 248 MODULE_LICENSE("GPL");
 249 MODULE_VERSION(DRV_VERSION);
 250
 251 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 252 static int debug = -1;
 253 module_param(debug, int, 0);
 254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 255
 256 struct igb_reg_info {
 257         u32 ofs;
 258         char *name;
 259 };
 260
 261 static const struct igb_reg_info igb_reg_info_tbl[] = {
 262
 263         /* General Registers */
 264         {E1000_CTRL, "CTRL"},
 265         {E1000_STATUS, "STATUS"},
 266         {E1000_CTRL_EXT, "CTRL_EXT"},
 267
 268         /* Interrupt Registers */
 269         {E1000_ICR, "ICR"},
 270
 271         /* RX Registers */
 272         {E1000_RCTL, "RCTL"},
 273         {E1000_RDLEN(0), "RDLEN"},
 274         {E1000_RDH(0), "RDH"},
 275         {E1000_RDT(0), "RDT"},
 276         {E1000_RXDCTL(0), "RXDCTL"},
 277         {E1000_RDBAL(0), "RDBAL"},
 278         {E1000_RDBAH(0), "RDBAH"},
 279
 280         /* TX Registers */
 281         {E1000_TCTL, "TCTL"},
 282         {E1000_TDBAL(0), "TDBAL"},
 283         {E1000_TDBAH(0), "TDBAH"},
 284         {E1000_TDLEN(0), "TDLEN"},
 285         {E1000_TDH(0), "TDH"},
 286         {E1000_TDT(0), "TDT"},
 287         {E1000_TXDCTL(0), "TXDCTL"},
 288         {E1000_TDFH, "TDFH"},
 289         {E1000_TDFT, "TDFT"},
 290         {E1000_TDFHS, "TDFHS"},
 291         {E1000_TDFPC, "TDFPC"},
 292
 293         /* List Terminator */
 294         {}
 295 };
 296
 297 /* igb_regdump - register printout routine */
 298 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 299 {
 300         int n = 0;
 301         char rname[16];
 302         u32 regs[8];
 303
 304         switch (reginfo->ofs) {
 305         case E1000_RDLEN(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RDLEN(n));
 308                 break;
 309         case E1000_RDH(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDH(n));
 312                 break;
 313         case E1000_RDT(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDT(n));
 316                 break;
 317         case E1000_RXDCTL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RXDCTL(n));
 320                 break;
 321         case E1000_RDBAL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RDBAL(n));
 324                 break;
 325         case E1000_RDBAH(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAH(n));
 328                 break;
 329         case E1000_TDBAL(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAL(n));
 332                 break;
 333         case E1000_TDBAH(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDBAH(n));
 336                 break;
 337         case E1000_TDLEN(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDLEN(n));
 340                 break;
 341         case E1000_TDH(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDH(n));
 344                 break;
 345         case E1000_TDT(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDT(n));
 348                 break;
 349         case E1000_TXDCTL(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TXDCTL(n));
 352                 break;
 353         default:
 354                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 355                 return;
 356         }
 357
 358         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 359         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 360                 regs[2], regs[3]);
 361 }
 362
 363 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 364 static void igb_dump(struct igb_adapter *adapter)
 365 {
 366         struct net_device *netdev = adapter->netdev;
 367         struct e1000_hw *hw = &adapter->hw;
 368         struct igb_reg_info *reginfo;
 369         struct igb_ring *tx_ring;
 370         union e1000_adv_tx_desc *tx_desc;
 371         struct my_u0 { u64 a; u64 b; } *u0;
 372         struct igb_ring *rx_ring;
 373         union e1000_adv_rx_desc *rx_desc;
 374         u32 staterr;
 375         u16 i, n;
 376
 377         if (!netif_msg_hw(adapter))
 378                 return;
 379
 380         /* Print netdevice Info */
 381         if (netdev) {
 382                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 383                 pr_info("Device Name     state            trans_start      last_rx\n");
 384                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 385                         netdev->state, netdev->trans_start, netdev->last_rx);
 386         }
 387
 388         /* Print Registers */
 389         dev_info(&adapter->pdev->dev, "Register Dump\n");
 390         pr_info(" Register Name   Value\n");
 391         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 392              reginfo->name; reginfo++) {
 393                 igb_regdump(hw, reginfo);
 394         }
 395
 396         /* Print TX Ring Summary */
 397         if (!netdev || !netif_running(netdev))
 398                 goto exit;
 399
 400         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 401         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 402         for (n = 0; n < adapter->num_tx_queues; n++) {
 403                 struct igb_tx_buffer *buffer_info;
 404                 tx_ring = adapter->tx_ring[n];
 405                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 406                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 407                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 408                         (u64)dma_unmap_addr(buffer_info, dma),
 409                         dma_unmap_len(buffer_info, len),
 410                         buffer_info->next_to_watch,
 411                         (u64)buffer_info->time_stamp);
 412         }
 413
 414         /* Print TX Rings */
 415         if (!netif_msg_tx_done(adapter))
 416                 goto rx_ring_summary;
 417
 418         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 419
 420         /* Transmit Descriptor Formats
 421          *
 422          * Advanced Transmit Descriptor
 423          *   +--------------------------------------------------------------+
 424          * 0 |         Buffer Address [63:0]                                |
 425          *   +--------------------------------------------------------------+
 426          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 427          *   +--------------------------------------------------------------+
 428          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 429          */
 430
 431         for (n = 0; n < adapter->num_tx_queues; n++) {
 432                 tx_ring = adapter->tx_ring[n];
 433                 pr_info("------------------------------------\n");
 434                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 435                 pr_info("------------------------------------\n");
 436                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 437
 438                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 439                         const char *next_desc;
 440                         struct igb_tx_buffer *buffer_info;
 441                         tx_desc = IGB_TX_DESC(tx_ring, i);
 442                         buffer_info = &tx_ring->tx_buffer_info[i];
 443                         u0 = (struct my_u0 *)tx_desc;
 444                         if (i == tx_ring->next_to_use &&
 445                             i == tx_ring->next_to_clean)
 446                                 next_desc = " NTC/U";
 447                         else if (i == tx_ring->next_to_use)
 448                                 next_desc = " NTU";
 449                         else if (i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC";
 451                         else
 452                                 next_desc = "";
 453
 454                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 455                                 i, le64_to_cpu(u0->a),
 456                                 le64_to_cpu(u0->b),
 457                                 (u64)dma_unmap_addr(buffer_info, dma),
 458                                 dma_unmap_len(buffer_info, len),
 459                                 buffer_info->next_to_watch,
 460                                 (u64)buffer_info->time_stamp,
 461                                 buffer_info->skb, next_desc);
 462
 463                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 464                                 print_hex_dump(KERN_INFO, "",
 465                                         DUMP_PREFIX_ADDRESS,
 466                                         16, 1, buffer_info->skb->data,
 467                                         dma_unmap_len(buffer_info, len),
 468                                         true);
 469                 }
 470         }
 471
 472         /* Print RX Rings Summary */
 473 rx_ring_summary:
 474         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 475         pr_info("Queue [NTU] [NTC]\n");
 476         for (n = 0; n < adapter->num_rx_queues; n++) {
 477                 rx_ring = adapter->rx_ring[n];
 478                 pr_info(" %5d %5X %5X\n",
 479                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 480         }
 481
 482         /* Print RX Rings */
 483         if (!netif_msg_rx_status(adapter))
 484                 goto exit;
 485
 486         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 487
 488         /* Advanced Receive Descriptor (Read) Format
 489          *    63                                           1        0
 490          *    +-----------------------------------------------------+
 491          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 492          *    +----------------------------------------------+------+
 493          *  8 |       Header Buffer Address [63:1]           |  DD  |
 494          *    +-----------------------------------------------------+
 495          *
 496          *
 497          * Advanced Receive Descriptor (Write-Back) Format
 498          *
 499          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 500          *   +------------------------------------------------------+
 501          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 502          *   | Checksum   Ident  |   |           |    | Type | Type |
 503          *   +------------------------------------------------------+
 504          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 505          *   +------------------------------------------------------+
 506          *   63       48 47    32 31            20 19               0
 507          */
 508
 509         for (n = 0; n < adapter->num_rx_queues; n++) {
 510                 rx_ring = adapter->rx_ring[n];
 511                 pr_info("------------------------------------\n");
 512                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 513                 pr_info("------------------------------------\n");
 514                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 515                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 516
 517                 for (i = 0; i < rx_ring->count; i++) {
 518                         const char *next_desc;
 519                         struct igb_rx_buffer *buffer_info;
 520                         buffer_info = &rx_ring->rx_buffer_info[i];
 521                         rx_desc = IGB_RX_DESC(rx_ring, i);
 522                         u0 = (struct my_u0 *)rx_desc;
 523                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 524
 525                         if (i == rx_ring->next_to_use)
 526                                 next_desc = " NTU";
 527                         else if (i == rx_ring->next_to_clean)
 528                                 next_desc = " NTC";
 529                         else
 530                                 next_desc = "";
 531
 532                         if (staterr & E1000_RXD_STAT_DD) {
 533                                 /* Descriptor Done */
 534                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 535                                         "RWB", i,
 536                                         le64_to_cpu(u0->a),
 537                                         le64_to_cpu(u0->b),
 538                                         next_desc);
 539                         } else {
 540                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 541                                         "R  ", i,
 542                                         le64_to_cpu(u0->a),
 543                                         le64_to_cpu(u0->b),
 544                                         (u64)buffer_info->dma,
 545                                         next_desc);
 546
 547                                 if (netif_msg_pktdata(adapter) &&
 548                                     buffer_info->dma && buffer_info->page) {
 549                                         print_hex_dump(KERN_INFO, "",
 550                                           DUMP_PREFIX_ADDRESS,
 551                                           16, 1,
 552                                           page_address(buffer_info->page) +
 553                                                       buffer_info->page_offset,
 554                                           IGB_RX_BUFSZ, true);
 555                                 }
 556                         }
 557                 }
 558         }
 559
 560 exit:
 561         return;
 562 }
 563
 564 /**
 565  *  igb_get_i2c_data - Reads the I2C SDA data bit
 566  *  @hw: pointer to hardware structure
 567  *  @i2cctl: Current value of I2CCTL register
 568  *
 569  *  Returns the I2C data bit value
 570  **/
 571 static int igb_get_i2c_data(void *data)
 572 {
 573         struct igb_adapter *adapter = (struct igb_adapter *)data;
 574         struct e1000_hw *hw = &adapter->hw;
 575         s32 i2cctl = rd32(E1000_I2CPARAMS);
 576
 577         return !!(i2cctl & E1000_I2C_DATA_IN);
 578 }
 579
 580 /**
 581  *  igb_set_i2c_data - Sets the I2C data bit
 582  *  @data: pointer to hardware structure
 583  *  @state: I2C data value (0 or 1) to set
 584  *
 585  *  Sets the I2C data bit
 586  **/
 587 static void igb_set_i2c_data(void *data, int state)
 588 {
 589         struct igb_adapter *adapter = (struct igb_adapter *)data;
 590         struct e1000_hw *hw = &adapter->hw;
 591         s32 i2cctl = rd32(E1000_I2CPARAMS);
 592
 593         if (state)
 594                 i2cctl |= E1000_I2C_DATA_OUT;
 595         else
 596                 i2cctl &= ~E1000_I2C_DATA_OUT;
 597
 598         i2cctl &= ~E1000_I2C_DATA_OE_N;
 599         i2cctl |= E1000_I2C_CLK_OE_N;
 600         wr32(E1000_I2CPARAMS, i2cctl);
 601         wrfl();
 602
 603 }
 604
 605 /**
 606  *  igb_set_i2c_clk - Sets the I2C SCL clock
 607  *  @data: pointer to hardware structure
 608  *  @state: state to set clock
 609  *
 610  *  Sets the I2C clock line to state
 611  **/
 612 static void igb_set_i2c_clk(void *data, int state)
 613 {
 614         struct igb_adapter *adapter = (struct igb_adapter *)data;
 615         struct e1000_hw *hw = &adapter->hw;
 616         s32 i2cctl = rd32(E1000_I2CPARAMS);
 617
 618         if (state) {
 619                 i2cctl |= E1000_I2C_CLK_OUT;
 620                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 621         } else {
 622                 i2cctl &= ~E1000_I2C_CLK_OUT;
 623                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 624         }
 625         wr32(E1000_I2CPARAMS, i2cctl);
 626         wrfl();
 627 }
 628
 629 /**
 630  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 631  *  @data: pointer to hardware structure
 632  *
 633  *  Gets the I2C clock state
 634  **/
 635 static int igb_get_i2c_clk(void *data)
 636 {
 637         struct igb_adapter *adapter = (struct igb_adapter *)data;
 638         struct e1000_hw *hw = &adapter->hw;
 639         s32 i2cctl = rd32(E1000_I2CPARAMS);
 640
 641         return !!(i2cctl & E1000_I2C_CLK_IN);
 642 }
 643
 644 static const struct i2c_algo_bit_data igb_i2c_algo = {
 645         .setsda         = igb_set_i2c_data,
 646         .setscl         = igb_set_i2c_clk,
 647         .getsda         = igb_get_i2c_data,
 648         .getscl         = igb_get_i2c_clk,
 649         .udelay         = 5,
 650         .timeout        = 20,
 651 };
 652
 653 /**
 654  *  igb_get_hw_dev - return device
 655  *  @hw: pointer to hardware structure
 656  *
 657  *  used by hardware layer to print debugging information
 658  **/
 659 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 660 {
 661         struct igb_adapter *adapter = hw->back;
 662         return adapter->netdev;
 663 }
 664
 665 /**
 666  *  igb_init_module - Driver Registration Routine
 667  *
 668  *  igb_init_module is the first routine called when the driver is
 669  *  loaded. All it does is register with the PCI subsystem.
 670  **/
 671 static int __init igb_init_module(void)
 672 {
 673         int ret;
 674
 675         pr_info("%s - version %s\n",
 676                igb_driver_string, igb_driver_version);
 677         pr_info("%s\n", igb_copyright);
 678
 679 #ifdef CONFIG_IGB_DCA
 680         dca_register_notify(&dca_notifier);
 681 #endif
 682         ret = pci_register_driver(&igb_driver);
 683         return ret;
 684 }
 685
 686 module_init(igb_init_module);
 687
 688 /**
 689  *  igb_exit_module - Driver Exit Cleanup Routine
 690  *
 691  *  igb_exit_module is called just before the driver is removed
 692  *  from memory.
 693  **/
 694 static void __exit igb_exit_module(void)
 695 {
 696 #ifdef CONFIG_IGB_DCA
 697         dca_unregister_notify(&dca_notifier);
 698 #endif
 699         pci_unregister_driver(&igb_driver);
 700 }
 701
 702 module_exit(igb_exit_module);
 703
 704 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 705 /**
 706  *  igb_cache_ring_register - Descriptor ring to register mapping
 707  *  @adapter: board private structure to initialize
 708  *
 709  *  Once we know the feature-set enabled for the device, we'll cache
 710  *  the register offset the descriptor ring is assigned to.
 711  **/
 712 static void igb_cache_ring_register(struct igb_adapter *adapter)
 713 {
 714         int i = 0, j = 0;
 715         u32 rbase_offset = adapter->vfs_allocated_count;
 716
 717         switch (adapter->hw.mac.type) {
 718         case e1000_82576:
 719                 /* The queues are allocated for virtualization such that VF 0
 720                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 721                  * In order to avoid collision we start at the first free queue
 722                  * and continue consuming queues in the same sequence
 723                  */
 724                 if (adapter->vfs_allocated_count) {
 725                         for (; i < adapter->rss_queues; i++)
 726                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 727                                                                Q_IDX_82576(i);
 728                 }
 729                 /* Fall through */
 730         case e1000_82575:
 731         case e1000_82580:
 732         case e1000_i350:
 733         case e1000_i354:
 734         case e1000_i210:
 735         case e1000_i211:
 736                 /* Fall through */
 737         default:
 738                 for (; i < adapter->num_rx_queues; i++)
 739                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 740                 for (; j < adapter->num_tx_queues; j++)
 741                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 742                 break;
 743         }
 744 }
 745
 746 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 747 {
 748         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 749         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 750         u32 value = 0;
 751
 752         if (E1000_REMOVED(hw_addr))
 753                 return ~value;
 754
 755         value = readl(&hw_addr[reg]);
 756
 757         /* reads should not return all F's */
 758         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 759                 struct net_device *netdev = igb->netdev;
 760                 hw->hw_addr = NULL;
 761                 netif_device_detach(netdev);
 762                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 763         }
 764
 765         return value;
 766 }
 767
 768 /**
 769  *  igb_write_ivar - configure ivar for given MSI-X vector
 770  *  @hw: pointer to the HW structure
 771  *  @msix_vector: vector number we are allocating to a given ring
 772  *  @index: row index of IVAR register to write within IVAR table
 773  *  @offset: column offset of in IVAR, should be multiple of 8
 774  *
 775  *  This function is intended to handle the writing of the IVAR register
 776  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 777  *  each containing an cause allocation for an Rx and Tx ring, and a
 778  *  variable number of rows depending on the number of queues supported.
 779  **/
 780 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 781                            int index, int offset)
 782 {
 783         u32 ivar = array_rd32(E1000_IVAR0, index);
 784
 785         /* clear any bits that are currently set */
 786         ivar &= ~((u32)0xFF << offset);
 787
 788         /* write vector and valid bit */
 789         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 790
 791         array_wr32(E1000_IVAR0, index, ivar);
 792 }
 793
 794 #define IGB_N0_QUEUE -1
 795 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 796 {
 797         struct igb_adapter *adapter = q_vector->adapter;
 798         struct e1000_hw *hw = &adapter->hw;
 799         int rx_queue = IGB_N0_QUEUE;
 800         int tx_queue = IGB_N0_QUEUE;
 801         u32 msixbm = 0;
 802
 803         if (q_vector->rx.ring)
 804                 rx_queue = q_vector->rx.ring->reg_idx;
 805         if (q_vector->tx.ring)
 806                 tx_queue = q_vector->tx.ring->reg_idx;
 807
 808         switch (hw->mac.type) {
 809         case e1000_82575:
 810                 /* The 82575 assigns vectors using a bitmask, which matches the
 811                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 812                  * or more queues to a vector, we write the appropriate bits
 813                  * into the MSIXBM register for that vector.
 814                  */
 815                 if (rx_queue > IGB_N0_QUEUE)
 816                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 817                 if (tx_queue > IGB_N0_QUEUE)
 818                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 819                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 820                         msixbm |= E1000_EIMS_OTHER;
 821                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 822                 q_vector->eims_value = msixbm;
 823                 break;
 824         case e1000_82576:
 825                 /* 82576 uses a table that essentially consists of 2 columns
 826                  * with 8 rows.  The ordering is column-major so we use the
 827                  * lower 3 bits as the row index, and the 4th bit as the
 828                  * column offset.
 829                  */
 830                 if (rx_queue > IGB_N0_QUEUE)
 831                         igb_write_ivar(hw, msix_vector,
 832                                        rx_queue & 0x7,
 833                                        (rx_queue & 0x8) << 1);
 834                 if (tx_queue > IGB_N0_QUEUE)
 835                         igb_write_ivar(hw, msix_vector,
 836                                        tx_queue & 0x7,
 837                                        ((tx_queue & 0x8) << 1) + 8);
 838                 q_vector->eims_value = 1 << msix_vector;
 839                 break;
 840         case e1000_82580:
 841         case e1000_i350:
 842         case e1000_i354:
 843         case e1000_i210:
 844         case e1000_i211:
 845                 /* On 82580 and newer adapters the scheme is similar to 82576
 846                  * however instead of ordering column-major we have things
 847                  * ordered row-major.  So we traverse the table by using
 848                  * bit 0 as the column offset, and the remaining bits as the
 849                  * row index.
 850                  */
 851                 if (rx_queue > IGB_N0_QUEUE)
 852                         igb_write_ivar(hw, msix_vector,
 853                                        rx_queue >> 1,
 854                                        (rx_queue & 0x1) << 4);
 855                 if (tx_queue > IGB_N0_QUEUE)
 856                         igb_write_ivar(hw, msix_vector,
 857                                        tx_queue >> 1,
 858                                        ((tx_queue & 0x1) << 4) + 8);
 859                 q_vector->eims_value = 1 << msix_vector;
 860                 break;
 861         default:
 862                 BUG();
 863                 break;
 864         }
 865
 866         /* add q_vector eims value to global eims_enable_mask */
 867         adapter->eims_enable_mask |= q_vector->eims_value;
 868
 869         /* configure q_vector to set itr on first interrupt */
 870         q_vector->set_itr = 1;
 871 }
 872
 873 /**
 874  *  igb_configure_msix - Configure MSI-X hardware
 875  *  @adapter: board private structure to initialize
 876  *
 877  *  igb_configure_msix sets up the hardware to properly
 878  *  generate MSI-X interrupts.
 879  **/
 880 static void igb_configure_msix(struct igb_adapter *adapter)
 881 {
 882         u32 tmp;
 883         int i, vector = 0;
 884         struct e1000_hw *hw = &adapter->hw;
 885
 886         adapter->eims_enable_mask = 0;
 887
 888         /* set vector for other causes, i.e. link changes */
 889         switch (hw->mac.type) {
 890         case e1000_82575:
 891                 tmp = rd32(E1000_CTRL_EXT);
 892                 /* enable MSI-X PBA support*/
 893                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 894
 895                 /* Auto-Mask interrupts upon ICR read. */
 896                 tmp |= E1000_CTRL_EXT_EIAME;
 897                 tmp |= E1000_CTRL_EXT_IRCA;
 898
 899                 wr32(E1000_CTRL_EXT, tmp);
 900
 901                 /* enable msix_other interrupt */
 902                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 903                 adapter->eims_other = E1000_EIMS_OTHER;
 904
 905                 break;
 906
 907         case e1000_82576:
 908         case e1000_82580:
 909         case e1000_i350:
 910         case e1000_i354:
 911         case e1000_i210:
 912         case e1000_i211:
 913                 /* Turn on MSI-X capability first, or our settings
 914                  * won't stick.  And it will take days to debug.
 915                  */
 916                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 917                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 918                      E1000_GPIE_NSICR);
 919
 920                 /* enable msix_other interrupt */
 921                 adapter->eims_other = 1 << vector;
 922                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 923
 924                 wr32(E1000_IVAR_MISC, tmp);
 925                 break;
 926         default:
 927                 /* do nothing, since nothing else supports MSI-X */
 928                 break;
 929         } /* switch (hw->mac.type) */
 930
 931         adapter->eims_enable_mask |= adapter->eims_other;
 932
 933         for (i = 0; i < adapter->num_q_vectors; i++)
 934                 igb_assign_vector(adapter->q_vector[i], vector++);
 935
 936         wrfl();
 937 }
 938
 939 /**
 940  *  igb_request_msix - Initialize MSI-X interrupts
 941  *  @adapter: board private structure to initialize
 942  *
 943  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 944  *  kernel.
 945  **/
 946 static int igb_request_msix(struct igb_adapter *adapter)
 947 {
 948         struct net_device *netdev = adapter->netdev;
 949         struct e1000_hw *hw = &adapter->hw;
 950         int i, err = 0, vector = 0, free_vector = 0;
 951
 952         err = request_irq(adapter->msix_entries[vector].vector,
 953                           igb_msix_other, 0, netdev->name, adapter);
 954         if (err)
 955                 goto err_out;
 956
 957         for (i = 0; i < adapter->num_q_vectors; i++) {
 958                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 959
 960                 vector++;
 961
 962                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 963
 964                 if (q_vector->rx.ring && q_vector->tx.ring)
 965                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 966                                 q_vector->rx.ring->queue_index);
 967                 else if (q_vector->tx.ring)
 968                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 969                                 q_vector->tx.ring->queue_index);
 970                 else if (q_vector->rx.ring)
 971                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 972                                 q_vector->rx.ring->queue_index);
 973                 else
 974                         sprintf(q_vector->name, "%s-unused", netdev->name);
 975
 976                 err = request_irq(adapter->msix_entries[vector].vector,
 977                                   igb_msix_ring, 0, q_vector->name,
 978                                   q_vector);
 979                 if (err)
 980                         goto err_free;
 981         }
 982
 983         igb_configure_msix(adapter);
 984         return 0;
 985
 986 err_free:
 987         /* free already assigned IRQs */
 988         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 989
 990         vector--;
 991         for (i = 0; i < vector; i++) {
 992                 free_irq(adapter->msix_entries[free_vector++].vector,
 993                          adapter->q_vector[i]);
 994         }
 995 err_out:
 996         return err;
 997 }
 998
 999 /**
1000  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1001  *  @adapter: board private structure to initialize
1002  *  @v_idx: Index of vector to be freed
1003  *
1004  *  This function frees the memory allocated to the q_vector.
1005  **/
1006 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1007 {
1008         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1009
1010         adapter->q_vector[v_idx] = NULL;
1011
1012         /* igb_get_stats64() might access the rings on this vector,
1013          * we must wait a grace period before freeing it.
1014          */
1015         kfree_rcu(q_vector, rcu);
1016 }
1017
1018 /**
1019  *  igb_reset_q_vector - Reset config for interrupt vector
1020  *  @adapter: board private structure to initialize
1021  *  @v_idx: Index of vector to be reset
1022  *
1023  *  If NAPI is enabled it will delete any references to the
1024  *  NAPI struct. This is preparation for igb_free_q_vector.
1025  **/
1026 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1027 {
1028         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1029
1030         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1031          * allocated. So, q_vector is NULL so we should stop here.
1032          */
1033         if (!q_vector)
1034                 return;
1035
1036         if (q_vector->tx.ring)
1037                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1038
1039         if (q_vector->rx.ring)
1040                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1041
1042         netif_napi_del(&q_vector->napi);
1043
1044 }
1045
1046 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1047 {
1048         int v_idx = adapter->num_q_vectors;
1049
1050         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1051                 pci_disable_msix(adapter->pdev);
1052         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1053                 pci_disable_msi(adapter->pdev);
1054
1055         while (v_idx--)
1056                 igb_reset_q_vector(adapter, v_idx);
1057 }
1058
1059 /**
1060  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1061  *  @adapter: board private structure to initialize
1062  *
1063  *  This function frees the memory allocated to the q_vectors.  In addition if
1064  *  NAPI is enabled it will delete any references to the NAPI struct prior
1065  *  to freeing the q_vector.
1066  **/
1067 static void igb_free_q_vectors(struct igb_adapter *adapter)
1068 {
1069         int v_idx = adapter->num_q_vectors;
1070
1071         adapter->num_tx_queues = 0;
1072         adapter->num_rx_queues = 0;
1073         adapter->num_q_vectors = 0;
1074
1075         while (v_idx--) {
1076                 igb_reset_q_vector(adapter, v_idx);
1077                 igb_free_q_vector(adapter, v_idx);
1078         }
1079 }
1080
1081 /**
1082  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1083  *  @adapter: board private structure to initialize
1084  *
1085  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1086  *  MSI-X interrupts allocated.
1087  */
1088 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1089 {
1090         igb_free_q_vectors(adapter);
1091         igb_reset_interrupt_capability(adapter);
1092 }
1093
1094 /**
1095  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1096  *  @adapter: board private structure to initialize
1097  *  @msix: boolean value of MSIX capability
1098  *
1099  *  Attempt to configure interrupts using the best available
1100  *  capabilities of the hardware and kernel.
1101  **/
1102 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1103 {
1104         int err;
1105         int numvecs, i;
1106
1107         if (!msix)
1108                 goto msi_only;
1109         adapter->flags |= IGB_FLAG_HAS_MSIX;
1110
1111         /* Number of supported queues. */
1112         adapter->num_rx_queues = adapter->rss_queues;
1113         if (adapter->vfs_allocated_count)
1114                 adapter->num_tx_queues = 1;
1115         else
1116                 adapter->num_tx_queues = adapter->rss_queues;
1117
1118         /* start with one vector for every Rx queue */
1119         numvecs = adapter->num_rx_queues;
1120
1121         /* if Tx handler is separate add 1 for every Tx queue */
1122         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1123                 numvecs += adapter->num_tx_queues;
1124
1125         /* store the number of vectors reserved for queues */
1126         adapter->num_q_vectors = numvecs;
1127
1128         /* add 1 vector for link status interrupts */
1129         numvecs++;
1130         for (i = 0; i < numvecs; i++)
1131                 adapter->msix_entries[i].entry = i;
1132
1133         err = pci_enable_msix_range(adapter->pdev,
1134                                     adapter->msix_entries,
1135                                     numvecs,
1136                                     numvecs);
1137         if (err > 0)
1138                 return;
1139
1140         igb_reset_interrupt_capability(adapter);
1141
1142         /* If we can't do MSI-X, try MSI */
1143 msi_only:
1144         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1145 #ifdef CONFIG_PCI_IOV
1146         /* disable SR-IOV for non MSI-X configurations */
1147         if (adapter->vf_data) {
1148                 struct e1000_hw *hw = &adapter->hw;
1149                 /* disable iov and allow time for transactions to clear */
1150                 pci_disable_sriov(adapter->pdev);
1151                 msleep(500);
1152
1153                 kfree(adapter->vf_data);
1154                 adapter->vf_data = NULL;
1155                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1156                 wrfl();
1157                 msleep(100);
1158                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1159         }
1160 #endif
1161         adapter->vfs_allocated_count = 0;
1162         adapter->rss_queues = 1;
1163         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1164         adapter->num_rx_queues = 1;
1165         adapter->num_tx_queues = 1;
1166         adapter->num_q_vectors = 1;
1167         if (!pci_enable_msi(adapter->pdev))
1168                 adapter->flags |= IGB_FLAG_HAS_MSI;
1169 }
1170
1171 static void igb_add_ring(struct igb_ring *ring,
1172                          struct igb_ring_container *head)
1173 {
1174         head->ring = ring;
1175         head->count++;
1176 }
1177
1178 /**
1179  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1180  *  @adapter: board private structure to initialize
1181  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1182  *  @v_idx: index of vector in adapter struct
1183  *  @txr_count: total number of Tx rings to allocate
1184  *  @txr_idx: index of first Tx ring to allocate
1185  *  @rxr_count: total number of Rx rings to allocate
1186  *  @rxr_idx: index of first Rx ring to allocate
1187  *
1188  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1189  **/
1190 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1191                               int v_count, int v_idx,
1192                               int txr_count, int txr_idx,
1193                               int rxr_count, int rxr_idx)
1194 {
1195         struct igb_q_vector *q_vector;
1196         struct igb_ring *ring;
1197         int ring_count, size;
1198
1199         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1200         if (txr_count > 1 || rxr_count > 1)
1201                 return -ENOMEM;
1202
1203         ring_count = txr_count + rxr_count;
1204         size = sizeof(struct igb_q_vector) +
1205                (sizeof(struct igb_ring) * ring_count);
1206
1207         /* allocate q_vector and rings */
1208         q_vector = adapter->q_vector[v_idx];
1209         if (!q_vector)
1210                 q_vector = kzalloc(size, GFP_KERNEL);
1211         if (!q_vector)
1212                 return -ENOMEM;
1213
1214         /* initialize NAPI */
1215         netif_napi_add(adapter->netdev, &q_vector->napi,
1216                        igb_poll, 64);
1217
1218         /* tie q_vector and adapter together */
1219         adapter->q_vector[v_idx] = q_vector;
1220         q_vector->adapter = adapter;
1221
1222         /* initialize work limits */
1223         q_vector->tx.work_limit = adapter->tx_work_limit;
1224
1225         /* initialize ITR configuration */
1226         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1227         q_vector->itr_val = IGB_START_ITR;
1228
1229         /* initialize pointer to rings */
1230         ring = q_vector->ring;
1231
1232         /* intialize ITR */
1233         if (rxr_count) {
1234                 /* rx or rx/tx vector */
1235                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1236                         q_vector->itr_val = adapter->rx_itr_setting;
1237         } else {
1238                 /* tx only vector */
1239                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1240                         q_vector->itr_val = adapter->tx_itr_setting;
1241         }
1242
1243         if (txr_count) {
1244                 /* assign generic ring traits */
1245                 ring->dev = &adapter->pdev->dev;
1246                 ring->netdev = adapter->netdev;
1247
1248                 /* configure backlink on ring */
1249                 ring->q_vector = q_vector;
1250
1251                 /* update q_vector Tx values */
1252                 igb_add_ring(ring, &q_vector->tx);
1253
1254                 /* For 82575, context index must be unique per ring. */
1255                 if (adapter->hw.mac.type == e1000_82575)
1256                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1257
1258                 /* apply Tx specific ring traits */
1259                 ring->count = adapter->tx_ring_count;
1260                 ring->queue_index = txr_idx;
1261
1262                 u64_stats_init(&ring->tx_syncp);
1263                 u64_stats_init(&ring->tx_syncp2);
1264
1265                 /* assign ring to adapter */
1266                 adapter->tx_ring[txr_idx] = ring;
1267
1268                 /* push pointer to next ring */
1269                 ring++;
1270         }
1271
1272         if (rxr_count) {
1273                 /* assign generic ring traits */
1274                 ring->dev = &adapter->pdev->dev;
1275                 ring->netdev = adapter->netdev;
1276
1277                 /* configure backlink on ring */
1278                 ring->q_vector = q_vector;
1279
1280                 /* update q_vector Rx values */
1281                 igb_add_ring(ring, &q_vector->rx);
1282
1283                 /* set flag indicating ring supports SCTP checksum offload */
1284                 if (adapter->hw.mac.type >= e1000_82576)
1285                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1286
1287                 /* On i350, i354, i210, and i211, loopback VLAN packets
1288                  * have the tag byte-swapped.
1289                  */
1290                 if (adapter->hw.mac.type >= e1000_i350)
1291                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1292
1293                 /* apply Rx specific ring traits */
1294                 ring->count = adapter->rx_ring_count;
1295                 ring->queue_index = rxr_idx;
1296
1297                 u64_stats_init(&ring->rx_syncp);
1298
1299                 /* assign ring to adapter */
1300                 adapter->rx_ring[rxr_idx] = ring;
1301         }
1302
1303         return 0;
1304 }
1305
1306
1307 /**
1308  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1309  *  @adapter: board private structure to initialize
1310  *
1311  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1312  *  return -ENOMEM.
1313  **/
1314 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1315 {
1316         int q_vectors = adapter->num_q_vectors;
1317         int rxr_remaining = adapter->num_rx_queues;
1318         int txr_remaining = adapter->num_tx_queues;
1319         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1320         int err;
1321
1322         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1323                 for (; rxr_remaining; v_idx++) {
1324                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1325                                                  0, 0, 1, rxr_idx);
1326
1327                         if (err)
1328                                 goto err_out;
1329
1330                         /* update counts and index */
1331                         rxr_remaining--;
1332                         rxr_idx++;
1333                 }
1334         }
1335
1336         for (; v_idx < q_vectors; v_idx++) {
1337                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1338                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1339
1340                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1341                                          tqpv, txr_idx, rqpv, rxr_idx);
1342
1343                 if (err)
1344                         goto err_out;
1345
1346                 /* update counts and index */
1347                 rxr_remaining -= rqpv;
1348                 txr_remaining -= tqpv;
1349                 rxr_idx++;
1350                 txr_idx++;
1351         }
1352
1353         return 0;
1354
1355 err_out:
1356         adapter->num_tx_queues = 0;
1357         adapter->num_rx_queues = 0;
1358         adapter->num_q_vectors = 0;
1359
1360         while (v_idx--)
1361                 igb_free_q_vector(adapter, v_idx);
1362
1363         return -ENOMEM;
1364 }
1365
1366 /**
1367  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1368  *  @adapter: board private structure to initialize
1369  *  @msix: boolean value of MSIX capability
1370  *
1371  *  This function initializes the interrupts and allocates all of the queues.
1372  **/
1373 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1374 {
1375         struct pci_dev *pdev = adapter->pdev;
1376         int err;
1377
1378         igb_set_interrupt_capability(adapter, msix);
1379
1380         err = igb_alloc_q_vectors(adapter);
1381         if (err) {
1382                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1383                 goto err_alloc_q_vectors;
1384         }
1385
1386         igb_cache_ring_register(adapter);
1387
1388         return 0;
1389
1390 err_alloc_q_vectors:
1391         igb_reset_interrupt_capability(adapter);
1392         return err;
1393 }
1394
1395 /**
1396  *  igb_request_irq - initialize interrupts
1397  *  @adapter: board private structure to initialize
1398  *
1399  *  Attempts to configure interrupts using the best available
1400  *  capabilities of the hardware and kernel.
1401  **/
1402 static int igb_request_irq(struct igb_adapter *adapter)
1403 {
1404         struct net_device *netdev = adapter->netdev;
1405         struct pci_dev *pdev = adapter->pdev;
1406         int err = 0;
1407
1408         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1409                 err = igb_request_msix(adapter);
1410                 if (!err)
1411                         goto request_done;
1412                 /* fall back to MSI */
1413                 igb_free_all_tx_resources(adapter);
1414                 igb_free_all_rx_resources(adapter);
1415
1416                 igb_clear_interrupt_scheme(adapter);
1417                 err = igb_init_interrupt_scheme(adapter, false);
1418                 if (err)
1419                         goto request_done;
1420
1421                 igb_setup_all_tx_resources(adapter);
1422                 igb_setup_all_rx_resources(adapter);
1423                 igb_configure(adapter);
1424         }
1425
1426         igb_assign_vector(adapter->q_vector[0], 0);
1427
1428         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1429                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1430                                   netdev->name, adapter);
1431                 if (!err)
1432                         goto request_done;
1433
1434                 /* fall back to legacy interrupts */
1435                 igb_reset_interrupt_capability(adapter);
1436                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1437         }
1438
1439         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1440                           netdev->name, adapter);
1441
1442         if (err)
1443                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1444                         err);
1445
1446 request_done:
1447         return err;
1448 }
1449
1450 static void igb_free_irq(struct igb_adapter *adapter)
1451 {
1452         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1453                 int vector = 0, i;
1454
1455                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1456
1457                 for (i = 0; i < adapter->num_q_vectors; i++)
1458                         free_irq(adapter->msix_entries[vector++].vector,
1459                                  adapter->q_vector[i]);
1460         } else {
1461                 free_irq(adapter->pdev->irq, adapter);
1462         }
1463 }
1464
1465 /**
1466  *  igb_irq_disable - Mask off interrupt generation on the NIC
1467  *  @adapter: board private structure
1468  **/
1469 static void igb_irq_disable(struct igb_adapter *adapter)
1470 {
1471         struct e1000_hw *hw = &adapter->hw;
1472
1473         /* we need to be careful when disabling interrupts.  The VFs are also
1474          * mapped into these registers and so clearing the bits can cause
1475          * issues on the VF drivers so we only need to clear what we set
1476          */
1477         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1478                 u32 regval = rd32(E1000_EIAM);
1479
1480                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1481                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1482                 regval = rd32(E1000_EIAC);
1483                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1484         }
1485
1486         wr32(E1000_IAM, 0);
1487         wr32(E1000_IMC, ~0);
1488         wrfl();
1489         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1490                 int i;
1491
1492                 for (i = 0; i < adapter->num_q_vectors; i++)
1493                         synchronize_irq(adapter->msix_entries[i].vector);
1494         } else {
1495                 synchronize_irq(adapter->pdev->irq);
1496         }
1497 }
1498
1499 /**
1500  *  igb_irq_enable - Enable default interrupt generation settings
1501  *  @adapter: board private structure
1502  **/
1503 static void igb_irq_enable(struct igb_adapter *adapter)
1504 {
1505         struct e1000_hw *hw = &adapter->hw;
1506
1507         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1508                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1509                 u32 regval = rd32(E1000_EIAC);
1510
1511                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1512                 regval = rd32(E1000_EIAM);
1513                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1514                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1515                 if (adapter->vfs_allocated_count) {
1516                         wr32(E1000_MBVFIMR, 0xFF);
1517                         ims |= E1000_IMS_VMMB;
1518                 }
1519                 wr32(E1000_IMS, ims);
1520         } else {
1521                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1522                                 E1000_IMS_DRSTA);
1523                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1524                                 E1000_IMS_DRSTA);
1525         }
1526 }
1527
1528 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1529 {
1530         struct e1000_hw *hw = &adapter->hw;
1531         u16 vid = adapter->hw.mng_cookie.vlan_id;
1532         u16 old_vid = adapter->mng_vlan_id;
1533
1534         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1535                 /* add VID to filter table */
1536                 igb_vfta_set(hw, vid, true);
1537                 adapter->mng_vlan_id = vid;
1538         } else {
1539                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1540         }
1541
1542         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1543             (vid != old_vid) &&
1544             !test_bit(old_vid, adapter->active_vlans)) {
1545                 /* remove VID from filter table */
1546                 igb_vfta_set(hw, old_vid, false);
1547         }
1548 }
1549
1550 /**
1551  *  igb_release_hw_control - release control of the h/w to f/w
1552  *  @adapter: address of board private structure
1553  *
1554  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1555  *  For ASF and Pass Through versions of f/w this means that the
1556  *  driver is no longer loaded.
1557  **/
1558 static void igb_release_hw_control(struct igb_adapter *adapter)
1559 {
1560         struct e1000_hw *hw = &adapter->hw;
1561         u32 ctrl_ext;
1562
1563         /* Let firmware take over control of h/w */
1564         ctrl_ext = rd32(E1000_CTRL_EXT);
1565         wr32(E1000_CTRL_EXT,
1566                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1567 }
1568
1569 /**
1570  *  igb_get_hw_control - get control of the h/w from f/w
1571  *  @adapter: address of board private structure
1572  *
1573  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1574  *  For ASF and Pass Through versions of f/w this means that
1575  *  the driver is loaded.
1576  **/
1577 static void igb_get_hw_control(struct igb_adapter *adapter)
1578 {
1579         struct e1000_hw *hw = &adapter->hw;
1580         u32 ctrl_ext;
1581
1582         /* Let firmware know the driver has taken over */
1583         ctrl_ext = rd32(E1000_CTRL_EXT);
1584         wr32(E1000_CTRL_EXT,
1585                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1586 }
1587
1588 /**
1589  *  igb_configure - configure the hardware for RX and TX
1590  *  @adapter: private board structure
1591  **/
1592 static void igb_configure(struct igb_adapter *adapter)
1593 {
1594         struct net_device *netdev = adapter->netdev;
1595         int i;
1596
1597         igb_get_hw_control(adapter);
1598         igb_set_rx_mode(netdev);
1599
1600         igb_restore_vlan(adapter);
1601
1602         igb_setup_tctl(adapter);
1603         igb_setup_mrqc(adapter);
1604         igb_setup_rctl(adapter);
1605
1606         igb_configure_tx(adapter);
1607         igb_configure_rx(adapter);
1608
1609         igb_rx_fifo_flush_82575(&adapter->hw);
1610
1611         /* call igb_desc_unused which always leaves
1612          * at least 1 descriptor unused to make sure
1613          * next_to_use != next_to_clean
1614          */
1615         for (i = 0; i < adapter->num_rx_queues; i++) {
1616                 struct igb_ring *ring = adapter->rx_ring[i];
1617                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1618         }
1619 }
1620
1621 /**
1622  *  igb_power_up_link - Power up the phy/serdes link
1623  *  @adapter: address of board private structure
1624  **/
1625 void igb_power_up_link(struct igb_adapter *adapter)
1626 {
1627         igb_reset_phy(&adapter->hw);
1628
1629         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1630                 igb_power_up_phy_copper(&adapter->hw);
1631         else
1632                 igb_power_up_serdes_link_82575(&adapter->hw);
1633
1634         igb_setup_link(&adapter->hw);
1635 }
1636
1637 /**
1638  *  igb_power_down_link - Power down the phy/serdes link
1639  *  @adapter: address of board private structure
1640  */
1641 static void igb_power_down_link(struct igb_adapter *adapter)
1642 {
1643         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1644                 igb_power_down_phy_copper_82575(&adapter->hw);
1645         else
1646                 igb_shutdown_serdes_link_82575(&adapter->hw);
1647 }
1648
1649 /**
1650  * Detect and switch function for Media Auto Sense
1651  * @adapter: address of the board private structure
1652  **/
1653 static void igb_check_swap_media(struct igb_adapter *adapter)
1654 {
1655         struct e1000_hw *hw = &adapter->hw;
1656         u32 ctrl_ext, connsw;
1657         bool swap_now = false;
1658
1659         ctrl_ext = rd32(E1000_CTRL_EXT);
1660         connsw = rd32(E1000_CONNSW);
1661
1662         /* need to live swap if current media is copper and we have fiber/serdes
1663          * to go to.
1664          */
1665
1666         if ((hw->phy.media_type == e1000_media_type_copper) &&
1667             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1668                 swap_now = true;
1669         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1670                 /* copper signal takes time to appear */
1671                 if (adapter->copper_tries < 4) {
1672                         adapter->copper_tries++;
1673                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1674                         wr32(E1000_CONNSW, connsw);
1675                         return;
1676                 } else {
1677                         adapter->copper_tries = 0;
1678                         if ((connsw & E1000_CONNSW_PHYSD) &&
1679                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1680                                 swap_now = true;
1681                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1682                                 wr32(E1000_CONNSW, connsw);
1683                         }
1684                 }
1685         }
1686
1687         if (!swap_now)
1688                 return;
1689
1690         switch (hw->phy.media_type) {
1691         case e1000_media_type_copper:
1692                 netdev_info(adapter->netdev,
1693                         "MAS: changing media to fiber/serdes\n");
1694                 ctrl_ext |=
1695                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1696                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1697                 adapter->copper_tries = 0;
1698                 break;
1699         case e1000_media_type_internal_serdes:
1700         case e1000_media_type_fiber:
1701                 netdev_info(adapter->netdev,
1702                         "MAS: changing media to copper\n");
1703                 ctrl_ext &=
1704                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1705                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1706                 break;
1707         default:
1708                 /* shouldn't get here during regular operation */
1709                 netdev_err(adapter->netdev,
1710                         "AMS: Invalid media type found, returning\n");
1711                 break;
1712         }
1713         wr32(E1000_CTRL_EXT, ctrl_ext);
1714 }
1715
1716 /**
1717  *  igb_up - Open the interface and prepare it to handle traffic
1718  *  @adapter: board private structure
1719  **/
1720 int igb_up(struct igb_adapter *adapter)
1721 {
1722         struct e1000_hw *hw = &adapter->hw;
1723         int i;
1724
1725         /* hardware has been reset, we need to reload some things */
1726         igb_configure(adapter);
1727
1728         clear_bit(__IGB_DOWN, &adapter->state);
1729
1730         for (i = 0; i < adapter->num_q_vectors; i++)
1731                 napi_enable(&(adapter->q_vector[i]->napi));
1732
1733         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1734                 igb_configure_msix(adapter);
1735         else
1736                 igb_assign_vector(adapter->q_vector[0], 0);
1737
1738         /* Clear any pending interrupts. */
1739         rd32(E1000_ICR);
1740         igb_irq_enable(adapter);
1741
1742         /* notify VFs that reset has been completed */
1743         if (adapter->vfs_allocated_count) {
1744                 u32 reg_data = rd32(E1000_CTRL_EXT);
1745
1746                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1747                 wr32(E1000_CTRL_EXT, reg_data);
1748         }
1749
1750         netif_tx_start_all_queues(adapter->netdev);
1751
1752         /* start the watchdog. */
1753         hw->mac.get_link_status = 1;
1754         schedule_work(&adapter->watchdog_task);
1755
1756         if ((adapter->flags & IGB_FLAG_EEE) &&
1757             (!hw->dev_spec._82575.eee_disable))
1758                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1759
1760         return 0;
1761 }
1762
1763 void igb_down(struct igb_adapter *adapter)
1764 {
1765         struct net_device *netdev = adapter->netdev;
1766         struct e1000_hw *hw = &adapter->hw;
1767         u32 tctl, rctl;
1768         int i;
1769
1770         /* signal that we're down so the interrupt handler does not
1771          * reschedule our watchdog timer
1772          */
1773         set_bit(__IGB_DOWN, &adapter->state);
1774
1775         /* disable receives in the hardware */
1776         rctl = rd32(E1000_RCTL);
1777         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1778         /* flush and sleep below */
1779
1780         netif_tx_stop_all_queues(netdev);
1781
1782         /* disable transmits in the hardware */
1783         tctl = rd32(E1000_TCTL);
1784         tctl &= ~E1000_TCTL_EN;
1785         wr32(E1000_TCTL, tctl);
1786         /* flush both disables and wait for them to finish */
1787         wrfl();
1788         usleep_range(10000, 11000);
1789
1790         igb_irq_disable(adapter);
1791
1792         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1793
1794         for (i = 0; i < adapter->num_q_vectors; i++) {
1795                 napi_synchronize(&(adapter->q_vector[i]->napi));
1796                 napi_disable(&(adapter->q_vector[i]->napi));
1797         }
1798
1799
1800         del_timer_sync(&adapter->watchdog_timer);
1801         del_timer_sync(&adapter->phy_info_timer);
1802
1803         netif_carrier_off(netdev);
1804
1805         /* record the stats before reset*/
1806         spin_lock(&adapter->stats64_lock);
1807         igb_update_stats(adapter, &adapter->stats64);
1808         spin_unlock(&adapter->stats64_lock);
1809
1810         adapter->link_speed = 0;
1811         adapter->link_duplex = 0;
1812
1813         if (!pci_channel_offline(adapter->pdev))
1814                 igb_reset(adapter);
1815         igb_clean_all_tx_rings(adapter);
1816         igb_clean_all_rx_rings(adapter);
1817 #ifdef CONFIG_IGB_DCA
1818
1819         /* since we reset the hardware DCA settings were cleared */
1820         igb_setup_dca(adapter);
1821 #endif
1822 }
1823
1824 void igb_reinit_locked(struct igb_adapter *adapter)
1825 {
1826         WARN_ON(in_interrupt());
1827         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1828                 usleep_range(1000, 2000);
1829         igb_down(adapter);
1830         igb_up(adapter);
1831         clear_bit(__IGB_RESETTING, &adapter->state);
1832 }
1833
1834 /** igb_enable_mas - Media Autosense re-enable after swap
1835  *
1836  * @adapter: adapter struct
1837  **/
1838 static s32 igb_enable_mas(struct igb_adapter *adapter)
1839 {
1840         struct e1000_hw *hw = &adapter->hw;
1841         u32 connsw;
1842         s32 ret_val = 0;
1843
1844         connsw = rd32(E1000_CONNSW);
1845         if (!(hw->phy.media_type == e1000_media_type_copper))
1846                 return ret_val;
1847
1848         /* configure for SerDes media detect */
1849         if (!(connsw & E1000_CONNSW_SERDESD)) {
1850                 connsw |= E1000_CONNSW_ENRGSRC;
1851                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1852                 wr32(E1000_CONNSW, connsw);
1853                 wrfl();
1854         } else if (connsw & E1000_CONNSW_SERDESD) {
1855                 /* already SerDes, no need to enable anything */
1856                 return ret_val;
1857         } else {
1858                 netdev_info(adapter->netdev,
1859                         "MAS: Unable to configure feature, disabling..\n");
1860                 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1861         }
1862         return ret_val;
1863 }
1864
1865 void igb_reset(struct igb_adapter *adapter)
1866 {
1867         struct pci_dev *pdev = adapter->pdev;
1868         struct e1000_hw *hw = &adapter->hw;
1869         struct e1000_mac_info *mac = &hw->mac;
1870         struct e1000_fc_info *fc = &hw->fc;
1871         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1872
1873         /* Repartition Pba for greater than 9k mtu
1874          * To take effect CTRL.RST is required.
1875          */
1876         switch (mac->type) {
1877         case e1000_i350:
1878         case e1000_i354:
1879         case e1000_82580:
1880                 pba = rd32(E1000_RXPBS);
1881                 pba = igb_rxpbs_adjust_82580(pba);
1882                 break;
1883         case e1000_82576:
1884                 pba = rd32(E1000_RXPBS);
1885                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1886                 break;
1887         case e1000_82575:
1888         case e1000_i210:
1889         case e1000_i211:
1890         default:
1891                 pba = E1000_PBA_34K;
1892                 break;
1893         }
1894
1895         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1896             (mac->type < e1000_82576)) {
1897                 /* adjust PBA for jumbo frames */
1898                 wr32(E1000_PBA, pba);
1899
1900                 /* To maintain wire speed transmits, the Tx FIFO should be
1901                  * large enough to accommodate two full transmit packets,
1902                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1903                  * the Rx FIFO should be large enough to accommodate at least
1904                  * one full receive packet and is similarly rounded up and
1905                  * expressed in KB.
1906                  */
1907                 pba = rd32(E1000_PBA);
1908                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1909                 tx_space = pba >> 16;
1910                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1911                 pba &= 0xffff;
1912                 /* the Tx fifo also stores 16 bytes of information about the Tx
1913                  * but don't include ethernet FCS because hardware appends it
1914                  */
1915                 min_tx_space = (adapter->max_frame_size +
1916                                 sizeof(union e1000_adv_tx_desc) -
1917                                 ETH_FCS_LEN) * 2;
1918                 min_tx_space = ALIGN(min_tx_space, 1024);
1919                 min_tx_space >>= 10;
1920                 /* software strips receive CRC, so leave room for it */
1921                 min_rx_space = adapter->max_frame_size;
1922                 min_rx_space = ALIGN(min_rx_space, 1024);
1923                 min_rx_space >>= 10;
1924
1925                 /* If current Tx allocation is less than the min Tx FIFO size,
1926                  * and the min Tx FIFO size is less than the current Rx FIFO
1927                  * allocation, take space away from current Rx allocation
1928                  */
1929                 if (tx_space < min_tx_space &&
1930                     ((min_tx_space - tx_space) < pba)) {
1931                         pba = pba - (min_tx_space - tx_space);
1932
1933                         /* if short on Rx space, Rx wins and must trump Tx
1934                          * adjustment
1935                          */
1936                         if (pba < min_rx_space)
1937                                 pba = min_rx_space;
1938                 }
1939                 wr32(E1000_PBA, pba);
1940         }
1941
1942         /* flow control settings */
1943         /* The high water mark must be low enough to fit one full frame
1944          * (or the size used for early receive) above it in the Rx FIFO.
1945          * Set it to the lower of:
1946          * - 90% of the Rx FIFO size, or
1947          * - the full Rx FIFO size minus one full frame
1948          */
1949         hwm = min(((pba << 10) * 9 / 10),
1950                         ((pba << 10) - 2 * adapter->max_frame_size));
1951
1952         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1953         fc->low_water = fc->high_water - 16;
1954         fc->pause_time = 0xFFFF;
1955         fc->send_xon = 1;
1956         fc->current_mode = fc->requested_mode;
1957
1958         /* disable receive for all VFs and wait one second */
1959         if (adapter->vfs_allocated_count) {
1960                 int i;
1961
1962                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1963                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1964
1965                 /* ping all the active vfs to let them know we are going down */
1966                 igb_ping_all_vfs(adapter);
1967
1968                 /* disable transmits and receives */
1969                 wr32(E1000_VFRE, 0);
1970                 wr32(E1000_VFTE, 0);
1971         }
1972
1973         /* Allow time for pending master requests to run */
1974         hw->mac.ops.reset_hw(hw);
1975         wr32(E1000_WUC, 0);
1976
1977         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1978                 /* need to resetup here after media swap */
1979                 adapter->ei.get_invariants(hw);
1980                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1981         }
1982         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1983                 if (igb_enable_mas(adapter))
1984                         dev_err(&pdev->dev,
1985                                 "Error enabling Media Auto Sense\n");
1986         }
1987         if (hw->mac.ops.init_hw(hw))
1988                 dev_err(&pdev->dev, "Hardware Error\n");
1989
1990         /* Flow control settings reset on hardware reset, so guarantee flow
1991          * control is off when forcing speed.
1992          */
1993         if (!hw->mac.autoneg)
1994                 igb_force_mac_fc(hw);
1995
1996         igb_init_dmac(adapter, pba);
1997 #ifdef CONFIG_IGB_HWMON
1998         /* Re-initialize the thermal sensor on i350 devices. */
1999         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2000                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2001                         /* If present, re-initialize the external thermal sensor
2002                          * interface.
2003                          */
2004                         if (adapter->ets)
2005                                 mac->ops.init_thermal_sensor_thresh(hw);
2006                 }
2007         }
2008 #endif
2009         /* Re-establish EEE setting */
2010         if (hw->phy.media_type == e1000_media_type_copper) {
2011                 switch (mac->type) {
2012                 case e1000_i350:
2013                 case e1000_i210:
2014                 case e1000_i211:
2015                         igb_set_eee_i350(hw, true, true);
2016                         break;
2017                 case e1000_i354:
2018                         igb_set_eee_i354(hw, true, true);
2019                         break;
2020                 default:
2021                         break;
2022                 }
2023         }
2024         if (!netif_running(adapter->netdev))
2025                 igb_power_down_link(adapter);
2026
2027         igb_update_mng_vlan(adapter);
2028
2029         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2030         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2031
2032         /* Re-enable PTP, where applicable. */
2033         igb_ptp_reset(adapter);
2034
2035         igb_get_phy_info(hw);
2036 }
2037
2038 static netdev_features_t igb_fix_features(struct net_device *netdev,
2039         netdev_features_t features)
2040 {
2041         /* Since there is no support for separate Rx/Tx vlan accel
2042          * enable/disable make sure Tx flag is always in same state as Rx.
2043          */
2044         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2045                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2046         else
2047                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2048
2049         return features;
2050 }
2051
2052 static int igb_set_features(struct net_device *netdev,
2053         netdev_features_t features)
2054 {
2055         netdev_features_t changed = netdev->features ^ features;
2056         struct igb_adapter *adapter = netdev_priv(netdev);
2057
2058         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2059                 igb_vlan_mode(netdev, features);
2060
2061         if (!(changed & NETIF_F_RXALL))
2062                 return 0;
2063
2064         netdev->features = features;
2065
2066         if (netif_running(netdev))
2067                 igb_reinit_locked(adapter);
2068         else
2069                 igb_reset(adapter);
2070
2071         return 0;
2072 }
2073
2074 static const struct net_device_ops igb_netdev_ops = {
2075         .ndo_open               = igb_open,
2076         .ndo_stop               = igb_close,
2077         .ndo_start_xmit         = igb_xmit_frame,
2078         .ndo_get_stats64        = igb_get_stats64,
2079         .ndo_set_rx_mode        = igb_set_rx_mode,
2080         .ndo_set_mac_address    = igb_set_mac,
2081         .ndo_change_mtu         = igb_change_mtu,
2082         .ndo_do_ioctl           = igb_ioctl,
2083         .ndo_tx_timeout         = igb_tx_timeout,
2084         .ndo_validate_addr      = eth_validate_addr,
2085         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2086         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2087         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2088         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2089         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2090         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2091         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2092 #ifdef CONFIG_NET_POLL_CONTROLLER
2093         .ndo_poll_controller    = igb_netpoll,
2094 #endif
2095         .ndo_fix_features       = igb_fix_features,
2096         .ndo_set_features       = igb_set_features,
2097 };
2098
2099 /**
2100  * igb_set_fw_version - Configure version string for ethtool
2101  * @adapter: adapter struct
2102  **/
2103 void igb_set_fw_version(struct igb_adapter *adapter)
2104 {
2105         struct e1000_hw *hw = &adapter->hw;
2106         struct e1000_fw_version fw;
2107
2108         igb_get_fw_version(hw, &fw);
2109
2110         switch (hw->mac.type) {
2111         case e1000_i210:
2112         case e1000_i211:
2113                 if (!(igb_get_flash_presence_i210(hw))) {
2114                         snprintf(adapter->fw_version,
2115                                  sizeof(adapter->fw_version),
2116                                  "%2d.%2d-%d",
2117                                  fw.invm_major, fw.invm_minor,
2118                                  fw.invm_img_type);
2119                         break;
2120                 }
2121                 /* fall through */
2122         default:
2123                 /* if option is rom valid, display its version too */
2124                 if (fw.or_valid) {
2125                         snprintf(adapter->fw_version,
2126                                  sizeof(adapter->fw_version),
2127                                  "%d.%d, 0x%08x, %d.%d.%d",
2128                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2129                                  fw.or_major, fw.or_build, fw.or_patch);
2130                 /* no option rom */
2131                 } else if (fw.etrack_id != 0X0000) {
2132                         snprintf(adapter->fw_version,
2133                             sizeof(adapter->fw_version),
2134                             "%d.%d, 0x%08x",
2135                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2136                 } else {
2137                 snprintf(adapter->fw_version,
2138                     sizeof(adapter->fw_version),
2139                     "%d.%d.%d",
2140                     fw.eep_major, fw.eep_minor, fw.eep_build);
2141                 }
2142                 break;
2143         }
2144 }
2145
2146 /**
2147  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2148  *
2149  * @adapter: adapter struct
2150  **/
2151 static void igb_init_mas(struct igb_adapter *adapter)
2152 {
2153         struct e1000_hw *hw = &adapter->hw;
2154         u16 eeprom_data;
2155
2156         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2157         switch (hw->bus.func) {
2158         case E1000_FUNC_0:
2159                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2160                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2161                         netdev_info(adapter->netdev,
2162                                 "MAS: Enabling Media Autosense for port %d\n",
2163                                 hw->bus.func);
2164                 }
2165                 break;
2166         case E1000_FUNC_1:
2167                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2168                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2169                         netdev_info(adapter->netdev,
2170                                 "MAS: Enabling Media Autosense for port %d\n",
2171                                 hw->bus.func);
2172                 }
2173                 break;
2174         case E1000_FUNC_2:
2175                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2176                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2177                         netdev_info(adapter->netdev,
2178                                 "MAS: Enabling Media Autosense for port %d\n",
2179                                 hw->bus.func);
2180                 }
2181                 break;
2182         case E1000_FUNC_3:
2183                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2184                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2185                         netdev_info(adapter->netdev,
2186                                 "MAS: Enabling Media Autosense for port %d\n",
2187                                 hw->bus.func);
2188                 }
2189                 break;
2190         default:
2191                 /* Shouldn't get here */
2192                 netdev_err(adapter->netdev,
2193                         "MAS: Invalid port configuration, returning\n");
2194                 break;
2195         }
2196 }
2197
2198 /**
2199  *  igb_init_i2c - Init I2C interface
2200  *  @adapter: pointer to adapter structure
2201  **/
2202 static s32 igb_init_i2c(struct igb_adapter *adapter)
2203 {
2204         s32 status = 0;
2205
2206         /* I2C interface supported on i350 devices */
2207         if (adapter->hw.mac.type != e1000_i350)
2208                 return 0;
2209
2210         /* Initialize the i2c bus which is controlled by the registers.
2211          * This bus will use the i2c_algo_bit structue that implements
2212          * the protocol through toggling of the 4 bits in the register.
2213          */
2214         adapter->i2c_adap.owner = THIS_MODULE;
2215         adapter->i2c_algo = igb_i2c_algo;
2216         adapter->i2c_algo.data = adapter;
2217         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2218         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2219         strlcpy(adapter->i2c_adap.name, "igb BB",
2220                 sizeof(adapter->i2c_adap.name));
2221         status = i2c_bit_add_bus(&adapter->i2c_adap);
2222         return status;
2223 }
2224
2225 /**
2226  *  igb_probe - Device Initialization Routine
2227  *  @pdev: PCI device information struct
2228  *  @ent: entry in igb_pci_tbl
2229  *
2230  *  Returns 0 on success, negative on failure
2231  *
2232  *  igb_probe initializes an adapter identified by a pci_dev structure.
2233  *  The OS initialization, configuring of the adapter private structure,
2234  *  and a hardware reset occur.
2235  **/
2236 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2237 {
2238         struct net_device *netdev;
2239         struct igb_adapter *adapter;
2240         struct e1000_hw *hw;
2241         u16 eeprom_data = 0;
2242         s32 ret_val;
2243         static int global_quad_port_a; /* global quad port a indication */
2244         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2245         int err, pci_using_dac;
2246         u8 part_str[E1000_PBANUM_LENGTH];
2247
2248         /* Catch broken hardware that put the wrong VF device ID in
2249          * the PCIe SR-IOV capability.
2250          */
2251         if (pdev->is_virtfn) {
2252                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2253                         pci_name(pdev), pdev->vendor, pdev->device);
2254                 return -EINVAL;
2255         }
2256
2257         err = pci_enable_device_mem(pdev);
2258         if (err)
2259                 return err;
2260
2261         pci_using_dac = 0;
2262         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2263         if (!err) {
2264                 pci_using_dac = 1;
2265         } else {
2266                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2267                 if (err) {
2268                         dev_err(&pdev->dev,
2269                                 "No usable DMA configuration, aborting\n");
2270                         goto err_dma;
2271                 }
2272         }
2273
2274         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2275                                            IORESOURCE_MEM),
2276                                            igb_driver_name);
2277         if (err)
2278                 goto err_pci_reg;
2279
2280         pci_enable_pcie_error_reporting(pdev);
2281
2282         pci_set_master(pdev);
2283         pci_save_state(pdev);
2284
2285         err = -ENOMEM;
2286         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2287                                    IGB_MAX_TX_QUEUES);
2288         if (!netdev)
2289                 goto err_alloc_etherdev;
2290
2291         SET_NETDEV_DEV(netdev, &pdev->dev);
2292
2293         pci_set_drvdata(pdev, netdev);
2294         adapter = netdev_priv(netdev);
2295         adapter->netdev = netdev;
2296         adapter->pdev = pdev;
2297         hw = &adapter->hw;
2298         hw->back = adapter;
2299         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2300
2301         err = -EIO;
2302         hw->hw_addr = pci_iomap(pdev, 0, 0);
2303         if (!hw->hw_addr)
2304                 goto err_ioremap;
2305
2306         netdev->netdev_ops = &igb_netdev_ops;
2307         igb_set_ethtool_ops(netdev);
2308         netdev->watchdog_timeo = 5 * HZ;
2309
2310         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2311
2312         netdev->mem_start = pci_resource_start(pdev, 0);
2313         netdev->mem_end = pci_resource_end(pdev, 0);
2314
2315         /* PCI config space info */
2316         hw->vendor_id = pdev->vendor;
2317         hw->device_id = pdev->device;
2318         hw->revision_id = pdev->revision;
2319         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2320         hw->subsystem_device_id = pdev->subsystem_device;
2321
2322         /* Copy the default MAC, PHY and NVM function pointers */
2323         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2324         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2325         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2326         /* Initialize skew-specific constants */
2327         err = ei->get_invariants(hw);
2328         if (err)
2329                 goto err_sw_init;
2330
2331         /* setup the private structure */
2332         err = igb_sw_init(adapter);
2333         if (err)
2334                 goto err_sw_init;
2335
2336         igb_get_bus_info_pcie(hw);
2337
2338         hw->phy.autoneg_wait_to_complete = false;
2339
2340         /* Copper options */
2341         if (hw->phy.media_type == e1000_media_type_copper) {
2342                 hw->phy.mdix = AUTO_ALL_MODES;
2343                 hw->phy.disable_polarity_correction = false;
2344                 hw->phy.ms_type = e1000_ms_hw_default;
2345         }
2346
2347         if (igb_check_reset_block(hw))
2348                 dev_info(&pdev->dev,
2349                         "PHY reset is blocked due to SOL/IDER session.\n");
2350
2351         /* features is initialized to 0 in allocation, it might have bits
2352          * set by igb_sw_init so we should use an or instead of an
2353          * assignment.
2354          */
2355         netdev->features |= NETIF_F_SG |
2356                             NETIF_F_IP_CSUM |
2357                             NETIF_F_IPV6_CSUM |
2358                             NETIF_F_TSO |
2359                             NETIF_F_TSO6 |
2360                             NETIF_F_RXHASH |
2361                             NETIF_F_RXCSUM |
2362                             NETIF_F_HW_VLAN_CTAG_RX |
2363                             NETIF_F_HW_VLAN_CTAG_TX;
2364
2365         /* copy netdev features into list of user selectable features */
2366         netdev->hw_features |= netdev->features;
2367         netdev->hw_features |= NETIF_F_RXALL;
2368
2369         /* set this bit last since it cannot be part of hw_features */
2370         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2371
2372         netdev->vlan_features |= NETIF_F_TSO |
2373                                  NETIF_F_TSO6 |
2374                                  NETIF_F_IP_CSUM |
2375                                  NETIF_F_IPV6_CSUM |
2376                                  NETIF_F_SG;
2377
2378         netdev->priv_flags |= IFF_SUPP_NOFCS;
2379
2380         if (pci_using_dac) {
2381                 netdev->features |= NETIF_F_HIGHDMA;
2382                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2383         }
2384
2385         if (hw->mac.type >= e1000_82576) {
2386                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2387                 netdev->features |= NETIF_F_SCTP_CSUM;
2388         }
2389
2390         netdev->priv_flags |= IFF_UNICAST_FLT;
2391
2392         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2393
2394         /* before reading the NVM, reset the controller to put the device in a
2395          * known good starting state
2396          */
2397         hw->mac.ops.reset_hw(hw);
2398
2399         /* make sure the NVM is good , i211/i210 parts can have special NVM
2400          * that doesn't contain a checksum
2401          */
2402         switch (hw->mac.type) {
2403         case e1000_i210:
2404         case e1000_i211:
2405                 if (igb_get_flash_presence_i210(hw)) {
2406                         if (hw->nvm.ops.validate(hw) < 0) {
2407                                 dev_err(&pdev->dev,
2408                                         "The NVM Checksum Is Not Valid\n");
2409                                 err = -EIO;
2410                                 goto err_eeprom;
2411                         }
2412                 }
2413                 break;
2414         default:
2415                 if (hw->nvm.ops.validate(hw) < 0) {
2416                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2417                         err = -EIO;
2418                         goto err_eeprom;
2419                 }
2420                 break;
2421         }
2422
2423         /* copy the MAC address out of the NVM */
2424         if (hw->mac.ops.read_mac_addr(hw))
2425                 dev_err(&pdev->dev, "NVM Read Error\n");
2426
2427         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2428
2429         if (!is_valid_ether_addr(netdev->dev_addr)) {
2430                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2431                 err = -EIO;
2432                 goto err_eeprom;
2433         }
2434
2435         /* get firmware version for ethtool -i */
2436         igb_set_fw_version(adapter);
2437
2438         /* configure RXPBSIZE and TXPBSIZE */
2439         if (hw->mac.type == e1000_i210) {
2440                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2441                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2442         }
2443
2444         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2445                     (unsigned long) adapter);
2446         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2447                     (unsigned long) adapter);
2448
2449         INIT_WORK(&adapter->reset_task, igb_reset_task);
2450         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2451
2452         /* Initialize link properties that are user-changeable */
2453         adapter->fc_autoneg = true;
2454         hw->mac.autoneg = true;
2455         hw->phy.autoneg_advertised = 0x2f;
2456
2457         hw->fc.requested_mode = e1000_fc_default;
2458         hw->fc.current_mode = e1000_fc_default;
2459
2460         igb_validate_mdi_setting(hw);
2461
2462         /* By default, support wake on port A */
2463         if (hw->bus.func == 0)
2464                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2465
2466         /* Check the NVM for wake support on non-port A ports */
2467         if (hw->mac.type >= e1000_82580)
2468                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2469                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2470                                  &eeprom_data);
2471         else if (hw->bus.func == 1)
2472                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2473
2474         if (eeprom_data & IGB_EEPROM_APME)
2475                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2476
2477         /* now that we have the eeprom settings, apply the special cases where
2478          * the eeprom may be wrong or the board simply won't support wake on
2479          * lan on a particular port
2480          */
2481         switch (pdev->device) {
2482         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2483                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2484                 break;
2485         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2486         case E1000_DEV_ID_82576_FIBER:
2487         case E1000_DEV_ID_82576_SERDES:
2488                 /* Wake events only supported on port A for dual fiber
2489                  * regardless of eeprom setting
2490                  */
2491                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2492                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2493                 break;
2494         case E1000_DEV_ID_82576_QUAD_COPPER:
2495         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2496                 /* if quad port adapter, disable WoL on all but port A */
2497                 if (global_quad_port_a != 0)
2498                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2499                 else
2500                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2501                 /* Reset for multiple quad port adapters */
2502                 if (++global_quad_port_a == 4)
2503                         global_quad_port_a = 0;
2504                 break;
2505         default:
2506                 /* If the device can't wake, don't set software support */
2507                 if (!device_can_wakeup(&adapter->pdev->dev))
2508                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2509         }
2510
2511         /* initialize the wol settings based on the eeprom settings */
2512         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2513                 adapter->wol |= E1000_WUFC_MAG;
2514
2515         /* Some vendors want WoL disabled by default, but still supported */
2516         if ((hw->mac.type == e1000_i350) &&
2517             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2518                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2519                 adapter->wol = 0;
2520         }
2521
2522         device_set_wakeup_enable(&adapter->pdev->dev,
2523                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2524
2525         /* reset the hardware with the new settings */
2526         igb_reset(adapter);
2527
2528         /* Init the I2C interface */
2529         err = igb_init_i2c(adapter);
2530         if (err) {
2531                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2532                 goto err_eeprom;
2533         }
2534
2535         /* let the f/w know that the h/w is now under the control of the
2536          * driver.
2537          */
2538         igb_get_hw_control(adapter);
2539
2540         strcpy(netdev->name, "eth%d");
2541         err = register_netdev(netdev);
2542         if (err)
2543                 goto err_register;
2544
2545         /* carrier off reporting is important to ethtool even BEFORE open */
2546         netif_carrier_off(netdev);
2547
2548 #ifdef CONFIG_IGB_DCA
2549         if (dca_add_requester(&pdev->dev) == 0) {
2550                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2551                 dev_info(&pdev->dev, "DCA enabled\n");
2552                 igb_setup_dca(adapter);
2553         }
2554
2555 #endif
2556 #ifdef CONFIG_IGB_HWMON
2557         /* Initialize the thermal sensor on i350 devices. */
2558         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2559                 u16 ets_word;
2560
2561                 /* Read the NVM to determine if this i350 device supports an
2562                  * external thermal sensor.
2563                  */
2564                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2565                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2566                         adapter->ets = true;
2567                 else
2568                         adapter->ets = false;
2569                 if (igb_sysfs_init(adapter))
2570                         dev_err(&pdev->dev,
2571                                 "failed to allocate sysfs resources\n");
2572         } else {
2573                 adapter->ets = false;
2574         }
2575 #endif
2576         /* Check if Media Autosense is enabled */
2577         adapter->ei = *ei;
2578         if (hw->dev_spec._82575.mas_capable)
2579                 igb_init_mas(adapter);
2580
2581         /* do hw tstamp init after resetting */
2582         igb_ptp_init(adapter);
2583
2584         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2585         /* print bus type/speed/width info, not applicable to i354 */
2586         if (hw->mac.type != e1000_i354) {
2587                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2588                          netdev->name,
2589                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2590                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2591                            "unknown"),
2592                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2593                           "Width x4" :
2594                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2595                           "Width x2" :
2596                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2597                           "Width x1" : "unknown"), netdev->dev_addr);
2598         }
2599
2600         if ((hw->mac.type >= e1000_i210 ||
2601              igb_get_flash_presence_i210(hw))) {
2602                 ret_val = igb_read_part_string(hw, part_str,
2603                                                E1000_PBANUM_LENGTH);
2604         } else {
2605                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2606         }
2607
2608         if (ret_val)
2609                 strcpy(part_str, "Unknown");
2610         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2611         dev_info(&pdev->dev,
2612                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2613                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2614                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2615                 adapter->num_rx_queues, adapter->num_tx_queues);
2616         if (hw->phy.media_type == e1000_media_type_copper) {
2617                 switch (hw->mac.type) {
2618                 case e1000_i350:
2619                 case e1000_i210:
2620                 case e1000_i211:
2621                         /* Enable EEE for internal copper PHY devices */
2622                         err = igb_set_eee_i350(hw, true, true);
2623                         if ((!err) &&
2624                             (!hw->dev_spec._82575.eee_disable)) {
2625                                 adapter->eee_advert =
2626                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2627                                 adapter->flags |= IGB_FLAG_EEE;
2628                         }
2629                         break;
2630                 case e1000_i354:
2631                         if ((rd32(E1000_CTRL_EXT) &
2632                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2633                                 err = igb_set_eee_i354(hw, true, true);
2634                                 if ((!err) &&
2635                                         (!hw->dev_spec._82575.eee_disable)) {
2636                                         adapter->eee_advert =
2637                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2638                                         adapter->flags |= IGB_FLAG_EEE;
2639                                 }
2640                         }
2641                         break;
2642                 default:
2643                         break;
2644                 }
2645         }
2646         pm_runtime_put_noidle(&pdev->dev);
2647         return 0;
2648
2649 err_register:
2650         igb_release_hw_control(adapter);
2651         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2652 err_eeprom:
2653         if (!igb_check_reset_block(hw))
2654                 igb_reset_phy(hw);
2655
2656         if (hw->flash_address)
2657                 iounmap(hw->flash_address);
2658 err_sw_init:
2659         igb_clear_interrupt_scheme(adapter);
2660         pci_iounmap(pdev, hw->hw_addr);
2661 err_ioremap:
2662         free_netdev(netdev);
2663 err_alloc_etherdev:
2664         pci_release_selected_regions(pdev,
2665                                      pci_select_bars(pdev, IORESOURCE_MEM));
2666 err_pci_reg:
2667 err_dma:
2668         pci_disable_device(pdev);
2669         return err;
2670 }
2671
2672 #ifdef CONFIG_PCI_IOV
2673 static int igb_disable_sriov(struct pci_dev *pdev)
2674 {
2675         struct net_device *netdev = pci_get_drvdata(pdev);
2676         struct igb_adapter *adapter = netdev_priv(netdev);
2677         struct e1000_hw *hw = &adapter->hw;
2678
2679         /* reclaim resources allocated to VFs */
2680         if (adapter->vf_data) {
2681                 /* disable iov and allow time for transactions to clear */
2682                 if (pci_vfs_assigned(pdev)) {
2683                         dev_warn(&pdev->dev,
2684                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2685                         return -EPERM;
2686                 } else {
2687                         pci_disable_sriov(pdev);
2688                         msleep(500);
2689                 }
2690
2691                 kfree(adapter->vf_data);
2692                 adapter->vf_data = NULL;
2693                 adapter->vfs_allocated_count = 0;
2694                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2695                 wrfl();
2696                 msleep(100);
2697                 dev_info(&pdev->dev, "IOV Disabled\n");
2698
2699                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2700                 adapter->flags |= IGB_FLAG_DMAC;
2701         }
2702
2703         return 0;
2704 }
2705
2706 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2707 {
2708         struct net_device *netdev = pci_get_drvdata(pdev);
2709         struct igb_adapter *adapter = netdev_priv(netdev);
2710         int old_vfs = pci_num_vf(pdev);
2711         int err = 0;
2712         int i;
2713
2714         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2715                 err = -EPERM;
2716                 goto out;
2717         }
2718         if (!num_vfs)
2719                 goto out;
2720
2721         if (old_vfs) {
2722                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2723                          old_vfs, max_vfs);
2724                 adapter->vfs_allocated_count = old_vfs;
2725         } else
2726                 adapter->vfs_allocated_count = num_vfs;
2727
2728         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2729                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2730
2731         /* if allocation failed then we do not support SR-IOV */
2732         if (!adapter->vf_data) {
2733                 adapter->vfs_allocated_count = 0;
2734                 dev_err(&pdev->dev,
2735                         "Unable to allocate memory for VF Data Storage\n");
2736                 err = -ENOMEM;
2737                 goto out;
2738         }
2739
2740         /* only call pci_enable_sriov() if no VFs are allocated already */
2741         if (!old_vfs) {
2742                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2743                 if (err)
2744                         goto err_out;
2745         }
2746         dev_info(&pdev->dev, "%d VFs allocated\n",
2747                  adapter->vfs_allocated_count);
2748         for (i = 0; i < adapter->vfs_allocated_count; i++)
2749                 igb_vf_configure(adapter, i);
2750
2751         /* DMA Coalescing is not supported in IOV mode. */
2752         adapter->flags &= ~IGB_FLAG_DMAC;
2753         goto out;
2754
2755 err_out:
2756         kfree(adapter->vf_data);
2757         adapter->vf_data = NULL;
2758         adapter->vfs_allocated_count = 0;
2759 out:
2760         return err;
2761 }
2762
2763 #endif
2764 /**
2765  *  igb_remove_i2c - Cleanup  I2C interface
2766  *  @adapter: pointer to adapter structure
2767  **/
2768 static void igb_remove_i2c(struct igb_adapter *adapter)
2769 {
2770         /* free the adapter bus structure */
2771         i2c_del_adapter(&adapter->i2c_adap);
2772 }
2773
2774 /**
2775  *  igb_remove - Device Removal Routine
2776  *  @pdev: PCI device information struct
2777  *
2778  *  igb_remove is called by the PCI subsystem to alert the driver
2779  *  that it should release a PCI device.  The could be caused by a
2780  *  Hot-Plug event, or because the driver is going to be removed from
2781  *  memory.
2782  **/
2783 static void igb_remove(struct pci_dev *pdev)
2784 {
2785         struct net_device *netdev = pci_get_drvdata(pdev);
2786         struct igb_adapter *adapter = netdev_priv(netdev);
2787         struct e1000_hw *hw = &adapter->hw;
2788
2789         pm_runtime_get_noresume(&pdev->dev);
2790 #ifdef CONFIG_IGB_HWMON
2791         igb_sysfs_exit(adapter);
2792 #endif
2793         igb_remove_i2c(adapter);
2794         igb_ptp_stop(adapter);
2795         /* The watchdog timer may be rescheduled, so explicitly
2796          * disable watchdog from being rescheduled.
2797          */
2798         set_bit(__IGB_DOWN, &adapter->state);
2799         del_timer_sync(&adapter->watchdog_timer);
2800         del_timer_sync(&adapter->phy_info_timer);
2801
2802         cancel_work_sync(&adapter->reset_task);
2803         cancel_work_sync(&adapter->watchdog_task);
2804
2805 #ifdef CONFIG_IGB_DCA
2806         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2807                 dev_info(&pdev->dev, "DCA disabled\n");
2808                 dca_remove_requester(&pdev->dev);
2809                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2810                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2811         }
2812 #endif
2813
2814         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2815          * would have already happened in close and is redundant.
2816          */
2817         igb_release_hw_control(adapter);
2818
2819         unregister_netdev(netdev);
2820
2821         igb_clear_interrupt_scheme(adapter);
2822
2823 #ifdef CONFIG_PCI_IOV
2824         igb_disable_sriov(pdev);
2825 #endif
2826
2827         pci_iounmap(pdev, hw->hw_addr);
2828         if (hw->flash_address)
2829                 iounmap(hw->flash_address);
2830         pci_release_selected_regions(pdev,
2831                                      pci_select_bars(pdev, IORESOURCE_MEM));
2832
2833         kfree(adapter->shadow_vfta);
2834         free_netdev(netdev);
2835
2836         pci_disable_pcie_error_reporting(pdev);
2837
2838         pci_disable_device(pdev);
2839 }
2840
2841 /**
2842  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2843  *  @adapter: board private structure to initialize
2844  *
2845  *  This function initializes the vf specific data storage and then attempts to
2846  *  allocate the VFs.  The reason for ordering it this way is because it is much
2847  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2848  *  the memory for the VFs.
2849  **/
2850 static void igb_probe_vfs(struct igb_adapter *adapter)
2851 {
2852 #ifdef CONFIG_PCI_IOV
2853         struct pci_dev *pdev = adapter->pdev;
2854         struct e1000_hw *hw = &adapter->hw;
2855
2856         /* Virtualization features not supported on i210 family. */
2857         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2858                 return;
2859
2860         pci_sriov_set_totalvfs(pdev, 7);
2861         igb_pci_enable_sriov(pdev, max_vfs);
2862
2863 #endif /* CONFIG_PCI_IOV */
2864 }
2865
2866 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2867 {
2868         struct e1000_hw *hw = &adapter->hw;
2869         u32 max_rss_queues;
2870
2871         /* Determine the maximum number of RSS queues supported. */
2872         switch (hw->mac.type) {
2873         case e1000_i211:
2874                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2875                 break;
2876         case e1000_82575:
2877         case e1000_i210:
2878                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2879                 break;
2880         case e1000_i350:
2881                 /* I350 cannot do RSS and SR-IOV at the same time */
2882                 if (!!adapter->vfs_allocated_count) {
2883                         max_rss_queues = 1;
2884                         break;
2885                 }
2886                 /* fall through */
2887         case e1000_82576:
2888                 if (!!adapter->vfs_allocated_count) {
2889                         max_rss_queues = 2;
2890                         break;
2891                 }
2892                 /* fall through */
2893         case e1000_82580:
2894         case e1000_i354:
2895         default:
2896                 max_rss_queues = IGB_MAX_RX_QUEUES;
2897                 break;
2898         }
2899
2900         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2901
2902         /* Determine if we need to pair queues. */
2903         switch (hw->mac.type) {
2904         case e1000_82575:
2905         case e1000_i211:
2906                 /* Device supports enough interrupts without queue pairing. */
2907                 break;
2908         case e1000_82576:
2909                 /* If VFs are going to be allocated with RSS queues then we
2910                  * should pair the queues in order to conserve interrupts due
2911                  * to limited supply.
2912                  */
2913                 if ((adapter->rss_queues > 1) &&
2914                     (adapter->vfs_allocated_count > 6))
2915                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2916                 /* fall through */
2917         case e1000_82580:
2918         case e1000_i350:
2919         case e1000_i354:
2920         case e1000_i210:
2921         default:
2922                 /* If rss_queues > half of max_rss_queues, pair the queues in
2923                  * order to conserve interrupts due to limited supply.
2924                  */
2925                 if (adapter->rss_queues > (max_rss_queues / 2))
2926                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2927                 break;
2928         }
2929 }
2930
2931 /**
2932  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2933  *  @adapter: board private structure to initialize
2934  *
2935  *  igb_sw_init initializes the Adapter private data structure.
2936  *  Fields are initialized based on PCI device information and
2937  *  OS network device settings (MTU size).
2938  **/
2939 static int igb_sw_init(struct igb_adapter *adapter)
2940 {
2941         struct e1000_hw *hw = &adapter->hw;
2942         struct net_device *netdev = adapter->netdev;
2943         struct pci_dev *pdev = adapter->pdev;
2944
2945         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2946
2947         /* set default ring sizes */
2948         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2949         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2950
2951         /* set default ITR values */
2952         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2953         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2954
2955         /* set default work limits */
2956         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2957
2958         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2959                                   VLAN_HLEN;
2960         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2961
2962         spin_lock_init(&adapter->stats64_lock);
2963 #ifdef CONFIG_PCI_IOV
2964         switch (hw->mac.type) {
2965         case e1000_82576:
2966         case e1000_i350:
2967                 if (max_vfs > 7) {
2968                         dev_warn(&pdev->dev,
2969                                  "Maximum of 7 VFs per PF, using max\n");
2970                         max_vfs = adapter->vfs_allocated_count = 7;
2971                 } else
2972                         adapter->vfs_allocated_count = max_vfs;
2973                 if (adapter->vfs_allocated_count)
2974                         dev_warn(&pdev->dev,
2975                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2976                 break;
2977         default:
2978                 break;
2979         }
2980 #endif /* CONFIG_PCI_IOV */
2981
2982         igb_init_queue_configuration(adapter);
2983
2984         /* Setup and initialize a copy of the hw vlan table array */
2985         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2986                                        GFP_ATOMIC);
2987
2988         /* This call may decrease the number of queues */
2989         if (igb_init_interrupt_scheme(adapter, true)) {
2990                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2991                 return -ENOMEM;
2992         }
2993
2994         igb_probe_vfs(adapter);
2995
2996         /* Explicitly disable IRQ since the NIC can be in any state. */
2997         igb_irq_disable(adapter);
2998
2999         if (hw->mac.type >= e1000_i350)
3000                 adapter->flags &= ~IGB_FLAG_DMAC;
3001
3002         set_bit(__IGB_DOWN, &adapter->state);
3003         return 0;
3004 }
3005
3006 /**
3007  *  igb_open - Called when a network interface is made active
3008  *  @netdev: network interface device structure
3009  *
3010  *  Returns 0 on success, negative value on failure
3011  *
3012  *  The open entry point is called when a network interface is made
3013  *  active by the system (IFF_UP).  At this point all resources needed
3014  *  for transmit and receive operations are allocated, the interrupt
3015  *  handler is registered with the OS, the watchdog timer is started,
3016  *  and the stack is notified that the interface is ready.
3017  **/
3018 static int __igb_open(struct net_device *netdev, bool resuming)
3019 {
3020         struct igb_adapter *adapter = netdev_priv(netdev);
3021         struct e1000_hw *hw = &adapter->hw;
3022         struct pci_dev *pdev = adapter->pdev;
3023         int err;
3024         int i;
3025
3026         /* disallow open during test */
3027         if (test_bit(__IGB_TESTING, &adapter->state)) {
3028                 WARN_ON(resuming);
3029                 return -EBUSY;
3030         }
3031
3032         if (!resuming)
3033                 pm_runtime_get_sync(&pdev->dev);
3034
3035         netif_carrier_off(netdev);
3036
3037         /* allocate transmit descriptors */
3038         err = igb_setup_all_tx_resources(adapter);
3039         if (err)
3040                 goto err_setup_tx;
3041
3042         /* allocate receive descriptors */
3043         err = igb_setup_all_rx_resources(adapter);
3044         if (err)
3045                 goto err_setup_rx;
3046
3047         igb_power_up_link(adapter);
3048
3049         /* before we allocate an interrupt, we must be ready to handle it.
3050          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3051          * as soon as we call pci_request_irq, so we have to setup our
3052          * clean_rx handler before we do so.
3053          */
3054         igb_configure(adapter);
3055
3056         err = igb_request_irq(adapter);
3057         if (err)
3058                 goto err_req_irq;
3059
3060         /* Notify the stack of the actual queue counts. */
3061         err = netif_set_real_num_tx_queues(adapter->netdev,
3062                                            adapter->num_tx_queues);
3063         if (err)
3064                 goto err_set_queues;
3065
3066         err = netif_set_real_num_rx_queues(adapter->netdev,
3067                                            adapter->num_rx_queues);
3068         if (err)
3069                 goto err_set_queues;
3070
3071         /* From here on the code is the same as igb_up() */
3072         clear_bit(__IGB_DOWN, &adapter->state);
3073
3074         for (i = 0; i < adapter->num_q_vectors; i++)
3075                 napi_enable(&(adapter->q_vector[i]->napi));
3076
3077         /* Clear any pending interrupts. */
3078         rd32(E1000_ICR);
3079
3080         igb_irq_enable(adapter);
3081
3082         /* notify VFs that reset has been completed */
3083         if (adapter->vfs_allocated_count) {
3084                 u32 reg_data = rd32(E1000_CTRL_EXT);
3085
3086                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3087                 wr32(E1000_CTRL_EXT, reg_data);
3088         }
3089
3090         netif_tx_start_all_queues(netdev);
3091
3092         if (!resuming)
3093                 pm_runtime_put(&pdev->dev);
3094
3095         /* start the watchdog. */
3096         hw->mac.get_link_status = 1;
3097         schedule_work(&adapter->watchdog_task);
3098
3099         return 0;
3100
3101 err_set_queues:
3102         igb_free_irq(adapter);
3103 err_req_irq:
3104         igb_release_hw_control(adapter);
3105         igb_power_down_link(adapter);
3106         igb_free_all_rx_resources(adapter);
3107 err_setup_rx:
3108         igb_free_all_tx_resources(adapter);
3109 err_setup_tx:
3110         igb_reset(adapter);
3111         if (!resuming)
3112                 pm_runtime_put(&pdev->dev);
3113
3114         return err;
3115 }
3116
3117 static int igb_open(struct net_device *netdev)
3118 {
3119         return __igb_open(netdev, false);
3120 }
3121
3122 /**
3123  *  igb_close - Disables a network interface
3124  *  @netdev: network interface device structure
3125  *
3126  *  Returns 0, this is not allowed to fail
3127  *
3128  *  The close entry point is called when an interface is de-activated
3129  *  by the OS.  The hardware is still under the driver's control, but
3130  *  needs to be disabled.  A global MAC reset is issued to stop the
3131  *  hardware, and all transmit and receive resources are freed.
3132  **/
3133 static int __igb_close(struct net_device *netdev, bool suspending)
3134 {
3135         struct igb_adapter *adapter = netdev_priv(netdev);
3136         struct pci_dev *pdev = adapter->pdev;
3137
3138         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3139
3140         if (!suspending)
3141                 pm_runtime_get_sync(&pdev->dev);
3142
3143         igb_down(adapter);
3144         igb_free_irq(adapter);
3145
3146         igb_free_all_tx_resources(adapter);
3147         igb_free_all_rx_resources(adapter);
3148
3149         if (!suspending)
3150                 pm_runtime_put_sync(&pdev->dev);
3151         return 0;
3152 }
3153
3154 static int igb_close(struct net_device *netdev)
3155 {
3156         return __igb_close(netdev, false);
3157 }
3158
3159 /**
3160  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3161  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3162  *
3163  *  Return 0 on success, negative on failure
3164  **/
3165 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3166 {
3167         struct device *dev = tx_ring->dev;
3168         int size;
3169
3170         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3171
3172         tx_ring->tx_buffer_info = vzalloc(size);
3173         if (!tx_ring->tx_buffer_info)
3174                 goto err;
3175
3176         /* round up to nearest 4K */
3177         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3178         tx_ring->size = ALIGN(tx_ring->size, 4096);
3179
3180         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3181                                            &tx_ring->dma, GFP_KERNEL);
3182         if (!tx_ring->desc)
3183                 goto err;
3184
3185         tx_ring->next_to_use = 0;
3186         tx_ring->next_to_clean = 0;
3187
3188         return 0;
3189
3190 err:
3191         vfree(tx_ring->tx_buffer_info);
3192         tx_ring->tx_buffer_info = NULL;
3193         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3194         return -ENOMEM;
3195 }
3196
3197 /**
3198  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3199  *                               (Descriptors) for all queues
3200  *  @adapter: board private structure
3201  *
3202  *  Return 0 on success, negative on failure
3203  **/
3204 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3205 {
3206         struct pci_dev *pdev = adapter->pdev;
3207         int i, err = 0;
3208
3209         for (i = 0; i < adapter->num_tx_queues; i++) {
3210                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3211                 if (err) {
3212                         dev_err(&pdev->dev,
3213                                 "Allocation for Tx Queue %u failed\n", i);
3214                         for (i--; i >= 0; i--)
3215                                 igb_free_tx_resources(adapter->tx_ring[i]);
3216                         break;
3217                 }
3218         }
3219
3220         return err;
3221 }
3222
3223 /**
3224  *  igb_setup_tctl - configure the transmit control registers
3225  *  @adapter: Board private structure
3226  **/
3227 void igb_setup_tctl(struct igb_adapter *adapter)
3228 {
3229         struct e1000_hw *hw = &adapter->hw;
3230         u32 tctl;
3231
3232         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3233         wr32(E1000_TXDCTL(0), 0);
3234
3235         /* Program the Transmit Control Register */
3236         tctl = rd32(E1000_TCTL);
3237         tctl &= ~E1000_TCTL_CT;
3238         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3239                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3240
3241         igb_config_collision_dist(hw);
3242
3243         /* Enable transmits */
3244         tctl |= E1000_TCTL_EN;
3245
3246         wr32(E1000_TCTL, tctl);
3247 }
3248
3249 /**
3250  *  igb_configure_tx_ring - Configure transmit ring after Reset
3251  *  @adapter: board private structure
3252  *  @ring: tx ring to configure
3253  *
3254  *  Configure a transmit ring after a reset.
3255  **/
3256 void igb_configure_tx_ring(struct igb_adapter *adapter,
3257                            struct igb_ring *ring)
3258 {
3259         struct e1000_hw *hw = &adapter->hw;
3260         u32 txdctl = 0;
3261         u64 tdba = ring->dma;
3262         int reg_idx = ring->reg_idx;
3263
3264         /* disable the queue */
3265         wr32(E1000_TXDCTL(reg_idx), 0);
3266         wrfl();
3267         mdelay(10);
3268
3269         wr32(E1000_TDLEN(reg_idx),
3270              ring->count * sizeof(union e1000_adv_tx_desc));
3271         wr32(E1000_TDBAL(reg_idx),
3272              tdba & 0x00000000ffffffffULL);
3273         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3274
3275         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3276         wr32(E1000_TDH(reg_idx), 0);
3277         writel(0, ring->tail);
3278
3279         txdctl |= IGB_TX_PTHRESH;
3280         txdctl |= IGB_TX_HTHRESH << 8;
3281         txdctl |= IGB_TX_WTHRESH << 16;
3282
3283         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3284         wr32(E1000_TXDCTL(reg_idx), txdctl);
3285 }
3286
3287 /**
3288  *  igb_configure_tx - Configure transmit Unit after Reset
3289  *  @adapter: board private structure
3290  *
3291  *  Configure the Tx unit of the MAC after a reset.
3292  **/
3293 static void igb_configure_tx(struct igb_adapter *adapter)
3294 {
3295         int i;
3296
3297         for (i = 0; i < adapter->num_tx_queues; i++)
3298                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3299 }
3300
3301 /**
3302  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3303  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3304  *
3305  *  Returns 0 on success, negative on failure
3306  **/
3307 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3308 {
3309         struct device *dev = rx_ring->dev;
3310         int size;
3311
3312         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3313
3314         rx_ring->rx_buffer_info = vzalloc(size);
3315         if (!rx_ring->rx_buffer_info)
3316                 goto err;
3317
3318         /* Round up to nearest 4K */
3319         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3320         rx_ring->size = ALIGN(rx_ring->size, 4096);
3321
3322         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3323                                            &rx_ring->dma, GFP_KERNEL);
3324         if (!rx_ring->desc)
3325                 goto err;
3326
3327         rx_ring->next_to_alloc = 0;
3328         rx_ring->next_to_clean = 0;
3329         rx_ring->next_to_use = 0;
3330
3331         return 0;
3332
3333 err:
3334         vfree(rx_ring->rx_buffer_info);
3335         rx_ring->rx_buffer_info = NULL;
3336         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3337         return -ENOMEM;
3338 }
3339
3340 /**
3341  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3342  *                               (Descriptors) for all queues
3343  *  @adapter: board private structure
3344  *
3345  *  Return 0 on success, negative on failure
3346  **/
3347 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3348 {
3349         struct pci_dev *pdev = adapter->pdev;
3350         int i, err = 0;
3351
3352         for (i = 0; i < adapter->num_rx_queues; i++) {
3353                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3354                 if (err) {
3355                         dev_err(&pdev->dev,
3356                                 "Allocation for Rx Queue %u failed\n", i);
3357                         for (i--; i >= 0; i--)
3358                                 igb_free_rx_resources(adapter->rx_ring[i]);
3359                         break;
3360                 }
3361         }
3362
3363         return err;
3364 }
3365
3366 /**
3367  *  igb_setup_mrqc - configure the multiple receive queue control registers
3368  *  @adapter: Board private structure
3369  **/
3370 static void igb_setup_mrqc(struct igb_adapter *adapter)
3371 {
3372         struct e1000_hw *hw = &adapter->hw;
3373         u32 mrqc, rxcsum;
3374         u32 j, num_rx_queues;
3375         u32 rss_key[10];
3376
3377         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3378         for (j = 0; j < 10; j++)
3379                 wr32(E1000_RSSRK(j), rss_key[j]);
3380
3381         num_rx_queues = adapter->rss_queues;
3382
3383         switch (hw->mac.type) {
3384         case e1000_82576:
3385                 /* 82576 supports 2 RSS queues for SR-IOV */
3386                 if (adapter->vfs_allocated_count)
3387                         num_rx_queues = 2;
3388                 break;
3389         default:
3390                 break;
3391         }
3392
3393         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3394                 for (j = 0; j < IGB_RETA_SIZE; j++)
3395                         adapter->rss_indir_tbl[j] =
3396                         (j * num_rx_queues) / IGB_RETA_SIZE;
3397                 adapter->rss_indir_tbl_init = num_rx_queues;
3398         }
3399         igb_write_rss_indir_tbl(adapter);
3400
3401         /* Disable raw packet checksumming so that RSS hash is placed in
3402          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3403          * offloads as they are enabled by default
3404          */
3405         rxcsum = rd32(E1000_RXCSUM);
3406         rxcsum |= E1000_RXCSUM_PCSD;
3407
3408         if (adapter->hw.mac.type >= e1000_82576)
3409                 /* Enable Receive Checksum Offload for SCTP */
3410                 rxcsum |= E1000_RXCSUM_CRCOFL;
3411
3412         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3413         wr32(E1000_RXCSUM, rxcsum);
3414
3415         /* Generate RSS hash based on packet types, TCP/UDP
3416          * port numbers and/or IPv4/v6 src and dst addresses
3417          */
3418         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3419                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3420                E1000_MRQC_RSS_FIELD_IPV6 |
3421                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3422                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3423
3424         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3425                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3426         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3427                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3428
3429         /* If VMDq is enabled then we set the appropriate mode for that, else
3430          * we default to RSS so that an RSS hash is calculated per packet even
3431          * if we are only using one queue
3432          */
3433         if (adapter->vfs_allocated_count) {
3434                 if (hw->mac.type > e1000_82575) {
3435                         /* Set the default pool for the PF's first queue */
3436                         u32 vtctl = rd32(E1000_VT_CTL);
3437
3438                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3439                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3440                         vtctl |= adapter->vfs_allocated_count <<
3441                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3442                         wr32(E1000_VT_CTL, vtctl);
3443                 }
3444                 if (adapter->rss_queues > 1)
3445                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3446                 else
3447                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3448         } else {
3449                 if (hw->mac.type != e1000_i211)
3450                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3451         }
3452         igb_vmm_control(adapter);
3453
3454         wr32(E1000_MRQC, mrqc);
3455 }
3456
3457 /**
3458  *  igb_setup_rctl - configure the receive control registers
3459  *  @adapter: Board private structure
3460  **/
3461 void igb_setup_rctl(struct igb_adapter *adapter)
3462 {
3463         struct e1000_hw *hw = &adapter->hw;
3464         u32 rctl;
3465
3466         rctl = rd32(E1000_RCTL);
3467
3468         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3469         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3470
3471         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3472                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3473
3474         /* enable stripping of CRC. It's unlikely this will break BMC
3475          * redirection as it did with e1000. Newer features require
3476          * that the HW strips the CRC.
3477          */
3478         rctl |= E1000_RCTL_SECRC;
3479
3480         /* disable store bad packets and clear size bits. */
3481         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3482
3483         /* enable LPE to prevent packets larger than max_frame_size */
3484         rctl |= E1000_RCTL_LPE;
3485
3486         /* disable queue 0 to prevent tail write w/o re-config */
3487         wr32(E1000_RXDCTL(0), 0);
3488
3489         /* Attention!!!  For SR-IOV PF driver operations you must enable
3490          * queue drop for all VF and PF queues to prevent head of line blocking
3491          * if an un-trusted VF does not provide descriptors to hardware.
3492          */
3493         if (adapter->vfs_allocated_count) {
3494                 /* set all queue drop enable bits */
3495                 wr32(E1000_QDE, ALL_QUEUES);
3496         }
3497
3498         /* This is useful for sniffing bad packets. */
3499         if (adapter->netdev->features & NETIF_F_RXALL) {
3500                 /* UPE and MPE will be handled by normal PROMISC logic
3501                  * in e1000e_set_rx_mode
3502                  */
3503                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3504                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3505                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3506
3507                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3508                           E1000_RCTL_DPF | /* Allow filtered pause */
3509                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3510                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3511                  * and that breaks VLANs.
3512                  */
3513         }
3514
3515         wr32(E1000_RCTL, rctl);
3516 }
3517
3518 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3519                                    int vfn)
3520 {
3521         struct e1000_hw *hw = &adapter->hw;
3522         u32 vmolr;
3523
3524         /* if it isn't the PF check to see if VFs are enabled and
3525          * increase the size to support vlan tags
3526          */
3527         if (vfn < adapter->vfs_allocated_count &&
3528             adapter->vf_data[vfn].vlans_enabled)
3529                 size += VLAN_TAG_SIZE;
3530
3531         vmolr = rd32(E1000_VMOLR(vfn));
3532         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3533         vmolr |= size | E1000_VMOLR_LPE;
3534         wr32(E1000_VMOLR(vfn), vmolr);
3535
3536         return 0;
3537 }
3538
3539 /**
3540  *  igb_rlpml_set - set maximum receive packet size
3541  *  @adapter: board private structure
3542  *
3543  *  Configure maximum receivable packet size.
3544  **/
3545 static void igb_rlpml_set(struct igb_adapter *adapter)
3546 {
3547         u32 max_frame_size = adapter->max_frame_size;
3548         struct e1000_hw *hw = &adapter->hw;
3549         u16 pf_id = adapter->vfs_allocated_count;
3550
3551         if (pf_id) {
3552                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3553                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3554                  * to our max jumbo frame size, in case we need to enable
3555                  * jumbo frames on one of the rings later.
3556                  * This will not pass over-length frames into the default
3557                  * queue because it's gated by the VMOLR.RLPML.
3558                  */
3559                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3560         }
3561
3562         wr32(E1000_RLPML, max_frame_size);
3563 }
3564
3565 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3566                                  int vfn, bool aupe)
3567 {
3568         struct e1000_hw *hw = &adapter->hw;
3569         u32 vmolr;
3570
3571         /* This register exists only on 82576 and newer so if we are older then
3572          * we should exit and do nothing
3573          */
3574         if (hw->mac.type < e1000_82576)
3575                 return;
3576
3577         vmolr = rd32(E1000_VMOLR(vfn));
3578         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3579         if (hw->mac.type == e1000_i350) {
3580                 u32 dvmolr;
3581
3582                 dvmolr = rd32(E1000_DVMOLR(vfn));
3583                 dvmolr |= E1000_DVMOLR_STRVLAN;
3584                 wr32(E1000_DVMOLR(vfn), dvmolr);
3585         }
3586         if (aupe)
3587                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3588         else
3589                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3590
3591         /* clear all bits that might not be set */
3592         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3593
3594         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3595                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3596         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3597          * multicast packets
3598          */
3599         if (vfn <= adapter->vfs_allocated_count)
3600                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3601
3602         wr32(E1000_VMOLR(vfn), vmolr);
3603 }
3604
3605 /**
3606  *  igb_configure_rx_ring - Configure a receive ring after Reset
3607  *  @adapter: board private structure
3608  *  @ring: receive ring to be configured
3609  *
3610  *  Configure the Rx unit of the MAC after a reset.
3611  **/
3612 void igb_configure_rx_ring(struct igb_adapter *adapter,
3613                            struct igb_ring *ring)
3614 {
3615         struct e1000_hw *hw = &adapter->hw;
3616         u64 rdba = ring->dma;
3617         int reg_idx = ring->reg_idx;
3618         u32 srrctl = 0, rxdctl = 0;
3619
3620         /* disable the queue */
3621         wr32(E1000_RXDCTL(reg_idx), 0);
3622
3623         /* Set DMA base address registers */
3624         wr32(E1000_RDBAL(reg_idx),
3625              rdba & 0x00000000ffffffffULL);
3626         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3627         wr32(E1000_RDLEN(reg_idx),
3628              ring->count * sizeof(union e1000_adv_rx_desc));
3629
3630         /* initialize head and tail */
3631         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3632         wr32(E1000_RDH(reg_idx), 0);
3633         writel(0, ring->tail);
3634
3635         /* set descriptor configuration */
3636         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3637         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3638         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3639         if (hw->mac.type >= e1000_82580)
3640                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3641         /* Only set Drop Enable if we are supporting multiple queues */
3642         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3643                 srrctl |= E1000_SRRCTL_DROP_EN;
3644
3645         wr32(E1000_SRRCTL(reg_idx), srrctl);
3646
3647         /* set filtering for VMDQ pools */
3648         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3649
3650         rxdctl |= IGB_RX_PTHRESH;
3651         rxdctl |= IGB_RX_HTHRESH << 8;
3652         rxdctl |= IGB_RX_WTHRESH << 16;
3653
3654         /* enable receive descriptor fetching */
3655         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3656         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3657 }
3658
3659 /**
3660  *  igb_configure_rx - Configure receive Unit after Reset
3661  *  @adapter: board private structure
3662  *
3663  *  Configure the Rx unit of the MAC after a reset.
3664  **/
3665 static void igb_configure_rx(struct igb_adapter *adapter)
3666 {
3667         int i;
3668
3669         /* set UTA to appropriate mode */
3670         igb_set_uta(adapter);
3671
3672         /* set the correct pool for the PF default MAC address in entry 0 */
3673         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3674                          adapter->vfs_allocated_count);
3675
3676         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3677          * the Base and Length of the Rx Descriptor Ring
3678          */
3679         for (i = 0; i < adapter->num_rx_queues; i++)
3680                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3681 }
3682
3683 /**
3684  *  igb_free_tx_resources - Free Tx Resources per Queue
3685  *  @tx_ring: Tx descriptor ring for a specific queue
3686  *
3687  *  Free all transmit software resources
3688  **/
3689 void igb_free_tx_resources(struct igb_ring *tx_ring)
3690 {
3691         igb_clean_tx_ring(tx_ring);
3692
3693         vfree(tx_ring->tx_buffer_info);
3694         tx_ring->tx_buffer_info = NULL;
3695
3696         /* if not set, then don't free */
3697         if (!tx_ring->desc)
3698                 return;
3699
3700         dma_free_coherent(tx_ring->dev, tx_ring->size,
3701                           tx_ring->desc, tx_ring->dma);
3702
3703         tx_ring->desc = NULL;
3704 }
3705
3706 /**
3707  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3708  *  @adapter: board private structure
3709  *
3710  *  Free all transmit software resources
3711  **/
3712 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3713 {
3714         int i;
3715
3716         for (i = 0; i < adapter->num_tx_queues; i++)
3717                 igb_free_tx_resources(adapter->tx_ring[i]);
3718 }
3719
3720 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3721                                     struct igb_tx_buffer *tx_buffer)
3722 {
3723         if (tx_buffer->skb) {
3724                 dev_kfree_skb_any(tx_buffer->skb);
3725                 if (dma_unmap_len(tx_buffer, len))
3726                         dma_unmap_single(ring->dev,
3727                                          dma_unmap_addr(tx_buffer, dma),
3728                                          dma_unmap_len(tx_buffer, len),
3729                                          DMA_TO_DEVICE);
3730         } else if (dma_unmap_len(tx_buffer, len)) {
3731                 dma_unmap_page(ring->dev,
3732                                dma_unmap_addr(tx_buffer, dma),
3733                                dma_unmap_len(tx_buffer, len),
3734                                DMA_TO_DEVICE);
3735         }
3736         tx_buffer->next_to_watch = NULL;
3737         tx_buffer->skb = NULL;
3738         dma_unmap_len_set(tx_buffer, len, 0);
3739         /* buffer_info must be completely set up in the transmit path */
3740 }
3741
3742 /**
3743  *  igb_clean_tx_ring - Free Tx Buffers
3744  *  @tx_ring: ring to be cleaned
3745  **/
3746 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3747 {
3748         struct igb_tx_buffer *buffer_info;
3749         unsigned long size;
3750         u16 i;
3751
3752         if (!tx_ring->tx_buffer_info)
3753                 return;
3754         /* Free all the Tx ring sk_buffs */
3755
3756         for (i = 0; i < tx_ring->count; i++) {
3757                 buffer_info = &tx_ring->tx_buffer_info[i];
3758                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3759         }
3760
3761         netdev_tx_reset_queue(txring_txq(tx_ring));
3762
3763         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3764         memset(tx_ring->tx_buffer_info, 0, size);
3765
3766         /* Zero out the descriptor ring */
3767         memset(tx_ring->desc, 0, tx_ring->size);
3768
3769         tx_ring->next_to_use = 0;
3770         tx_ring->next_to_clean = 0;
3771 }
3772
3773 /**
3774  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3775  *  @adapter: board private structure
3776  **/
3777 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3778 {
3779         int i;
3780
3781         for (i = 0; i < adapter->num_tx_queues; i++)
3782                 igb_clean_tx_ring(adapter->tx_ring[i]);
3783 }
3784
3785 /**
3786  *  igb_free_rx_resources - Free Rx Resources
3787  *  @rx_ring: ring to clean the resources from
3788  *
3789  *  Free all receive software resources
3790  **/
3791 void igb_free_rx_resources(struct igb_ring *rx_ring)
3792 {
3793         igb_clean_rx_ring(rx_ring);
3794
3795         vfree(rx_ring->rx_buffer_info);
3796         rx_ring->rx_buffer_info = NULL;
3797
3798         /* if not set, then don't free */
3799         if (!rx_ring->desc)
3800                 return;
3801
3802         dma_free_coherent(rx_ring->dev, rx_ring->size,
3803                           rx_ring->desc, rx_ring->dma);
3804
3805         rx_ring->desc = NULL;
3806 }
3807
3808 /**
3809  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3810  *  @adapter: board private structure
3811  *
3812  *  Free all receive software resources
3813  **/
3814 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3815 {
3816         int i;
3817
3818         for (i = 0; i < adapter->num_rx_queues; i++)
3819                 igb_free_rx_resources(adapter->rx_ring[i]);
3820 }
3821
3822 /**
3823  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3824  *  @rx_ring: ring to free buffers from
3825  **/
3826 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3827 {
3828         unsigned long size;
3829         u16 i;
3830
3831         if (rx_ring->skb)
3832                 dev_kfree_skb(rx_ring->skb);
3833         rx_ring->skb = NULL;
3834
3835         if (!rx_ring->rx_buffer_info)
3836                 return;
3837
3838         /* Free all the Rx ring sk_buffs */
3839         for (i = 0; i < rx_ring->count; i++) {
3840                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3841
3842                 if (!buffer_info->page)
3843                         continue;
3844
3845                 dma_unmap_page(rx_ring->dev,
3846                                buffer_info->dma,
3847                                PAGE_SIZE,
3848                                DMA_FROM_DEVICE);
3849                 __free_page(buffer_info->page);
3850
3851                 buffer_info->page = NULL;
3852         }
3853
3854         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3855         memset(rx_ring->rx_buffer_info, 0, size);
3856
3857         /* Zero out the descriptor ring */
3858         memset(rx_ring->desc, 0, rx_ring->size);
3859
3860         rx_ring->next_to_alloc = 0;
3861         rx_ring->next_to_clean = 0;
3862         rx_ring->next_to_use = 0;
3863 }
3864
3865 /**
3866  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3867  *  @adapter: board private structure
3868  **/
3869 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3870 {
3871         int i;
3872
3873         for (i = 0; i < adapter->num_rx_queues; i++)
3874                 igb_clean_rx_ring(adapter->rx_ring[i]);
3875 }
3876
3877 /**
3878  *  igb_set_mac - Change the Ethernet Address of the NIC
3879  *  @netdev: network interface device structure
3880  *  @p: pointer to an address structure
3881  *
3882  *  Returns 0 on success, negative on failure
3883  **/
3884 static int igb_set_mac(struct net_device *netdev, void *p)
3885 {
3886         struct igb_adapter *adapter = netdev_priv(netdev);
3887         struct e1000_hw *hw = &adapter->hw;
3888         struct sockaddr *addr = p;
3889
3890         if (!is_valid_ether_addr(addr->sa_data))
3891                 return -EADDRNOTAVAIL;
3892
3893         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3894         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3895
3896         /* set the correct pool for the new PF MAC address in entry 0 */
3897         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3898                          adapter->vfs_allocated_count);
3899
3900         return 0;
3901 }
3902
3903 /**
3904  *  igb_write_mc_addr_list - write multicast addresses to MTA
3905  *  @netdev: network interface device structure
3906  *
3907  *  Writes multicast address list to the MTA hash table.
3908  *  Returns: -ENOMEM on failure
3909  *           0 on no addresses written
3910  *           X on writing X addresses to MTA
3911  **/
3912 static int igb_write_mc_addr_list(struct net_device *netdev)
3913 {
3914         struct igb_adapter *adapter = netdev_priv(netdev);
3915         struct e1000_hw *hw = &adapter->hw;
3916         struct netdev_hw_addr *ha;
3917         u8  *mta_list;
3918         int i;
3919
3920         if (netdev_mc_empty(netdev)) {
3921                 /* nothing to program, so clear mc list */
3922                 igb_update_mc_addr_list(hw, NULL, 0);
3923                 igb_restore_vf_multicasts(adapter);
3924                 return 0;
3925         }
3926
3927         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3928         if (!mta_list)
3929                 return -ENOMEM;
3930
3931         /* The shared function expects a packed array of only addresses. */
3932         i = 0;
3933         netdev_for_each_mc_addr(ha, netdev)
3934                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3935
3936         igb_update_mc_addr_list(hw, mta_list, i);
3937         kfree(mta_list);
3938
3939         return netdev_mc_count(netdev);
3940 }
3941
3942 /**
3943  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3944  *  @netdev: network interface device structure
3945  *
3946  *  Writes unicast address list to the RAR table.
3947  *  Returns: -ENOMEM on failure/insufficient address space
3948  *           0 on no addresses written
3949  *           X on writing X addresses to the RAR table
3950  **/
3951 static int igb_write_uc_addr_list(struct net_device *netdev)
3952 {
3953         struct igb_adapter *adapter = netdev_priv(netdev);
3954         struct e1000_hw *hw = &adapter->hw;
3955         unsigned int vfn = adapter->vfs_allocated_count;
3956         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3957         int count = 0;
3958
3959         /* return ENOMEM indicating insufficient memory for addresses */
3960         if (netdev_uc_count(netdev) > rar_entries)
3961                 return -ENOMEM;
3962
3963         if (!netdev_uc_empty(netdev) && rar_entries) {
3964                 struct netdev_hw_addr *ha;
3965
3966                 netdev_for_each_uc_addr(ha, netdev) {
3967                         if (!rar_entries)
3968                                 break;
3969                         igb_rar_set_qsel(adapter, ha->addr,
3970                                          rar_entries--,
3971                                          vfn);
3972                         count++;
3973                 }
3974         }
3975         /* write the addresses in reverse order to avoid write combining */
3976         for (; rar_entries > 0 ; rar_entries--) {
3977                 wr32(E1000_RAH(rar_entries), 0);
3978                 wr32(E1000_RAL(rar_entries), 0);
3979         }
3980         wrfl();
3981
3982         return count;
3983 }
3984
3985 /**
3986  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3987  *  @netdev: network interface device structure
3988  *
3989  *  The set_rx_mode entry point is called whenever the unicast or multicast
3990  *  address lists or the network interface flags are updated.  This routine is
3991  *  responsible for configuring the hardware for proper unicast, multicast,
3992  *  promiscuous mode, and all-multi behavior.
3993  **/
3994 static void igb_set_rx_mode(struct net_device *netdev)
3995 {
3996         struct igb_adapter *adapter = netdev_priv(netdev);
3997         struct e1000_hw *hw = &adapter->hw;
3998         unsigned int vfn = adapter->vfs_allocated_count;
3999         u32 rctl, vmolr = 0;
4000         int count;
4001
4002         /* Check for Promiscuous and All Multicast modes */
4003         rctl = rd32(E1000_RCTL);
4004
4005         /* clear the effected bits */
4006         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4007
4008         if (netdev->flags & IFF_PROMISC) {
4009                 /* retain VLAN HW filtering if in VT mode */
4010                 if (adapter->vfs_allocated_count)
4011                         rctl |= E1000_RCTL_VFE;
4012                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4013                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4014         } else {
4015                 if (netdev->flags & IFF_ALLMULTI) {
4016                         rctl |= E1000_RCTL_MPE;
4017                         vmolr |= E1000_VMOLR_MPME;
4018                 } else {
4019                         /* Write addresses to the MTA, if the attempt fails
4020                          * then we should just turn on promiscuous mode so
4021                          * that we can at least receive multicast traffic
4022                          */
4023                         count = igb_write_mc_addr_list(netdev);
4024                         if (count < 0) {
4025                                 rctl |= E1000_RCTL_MPE;
4026                                 vmolr |= E1000_VMOLR_MPME;
4027                         } else if (count) {
4028                                 vmolr |= E1000_VMOLR_ROMPE;
4029                         }
4030                 }
4031                 /* Write addresses to available RAR registers, if there is not
4032                  * sufficient space to store all the addresses then enable
4033                  * unicast promiscuous mode
4034                  */
4035                 count = igb_write_uc_addr_list(netdev);
4036                 if (count < 0) {
4037                         rctl |= E1000_RCTL_UPE;
4038                         vmolr |= E1000_VMOLR_ROPE;
4039                 }
4040                 rctl |= E1000_RCTL_VFE;
4041         }
4042         wr32(E1000_RCTL, rctl);
4043
4044         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4045          * the VMOLR to enable the appropriate modes.  Without this workaround
4046          * we will have issues with VLAN tag stripping not being done for frames
4047          * that are only arriving because we are the default pool
4048          */
4049         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4050                 return;
4051
4052         vmolr |= rd32(E1000_VMOLR(vfn)) &
4053                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4054         wr32(E1000_VMOLR(vfn), vmolr);
4055         igb_restore_vf_multicasts(adapter);
4056 }
4057
4058 static void igb_check_wvbr(struct igb_adapter *adapter)
4059 {
4060         struct e1000_hw *hw = &adapter->hw;
4061         u32 wvbr = 0;
4062
4063         switch (hw->mac.type) {
4064         case e1000_82576:
4065         case e1000_i350:
4066                 wvbr = rd32(E1000_WVBR);
4067                 if (!wvbr)
4068                         return;
4069                 break;
4070         default:
4071                 break;
4072         }
4073
4074         adapter->wvbr |= wvbr;
4075 }
4076
4077 #define IGB_STAGGERED_QUEUE_OFFSET 8
4078
4079 static void igb_spoof_check(struct igb_adapter *adapter)
4080 {
4081         int j;
4082
4083         if (!adapter->wvbr)
4084                 return;
4085
4086         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4087                 if (adapter->wvbr & (1 << j) ||
4088                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4089                         dev_warn(&adapter->pdev->dev,
4090                                 "Spoof event(s) detected on VF %d\n", j);
4091                         adapter->wvbr &=
4092                                 ~((1 << j) |
4093                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4094                 }
4095         }
4096 }
4097
4098 /* Need to wait a few seconds after link up to get diagnostic information from
4099  * the phy
4100  */
4101 static void igb_update_phy_info(unsigned long data)
4102 {
4103         struct igb_adapter *adapter = (struct igb_adapter *) data;
4104         igb_get_phy_info(&adapter->hw);
4105 }
4106
4107 /**
4108  *  igb_has_link - check shared code for link and determine up/down
4109  *  @adapter: pointer to driver private info
4110  **/
4111 bool igb_has_link(struct igb_adapter *adapter)
4112 {
4113         struct e1000_hw *hw = &adapter->hw;
4114         bool link_active = false;
4115
4116         /* get_link_status is set on LSC (link status) interrupt or
4117          * rx sequence error interrupt.  get_link_status will stay
4118          * false until the e1000_check_for_link establishes link
4119          * for copper adapters ONLY
4120          */
4121         switch (hw->phy.media_type) {
4122         case e1000_media_type_copper:
4123                 if (!hw->mac.get_link_status)
4124                         return true;
4125         case e1000_media_type_internal_serdes:
4126                 hw->mac.ops.check_for_link(hw);
4127                 link_active = !hw->mac.get_link_status;
4128                 break;
4129         default:
4130         case e1000_media_type_unknown:
4131                 break;
4132         }
4133
4134         if (((hw->mac.type == e1000_i210) ||
4135              (hw->mac.type == e1000_i211)) &&
4136              (hw->phy.id == I210_I_PHY_ID)) {
4137                 if (!netif_carrier_ok(adapter->netdev)) {
4138                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4139                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4140                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4141                         adapter->link_check_timeout = jiffies;
4142                 }
4143         }
4144
4145         return link_active;
4146 }
4147
4148 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4149 {
4150         bool ret = false;
4151         u32 ctrl_ext, thstat;
4152
4153         /* check for thermal sensor event on i350 copper only */
4154         if (hw->mac.type == e1000_i350) {
4155                 thstat = rd32(E1000_THSTAT);
4156                 ctrl_ext = rd32(E1000_CTRL_EXT);
4157
4158                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4159                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4160                         ret = !!(thstat & event);
4161         }
4162
4163         return ret;
4164 }
4165
4166 /**
4167  *  igb_check_lvmmc - check for malformed packets received
4168  *  and indicated in LVMMC register
4169  *  @adapter: pointer to adapter
4170  **/
4171 static void igb_check_lvmmc(struct igb_adapter *adapter)
4172 {
4173         struct e1000_hw *hw = &adapter->hw;
4174         u32 lvmmc;
4175
4176         lvmmc = rd32(E1000_LVMMC);
4177         if (lvmmc) {
4178                 if (unlikely(net_ratelimit())) {
4179                         netdev_warn(adapter->netdev,
4180                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4181                                     lvmmc);
4182                 }
4183         }
4184 }
4185
4186 /**
4187  *  igb_watchdog - Timer Call-back
4188  *  @data: pointer to adapter cast into an unsigned long
4189  **/
4190 static void igb_watchdog(unsigned long data)
4191 {
4192         struct igb_adapter *adapter = (struct igb_adapter *)data;
4193         /* Do the rest outside of interrupt context */
4194         schedule_work(&adapter->watchdog_task);
4195 }
4196
4197 static void igb_watchdog_task(struct work_struct *work)
4198 {
4199         struct igb_adapter *adapter = container_of(work,
4200                                                    struct igb_adapter,
4201                                                    watchdog_task);
4202         struct e1000_hw *hw = &adapter->hw;
4203         struct e1000_phy_info *phy = &hw->phy;
4204         struct net_device *netdev = adapter->netdev;
4205         u32 link;
4206         int i;
4207         u32 connsw;
4208
4209         link = igb_has_link(adapter);
4210
4211         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4212                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4213                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4214                 else
4215                         link = false;
4216         }
4217
4218         /* Force link down if we have fiber to swap to */
4219         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4220                 if (hw->phy.media_type == e1000_media_type_copper) {
4221                         connsw = rd32(E1000_CONNSW);
4222                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4223                                 link = 0;
4224                 }
4225         }
4226         if (link) {
4227                 /* Perform a reset if the media type changed. */
4228                 if (hw->dev_spec._82575.media_changed) {
4229                         hw->dev_spec._82575.media_changed = false;
4230                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4231                         igb_reset(adapter);
4232                 }
4233                 /* Cancel scheduled suspend requests. */
4234                 pm_runtime_resume(netdev->dev.parent);
4235
4236                 if (!netif_carrier_ok(netdev)) {
4237                         u32 ctrl;
4238
4239                         hw->mac.ops.get_speed_and_duplex(hw,
4240                                                          &adapter->link_speed,
4241                                                          &adapter->link_duplex);
4242
4243                         ctrl = rd32(E1000_CTRL);
4244                         /* Links status message must follow this format */
4245                         netdev_info(netdev,
4246                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4247                                netdev->name,
4248                                adapter->link_speed,
4249                                adapter->link_duplex == FULL_DUPLEX ?
4250                                "Full" : "Half",
4251                                (ctrl & E1000_CTRL_TFCE) &&
4252                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4253                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4254                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4255
4256                         /* disable EEE if enabled */
4257                         if ((adapter->flags & IGB_FLAG_EEE) &&
4258                                 (adapter->link_duplex == HALF_DUPLEX)) {
4259                                 dev_info(&adapter->pdev->dev,
4260                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4261                                 adapter->hw.dev_spec._82575.eee_disable = true;
4262                                 adapter->flags &= ~IGB_FLAG_EEE;
4263                         }
4264
4265                         /* check if SmartSpeed worked */
4266                         igb_check_downshift(hw);
4267                         if (phy->speed_downgraded)
4268                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4269
4270                         /* check for thermal sensor event */
4271                         if (igb_thermal_sensor_event(hw,
4272                             E1000_THSTAT_LINK_THROTTLE))
4273                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4274
4275                         /* adjust timeout factor according to speed/duplex */
4276                         adapter->tx_timeout_factor = 1;
4277                         switch (adapter->link_speed) {
4278                         case SPEED_10:
4279                                 adapter->tx_timeout_factor = 14;
4280                                 break;
4281                         case SPEED_100:
4282                                 /* maybe add some timeout factor ? */
4283                                 break;
4284                         }
4285
4286                         netif_carrier_on(netdev);
4287
4288                         igb_ping_all_vfs(adapter);
4289                         igb_check_vf_rate_limit(adapter);
4290
4291                         /* link state has changed, schedule phy info update */
4292                         if (!test_bit(__IGB_DOWN, &adapter->state))
4293                                 mod_timer(&adapter->phy_info_timer,
4294                                           round_jiffies(jiffies + 2 * HZ));
4295                 }
4296         } else {
4297                 if (netif_carrier_ok(netdev)) {
4298                         adapter->link_speed = 0;
4299                         adapter->link_duplex = 0;
4300
4301                         /* check for thermal sensor event */
4302                         if (igb_thermal_sensor_event(hw,
4303                             E1000_THSTAT_PWR_DOWN)) {
4304                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4305                         }
4306
4307                         /* Links status message must follow this format */
4308                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4309                                netdev->name);
4310                         netif_carrier_off(netdev);
4311
4312                         igb_ping_all_vfs(adapter);
4313
4314                         /* link state has changed, schedule phy info update */
4315                         if (!test_bit(__IGB_DOWN, &adapter->state))
4316                                 mod_timer(&adapter->phy_info_timer,
4317                                           round_jiffies(jiffies + 2 * HZ));
4318
4319                         /* link is down, time to check for alternate media */
4320                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4321                                 igb_check_swap_media(adapter);
4322                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4323                                         schedule_work(&adapter->reset_task);
4324                                         /* return immediately */
4325                                         return;
4326                                 }
4327                         }
4328                         pm_schedule_suspend(netdev->dev.parent,
4329                                             MSEC_PER_SEC * 5);
4330
4331                 /* also check for alternate media here */
4332                 } else if (!netif_carrier_ok(netdev) &&
4333                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4334                         igb_check_swap_media(adapter);
4335                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4336                                 schedule_work(&adapter->reset_task);
4337                                 /* return immediately */
4338                                 return;
4339                         }
4340                 }
4341         }
4342
4343         spin_lock(&adapter->stats64_lock);
4344         igb_update_stats(adapter, &adapter->stats64);
4345         spin_unlock(&adapter->stats64_lock);
4346
4347         for (i = 0; i < adapter->num_tx_queues; i++) {
4348                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4349                 if (!netif_carrier_ok(netdev)) {
4350                         /* We've lost link, so the controller stops DMA,
4351                          * but we've got queued Tx work that's never going
4352                          * to get done, so reset controller to flush Tx.
4353                          * (Do the reset outside of interrupt context).
4354                          */
4355                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4356                                 adapter->tx_timeout_count++;
4357                                 schedule_work(&adapter->reset_task);
4358                                 /* return immediately since reset is imminent */
4359                                 return;
4360                         }
4361                 }
4362
4363                 /* Force detection of hung controller every watchdog period */
4364                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4365         }
4366
4367         /* Cause software interrupt to ensure Rx ring is cleaned */
4368         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4369                 u32 eics = 0;
4370
4371                 for (i = 0; i < adapter->num_q_vectors; i++)
4372                         eics |= adapter->q_vector[i]->eims_value;
4373                 wr32(E1000_EICS, eics);
4374         } else {
4375                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4376         }
4377
4378         igb_spoof_check(adapter);
4379         igb_ptp_rx_hang(adapter);
4380
4381         /* Check LVMMC register on i350/i354 only */
4382         if ((adapter->hw.mac.type == e1000_i350) ||
4383             (adapter->hw.mac.type == e1000_i354))
4384                 igb_check_lvmmc(adapter);
4385
4386         /* Reset the timer */
4387         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4388                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4389                         mod_timer(&adapter->watchdog_timer,
4390                                   round_jiffies(jiffies +  HZ));
4391                 else
4392                         mod_timer(&adapter->watchdog_timer,
4393                                   round_jiffies(jiffies + 2 * HZ));
4394         }
4395 }
4396
4397 enum latency_range {
4398         lowest_latency = 0,
4399         low_latency = 1,
4400         bulk_latency = 2,
4401         latency_invalid = 255
4402 };
4403
4404 /**
4405  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4406  *  @q_vector: pointer to q_vector
4407  *
4408  *  Stores a new ITR value based on strictly on packet size.  This
4409  *  algorithm is less sophisticated than that used in igb_update_itr,
4410  *  due to the difficulty of synchronizing statistics across multiple
4411  *  receive rings.  The divisors and thresholds used by this function
4412  *  were determined based on theoretical maximum wire speed and testing
4413  *  data, in order to minimize response time while increasing bulk
4414  *  throughput.
4415  *  This functionality is controlled by ethtool's coalescing settings.
4416  *  NOTE:  This function is called only when operating in a multiqueue
4417  *         receive environment.
4418  **/
4419 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4420 {
4421         int new_val = q_vector->itr_val;
4422         int avg_wire_size = 0;
4423         struct igb_adapter *adapter = q_vector->adapter;
4424         unsigned int packets;
4425
4426         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4427          * ints/sec - ITR timer value of 120 ticks.
4428          */
4429         if (adapter->link_speed != SPEED_1000) {
4430                 new_val = IGB_4K_ITR;
4431                 goto set_itr_val;
4432         }
4433
4434         packets = q_vector->rx.total_packets;
4435         if (packets)
4436                 avg_wire_size = q_vector->rx.total_bytes / packets;
4437
4438         packets = q_vector->tx.total_packets;
4439         if (packets)
4440                 avg_wire_size = max_t(u32, avg_wire_size,
4441                                       q_vector->tx.total_bytes / packets);
4442
4443         /* if avg_wire_size isn't set no work was done */
4444         if (!avg_wire_size)
4445                 goto clear_counts;
4446
4447         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4448         avg_wire_size += 24;
4449
4450         /* Don't starve jumbo frames */
4451         avg_wire_size = min(avg_wire_size, 3000);
4452
4453         /* Give a little boost to mid-size frames */
4454         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4455                 new_val = avg_wire_size / 3;
4456         else
4457                 new_val = avg_wire_size / 2;
4458
4459         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4460         if (new_val < IGB_20K_ITR &&
4461             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4462              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4463                 new_val = IGB_20K_ITR;
4464
4465 set_itr_val:
4466         if (new_val != q_vector->itr_val) {
4467                 q_vector->itr_val = new_val;
4468                 q_vector->set_itr = 1;
4469         }
4470 clear_counts:
4471         q_vector->rx.total_bytes = 0;
4472         q_vector->rx.total_packets = 0;
4473         q_vector->tx.total_bytes = 0;
4474         q_vector->tx.total_packets = 0;
4475 }
4476
4477 /**
4478  *  igb_update_itr - update the dynamic ITR value based on statistics
4479  *  @q_vector: pointer to q_vector
4480  *  @ring_container: ring info to update the itr for
4481  *
4482  *  Stores a new ITR value based on packets and byte
4483  *  counts during the last interrupt.  The advantage of per interrupt
4484  *  computation is faster updates and more accurate ITR for the current
4485  *  traffic pattern.  Constants in this function were computed
4486  *  based on theoretical maximum wire speed and thresholds were set based
4487  *  on testing data as well as attempting to minimize response time
4488  *  while increasing bulk throughput.
4489  *  This functionality is controlled by ethtool's coalescing settings.
4490  *  NOTE:  These calculations are only valid when operating in a single-
4491  *         queue environment.
4492  **/
4493 static void igb_update_itr(struct igb_q_vector *q_vector,
4494                            struct igb_ring_container *ring_container)
4495 {
4496         unsigned int packets = ring_container->total_packets;
4497         unsigned int bytes = ring_container->total_bytes;
4498         u8 itrval = ring_container->itr;
4499
4500         /* no packets, exit with status unchanged */
4501         if (packets == 0)
4502                 return;
4503
4504         switch (itrval) {
4505         case lowest_latency:
4506                 /* handle TSO and jumbo frames */
4507                 if (bytes/packets > 8000)
4508                         itrval = bulk_latency;
4509                 else if ((packets < 5) && (bytes > 512))
4510                         itrval = low_latency;
4511                 break;
4512         case low_latency:  /* 50 usec aka 20000 ints/s */
4513                 if (bytes > 10000) {
4514                         /* this if handles the TSO accounting */
4515                         if (bytes/packets > 8000)
4516                                 itrval = bulk_latency;
4517                         else if ((packets < 10) || ((bytes/packets) > 1200))
4518                                 itrval = bulk_latency;
4519                         else if ((packets > 35))
4520                                 itrval = lowest_latency;
4521                 } else if (bytes/packets > 2000) {
4522                         itrval = bulk_latency;
4523                 } else if (packets <= 2 && bytes < 512) {
4524                         itrval = lowest_latency;
4525                 }
4526                 break;
4527         case bulk_latency: /* 250 usec aka 4000 ints/s */
4528                 if (bytes > 25000) {
4529                         if (packets > 35)
4530                                 itrval = low_latency;
4531                 } else if (bytes < 1500) {
4532                         itrval = low_latency;
4533                 }
4534                 break;
4535         }
4536
4537         /* clear work counters since we have the values we need */
4538         ring_container->total_bytes = 0;
4539         ring_container->total_packets = 0;
4540
4541         /* write updated itr to ring container */
4542         ring_container->itr = itrval;
4543 }
4544
4545 static void igb_set_itr(struct igb_q_vector *q_vector)
4546 {
4547         struct igb_adapter *adapter = q_vector->adapter;
4548         u32 new_itr = q_vector->itr_val;
4549         u8 current_itr = 0;
4550
4551         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4552         if (adapter->link_speed != SPEED_1000) {
4553                 current_itr = 0;
4554                 new_itr = IGB_4K_ITR;
4555                 goto set_itr_now;
4556         }
4557
4558         igb_update_itr(q_vector, &q_vector->tx);
4559         igb_update_itr(q_vector, &q_vector->rx);
4560
4561         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4562
4563         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4564         if (current_itr == lowest_latency &&
4565             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4566              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4567                 current_itr = low_latency;
4568
4569         switch (current_itr) {
4570         /* counts and packets in update_itr are dependent on these numbers */
4571         case lowest_latency:
4572                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4573                 break;
4574         case low_latency:
4575                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4576                 break;
4577         case bulk_latency:
4578                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4579                 break;
4580         default:
4581                 break;
4582         }
4583
4584 set_itr_now:
4585         if (new_itr != q_vector->itr_val) {
4586                 /* this attempts to bias the interrupt rate towards Bulk
4587                  * by adding intermediate steps when interrupt rate is
4588                  * increasing
4589                  */
4590                 new_itr = new_itr > q_vector->itr_val ?
4591                           max((new_itr * q_vector->itr_val) /
4592                           (new_itr + (q_vector->itr_val >> 2)),
4593                           new_itr) : new_itr;
4594                 /* Don't write the value here; it resets the adapter's
4595                  * internal timer, and causes us to delay far longer than
4596                  * we should between interrupts.  Instead, we write the ITR
4597                  * value at the beginning of the next interrupt so the timing
4598                  * ends up being correct.
4599                  */
4600                 q_vector->itr_val = new_itr;
4601                 q_vector->set_itr = 1;
4602         }
4603 }
4604
4605 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4606                             u32 type_tucmd, u32 mss_l4len_idx)
4607 {
4608         struct e1000_adv_tx_context_desc *context_desc;
4609         u16 i = tx_ring->next_to_use;
4610
4611         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4612
4613         i++;
4614         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4615
4616         /* set bits to identify this as an advanced context descriptor */
4617         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4618
4619         /* For 82575, context index must be unique per ring. */
4620         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4621                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4622
4623         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4624         context_desc->seqnum_seed       = 0;
4625         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4626         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4627 }
4628
4629 static int igb_tso(struct igb_ring *tx_ring,
4630                    struct igb_tx_buffer *first,
4631                    u8 *hdr_len)
4632 {
4633         struct sk_buff *skb = first->skb;
4634         u32 vlan_macip_lens, type_tucmd;
4635         u32 mss_l4len_idx, l4len;
4636         int err;
4637
4638         if (skb->ip_summed != CHECKSUM_PARTIAL)
4639                 return 0;
4640
4641         if (!skb_is_gso(skb))
4642                 return 0;
4643
4644         err = skb_cow_head(skb, 0);
4645         if (err < 0)
4646                 return err;
4647
4648         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4649         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4650
4651         if (first->protocol == htons(ETH_P_IP)) {
4652                 struct iphdr *iph = ip_hdr(skb);
4653                 iph->tot_len = 0;
4654                 iph->check = 0;
4655                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4656                                                          iph->daddr, 0,
4657                                                          IPPROTO_TCP,
4658                                                          0);
4659                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4660                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4661                                    IGB_TX_FLAGS_CSUM |
4662                                    IGB_TX_FLAGS_IPV4;
4663         } else if (skb_is_gso_v6(skb)) {
4664                 ipv6_hdr(skb)->payload_len = 0;
4665                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4666                                                        &ipv6_hdr(skb)->daddr,
4667                                                        0, IPPROTO_TCP, 0);
4668                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4669                                    IGB_TX_FLAGS_CSUM;
4670         }
4671
4672         /* compute header lengths */
4673         l4len = tcp_hdrlen(skb);
4674         *hdr_len = skb_transport_offset(skb) + l4len;
4675
4676         /* update gso size and bytecount with header size */
4677         first->gso_segs = skb_shinfo(skb)->gso_segs;
4678         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4679
4680         /* MSS L4LEN IDX */
4681         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4682         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4683
4684         /* VLAN MACLEN IPLEN */
4685         vlan_macip_lens = skb_network_header_len(skb);
4686         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4687         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4688
4689         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4690
4691         return 1;
4692 }
4693
4694 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4695 {
4696         struct sk_buff *skb = first->skb;
4697         u32 vlan_macip_lens = 0;
4698         u32 mss_l4len_idx = 0;
4699         u32 type_tucmd = 0;
4700
4701         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4702                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4703                         return;
4704         } else {
4705                 u8 l4_hdr = 0;
4706
4707                 switch (first->protocol) {
4708                 case htons(ETH_P_IP):
4709                         vlan_macip_lens |= skb_network_header_len(skb);
4710                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4711                         l4_hdr = ip_hdr(skb)->protocol;
4712                         break;
4713                 case htons(ETH_P_IPV6):
4714                         vlan_macip_lens |= skb_network_header_len(skb);
4715                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4716                         break;
4717                 default:
4718                         if (unlikely(net_ratelimit())) {
4719                                 dev_warn(tx_ring->dev,
4720                                          "partial checksum but proto=%x!\n",
4721                                          first->protocol);
4722                         }
4723                         break;
4724                 }
4725
4726                 switch (l4_hdr) {
4727                 case IPPROTO_TCP:
4728                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4729                         mss_l4len_idx = tcp_hdrlen(skb) <<
4730                                         E1000_ADVTXD_L4LEN_SHIFT;
4731                         break;
4732                 case IPPROTO_SCTP:
4733                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4734                         mss_l4len_idx = sizeof(struct sctphdr) <<
4735                                         E1000_ADVTXD_L4LEN_SHIFT;
4736                         break;
4737                 case IPPROTO_UDP:
4738                         mss_l4len_idx = sizeof(struct udphdr) <<
4739                                         E1000_ADVTXD_L4LEN_SHIFT;
4740                         break;
4741                 default:
4742                         if (unlikely(net_ratelimit())) {
4743                                 dev_warn(tx_ring->dev,
4744                                          "partial checksum but l4 proto=%x!\n",
4745                                          l4_hdr);
4746                         }
4747                         break;
4748                 }
4749
4750                 /* update TX checksum flag */
4751                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4752         }
4753
4754         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4755         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4756
4757         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4758 }
4759
4760 #define IGB_SET_FLAG(_input, _flag, _result) \
4761         ((_flag <= _result) ? \
4762          ((u32)(_input & _flag) * (_result / _flag)) : \
4763          ((u32)(_input & _flag) / (_flag / _result)))
4764
4765 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4766 {
4767         /* set type for advanced descriptor with frame checksum insertion */
4768         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4769                        E1000_ADVTXD_DCMD_DEXT |
4770                        E1000_ADVTXD_DCMD_IFCS;
4771
4772         /* set HW vlan bit if vlan is present */
4773         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4774                                  (E1000_ADVTXD_DCMD_VLE));
4775
4776         /* set segmentation bits for TSO */
4777         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4778                                  (E1000_ADVTXD_DCMD_TSE));
4779
4780         /* set timestamp bit if present */
4781         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4782                                  (E1000_ADVTXD_MAC_TSTAMP));
4783
4784         /* insert frame checksum */
4785         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4786
4787         return cmd_type;
4788 }
4789
4790 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4791                                  union e1000_adv_tx_desc *tx_desc,
4792                                  u32 tx_flags, unsigned int paylen)
4793 {
4794         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4795
4796         /* 82575 requires a unique index per ring */
4797         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4798                 olinfo_status |= tx_ring->reg_idx << 4;
4799
4800         /* insert L4 checksum */
4801         olinfo_status |= IGB_SET_FLAG(tx_flags,
4802                                       IGB_TX_FLAGS_CSUM,
4803                                       (E1000_TXD_POPTS_TXSM << 8));
4804
4805         /* insert IPv4 checksum */
4806         olinfo_status |= IGB_SET_FLAG(tx_flags,
4807                                       IGB_TX_FLAGS_IPV4,
4808                                       (E1000_TXD_POPTS_IXSM << 8));
4809
4810         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4811 }
4812
4813 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4814 {
4815         struct net_device *netdev = tx_ring->netdev;
4816
4817         netif_stop_subqueue(netdev, tx_ring->queue_index);
4818
4819         /* Herbert's original patch had:
4820          *  smp_mb__after_netif_stop_queue();
4821          * but since that doesn't exist yet, just open code it.
4822          */
4823         smp_mb();
4824
4825         /* We need to check again in a case another CPU has just
4826          * made room available.
4827          */
4828         if (igb_desc_unused(tx_ring) < size)
4829                 return -EBUSY;
4830
4831         /* A reprieve! */
4832         netif_wake_subqueue(netdev, tx_ring->queue_index);
4833
4834         u64_stats_update_begin(&tx_ring->tx_syncp2);
4835         tx_ring->tx_stats.restart_queue2++;
4836         u64_stats_update_end(&tx_ring->tx_syncp2);
4837
4838         return 0;
4839 }
4840
4841 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4842 {
4843         if (igb_desc_unused(tx_ring) >= size)
4844                 return 0;
4845         return __igb_maybe_stop_tx(tx_ring, size);
4846 }
4847
4848 static void igb_tx_map(struct igb_ring *tx_ring,
4849                        struct igb_tx_buffer *first,
4850                        const u8 hdr_len)
4851 {
4852         struct sk_buff *skb = first->skb;
4853         struct igb_tx_buffer *tx_buffer;
4854         union e1000_adv_tx_desc *tx_desc;
4855         struct skb_frag_struct *frag;
4856         dma_addr_t dma;
4857         unsigned int data_len, size;
4858         u32 tx_flags = first->tx_flags;
4859         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4860         u16 i = tx_ring->next_to_use;
4861
4862         tx_desc = IGB_TX_DESC(tx_ring, i);
4863
4864         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4865
4866         size = skb_headlen(skb);
4867         data_len = skb->data_len;
4868
4869         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4870
4871         tx_buffer = first;
4872
4873         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4874                 if (dma_mapping_error(tx_ring->dev, dma))
4875                         goto dma_error;
4876
4877                 /* record length, and DMA address */
4878                 dma_unmap_len_set(tx_buffer, len, size);
4879                 dma_unmap_addr_set(tx_buffer, dma, dma);
4880
4881                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4882
4883                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4884                         tx_desc->read.cmd_type_len =
4885                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4886
4887                         i++;
4888                         tx_desc++;
4889                         if (i == tx_ring->count) {
4890                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4891                                 i = 0;
4892                         }
4893                         tx_desc->read.olinfo_status = 0;
4894
4895                         dma += IGB_MAX_DATA_PER_TXD;
4896                         size -= IGB_MAX_DATA_PER_TXD;
4897
4898                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4899                 }
4900
4901                 if (likely(!data_len))
4902                         break;
4903
4904                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4905
4906                 i++;
4907                 tx_desc++;
4908                 if (i == tx_ring->count) {
4909                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4910                         i = 0;
4911                 }
4912                 tx_desc->read.olinfo_status = 0;
4913
4914                 size = skb_frag_size(frag);
4915                 data_len -= size;
4916
4917                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4918                                        size, DMA_TO_DEVICE);
4919
4920                 tx_buffer = &tx_ring->tx_buffer_info[i];
4921         }
4922
4923         /* write last descriptor with RS and EOP bits */
4924         cmd_type |= size | IGB_TXD_DCMD;
4925         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4926
4927         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4928
4929         /* set the timestamp */
4930         first->time_stamp = jiffies;
4931
4932         /* Force memory writes to complete before letting h/w know there
4933          * are new descriptors to fetch.  (Only applicable for weak-ordered
4934          * memory model archs, such as IA-64).
4935          *
4936          * We also need this memory barrier to make certain all of the
4937          * status bits have been updated before next_to_watch is written.
4938          */
4939         wmb();
4940
4941         /* set next_to_watch value indicating a packet is present */
4942         first->next_to_watch = tx_desc;
4943
4944         i++;
4945         if (i == tx_ring->count)
4946                 i = 0;
4947
4948         tx_ring->next_to_use = i;
4949
4950         /* Make sure there is space in the ring for the next send. */
4951         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4952
4953         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
4954                 writel(i, tx_ring->tail);
4955
4956                 /* we need this if more than one processor can write to our tail
4957                  * at a time, it synchronizes IO on IA64/Altix systems
4958                  */
4959                 mmiowb();
4960         }
4961         return;
4962
4963 dma_error:
4964         dev_err(tx_ring->dev, "TX DMA map failed\n");
4965
4966         /* clear dma mappings for failed tx_buffer_info map */
4967         for (;;) {
4968                 tx_buffer = &tx_ring->tx_buffer_info[i];
4969                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4970                 if (tx_buffer == first)
4971                         break;
4972                 if (i == 0)
4973                         i = tx_ring->count;
4974                 i--;
4975         }
4976
4977         tx_ring->next_to_use = i;
4978 }
4979
4980 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4981                                 struct igb_ring *tx_ring)
4982 {
4983         struct igb_tx_buffer *first;
4984         int tso;
4985         u32 tx_flags = 0;
4986         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4987         __be16 protocol = vlan_get_protocol(skb);
4988         u8 hdr_len = 0;
4989
4990         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4991          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4992          *       + 2 desc gap to keep tail from touching head,
4993          *       + 1 desc for context descriptor,
4994          * otherwise try next time
4995          */
4996         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4997                 unsigned short f;
4998
4999                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5000                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5001         } else {
5002                 count += skb_shinfo(skb)->nr_frags;
5003         }
5004
5005         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5006                 /* this is a hard error */
5007                 return NETDEV_TX_BUSY;
5008         }
5009
5010         /* record the location of the first descriptor for this packet */
5011         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5012         first->skb = skb;
5013         first->bytecount = skb->len;
5014         first->gso_segs = 1;
5015
5016         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5017                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5018
5019                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
5020                                            &adapter->state)) {
5021                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5022                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5023
5024                         adapter->ptp_tx_skb = skb_get(skb);
5025                         adapter->ptp_tx_start = jiffies;
5026                         if (adapter->hw.mac.type == e1000_82576)
5027                                 schedule_work(&adapter->ptp_tx_work);
5028                 }
5029         }
5030
5031         skb_tx_timestamp(skb);
5032
5033         if (vlan_tx_tag_present(skb)) {
5034                 tx_flags |= IGB_TX_FLAGS_VLAN;
5035                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5036         }
5037
5038         /* record initial flags and protocol */
5039         first->tx_flags = tx_flags;
5040         first->protocol = protocol;
5041
5042         tso = igb_tso(tx_ring, first, &hdr_len);
5043         if (tso < 0)
5044                 goto out_drop;
5045         else if (!tso)
5046                 igb_tx_csum(tx_ring, first);
5047
5048         igb_tx_map(tx_ring, first, hdr_len);
5049
5050         return NETDEV_TX_OK;
5051
5052 out_drop:
5053         igb_unmap_and_free_tx_resource(tx_ring, first);
5054
5055         return NETDEV_TX_OK;
5056 }
5057
5058 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5059                                                     struct sk_buff *skb)
5060 {
5061         unsigned int r_idx = skb->queue_mapping;
5062
5063         if (r_idx >= adapter->num_tx_queues)
5064                 r_idx = r_idx % adapter->num_tx_queues;
5065
5066         return adapter->tx_ring[r_idx];
5067 }
5068
5069 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5070                                   struct net_device *netdev)
5071 {
5072         struct igb_adapter *adapter = netdev_priv(netdev);
5073
5074         if (test_bit(__IGB_DOWN, &adapter->state)) {
5075                 dev_kfree_skb_any(skb);
5076                 return NETDEV_TX_OK;
5077         }
5078
5079         if (skb->len <= 0) {
5080                 dev_kfree_skb_any(skb);
5081                 return NETDEV_TX_OK;
5082         }
5083
5084         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5085          * in order to meet this minimum size requirement.
5086          */
5087         if (unlikely(skb->len < 17)) {
5088                 if (skb_pad(skb, 17 - skb->len))
5089                         return NETDEV_TX_OK;
5090                 skb->len = 17;
5091                 skb_set_tail_pointer(skb, 17);
5092         }
5093
5094         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5095 }
5096
5097 /**
5098  *  igb_tx_timeout - Respond to a Tx Hang
5099  *  @netdev: network interface device structure
5100  **/
5101 static void igb_tx_timeout(struct net_device *netdev)
5102 {
5103         struct igb_adapter *adapter = netdev_priv(netdev);
5104         struct e1000_hw *hw = &adapter->hw;
5105
5106         /* Do the reset outside of interrupt context */
5107         adapter->tx_timeout_count++;
5108
5109         if (hw->mac.type >= e1000_82580)
5110                 hw->dev_spec._82575.global_device_reset = true;
5111
5112         schedule_work(&adapter->reset_task);
5113         wr32(E1000_EICS,
5114              (adapter->eims_enable_mask & ~adapter->eims_other));
5115 }
5116
5117 static void igb_reset_task(struct work_struct *work)
5118 {
5119         struct igb_adapter *adapter;
5120         adapter = container_of(work, struct igb_adapter, reset_task);
5121
5122         igb_dump(adapter);
5123         netdev_err(adapter->netdev, "Reset adapter\n");
5124         igb_reinit_locked(adapter);
5125 }
5126
5127 /**
5128  *  igb_get_stats64 - Get System Network Statistics
5129  *  @netdev: network interface device structure
5130  *  @stats: rtnl_link_stats64 pointer
5131  **/
5132 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5133                                                 struct rtnl_link_stats64 *stats)
5134 {
5135         struct igb_adapter *adapter = netdev_priv(netdev);
5136
5137         spin_lock(&adapter->stats64_lock);
5138         igb_update_stats(adapter, &adapter->stats64);
5139         memcpy(stats, &adapter->stats64, sizeof(*stats));
5140         spin_unlock(&adapter->stats64_lock);
5141
5142         return stats;
5143 }
5144
5145 /**
5146  *  igb_change_mtu - Change the Maximum Transfer Unit
5147  *  @netdev: network interface device structure
5148  *  @new_mtu: new value for maximum frame size
5149  *
5150  *  Returns 0 on success, negative on failure
5151  **/
5152 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5153 {
5154         struct igb_adapter *adapter = netdev_priv(netdev);
5155         struct pci_dev *pdev = adapter->pdev;
5156         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5157
5158         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5159                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5160                 return -EINVAL;
5161         }
5162
5163 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5164         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5165                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5166                 return -EINVAL;
5167         }
5168
5169         /* adjust max frame to be at least the size of a standard frame */
5170         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5171                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5172
5173         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5174                 usleep_range(1000, 2000);
5175
5176         /* igb_down has a dependency on max_frame_size */
5177         adapter->max_frame_size = max_frame;
5178
5179         if (netif_running(netdev))
5180                 igb_down(adapter);
5181
5182         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5183                  netdev->mtu, new_mtu);
5184         netdev->mtu = new_mtu;
5185
5186         if (netif_running(netdev))
5187                 igb_up(adapter);
5188         else
5189                 igb_reset(adapter);
5190
5191         clear_bit(__IGB_RESETTING, &adapter->state);
5192
5193         return 0;
5194 }
5195
5196 /**
5197  *  igb_update_stats - Update the board statistics counters
5198  *  @adapter: board private structure
5199  **/
5200 void igb_update_stats(struct igb_adapter *adapter,
5201                       struct rtnl_link_stats64 *net_stats)
5202 {
5203         struct e1000_hw *hw = &adapter->hw;
5204         struct pci_dev *pdev = adapter->pdev;
5205         u32 reg, mpc;
5206         int i;
5207         u64 bytes, packets;
5208         unsigned int start;
5209         u64 _bytes, _packets;
5210
5211         /* Prevent stats update while adapter is being reset, or if the pci
5212          * connection is down.
5213          */
5214         if (adapter->link_speed == 0)
5215                 return;
5216         if (pci_channel_offline(pdev))
5217                 return;
5218
5219         bytes = 0;
5220         packets = 0;
5221
5222         rcu_read_lock();
5223         for (i = 0; i < adapter->num_rx_queues; i++) {
5224                 struct igb_ring *ring = adapter->rx_ring[i];
5225                 u32 rqdpc = rd32(E1000_RQDPC(i));
5226                 if (hw->mac.type >= e1000_i210)
5227                         wr32(E1000_RQDPC(i), 0);
5228
5229                 if (rqdpc) {
5230                         ring->rx_stats.drops += rqdpc;
5231                         net_stats->rx_fifo_errors += rqdpc;
5232                 }
5233
5234                 do {
5235                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5236                         _bytes = ring->rx_stats.bytes;
5237                         _packets = ring->rx_stats.packets;
5238                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5239                 bytes += _bytes;
5240                 packets += _packets;
5241         }
5242
5243         net_stats->rx_bytes = bytes;
5244         net_stats->rx_packets = packets;
5245
5246         bytes = 0;
5247         packets = 0;
5248         for (i = 0; i < adapter->num_tx_queues; i++) {
5249                 struct igb_ring *ring = adapter->tx_ring[i];
5250                 do {
5251                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5252                         _bytes = ring->tx_stats.bytes;
5253                         _packets = ring->tx_stats.packets;
5254                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5255                 bytes += _bytes;
5256                 packets += _packets;
5257         }
5258         net_stats->tx_bytes = bytes;
5259         net_stats->tx_packets = packets;
5260         rcu_read_unlock();
5261
5262         /* read stats registers */
5263         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5264         adapter->stats.gprc += rd32(E1000_GPRC);
5265         adapter->stats.gorc += rd32(E1000_GORCL);
5266         rd32(E1000_GORCH); /* clear GORCL */
5267         adapter->stats.bprc += rd32(E1000_BPRC);
5268         adapter->stats.mprc += rd32(E1000_MPRC);
5269         adapter->stats.roc += rd32(E1000_ROC);
5270
5271         adapter->stats.prc64 += rd32(E1000_PRC64);
5272         adapter->stats.prc127 += rd32(E1000_PRC127);
5273         adapter->stats.prc255 += rd32(E1000_PRC255);
5274         adapter->stats.prc511 += rd32(E1000_PRC511);
5275         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5276         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5277         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5278         adapter->stats.sec += rd32(E1000_SEC);
5279
5280         mpc = rd32(E1000_MPC);
5281         adapter->stats.mpc += mpc;
5282         net_stats->rx_fifo_errors += mpc;
5283         adapter->stats.scc += rd32(E1000_SCC);
5284         adapter->stats.ecol += rd32(E1000_ECOL);
5285         adapter->stats.mcc += rd32(E1000_MCC);
5286         adapter->stats.latecol += rd32(E1000_LATECOL);
5287         adapter->stats.dc += rd32(E1000_DC);
5288         adapter->stats.rlec += rd32(E1000_RLEC);
5289         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5290         adapter->stats.xontxc += rd32(E1000_XONTXC);
5291         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5292         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5293         adapter->stats.fcruc += rd32(E1000_FCRUC);
5294         adapter->stats.gptc += rd32(E1000_GPTC);
5295         adapter->stats.gotc += rd32(E1000_GOTCL);
5296         rd32(E1000_GOTCH); /* clear GOTCL */
5297         adapter->stats.rnbc += rd32(E1000_RNBC);
5298         adapter->stats.ruc += rd32(E1000_RUC);
5299         adapter->stats.rfc += rd32(E1000_RFC);
5300         adapter->stats.rjc += rd32(E1000_RJC);
5301         adapter->stats.tor += rd32(E1000_TORH);
5302         adapter->stats.tot += rd32(E1000_TOTH);
5303         adapter->stats.tpr += rd32(E1000_TPR);
5304
5305         adapter->stats.ptc64 += rd32(E1000_PTC64);
5306         adapter->stats.ptc127 += rd32(E1000_PTC127);
5307         adapter->stats.ptc255 += rd32(E1000_PTC255);
5308         adapter->stats.ptc511 += rd32(E1000_PTC511);
5309         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5310         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5311
5312         adapter->stats.mptc += rd32(E1000_MPTC);
5313         adapter->stats.bptc += rd32(E1000_BPTC);
5314
5315         adapter->stats.tpt += rd32(E1000_TPT);
5316         adapter->stats.colc += rd32(E1000_COLC);
5317
5318         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5319         /* read internal phy specific stats */
5320         reg = rd32(E1000_CTRL_EXT);
5321         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5322                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5323
5324                 /* this stat has invalid values on i210/i211 */
5325                 if ((hw->mac.type != e1000_i210) &&
5326                     (hw->mac.type != e1000_i211))
5327                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5328         }
5329
5330         adapter->stats.tsctc += rd32(E1000_TSCTC);
5331         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5332
5333         adapter->stats.iac += rd32(E1000_IAC);
5334         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5335         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5336         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5337         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5338         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5339         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5340         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5341         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5342
5343         /* Fill out the OS statistics structure */
5344         net_stats->multicast = adapter->stats.mprc;
5345         net_stats->collisions = adapter->stats.colc;
5346
5347         /* Rx Errors */
5348
5349         /* RLEC on some newer hardware can be incorrect so build
5350          * our own version based on RUC and ROC
5351          */
5352         net_stats->rx_errors = adapter->stats.rxerrc +
5353                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5354                 adapter->stats.ruc + adapter->stats.roc +
5355                 adapter->stats.cexterr;
5356         net_stats->rx_length_errors = adapter->stats.ruc +
5357                                       adapter->stats.roc;
5358         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5359         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5360         net_stats->rx_missed_errors = adapter->stats.mpc;
5361
5362         /* Tx Errors */
5363         net_stats->tx_errors = adapter->stats.ecol +
5364                                adapter->stats.latecol;
5365         net_stats->tx_aborted_errors = adapter->stats.ecol;
5366         net_stats->tx_window_errors = adapter->stats.latecol;
5367         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5368
5369         /* Tx Dropped needs to be maintained elsewhere */
5370
5371         /* Management Stats */
5372         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5373         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5374         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5375
5376         /* OS2BMC Stats */
5377         reg = rd32(E1000_MANC);
5378         if (reg & E1000_MANC_EN_BMC2OS) {
5379                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5380                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5381                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5382                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5383         }
5384 }
5385
5386 static irqreturn_t igb_msix_other(int irq, void *data)
5387 {
5388         struct igb_adapter *adapter = data;
5389         struct e1000_hw *hw = &adapter->hw;
5390         u32 icr = rd32(E1000_ICR);
5391         /* reading ICR causes bit 31 of EICR to be cleared */
5392
5393         if (icr & E1000_ICR_DRSTA)
5394                 schedule_work(&adapter->reset_task);
5395
5396         if (icr & E1000_ICR_DOUTSYNC) {
5397                 /* HW is reporting DMA is out of sync */
5398                 adapter->stats.doosync++;
5399                 /* The DMA Out of Sync is also indication of a spoof event
5400                  * in IOV mode. Check the Wrong VM Behavior register to
5401                  * see if it is really a spoof event.
5402                  */
5403                 igb_check_wvbr(adapter);
5404         }
5405
5406         /* Check for a mailbox event */
5407         if (icr & E1000_ICR_VMMB)
5408                 igb_msg_task(adapter);
5409
5410         if (icr & E1000_ICR_LSC) {
5411                 hw->mac.get_link_status = 1;
5412                 /* guard against interrupt when we're going down */
5413                 if (!test_bit(__IGB_DOWN, &adapter->state))
5414                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5415         }
5416
5417         if (icr & E1000_ICR_TS) {
5418                 u32 tsicr = rd32(E1000_TSICR);
5419
5420                 if (tsicr & E1000_TSICR_TXTS) {
5421                         /* acknowledge the interrupt */
5422                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5423                         /* retrieve hardware timestamp */
5424                         schedule_work(&adapter->ptp_tx_work);
5425                 }
5426         }
5427
5428         wr32(E1000_EIMS, adapter->eims_other);
5429
5430         return IRQ_HANDLED;
5431 }
5432
5433 static void igb_write_itr(struct igb_q_vector *q_vector)
5434 {
5435         struct igb_adapter *adapter = q_vector->adapter;
5436         u32 itr_val = q_vector->itr_val & 0x7FFC;
5437
5438         if (!q_vector->set_itr)
5439                 return;
5440
5441         if (!itr_val)
5442                 itr_val = 0x4;
5443
5444         if (adapter->hw.mac.type == e1000_82575)
5445                 itr_val |= itr_val << 16;
5446         else
5447                 itr_val |= E1000_EITR_CNT_IGNR;
5448
5449         writel(itr_val, q_vector->itr_register);
5450         q_vector->set_itr = 0;
5451 }
5452
5453 static irqreturn_t igb_msix_ring(int irq, void *data)
5454 {
5455         struct igb_q_vector *q_vector = data;
5456
5457         /* Write the ITR value calculated from the previous interrupt. */
5458         igb_write_itr(q_vector);
5459
5460         napi_schedule(&q_vector->napi);
5461
5462         return IRQ_HANDLED;
5463 }
5464
5465 #ifdef CONFIG_IGB_DCA
5466 static void igb_update_tx_dca(struct igb_adapter *adapter,
5467                               struct igb_ring *tx_ring,
5468                               int cpu)
5469 {
5470         struct e1000_hw *hw = &adapter->hw;
5471         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5472
5473         if (hw->mac.type != e1000_82575)
5474                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5475
5476         /* We can enable relaxed ordering for reads, but not writes when
5477          * DCA is enabled.  This is due to a known issue in some chipsets
5478          * which will cause the DCA tag to be cleared.
5479          */
5480         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5481                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5482                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5483
5484         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5485 }
5486
5487 static void igb_update_rx_dca(struct igb_adapter *adapter,
5488                               struct igb_ring *rx_ring,
5489                               int cpu)
5490 {
5491         struct e1000_hw *hw = &adapter->hw;
5492         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5493
5494         if (hw->mac.type != e1000_82575)
5495                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5496
5497         /* We can enable relaxed ordering for reads, but not writes when
5498          * DCA is enabled.  This is due to a known issue in some chipsets
5499          * which will cause the DCA tag to be cleared.
5500          */
5501         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5502                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5503
5504         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5505 }
5506
5507 static void igb_update_dca(struct igb_q_vector *q_vector)
5508 {
5509         struct igb_adapter *adapter = q_vector->adapter;
5510         int cpu = get_cpu();
5511
5512         if (q_vector->cpu == cpu)
5513                 goto out_no_update;
5514
5515         if (q_vector->tx.ring)
5516                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5517
5518         if (q_vector->rx.ring)
5519                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5520
5521         q_vector->cpu = cpu;
5522 out_no_update:
5523         put_cpu();
5524 }
5525
5526 static void igb_setup_dca(struct igb_adapter *adapter)
5527 {
5528         struct e1000_hw *hw = &adapter->hw;
5529         int i;
5530
5531         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5532                 return;
5533
5534         /* Always use CB2 mode, difference is masked in the CB driver. */
5535         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5536
5537         for (i = 0; i < adapter->num_q_vectors; i++) {
5538                 adapter->q_vector[i]->cpu = -1;
5539                 igb_update_dca(adapter->q_vector[i]);
5540         }
5541 }
5542
5543 static int __igb_notify_dca(struct device *dev, void *data)
5544 {
5545         struct net_device *netdev = dev_get_drvdata(dev);
5546         struct igb_adapter *adapter = netdev_priv(netdev);
5547         struct pci_dev *pdev = adapter->pdev;
5548         struct e1000_hw *hw = &adapter->hw;
5549         unsigned long event = *(unsigned long *)data;
5550
5551         switch (event) {
5552         case DCA_PROVIDER_ADD:
5553                 /* if already enabled, don't do it again */
5554                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5555                         break;
5556                 if (dca_add_requester(dev) == 0) {
5557                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5558                         dev_info(&pdev->dev, "DCA enabled\n");
5559                         igb_setup_dca(adapter);
5560                         break;
5561                 }
5562                 /* Fall Through since DCA is disabled. */
5563         case DCA_PROVIDER_REMOVE:
5564                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5565                         /* without this a class_device is left
5566                          * hanging around in the sysfs model
5567                          */
5568                         dca_remove_requester(dev);
5569                         dev_info(&pdev->dev, "DCA disabled\n");
5570                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5571                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5572                 }
5573                 break;
5574         }
5575
5576         return 0;
5577 }
5578
5579 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5580                           void *p)
5581 {
5582         int ret_val;
5583
5584         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5585                                          __igb_notify_dca);
5586
5587         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5588 }
5589 #endif /* CONFIG_IGB_DCA */
5590
5591 #ifdef CONFIG_PCI_IOV
5592 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5593 {
5594         unsigned char mac_addr[ETH_ALEN];
5595
5596         eth_zero_addr(mac_addr);
5597         igb_set_vf_mac(adapter, vf, mac_addr);
5598
5599         /* By default spoof check is enabled for all VFs */
5600         adapter->vf_data[vf].spoofchk_enabled = true;
5601
5602         return 0;
5603 }
5604
5605 #endif
5606 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5607 {
5608         struct e1000_hw *hw = &adapter->hw;
5609         u32 ping;
5610         int i;
5611
5612         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5613                 ping = E1000_PF_CONTROL_MSG;
5614                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5615                         ping |= E1000_VT_MSGTYPE_CTS;
5616                 igb_write_mbx(hw, &ping, 1, i);
5617         }
5618 }
5619
5620 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5621 {
5622         struct e1000_hw *hw = &adapter->hw;
5623         u32 vmolr = rd32(E1000_VMOLR(vf));
5624         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5625
5626         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5627                             IGB_VF_FLAG_MULTI_PROMISC);
5628         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5629
5630         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5631                 vmolr |= E1000_VMOLR_MPME;
5632                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5633                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5634         } else {
5635                 /* if we have hashes and we are clearing a multicast promisc
5636                  * flag we need to write the hashes to the MTA as this step
5637                  * was previously skipped
5638                  */
5639                 if (vf_data->num_vf_mc_hashes > 30) {
5640                         vmolr |= E1000_VMOLR_MPME;
5641                 } else if (vf_data->num_vf_mc_hashes) {
5642                         int j;
5643
5644                         vmolr |= E1000_VMOLR_ROMPE;
5645                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5646                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5647                 }
5648         }
5649
5650         wr32(E1000_VMOLR(vf), vmolr);
5651
5652         /* there are flags left unprocessed, likely not supported */
5653         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5654                 return -EINVAL;
5655
5656         return 0;
5657 }
5658
5659 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5660                                   u32 *msgbuf, u32 vf)
5661 {
5662         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5663         u16 *hash_list = (u16 *)&msgbuf[1];
5664         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5665         int i;
5666
5667         /* salt away the number of multicast addresses assigned
5668          * to this VF for later use to restore when the PF multi cast
5669          * list changes
5670          */
5671         vf_data->num_vf_mc_hashes = n;
5672
5673         /* only up to 30 hash values supported */
5674         if (n > 30)
5675                 n = 30;
5676
5677         /* store the hashes for later use */
5678         for (i = 0; i < n; i++)
5679                 vf_data->vf_mc_hashes[i] = hash_list[i];
5680
5681         /* Flush and reset the mta with the new values */
5682         igb_set_rx_mode(adapter->netdev);
5683
5684         return 0;
5685 }
5686
5687 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5688 {
5689         struct e1000_hw *hw = &adapter->hw;
5690         struct vf_data_storage *vf_data;
5691         int i, j;
5692
5693         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5694                 u32 vmolr = rd32(E1000_VMOLR(i));
5695
5696                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5697
5698                 vf_data = &adapter->vf_data[i];
5699
5700                 if ((vf_data->num_vf_mc_hashes > 30) ||
5701                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5702                         vmolr |= E1000_VMOLR_MPME;
5703                 } else if (vf_data->num_vf_mc_hashes) {
5704                         vmolr |= E1000_VMOLR_ROMPE;
5705                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5706                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5707                 }
5708                 wr32(E1000_VMOLR(i), vmolr);
5709         }
5710 }
5711
5712 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5713 {
5714         struct e1000_hw *hw = &adapter->hw;
5715         u32 pool_mask, reg, vid;
5716         int i;
5717
5718         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5719
5720         /* Find the vlan filter for this id */
5721         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5722                 reg = rd32(E1000_VLVF(i));
5723
5724                 /* remove the vf from the pool */
5725                 reg &= ~pool_mask;
5726
5727                 /* if pool is empty then remove entry from vfta */
5728                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5729                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5730                         reg = 0;
5731                         vid = reg & E1000_VLVF_VLANID_MASK;
5732                         igb_vfta_set(hw, vid, false);
5733                 }
5734
5735                 wr32(E1000_VLVF(i), reg);
5736         }
5737
5738         adapter->vf_data[vf].vlans_enabled = 0;
5739 }
5740
5741 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5742 {
5743         struct e1000_hw *hw = &adapter->hw;
5744         u32 reg, i;
5745
5746         /* The vlvf table only exists on 82576 hardware and newer */
5747         if (hw->mac.type < e1000_82576)
5748                 return -1;
5749
5750         /* we only need to do this if VMDq is enabled */
5751         if (!adapter->vfs_allocated_count)
5752                 return -1;
5753
5754         /* Find the vlan filter for this id */
5755         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5756                 reg = rd32(E1000_VLVF(i));
5757                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5758                     vid == (reg & E1000_VLVF_VLANID_MASK))
5759                         break;
5760         }
5761
5762         if (add) {
5763                 if (i == E1000_VLVF_ARRAY_SIZE) {
5764                         /* Did not find a matching VLAN ID entry that was
5765                          * enabled.  Search for a free filter entry, i.e.
5766                          * one without the enable bit set
5767                          */
5768                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5769                                 reg = rd32(E1000_VLVF(i));
5770                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5771                                         break;
5772                         }
5773                 }
5774                 if (i < E1000_VLVF_ARRAY_SIZE) {
5775                         /* Found an enabled/available entry */
5776                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5777
5778                         /* if !enabled we need to set this up in vfta */
5779                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5780                                 /* add VID to filter table */
5781                                 igb_vfta_set(hw, vid, true);
5782                                 reg |= E1000_VLVF_VLANID_ENABLE;
5783                         }
5784                         reg &= ~E1000_VLVF_VLANID_MASK;
5785                         reg |= vid;
5786                         wr32(E1000_VLVF(i), reg);
5787
5788                         /* do not modify RLPML for PF devices */
5789                         if (vf >= adapter->vfs_allocated_count)
5790                                 return 0;
5791
5792                         if (!adapter->vf_data[vf].vlans_enabled) {
5793                                 u32 size;
5794
5795                                 reg = rd32(E1000_VMOLR(vf));
5796                                 size = reg & E1000_VMOLR_RLPML_MASK;
5797                                 size += 4;
5798                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5799                                 reg |= size;
5800                                 wr32(E1000_VMOLR(vf), reg);
5801                         }
5802
5803                         adapter->vf_data[vf].vlans_enabled++;
5804                 }
5805         } else {
5806                 if (i < E1000_VLVF_ARRAY_SIZE) {
5807                         /* remove vf from the pool */
5808                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5809                         /* if pool is empty then remove entry from vfta */
5810                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5811                                 reg = 0;
5812                                 igb_vfta_set(hw, vid, false);
5813                         }
5814                         wr32(E1000_VLVF(i), reg);
5815
5816                         /* do not modify RLPML for PF devices */
5817                         if (vf >= adapter->vfs_allocated_count)
5818                                 return 0;
5819
5820                         adapter->vf_data[vf].vlans_enabled--;
5821                         if (!adapter->vf_data[vf].vlans_enabled) {
5822                                 u32 size;
5823
5824                                 reg = rd32(E1000_VMOLR(vf));
5825                                 size = reg & E1000_VMOLR_RLPML_MASK;
5826                                 size -= 4;
5827                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5828                                 reg |= size;
5829                                 wr32(E1000_VMOLR(vf), reg);
5830                         }
5831                 }
5832         }
5833         return 0;
5834 }
5835
5836 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5837 {
5838         struct e1000_hw *hw = &adapter->hw;
5839
5840         if (vid)
5841                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5842         else
5843                 wr32(E1000_VMVIR(vf), 0);
5844 }
5845
5846 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5847                                int vf, u16 vlan, u8 qos)
5848 {
5849         int err = 0;
5850         struct igb_adapter *adapter = netdev_priv(netdev);
5851
5852         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5853                 return -EINVAL;
5854         if (vlan || qos) {
5855                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5856                 if (err)
5857                         goto out;
5858                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5859                 igb_set_vmolr(adapter, vf, !vlan);
5860                 adapter->vf_data[vf].pf_vlan = vlan;
5861                 adapter->vf_data[vf].pf_qos = qos;
5862                 dev_info(&adapter->pdev->dev,
5863                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5864                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5865                         dev_warn(&adapter->pdev->dev,
5866                                  "The VF VLAN has been set, but the PF device is not up.\n");
5867                         dev_warn(&adapter->pdev->dev,
5868                                  "Bring the PF device up before attempting to use the VF device.\n");
5869                 }
5870         } else {
5871                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5872                              false, vf);
5873                 igb_set_vmvir(adapter, vlan, vf);
5874                 igb_set_vmolr(adapter, vf, true);
5875                 adapter->vf_data[vf].pf_vlan = 0;
5876                 adapter->vf_data[vf].pf_qos = 0;
5877         }
5878 out:
5879         return err;
5880 }
5881
5882 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5883 {
5884         struct e1000_hw *hw = &adapter->hw;
5885         int i;
5886         u32 reg;
5887
5888         /* Find the vlan filter for this id */
5889         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5890                 reg = rd32(E1000_VLVF(i));
5891                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5892                     vid == (reg & E1000_VLVF_VLANID_MASK))
5893                         break;
5894         }
5895
5896         if (i >= E1000_VLVF_ARRAY_SIZE)
5897                 i = -1;
5898
5899         return i;
5900 }
5901
5902 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5903 {
5904         struct e1000_hw *hw = &adapter->hw;
5905         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5906         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5907         int err = 0;
5908
5909         /* If in promiscuous mode we need to make sure the PF also has
5910          * the VLAN filter set.
5911          */
5912         if (add && (adapter->netdev->flags & IFF_PROMISC))
5913                 err = igb_vlvf_set(adapter, vid, add,
5914                                    adapter->vfs_allocated_count);
5915         if (err)
5916                 goto out;
5917
5918         err = igb_vlvf_set(adapter, vid, add, vf);
5919
5920         if (err)
5921                 goto out;
5922
5923         /* Go through all the checks to see if the VLAN filter should
5924          * be wiped completely.
5925          */
5926         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5927                 u32 vlvf, bits;
5928                 int regndx = igb_find_vlvf_entry(adapter, vid);
5929
5930                 if (regndx < 0)
5931                         goto out;
5932                 /* See if any other pools are set for this VLAN filter
5933                  * entry other than the PF.
5934                  */
5935                 vlvf = bits = rd32(E1000_VLVF(regndx));
5936                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5937                               adapter->vfs_allocated_count);
5938                 /* If the filter was removed then ensure PF pool bit
5939                  * is cleared if the PF only added itself to the pool
5940                  * because the PF is in promiscuous mode.
5941                  */
5942                 if ((vlvf & VLAN_VID_MASK) == vid &&
5943                     !test_bit(vid, adapter->active_vlans) &&
5944                     !bits)
5945                         igb_vlvf_set(adapter, vid, add,
5946                                      adapter->vfs_allocated_count);
5947         }
5948
5949 out:
5950         return err;
5951 }
5952
5953 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5954 {
5955         /* clear flags - except flag that indicates PF has set the MAC */
5956         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5957         adapter->vf_data[vf].last_nack = jiffies;
5958
5959         /* reset offloads to defaults */
5960         igb_set_vmolr(adapter, vf, true);
5961
5962         /* reset vlans for device */
5963         igb_clear_vf_vfta(adapter, vf);
5964         if (adapter->vf_data[vf].pf_vlan)
5965                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5966                                     adapter->vf_data[vf].pf_vlan,
5967                                     adapter->vf_data[vf].pf_qos);
5968         else
5969                 igb_clear_vf_vfta(adapter, vf);
5970
5971         /* reset multicast table array for vf */
5972         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5973
5974         /* Flush and reset the mta with the new values */
5975         igb_set_rx_mode(adapter->netdev);
5976 }
5977
5978 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5979 {
5980         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5981
5982         /* clear mac address as we were hotplug removed/added */
5983         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5984                 eth_zero_addr(vf_mac);
5985
5986         /* process remaining reset events */
5987         igb_vf_reset(adapter, vf);
5988 }
5989
5990 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5991 {
5992         struct e1000_hw *hw = &adapter->hw;
5993         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5994         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5995         u32 reg, msgbuf[3];
5996         u8 *addr = (u8 *)(&msgbuf[1]);
5997
5998         /* process all the same items cleared in a function level reset */
5999         igb_vf_reset(adapter, vf);
6000
6001         /* set vf mac address */
6002         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
6003
6004         /* enable transmit and receive for vf */
6005         reg = rd32(E1000_VFTE);
6006         wr32(E1000_VFTE, reg | (1 << vf));
6007         reg = rd32(E1000_VFRE);
6008         wr32(E1000_VFRE, reg | (1 << vf));
6009
6010         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6011
6012         /* reply to reset with ack and vf mac address */
6013         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6014         memcpy(addr, vf_mac, ETH_ALEN);
6015         igb_write_mbx(hw, msgbuf, 3, vf);
6016 }
6017
6018 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6019 {
6020         /* The VF MAC Address is stored in a packed array of bytes
6021          * starting at the second 32 bit word of the msg array
6022          */
6023         unsigned char *addr = (char *)&msg[1];
6024         int err = -1;
6025
6026         if (is_valid_ether_addr(addr))
6027                 err = igb_set_vf_mac(adapter, vf, addr);
6028
6029         return err;
6030 }
6031
6032 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6033 {
6034         struct e1000_hw *hw = &adapter->hw;
6035         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6036         u32 msg = E1000_VT_MSGTYPE_NACK;
6037
6038         /* if device isn't clear to send it shouldn't be reading either */
6039         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6040             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6041                 igb_write_mbx(hw, &msg, 1, vf);
6042                 vf_data->last_nack = jiffies;
6043         }
6044 }
6045
6046 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6047 {
6048         struct pci_dev *pdev = adapter->pdev;
6049         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6050         struct e1000_hw *hw = &adapter->hw;
6051         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6052         s32 retval;
6053
6054         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6055
6056         if (retval) {
6057                 /* if receive failed revoke VF CTS stats and restart init */
6058                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6059                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6060                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6061                         return;
6062                 goto out;
6063         }
6064
6065         /* this is a message we already processed, do nothing */
6066         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6067                 return;
6068
6069         /* until the vf completes a reset it should not be
6070          * allowed to start any configuration.
6071          */
6072         if (msgbuf[0] == E1000_VF_RESET) {
6073                 igb_vf_reset_msg(adapter, vf);
6074                 return;
6075         }
6076
6077         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6078                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6079                         return;
6080                 retval = -1;
6081                 goto out;
6082         }
6083
6084         switch ((msgbuf[0] & 0xFFFF)) {
6085         case E1000_VF_SET_MAC_ADDR:
6086                 retval = -EINVAL;
6087                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6088                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6089                 else
6090                         dev_warn(&pdev->dev,
6091                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6092                                  vf);
6093                 break;
6094         case E1000_VF_SET_PROMISC:
6095                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6096                 break;
6097         case E1000_VF_SET_MULTICAST:
6098                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6099                 break;
6100         case E1000_VF_SET_LPE:
6101                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6102                 break;
6103         case E1000_VF_SET_VLAN:
6104                 retval = -1;
6105                 if (vf_data->pf_vlan)
6106                         dev_warn(&pdev->dev,
6107                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6108                                  vf);
6109                 else
6110                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6111                 break;
6112         default:
6113                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6114                 retval = -1;
6115                 break;
6116         }
6117
6118         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6119 out:
6120         /* notify the VF of the results of what it sent us */
6121         if (retval)
6122                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6123         else
6124                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6125
6126         igb_write_mbx(hw, msgbuf, 1, vf);
6127 }
6128
6129 static void igb_msg_task(struct igb_adapter *adapter)
6130 {
6131         struct e1000_hw *hw = &adapter->hw;
6132         u32 vf;
6133
6134         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6135                 /* process any reset requests */
6136                 if (!igb_check_for_rst(hw, vf))
6137                         igb_vf_reset_event(adapter, vf);
6138
6139                 /* process any messages pending */
6140                 if (!igb_check_for_msg(hw, vf))
6141                         igb_rcv_msg_from_vf(adapter, vf);
6142
6143                 /* process any acks */
6144                 if (!igb_check_for_ack(hw, vf))
6145                         igb_rcv_ack_from_vf(adapter, vf);
6146         }
6147 }
6148
6149 /**
6150  *  igb_set_uta - Set unicast filter table address
6151  *  @adapter: board private structure
6152  *
6153  *  The unicast table address is a register array of 32-bit registers.
6154  *  The table is meant to be used in a way similar to how the MTA is used
6155  *  however due to certain limitations in the hardware it is necessary to
6156  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6157  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6158  **/
6159 static void igb_set_uta(struct igb_adapter *adapter)
6160 {
6161         struct e1000_hw *hw = &adapter->hw;
6162         int i;
6163
6164         /* The UTA table only exists on 82576 hardware and newer */
6165         if (hw->mac.type < e1000_82576)
6166                 return;
6167
6168         /* we only need to do this if VMDq is enabled */
6169         if (!adapter->vfs_allocated_count)
6170                 return;
6171
6172         for (i = 0; i < hw->mac.uta_reg_count; i++)
6173                 array_wr32(E1000_UTA, i, ~0);
6174 }
6175
6176 /**
6177  *  igb_intr_msi - Interrupt Handler
6178  *  @irq: interrupt number
6179  *  @data: pointer to a network interface device structure
6180  **/
6181 static irqreturn_t igb_intr_msi(int irq, void *data)
6182 {
6183         struct igb_adapter *adapter = data;
6184         struct igb_q_vector *q_vector = adapter->q_vector[0];
6185         struct e1000_hw *hw = &adapter->hw;
6186         /* read ICR disables interrupts using IAM */
6187         u32 icr = rd32(E1000_ICR);
6188
6189         igb_write_itr(q_vector);
6190
6191         if (icr & E1000_ICR_DRSTA)
6192                 schedule_work(&adapter->reset_task);
6193
6194         if (icr & E1000_ICR_DOUTSYNC) {
6195                 /* HW is reporting DMA is out of sync */
6196                 adapter->stats.doosync++;
6197         }
6198
6199         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6200                 hw->mac.get_link_status = 1;
6201                 if (!test_bit(__IGB_DOWN, &adapter->state))
6202                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6203         }
6204
6205         if (icr & E1000_ICR_TS) {
6206                 u32 tsicr = rd32(E1000_TSICR);
6207
6208                 if (tsicr & E1000_TSICR_TXTS) {
6209                         /* acknowledge the interrupt */
6210                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6211                         /* retrieve hardware timestamp */
6212                         schedule_work(&adapter->ptp_tx_work);
6213                 }
6214         }
6215
6216         napi_schedule(&q_vector->napi);
6217
6218         return IRQ_HANDLED;
6219 }
6220
6221 /**
6222  *  igb_intr - Legacy Interrupt Handler
6223  *  @irq: interrupt number
6224  *  @data: pointer to a network interface device structure
6225  **/
6226 static irqreturn_t igb_intr(int irq, void *data)
6227 {
6228         struct igb_adapter *adapter = data;
6229         struct igb_q_vector *q_vector = adapter->q_vector[0];
6230         struct e1000_hw *hw = &adapter->hw;
6231         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6232          * need for the IMC write
6233          */
6234         u32 icr = rd32(E1000_ICR);
6235
6236         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6237          * not set, then the adapter didn't send an interrupt
6238          */
6239         if (!(icr & E1000_ICR_INT_ASSERTED))
6240                 return IRQ_NONE;
6241
6242         igb_write_itr(q_vector);
6243
6244         if (icr & E1000_ICR_DRSTA)
6245                 schedule_work(&adapter->reset_task);
6246
6247         if (icr & E1000_ICR_DOUTSYNC) {
6248                 /* HW is reporting DMA is out of sync */
6249                 adapter->stats.doosync++;
6250         }
6251
6252         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6253                 hw->mac.get_link_status = 1;
6254                 /* guard against interrupt when we're going down */
6255                 if (!test_bit(__IGB_DOWN, &adapter->state))
6256                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6257         }
6258
6259         if (icr & E1000_ICR_TS) {
6260                 u32 tsicr = rd32(E1000_TSICR);
6261
6262                 if (tsicr & E1000_TSICR_TXTS) {
6263                         /* acknowledge the interrupt */
6264                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6265                         /* retrieve hardware timestamp */
6266                         schedule_work(&adapter->ptp_tx_work);
6267                 }
6268         }
6269
6270         napi_schedule(&q_vector->napi);
6271
6272         return IRQ_HANDLED;
6273 }
6274
6275 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6276 {
6277         struct igb_adapter *adapter = q_vector->adapter;
6278         struct e1000_hw *hw = &adapter->hw;
6279
6280         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6281             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6282                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6283                         igb_set_itr(q_vector);
6284                 else
6285                         igb_update_ring_itr(q_vector);
6286         }
6287
6288         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6289                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6290                         wr32(E1000_EIMS, q_vector->eims_value);
6291                 else
6292                         igb_irq_enable(adapter);
6293         }
6294 }
6295
6296 /**
6297  *  igb_poll - NAPI Rx polling callback
6298  *  @napi: napi polling structure
6299  *  @budget: count of how many packets we should handle
6300  **/
6301 static int igb_poll(struct napi_struct *napi, int budget)
6302 {
6303         struct igb_q_vector *q_vector = container_of(napi,
6304                                                      struct igb_q_vector,
6305                                                      napi);
6306         bool clean_complete = true;
6307
6308 #ifdef CONFIG_IGB_DCA
6309         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6310                 igb_update_dca(q_vector);
6311 #endif
6312         if (q_vector->tx.ring)
6313                 clean_complete = igb_clean_tx_irq(q_vector);
6314
6315         if (q_vector->rx.ring)
6316                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6317
6318         /* If all work not completed, return budget and keep polling */
6319         if (!clean_complete)
6320                 return budget;
6321
6322         /* If not enough Rx work done, exit the polling mode */
6323         napi_complete(napi);
6324         igb_ring_irq_enable(q_vector);
6325
6326         return 0;
6327 }
6328
6329 /**
6330  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6331  *  @q_vector: pointer to q_vector containing needed info
6332  *
6333  *  returns true if ring is completely cleaned
6334  **/
6335 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6336 {
6337         struct igb_adapter *adapter = q_vector->adapter;
6338         struct igb_ring *tx_ring = q_vector->tx.ring;
6339         struct igb_tx_buffer *tx_buffer;
6340         union e1000_adv_tx_desc *tx_desc;
6341         unsigned int total_bytes = 0, total_packets = 0;
6342         unsigned int budget = q_vector->tx.work_limit;
6343         unsigned int i = tx_ring->next_to_clean;
6344
6345         if (test_bit(__IGB_DOWN, &adapter->state))
6346                 return true;
6347
6348         tx_buffer = &tx_ring->tx_buffer_info[i];
6349         tx_desc = IGB_TX_DESC(tx_ring, i);
6350         i -= tx_ring->count;
6351
6352         do {
6353                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6354
6355                 /* if next_to_watch is not set then there is no work pending */
6356                 if (!eop_desc)
6357                         break;
6358
6359                 /* prevent any other reads prior to eop_desc */
6360                 read_barrier_depends();
6361
6362                 /* if DD is not set pending work has not been completed */
6363                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6364                         break;
6365
6366                 /* clear next_to_watch to prevent false hangs */
6367                 tx_buffer->next_to_watch = NULL;
6368
6369                 /* update the statistics for this packet */
6370                 total_bytes += tx_buffer->bytecount;
6371                 total_packets += tx_buffer->gso_segs;
6372
6373                 /* free the skb */
6374                 dev_consume_skb_any(tx_buffer->skb);
6375
6376                 /* unmap skb header data */
6377                 dma_unmap_single(tx_ring->dev,
6378                                  dma_unmap_addr(tx_buffer, dma),
6379                                  dma_unmap_len(tx_buffer, len),
6380                                  DMA_TO_DEVICE);
6381
6382                 /* clear tx_buffer data */
6383                 tx_buffer->skb = NULL;
6384                 dma_unmap_len_set(tx_buffer, len, 0);
6385
6386                 /* clear last DMA location and unmap remaining buffers */
6387                 while (tx_desc != eop_desc) {
6388                         tx_buffer++;
6389                         tx_desc++;
6390                         i++;
6391                         if (unlikely(!i)) {
6392                                 i -= tx_ring->count;
6393                                 tx_buffer = tx_ring->tx_buffer_info;
6394                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6395                         }
6396
6397                         /* unmap any remaining paged data */
6398                         if (dma_unmap_len(tx_buffer, len)) {
6399                                 dma_unmap_page(tx_ring->dev,
6400                                                dma_unmap_addr(tx_buffer, dma),
6401                                                dma_unmap_len(tx_buffer, len),
6402                                                DMA_TO_DEVICE);
6403                                 dma_unmap_len_set(tx_buffer, len, 0);
6404                         }
6405                 }
6406
6407                 /* move us one more past the eop_desc for start of next pkt */
6408                 tx_buffer++;
6409                 tx_desc++;
6410                 i++;
6411                 if (unlikely(!i)) {
6412                         i -= tx_ring->count;
6413                         tx_buffer = tx_ring->tx_buffer_info;
6414                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6415                 }
6416
6417                 /* issue prefetch for next Tx descriptor */
6418                 prefetch(tx_desc);
6419
6420                 /* update budget accounting */
6421                 budget--;
6422         } while (likely(budget));
6423
6424         netdev_tx_completed_queue(txring_txq(tx_ring),
6425                                   total_packets, total_bytes);
6426         i += tx_ring->count;
6427         tx_ring->next_to_clean = i;
6428         u64_stats_update_begin(&tx_ring->tx_syncp);
6429         tx_ring->tx_stats.bytes += total_bytes;
6430         tx_ring->tx_stats.packets += total_packets;
6431         u64_stats_update_end(&tx_ring->tx_syncp);
6432         q_vector->tx.total_bytes += total_bytes;
6433         q_vector->tx.total_packets += total_packets;
6434
6435         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6436                 struct e1000_hw *hw = &adapter->hw;
6437
6438                 /* Detect a transmit hang in hardware, this serializes the
6439                  * check with the clearing of time_stamp and movement of i
6440                  */
6441                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6442                 if (tx_buffer->next_to_watch &&
6443                     time_after(jiffies, tx_buffer->time_stamp +
6444                                (adapter->tx_timeout_factor * HZ)) &&
6445                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6446
6447                         /* detected Tx unit hang */
6448                         dev_err(tx_ring->dev,
6449                                 "Detected Tx Unit Hang\n"
6450                                 "  Tx Queue             <%d>\n"
6451                                 "  TDH                  <%x>\n"
6452                                 "  TDT                  <%x>\n"
6453                                 "  next_to_use          <%x>\n"
6454                                 "  next_to_clean        <%x>\n"
6455                                 "buffer_info[next_to_clean]\n"
6456                                 "  time_stamp           <%lx>\n"
6457                                 "  next_to_watch        <%p>\n"
6458                                 "  jiffies              <%lx>\n"
6459                                 "  desc.status          <%x>\n",
6460                                 tx_ring->queue_index,
6461                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6462                                 readl(tx_ring->tail),
6463                                 tx_ring->next_to_use,
6464                                 tx_ring->next_to_clean,
6465                                 tx_buffer->time_stamp,
6466                                 tx_buffer->next_to_watch,
6467                                 jiffies,
6468                                 tx_buffer->next_to_watch->wb.status);
6469                         netif_stop_subqueue(tx_ring->netdev,
6470                                             tx_ring->queue_index);
6471
6472                         /* we are about to reset, no point in enabling stuff */
6473                         return true;
6474                 }
6475         }
6476
6477 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6478         if (unlikely(total_packets &&
6479             netif_carrier_ok(tx_ring->netdev) &&
6480             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6481                 /* Make sure that anybody stopping the queue after this
6482                  * sees the new next_to_clean.
6483                  */
6484                 smp_mb();
6485                 if (__netif_subqueue_stopped(tx_ring->netdev,
6486                                              tx_ring->queue_index) &&
6487                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6488                         netif_wake_subqueue(tx_ring->netdev,
6489                                             tx_ring->queue_index);
6490
6491                         u64_stats_update_begin(&tx_ring->tx_syncp);
6492                         tx_ring->tx_stats.restart_queue++;
6493                         u64_stats_update_end(&tx_ring->tx_syncp);
6494                 }
6495         }
6496
6497         return !!budget;
6498 }
6499
6500 /**
6501  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6502  *  @rx_ring: rx descriptor ring to store buffers on
6503  *  @old_buff: donor buffer to have page reused
6504  *
6505  *  Synchronizes page for reuse by the adapter
6506  **/
6507 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6508                               struct igb_rx_buffer *old_buff)
6509 {
6510         struct igb_rx_buffer *new_buff;
6511         u16 nta = rx_ring->next_to_alloc;
6512
6513         new_buff = &rx_ring->rx_buffer_info[nta];
6514
6515         /* update, and store next to alloc */
6516         nta++;
6517         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6518
6519         /* transfer page from old buffer to new buffer */
6520         *new_buff = *old_buff;
6521
6522         /* sync the buffer for use by the device */
6523         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6524                                          old_buff->page_offset,
6525                                          IGB_RX_BUFSZ,
6526                                          DMA_FROM_DEVICE);
6527 }
6528
6529 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6530                                   struct page *page,
6531                                   unsigned int truesize)
6532 {
6533         /* avoid re-using remote pages */
6534         if (unlikely(page_to_nid(page) != numa_node_id()))
6535                 return false;
6536
6537         if (unlikely(page->pfmemalloc))
6538                 return false;
6539
6540 #if (PAGE_SIZE < 8192)
6541         /* if we are only owner of page we can reuse it */
6542         if (unlikely(page_count(page) != 1))
6543                 return false;
6544
6545         /* flip page offset to other buffer */
6546         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6547
6548         /* Even if we own the page, we are not allowed to use atomic_set()
6549          * This would break get_page_unless_zero() users.
6550          */
6551         atomic_inc(&page->_count);
6552 #else
6553         /* move offset up to the next cache line */
6554         rx_buffer->page_offset += truesize;
6555
6556         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6557                 return false;
6558
6559         /* bump ref count on page before it is given to the stack */
6560         get_page(page);
6561 #endif
6562
6563         return true;
6564 }
6565
6566 /**
6567  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6568  *  @rx_ring: rx descriptor ring to transact packets on
6569  *  @rx_buffer: buffer containing page to add
6570  *  @rx_desc: descriptor containing length of buffer written by hardware
6571  *  @skb: sk_buff to place the data into
6572  *
6573  *  This function will add the data contained in rx_buffer->page to the skb.
6574  *  This is done either through a direct copy if the data in the buffer is
6575  *  less than the skb header size, otherwise it will just attach the page as
6576  *  a frag to the skb.
6577  *
6578  *  The function will then update the page offset if necessary and return
6579  *  true if the buffer can be reused by the adapter.
6580  **/
6581 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6582                             struct igb_rx_buffer *rx_buffer,
6583                             union e1000_adv_rx_desc *rx_desc,
6584                             struct sk_buff *skb)
6585 {
6586         struct page *page = rx_buffer->page;
6587         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6588 #if (PAGE_SIZE < 8192)
6589         unsigned int truesize = IGB_RX_BUFSZ;
6590 #else
6591         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6592 #endif
6593
6594         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6595                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6596
6597                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6598                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6599                         va += IGB_TS_HDR_LEN;
6600                         size -= IGB_TS_HDR_LEN;
6601                 }
6602
6603                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6604
6605                 /* we can reuse buffer as-is, just make sure it is local */
6606                 if (likely((page_to_nid(page) == numa_node_id()) &&
6607                            !page->pfmemalloc))
6608                         return true;
6609
6610                 /* this page cannot be reused so discard it */
6611                 put_page(page);
6612                 return false;
6613         }
6614
6615         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6616                         rx_buffer->page_offset, size, truesize);
6617
6618         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6619 }
6620
6621 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6622                                            union e1000_adv_rx_desc *rx_desc,
6623                                            struct sk_buff *skb)
6624 {
6625         struct igb_rx_buffer *rx_buffer;
6626         struct page *page;
6627
6628         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6629
6630         page = rx_buffer->page;
6631         prefetchw(page);
6632
6633         if (likely(!skb)) {
6634                 void *page_addr = page_address(page) +
6635                                   rx_buffer->page_offset;
6636
6637                 /* prefetch first cache line of first page */
6638                 prefetch(page_addr);
6639 #if L1_CACHE_BYTES < 128
6640                 prefetch(page_addr + L1_CACHE_BYTES);
6641 #endif
6642
6643                 /* allocate a skb to store the frags */
6644                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6645                                                 IGB_RX_HDR_LEN);
6646                 if (unlikely(!skb)) {
6647                         rx_ring->rx_stats.alloc_failed++;
6648                         return NULL;
6649                 }
6650
6651                 /* we will be copying header into skb->data in
6652                  * pskb_may_pull so it is in our interest to prefetch
6653                  * it now to avoid a possible cache miss
6654                  */
6655                 prefetchw(skb->data);
6656         }
6657
6658         /* we are reusing so sync this buffer for CPU use */
6659         dma_sync_single_range_for_cpu(rx_ring->dev,
6660                                       rx_buffer->dma,
6661                                       rx_buffer->page_offset,
6662                                       IGB_RX_BUFSZ,
6663                                       DMA_FROM_DEVICE);
6664
6665         /* pull page into skb */
6666         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6667                 /* hand second half of page back to the ring */
6668                 igb_reuse_rx_page(rx_ring, rx_buffer);
6669         } else {
6670                 /* we are not reusing the buffer so unmap it */
6671                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6672                                PAGE_SIZE, DMA_FROM_DEVICE);
6673         }
6674
6675         /* clear contents of rx_buffer */
6676         rx_buffer->page = NULL;
6677
6678         return skb;
6679 }
6680
6681 static inline void igb_rx_checksum(struct igb_ring *ring,
6682                                    union e1000_adv_rx_desc *rx_desc,
6683                                    struct sk_buff *skb)
6684 {
6685         skb_checksum_none_assert(skb);
6686
6687         /* Ignore Checksum bit is set */
6688         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6689                 return;
6690
6691         /* Rx checksum disabled via ethtool */
6692         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6693                 return;
6694
6695         /* TCP/UDP checksum error bit is set */
6696         if (igb_test_staterr(rx_desc,
6697                              E1000_RXDEXT_STATERR_TCPE |
6698                              E1000_RXDEXT_STATERR_IPE)) {
6699                 /* work around errata with sctp packets where the TCPE aka
6700                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6701                  * packets, (aka let the stack check the crc32c)
6702                  */
6703                 if (!((skb->len == 60) &&
6704                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6705                         u64_stats_update_begin(&ring->rx_syncp);
6706                         ring->rx_stats.csum_err++;
6707                         u64_stats_update_end(&ring->rx_syncp);
6708                 }
6709                 /* let the stack verify checksum errors */
6710                 return;
6711         }
6712         /* It must be a TCP or UDP packet with a valid checksum */
6713         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6714                                       E1000_RXD_STAT_UDPCS))
6715                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6716
6717         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6718                 le32_to_cpu(rx_desc->wb.upper.status_error));
6719 }
6720
6721 static inline void igb_rx_hash(struct igb_ring *ring,
6722                                union e1000_adv_rx_desc *rx_desc,
6723                                struct sk_buff *skb)
6724 {
6725         if (ring->netdev->features & NETIF_F_RXHASH)
6726                 skb_set_hash(skb,
6727                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
6728                              PKT_HASH_TYPE_L3);
6729 }
6730
6731 /**
6732  *  igb_is_non_eop - process handling of non-EOP buffers
6733  *  @rx_ring: Rx ring being processed
6734  *  @rx_desc: Rx descriptor for current buffer
6735  *  @skb: current socket buffer containing buffer in progress
6736  *
6737  *  This function updates next to clean.  If the buffer is an EOP buffer
6738  *  this function exits returning false, otherwise it will place the
6739  *  sk_buff in the next buffer to be chained and return true indicating
6740  *  that this is in fact a non-EOP buffer.
6741  **/
6742 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6743                            union e1000_adv_rx_desc *rx_desc)
6744 {
6745         u32 ntc = rx_ring->next_to_clean + 1;
6746
6747         /* fetch, update, and store next to clean */
6748         ntc = (ntc < rx_ring->count) ? ntc : 0;
6749         rx_ring->next_to_clean = ntc;
6750
6751         prefetch(IGB_RX_DESC(rx_ring, ntc));
6752
6753         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6754                 return false;
6755
6756         return true;
6757 }
6758
6759 /**
6760  *  igb_pull_tail - igb specific version of skb_pull_tail
6761  *  @rx_ring: rx descriptor ring packet is being transacted on
6762  *  @rx_desc: pointer to the EOP Rx descriptor
6763  *  @skb: pointer to current skb being adjusted
6764  *
6765  *  This function is an igb specific version of __pskb_pull_tail.  The
6766  *  main difference between this version and the original function is that
6767  *  this function can make several assumptions about the state of things
6768  *  that allow for significant optimizations versus the standard function.
6769  *  As a result we can do things like drop a frag and maintain an accurate
6770  *  truesize for the skb.
6771  */
6772 static void igb_pull_tail(struct igb_ring *rx_ring,
6773                           union e1000_adv_rx_desc *rx_desc,
6774                           struct sk_buff *skb)
6775 {
6776         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6777         unsigned char *va;
6778         unsigned int pull_len;
6779
6780         /* it is valid to use page_address instead of kmap since we are
6781          * working with pages allocated out of the lomem pool per
6782          * alloc_page(GFP_ATOMIC)
6783          */
6784         va = skb_frag_address(frag);
6785
6786         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6787                 /* retrieve timestamp from buffer */
6788                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6789
6790                 /* update pointers to remove timestamp header */
6791                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6792                 frag->page_offset += IGB_TS_HDR_LEN;
6793                 skb->data_len -= IGB_TS_HDR_LEN;
6794                 skb->len -= IGB_TS_HDR_LEN;
6795
6796                 /* move va to start of packet data */
6797                 va += IGB_TS_HDR_LEN;
6798         }
6799
6800         /* we need the header to contain the greater of either ETH_HLEN or
6801          * 60 bytes if the skb->len is less than 60 for skb_pad.
6802          */
6803         pull_len = eth_get_headlen(va, IGB_RX_HDR_LEN);
6804
6805         /* align pull length to size of long to optimize memcpy performance */
6806         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6807
6808         /* update all of the pointers */
6809         skb_frag_size_sub(frag, pull_len);
6810         frag->page_offset += pull_len;
6811         skb->data_len -= pull_len;
6812         skb->tail += pull_len;
6813 }
6814
6815 /**
6816  *  igb_cleanup_headers - Correct corrupted or empty headers
6817  *  @rx_ring: rx descriptor ring packet is being transacted on
6818  *  @rx_desc: pointer to the EOP Rx descriptor
6819  *  @skb: pointer to current skb being fixed
6820  *
6821  *  Address the case where we are pulling data in on pages only
6822  *  and as such no data is present in the skb header.
6823  *
6824  *  In addition if skb is not at least 60 bytes we need to pad it so that
6825  *  it is large enough to qualify as a valid Ethernet frame.
6826  *
6827  *  Returns true if an error was encountered and skb was freed.
6828  **/
6829 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6830                                 union e1000_adv_rx_desc *rx_desc,
6831                                 struct sk_buff *skb)
6832 {
6833         if (unlikely((igb_test_staterr(rx_desc,
6834                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6835                 struct net_device *netdev = rx_ring->netdev;
6836                 if (!(netdev->features & NETIF_F_RXALL)) {
6837                         dev_kfree_skb_any(skb);
6838                         return true;
6839                 }
6840         }
6841
6842         /* place header in linear portion of buffer */
6843         if (skb_is_nonlinear(skb))
6844                 igb_pull_tail(rx_ring, rx_desc, skb);
6845
6846         /* if skb_pad returns an error the skb was freed */
6847         if (unlikely(skb->len < 60)) {
6848                 int pad_len = 60 - skb->len;
6849
6850                 if (skb_pad(skb, pad_len))
6851                         return true;
6852                 __skb_put(skb, pad_len);
6853         }
6854
6855         return false;
6856 }
6857
6858 /**
6859  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6860  *  @rx_ring: rx descriptor ring packet is being transacted on
6861  *  @rx_desc: pointer to the EOP Rx descriptor
6862  *  @skb: pointer to current skb being populated
6863  *
6864  *  This function checks the ring, descriptor, and packet information in
6865  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6866  *  other fields within the skb.
6867  **/
6868 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6869                                    union e1000_adv_rx_desc *rx_desc,
6870                                    struct sk_buff *skb)
6871 {
6872         struct net_device *dev = rx_ring->netdev;
6873
6874         igb_rx_hash(rx_ring, rx_desc, skb);
6875
6876         igb_rx_checksum(rx_ring, rx_desc, skb);
6877
6878         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
6879             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
6880                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
6881
6882         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6883             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6884                 u16 vid;
6885
6886                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6887                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6888                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6889                 else
6890                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6891
6892                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6893         }
6894
6895         skb_record_rx_queue(skb, rx_ring->queue_index);
6896
6897         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6898 }
6899
6900 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6901 {
6902         struct igb_ring *rx_ring = q_vector->rx.ring;
6903         struct sk_buff *skb = rx_ring->skb;
6904         unsigned int total_bytes = 0, total_packets = 0;
6905         u16 cleaned_count = igb_desc_unused(rx_ring);
6906
6907         while (likely(total_packets < budget)) {
6908                 union e1000_adv_rx_desc *rx_desc;
6909
6910                 /* return some buffers to hardware, one at a time is too slow */
6911                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6912                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6913                         cleaned_count = 0;
6914                 }
6915
6916                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6917
6918                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6919                         break;
6920
6921                 /* This memory barrier is needed to keep us from reading
6922                  * any other fields out of the rx_desc until we know the
6923                  * RXD_STAT_DD bit is set
6924                  */
6925                 rmb();
6926
6927                 /* retrieve a buffer from the ring */
6928                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6929
6930                 /* exit if we failed to retrieve a buffer */
6931                 if (!skb)
6932                         break;
6933
6934                 cleaned_count++;
6935
6936                 /* fetch next buffer in frame if non-eop */
6937                 if (igb_is_non_eop(rx_ring, rx_desc))
6938                         continue;
6939
6940                 /* verify the packet layout is correct */
6941                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6942                         skb = NULL;
6943                         continue;
6944                 }
6945
6946                 /* probably a little skewed due to removing CRC */
6947                 total_bytes += skb->len;
6948
6949                 /* populate checksum, timestamp, VLAN, and protocol */
6950                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6951
6952                 napi_gro_receive(&q_vector->napi, skb);
6953
6954                 /* reset skb pointer */
6955                 skb = NULL;
6956
6957                 /* update budget accounting */
6958                 total_packets++;
6959         }
6960
6961         /* place incomplete frames back on ring for completion */
6962         rx_ring->skb = skb;
6963
6964         u64_stats_update_begin(&rx_ring->rx_syncp);
6965         rx_ring->rx_stats.packets += total_packets;
6966         rx_ring->rx_stats.bytes += total_bytes;
6967         u64_stats_update_end(&rx_ring->rx_syncp);
6968         q_vector->rx.total_packets += total_packets;
6969         q_vector->rx.total_bytes += total_bytes;
6970
6971         if (cleaned_count)
6972                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6973
6974         return total_packets < budget;
6975 }
6976
6977 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6978                                   struct igb_rx_buffer *bi)
6979 {
6980         struct page *page = bi->page;
6981         dma_addr_t dma;
6982
6983         /* since we are recycling buffers we should seldom need to alloc */
6984         if (likely(page))
6985                 return true;
6986
6987         /* alloc new page for storage */
6988         page = dev_alloc_page();
6989         if (unlikely(!page)) {
6990                 rx_ring->rx_stats.alloc_failed++;
6991                 return false;
6992         }
6993
6994         /* map page for use */
6995         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6996
6997         /* if mapping failed free memory back to system since
6998          * there isn't much point in holding memory we can't use
6999          */
7000         if (dma_mapping_error(rx_ring->dev, dma)) {
7001                 __free_page(page);
7002
7003                 rx_ring->rx_stats.alloc_failed++;
7004                 return false;
7005         }
7006
7007         bi->dma = dma;
7008         bi->page = page;
7009         bi->page_offset = 0;
7010
7011         return true;
7012 }
7013
7014 /**
7015  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7016  *  @adapter: address of board private structure
7017  **/
7018 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7019 {
7020         union e1000_adv_rx_desc *rx_desc;
7021         struct igb_rx_buffer *bi;
7022         u16 i = rx_ring->next_to_use;
7023
7024         /* nothing to do */
7025         if (!cleaned_count)
7026                 return;
7027
7028         rx_desc = IGB_RX_DESC(rx_ring, i);
7029         bi = &rx_ring->rx_buffer_info[i];
7030         i -= rx_ring->count;
7031
7032         do {
7033                 if (!igb_alloc_mapped_page(rx_ring, bi))
7034                         break;
7035
7036                 /* Refresh the desc even if buffer_addrs didn't change
7037                  * because each write-back erases this info.
7038                  */
7039                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7040
7041                 rx_desc++;
7042                 bi++;
7043                 i++;
7044                 if (unlikely(!i)) {
7045                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7046                         bi = rx_ring->rx_buffer_info;
7047                         i -= rx_ring->count;
7048                 }
7049
7050                 /* clear the hdr_addr for the next_to_use descriptor */
7051                 rx_desc->read.hdr_addr = 0;
7052
7053                 cleaned_count--;
7054         } while (cleaned_count);
7055
7056         i += rx_ring->count;
7057
7058         if (rx_ring->next_to_use != i) {
7059                 /* record the next descriptor to use */
7060                 rx_ring->next_to_use = i;
7061
7062                 /* update next to alloc since we have filled the ring */
7063                 rx_ring->next_to_alloc = i;
7064
7065                 /* Force memory writes to complete before letting h/w
7066                  * know there are new descriptors to fetch.  (Only
7067                  * applicable for weak-ordered memory model archs,
7068                  * such as IA-64).
7069                  */
7070                 wmb();
7071                 writel(i, rx_ring->tail);
7072         }
7073 }
7074
7075 /**
7076  * igb_mii_ioctl -
7077  * @netdev:
7078  * @ifreq:
7079  * @cmd:
7080  **/
7081 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7082 {
7083         struct igb_adapter *adapter = netdev_priv(netdev);
7084         struct mii_ioctl_data *data = if_mii(ifr);
7085
7086         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7087                 return -EOPNOTSUPP;
7088
7089         switch (cmd) {
7090         case SIOCGMIIPHY:
7091                 data->phy_id = adapter->hw.phy.addr;
7092                 break;
7093         case SIOCGMIIREG:
7094                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7095                                      &data->val_out))
7096                         return -EIO;
7097                 break;
7098         case SIOCSMIIREG:
7099         default:
7100                 return -EOPNOTSUPP;
7101         }
7102         return 0;
7103 }
7104
7105 /**
7106  * igb_ioctl -
7107  * @netdev:
7108  * @ifreq:
7109  * @cmd:
7110  **/
7111 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7112 {
7113         switch (cmd) {
7114         case SIOCGMIIPHY:
7115         case SIOCGMIIREG:
7116         case SIOCSMIIREG:
7117                 return igb_mii_ioctl(netdev, ifr, cmd);
7118         case SIOCGHWTSTAMP:
7119                 return igb_ptp_get_ts_config(netdev, ifr);
7120         case SIOCSHWTSTAMP:
7121                 return igb_ptp_set_ts_config(netdev, ifr);
7122         default:
7123                 return -EOPNOTSUPP;
7124         }
7125 }
7126
7127 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7128 {
7129         struct igb_adapter *adapter = hw->back;
7130
7131         pci_read_config_word(adapter->pdev, reg, value);
7132 }
7133
7134 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
7135 {
7136         struct igb_adapter *adapter = hw->back;
7137
7138         pci_write_config_word(adapter->pdev, reg, *value);
7139 }
7140
7141 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7142 {
7143         struct igb_adapter *adapter = hw->back;
7144
7145         if (pcie_capability_read_word(adapter->pdev, reg, value))
7146                 return -E1000_ERR_CONFIG;
7147
7148         return 0;
7149 }
7150
7151 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7152 {
7153         struct igb_adapter *adapter = hw->back;
7154
7155         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7156                 return -E1000_ERR_CONFIG;
7157
7158         return 0;
7159 }
7160
7161 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7162 {
7163         struct igb_adapter *adapter = netdev_priv(netdev);
7164         struct e1000_hw *hw = &adapter->hw;
7165         u32 ctrl, rctl;
7166         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7167
7168         if (enable) {
7169                 /* enable VLAN tag insert/strip */
7170                 ctrl = rd32(E1000_CTRL);
7171                 ctrl |= E1000_CTRL_VME;
7172                 wr32(E1000_CTRL, ctrl);
7173
7174                 /* Disable CFI check */
7175                 rctl = rd32(E1000_RCTL);
7176                 rctl &= ~E1000_RCTL_CFIEN;
7177                 wr32(E1000_RCTL, rctl);
7178         } else {
7179                 /* disable VLAN tag insert/strip */
7180                 ctrl = rd32(E1000_CTRL);
7181                 ctrl &= ~E1000_CTRL_VME;
7182                 wr32(E1000_CTRL, ctrl);
7183         }
7184
7185         igb_rlpml_set(adapter);
7186 }
7187
7188 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7189                                __be16 proto, u16 vid)
7190 {
7191         struct igb_adapter *adapter = netdev_priv(netdev);
7192         struct e1000_hw *hw = &adapter->hw;
7193         int pf_id = adapter->vfs_allocated_count;
7194
7195         /* attempt to add filter to vlvf array */
7196         igb_vlvf_set(adapter, vid, true, pf_id);
7197
7198         /* add the filter since PF can receive vlans w/o entry in vlvf */
7199         igb_vfta_set(hw, vid, true);
7200
7201         set_bit(vid, adapter->active_vlans);
7202
7203         return 0;
7204 }
7205
7206 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7207                                 __be16 proto, u16 vid)
7208 {
7209         struct igb_adapter *adapter = netdev_priv(netdev);
7210         struct e1000_hw *hw = &adapter->hw;
7211         int pf_id = adapter->vfs_allocated_count;
7212         s32 err;
7213
7214         /* remove vlan from VLVF table array */
7215         err = igb_vlvf_set(adapter, vid, false, pf_id);
7216
7217         /* if vid was not present in VLVF just remove it from table */
7218         if (err)
7219                 igb_vfta_set(hw, vid, false);
7220
7221         clear_bit(vid, adapter->active_vlans);
7222
7223         return 0;
7224 }
7225
7226 static void igb_restore_vlan(struct igb_adapter *adapter)
7227 {
7228         u16 vid;
7229
7230         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7231
7232         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7233                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7234 }
7235
7236 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7237 {
7238         struct pci_dev *pdev = adapter->pdev;
7239         struct e1000_mac_info *mac = &adapter->hw.mac;
7240
7241         mac->autoneg = 0;
7242
7243         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7244          * for the switch() below to work
7245          */
7246         if ((spd & 1) || (dplx & ~1))
7247                 goto err_inval;
7248
7249         /* Fiber NIC's only allow 1000 gbps Full duplex
7250          * and 100Mbps Full duplex for 100baseFx sfp
7251          */
7252         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7253                 switch (spd + dplx) {
7254                 case SPEED_10 + DUPLEX_HALF:
7255                 case SPEED_10 + DUPLEX_FULL:
7256                 case SPEED_100 + DUPLEX_HALF:
7257                         goto err_inval;
7258                 default:
7259                         break;
7260                 }
7261         }
7262
7263         switch (spd + dplx) {
7264         case SPEED_10 + DUPLEX_HALF:
7265                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7266                 break;
7267         case SPEED_10 + DUPLEX_FULL:
7268                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7269                 break;
7270         case SPEED_100 + DUPLEX_HALF:
7271                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7272                 break;
7273         case SPEED_100 + DUPLEX_FULL:
7274                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7275                 break;
7276         case SPEED_1000 + DUPLEX_FULL:
7277                 mac->autoneg = 1;
7278                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7279                 break;
7280         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7281         default:
7282                 goto err_inval;
7283         }
7284
7285         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7286         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7287
7288         return 0;
7289
7290 err_inval:
7291         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7292         return -EINVAL;
7293 }
7294
7295 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7296                           bool runtime)
7297 {
7298         struct net_device *netdev = pci_get_drvdata(pdev);
7299         struct igb_adapter *adapter = netdev_priv(netdev);
7300         struct e1000_hw *hw = &adapter->hw;
7301         u32 ctrl, rctl, status;
7302         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7303 #ifdef CONFIG_PM
7304         int retval = 0;
7305 #endif
7306
7307         netif_device_detach(netdev);
7308
7309         if (netif_running(netdev))
7310                 __igb_close(netdev, true);
7311
7312         igb_clear_interrupt_scheme(adapter);
7313
7314 #ifdef CONFIG_PM
7315         retval = pci_save_state(pdev);
7316         if (retval)
7317                 return retval;
7318 #endif
7319
7320         status = rd32(E1000_STATUS);
7321         if (status & E1000_STATUS_LU)
7322                 wufc &= ~E1000_WUFC_LNKC;
7323
7324         if (wufc) {
7325                 igb_setup_rctl(adapter);
7326                 igb_set_rx_mode(netdev);
7327
7328                 /* turn on all-multi mode if wake on multicast is enabled */
7329                 if (wufc & E1000_WUFC_MC) {
7330                         rctl = rd32(E1000_RCTL);
7331                         rctl |= E1000_RCTL_MPE;
7332                         wr32(E1000_RCTL, rctl);
7333                 }
7334
7335                 ctrl = rd32(E1000_CTRL);
7336                 /* advertise wake from D3Cold */
7337                 #define E1000_CTRL_ADVD3WUC 0x00100000
7338                 /* phy power management enable */
7339                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7340                 ctrl |= E1000_CTRL_ADVD3WUC;
7341                 wr32(E1000_CTRL, ctrl);
7342
7343                 /* Allow time for pending master requests to run */
7344                 igb_disable_pcie_master(hw);
7345
7346                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7347                 wr32(E1000_WUFC, wufc);
7348         } else {
7349                 wr32(E1000_WUC, 0);
7350                 wr32(E1000_WUFC, 0);
7351         }
7352
7353         *enable_wake = wufc || adapter->en_mng_pt;
7354         if (!*enable_wake)
7355                 igb_power_down_link(adapter);
7356         else
7357                 igb_power_up_link(adapter);
7358
7359         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7360          * would have already happened in close and is redundant.
7361          */
7362         igb_release_hw_control(adapter);
7363
7364         pci_disable_device(pdev);
7365
7366         return 0;
7367 }
7368
7369 #ifdef CONFIG_PM
7370 #ifdef CONFIG_PM_SLEEP
7371 static int igb_suspend(struct device *dev)
7372 {
7373         int retval;
7374         bool wake;
7375         struct pci_dev *pdev = to_pci_dev(dev);
7376
7377         retval = __igb_shutdown(pdev, &wake, 0);
7378         if (retval)
7379                 return retval;
7380
7381         if (wake) {
7382                 pci_prepare_to_sleep(pdev);
7383         } else {
7384                 pci_wake_from_d3(pdev, false);
7385                 pci_set_power_state(pdev, PCI_D3hot);
7386         }
7387
7388         return 0;
7389 }
7390 #endif /* CONFIG_PM_SLEEP */
7391
7392 static int igb_resume(struct device *dev)
7393 {
7394         struct pci_dev *pdev = to_pci_dev(dev);
7395         struct net_device *netdev = pci_get_drvdata(pdev);
7396         struct igb_adapter *adapter = netdev_priv(netdev);
7397         struct e1000_hw *hw = &adapter->hw;
7398         u32 err;
7399
7400         pci_set_power_state(pdev, PCI_D0);
7401         pci_restore_state(pdev);
7402         pci_save_state(pdev);
7403
7404         err = pci_enable_device_mem(pdev);
7405         if (err) {
7406                 dev_err(&pdev->dev,
7407                         "igb: Cannot enable PCI device from suspend\n");
7408                 return err;
7409         }
7410         pci_set_master(pdev);
7411
7412         pci_enable_wake(pdev, PCI_D3hot, 0);
7413         pci_enable_wake(pdev, PCI_D3cold, 0);
7414
7415         if (igb_init_interrupt_scheme(adapter, true)) {
7416                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7417                 return -ENOMEM;
7418         }
7419
7420         igb_reset(adapter);
7421
7422         /* let the f/w know that the h/w is now under the control of the
7423          * driver.
7424          */
7425         igb_get_hw_control(adapter);
7426
7427         wr32(E1000_WUS, ~0);
7428
7429         if (netdev->flags & IFF_UP) {
7430                 rtnl_lock();
7431                 err = __igb_open(netdev, true);
7432                 rtnl_unlock();
7433                 if (err)
7434                         return err;
7435         }
7436
7437         netif_device_attach(netdev);
7438         return 0;
7439 }
7440
7441 #ifdef CONFIG_PM_RUNTIME
7442 static int igb_runtime_idle(struct device *dev)
7443 {
7444         struct pci_dev *pdev = to_pci_dev(dev);
7445         struct net_device *netdev = pci_get_drvdata(pdev);
7446         struct igb_adapter *adapter = netdev_priv(netdev);
7447
7448         if (!igb_has_link(adapter))
7449                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7450
7451         return -EBUSY;
7452 }
7453
7454 static int igb_runtime_suspend(struct device *dev)
7455 {
7456         struct pci_dev *pdev = to_pci_dev(dev);
7457         int retval;
7458         bool wake;
7459
7460         retval = __igb_shutdown(pdev, &wake, 1);
7461         if (retval)
7462                 return retval;
7463
7464         if (wake) {
7465                 pci_prepare_to_sleep(pdev);
7466         } else {
7467                 pci_wake_from_d3(pdev, false);
7468                 pci_set_power_state(pdev, PCI_D3hot);
7469         }
7470
7471         return 0;
7472 }
7473
7474 static int igb_runtime_resume(struct device *dev)
7475 {
7476         return igb_resume(dev);
7477 }
7478 #endif /* CONFIG_PM_RUNTIME */
7479 #endif
7480
7481 static void igb_shutdown(struct pci_dev *pdev)
7482 {
7483         bool wake;
7484
7485         __igb_shutdown(pdev, &wake, 0);
7486
7487         if (system_state == SYSTEM_POWER_OFF) {
7488                 pci_wake_from_d3(pdev, wake);
7489                 pci_set_power_state(pdev, PCI_D3hot);
7490         }
7491 }
7492
7493 #ifdef CONFIG_PCI_IOV
7494 static int igb_sriov_reinit(struct pci_dev *dev)
7495 {
7496         struct net_device *netdev = pci_get_drvdata(dev);
7497         struct igb_adapter *adapter = netdev_priv(netdev);
7498         struct pci_dev *pdev = adapter->pdev;
7499
7500         rtnl_lock();
7501
7502         if (netif_running(netdev))
7503                 igb_close(netdev);
7504         else
7505                 igb_reset(adapter);
7506
7507         igb_clear_interrupt_scheme(adapter);
7508
7509         igb_init_queue_configuration(adapter);
7510
7511         if (igb_init_interrupt_scheme(adapter, true)) {
7512                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7513                 return -ENOMEM;
7514         }
7515
7516         if (netif_running(netdev))
7517                 igb_open(netdev);
7518
7519         rtnl_unlock();
7520
7521         return 0;
7522 }
7523
7524 static int igb_pci_disable_sriov(struct pci_dev *dev)
7525 {
7526         int err = igb_disable_sriov(dev);
7527
7528         if (!err)
7529                 err = igb_sriov_reinit(dev);
7530
7531         return err;
7532 }
7533
7534 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7535 {
7536         int err = igb_enable_sriov(dev, num_vfs);
7537
7538         if (err)
7539                 goto out;
7540
7541         err = igb_sriov_reinit(dev);
7542         if (!err)
7543                 return num_vfs;
7544
7545 out:
7546         return err;
7547 }
7548
7549 #endif
7550 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7551 {
7552 #ifdef CONFIG_PCI_IOV
7553         if (num_vfs == 0)
7554                 return igb_pci_disable_sriov(dev);
7555         else
7556                 return igb_pci_enable_sriov(dev, num_vfs);
7557 #endif
7558         return 0;
7559 }
7560
7561 #ifdef CONFIG_NET_POLL_CONTROLLER
7562 /* Polling 'interrupt' - used by things like netconsole to send skbs
7563  * without having to re-enable interrupts. It's not called while
7564  * the interrupt routine is executing.
7565  */
7566 static void igb_netpoll(struct net_device *netdev)
7567 {
7568         struct igb_adapter *adapter = netdev_priv(netdev);
7569         struct e1000_hw *hw = &adapter->hw;
7570         struct igb_q_vector *q_vector;
7571         int i;
7572
7573         for (i = 0; i < adapter->num_q_vectors; i++) {
7574                 q_vector = adapter->q_vector[i];
7575                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7576                         wr32(E1000_EIMC, q_vector->eims_value);
7577                 else
7578                         igb_irq_disable(adapter);
7579                 napi_schedule(&q_vector->napi);
7580         }
7581 }
7582 #endif /* CONFIG_NET_POLL_CONTROLLER */
7583
7584 /**
7585  *  igb_io_error_detected - called when PCI error is detected
7586  *  @pdev: Pointer to PCI device
7587  *  @state: The current pci connection state
7588  *
7589  *  This function is called after a PCI bus error affecting
7590  *  this device has been detected.
7591  **/
7592 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7593                                               pci_channel_state_t state)
7594 {
7595         struct net_device *netdev = pci_get_drvdata(pdev);
7596         struct igb_adapter *adapter = netdev_priv(netdev);
7597
7598         netif_device_detach(netdev);
7599
7600         if (state == pci_channel_io_perm_failure)
7601                 return PCI_ERS_RESULT_DISCONNECT;
7602
7603         if (netif_running(netdev))
7604                 igb_down(adapter);
7605         pci_disable_device(pdev);
7606
7607         /* Request a slot slot reset. */
7608         return PCI_ERS_RESULT_NEED_RESET;
7609 }
7610
7611 /**
7612  *  igb_io_slot_reset - called after the pci bus has been reset.
7613  *  @pdev: Pointer to PCI device
7614  *
7615  *  Restart the card from scratch, as if from a cold-boot. Implementation
7616  *  resembles the first-half of the igb_resume routine.
7617  **/
7618 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7619 {
7620         struct net_device *netdev = pci_get_drvdata(pdev);
7621         struct igb_adapter *adapter = netdev_priv(netdev);
7622         struct e1000_hw *hw = &adapter->hw;
7623         pci_ers_result_t result;
7624         int err;
7625
7626         if (pci_enable_device_mem(pdev)) {
7627                 dev_err(&pdev->dev,
7628                         "Cannot re-enable PCI device after reset.\n");
7629                 result = PCI_ERS_RESULT_DISCONNECT;
7630         } else {
7631                 pci_set_master(pdev);
7632                 pci_restore_state(pdev);
7633                 pci_save_state(pdev);
7634
7635                 pci_enable_wake(pdev, PCI_D3hot, 0);
7636                 pci_enable_wake(pdev, PCI_D3cold, 0);
7637
7638                 igb_reset(adapter);
7639                 wr32(E1000_WUS, ~0);
7640                 result = PCI_ERS_RESULT_RECOVERED;
7641         }
7642
7643         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7644         if (err) {
7645                 dev_err(&pdev->dev,
7646                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7647                         err);
7648                 /* non-fatal, continue */
7649         }
7650
7651         return result;
7652 }
7653
7654 /**
7655  *  igb_io_resume - called when traffic can start flowing again.
7656  *  @pdev: Pointer to PCI device
7657  *
7658  *  This callback is called when the error recovery driver tells us that
7659  *  its OK to resume normal operation. Implementation resembles the
7660  *  second-half of the igb_resume routine.
7661  */
7662 static void igb_io_resume(struct pci_dev *pdev)
7663 {
7664         struct net_device *netdev = pci_get_drvdata(pdev);
7665         struct igb_adapter *adapter = netdev_priv(netdev);
7666
7667         if (netif_running(netdev)) {
7668                 if (igb_up(adapter)) {
7669                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7670                         return;
7671                 }
7672         }
7673
7674         netif_device_attach(netdev);
7675
7676         /* let the f/w know that the h/w is now under the control of the
7677          * driver.
7678          */
7679         igb_get_hw_control(adapter);
7680 }
7681
7682 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7683                              u8 qsel)
7684 {
7685         u32 rar_low, rar_high;
7686         struct e1000_hw *hw = &adapter->hw;
7687
7688         /* HW expects these in little endian so we reverse the byte order
7689          * from network order (big endian) to little endian
7690          */
7691         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7692                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7693         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7694
7695         /* Indicate to hardware the Address is Valid. */
7696         rar_high |= E1000_RAH_AV;
7697
7698         if (hw->mac.type == e1000_82575)
7699                 rar_high |= E1000_RAH_POOL_1 * qsel;
7700         else
7701                 rar_high |= E1000_RAH_POOL_1 << qsel;
7702
7703         wr32(E1000_RAL(index), rar_low);
7704         wrfl();
7705         wr32(E1000_RAH(index), rar_high);
7706         wrfl();
7707 }
7708
7709 static int igb_set_vf_mac(struct igb_adapter *adapter,
7710                           int vf, unsigned char *mac_addr)
7711 {
7712         struct e1000_hw *hw = &adapter->hw;
7713         /* VF MAC addresses start at end of receive addresses and moves
7714          * towards the first, as a result a collision should not be possible
7715          */
7716         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7717
7718         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7719
7720         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7721
7722         return 0;
7723 }
7724
7725 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7726 {
7727         struct igb_adapter *adapter = netdev_priv(netdev);
7728         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7729                 return -EINVAL;
7730         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7731         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7732         dev_info(&adapter->pdev->dev,
7733                  "Reload the VF driver to make this change effective.");
7734         if (test_bit(__IGB_DOWN, &adapter->state)) {
7735                 dev_warn(&adapter->pdev->dev,
7736                          "The VF MAC address has been set, but the PF device is not up.\n");
7737                 dev_warn(&adapter->pdev->dev,
7738                          "Bring the PF device up before attempting to use the VF device.\n");
7739         }
7740         return igb_set_vf_mac(adapter, vf, mac);
7741 }
7742
7743 static int igb_link_mbps(int internal_link_speed)
7744 {
7745         switch (internal_link_speed) {
7746         case SPEED_100:
7747                 return 100;
7748         case SPEED_1000:
7749                 return 1000;
7750         default:
7751                 return 0;
7752         }
7753 }
7754
7755 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7756                                   int link_speed)
7757 {
7758         int rf_dec, rf_int;
7759         u32 bcnrc_val;
7760
7761         if (tx_rate != 0) {
7762                 /* Calculate the rate factor values to set */
7763                 rf_int = link_speed / tx_rate;
7764                 rf_dec = (link_speed - (rf_int * tx_rate));
7765                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7766                          tx_rate;
7767
7768                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7769                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7770                               E1000_RTTBCNRC_RF_INT_MASK);
7771                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7772         } else {
7773                 bcnrc_val = 0;
7774         }
7775
7776         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7777         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7778          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7779          */
7780         wr32(E1000_RTTBCNRM, 0x14);
7781         wr32(E1000_RTTBCNRC, bcnrc_val);
7782 }
7783
7784 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7785 {
7786         int actual_link_speed, i;
7787         bool reset_rate = false;
7788
7789         /* VF TX rate limit was not set or not supported */
7790         if ((adapter->vf_rate_link_speed == 0) ||
7791             (adapter->hw.mac.type != e1000_82576))
7792                 return;
7793
7794         actual_link_speed = igb_link_mbps(adapter->link_speed);
7795         if (actual_link_speed != adapter->vf_rate_link_speed) {
7796                 reset_rate = true;
7797                 adapter->vf_rate_link_speed = 0;
7798                 dev_info(&adapter->pdev->dev,
7799                          "Link speed has been changed. VF Transmit rate is disabled\n");
7800         }
7801
7802         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7803                 if (reset_rate)
7804                         adapter->vf_data[i].tx_rate = 0;
7805
7806                 igb_set_vf_rate_limit(&adapter->hw, i,
7807                                       adapter->vf_data[i].tx_rate,
7808                                       actual_link_speed);
7809         }
7810 }
7811
7812 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
7813                              int min_tx_rate, int max_tx_rate)
7814 {
7815         struct igb_adapter *adapter = netdev_priv(netdev);
7816         struct e1000_hw *hw = &adapter->hw;
7817         int actual_link_speed;
7818
7819         if (hw->mac.type != e1000_82576)
7820                 return -EOPNOTSUPP;
7821
7822         if (min_tx_rate)
7823                 return -EINVAL;
7824
7825         actual_link_speed = igb_link_mbps(adapter->link_speed);
7826         if ((vf >= adapter->vfs_allocated_count) ||
7827             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7828             (max_tx_rate < 0) ||
7829             (max_tx_rate > actual_link_speed))
7830                 return -EINVAL;
7831
7832         adapter->vf_rate_link_speed = actual_link_speed;
7833         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
7834         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
7835
7836         return 0;
7837 }
7838
7839 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7840                                    bool setting)
7841 {
7842         struct igb_adapter *adapter = netdev_priv(netdev);
7843         struct e1000_hw *hw = &adapter->hw;
7844         u32 reg_val, reg_offset;
7845
7846         if (!adapter->vfs_allocated_count)
7847                 return -EOPNOTSUPP;
7848
7849         if (vf >= adapter->vfs_allocated_count)
7850                 return -EINVAL;
7851
7852         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7853         reg_val = rd32(reg_offset);
7854         if (setting)
7855                 reg_val |= ((1 << vf) |
7856                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7857         else
7858                 reg_val &= ~((1 << vf) |
7859                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7860         wr32(reg_offset, reg_val);
7861
7862         adapter->vf_data[vf].spoofchk_enabled = setting;
7863         return 0;
7864 }
7865
7866 static int igb_ndo_get_vf_config(struct net_device *netdev,
7867                                  int vf, struct ifla_vf_info *ivi)
7868 {
7869         struct igb_adapter *adapter = netdev_priv(netdev);
7870         if (vf >= adapter->vfs_allocated_count)
7871                 return -EINVAL;
7872         ivi->vf = vf;
7873         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7874         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
7875         ivi->min_tx_rate = 0;
7876         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7877         ivi->qos = adapter->vf_data[vf].pf_qos;
7878         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7879         return 0;
7880 }
7881
7882 static void igb_vmm_control(struct igb_adapter *adapter)
7883 {
7884         struct e1000_hw *hw = &adapter->hw;
7885         u32 reg;
7886
7887         switch (hw->mac.type) {
7888         case e1000_82575:
7889         case e1000_i210:
7890         case e1000_i211:
7891         case e1000_i354:
7892         default:
7893                 /* replication is not supported for 82575 */
7894                 return;
7895         case e1000_82576:
7896                 /* notify HW that the MAC is adding vlan tags */
7897                 reg = rd32(E1000_DTXCTL);
7898                 reg |= E1000_DTXCTL_VLAN_ADDED;
7899                 wr32(E1000_DTXCTL, reg);
7900                 /* Fall through */
7901         case e1000_82580:
7902                 /* enable replication vlan tag stripping */
7903                 reg = rd32(E1000_RPLOLR);
7904                 reg |= E1000_RPLOLR_STRVLAN;
7905                 wr32(E1000_RPLOLR, reg);
7906                 /* Fall through */
7907         case e1000_i350:
7908                 /* none of the above registers are supported by i350 */
7909                 break;
7910         }
7911
7912         if (adapter->vfs_allocated_count) {
7913                 igb_vmdq_set_loopback_pf(hw, true);
7914                 igb_vmdq_set_replication_pf(hw, true);
7915                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7916                                               adapter->vfs_allocated_count);
7917         } else {
7918                 igb_vmdq_set_loopback_pf(hw, false);
7919                 igb_vmdq_set_replication_pf(hw, false);
7920         }
7921 }
7922
7923 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7924 {
7925         struct e1000_hw *hw = &adapter->hw;
7926         u32 dmac_thr;
7927         u16 hwm;
7928
7929         if (hw->mac.type > e1000_82580) {
7930                 if (adapter->flags & IGB_FLAG_DMAC) {
7931                         u32 reg;
7932
7933                         /* force threshold to 0. */
7934                         wr32(E1000_DMCTXTH, 0);
7935
7936                         /* DMA Coalescing high water mark needs to be greater
7937                          * than the Rx threshold. Set hwm to PBA - max frame
7938                          * size in 16B units, capping it at PBA - 6KB.
7939                          */
7940                         hwm = 64 * pba - adapter->max_frame_size / 16;
7941                         if (hwm < 64 * (pba - 6))
7942                                 hwm = 64 * (pba - 6);
7943                         reg = rd32(E1000_FCRTC);
7944                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7945                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7946                                 & E1000_FCRTC_RTH_COAL_MASK);
7947                         wr32(E1000_FCRTC, reg);
7948
7949                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7950                          * frame size, capping it at PBA - 10KB.
7951                          */
7952                         dmac_thr = pba - adapter->max_frame_size / 512;
7953                         if (dmac_thr < pba - 10)
7954                                 dmac_thr = pba - 10;
7955                         reg = rd32(E1000_DMACR);
7956                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7957                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7958                                 & E1000_DMACR_DMACTHR_MASK);
7959
7960                         /* transition to L0x or L1 if available..*/
7961                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7962
7963                         /* watchdog timer= +-1000 usec in 32usec intervals */
7964                         reg |= (1000 >> 5);
7965
7966                         /* Disable BMC-to-OS Watchdog Enable */
7967                         if (hw->mac.type != e1000_i354)
7968                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7969
7970                         wr32(E1000_DMACR, reg);
7971
7972                         /* no lower threshold to disable
7973                          * coalescing(smart fifb)-UTRESH=0
7974                          */
7975                         wr32(E1000_DMCRTRH, 0);
7976
7977                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7978
7979                         wr32(E1000_DMCTLX, reg);
7980
7981                         /* free space in tx packet buffer to wake from
7982                          * DMA coal
7983                          */
7984                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7985                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7986
7987                         /* make low power state decision controlled
7988                          * by DMA coal
7989                          */
7990                         reg = rd32(E1000_PCIEMISC);
7991                         reg &= ~E1000_PCIEMISC_LX_DECISION;
7992                         wr32(E1000_PCIEMISC, reg);
7993                 } /* endif adapter->dmac is not disabled */
7994         } else if (hw->mac.type == e1000_82580) {
7995                 u32 reg = rd32(E1000_PCIEMISC);
7996
7997                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7998                 wr32(E1000_DMACR, 0);
7999         }
8000 }
8001
8002 /**
8003  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8004  *  @hw: pointer to hardware structure
8005  *  @byte_offset: byte offset to read
8006  *  @dev_addr: device address
8007  *  @data: value read
8008  *
8009  *  Performs byte read operation over I2C interface at
8010  *  a specified device address.
8011  **/
8012 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8013                       u8 dev_addr, u8 *data)
8014 {
8015         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8016         struct i2c_client *this_client = adapter->i2c_client;
8017         s32 status;
8018         u16 swfw_mask = 0;
8019
8020         if (!this_client)
8021                 return E1000_ERR_I2C;
8022
8023         swfw_mask = E1000_SWFW_PHY0_SM;
8024
8025         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8026                 return E1000_ERR_SWFW_SYNC;
8027
8028         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8029         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8030
8031         if (status < 0)
8032                 return E1000_ERR_I2C;
8033         else {
8034                 *data = status;
8035                 return 0;
8036         }
8037 }
8038
8039 /**
8040  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8041  *  @hw: pointer to hardware structure
8042  *  @byte_offset: byte offset to write
8043  *  @dev_addr: device address
8044  *  @data: value to write
8045  *
8046  *  Performs byte write operation over I2C interface at
8047  *  a specified device address.
8048  **/
8049 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8050                        u8 dev_addr, u8 data)
8051 {
8052         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8053         struct i2c_client *this_client = adapter->i2c_client;
8054         s32 status;
8055         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8056
8057         if (!this_client)
8058                 return E1000_ERR_I2C;
8059
8060         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8061                 return E1000_ERR_SWFW_SYNC;
8062         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8063         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8064
8065         if (status)
8066                 return E1000_ERR_I2C;
8067         else
8068                 return 0;
8069
8070 }
8071
8072 int igb_reinit_queues(struct igb_adapter *adapter)
8073 {
8074         struct net_device *netdev = adapter->netdev;
8075         struct pci_dev *pdev = adapter->pdev;
8076         int err = 0;
8077
8078         if (netif_running(netdev))
8079                 igb_close(netdev);
8080
8081         igb_reset_interrupt_capability(adapter);
8082
8083         if (igb_init_interrupt_scheme(adapter, true)) {
8084                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8085                 return -ENOMEM;
8086         }
8087
8088         if (netif_running(netdev))
8089                 err = igb_open(netdev);
8090
8091         return err;
8092 }
8093 /* igb_main.c */