drivers/net/ethernet/intel/igb/igb_main.c

   1 /* Intel(R) Gigabit Ethernet Linux driver
   2  * Copyright(c) 2007-2014 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program; if not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * The full GNU General Public License is included in this distribution in
  17  * the file called "COPYING".
  18  *
  19  * Contact Information:
  20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  22  */
  23
  24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/init.h>
  29 #include <linux/bitops.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/pagemap.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/ipv6.h>
  34 #include <linux/slab.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/net_tstamp.h>
  38 #include <linux/mii.h>
  39 #include <linux/ethtool.h>
  40 #include <linux/if.h>
  41 #include <linux/if_vlan.h>
  42 #include <linux/pci.h>
  43 #include <linux/pci-aspm.h>
  44 #include <linux/delay.h>
  45 #include <linux/interrupt.h>
  46 #include <linux/ip.h>
  47 #include <linux/tcp.h>
  48 #include <linux/sctp.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/aer.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/pm_runtime.h>
  53 #ifdef CONFIG_IGB_DCA
  54 #include <linux/dca.h>
  55 #endif
  56 #include <linux/i2c.h>
  57 #include "igb.h"
  58
  59 #define MAJ 5
  60 #define MIN 0
  61 #define BUILD 5
  62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  63 __stringify(BUILD) "-k"
  64 char igb_driver_name[] = "igb";
  65 char igb_driver_version[] = DRV_VERSION;
  66 static const char igb_driver_string[] =
  67                                 "Intel(R) Gigabit Ethernet Network Driver";
  68 static const char igb_copyright[] =
  69                                 "Copyright (c) 2007-2014 Intel Corporation.";
  70
  71 static const struct e1000_info *igb_info_tbl[] = {
  72         [board_82575] = &e1000_82575_info,
  73 };
  74
  75 static const struct pci_device_id igb_pci_tbl[] = {
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 111         /* required last entry */
 112         {0, }
 113 };
 114
 115 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 116
 117 static int igb_setup_all_tx_resources(struct igb_adapter *);
 118 static int igb_setup_all_rx_resources(struct igb_adapter *);
 119 static void igb_free_all_tx_resources(struct igb_adapter *);
 120 static void igb_free_all_rx_resources(struct igb_adapter *);
 121 static void igb_setup_mrqc(struct igb_adapter *);
 122 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 123 static void igb_remove(struct pci_dev *pdev);
 124 static int igb_sw_init(struct igb_adapter *);
 125 static int igb_open(struct net_device *);
 126 static int igb_close(struct net_device *);
 127 static void igb_configure(struct igb_adapter *);
 128 static void igb_configure_tx(struct igb_adapter *);
 129 static void igb_configure_rx(struct igb_adapter *);
 130 static void igb_clean_all_tx_rings(struct igb_adapter *);
 131 static void igb_clean_all_rx_rings(struct igb_adapter *);
 132 static void igb_clean_tx_ring(struct igb_ring *);
 133 static void igb_clean_rx_ring(struct igb_ring *);
 134 static void igb_set_rx_mode(struct net_device *);
 135 static void igb_update_phy_info(unsigned long);
 136 static void igb_watchdog(unsigned long);
 137 static void igb_watchdog_task(struct work_struct *);
 138 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 139 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 140                                           struct rtnl_link_stats64 *stats);
 141 static int igb_change_mtu(struct net_device *, int);
 142 static int igb_set_mac(struct net_device *, void *);
 143 static void igb_set_uta(struct igb_adapter *adapter);
 144 static irqreturn_t igb_intr(int irq, void *);
 145 static irqreturn_t igb_intr_msi(int irq, void *);
 146 static irqreturn_t igb_msix_other(int irq, void *);
 147 static irqreturn_t igb_msix_ring(int irq, void *);
 148 #ifdef CONFIG_IGB_DCA
 149 static void igb_update_dca(struct igb_q_vector *);
 150 static void igb_setup_dca(struct igb_adapter *);
 151 #endif /* CONFIG_IGB_DCA */
 152 static int igb_poll(struct napi_struct *, int);
 153 static bool igb_clean_tx_irq(struct igb_q_vector *);
 154 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 155 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 156 static void igb_tx_timeout(struct net_device *);
 157 static void igb_reset_task(struct work_struct *);
 158 static void igb_vlan_mode(struct net_device *netdev,
 159                           netdev_features_t features);
 160 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 161 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 162 static void igb_restore_vlan(struct igb_adapter *);
 163 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 164 static void igb_ping_all_vfs(struct igb_adapter *);
 165 static void igb_msg_task(struct igb_adapter *);
 166 static void igb_vmm_control(struct igb_adapter *);
 167 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 168 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 169 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 170 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 171                                int vf, u16 vlan, u8 qos);
 172 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 173 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 174                                    bool setting);
 175 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 176                                  struct ifla_vf_info *ivi);
 177 static void igb_check_vf_rate_limit(struct igb_adapter *);
 178
 179 #ifdef CONFIG_PCI_IOV
 180 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 181 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 182 #endif
 183
 184 #ifdef CONFIG_PM
 185 #ifdef CONFIG_PM_SLEEP
 186 static int igb_suspend(struct device *);
 187 #endif
 188 static int igb_resume(struct device *);
 189 #ifdef CONFIG_PM_RUNTIME
 190 static int igb_runtime_suspend(struct device *dev);
 191 static int igb_runtime_resume(struct device *dev);
 192 static int igb_runtime_idle(struct device *dev);
 193 #endif
 194 static const struct dev_pm_ops igb_pm_ops = {
 195         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 196         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 197                         igb_runtime_idle)
 198 };
 199 #endif
 200 static void igb_shutdown(struct pci_dev *);
 201 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 202 #ifdef CONFIG_IGB_DCA
 203 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 204 static struct notifier_block dca_notifier = {
 205         .notifier_call  = igb_notify_dca,
 206         .next           = NULL,
 207         .priority       = 0
 208 };
 209 #endif
 210 #ifdef CONFIG_NET_POLL_CONTROLLER
 211 /* for netdump / net console */
 212 static void igb_netpoll(struct net_device *);
 213 #endif
 214 #ifdef CONFIG_PCI_IOV
 215 static unsigned int max_vfs;
 216 module_param(max_vfs, uint, 0);
 217 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 218 #endif /* CONFIG_PCI_IOV */
 219
 220 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 221                      pci_channel_state_t);
 222 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 223 static void igb_io_resume(struct pci_dev *);
 224
 225 static const struct pci_error_handlers igb_err_handler = {
 226         .error_detected = igb_io_error_detected,
 227         .slot_reset = igb_io_slot_reset,
 228         .resume = igb_io_resume,
 229 };
 230
 231 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 232
 233 static struct pci_driver igb_driver = {
 234         .name     = igb_driver_name,
 235         .id_table = igb_pci_tbl,
 236         .probe    = igb_probe,
 237         .remove   = igb_remove,
 238 #ifdef CONFIG_PM
 239         .driver.pm = &igb_pm_ops,
 240 #endif
 241         .shutdown = igb_shutdown,
 242         .sriov_configure = igb_pci_sriov_configure,
 243         .err_handler = &igb_err_handler
 244 };
 245
 246 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 247 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 248 MODULE_LICENSE("GPL");
 249 MODULE_VERSION(DRV_VERSION);
 250
 251 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 252 static int debug = -1;
 253 module_param(debug, int, 0);
 254 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 255
 256 struct igb_reg_info {
 257         u32 ofs;
 258         char *name;
 259 };
 260
 261 static const struct igb_reg_info igb_reg_info_tbl[] = {
 262
 263         /* General Registers */
 264         {E1000_CTRL, "CTRL"},
 265         {E1000_STATUS, "STATUS"},
 266         {E1000_CTRL_EXT, "CTRL_EXT"},
 267
 268         /* Interrupt Registers */
 269         {E1000_ICR, "ICR"},
 270
 271         /* RX Registers */
 272         {E1000_RCTL, "RCTL"},
 273         {E1000_RDLEN(0), "RDLEN"},
 274         {E1000_RDH(0), "RDH"},
 275         {E1000_RDT(0), "RDT"},
 276         {E1000_RXDCTL(0), "RXDCTL"},
 277         {E1000_RDBAL(0), "RDBAL"},
 278         {E1000_RDBAH(0), "RDBAH"},
 279
 280         /* TX Registers */
 281         {E1000_TCTL, "TCTL"},
 282         {E1000_TDBAL(0), "TDBAL"},
 283         {E1000_TDBAH(0), "TDBAH"},
 284         {E1000_TDLEN(0), "TDLEN"},
 285         {E1000_TDH(0), "TDH"},
 286         {E1000_TDT(0), "TDT"},
 287         {E1000_TXDCTL(0), "TXDCTL"},
 288         {E1000_TDFH, "TDFH"},
 289         {E1000_TDFT, "TDFT"},
 290         {E1000_TDFHS, "TDFHS"},
 291         {E1000_TDFPC, "TDFPC"},
 292
 293         /* List Terminator */
 294         {}
 295 };
 296
 297 /* igb_regdump - register printout routine */
 298 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 299 {
 300         int n = 0;
 301         char rname[16];
 302         u32 regs[8];
 303
 304         switch (reginfo->ofs) {
 305         case E1000_RDLEN(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RDLEN(n));
 308                 break;
 309         case E1000_RDH(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDH(n));
 312                 break;
 313         case E1000_RDT(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDT(n));
 316                 break;
 317         case E1000_RXDCTL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_RXDCTL(n));
 320                 break;
 321         case E1000_RDBAL(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_RDBAL(n));
 324                 break;
 325         case E1000_RDBAH(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_RDBAH(n));
 328                 break;
 329         case E1000_TDBAL(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_RDBAL(n));
 332                 break;
 333         case E1000_TDBAH(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDBAH(n));
 336                 break;
 337         case E1000_TDLEN(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TDLEN(n));
 340                 break;
 341         case E1000_TDH(0):
 342                 for (n = 0; n < 4; n++)
 343                         regs[n] = rd32(E1000_TDH(n));
 344                 break;
 345         case E1000_TDT(0):
 346                 for (n = 0; n < 4; n++)
 347                         regs[n] = rd32(E1000_TDT(n));
 348                 break;
 349         case E1000_TXDCTL(0):
 350                 for (n = 0; n < 4; n++)
 351                         regs[n] = rd32(E1000_TXDCTL(n));
 352                 break;
 353         default:
 354                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 355                 return;
 356         }
 357
 358         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 359         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 360                 regs[2], regs[3]);
 361 }
 362
 363 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 364 static void igb_dump(struct igb_adapter *adapter)
 365 {
 366         struct net_device *netdev = adapter->netdev;
 367         struct e1000_hw *hw = &adapter->hw;
 368         struct igb_reg_info *reginfo;
 369         struct igb_ring *tx_ring;
 370         union e1000_adv_tx_desc *tx_desc;
 371         struct my_u0 { u64 a; u64 b; } *u0;
 372         struct igb_ring *rx_ring;
 373         union e1000_adv_rx_desc *rx_desc;
 374         u32 staterr;
 375         u16 i, n;
 376
 377         if (!netif_msg_hw(adapter))
 378                 return;
 379
 380         /* Print netdevice Info */
 381         if (netdev) {
 382                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 383                 pr_info("Device Name     state            trans_start      last_rx\n");
 384                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 385                         netdev->state, netdev->trans_start, netdev->last_rx);
 386         }
 387
 388         /* Print Registers */
 389         dev_info(&adapter->pdev->dev, "Register Dump\n");
 390         pr_info(" Register Name   Value\n");
 391         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 392              reginfo->name; reginfo++) {
 393                 igb_regdump(hw, reginfo);
 394         }
 395
 396         /* Print TX Ring Summary */
 397         if (!netdev || !netif_running(netdev))
 398                 goto exit;
 399
 400         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 401         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 402         for (n = 0; n < adapter->num_tx_queues; n++) {
 403                 struct igb_tx_buffer *buffer_info;
 404                 tx_ring = adapter->tx_ring[n];
 405                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 406                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 407                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 408                         (u64)dma_unmap_addr(buffer_info, dma),
 409                         dma_unmap_len(buffer_info, len),
 410                         buffer_info->next_to_watch,
 411                         (u64)buffer_info->time_stamp);
 412         }
 413
 414         /* Print TX Rings */
 415         if (!netif_msg_tx_done(adapter))
 416                 goto rx_ring_summary;
 417
 418         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 419
 420         /* Transmit Descriptor Formats
 421          *
 422          * Advanced Transmit Descriptor
 423          *   +--------------------------------------------------------------+
 424          * 0 |         Buffer Address [63:0]                                |
 425          *   +--------------------------------------------------------------+
 426          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 427          *   +--------------------------------------------------------------+
 428          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 429          */
 430
 431         for (n = 0; n < adapter->num_tx_queues; n++) {
 432                 tx_ring = adapter->tx_ring[n];
 433                 pr_info("------------------------------------\n");
 434                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 435                 pr_info("------------------------------------\n");
 436                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 437
 438                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 439                         const char *next_desc;
 440                         struct igb_tx_buffer *buffer_info;
 441                         tx_desc = IGB_TX_DESC(tx_ring, i);
 442                         buffer_info = &tx_ring->tx_buffer_info[i];
 443                         u0 = (struct my_u0 *)tx_desc;
 444                         if (i == tx_ring->next_to_use &&
 445                             i == tx_ring->next_to_clean)
 446                                 next_desc = " NTC/U";
 447                         else if (i == tx_ring->next_to_use)
 448                                 next_desc = " NTU";
 449                         else if (i == tx_ring->next_to_clean)
 450                                 next_desc = " NTC";
 451                         else
 452                                 next_desc = "";
 453
 454                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 455                                 i, le64_to_cpu(u0->a),
 456                                 le64_to_cpu(u0->b),
 457                                 (u64)dma_unmap_addr(buffer_info, dma),
 458                                 dma_unmap_len(buffer_info, len),
 459                                 buffer_info->next_to_watch,
 460                                 (u64)buffer_info->time_stamp,
 461                                 buffer_info->skb, next_desc);
 462
 463                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 464                                 print_hex_dump(KERN_INFO, "",
 465                                         DUMP_PREFIX_ADDRESS,
 466                                         16, 1, buffer_info->skb->data,
 467                                         dma_unmap_len(buffer_info, len),
 468                                         true);
 469                 }
 470         }
 471
 472         /* Print RX Rings Summary */
 473 rx_ring_summary:
 474         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 475         pr_info("Queue [NTU] [NTC]\n");
 476         for (n = 0; n < adapter->num_rx_queues; n++) {
 477                 rx_ring = adapter->rx_ring[n];
 478                 pr_info(" %5d %5X %5X\n",
 479                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 480         }
 481
 482         /* Print RX Rings */
 483         if (!netif_msg_rx_status(adapter))
 484                 goto exit;
 485
 486         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 487
 488         /* Advanced Receive Descriptor (Read) Format
 489          *    63                                           1        0
 490          *    +-----------------------------------------------------+
 491          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 492          *    +----------------------------------------------+------+
 493          *  8 |       Header Buffer Address [63:1]           |  DD  |
 494          *    +-----------------------------------------------------+
 495          *
 496          *
 497          * Advanced Receive Descriptor (Write-Back) Format
 498          *
 499          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 500          *   +------------------------------------------------------+
 501          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 502          *   | Checksum   Ident  |   |           |    | Type | Type |
 503          *   +------------------------------------------------------+
 504          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 505          *   +------------------------------------------------------+
 506          *   63       48 47    32 31            20 19               0
 507          */
 508
 509         for (n = 0; n < adapter->num_rx_queues; n++) {
 510                 rx_ring = adapter->rx_ring[n];
 511                 pr_info("------------------------------------\n");
 512                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 513                 pr_info("------------------------------------\n");
 514                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 515                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 516
 517                 for (i = 0; i < rx_ring->count; i++) {
 518                         const char *next_desc;
 519                         struct igb_rx_buffer *buffer_info;
 520                         buffer_info = &rx_ring->rx_buffer_info[i];
 521                         rx_desc = IGB_RX_DESC(rx_ring, i);
 522                         u0 = (struct my_u0 *)rx_desc;
 523                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 524
 525                         if (i == rx_ring->next_to_use)
 526                                 next_desc = " NTU";
 527                         else if (i == rx_ring->next_to_clean)
 528                                 next_desc = " NTC";
 529                         else
 530                                 next_desc = "";
 531
 532                         if (staterr & E1000_RXD_STAT_DD) {
 533                                 /* Descriptor Done */
 534                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 535                                         "RWB", i,
 536                                         le64_to_cpu(u0->a),
 537                                         le64_to_cpu(u0->b),
 538                                         next_desc);
 539                         } else {
 540                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 541                                         "R  ", i,
 542                                         le64_to_cpu(u0->a),
 543                                         le64_to_cpu(u0->b),
 544                                         (u64)buffer_info->dma,
 545                                         next_desc);
 546
 547                                 if (netif_msg_pktdata(adapter) &&
 548                                     buffer_info->dma && buffer_info->page) {
 549                                         print_hex_dump(KERN_INFO, "",
 550                                           DUMP_PREFIX_ADDRESS,
 551                                           16, 1,
 552                                           page_address(buffer_info->page) +
 553                                                       buffer_info->page_offset,
 554                                           IGB_RX_BUFSZ, true);
 555                                 }
 556                         }
 557                 }
 558         }
 559
 560 exit:
 561         return;
 562 }
 563
 564 /**
 565  *  igb_get_i2c_data - Reads the I2C SDA data bit
 566  *  @hw: pointer to hardware structure
 567  *  @i2cctl: Current value of I2CCTL register
 568  *
 569  *  Returns the I2C data bit value
 570  **/
 571 static int igb_get_i2c_data(void *data)
 572 {
 573         struct igb_adapter *adapter = (struct igb_adapter *)data;
 574         struct e1000_hw *hw = &adapter->hw;
 575         s32 i2cctl = rd32(E1000_I2CPARAMS);
 576
 577         return !!(i2cctl & E1000_I2C_DATA_IN);
 578 }
 579
 580 /**
 581  *  igb_set_i2c_data - Sets the I2C data bit
 582  *  @data: pointer to hardware structure
 583  *  @state: I2C data value (0 or 1) to set
 584  *
 585  *  Sets the I2C data bit
 586  **/
 587 static void igb_set_i2c_data(void *data, int state)
 588 {
 589         struct igb_adapter *adapter = (struct igb_adapter *)data;
 590         struct e1000_hw *hw = &adapter->hw;
 591         s32 i2cctl = rd32(E1000_I2CPARAMS);
 592
 593         if (state)
 594                 i2cctl |= E1000_I2C_DATA_OUT;
 595         else
 596                 i2cctl &= ~E1000_I2C_DATA_OUT;
 597
 598         i2cctl &= ~E1000_I2C_DATA_OE_N;
 599         i2cctl |= E1000_I2C_CLK_OE_N;
 600         wr32(E1000_I2CPARAMS, i2cctl);
 601         wrfl();
 602
 603 }
 604
 605 /**
 606  *  igb_set_i2c_clk - Sets the I2C SCL clock
 607  *  @data: pointer to hardware structure
 608  *  @state: state to set clock
 609  *
 610  *  Sets the I2C clock line to state
 611  **/
 612 static void igb_set_i2c_clk(void *data, int state)
 613 {
 614         struct igb_adapter *adapter = (struct igb_adapter *)data;
 615         struct e1000_hw *hw = &adapter->hw;
 616         s32 i2cctl = rd32(E1000_I2CPARAMS);
 617
 618         if (state) {
 619                 i2cctl |= E1000_I2C_CLK_OUT;
 620                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 621         } else {
 622                 i2cctl &= ~E1000_I2C_CLK_OUT;
 623                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 624         }
 625         wr32(E1000_I2CPARAMS, i2cctl);
 626         wrfl();
 627 }
 628
 629 /**
 630  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 631  *  @data: pointer to hardware structure
 632  *
 633  *  Gets the I2C clock state
 634  **/
 635 static int igb_get_i2c_clk(void *data)
 636 {
 637         struct igb_adapter *adapter = (struct igb_adapter *)data;
 638         struct e1000_hw *hw = &adapter->hw;
 639         s32 i2cctl = rd32(E1000_I2CPARAMS);
 640
 641         return !!(i2cctl & E1000_I2C_CLK_IN);
 642 }
 643
 644 static const struct i2c_algo_bit_data igb_i2c_algo = {
 645         .setsda         = igb_set_i2c_data,
 646         .setscl         = igb_set_i2c_clk,
 647         .getsda         = igb_get_i2c_data,
 648         .getscl         = igb_get_i2c_clk,
 649         .udelay         = 5,
 650         .timeout        = 20,
 651 };
 652
 653 /**
 654  *  igb_get_hw_dev - return device
 655  *  @hw: pointer to hardware structure
 656  *
 657  *  used by hardware layer to print debugging information
 658  **/
 659 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 660 {
 661         struct igb_adapter *adapter = hw->back;
 662         return adapter->netdev;
 663 }
 664
 665 /**
 666  *  igb_init_module - Driver Registration Routine
 667  *
 668  *  igb_init_module is the first routine called when the driver is
 669  *  loaded. All it does is register with the PCI subsystem.
 670  **/
 671 static int __init igb_init_module(void)
 672 {
 673         int ret;
 674
 675         pr_info("%s - version %s\n",
 676                igb_driver_string, igb_driver_version);
 677         pr_info("%s\n", igb_copyright);
 678
 679 #ifdef CONFIG_IGB_DCA
 680         dca_register_notify(&dca_notifier);
 681 #endif
 682         ret = pci_register_driver(&igb_driver);
 683         return ret;
 684 }
 685
 686 module_init(igb_init_module);
 687
 688 /**
 689  *  igb_exit_module - Driver Exit Cleanup Routine
 690  *
 691  *  igb_exit_module is called just before the driver is removed
 692  *  from memory.
 693  **/
 694 static void __exit igb_exit_module(void)
 695 {
 696 #ifdef CONFIG_IGB_DCA
 697         dca_unregister_notify(&dca_notifier);
 698 #endif
 699         pci_unregister_driver(&igb_driver);
 700 }
 701
 702 module_exit(igb_exit_module);
 703
 704 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 705 /**
 706  *  igb_cache_ring_register - Descriptor ring to register mapping
 707  *  @adapter: board private structure to initialize
 708  *
 709  *  Once we know the feature-set enabled for the device, we'll cache
 710  *  the register offset the descriptor ring is assigned to.
 711  **/
 712 static void igb_cache_ring_register(struct igb_adapter *adapter)
 713 {
 714         int i = 0, j = 0;
 715         u32 rbase_offset = adapter->vfs_allocated_count;
 716
 717         switch (adapter->hw.mac.type) {
 718         case e1000_82576:
 719                 /* The queues are allocated for virtualization such that VF 0
 720                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 721                  * In order to avoid collision we start at the first free queue
 722                  * and continue consuming queues in the same sequence
 723                  */
 724                 if (adapter->vfs_allocated_count) {
 725                         for (; i < adapter->rss_queues; i++)
 726                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 727                                                                Q_IDX_82576(i);
 728                 }
 729                 /* Fall through */
 730         case e1000_82575:
 731         case e1000_82580:
 732         case e1000_i350:
 733         case e1000_i354:
 734         case e1000_i210:
 735         case e1000_i211:
 736                 /* Fall through */
 737         default:
 738                 for (; i < adapter->num_rx_queues; i++)
 739                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 740                 for (; j < adapter->num_tx_queues; j++)
 741                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 742                 break;
 743         }
 744 }
 745
 746 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 747 {
 748         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 749         u8 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
 750         u32 value = 0;
 751
 752         if (E1000_REMOVED(hw_addr))
 753                 return ~value;
 754
 755         value = readl(&hw_addr[reg]);
 756
 757         /* reads should not return all F's */
 758         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 759                 struct net_device *netdev = igb->netdev;
 760                 hw->hw_addr = NULL;
 761                 netif_device_detach(netdev);
 762                 netdev_err(netdev, "PCIe link lost, device now detached\n");
 763         }
 764
 765         return value;
 766 }
 767
 768 /**
 769  *  igb_write_ivar - configure ivar for given MSI-X vector
 770  *  @hw: pointer to the HW structure
 771  *  @msix_vector: vector number we are allocating to a given ring
 772  *  @index: row index of IVAR register to write within IVAR table
 773  *  @offset: column offset of in IVAR, should be multiple of 8
 774  *
 775  *  This function is intended to handle the writing of the IVAR register
 776  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 777  *  each containing an cause allocation for an Rx and Tx ring, and a
 778  *  variable number of rows depending on the number of queues supported.
 779  **/
 780 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 781                            int index, int offset)
 782 {
 783         u32 ivar = array_rd32(E1000_IVAR0, index);
 784
 785         /* clear any bits that are currently set */
 786         ivar &= ~((u32)0xFF << offset);
 787
 788         /* write vector and valid bit */
 789         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 790
 791         array_wr32(E1000_IVAR0, index, ivar);
 792 }
 793
 794 #define IGB_N0_QUEUE -1
 795 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 796 {
 797         struct igb_adapter *adapter = q_vector->adapter;
 798         struct e1000_hw *hw = &adapter->hw;
 799         int rx_queue = IGB_N0_QUEUE;
 800         int tx_queue = IGB_N0_QUEUE;
 801         u32 msixbm = 0;
 802
 803         if (q_vector->rx.ring)
 804                 rx_queue = q_vector->rx.ring->reg_idx;
 805         if (q_vector->tx.ring)
 806                 tx_queue = q_vector->tx.ring->reg_idx;
 807
 808         switch (hw->mac.type) {
 809         case e1000_82575:
 810                 /* The 82575 assigns vectors using a bitmask, which matches the
 811                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 812                  * or more queues to a vector, we write the appropriate bits
 813                  * into the MSIXBM register for that vector.
 814                  */
 815                 if (rx_queue > IGB_N0_QUEUE)
 816                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 817                 if (tx_queue > IGB_N0_QUEUE)
 818                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 819                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 820                         msixbm |= E1000_EIMS_OTHER;
 821                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 822                 q_vector->eims_value = msixbm;
 823                 break;
 824         case e1000_82576:
 825                 /* 82576 uses a table that essentially consists of 2 columns
 826                  * with 8 rows.  The ordering is column-major so we use the
 827                  * lower 3 bits as the row index, and the 4th bit as the
 828                  * column offset.
 829                  */
 830                 if (rx_queue > IGB_N0_QUEUE)
 831                         igb_write_ivar(hw, msix_vector,
 832                                        rx_queue & 0x7,
 833                                        (rx_queue & 0x8) << 1);
 834                 if (tx_queue > IGB_N0_QUEUE)
 835                         igb_write_ivar(hw, msix_vector,
 836                                        tx_queue & 0x7,
 837                                        ((tx_queue & 0x8) << 1) + 8);
 838                 q_vector->eims_value = 1 << msix_vector;
 839                 break;
 840         case e1000_82580:
 841         case e1000_i350:
 842         case e1000_i354:
 843         case e1000_i210:
 844         case e1000_i211:
 845                 /* On 82580 and newer adapters the scheme is similar to 82576
 846                  * however instead of ordering column-major we have things
 847                  * ordered row-major.  So we traverse the table by using
 848                  * bit 0 as the column offset, and the remaining bits as the
 849                  * row index.
 850                  */
 851                 if (rx_queue > IGB_N0_QUEUE)
 852                         igb_write_ivar(hw, msix_vector,
 853                                        rx_queue >> 1,
 854                                        (rx_queue & 0x1) << 4);
 855                 if (tx_queue > IGB_N0_QUEUE)
 856                         igb_write_ivar(hw, msix_vector,
 857                                        tx_queue >> 1,
 858                                        ((tx_queue & 0x1) << 4) + 8);
 859                 q_vector->eims_value = 1 << msix_vector;
 860                 break;
 861         default:
 862                 BUG();
 863                 break;
 864         }
 865
 866         /* add q_vector eims value to global eims_enable_mask */
 867         adapter->eims_enable_mask |= q_vector->eims_value;
 868
 869         /* configure q_vector to set itr on first interrupt */
 870         q_vector->set_itr = 1;
 871 }
 872
 873 /**
 874  *  igb_configure_msix - Configure MSI-X hardware
 875  *  @adapter: board private structure to initialize
 876  *
 877  *  igb_configure_msix sets up the hardware to properly
 878  *  generate MSI-X interrupts.
 879  **/
 880 static void igb_configure_msix(struct igb_adapter *adapter)
 881 {
 882         u32 tmp;
 883         int i, vector = 0;
 884         struct e1000_hw *hw = &adapter->hw;
 885
 886         adapter->eims_enable_mask = 0;
 887
 888         /* set vector for other causes, i.e. link changes */
 889         switch (hw->mac.type) {
 890         case e1000_82575:
 891                 tmp = rd32(E1000_CTRL_EXT);
 892                 /* enable MSI-X PBA support*/
 893                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 894
 895                 /* Auto-Mask interrupts upon ICR read. */
 896                 tmp |= E1000_CTRL_EXT_EIAME;
 897                 tmp |= E1000_CTRL_EXT_IRCA;
 898
 899                 wr32(E1000_CTRL_EXT, tmp);
 900
 901                 /* enable msix_other interrupt */
 902                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 903                 adapter->eims_other = E1000_EIMS_OTHER;
 904
 905                 break;
 906
 907         case e1000_82576:
 908         case e1000_82580:
 909         case e1000_i350:
 910         case e1000_i354:
 911         case e1000_i210:
 912         case e1000_i211:
 913                 /* Turn on MSI-X capability first, or our settings
 914                  * won't stick.  And it will take days to debug.
 915                  */
 916                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 917                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 918                      E1000_GPIE_NSICR);
 919
 920                 /* enable msix_other interrupt */
 921                 adapter->eims_other = 1 << vector;
 922                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 923
 924                 wr32(E1000_IVAR_MISC, tmp);
 925                 break;
 926         default:
 927                 /* do nothing, since nothing else supports MSI-X */
 928                 break;
 929         } /* switch (hw->mac.type) */
 930
 931         adapter->eims_enable_mask |= adapter->eims_other;
 932
 933         for (i = 0; i < adapter->num_q_vectors; i++)
 934                 igb_assign_vector(adapter->q_vector[i], vector++);
 935
 936         wrfl();
 937 }
 938
 939 /**
 940  *  igb_request_msix - Initialize MSI-X interrupts
 941  *  @adapter: board private structure to initialize
 942  *
 943  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 944  *  kernel.
 945  **/
 946 static int igb_request_msix(struct igb_adapter *adapter)
 947 {
 948         struct net_device *netdev = adapter->netdev;
 949         struct e1000_hw *hw = &adapter->hw;
 950         int i, err = 0, vector = 0, free_vector = 0;
 951
 952         err = request_irq(adapter->msix_entries[vector].vector,
 953                           igb_msix_other, 0, netdev->name, adapter);
 954         if (err)
 955                 goto err_out;
 956
 957         for (i = 0; i < adapter->num_q_vectors; i++) {
 958                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 959
 960                 vector++;
 961
 962                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 963
 964                 if (q_vector->rx.ring && q_vector->tx.ring)
 965                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 966                                 q_vector->rx.ring->queue_index);
 967                 else if (q_vector->tx.ring)
 968                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 969                                 q_vector->tx.ring->queue_index);
 970                 else if (q_vector->rx.ring)
 971                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 972                                 q_vector->rx.ring->queue_index);
 973                 else
 974                         sprintf(q_vector->name, "%s-unused", netdev->name);
 975
 976                 err = request_irq(adapter->msix_entries[vector].vector,
 977                                   igb_msix_ring, 0, q_vector->name,
 978                                   q_vector);
 979                 if (err)
 980                         goto err_free;
 981         }
 982
 983         igb_configure_msix(adapter);
 984         return 0;
 985
 986 err_free:
 987         /* free already assigned IRQs */
 988         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 989
 990         vector--;
 991         for (i = 0; i < vector; i++) {
 992                 free_irq(adapter->msix_entries[free_vector++].vector,
 993                          adapter->q_vector[i]);
 994         }
 995 err_out:
 996         return err;
 997 }
 998
 999 /**
1000  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
1001  *  @adapter: board private structure to initialize
1002  *  @v_idx: Index of vector to be freed
1003  *
1004  *  This function frees the memory allocated to the q_vector.
1005  **/
1006 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1007 {
1008         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1009
1010         adapter->q_vector[v_idx] = NULL;
1011
1012         /* igb_get_stats64() might access the rings on this vector,
1013          * we must wait a grace period before freeing it.
1014          */
1015         kfree_rcu(q_vector, rcu);
1016 }
1017
1018 /**
1019  *  igb_reset_q_vector - Reset config for interrupt vector
1020  *  @adapter: board private structure to initialize
1021  *  @v_idx: Index of vector to be reset
1022  *
1023  *  If NAPI is enabled it will delete any references to the
1024  *  NAPI struct. This is preparation for igb_free_q_vector.
1025  **/
1026 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1027 {
1028         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1029
1030         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1031          * allocated. So, q_vector is NULL so we should stop here.
1032          */
1033         if (!q_vector)
1034                 return;
1035
1036         if (q_vector->tx.ring)
1037                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1038
1039         if (q_vector->rx.ring)
1040                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1041
1042         netif_napi_del(&q_vector->napi);
1043
1044 }
1045
1046 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1047 {
1048         int v_idx = adapter->num_q_vectors;
1049
1050         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1051                 pci_disable_msix(adapter->pdev);
1052         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1053                 pci_disable_msi(adapter->pdev);
1054
1055         while (v_idx--)
1056                 igb_reset_q_vector(adapter, v_idx);
1057 }
1058
1059 /**
1060  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1061  *  @adapter: board private structure to initialize
1062  *
1063  *  This function frees the memory allocated to the q_vectors.  In addition if
1064  *  NAPI is enabled it will delete any references to the NAPI struct prior
1065  *  to freeing the q_vector.
1066  **/
1067 static void igb_free_q_vectors(struct igb_adapter *adapter)
1068 {
1069         int v_idx = adapter->num_q_vectors;
1070
1071         adapter->num_tx_queues = 0;
1072         adapter->num_rx_queues = 0;
1073         adapter->num_q_vectors = 0;
1074
1075         while (v_idx--) {
1076                 igb_reset_q_vector(adapter, v_idx);
1077                 igb_free_q_vector(adapter, v_idx);
1078         }
1079 }
1080
1081 /**
1082  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1083  *  @adapter: board private structure to initialize
1084  *
1085  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1086  *  MSI-X interrupts allocated.
1087  */
1088 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1089 {
1090         igb_free_q_vectors(adapter);
1091         igb_reset_interrupt_capability(adapter);
1092 }
1093
1094 /**
1095  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1096  *  @adapter: board private structure to initialize
1097  *  @msix: boolean value of MSIX capability
1098  *
1099  *  Attempt to configure interrupts using the best available
1100  *  capabilities of the hardware and kernel.
1101  **/
1102 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1103 {
1104         int err;
1105         int numvecs, i;
1106
1107         if (!msix)
1108                 goto msi_only;
1109         adapter->flags |= IGB_FLAG_HAS_MSIX;
1110
1111         /* Number of supported queues. */
1112         adapter->num_rx_queues = adapter->rss_queues;
1113         if (adapter->vfs_allocated_count)
1114                 adapter->num_tx_queues = 1;
1115         else
1116                 adapter->num_tx_queues = adapter->rss_queues;
1117
1118         /* start with one vector for every Rx queue */
1119         numvecs = adapter->num_rx_queues;
1120
1121         /* if Tx handler is separate add 1 for every Tx queue */
1122         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1123                 numvecs += adapter->num_tx_queues;
1124
1125         /* store the number of vectors reserved for queues */
1126         adapter->num_q_vectors = numvecs;
1127
1128         /* add 1 vector for link status interrupts */
1129         numvecs++;
1130         for (i = 0; i < numvecs; i++)
1131                 adapter->msix_entries[i].entry = i;
1132
1133         err = pci_enable_msix_range(adapter->pdev,
1134                                     adapter->msix_entries,
1135                                     numvecs,
1136                                     numvecs);
1137         if (err > 0)
1138                 return;
1139
1140         igb_reset_interrupt_capability(adapter);
1141
1142         /* If we can't do MSI-X, try MSI */
1143 msi_only:
1144         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1145 #ifdef CONFIG_PCI_IOV
1146         /* disable SR-IOV for non MSI-X configurations */
1147         if (adapter->vf_data) {
1148                 struct e1000_hw *hw = &adapter->hw;
1149                 /* disable iov and allow time for transactions to clear */
1150                 pci_disable_sriov(adapter->pdev);
1151                 msleep(500);
1152
1153                 kfree(adapter->vf_data);
1154                 adapter->vf_data = NULL;
1155                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1156                 wrfl();
1157                 msleep(100);
1158                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1159         }
1160 #endif
1161         adapter->vfs_allocated_count = 0;
1162         adapter->rss_queues = 1;
1163         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1164         adapter->num_rx_queues = 1;
1165         adapter->num_tx_queues = 1;
1166         adapter->num_q_vectors = 1;
1167         if (!pci_enable_msi(adapter->pdev))
1168                 adapter->flags |= IGB_FLAG_HAS_MSI;
1169 }
1170
1171 static void igb_add_ring(struct igb_ring *ring,
1172                          struct igb_ring_container *head)
1173 {
1174         head->ring = ring;
1175         head->count++;
1176 }
1177
1178 /**
1179  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1180  *  @adapter: board private structure to initialize
1181  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1182  *  @v_idx: index of vector in adapter struct
1183  *  @txr_count: total number of Tx rings to allocate
1184  *  @txr_idx: index of first Tx ring to allocate
1185  *  @rxr_count: total number of Rx rings to allocate
1186  *  @rxr_idx: index of first Rx ring to allocate
1187  *
1188  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1189  **/
1190 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1191                               int v_count, int v_idx,
1192                               int txr_count, int txr_idx,
1193                               int rxr_count, int rxr_idx)
1194 {
1195         struct igb_q_vector *q_vector;
1196         struct igb_ring *ring;
1197         int ring_count, size;
1198
1199         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1200         if (txr_count > 1 || rxr_count > 1)
1201                 return -ENOMEM;
1202
1203         ring_count = txr_count + rxr_count;
1204         size = sizeof(struct igb_q_vector) +
1205                (sizeof(struct igb_ring) * ring_count);
1206
1207         /* allocate q_vector and rings */
1208         q_vector = adapter->q_vector[v_idx];
1209         if (!q_vector)
1210                 q_vector = kzalloc(size, GFP_KERNEL);
1211         if (!q_vector)
1212                 return -ENOMEM;
1213
1214         /* initialize NAPI */
1215         netif_napi_add(adapter->netdev, &q_vector->napi,
1216                        igb_poll, 64);
1217
1218         /* tie q_vector and adapter together */
1219         adapter->q_vector[v_idx] = q_vector;
1220         q_vector->adapter = adapter;
1221
1222         /* initialize work limits */
1223         q_vector->tx.work_limit = adapter->tx_work_limit;
1224
1225         /* initialize ITR configuration */
1226         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1227         q_vector->itr_val = IGB_START_ITR;
1228
1229         /* initialize pointer to rings */
1230         ring = q_vector->ring;
1231
1232         /* intialize ITR */
1233         if (rxr_count) {
1234                 /* rx or rx/tx vector */
1235                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1236                         q_vector->itr_val = adapter->rx_itr_setting;
1237         } else {
1238                 /* tx only vector */
1239                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1240                         q_vector->itr_val = adapter->tx_itr_setting;
1241         }
1242
1243         if (txr_count) {
1244                 /* assign generic ring traits */
1245                 ring->dev = &adapter->pdev->dev;
1246                 ring->netdev = adapter->netdev;
1247
1248                 /* configure backlink on ring */
1249                 ring->q_vector = q_vector;
1250
1251                 /* update q_vector Tx values */
1252                 igb_add_ring(ring, &q_vector->tx);
1253
1254                 /* For 82575, context index must be unique per ring. */
1255                 if (adapter->hw.mac.type == e1000_82575)
1256                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1257
1258                 /* apply Tx specific ring traits */
1259                 ring->count = adapter->tx_ring_count;
1260                 ring->queue_index = txr_idx;
1261
1262                 u64_stats_init(&ring->tx_syncp);
1263                 u64_stats_init(&ring->tx_syncp2);
1264
1265                 /* assign ring to adapter */
1266                 adapter->tx_ring[txr_idx] = ring;
1267
1268                 /* push pointer to next ring */
1269                 ring++;
1270         }
1271
1272         if (rxr_count) {
1273                 /* assign generic ring traits */
1274                 ring->dev = &adapter->pdev->dev;
1275                 ring->netdev = adapter->netdev;
1276
1277                 /* configure backlink on ring */
1278                 ring->q_vector = q_vector;
1279
1280                 /* update q_vector Rx values */
1281                 igb_add_ring(ring, &q_vector->rx);
1282
1283                 /* set flag indicating ring supports SCTP checksum offload */
1284                 if (adapter->hw.mac.type >= e1000_82576)
1285                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1286
1287                 /* On i350, i354, i210, and i211, loopback VLAN packets
1288                  * have the tag byte-swapped.
1289                  */
1290                 if (adapter->hw.mac.type >= e1000_i350)
1291                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1292
1293                 /* apply Rx specific ring traits */
1294                 ring->count = adapter->rx_ring_count;
1295                 ring->queue_index = rxr_idx;
1296
1297                 u64_stats_init(&ring->rx_syncp);
1298
1299                 /* assign ring to adapter */
1300                 adapter->rx_ring[rxr_idx] = ring;
1301         }
1302
1303         return 0;
1304 }
1305
1306
1307 /**
1308  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1309  *  @adapter: board private structure to initialize
1310  *
1311  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1312  *  return -ENOMEM.
1313  **/
1314 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1315 {
1316         int q_vectors = adapter->num_q_vectors;
1317         int rxr_remaining = adapter->num_rx_queues;
1318         int txr_remaining = adapter->num_tx_queues;
1319         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1320         int err;
1321
1322         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1323                 for (; rxr_remaining; v_idx++) {
1324                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1325                                                  0, 0, 1, rxr_idx);
1326
1327                         if (err)
1328                                 goto err_out;
1329
1330                         /* update counts and index */
1331                         rxr_remaining--;
1332                         rxr_idx++;
1333                 }
1334         }
1335
1336         for (; v_idx < q_vectors; v_idx++) {
1337                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1338                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1339
1340                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1341                                          tqpv, txr_idx, rqpv, rxr_idx);
1342
1343                 if (err)
1344                         goto err_out;
1345
1346                 /* update counts and index */
1347                 rxr_remaining -= rqpv;
1348                 txr_remaining -= tqpv;
1349                 rxr_idx++;
1350                 txr_idx++;
1351         }
1352
1353         return 0;
1354
1355 err_out:
1356         adapter->num_tx_queues = 0;
1357         adapter->num_rx_queues = 0;
1358         adapter->num_q_vectors = 0;
1359
1360         while (v_idx--)
1361                 igb_free_q_vector(adapter, v_idx);
1362
1363         return -ENOMEM;
1364 }
1365
1366 /**
1367  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1368  *  @adapter: board private structure to initialize
1369  *  @msix: boolean value of MSIX capability
1370  *
1371  *  This function initializes the interrupts and allocates all of the queues.
1372  **/
1373 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1374 {
1375         struct pci_dev *pdev = adapter->pdev;
1376         int err;
1377
1378         igb_set_interrupt_capability(adapter, msix);
1379
1380         err = igb_alloc_q_vectors(adapter);
1381         if (err) {
1382                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1383                 goto err_alloc_q_vectors;
1384         }
1385
1386         igb_cache_ring_register(adapter);
1387
1388         return 0;
1389
1390 err_alloc_q_vectors:
1391         igb_reset_interrupt_capability(adapter);
1392         return err;
1393 }
1394
1395 /**
1396  *  igb_request_irq - initialize interrupts
1397  *  @adapter: board private structure to initialize
1398  *
1399  *  Attempts to configure interrupts using the best available
1400  *  capabilities of the hardware and kernel.
1401  **/
1402 static int igb_request_irq(struct igb_adapter *adapter)
1403 {
1404         struct net_device *netdev = adapter->netdev;
1405         struct pci_dev *pdev = adapter->pdev;
1406         int err = 0;
1407
1408         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1409                 err = igb_request_msix(adapter);
1410                 if (!err)
1411                         goto request_done;
1412                 /* fall back to MSI */
1413                 igb_free_all_tx_resources(adapter);
1414                 igb_free_all_rx_resources(adapter);
1415
1416                 igb_clear_interrupt_scheme(adapter);
1417                 err = igb_init_interrupt_scheme(adapter, false);
1418                 if (err)
1419                         goto request_done;
1420
1421                 igb_setup_all_tx_resources(adapter);
1422                 igb_setup_all_rx_resources(adapter);
1423                 igb_configure(adapter);
1424         }
1425
1426         igb_assign_vector(adapter->q_vector[0], 0);
1427
1428         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1429                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1430                                   netdev->name, adapter);
1431                 if (!err)
1432                         goto request_done;
1433
1434                 /* fall back to legacy interrupts */
1435                 igb_reset_interrupt_capability(adapter);
1436                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1437         }
1438
1439         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1440                           netdev->name, adapter);
1441
1442         if (err)
1443                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1444                         err);
1445
1446 request_done:
1447         return err;
1448 }
1449
1450 static void igb_free_irq(struct igb_adapter *adapter)
1451 {
1452         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1453                 int vector = 0, i;
1454
1455                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1456
1457                 for (i = 0; i < adapter->num_q_vectors; i++)
1458                         free_irq(adapter->msix_entries[vector++].vector,
1459                                  adapter->q_vector[i]);
1460         } else {
1461                 free_irq(adapter->pdev->irq, adapter);
1462         }
1463 }
1464
1465 /**
1466  *  igb_irq_disable - Mask off interrupt generation on the NIC
1467  *  @adapter: board private structure
1468  **/
1469 static void igb_irq_disable(struct igb_adapter *adapter)
1470 {
1471         struct e1000_hw *hw = &adapter->hw;
1472
1473         /* we need to be careful when disabling interrupts.  The VFs are also
1474          * mapped into these registers and so clearing the bits can cause
1475          * issues on the VF drivers so we only need to clear what we set
1476          */
1477         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1478                 u32 regval = rd32(E1000_EIAM);
1479
1480                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1481                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1482                 regval = rd32(E1000_EIAC);
1483                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1484         }
1485
1486         wr32(E1000_IAM, 0);
1487         wr32(E1000_IMC, ~0);
1488         wrfl();
1489         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1490                 int i;
1491
1492                 for (i = 0; i < adapter->num_q_vectors; i++)
1493                         synchronize_irq(adapter->msix_entries[i].vector);
1494         } else {
1495                 synchronize_irq(adapter->pdev->irq);
1496         }
1497 }
1498
1499 /**
1500  *  igb_irq_enable - Enable default interrupt generation settings
1501  *  @adapter: board private structure
1502  **/
1503 static void igb_irq_enable(struct igb_adapter *adapter)
1504 {
1505         struct e1000_hw *hw = &adapter->hw;
1506
1507         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1508                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1509                 u32 regval = rd32(E1000_EIAC);
1510
1511                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1512                 regval = rd32(E1000_EIAM);
1513                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1514                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1515                 if (adapter->vfs_allocated_count) {
1516                         wr32(E1000_MBVFIMR, 0xFF);
1517                         ims |= E1000_IMS_VMMB;
1518                 }
1519                 wr32(E1000_IMS, ims);
1520         } else {
1521                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1522                                 E1000_IMS_DRSTA);
1523                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1524                                 E1000_IMS_DRSTA);
1525         }
1526 }
1527
1528 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1529 {
1530         struct e1000_hw *hw = &adapter->hw;
1531         u16 vid = adapter->hw.mng_cookie.vlan_id;
1532         u16 old_vid = adapter->mng_vlan_id;
1533
1534         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1535                 /* add VID to filter table */
1536                 igb_vfta_set(hw, vid, true);
1537                 adapter->mng_vlan_id = vid;
1538         } else {
1539                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1540         }
1541
1542         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1543             (vid != old_vid) &&
1544             !test_bit(old_vid, adapter->active_vlans)) {
1545                 /* remove VID from filter table */
1546                 igb_vfta_set(hw, old_vid, false);
1547         }
1548 }
1549
1550 /**
1551  *  igb_release_hw_control - release control of the h/w to f/w
1552  *  @adapter: address of board private structure
1553  *
1554  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1555  *  For ASF and Pass Through versions of f/w this means that the
1556  *  driver is no longer loaded.
1557  **/
1558 static void igb_release_hw_control(struct igb_adapter *adapter)
1559 {
1560         struct e1000_hw *hw = &adapter->hw;
1561         u32 ctrl_ext;
1562
1563         /* Let firmware take over control of h/w */
1564         ctrl_ext = rd32(E1000_CTRL_EXT);
1565         wr32(E1000_CTRL_EXT,
1566                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1567 }
1568
1569 /**
1570  *  igb_get_hw_control - get control of the h/w from f/w
1571  *  @adapter: address of board private structure
1572  *
1573  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1574  *  For ASF and Pass Through versions of f/w this means that
1575  *  the driver is loaded.
1576  **/
1577 static void igb_get_hw_control(struct igb_adapter *adapter)
1578 {
1579         struct e1000_hw *hw = &adapter->hw;
1580         u32 ctrl_ext;
1581
1582         /* Let firmware know the driver has taken over */
1583         ctrl_ext = rd32(E1000_CTRL_EXT);
1584         wr32(E1000_CTRL_EXT,
1585                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1586 }
1587
1588 /**
1589  *  igb_configure - configure the hardware for RX and TX
1590  *  @adapter: private board structure
1591  **/
1592 static void igb_configure(struct igb_adapter *adapter)
1593 {
1594         struct net_device *netdev = adapter->netdev;
1595         int i;
1596
1597         igb_get_hw_control(adapter);
1598         igb_set_rx_mode(netdev);
1599
1600         igb_restore_vlan(adapter);
1601
1602         igb_setup_tctl(adapter);
1603         igb_setup_mrqc(adapter);
1604         igb_setup_rctl(adapter);
1605
1606         igb_configure_tx(adapter);
1607         igb_configure_rx(adapter);
1608
1609         igb_rx_fifo_flush_82575(&adapter->hw);
1610
1611         /* call igb_desc_unused which always leaves
1612          * at least 1 descriptor unused to make sure
1613          * next_to_use != next_to_clean
1614          */
1615         for (i = 0; i < adapter->num_rx_queues; i++) {
1616                 struct igb_ring *ring = adapter->rx_ring[i];
1617                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1618         }
1619 }
1620
1621 /**
1622  *  igb_power_up_link - Power up the phy/serdes link
1623  *  @adapter: address of board private structure
1624  **/
1625 void igb_power_up_link(struct igb_adapter *adapter)
1626 {
1627         igb_reset_phy(&adapter->hw);
1628
1629         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1630                 igb_power_up_phy_copper(&adapter->hw);
1631         else
1632                 igb_power_up_serdes_link_82575(&adapter->hw);
1633 }
1634
1635 /**
1636  *  igb_power_down_link - Power down the phy/serdes link
1637  *  @adapter: address of board private structure
1638  */
1639 static void igb_power_down_link(struct igb_adapter *adapter)
1640 {
1641         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1642                 igb_power_down_phy_copper_82575(&adapter->hw);
1643         else
1644                 igb_shutdown_serdes_link_82575(&adapter->hw);
1645 }
1646
1647 /**
1648  * Detect and switch function for Media Auto Sense
1649  * @adapter: address of the board private structure
1650  **/
1651 static void igb_check_swap_media(struct igb_adapter *adapter)
1652 {
1653         struct e1000_hw *hw = &adapter->hw;
1654         u32 ctrl_ext, connsw;
1655         bool swap_now = false;
1656
1657         ctrl_ext = rd32(E1000_CTRL_EXT);
1658         connsw = rd32(E1000_CONNSW);
1659
1660         /* need to live swap if current media is copper and we have fiber/serdes
1661          * to go to.
1662          */
1663
1664         if ((hw->phy.media_type == e1000_media_type_copper) &&
1665             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1666                 swap_now = true;
1667         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1668                 /* copper signal takes time to appear */
1669                 if (adapter->copper_tries < 4) {
1670                         adapter->copper_tries++;
1671                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1672                         wr32(E1000_CONNSW, connsw);
1673                         return;
1674                 } else {
1675                         adapter->copper_tries = 0;
1676                         if ((connsw & E1000_CONNSW_PHYSD) &&
1677                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1678                                 swap_now = true;
1679                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1680                                 wr32(E1000_CONNSW, connsw);
1681                         }
1682                 }
1683         }
1684
1685         if (!swap_now)
1686                 return;
1687
1688         switch (hw->phy.media_type) {
1689         case e1000_media_type_copper:
1690                 netdev_info(adapter->netdev,
1691                         "MAS: changing media to fiber/serdes\n");
1692                 ctrl_ext |=
1693                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1694                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1695                 adapter->copper_tries = 0;
1696                 break;
1697         case e1000_media_type_internal_serdes:
1698         case e1000_media_type_fiber:
1699                 netdev_info(adapter->netdev,
1700                         "MAS: changing media to copper\n");
1701                 ctrl_ext &=
1702                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1703                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1704                 break;
1705         default:
1706                 /* shouldn't get here during regular operation */
1707                 netdev_err(adapter->netdev,
1708                         "AMS: Invalid media type found, returning\n");
1709                 break;
1710         }
1711         wr32(E1000_CTRL_EXT, ctrl_ext);
1712 }
1713
1714 /**
1715  *  igb_up - Open the interface and prepare it to handle traffic
1716  *  @adapter: board private structure
1717  **/
1718 int igb_up(struct igb_adapter *adapter)
1719 {
1720         struct e1000_hw *hw = &adapter->hw;
1721         int i;
1722
1723         /* hardware has been reset, we need to reload some things */
1724         igb_configure(adapter);
1725
1726         clear_bit(__IGB_DOWN, &adapter->state);
1727
1728         for (i = 0; i < adapter->num_q_vectors; i++)
1729                 napi_enable(&(adapter->q_vector[i]->napi));
1730
1731         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1732                 igb_configure_msix(adapter);
1733         else
1734                 igb_assign_vector(adapter->q_vector[0], 0);
1735
1736         /* Clear any pending interrupts. */
1737         rd32(E1000_ICR);
1738         igb_irq_enable(adapter);
1739
1740         /* notify VFs that reset has been completed */
1741         if (adapter->vfs_allocated_count) {
1742                 u32 reg_data = rd32(E1000_CTRL_EXT);
1743
1744                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1745                 wr32(E1000_CTRL_EXT, reg_data);
1746         }
1747
1748         netif_tx_start_all_queues(adapter->netdev);
1749
1750         /* start the watchdog. */
1751         hw->mac.get_link_status = 1;
1752         schedule_work(&adapter->watchdog_task);
1753
1754         if ((adapter->flags & IGB_FLAG_EEE) &&
1755             (!hw->dev_spec._82575.eee_disable))
1756                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1757
1758         return 0;
1759 }
1760
1761 void igb_down(struct igb_adapter *adapter)
1762 {
1763         struct net_device *netdev = adapter->netdev;
1764         struct e1000_hw *hw = &adapter->hw;
1765         u32 tctl, rctl;
1766         int i;
1767
1768         /* signal that we're down so the interrupt handler does not
1769          * reschedule our watchdog timer
1770          */
1771         set_bit(__IGB_DOWN, &adapter->state);
1772
1773         /* disable receives in the hardware */
1774         rctl = rd32(E1000_RCTL);
1775         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1776         /* flush and sleep below */
1777
1778         netif_tx_stop_all_queues(netdev);
1779
1780         /* disable transmits in the hardware */
1781         tctl = rd32(E1000_TCTL);
1782         tctl &= ~E1000_TCTL_EN;
1783         wr32(E1000_TCTL, tctl);
1784         /* flush both disables and wait for them to finish */
1785         wrfl();
1786         usleep_range(10000, 11000);
1787
1788         igb_irq_disable(adapter);
1789
1790         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1791
1792         for (i = 0; i < adapter->num_q_vectors; i++) {
1793                 napi_synchronize(&(adapter->q_vector[i]->napi));
1794                 napi_disable(&(adapter->q_vector[i]->napi));
1795         }
1796
1797
1798         del_timer_sync(&adapter->watchdog_timer);
1799         del_timer_sync(&adapter->phy_info_timer);
1800
1801         netif_carrier_off(netdev);
1802
1803         /* record the stats before reset*/
1804         spin_lock(&adapter->stats64_lock);
1805         igb_update_stats(adapter, &adapter->stats64);
1806         spin_unlock(&adapter->stats64_lock);
1807
1808         adapter->link_speed = 0;
1809         adapter->link_duplex = 0;
1810
1811         if (!pci_channel_offline(adapter->pdev))
1812                 igb_reset(adapter);
1813         igb_clean_all_tx_rings(adapter);
1814         igb_clean_all_rx_rings(adapter);
1815 #ifdef CONFIG_IGB_DCA
1816
1817         /* since we reset the hardware DCA settings were cleared */
1818         igb_setup_dca(adapter);
1819 #endif
1820 }
1821
1822 void igb_reinit_locked(struct igb_adapter *adapter)
1823 {
1824         WARN_ON(in_interrupt());
1825         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1826                 usleep_range(1000, 2000);
1827         igb_down(adapter);
1828         igb_up(adapter);
1829         clear_bit(__IGB_RESETTING, &adapter->state);
1830 }
1831
1832 /** igb_enable_mas - Media Autosense re-enable after swap
1833  *
1834  * @adapter: adapter struct
1835  **/
1836 static s32 igb_enable_mas(struct igb_adapter *adapter)
1837 {
1838         struct e1000_hw *hw = &adapter->hw;
1839         u32 connsw;
1840         s32 ret_val = 0;
1841
1842         connsw = rd32(E1000_CONNSW);
1843         if (!(hw->phy.media_type == e1000_media_type_copper))
1844                 return ret_val;
1845
1846         /* configure for SerDes media detect */
1847         if (!(connsw & E1000_CONNSW_SERDESD)) {
1848                 connsw |= E1000_CONNSW_ENRGSRC;
1849                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1850                 wr32(E1000_CONNSW, connsw);
1851                 wrfl();
1852         } else if (connsw & E1000_CONNSW_SERDESD) {
1853                 /* already SerDes, no need to enable anything */
1854                 return ret_val;
1855         } else {
1856                 netdev_info(adapter->netdev,
1857                         "MAS: Unable to configure feature, disabling..\n");
1858                 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1859         }
1860         return ret_val;
1861 }
1862
1863 void igb_reset(struct igb_adapter *adapter)
1864 {
1865         struct pci_dev *pdev = adapter->pdev;
1866         struct e1000_hw *hw = &adapter->hw;
1867         struct e1000_mac_info *mac = &hw->mac;
1868         struct e1000_fc_info *fc = &hw->fc;
1869         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1870
1871         /* Repartition Pba for greater than 9k mtu
1872          * To take effect CTRL.RST is required.
1873          */
1874         switch (mac->type) {
1875         case e1000_i350:
1876         case e1000_i354:
1877         case e1000_82580:
1878                 pba = rd32(E1000_RXPBS);
1879                 pba = igb_rxpbs_adjust_82580(pba);
1880                 break;
1881         case e1000_82576:
1882                 pba = rd32(E1000_RXPBS);
1883                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1884                 break;
1885         case e1000_82575:
1886         case e1000_i210:
1887         case e1000_i211:
1888         default:
1889                 pba = E1000_PBA_34K;
1890                 break;
1891         }
1892
1893         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1894             (mac->type < e1000_82576)) {
1895                 /* adjust PBA for jumbo frames */
1896                 wr32(E1000_PBA, pba);
1897
1898                 /* To maintain wire speed transmits, the Tx FIFO should be
1899                  * large enough to accommodate two full transmit packets,
1900                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1901                  * the Rx FIFO should be large enough to accommodate at least
1902                  * one full receive packet and is similarly rounded up and
1903                  * expressed in KB.
1904                  */
1905                 pba = rd32(E1000_PBA);
1906                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1907                 tx_space = pba >> 16;
1908                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1909                 pba &= 0xffff;
1910                 /* the Tx fifo also stores 16 bytes of information about the Tx
1911                  * but don't include ethernet FCS because hardware appends it
1912                  */
1913                 min_tx_space = (adapter->max_frame_size +
1914                                 sizeof(union e1000_adv_tx_desc) -
1915                                 ETH_FCS_LEN) * 2;
1916                 min_tx_space = ALIGN(min_tx_space, 1024);
1917                 min_tx_space >>= 10;
1918                 /* software strips receive CRC, so leave room for it */
1919                 min_rx_space = adapter->max_frame_size;
1920                 min_rx_space = ALIGN(min_rx_space, 1024);
1921                 min_rx_space >>= 10;
1922
1923                 /* If current Tx allocation is less than the min Tx FIFO size,
1924                  * and the min Tx FIFO size is less than the current Rx FIFO
1925                  * allocation, take space away from current Rx allocation
1926                  */
1927                 if (tx_space < min_tx_space &&
1928                     ((min_tx_space - tx_space) < pba)) {
1929                         pba = pba - (min_tx_space - tx_space);
1930
1931                         /* if short on Rx space, Rx wins and must trump Tx
1932                          * adjustment
1933                          */
1934                         if (pba < min_rx_space)
1935                                 pba = min_rx_space;
1936                 }
1937                 wr32(E1000_PBA, pba);
1938         }
1939
1940         /* flow control settings */
1941         /* The high water mark must be low enough to fit one full frame
1942          * (or the size used for early receive) above it in the Rx FIFO.
1943          * Set it to the lower of:
1944          * - 90% of the Rx FIFO size, or
1945          * - the full Rx FIFO size minus one full frame
1946          */
1947         hwm = min(((pba << 10) * 9 / 10),
1948                         ((pba << 10) - 2 * adapter->max_frame_size));
1949
1950         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1951         fc->low_water = fc->high_water - 16;
1952         fc->pause_time = 0xFFFF;
1953         fc->send_xon = 1;
1954         fc->current_mode = fc->requested_mode;
1955
1956         /* disable receive for all VFs and wait one second */
1957         if (adapter->vfs_allocated_count) {
1958                 int i;
1959
1960                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1961                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1962
1963                 /* ping all the active vfs to let them know we are going down */
1964                 igb_ping_all_vfs(adapter);
1965
1966                 /* disable transmits and receives */
1967                 wr32(E1000_VFRE, 0);
1968                 wr32(E1000_VFTE, 0);
1969         }
1970
1971         /* Allow time for pending master requests to run */
1972         hw->mac.ops.reset_hw(hw);
1973         wr32(E1000_WUC, 0);
1974
1975         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1976                 /* need to resetup here after media swap */
1977                 adapter->ei.get_invariants(hw);
1978                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1979         }
1980         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1981                 if (igb_enable_mas(adapter))
1982                         dev_err(&pdev->dev,
1983                                 "Error enabling Media Auto Sense\n");
1984         }
1985         if (hw->mac.ops.init_hw(hw))
1986                 dev_err(&pdev->dev, "Hardware Error\n");
1987
1988         /* Flow control settings reset on hardware reset, so guarantee flow
1989          * control is off when forcing speed.
1990          */
1991         if (!hw->mac.autoneg)
1992                 igb_force_mac_fc(hw);
1993
1994         igb_init_dmac(adapter, pba);
1995 #ifdef CONFIG_IGB_HWMON
1996         /* Re-initialize the thermal sensor on i350 devices. */
1997         if (!test_bit(__IGB_DOWN, &adapter->state)) {
1998                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1999                         /* If present, re-initialize the external thermal sensor
2000                          * interface.
2001                          */
2002                         if (adapter->ets)
2003                                 mac->ops.init_thermal_sensor_thresh(hw);
2004                 }
2005         }
2006 #endif
2007         /* Re-establish EEE setting */
2008         if (hw->phy.media_type == e1000_media_type_copper) {
2009                 switch (mac->type) {
2010                 case e1000_i350:
2011                 case e1000_i210:
2012                 case e1000_i211:
2013                         igb_set_eee_i350(hw);
2014                         break;
2015                 case e1000_i354:
2016                         igb_set_eee_i354(hw);
2017                         break;
2018                 default:
2019                         break;
2020                 }
2021         }
2022         if (!netif_running(adapter->netdev))
2023                 igb_power_down_link(adapter);
2024
2025         igb_update_mng_vlan(adapter);
2026
2027         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2028         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2029
2030         /* Re-enable PTP, where applicable. */
2031         igb_ptp_reset(adapter);
2032
2033         igb_get_phy_info(hw);
2034 }
2035
2036 static netdev_features_t igb_fix_features(struct net_device *netdev,
2037         netdev_features_t features)
2038 {
2039         /* Since there is no support for separate Rx/Tx vlan accel
2040          * enable/disable make sure Tx flag is always in same state as Rx.
2041          */
2042         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2043                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2044         else
2045                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2046
2047         return features;
2048 }
2049
2050 static int igb_set_features(struct net_device *netdev,
2051         netdev_features_t features)
2052 {
2053         netdev_features_t changed = netdev->features ^ features;
2054         struct igb_adapter *adapter = netdev_priv(netdev);
2055
2056         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2057                 igb_vlan_mode(netdev, features);
2058
2059         if (!(changed & NETIF_F_RXALL))
2060                 return 0;
2061
2062         netdev->features = features;
2063
2064         if (netif_running(netdev))
2065                 igb_reinit_locked(adapter);
2066         else
2067                 igb_reset(adapter);
2068
2069         return 0;
2070 }
2071
2072 static const struct net_device_ops igb_netdev_ops = {
2073         .ndo_open               = igb_open,
2074         .ndo_stop               = igb_close,
2075         .ndo_start_xmit         = igb_xmit_frame,
2076         .ndo_get_stats64        = igb_get_stats64,
2077         .ndo_set_rx_mode        = igb_set_rx_mode,
2078         .ndo_set_mac_address    = igb_set_mac,
2079         .ndo_change_mtu         = igb_change_mtu,
2080         .ndo_do_ioctl           = igb_ioctl,
2081         .ndo_tx_timeout         = igb_tx_timeout,
2082         .ndo_validate_addr      = eth_validate_addr,
2083         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2084         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2085         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2086         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2087         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2088         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2089         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2090 #ifdef CONFIG_NET_POLL_CONTROLLER
2091         .ndo_poll_controller    = igb_netpoll,
2092 #endif
2093         .ndo_fix_features       = igb_fix_features,
2094         .ndo_set_features       = igb_set_features,
2095 };
2096
2097 /**
2098  * igb_set_fw_version - Configure version string for ethtool
2099  * @adapter: adapter struct
2100  **/
2101 void igb_set_fw_version(struct igb_adapter *adapter)
2102 {
2103         struct e1000_hw *hw = &adapter->hw;
2104         struct e1000_fw_version fw;
2105
2106         igb_get_fw_version(hw, &fw);
2107
2108         switch (hw->mac.type) {
2109         case e1000_i210:
2110         case e1000_i211:
2111                 if (!(igb_get_flash_presence_i210(hw))) {
2112                         snprintf(adapter->fw_version,
2113                                  sizeof(adapter->fw_version),
2114                                  "%2d.%2d-%d",
2115                                  fw.invm_major, fw.invm_minor,
2116                                  fw.invm_img_type);
2117                         break;
2118                 }
2119                 /* fall through */
2120         default:
2121                 /* if option is rom valid, display its version too */
2122                 if (fw.or_valid) {
2123                         snprintf(adapter->fw_version,
2124                                  sizeof(adapter->fw_version),
2125                                  "%d.%d, 0x%08x, %d.%d.%d",
2126                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2127                                  fw.or_major, fw.or_build, fw.or_patch);
2128                 /* no option rom */
2129                 } else if (fw.etrack_id != 0X0000) {
2130                         snprintf(adapter->fw_version,
2131                             sizeof(adapter->fw_version),
2132                             "%d.%d, 0x%08x",
2133                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2134                 } else {
2135                 snprintf(adapter->fw_version,
2136                     sizeof(adapter->fw_version),
2137                     "%d.%d.%d",
2138                     fw.eep_major, fw.eep_minor, fw.eep_build);
2139                 }
2140                 break;
2141         }
2142 }
2143
2144 /**
2145  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2146  *
2147  * @adapter: adapter struct
2148  **/
2149 static void igb_init_mas(struct igb_adapter *adapter)
2150 {
2151         struct e1000_hw *hw = &adapter->hw;
2152         u16 eeprom_data;
2153
2154         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2155         switch (hw->bus.func) {
2156         case E1000_FUNC_0:
2157                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2158                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2159                         netdev_info(adapter->netdev,
2160                                 "MAS: Enabling Media Autosense for port %d\n",
2161                                 hw->bus.func);
2162                 }
2163                 break;
2164         case E1000_FUNC_1:
2165                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2166                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2167                         netdev_info(adapter->netdev,
2168                                 "MAS: Enabling Media Autosense for port %d\n",
2169                                 hw->bus.func);
2170                 }
2171                 break;
2172         case E1000_FUNC_2:
2173                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2174                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2175                         netdev_info(adapter->netdev,
2176                                 "MAS: Enabling Media Autosense for port %d\n",
2177                                 hw->bus.func);
2178                 }
2179                 break;
2180         case E1000_FUNC_3:
2181                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2182                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2183                         netdev_info(adapter->netdev,
2184                                 "MAS: Enabling Media Autosense for port %d\n",
2185                                 hw->bus.func);
2186                 }
2187                 break;
2188         default:
2189                 /* Shouldn't get here */
2190                 netdev_err(adapter->netdev,
2191                         "MAS: Invalid port configuration, returning\n");
2192                 break;
2193         }
2194 }
2195
2196 /**
2197  *  igb_init_i2c - Init I2C interface
2198  *  @adapter: pointer to adapter structure
2199  **/
2200 static s32 igb_init_i2c(struct igb_adapter *adapter)
2201 {
2202         s32 status = 0;
2203
2204         /* I2C interface supported on i350 devices */
2205         if (adapter->hw.mac.type != e1000_i350)
2206                 return 0;
2207
2208         /* Initialize the i2c bus which is controlled by the registers.
2209          * This bus will use the i2c_algo_bit structue that implements
2210          * the protocol through toggling of the 4 bits in the register.
2211          */
2212         adapter->i2c_adap.owner = THIS_MODULE;
2213         adapter->i2c_algo = igb_i2c_algo;
2214         adapter->i2c_algo.data = adapter;
2215         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2216         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2217         strlcpy(adapter->i2c_adap.name, "igb BB",
2218                 sizeof(adapter->i2c_adap.name));
2219         status = i2c_bit_add_bus(&adapter->i2c_adap);
2220         return status;
2221 }
2222
2223 /**
2224  *  igb_probe - Device Initialization Routine
2225  *  @pdev: PCI device information struct
2226  *  @ent: entry in igb_pci_tbl
2227  *
2228  *  Returns 0 on success, negative on failure
2229  *
2230  *  igb_probe initializes an adapter identified by a pci_dev structure.
2231  *  The OS initialization, configuring of the adapter private structure,
2232  *  and a hardware reset occur.
2233  **/
2234 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2235 {
2236         struct net_device *netdev;
2237         struct igb_adapter *adapter;
2238         struct e1000_hw *hw;
2239         u16 eeprom_data = 0;
2240         s32 ret_val;
2241         static int global_quad_port_a; /* global quad port a indication */
2242         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2243         int err, pci_using_dac;
2244         u8 part_str[E1000_PBANUM_LENGTH];
2245
2246         /* Catch broken hardware that put the wrong VF device ID in
2247          * the PCIe SR-IOV capability.
2248          */
2249         if (pdev->is_virtfn) {
2250                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2251                         pci_name(pdev), pdev->vendor, pdev->device);
2252                 return -EINVAL;
2253         }
2254
2255         err = pci_enable_device_mem(pdev);
2256         if (err)
2257                 return err;
2258
2259         pci_using_dac = 0;
2260         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2261         if (!err) {
2262                 pci_using_dac = 1;
2263         } else {
2264                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2265                 if (err) {
2266                         dev_err(&pdev->dev,
2267                                 "No usable DMA configuration, aborting\n");
2268                         goto err_dma;
2269                 }
2270         }
2271
2272         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2273                                            IORESOURCE_MEM),
2274                                            igb_driver_name);
2275         if (err)
2276                 goto err_pci_reg;
2277
2278         pci_enable_pcie_error_reporting(pdev);
2279
2280         pci_set_master(pdev);
2281         pci_save_state(pdev);
2282
2283         err = -ENOMEM;
2284         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2285                                    IGB_MAX_TX_QUEUES);
2286         if (!netdev)
2287                 goto err_alloc_etherdev;
2288
2289         SET_NETDEV_DEV(netdev, &pdev->dev);
2290
2291         pci_set_drvdata(pdev, netdev);
2292         adapter = netdev_priv(netdev);
2293         adapter->netdev = netdev;
2294         adapter->pdev = pdev;
2295         hw = &adapter->hw;
2296         hw->back = adapter;
2297         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2298
2299         err = -EIO;
2300         hw->hw_addr = pci_iomap(pdev, 0, 0);
2301         if (!hw->hw_addr)
2302                 goto err_ioremap;
2303
2304         netdev->netdev_ops = &igb_netdev_ops;
2305         igb_set_ethtool_ops(netdev);
2306         netdev->watchdog_timeo = 5 * HZ;
2307
2308         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2309
2310         netdev->mem_start = pci_resource_start(pdev, 0);
2311         netdev->mem_end = pci_resource_end(pdev, 0);
2312
2313         /* PCI config space info */
2314         hw->vendor_id = pdev->vendor;
2315         hw->device_id = pdev->device;
2316         hw->revision_id = pdev->revision;
2317         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2318         hw->subsystem_device_id = pdev->subsystem_device;
2319
2320         /* Copy the default MAC, PHY and NVM function pointers */
2321         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2322         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2323         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2324         /* Initialize skew-specific constants */
2325         err = ei->get_invariants(hw);
2326         if (err)
2327                 goto err_sw_init;
2328
2329         /* setup the private structure */
2330         err = igb_sw_init(adapter);
2331         if (err)
2332                 goto err_sw_init;
2333
2334         igb_get_bus_info_pcie(hw);
2335
2336         hw->phy.autoneg_wait_to_complete = false;
2337
2338         /* Copper options */
2339         if (hw->phy.media_type == e1000_media_type_copper) {
2340                 hw->phy.mdix = AUTO_ALL_MODES;
2341                 hw->phy.disable_polarity_correction = false;
2342                 hw->phy.ms_type = e1000_ms_hw_default;
2343         }
2344
2345         if (igb_check_reset_block(hw))
2346                 dev_info(&pdev->dev,
2347                         "PHY reset is blocked due to SOL/IDER session.\n");
2348
2349         /* features is initialized to 0 in allocation, it might have bits
2350          * set by igb_sw_init so we should use an or instead of an
2351          * assignment.
2352          */
2353         netdev->features |= NETIF_F_SG |
2354                             NETIF_F_IP_CSUM |
2355                             NETIF_F_IPV6_CSUM |
2356                             NETIF_F_TSO |
2357                             NETIF_F_TSO6 |
2358                             NETIF_F_RXHASH |
2359                             NETIF_F_RXCSUM |
2360                             NETIF_F_HW_VLAN_CTAG_RX |
2361                             NETIF_F_HW_VLAN_CTAG_TX;
2362
2363         /* copy netdev features into list of user selectable features */
2364         netdev->hw_features |= netdev->features;
2365         netdev->hw_features |= NETIF_F_RXALL;
2366
2367         /* set this bit last since it cannot be part of hw_features */
2368         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2369
2370         netdev->vlan_features |= NETIF_F_TSO |
2371                                  NETIF_F_TSO6 |
2372                                  NETIF_F_IP_CSUM |
2373                                  NETIF_F_IPV6_CSUM |
2374                                  NETIF_F_SG;
2375
2376         netdev->priv_flags |= IFF_SUPP_NOFCS;
2377
2378         if (pci_using_dac) {
2379                 netdev->features |= NETIF_F_HIGHDMA;
2380                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2381         }
2382
2383         if (hw->mac.type >= e1000_82576) {
2384                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2385                 netdev->features |= NETIF_F_SCTP_CSUM;
2386         }
2387
2388         netdev->priv_flags |= IFF_UNICAST_FLT;
2389
2390         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2391
2392         /* before reading the NVM, reset the controller to put the device in a
2393          * known good starting state
2394          */
2395         hw->mac.ops.reset_hw(hw);
2396
2397         /* make sure the NVM is good , i211/i210 parts can have special NVM
2398          * that doesn't contain a checksum
2399          */
2400         switch (hw->mac.type) {
2401         case e1000_i210:
2402         case e1000_i211:
2403                 if (igb_get_flash_presence_i210(hw)) {
2404                         if (hw->nvm.ops.validate(hw) < 0) {
2405                                 dev_err(&pdev->dev,
2406                                         "The NVM Checksum Is Not Valid\n");
2407                                 err = -EIO;
2408                                 goto err_eeprom;
2409                         }
2410                 }
2411                 break;
2412         default:
2413                 if (hw->nvm.ops.validate(hw) < 0) {
2414                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2415                         err = -EIO;
2416                         goto err_eeprom;
2417                 }
2418                 break;
2419         }
2420
2421         /* copy the MAC address out of the NVM */
2422         if (hw->mac.ops.read_mac_addr(hw))
2423                 dev_err(&pdev->dev, "NVM Read Error\n");
2424
2425         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2426
2427         if (!is_valid_ether_addr(netdev->dev_addr)) {
2428                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2429                 err = -EIO;
2430                 goto err_eeprom;
2431         }
2432
2433         /* get firmware version for ethtool -i */
2434         igb_set_fw_version(adapter);
2435
2436         /* configure RXPBSIZE and TXPBSIZE */
2437         if (hw->mac.type == e1000_i210) {
2438                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
2439                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
2440         }
2441
2442         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2443                     (unsigned long) adapter);
2444         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2445                     (unsigned long) adapter);
2446
2447         INIT_WORK(&adapter->reset_task, igb_reset_task);
2448         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2449
2450         /* Initialize link properties that are user-changeable */
2451         adapter->fc_autoneg = true;
2452         hw->mac.autoneg = true;
2453         hw->phy.autoneg_advertised = 0x2f;
2454
2455         hw->fc.requested_mode = e1000_fc_default;
2456         hw->fc.current_mode = e1000_fc_default;
2457
2458         igb_validate_mdi_setting(hw);
2459
2460         /* By default, support wake on port A */
2461         if (hw->bus.func == 0)
2462                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2463
2464         /* Check the NVM for wake support on non-port A ports */
2465         if (hw->mac.type >= e1000_82580)
2466                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2467                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2468                                  &eeprom_data);
2469         else if (hw->bus.func == 1)
2470                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2471
2472         if (eeprom_data & IGB_EEPROM_APME)
2473                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2474
2475         /* now that we have the eeprom settings, apply the special cases where
2476          * the eeprom may be wrong or the board simply won't support wake on
2477          * lan on a particular port
2478          */
2479         switch (pdev->device) {
2480         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2481                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2482                 break;
2483         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2484         case E1000_DEV_ID_82576_FIBER:
2485         case E1000_DEV_ID_82576_SERDES:
2486                 /* Wake events only supported on port A for dual fiber
2487                  * regardless of eeprom setting
2488                  */
2489                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2490                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2491                 break;
2492         case E1000_DEV_ID_82576_QUAD_COPPER:
2493         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2494                 /* if quad port adapter, disable WoL on all but port A */
2495                 if (global_quad_port_a != 0)
2496                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2497                 else
2498                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2499                 /* Reset for multiple quad port adapters */
2500                 if (++global_quad_port_a == 4)
2501                         global_quad_port_a = 0;
2502                 break;
2503         default:
2504                 /* If the device can't wake, don't set software support */
2505                 if (!device_can_wakeup(&adapter->pdev->dev))
2506                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2507         }
2508
2509         /* initialize the wol settings based on the eeprom settings */
2510         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2511                 adapter->wol |= E1000_WUFC_MAG;
2512
2513         /* Some vendors want WoL disabled by default, but still supported */
2514         if ((hw->mac.type == e1000_i350) &&
2515             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2516                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2517                 adapter->wol = 0;
2518         }
2519
2520         device_set_wakeup_enable(&adapter->pdev->dev,
2521                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2522
2523         /* reset the hardware with the new settings */
2524         igb_reset(adapter);
2525
2526         /* Init the I2C interface */
2527         err = igb_init_i2c(adapter);
2528         if (err) {
2529                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2530                 goto err_eeprom;
2531         }
2532
2533         /* let the f/w know that the h/w is now under the control of the
2534          * driver.
2535          */
2536         igb_get_hw_control(adapter);
2537
2538         strcpy(netdev->name, "eth%d");
2539         err = register_netdev(netdev);
2540         if (err)
2541                 goto err_register;
2542
2543         /* carrier off reporting is important to ethtool even BEFORE open */
2544         netif_carrier_off(netdev);
2545
2546 #ifdef CONFIG_IGB_DCA
2547         if (dca_add_requester(&pdev->dev) == 0) {
2548                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2549                 dev_info(&pdev->dev, "DCA enabled\n");
2550                 igb_setup_dca(adapter);
2551         }
2552
2553 #endif
2554 #ifdef CONFIG_IGB_HWMON
2555         /* Initialize the thermal sensor on i350 devices. */
2556         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2557                 u16 ets_word;
2558
2559                 /* Read the NVM to determine if this i350 device supports an
2560                  * external thermal sensor.
2561                  */
2562                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2563                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2564                         adapter->ets = true;
2565                 else
2566                         adapter->ets = false;
2567                 if (igb_sysfs_init(adapter))
2568                         dev_err(&pdev->dev,
2569                                 "failed to allocate sysfs resources\n");
2570         } else {
2571                 adapter->ets = false;
2572         }
2573 #endif
2574         /* Check if Media Autosense is enabled */
2575         adapter->ei = *ei;
2576         if (hw->dev_spec._82575.mas_capable)
2577                 igb_init_mas(adapter);
2578
2579         /* do hw tstamp init after resetting */
2580         igb_ptp_init(adapter);
2581
2582         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2583         /* print bus type/speed/width info, not applicable to i354 */
2584         if (hw->mac.type != e1000_i354) {
2585                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2586                          netdev->name,
2587                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2588                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2589                            "unknown"),
2590                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2591                           "Width x4" :
2592                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2593                           "Width x2" :
2594                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2595                           "Width x1" : "unknown"), netdev->dev_addr);
2596         }
2597
2598         if ((hw->mac.type >= e1000_i210 ||
2599              igb_get_flash_presence_i210(hw))) {
2600                 ret_val = igb_read_part_string(hw, part_str,
2601                                                E1000_PBANUM_LENGTH);
2602         } else {
2603                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2604         }
2605
2606         if (ret_val)
2607                 strcpy(part_str, "Unknown");
2608         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2609         dev_info(&pdev->dev,
2610                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2611                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
2612                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2613                 adapter->num_rx_queues, adapter->num_tx_queues);
2614         if (hw->phy.media_type == e1000_media_type_copper) {
2615                 switch (hw->mac.type) {
2616                 case e1000_i350:
2617                 case e1000_i210:
2618                 case e1000_i211:
2619                         /* Enable EEE for internal copper PHY devices */
2620                         err = igb_set_eee_i350(hw);
2621                         if ((!err) &&
2622                             (!hw->dev_spec._82575.eee_disable)) {
2623                                 adapter->eee_advert =
2624                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2625                                 adapter->flags |= IGB_FLAG_EEE;
2626                         }
2627                         break;
2628                 case e1000_i354:
2629                         if ((rd32(E1000_CTRL_EXT) &
2630                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2631                                 err = igb_set_eee_i354(hw);
2632                                 if ((!err) &&
2633                                         (!hw->dev_spec._82575.eee_disable)) {
2634                                         adapter->eee_advert =
2635                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2636                                         adapter->flags |= IGB_FLAG_EEE;
2637                                 }
2638                         }
2639                         break;
2640                 default:
2641                         break;
2642                 }
2643         }
2644         pm_runtime_put_noidle(&pdev->dev);
2645         return 0;
2646
2647 err_register:
2648         igb_release_hw_control(adapter);
2649         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2650 err_eeprom:
2651         if (!igb_check_reset_block(hw))
2652                 igb_reset_phy(hw);
2653
2654         if (hw->flash_address)
2655                 iounmap(hw->flash_address);
2656 err_sw_init:
2657         igb_clear_interrupt_scheme(adapter);
2658         pci_iounmap(pdev, hw->hw_addr);
2659 err_ioremap:
2660         free_netdev(netdev);
2661 err_alloc_etherdev:
2662         pci_release_selected_regions(pdev,
2663                                      pci_select_bars(pdev, IORESOURCE_MEM));
2664 err_pci_reg:
2665 err_dma:
2666         pci_disable_device(pdev);
2667         return err;
2668 }
2669
2670 #ifdef CONFIG_PCI_IOV
2671 static int igb_disable_sriov(struct pci_dev *pdev)
2672 {
2673         struct net_device *netdev = pci_get_drvdata(pdev);
2674         struct igb_adapter *adapter = netdev_priv(netdev);
2675         struct e1000_hw *hw = &adapter->hw;
2676
2677         /* reclaim resources allocated to VFs */
2678         if (adapter->vf_data) {
2679                 /* disable iov and allow time for transactions to clear */
2680                 if (pci_vfs_assigned(pdev)) {
2681                         dev_warn(&pdev->dev,
2682                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2683                         return -EPERM;
2684                 } else {
2685                         pci_disable_sriov(pdev);
2686                         msleep(500);
2687                 }
2688
2689                 kfree(adapter->vf_data);
2690                 adapter->vf_data = NULL;
2691                 adapter->vfs_allocated_count = 0;
2692                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2693                 wrfl();
2694                 msleep(100);
2695                 dev_info(&pdev->dev, "IOV Disabled\n");
2696
2697                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2698                 adapter->flags |= IGB_FLAG_DMAC;
2699         }
2700
2701         return 0;
2702 }
2703
2704 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2705 {
2706         struct net_device *netdev = pci_get_drvdata(pdev);
2707         struct igb_adapter *adapter = netdev_priv(netdev);
2708         int old_vfs = pci_num_vf(pdev);
2709         int err = 0;
2710         int i;
2711
2712         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
2713                 err = -EPERM;
2714                 goto out;
2715         }
2716         if (!num_vfs)
2717                 goto out;
2718
2719         if (old_vfs) {
2720                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2721                          old_vfs, max_vfs);
2722                 adapter->vfs_allocated_count = old_vfs;
2723         } else
2724                 adapter->vfs_allocated_count = num_vfs;
2725
2726         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2727                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2728
2729         /* if allocation failed then we do not support SR-IOV */
2730         if (!adapter->vf_data) {
2731                 adapter->vfs_allocated_count = 0;
2732                 dev_err(&pdev->dev,
2733                         "Unable to allocate memory for VF Data Storage\n");
2734                 err = -ENOMEM;
2735                 goto out;
2736         }
2737
2738         /* only call pci_enable_sriov() if no VFs are allocated already */
2739         if (!old_vfs) {
2740                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2741                 if (err)
2742                         goto err_out;
2743         }
2744         dev_info(&pdev->dev, "%d VFs allocated\n",
2745                  adapter->vfs_allocated_count);
2746         for (i = 0; i < adapter->vfs_allocated_count; i++)
2747                 igb_vf_configure(adapter, i);
2748
2749         /* DMA Coalescing is not supported in IOV mode. */
2750         adapter->flags &= ~IGB_FLAG_DMAC;
2751         goto out;
2752
2753 err_out:
2754         kfree(adapter->vf_data);
2755         adapter->vf_data = NULL;
2756         adapter->vfs_allocated_count = 0;
2757 out:
2758         return err;
2759 }
2760
2761 #endif
2762 /**
2763  *  igb_remove_i2c - Cleanup  I2C interface
2764  *  @adapter: pointer to adapter structure
2765  **/
2766 static void igb_remove_i2c(struct igb_adapter *adapter)
2767 {
2768         /* free the adapter bus structure */
2769         i2c_del_adapter(&adapter->i2c_adap);
2770 }
2771
2772 /**
2773  *  igb_remove - Device Removal Routine
2774  *  @pdev: PCI device information struct
2775  *
2776  *  igb_remove is called by the PCI subsystem to alert the driver
2777  *  that it should release a PCI device.  The could be caused by a
2778  *  Hot-Plug event, or because the driver is going to be removed from
2779  *  memory.
2780  **/
2781 static void igb_remove(struct pci_dev *pdev)
2782 {
2783         struct net_device *netdev = pci_get_drvdata(pdev);
2784         struct igb_adapter *adapter = netdev_priv(netdev);
2785         struct e1000_hw *hw = &adapter->hw;
2786
2787         pm_runtime_get_noresume(&pdev->dev);
2788 #ifdef CONFIG_IGB_HWMON
2789         igb_sysfs_exit(adapter);
2790 #endif
2791         igb_remove_i2c(adapter);
2792         igb_ptp_stop(adapter);
2793         /* The watchdog timer may be rescheduled, so explicitly
2794          * disable watchdog from being rescheduled.
2795          */
2796         set_bit(__IGB_DOWN, &adapter->state);
2797         del_timer_sync(&adapter->watchdog_timer);
2798         del_timer_sync(&adapter->phy_info_timer);
2799
2800         cancel_work_sync(&adapter->reset_task);
2801         cancel_work_sync(&adapter->watchdog_task);
2802
2803 #ifdef CONFIG_IGB_DCA
2804         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2805                 dev_info(&pdev->dev, "DCA disabled\n");
2806                 dca_remove_requester(&pdev->dev);
2807                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2808                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2809         }
2810 #endif
2811
2812         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2813          * would have already happened in close and is redundant.
2814          */
2815         igb_release_hw_control(adapter);
2816
2817         unregister_netdev(netdev);
2818
2819         igb_clear_interrupt_scheme(adapter);
2820
2821 #ifdef CONFIG_PCI_IOV
2822         igb_disable_sriov(pdev);
2823 #endif
2824
2825         pci_iounmap(pdev, hw->hw_addr);
2826         if (hw->flash_address)
2827                 iounmap(hw->flash_address);
2828         pci_release_selected_regions(pdev,
2829                                      pci_select_bars(pdev, IORESOURCE_MEM));
2830
2831         kfree(adapter->shadow_vfta);
2832         free_netdev(netdev);
2833
2834         pci_disable_pcie_error_reporting(pdev);
2835
2836         pci_disable_device(pdev);
2837 }
2838
2839 /**
2840  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2841  *  @adapter: board private structure to initialize
2842  *
2843  *  This function initializes the vf specific data storage and then attempts to
2844  *  allocate the VFs.  The reason for ordering it this way is because it is much
2845  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2846  *  the memory for the VFs.
2847  **/
2848 static void igb_probe_vfs(struct igb_adapter *adapter)
2849 {
2850 #ifdef CONFIG_PCI_IOV
2851         struct pci_dev *pdev = adapter->pdev;
2852         struct e1000_hw *hw = &adapter->hw;
2853
2854         /* Virtualization features not supported on i210 family. */
2855         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2856                 return;
2857
2858         pci_sriov_set_totalvfs(pdev, 7);
2859         igb_pci_enable_sriov(pdev, max_vfs);
2860
2861 #endif /* CONFIG_PCI_IOV */
2862 }
2863
2864 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2865 {
2866         struct e1000_hw *hw = &adapter->hw;
2867         u32 max_rss_queues;
2868
2869         /* Determine the maximum number of RSS queues supported. */
2870         switch (hw->mac.type) {
2871         case e1000_i211:
2872                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2873                 break;
2874         case e1000_82575:
2875         case e1000_i210:
2876                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2877                 break;
2878         case e1000_i350:
2879                 /* I350 cannot do RSS and SR-IOV at the same time */
2880                 if (!!adapter->vfs_allocated_count) {
2881                         max_rss_queues = 1;
2882                         break;
2883                 }
2884                 /* fall through */
2885         case e1000_82576:
2886                 if (!!adapter->vfs_allocated_count) {
2887                         max_rss_queues = 2;
2888                         break;
2889                 }
2890                 /* fall through */
2891         case e1000_82580:
2892         case e1000_i354:
2893         default:
2894                 max_rss_queues = IGB_MAX_RX_QUEUES;
2895                 break;
2896         }
2897
2898         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2899
2900         /* Determine if we need to pair queues. */
2901         switch (hw->mac.type) {
2902         case e1000_82575:
2903         case e1000_i211:
2904                 /* Device supports enough interrupts without queue pairing. */
2905                 break;
2906         case e1000_82576:
2907                 /* If VFs are going to be allocated with RSS queues then we
2908                  * should pair the queues in order to conserve interrupts due
2909                  * to limited supply.
2910                  */
2911                 if ((adapter->rss_queues > 1) &&
2912                     (adapter->vfs_allocated_count > 6))
2913                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2914                 /* fall through */
2915         case e1000_82580:
2916         case e1000_i350:
2917         case e1000_i354:
2918         case e1000_i210:
2919         default:
2920                 /* If rss_queues > half of max_rss_queues, pair the queues in
2921                  * order to conserve interrupts due to limited supply.
2922                  */
2923                 if (adapter->rss_queues > (max_rss_queues / 2))
2924                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2925                 break;
2926         }
2927 }
2928
2929 /**
2930  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2931  *  @adapter: board private structure to initialize
2932  *
2933  *  igb_sw_init initializes the Adapter private data structure.
2934  *  Fields are initialized based on PCI device information and
2935  *  OS network device settings (MTU size).
2936  **/
2937 static int igb_sw_init(struct igb_adapter *adapter)
2938 {
2939         struct e1000_hw *hw = &adapter->hw;
2940         struct net_device *netdev = adapter->netdev;
2941         struct pci_dev *pdev = adapter->pdev;
2942
2943         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2944
2945         /* set default ring sizes */
2946         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2947         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2948
2949         /* set default ITR values */
2950         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2951         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2952
2953         /* set default work limits */
2954         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2955
2956         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2957                                   VLAN_HLEN;
2958         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2959
2960         spin_lock_init(&adapter->stats64_lock);
2961 #ifdef CONFIG_PCI_IOV
2962         switch (hw->mac.type) {
2963         case e1000_82576:
2964         case e1000_i350:
2965                 if (max_vfs > 7) {
2966                         dev_warn(&pdev->dev,
2967                                  "Maximum of 7 VFs per PF, using max\n");
2968                         max_vfs = adapter->vfs_allocated_count = 7;
2969                 } else
2970                         adapter->vfs_allocated_count = max_vfs;
2971                 if (adapter->vfs_allocated_count)
2972                         dev_warn(&pdev->dev,
2973                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2974                 break;
2975         default:
2976                 break;
2977         }
2978 #endif /* CONFIG_PCI_IOV */
2979
2980         igb_init_queue_configuration(adapter);
2981
2982         /* Setup and initialize a copy of the hw vlan table array */
2983         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2984                                        GFP_ATOMIC);
2985
2986         /* This call may decrease the number of queues */
2987         if (igb_init_interrupt_scheme(adapter, true)) {
2988                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2989                 return -ENOMEM;
2990         }
2991
2992         igb_probe_vfs(adapter);
2993
2994         /* Explicitly disable IRQ since the NIC can be in any state. */
2995         igb_irq_disable(adapter);
2996
2997         if (hw->mac.type >= e1000_i350)
2998                 adapter->flags &= ~IGB_FLAG_DMAC;
2999
3000         set_bit(__IGB_DOWN, &adapter->state);
3001         return 0;
3002 }
3003
3004 /**
3005  *  igb_open - Called when a network interface is made active
3006  *  @netdev: network interface device structure
3007  *
3008  *  Returns 0 on success, negative value on failure
3009  *
3010  *  The open entry point is called when a network interface is made
3011  *  active by the system (IFF_UP).  At this point all resources needed
3012  *  for transmit and receive operations are allocated, the interrupt
3013  *  handler is registered with the OS, the watchdog timer is started,
3014  *  and the stack is notified that the interface is ready.
3015  **/
3016 static int __igb_open(struct net_device *netdev, bool resuming)
3017 {
3018         struct igb_adapter *adapter = netdev_priv(netdev);
3019         struct e1000_hw *hw = &adapter->hw;
3020         struct pci_dev *pdev = adapter->pdev;
3021         int err;
3022         int i;
3023
3024         /* disallow open during test */
3025         if (test_bit(__IGB_TESTING, &adapter->state)) {
3026                 WARN_ON(resuming);
3027                 return -EBUSY;
3028         }
3029
3030         if (!resuming)
3031                 pm_runtime_get_sync(&pdev->dev);
3032
3033         netif_carrier_off(netdev);
3034
3035         /* allocate transmit descriptors */
3036         err = igb_setup_all_tx_resources(adapter);
3037         if (err)
3038                 goto err_setup_tx;
3039
3040         /* allocate receive descriptors */
3041         err = igb_setup_all_rx_resources(adapter);
3042         if (err)
3043                 goto err_setup_rx;
3044
3045         igb_power_up_link(adapter);
3046
3047         /* before we allocate an interrupt, we must be ready to handle it.
3048          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3049          * as soon as we call pci_request_irq, so we have to setup our
3050          * clean_rx handler before we do so.
3051          */
3052         igb_configure(adapter);
3053
3054         err = igb_request_irq(adapter);
3055         if (err)
3056                 goto err_req_irq;
3057
3058         /* Notify the stack of the actual queue counts. */
3059         err = netif_set_real_num_tx_queues(adapter->netdev,
3060                                            adapter->num_tx_queues);
3061         if (err)
3062                 goto err_set_queues;
3063
3064         err = netif_set_real_num_rx_queues(adapter->netdev,
3065                                            adapter->num_rx_queues);
3066         if (err)
3067                 goto err_set_queues;
3068
3069         /* From here on the code is the same as igb_up() */
3070         clear_bit(__IGB_DOWN, &adapter->state);
3071
3072         for (i = 0; i < adapter->num_q_vectors; i++)
3073                 napi_enable(&(adapter->q_vector[i]->napi));
3074
3075         /* Clear any pending interrupts. */
3076         rd32(E1000_ICR);
3077
3078         igb_irq_enable(adapter);
3079
3080         /* notify VFs that reset has been completed */
3081         if (adapter->vfs_allocated_count) {
3082                 u32 reg_data = rd32(E1000_CTRL_EXT);
3083
3084                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3085                 wr32(E1000_CTRL_EXT, reg_data);
3086         }
3087
3088         netif_tx_start_all_queues(netdev);
3089
3090         if (!resuming)
3091                 pm_runtime_put(&pdev->dev);
3092
3093         /* start the watchdog. */
3094         hw->mac.get_link_status = 1;
3095         schedule_work(&adapter->watchdog_task);
3096
3097         return 0;
3098
3099 err_set_queues:
3100         igb_free_irq(adapter);
3101 err_req_irq:
3102         igb_release_hw_control(adapter);
3103         igb_power_down_link(adapter);
3104         igb_free_all_rx_resources(adapter);
3105 err_setup_rx:
3106         igb_free_all_tx_resources(adapter);
3107 err_setup_tx:
3108         igb_reset(adapter);
3109         if (!resuming)
3110                 pm_runtime_put(&pdev->dev);
3111
3112         return err;
3113 }
3114
3115 static int igb_open(struct net_device *netdev)
3116 {
3117         return __igb_open(netdev, false);
3118 }
3119
3120 /**
3121  *  igb_close - Disables a network interface
3122  *  @netdev: network interface device structure
3123  *
3124  *  Returns 0, this is not allowed to fail
3125  *
3126  *  The close entry point is called when an interface is de-activated
3127  *  by the OS.  The hardware is still under the driver's control, but
3128  *  needs to be disabled.  A global MAC reset is issued to stop the
3129  *  hardware, and all transmit and receive resources are freed.
3130  **/
3131 static int __igb_close(struct net_device *netdev, bool suspending)
3132 {
3133         struct igb_adapter *adapter = netdev_priv(netdev);
3134         struct pci_dev *pdev = adapter->pdev;
3135
3136         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3137
3138         if (!suspending)
3139                 pm_runtime_get_sync(&pdev->dev);
3140
3141         igb_down(adapter);
3142         igb_free_irq(adapter);
3143
3144         igb_free_all_tx_resources(adapter);
3145         igb_free_all_rx_resources(adapter);
3146
3147         if (!suspending)
3148                 pm_runtime_put_sync(&pdev->dev);
3149         return 0;
3150 }
3151
3152 static int igb_close(struct net_device *netdev)
3153 {
3154         return __igb_close(netdev, false);
3155 }
3156
3157 /**
3158  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3159  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3160  *
3161  *  Return 0 on success, negative on failure
3162  **/
3163 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3164 {
3165         struct device *dev = tx_ring->dev;
3166         int size;
3167
3168         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3169
3170         tx_ring->tx_buffer_info = vzalloc(size);
3171         if (!tx_ring->tx_buffer_info)
3172                 goto err;
3173
3174         /* round up to nearest 4K */
3175         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3176         tx_ring->size = ALIGN(tx_ring->size, 4096);
3177
3178         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3179                                            &tx_ring->dma, GFP_KERNEL);
3180         if (!tx_ring->desc)
3181                 goto err;
3182
3183         tx_ring->next_to_use = 0;
3184         tx_ring->next_to_clean = 0;
3185
3186         return 0;
3187
3188 err:
3189         vfree(tx_ring->tx_buffer_info);
3190         tx_ring->tx_buffer_info = NULL;
3191         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3192         return -ENOMEM;
3193 }
3194
3195 /**
3196  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3197  *                               (Descriptors) for all queues
3198  *  @adapter: board private structure
3199  *
3200  *  Return 0 on success, negative on failure
3201  **/
3202 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3203 {
3204         struct pci_dev *pdev = adapter->pdev;
3205         int i, err = 0;
3206
3207         for (i = 0; i < adapter->num_tx_queues; i++) {
3208                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3209                 if (err) {
3210                         dev_err(&pdev->dev,
3211                                 "Allocation for Tx Queue %u failed\n", i);
3212                         for (i--; i >= 0; i--)
3213                                 igb_free_tx_resources(adapter->tx_ring[i]);
3214                         break;
3215                 }
3216         }
3217
3218         return err;
3219 }
3220
3221 /**
3222  *  igb_setup_tctl - configure the transmit control registers
3223  *  @adapter: Board private structure
3224  **/
3225 void igb_setup_tctl(struct igb_adapter *adapter)
3226 {
3227         struct e1000_hw *hw = &adapter->hw;
3228         u32 tctl;
3229
3230         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3231         wr32(E1000_TXDCTL(0), 0);
3232
3233         /* Program the Transmit Control Register */
3234         tctl = rd32(E1000_TCTL);
3235         tctl &= ~E1000_TCTL_CT;
3236         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3237                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3238
3239         igb_config_collision_dist(hw);
3240
3241         /* Enable transmits */
3242         tctl |= E1000_TCTL_EN;
3243
3244         wr32(E1000_TCTL, tctl);
3245 }
3246
3247 /**
3248  *  igb_configure_tx_ring - Configure transmit ring after Reset
3249  *  @adapter: board private structure
3250  *  @ring: tx ring to configure
3251  *
3252  *  Configure a transmit ring after a reset.
3253  **/
3254 void igb_configure_tx_ring(struct igb_adapter *adapter,
3255                            struct igb_ring *ring)
3256 {
3257         struct e1000_hw *hw = &adapter->hw;
3258         u32 txdctl = 0;
3259         u64 tdba = ring->dma;
3260         int reg_idx = ring->reg_idx;
3261
3262         /* disable the queue */
3263         wr32(E1000_TXDCTL(reg_idx), 0);
3264         wrfl();
3265         mdelay(10);
3266
3267         wr32(E1000_TDLEN(reg_idx),
3268              ring->count * sizeof(union e1000_adv_tx_desc));
3269         wr32(E1000_TDBAL(reg_idx),
3270              tdba & 0x00000000ffffffffULL);
3271         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3272
3273         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3274         wr32(E1000_TDH(reg_idx), 0);
3275         writel(0, ring->tail);
3276
3277         txdctl |= IGB_TX_PTHRESH;
3278         txdctl |= IGB_TX_HTHRESH << 8;
3279         txdctl |= IGB_TX_WTHRESH << 16;
3280
3281         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3282         wr32(E1000_TXDCTL(reg_idx), txdctl);
3283 }
3284
3285 /**
3286  *  igb_configure_tx - Configure transmit Unit after Reset
3287  *  @adapter: board private structure
3288  *
3289  *  Configure the Tx unit of the MAC after a reset.
3290  **/
3291 static void igb_configure_tx(struct igb_adapter *adapter)
3292 {
3293         int i;
3294
3295         for (i = 0; i < adapter->num_tx_queues; i++)
3296                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3297 }
3298
3299 /**
3300  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3301  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3302  *
3303  *  Returns 0 on success, negative on failure
3304  **/
3305 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3306 {
3307         struct device *dev = rx_ring->dev;
3308         int size;
3309
3310         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3311
3312         rx_ring->rx_buffer_info = vzalloc(size);
3313         if (!rx_ring->rx_buffer_info)
3314                 goto err;
3315
3316         /* Round up to nearest 4K */
3317         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3318         rx_ring->size = ALIGN(rx_ring->size, 4096);
3319
3320         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3321                                            &rx_ring->dma, GFP_KERNEL);
3322         if (!rx_ring->desc)
3323                 goto err;
3324
3325         rx_ring->next_to_alloc = 0;
3326         rx_ring->next_to_clean = 0;
3327         rx_ring->next_to_use = 0;
3328
3329         return 0;
3330
3331 err:
3332         vfree(rx_ring->rx_buffer_info);
3333         rx_ring->rx_buffer_info = NULL;
3334         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3335         return -ENOMEM;
3336 }
3337
3338 /**
3339  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3340  *                               (Descriptors) for all queues
3341  *  @adapter: board private structure
3342  *
3343  *  Return 0 on success, negative on failure
3344  **/
3345 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3346 {
3347         struct pci_dev *pdev = adapter->pdev;
3348         int i, err = 0;
3349
3350         for (i = 0; i < adapter->num_rx_queues; i++) {
3351                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3352                 if (err) {
3353                         dev_err(&pdev->dev,
3354                                 "Allocation for Rx Queue %u failed\n", i);
3355                         for (i--; i >= 0; i--)
3356                                 igb_free_rx_resources(adapter->rx_ring[i]);
3357                         break;
3358                 }
3359         }
3360
3361         return err;
3362 }
3363
3364 /**
3365  *  igb_setup_mrqc - configure the multiple receive queue control registers
3366  *  @adapter: Board private structure
3367  **/
3368 static void igb_setup_mrqc(struct igb_adapter *adapter)
3369 {
3370         struct e1000_hw *hw = &adapter->hw;
3371         u32 mrqc, rxcsum;
3372         u32 j, num_rx_queues;
3373         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3374                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3375                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3376                                         0xFA01ACBE };
3377
3378         /* Fill out hash function seeds */
3379         for (j = 0; j < 10; j++)
3380                 wr32(E1000_RSSRK(j), rsskey[j]);
3381
3382         num_rx_queues = adapter->rss_queues;
3383
3384         switch (hw->mac.type) {
3385         case e1000_82576:
3386                 /* 82576 supports 2 RSS queues for SR-IOV */
3387                 if (adapter->vfs_allocated_count)
3388                         num_rx_queues = 2;
3389                 break;
3390         default:
3391                 break;
3392         }
3393
3394         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3395                 for (j = 0; j < IGB_RETA_SIZE; j++)
3396                         adapter->rss_indir_tbl[j] =
3397                         (j * num_rx_queues) / IGB_RETA_SIZE;
3398                 adapter->rss_indir_tbl_init = num_rx_queues;
3399         }
3400         igb_write_rss_indir_tbl(adapter);
3401
3402         /* Disable raw packet checksumming so that RSS hash is placed in
3403          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3404          * offloads as they are enabled by default
3405          */
3406         rxcsum = rd32(E1000_RXCSUM);
3407         rxcsum |= E1000_RXCSUM_PCSD;
3408
3409         if (adapter->hw.mac.type >= e1000_82576)
3410                 /* Enable Receive Checksum Offload for SCTP */
3411                 rxcsum |= E1000_RXCSUM_CRCOFL;
3412
3413         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3414         wr32(E1000_RXCSUM, rxcsum);
3415
3416         /* Generate RSS hash based on packet types, TCP/UDP
3417          * port numbers and/or IPv4/v6 src and dst addresses
3418          */
3419         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3420                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3421                E1000_MRQC_RSS_FIELD_IPV6 |
3422                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3423                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3424
3425         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3426                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3427         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3428                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3429
3430         /* If VMDq is enabled then we set the appropriate mode for that, else
3431          * we default to RSS so that an RSS hash is calculated per packet even
3432          * if we are only using one queue
3433          */
3434         if (adapter->vfs_allocated_count) {
3435                 if (hw->mac.type > e1000_82575) {
3436                         /* Set the default pool for the PF's first queue */
3437                         u32 vtctl = rd32(E1000_VT_CTL);
3438
3439                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3440                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3441                         vtctl |= adapter->vfs_allocated_count <<
3442                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3443                         wr32(E1000_VT_CTL, vtctl);
3444                 }
3445                 if (adapter->rss_queues > 1)
3446                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3447                 else
3448                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3449         } else {
3450                 if (hw->mac.type != e1000_i211)
3451                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3452         }
3453         igb_vmm_control(adapter);
3454
3455         wr32(E1000_MRQC, mrqc);
3456 }
3457
3458 /**
3459  *  igb_setup_rctl - configure the receive control registers
3460  *  @adapter: Board private structure
3461  **/
3462 void igb_setup_rctl(struct igb_adapter *adapter)
3463 {
3464         struct e1000_hw *hw = &adapter->hw;
3465         u32 rctl;
3466
3467         rctl = rd32(E1000_RCTL);
3468
3469         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3470         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3471
3472         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3473                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3474
3475         /* enable stripping of CRC. It's unlikely this will break BMC
3476          * redirection as it did with e1000. Newer features require
3477          * that the HW strips the CRC.
3478          */
3479         rctl |= E1000_RCTL_SECRC;
3480
3481         /* disable store bad packets and clear size bits. */
3482         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3483
3484         /* enable LPE to prevent packets larger than max_frame_size */
3485         rctl |= E1000_RCTL_LPE;
3486
3487         /* disable queue 0 to prevent tail write w/o re-config */
3488         wr32(E1000_RXDCTL(0), 0);
3489
3490         /* Attention!!!  For SR-IOV PF driver operations you must enable
3491          * queue drop for all VF and PF queues to prevent head of line blocking
3492          * if an un-trusted VF does not provide descriptors to hardware.
3493          */
3494         if (adapter->vfs_allocated_count) {
3495                 /* set all queue drop enable bits */
3496                 wr32(E1000_QDE, ALL_QUEUES);
3497         }
3498
3499         /* This is useful for sniffing bad packets. */
3500         if (adapter->netdev->features & NETIF_F_RXALL) {
3501                 /* UPE and MPE will be handled by normal PROMISC logic
3502                  * in e1000e_set_rx_mode
3503                  */
3504                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3505                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3506                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3507
3508                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3509                           E1000_RCTL_DPF | /* Allow filtered pause */
3510                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3511                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3512                  * and that breaks VLANs.
3513                  */
3514         }
3515
3516         wr32(E1000_RCTL, rctl);
3517 }
3518
3519 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3520                                    int vfn)
3521 {
3522         struct e1000_hw *hw = &adapter->hw;
3523         u32 vmolr;
3524
3525         /* if it isn't the PF check to see if VFs are enabled and
3526          * increase the size to support vlan tags
3527          */
3528         if (vfn < adapter->vfs_allocated_count &&
3529             adapter->vf_data[vfn].vlans_enabled)
3530                 size += VLAN_TAG_SIZE;
3531
3532         vmolr = rd32(E1000_VMOLR(vfn));
3533         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3534         vmolr |= size | E1000_VMOLR_LPE;
3535         wr32(E1000_VMOLR(vfn), vmolr);
3536
3537         return 0;
3538 }
3539
3540 /**
3541  *  igb_rlpml_set - set maximum receive packet size
3542  *  @adapter: board private structure
3543  *
3544  *  Configure maximum receivable packet size.
3545  **/
3546 static void igb_rlpml_set(struct igb_adapter *adapter)
3547 {
3548         u32 max_frame_size = adapter->max_frame_size;
3549         struct e1000_hw *hw = &adapter->hw;
3550         u16 pf_id = adapter->vfs_allocated_count;
3551
3552         if (pf_id) {
3553                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3554                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3555                  * to our max jumbo frame size, in case we need to enable
3556                  * jumbo frames on one of the rings later.
3557                  * This will not pass over-length frames into the default
3558                  * queue because it's gated by the VMOLR.RLPML.
3559                  */
3560                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3561         }
3562
3563         wr32(E1000_RLPML, max_frame_size);
3564 }
3565
3566 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3567                                  int vfn, bool aupe)
3568 {
3569         struct e1000_hw *hw = &adapter->hw;
3570         u32 vmolr;
3571
3572         /* This register exists only on 82576 and newer so if we are older then
3573          * we should exit and do nothing
3574          */
3575         if (hw->mac.type < e1000_82576)
3576                 return;
3577
3578         vmolr = rd32(E1000_VMOLR(vfn));
3579         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3580         if (hw->mac.type == e1000_i350) {
3581                 u32 dvmolr;
3582
3583                 dvmolr = rd32(E1000_DVMOLR(vfn));
3584                 dvmolr |= E1000_DVMOLR_STRVLAN;
3585                 wr32(E1000_DVMOLR(vfn), dvmolr);
3586         }
3587         if (aupe)
3588                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3589         else
3590                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3591
3592         /* clear all bits that might not be set */
3593         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3594
3595         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3596                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3597         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3598          * multicast packets
3599          */
3600         if (vfn <= adapter->vfs_allocated_count)
3601                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3602
3603         wr32(E1000_VMOLR(vfn), vmolr);
3604 }
3605
3606 /**
3607  *  igb_configure_rx_ring - Configure a receive ring after Reset
3608  *  @adapter: board private structure
3609  *  @ring: receive ring to be configured
3610  *
3611  *  Configure the Rx unit of the MAC after a reset.
3612  **/
3613 void igb_configure_rx_ring(struct igb_adapter *adapter,
3614                            struct igb_ring *ring)
3615 {
3616         struct e1000_hw *hw = &adapter->hw;
3617         u64 rdba = ring->dma;
3618         int reg_idx = ring->reg_idx;
3619         u32 srrctl = 0, rxdctl = 0;
3620
3621         /* disable the queue */
3622         wr32(E1000_RXDCTL(reg_idx), 0);
3623
3624         /* Set DMA base address registers */
3625         wr32(E1000_RDBAL(reg_idx),
3626              rdba & 0x00000000ffffffffULL);
3627         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3628         wr32(E1000_RDLEN(reg_idx),
3629              ring->count * sizeof(union e1000_adv_rx_desc));
3630
3631         /* initialize head and tail */
3632         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3633         wr32(E1000_RDH(reg_idx), 0);
3634         writel(0, ring->tail);
3635
3636         /* set descriptor configuration */
3637         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3638         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3639         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3640         if (hw->mac.type >= e1000_82580)
3641                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3642         /* Only set Drop Enable if we are supporting multiple queues */
3643         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3644                 srrctl |= E1000_SRRCTL_DROP_EN;
3645
3646         wr32(E1000_SRRCTL(reg_idx), srrctl);
3647
3648         /* set filtering for VMDQ pools */
3649         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3650
3651         rxdctl |= IGB_RX_PTHRESH;
3652         rxdctl |= IGB_RX_HTHRESH << 8;
3653         rxdctl |= IGB_RX_WTHRESH << 16;
3654
3655         /* enable receive descriptor fetching */
3656         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3657         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3658 }
3659
3660 /**
3661  *  igb_configure_rx - Configure receive Unit after Reset
3662  *  @adapter: board private structure
3663  *
3664  *  Configure the Rx unit of the MAC after a reset.
3665  **/
3666 static void igb_configure_rx(struct igb_adapter *adapter)
3667 {
3668         int i;
3669
3670         /* set UTA to appropriate mode */
3671         igb_set_uta(adapter);
3672
3673         /* set the correct pool for the PF default MAC address in entry 0 */
3674         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3675                          adapter->vfs_allocated_count);
3676
3677         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3678          * the Base and Length of the Rx Descriptor Ring
3679          */
3680         for (i = 0; i < adapter->num_rx_queues; i++)
3681                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3682 }
3683
3684 /**
3685  *  igb_free_tx_resources - Free Tx Resources per Queue
3686  *  @tx_ring: Tx descriptor ring for a specific queue
3687  *
3688  *  Free all transmit software resources
3689  **/
3690 void igb_free_tx_resources(struct igb_ring *tx_ring)
3691 {
3692         igb_clean_tx_ring(tx_ring);
3693
3694         vfree(tx_ring->tx_buffer_info);
3695         tx_ring->tx_buffer_info = NULL;
3696
3697         /* if not set, then don't free */
3698         if (!tx_ring->desc)
3699                 return;
3700
3701         dma_free_coherent(tx_ring->dev, tx_ring->size,
3702                           tx_ring->desc, tx_ring->dma);
3703
3704         tx_ring->desc = NULL;
3705 }
3706
3707 /**
3708  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3709  *  @adapter: board private structure
3710  *
3711  *  Free all transmit software resources
3712  **/
3713 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3714 {
3715         int i;
3716
3717         for (i = 0; i < adapter->num_tx_queues; i++)
3718                 igb_free_tx_resources(adapter->tx_ring[i]);
3719 }
3720
3721 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3722                                     struct igb_tx_buffer *tx_buffer)
3723 {
3724         if (tx_buffer->skb) {
3725                 dev_kfree_skb_any(tx_buffer->skb);
3726                 if (dma_unmap_len(tx_buffer, len))
3727                         dma_unmap_single(ring->dev,
3728                                          dma_unmap_addr(tx_buffer, dma),
3729                                          dma_unmap_len(tx_buffer, len),
3730                                          DMA_TO_DEVICE);
3731         } else if (dma_unmap_len(tx_buffer, len)) {
3732                 dma_unmap_page(ring->dev,
3733                                dma_unmap_addr(tx_buffer, dma),
3734                                dma_unmap_len(tx_buffer, len),
3735                                DMA_TO_DEVICE);
3736         }
3737         tx_buffer->next_to_watch = NULL;
3738         tx_buffer->skb = NULL;
3739         dma_unmap_len_set(tx_buffer, len, 0);
3740         /* buffer_info must be completely set up in the transmit path */
3741 }
3742
3743 /**
3744  *  igb_clean_tx_ring - Free Tx Buffers
3745  *  @tx_ring: ring to be cleaned
3746  **/
3747 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3748 {
3749         struct igb_tx_buffer *buffer_info;
3750         unsigned long size;
3751         u16 i;
3752
3753         if (!tx_ring->tx_buffer_info)
3754                 return;
3755         /* Free all the Tx ring sk_buffs */
3756
3757         for (i = 0; i < tx_ring->count; i++) {
3758                 buffer_info = &tx_ring->tx_buffer_info[i];
3759                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3760         }
3761
3762         netdev_tx_reset_queue(txring_txq(tx_ring));
3763
3764         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3765         memset(tx_ring->tx_buffer_info, 0, size);
3766
3767         /* Zero out the descriptor ring */
3768         memset(tx_ring->desc, 0, tx_ring->size);
3769
3770         tx_ring->next_to_use = 0;
3771         tx_ring->next_to_clean = 0;
3772 }
3773
3774 /**
3775  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3776  *  @adapter: board private structure
3777  **/
3778 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3779 {
3780         int i;
3781
3782         for (i = 0; i < adapter->num_tx_queues; i++)
3783                 igb_clean_tx_ring(adapter->tx_ring[i]);
3784 }
3785
3786 /**
3787  *  igb_free_rx_resources - Free Rx Resources
3788  *  @rx_ring: ring to clean the resources from
3789  *
3790  *  Free all receive software resources
3791  **/
3792 void igb_free_rx_resources(struct igb_ring *rx_ring)
3793 {
3794         igb_clean_rx_ring(rx_ring);
3795
3796         vfree(rx_ring->rx_buffer_info);
3797         rx_ring->rx_buffer_info = NULL;
3798
3799         /* if not set, then don't free */
3800         if (!rx_ring->desc)
3801                 return;
3802
3803         dma_free_coherent(rx_ring->dev, rx_ring->size,
3804                           rx_ring->desc, rx_ring->dma);
3805
3806         rx_ring->desc = NULL;
3807 }
3808
3809 /**
3810  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3811  *  @adapter: board private structure
3812  *
3813  *  Free all receive software resources
3814  **/
3815 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3816 {
3817         int i;
3818
3819         for (i = 0; i < adapter->num_rx_queues; i++)
3820                 igb_free_rx_resources(adapter->rx_ring[i]);
3821 }
3822
3823 /**
3824  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3825  *  @rx_ring: ring to free buffers from
3826  **/
3827 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3828 {
3829         unsigned long size;
3830         u16 i;
3831
3832         if (rx_ring->skb)
3833                 dev_kfree_skb(rx_ring->skb);
3834         rx_ring->skb = NULL;
3835
3836         if (!rx_ring->rx_buffer_info)
3837                 return;
3838
3839         /* Free all the Rx ring sk_buffs */
3840         for (i = 0; i < rx_ring->count; i++) {
3841                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3842
3843                 if (!buffer_info->page)
3844                         continue;
3845
3846                 dma_unmap_page(rx_ring->dev,
3847                                buffer_info->dma,
3848                                PAGE_SIZE,
3849                                DMA_FROM_DEVICE);
3850                 __free_page(buffer_info->page);
3851
3852                 buffer_info->page = NULL;
3853         }
3854
3855         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3856         memset(rx_ring->rx_buffer_info, 0, size);
3857
3858         /* Zero out the descriptor ring */
3859         memset(rx_ring->desc, 0, rx_ring->size);
3860
3861         rx_ring->next_to_alloc = 0;
3862         rx_ring->next_to_clean = 0;
3863         rx_ring->next_to_use = 0;
3864 }
3865
3866 /**
3867  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3868  *  @adapter: board private structure
3869  **/
3870 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3871 {
3872         int i;
3873
3874         for (i = 0; i < adapter->num_rx_queues; i++)
3875                 igb_clean_rx_ring(adapter->rx_ring[i]);
3876 }
3877
3878 /**
3879  *  igb_set_mac - Change the Ethernet Address of the NIC
3880  *  @netdev: network interface device structure
3881  *  @p: pointer to an address structure
3882  *
3883  *  Returns 0 on success, negative on failure
3884  **/
3885 static int igb_set_mac(struct net_device *netdev, void *p)
3886 {
3887         struct igb_adapter *adapter = netdev_priv(netdev);
3888         struct e1000_hw *hw = &adapter->hw;
3889         struct sockaddr *addr = p;
3890
3891         if (!is_valid_ether_addr(addr->sa_data))
3892                 return -EADDRNOTAVAIL;
3893
3894         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3895         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3896
3897         /* set the correct pool for the new PF MAC address in entry 0 */
3898         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3899                          adapter->vfs_allocated_count);
3900
3901         return 0;
3902 }
3903
3904 /**
3905  *  igb_write_mc_addr_list - write multicast addresses to MTA
3906  *  @netdev: network interface device structure
3907  *
3908  *  Writes multicast address list to the MTA hash table.
3909  *  Returns: -ENOMEM on failure
3910  *           0 on no addresses written
3911  *           X on writing X addresses to MTA
3912  **/
3913 static int igb_write_mc_addr_list(struct net_device *netdev)
3914 {
3915         struct igb_adapter *adapter = netdev_priv(netdev);
3916         struct e1000_hw *hw = &adapter->hw;
3917         struct netdev_hw_addr *ha;
3918         u8  *mta_list;
3919         int i;
3920
3921         if (netdev_mc_empty(netdev)) {
3922                 /* nothing to program, so clear mc list */
3923                 igb_update_mc_addr_list(hw, NULL, 0);
3924                 igb_restore_vf_multicasts(adapter);
3925                 return 0;
3926         }
3927
3928         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3929         if (!mta_list)
3930                 return -ENOMEM;
3931
3932         /* The shared function expects a packed array of only addresses. */
3933         i = 0;
3934         netdev_for_each_mc_addr(ha, netdev)
3935                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3936
3937         igb_update_mc_addr_list(hw, mta_list, i);
3938         kfree(mta_list);
3939
3940         return netdev_mc_count(netdev);
3941 }
3942
3943 /**
3944  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3945  *  @netdev: network interface device structure
3946  *
3947  *  Writes unicast address list to the RAR table.
3948  *  Returns: -ENOMEM on failure/insufficient address space
3949  *           0 on no addresses written
3950  *           X on writing X addresses to the RAR table
3951  **/
3952 static int igb_write_uc_addr_list(struct net_device *netdev)
3953 {
3954         struct igb_adapter *adapter = netdev_priv(netdev);
3955         struct e1000_hw *hw = &adapter->hw;
3956         unsigned int vfn = adapter->vfs_allocated_count;
3957         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3958         int count = 0;
3959
3960         /* return ENOMEM indicating insufficient memory for addresses */
3961         if (netdev_uc_count(netdev) > rar_entries)
3962                 return -ENOMEM;
3963
3964         if (!netdev_uc_empty(netdev) && rar_entries) {
3965                 struct netdev_hw_addr *ha;
3966
3967                 netdev_for_each_uc_addr(ha, netdev) {
3968                         if (!rar_entries)
3969                                 break;
3970                         igb_rar_set_qsel(adapter, ha->addr,
3971                                          rar_entries--,
3972                                          vfn);
3973                         count++;
3974                 }
3975         }
3976         /* write the addresses in reverse order to avoid write combining */
3977         for (; rar_entries > 0 ; rar_entries--) {
3978                 wr32(E1000_RAH(rar_entries), 0);
3979                 wr32(E1000_RAL(rar_entries), 0);
3980         }
3981         wrfl();
3982
3983         return count;
3984 }
3985
3986 /**
3987  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3988  *  @netdev: network interface device structure
3989  *
3990  *  The set_rx_mode entry point is called whenever the unicast or multicast
3991  *  address lists or the network interface flags are updated.  This routine is
3992  *  responsible for configuring the hardware for proper unicast, multicast,
3993  *  promiscuous mode, and all-multi behavior.
3994  **/
3995 static void igb_set_rx_mode(struct net_device *netdev)
3996 {
3997         struct igb_adapter *adapter = netdev_priv(netdev);
3998         struct e1000_hw *hw = &adapter->hw;
3999         unsigned int vfn = adapter->vfs_allocated_count;
4000         u32 rctl, vmolr = 0;
4001         int count;
4002
4003         /* Check for Promiscuous and All Multicast modes */
4004         rctl = rd32(E1000_RCTL);
4005
4006         /* clear the effected bits */
4007         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4008
4009         if (netdev->flags & IFF_PROMISC) {
4010                 /* retain VLAN HW filtering if in VT mode */
4011                 if (adapter->vfs_allocated_count)
4012                         rctl |= E1000_RCTL_VFE;
4013                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4014                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4015         } else {
4016                 if (netdev->flags & IFF_ALLMULTI) {
4017                         rctl |= E1000_RCTL_MPE;
4018                         vmolr |= E1000_VMOLR_MPME;
4019                 } else {
4020                         /* Write addresses to the MTA, if the attempt fails
4021                          * then we should just turn on promiscuous mode so
4022                          * that we can at least receive multicast traffic
4023                          */
4024                         count = igb_write_mc_addr_list(netdev);
4025                         if (count < 0) {
4026                                 rctl |= E1000_RCTL_MPE;
4027                                 vmolr |= E1000_VMOLR_MPME;
4028                         } else if (count) {
4029                                 vmolr |= E1000_VMOLR_ROMPE;
4030                         }
4031                 }
4032                 /* Write addresses to available RAR registers, if there is not
4033                  * sufficient space to store all the addresses then enable
4034                  * unicast promiscuous mode
4035                  */
4036                 count = igb_write_uc_addr_list(netdev);
4037                 if (count < 0) {
4038                         rctl |= E1000_RCTL_UPE;
4039                         vmolr |= E1000_VMOLR_ROPE;
4040                 }
4041                 rctl |= E1000_RCTL_VFE;
4042         }
4043         wr32(E1000_RCTL, rctl);
4044
4045         /* In order to support SR-IOV and eventually VMDq it is necessary to set
4046          * the VMOLR to enable the appropriate modes.  Without this workaround
4047          * we will have issues with VLAN tag stripping not being done for frames
4048          * that are only arriving because we are the default pool
4049          */
4050         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
4051                 return;
4052
4053         vmolr |= rd32(E1000_VMOLR(vfn)) &
4054                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4055         wr32(E1000_VMOLR(vfn), vmolr);
4056         igb_restore_vf_multicasts(adapter);
4057 }
4058
4059 static void igb_check_wvbr(struct igb_adapter *adapter)
4060 {
4061         struct e1000_hw *hw = &adapter->hw;
4062         u32 wvbr = 0;
4063
4064         switch (hw->mac.type) {
4065         case e1000_82576:
4066         case e1000_i350:
4067                 wvbr = rd32(E1000_WVBR);
4068                 if (!wvbr)
4069                         return;
4070                 break;
4071         default:
4072                 break;
4073         }
4074
4075         adapter->wvbr |= wvbr;
4076 }
4077
4078 #define IGB_STAGGERED_QUEUE_OFFSET 8
4079
4080 static void igb_spoof_check(struct igb_adapter *adapter)
4081 {
4082         int j;
4083
4084         if (!adapter->wvbr)
4085                 return;
4086
4087         for (j = 0; j < adapter->vfs_allocated_count; j++) {
4088                 if (adapter->wvbr & (1 << j) ||
4089                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4090                         dev_warn(&adapter->pdev->dev,
4091                                 "Spoof event(s) detected on VF %d\n", j);
4092                         adapter->wvbr &=
4093                                 ~((1 << j) |
4094                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4095                 }
4096         }
4097 }
4098
4099 /* Need to wait a few seconds after link up to get diagnostic information from
4100  * the phy
4101  */
4102 static void igb_update_phy_info(unsigned long data)
4103 {
4104         struct igb_adapter *adapter = (struct igb_adapter *) data;
4105         igb_get_phy_info(&adapter->hw);
4106 }
4107
4108 /**
4109  *  igb_has_link - check shared code for link and determine up/down
4110  *  @adapter: pointer to driver private info
4111  **/
4112 bool igb_has_link(struct igb_adapter *adapter)
4113 {
4114         struct e1000_hw *hw = &adapter->hw;
4115         bool link_active = false;
4116
4117         /* get_link_status is set on LSC (link status) interrupt or
4118          * rx sequence error interrupt.  get_link_status will stay
4119          * false until the e1000_check_for_link establishes link
4120          * for copper adapters ONLY
4121          */
4122         switch (hw->phy.media_type) {
4123         case e1000_media_type_copper:
4124                 if (!hw->mac.get_link_status)
4125                         return true;
4126         case e1000_media_type_internal_serdes:
4127                 hw->mac.ops.check_for_link(hw);
4128                 link_active = !hw->mac.get_link_status;
4129                 break;
4130         default:
4131         case e1000_media_type_unknown:
4132                 break;
4133         }
4134
4135         if (((hw->mac.type == e1000_i210) ||
4136              (hw->mac.type == e1000_i211)) &&
4137              (hw->phy.id == I210_I_PHY_ID)) {
4138                 if (!netif_carrier_ok(adapter->netdev)) {
4139                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4140                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4141                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4142                         adapter->link_check_timeout = jiffies;
4143                 }
4144         }
4145
4146         return link_active;
4147 }
4148
4149 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4150 {
4151         bool ret = false;
4152         u32 ctrl_ext, thstat;
4153
4154         /* check for thermal sensor event on i350 copper only */
4155         if (hw->mac.type == e1000_i350) {
4156                 thstat = rd32(E1000_THSTAT);
4157                 ctrl_ext = rd32(E1000_CTRL_EXT);
4158
4159                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4160                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4161                         ret = !!(thstat & event);
4162         }
4163
4164         return ret;
4165 }
4166
4167 /**
4168  *  igb_watchdog - Timer Call-back
4169  *  @data: pointer to adapter cast into an unsigned long
4170  **/
4171 static void igb_watchdog(unsigned long data)
4172 {
4173         struct igb_adapter *adapter = (struct igb_adapter *)data;
4174         /* Do the rest outside of interrupt context */
4175         schedule_work(&adapter->watchdog_task);
4176 }
4177
4178 static void igb_watchdog_task(struct work_struct *work)
4179 {
4180         struct igb_adapter *adapter = container_of(work,
4181                                                    struct igb_adapter,
4182                                                    watchdog_task);
4183         struct e1000_hw *hw = &adapter->hw;
4184         struct e1000_phy_info *phy = &hw->phy;
4185         struct net_device *netdev = adapter->netdev;
4186         u32 link;
4187         int i;
4188         u32 connsw;
4189
4190         link = igb_has_link(adapter);
4191
4192         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4193                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4194                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4195                 else
4196                         link = false;
4197         }
4198
4199         /* Force link down if we have fiber to swap to */
4200         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4201                 if (hw->phy.media_type == e1000_media_type_copper) {
4202                         connsw = rd32(E1000_CONNSW);
4203                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4204                                 link = 0;
4205                 }
4206         }
4207         if (link) {
4208                 /* Perform a reset if the media type changed. */
4209                 if (hw->dev_spec._82575.media_changed) {
4210                         hw->dev_spec._82575.media_changed = false;
4211                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4212                         igb_reset(adapter);
4213                 }
4214                 /* Cancel scheduled suspend requests. */
4215                 pm_runtime_resume(netdev->dev.parent);
4216
4217                 if (!netif_carrier_ok(netdev)) {
4218                         u32 ctrl;
4219
4220                         hw->mac.ops.get_speed_and_duplex(hw,
4221                                                          &adapter->link_speed,
4222                                                          &adapter->link_duplex);
4223
4224                         ctrl = rd32(E1000_CTRL);
4225                         /* Links status message must follow this format */
4226                         netdev_info(netdev,
4227                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4228                                netdev->name,
4229                                adapter->link_speed,
4230                                adapter->link_duplex == FULL_DUPLEX ?
4231                                "Full" : "Half",
4232                                (ctrl & E1000_CTRL_TFCE) &&
4233                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4234                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4235                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4236
4237                         /* disable EEE if enabled */
4238                         if ((adapter->flags & IGB_FLAG_EEE) &&
4239                                 (adapter->link_duplex == HALF_DUPLEX)) {
4240                                 dev_info(&adapter->pdev->dev,
4241                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4242                                 adapter->hw.dev_spec._82575.eee_disable = true;
4243                                 adapter->flags &= ~IGB_FLAG_EEE;
4244                         }
4245
4246                         /* check if SmartSpeed worked */
4247                         igb_check_downshift(hw);
4248                         if (phy->speed_downgraded)
4249                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4250
4251                         /* check for thermal sensor event */
4252                         if (igb_thermal_sensor_event(hw,
4253                             E1000_THSTAT_LINK_THROTTLE))
4254                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
4255
4256                         /* adjust timeout factor according to speed/duplex */
4257                         adapter->tx_timeout_factor = 1;
4258                         switch (adapter->link_speed) {
4259                         case SPEED_10:
4260                                 adapter->tx_timeout_factor = 14;
4261                                 break;
4262                         case SPEED_100:
4263                                 /* maybe add some timeout factor ? */
4264                                 break;
4265                         }
4266
4267                         netif_carrier_on(netdev);
4268
4269                         igb_ping_all_vfs(adapter);
4270                         igb_check_vf_rate_limit(adapter);
4271
4272                         /* link state has changed, schedule phy info update */
4273                         if (!test_bit(__IGB_DOWN, &adapter->state))
4274                                 mod_timer(&adapter->phy_info_timer,
4275                                           round_jiffies(jiffies + 2 * HZ));
4276                 }
4277         } else {
4278                 if (netif_carrier_ok(netdev)) {
4279                         adapter->link_speed = 0;
4280                         adapter->link_duplex = 0;
4281
4282                         /* check for thermal sensor event */
4283                         if (igb_thermal_sensor_event(hw,
4284                             E1000_THSTAT_PWR_DOWN)) {
4285                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
4286                         }
4287
4288                         /* Links status message must follow this format */
4289                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
4290                                netdev->name);
4291                         netif_carrier_off(netdev);
4292
4293                         igb_ping_all_vfs(adapter);
4294
4295                         /* link state has changed, schedule phy info update */
4296                         if (!test_bit(__IGB_DOWN, &adapter->state))
4297                                 mod_timer(&adapter->phy_info_timer,
4298                                           round_jiffies(jiffies + 2 * HZ));
4299
4300                         /* link is down, time to check for alternate media */
4301                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4302                                 igb_check_swap_media(adapter);
4303                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4304                                         schedule_work(&adapter->reset_task);
4305                                         /* return immediately */
4306                                         return;
4307                                 }
4308                         }
4309                         pm_schedule_suspend(netdev->dev.parent,
4310                                             MSEC_PER_SEC * 5);
4311
4312                 /* also check for alternate media here */
4313                 } else if (!netif_carrier_ok(netdev) &&
4314                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4315                         igb_check_swap_media(adapter);
4316                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4317                                 schedule_work(&adapter->reset_task);
4318                                 /* return immediately */
4319                                 return;
4320                         }
4321                 }
4322         }
4323
4324         spin_lock(&adapter->stats64_lock);
4325         igb_update_stats(adapter, &adapter->stats64);
4326         spin_unlock(&adapter->stats64_lock);
4327
4328         for (i = 0; i < adapter->num_tx_queues; i++) {
4329                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4330                 if (!netif_carrier_ok(netdev)) {
4331                         /* We've lost link, so the controller stops DMA,
4332                          * but we've got queued Tx work that's never going
4333                          * to get done, so reset controller to flush Tx.
4334                          * (Do the reset outside of interrupt context).
4335                          */
4336                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4337                                 adapter->tx_timeout_count++;
4338                                 schedule_work(&adapter->reset_task);
4339                                 /* return immediately since reset is imminent */
4340                                 return;
4341                         }
4342                 }
4343
4344                 /* Force detection of hung controller every watchdog period */
4345                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4346         }
4347
4348         /* Cause software interrupt to ensure Rx ring is cleaned */
4349         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
4350                 u32 eics = 0;
4351
4352                 for (i = 0; i < adapter->num_q_vectors; i++)
4353                         eics |= adapter->q_vector[i]->eims_value;
4354                 wr32(E1000_EICS, eics);
4355         } else {
4356                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4357         }
4358
4359         igb_spoof_check(adapter);
4360         igb_ptp_rx_hang(adapter);
4361
4362         /* Reset the timer */
4363         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4364                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4365                         mod_timer(&adapter->watchdog_timer,
4366                                   round_jiffies(jiffies +  HZ));
4367                 else
4368                         mod_timer(&adapter->watchdog_timer,
4369                                   round_jiffies(jiffies + 2 * HZ));
4370         }
4371 }
4372
4373 enum latency_range {
4374         lowest_latency = 0,
4375         low_latency = 1,
4376         bulk_latency = 2,
4377         latency_invalid = 255
4378 };
4379
4380 /**
4381  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4382  *  @q_vector: pointer to q_vector
4383  *
4384  *  Stores a new ITR value based on strictly on packet size.  This
4385  *  algorithm is less sophisticated than that used in igb_update_itr,
4386  *  due to the difficulty of synchronizing statistics across multiple
4387  *  receive rings.  The divisors and thresholds used by this function
4388  *  were determined based on theoretical maximum wire speed and testing
4389  *  data, in order to minimize response time while increasing bulk
4390  *  throughput.
4391  *  This functionality is controlled by ethtool's coalescing settings.
4392  *  NOTE:  This function is called only when operating in a multiqueue
4393  *         receive environment.
4394  **/
4395 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4396 {
4397         int new_val = q_vector->itr_val;
4398         int avg_wire_size = 0;
4399         struct igb_adapter *adapter = q_vector->adapter;
4400         unsigned int packets;
4401
4402         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4403          * ints/sec - ITR timer value of 120 ticks.
4404          */
4405         if (adapter->link_speed != SPEED_1000) {
4406                 new_val = IGB_4K_ITR;
4407                 goto set_itr_val;
4408         }
4409
4410         packets = q_vector->rx.total_packets;
4411         if (packets)
4412                 avg_wire_size = q_vector->rx.total_bytes / packets;
4413
4414         packets = q_vector->tx.total_packets;
4415         if (packets)
4416                 avg_wire_size = max_t(u32, avg_wire_size,
4417                                       q_vector->tx.total_bytes / packets);
4418
4419         /* if avg_wire_size isn't set no work was done */
4420         if (!avg_wire_size)
4421                 goto clear_counts;
4422
4423         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4424         avg_wire_size += 24;
4425
4426         /* Don't starve jumbo frames */
4427         avg_wire_size = min(avg_wire_size, 3000);
4428
4429         /* Give a little boost to mid-size frames */
4430         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4431                 new_val = avg_wire_size / 3;
4432         else
4433                 new_val = avg_wire_size / 2;
4434
4435         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4436         if (new_val < IGB_20K_ITR &&
4437             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4438              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4439                 new_val = IGB_20K_ITR;
4440
4441 set_itr_val:
4442         if (new_val != q_vector->itr_val) {
4443                 q_vector->itr_val = new_val;
4444                 q_vector->set_itr = 1;
4445         }
4446 clear_counts:
4447         q_vector->rx.total_bytes = 0;
4448         q_vector->rx.total_packets = 0;
4449         q_vector->tx.total_bytes = 0;
4450         q_vector->tx.total_packets = 0;
4451 }
4452
4453 /**
4454  *  igb_update_itr - update the dynamic ITR value based on statistics
4455  *  @q_vector: pointer to q_vector
4456  *  @ring_container: ring info to update the itr for
4457  *
4458  *  Stores a new ITR value based on packets and byte
4459  *  counts during the last interrupt.  The advantage of per interrupt
4460  *  computation is faster updates and more accurate ITR for the current
4461  *  traffic pattern.  Constants in this function were computed
4462  *  based on theoretical maximum wire speed and thresholds were set based
4463  *  on testing data as well as attempting to minimize response time
4464  *  while increasing bulk throughput.
4465  *  This functionality is controlled by ethtool's coalescing settings.
4466  *  NOTE:  These calculations are only valid when operating in a single-
4467  *         queue environment.
4468  **/
4469 static void igb_update_itr(struct igb_q_vector *q_vector,
4470                            struct igb_ring_container *ring_container)
4471 {
4472         unsigned int packets = ring_container->total_packets;
4473         unsigned int bytes = ring_container->total_bytes;
4474         u8 itrval = ring_container->itr;
4475
4476         /* no packets, exit with status unchanged */
4477         if (packets == 0)
4478                 return;
4479
4480         switch (itrval) {
4481         case lowest_latency:
4482                 /* handle TSO and jumbo frames */
4483                 if (bytes/packets > 8000)
4484                         itrval = bulk_latency;
4485                 else if ((packets < 5) && (bytes > 512))
4486                         itrval = low_latency;
4487                 break;
4488         case low_latency:  /* 50 usec aka 20000 ints/s */
4489                 if (bytes > 10000) {
4490                         /* this if handles the TSO accounting */
4491                         if (bytes/packets > 8000)
4492                                 itrval = bulk_latency;
4493                         else if ((packets < 10) || ((bytes/packets) > 1200))
4494                                 itrval = bulk_latency;
4495                         else if ((packets > 35))
4496                                 itrval = lowest_latency;
4497                 } else if (bytes/packets > 2000) {
4498                         itrval = bulk_latency;
4499                 } else if (packets <= 2 && bytes < 512) {
4500                         itrval = lowest_latency;
4501                 }
4502                 break;
4503         case bulk_latency: /* 250 usec aka 4000 ints/s */
4504                 if (bytes > 25000) {
4505                         if (packets > 35)
4506                                 itrval = low_latency;
4507                 } else if (bytes < 1500) {
4508                         itrval = low_latency;
4509                 }
4510                 break;
4511         }
4512
4513         /* clear work counters since we have the values we need */
4514         ring_container->total_bytes = 0;
4515         ring_container->total_packets = 0;
4516
4517         /* write updated itr to ring container */
4518         ring_container->itr = itrval;
4519 }
4520
4521 static void igb_set_itr(struct igb_q_vector *q_vector)
4522 {
4523         struct igb_adapter *adapter = q_vector->adapter;
4524         u32 new_itr = q_vector->itr_val;
4525         u8 current_itr = 0;
4526
4527         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4528         if (adapter->link_speed != SPEED_1000) {
4529                 current_itr = 0;
4530                 new_itr = IGB_4K_ITR;
4531                 goto set_itr_now;
4532         }
4533
4534         igb_update_itr(q_vector, &q_vector->tx);
4535         igb_update_itr(q_vector, &q_vector->rx);
4536
4537         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4538
4539         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4540         if (current_itr == lowest_latency &&
4541             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4542              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4543                 current_itr = low_latency;
4544
4545         switch (current_itr) {
4546         /* counts and packets in update_itr are dependent on these numbers */
4547         case lowest_latency:
4548                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4549                 break;
4550         case low_latency:
4551                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4552                 break;
4553         case bulk_latency:
4554                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4555                 break;
4556         default:
4557                 break;
4558         }
4559
4560 set_itr_now:
4561         if (new_itr != q_vector->itr_val) {
4562                 /* this attempts to bias the interrupt rate towards Bulk
4563                  * by adding intermediate steps when interrupt rate is
4564                  * increasing
4565                  */
4566                 new_itr = new_itr > q_vector->itr_val ?
4567                           max((new_itr * q_vector->itr_val) /
4568                           (new_itr + (q_vector->itr_val >> 2)),
4569                           new_itr) : new_itr;
4570                 /* Don't write the value here; it resets the adapter's
4571                  * internal timer, and causes us to delay far longer than
4572                  * we should between interrupts.  Instead, we write the ITR
4573                  * value at the beginning of the next interrupt so the timing
4574                  * ends up being correct.
4575                  */
4576                 q_vector->itr_val = new_itr;
4577                 q_vector->set_itr = 1;
4578         }
4579 }
4580
4581 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4582                             u32 type_tucmd, u32 mss_l4len_idx)
4583 {
4584         struct e1000_adv_tx_context_desc *context_desc;
4585         u16 i = tx_ring->next_to_use;
4586
4587         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4588
4589         i++;
4590         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4591
4592         /* set bits to identify this as an advanced context descriptor */
4593         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4594
4595         /* For 82575, context index must be unique per ring. */
4596         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4597                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4598
4599         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4600         context_desc->seqnum_seed       = 0;
4601         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4602         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4603 }
4604
4605 static int igb_tso(struct igb_ring *tx_ring,
4606                    struct igb_tx_buffer *first,
4607                    u8 *hdr_len)
4608 {
4609         struct sk_buff *skb = first->skb;
4610         u32 vlan_macip_lens, type_tucmd;
4611         u32 mss_l4len_idx, l4len;
4612         int err;
4613
4614         if (skb->ip_summed != CHECKSUM_PARTIAL)
4615                 return 0;
4616
4617         if (!skb_is_gso(skb))
4618                 return 0;
4619
4620         err = skb_cow_head(skb, 0);
4621         if (err < 0)
4622                 return err;
4623
4624         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4625         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4626
4627         if (first->protocol == htons(ETH_P_IP)) {
4628                 struct iphdr *iph = ip_hdr(skb);
4629                 iph->tot_len = 0;
4630                 iph->check = 0;
4631                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4632                                                          iph->daddr, 0,
4633                                                          IPPROTO_TCP,
4634                                                          0);
4635                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4636                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4637                                    IGB_TX_FLAGS_CSUM |
4638                                    IGB_TX_FLAGS_IPV4;
4639         } else if (skb_is_gso_v6(skb)) {
4640                 ipv6_hdr(skb)->payload_len = 0;
4641                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4642                                                        &ipv6_hdr(skb)->daddr,
4643                                                        0, IPPROTO_TCP, 0);
4644                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4645                                    IGB_TX_FLAGS_CSUM;
4646         }
4647
4648         /* compute header lengths */
4649         l4len = tcp_hdrlen(skb);
4650         *hdr_len = skb_transport_offset(skb) + l4len;
4651
4652         /* update gso size and bytecount with header size */
4653         first->gso_segs = skb_shinfo(skb)->gso_segs;
4654         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4655
4656         /* MSS L4LEN IDX */
4657         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4658         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4659
4660         /* VLAN MACLEN IPLEN */
4661         vlan_macip_lens = skb_network_header_len(skb);
4662         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4663         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4664
4665         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4666
4667         return 1;
4668 }
4669
4670 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4671 {
4672         struct sk_buff *skb = first->skb;
4673         u32 vlan_macip_lens = 0;
4674         u32 mss_l4len_idx = 0;
4675         u32 type_tucmd = 0;
4676
4677         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4678                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4679                         return;
4680         } else {
4681                 u8 l4_hdr = 0;
4682
4683                 switch (first->protocol) {
4684                 case htons(ETH_P_IP):
4685                         vlan_macip_lens |= skb_network_header_len(skb);
4686                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4687                         l4_hdr = ip_hdr(skb)->protocol;
4688                         break;
4689                 case htons(ETH_P_IPV6):
4690                         vlan_macip_lens |= skb_network_header_len(skb);
4691                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4692                         break;
4693                 default:
4694                         if (unlikely(net_ratelimit())) {
4695                                 dev_warn(tx_ring->dev,
4696                                          "partial checksum but proto=%x!\n",
4697                                          first->protocol);
4698                         }
4699                         break;
4700                 }
4701
4702                 switch (l4_hdr) {
4703                 case IPPROTO_TCP:
4704                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4705                         mss_l4len_idx = tcp_hdrlen(skb) <<
4706                                         E1000_ADVTXD_L4LEN_SHIFT;
4707                         break;
4708                 case IPPROTO_SCTP:
4709                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4710                         mss_l4len_idx = sizeof(struct sctphdr) <<
4711                                         E1000_ADVTXD_L4LEN_SHIFT;
4712                         break;
4713                 case IPPROTO_UDP:
4714                         mss_l4len_idx = sizeof(struct udphdr) <<
4715                                         E1000_ADVTXD_L4LEN_SHIFT;
4716                         break;
4717                 default:
4718                         if (unlikely(net_ratelimit())) {
4719                                 dev_warn(tx_ring->dev,
4720                                          "partial checksum but l4 proto=%x!\n",
4721                                          l4_hdr);
4722                         }
4723                         break;
4724                 }
4725
4726                 /* update TX checksum flag */
4727                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4728         }
4729
4730         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4731         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4732
4733         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4734 }
4735
4736 #define IGB_SET_FLAG(_input, _flag, _result) \
4737         ((_flag <= _result) ? \
4738          ((u32)(_input & _flag) * (_result / _flag)) : \
4739          ((u32)(_input & _flag) / (_flag / _result)))
4740
4741 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4742 {
4743         /* set type for advanced descriptor with frame checksum insertion */
4744         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4745                        E1000_ADVTXD_DCMD_DEXT |
4746                        E1000_ADVTXD_DCMD_IFCS;
4747
4748         /* set HW vlan bit if vlan is present */
4749         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4750                                  (E1000_ADVTXD_DCMD_VLE));
4751
4752         /* set segmentation bits for TSO */
4753         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4754                                  (E1000_ADVTXD_DCMD_TSE));
4755
4756         /* set timestamp bit if present */
4757         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4758                                  (E1000_ADVTXD_MAC_TSTAMP));
4759
4760         /* insert frame checksum */
4761         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4762
4763         return cmd_type;
4764 }
4765
4766 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4767                                  union e1000_adv_tx_desc *tx_desc,
4768                                  u32 tx_flags, unsigned int paylen)
4769 {
4770         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4771
4772         /* 82575 requires a unique index per ring */
4773         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4774                 olinfo_status |= tx_ring->reg_idx << 4;
4775
4776         /* insert L4 checksum */
4777         olinfo_status |= IGB_SET_FLAG(tx_flags,
4778                                       IGB_TX_FLAGS_CSUM,
4779                                       (E1000_TXD_POPTS_TXSM << 8));
4780
4781         /* insert IPv4 checksum */
4782         olinfo_status |= IGB_SET_FLAG(tx_flags,
4783                                       IGB_TX_FLAGS_IPV4,
4784                                       (E1000_TXD_POPTS_IXSM << 8));
4785
4786         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4787 }
4788
4789 static void igb_tx_map(struct igb_ring *tx_ring,
4790                        struct igb_tx_buffer *first,
4791                        const u8 hdr_len)
4792 {
4793         struct sk_buff *skb = first->skb;
4794         struct igb_tx_buffer *tx_buffer;
4795         union e1000_adv_tx_desc *tx_desc;
4796         struct skb_frag_struct *frag;
4797         dma_addr_t dma;
4798         unsigned int data_len, size;
4799         u32 tx_flags = first->tx_flags;
4800         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4801         u16 i = tx_ring->next_to_use;
4802
4803         tx_desc = IGB_TX_DESC(tx_ring, i);
4804
4805         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4806
4807         size = skb_headlen(skb);
4808         data_len = skb->data_len;
4809
4810         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4811
4812         tx_buffer = first;
4813
4814         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4815                 if (dma_mapping_error(tx_ring->dev, dma))
4816                         goto dma_error;
4817
4818                 /* record length, and DMA address */
4819                 dma_unmap_len_set(tx_buffer, len, size);
4820                 dma_unmap_addr_set(tx_buffer, dma, dma);
4821
4822                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4823
4824                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4825                         tx_desc->read.cmd_type_len =
4826                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4827
4828                         i++;
4829                         tx_desc++;
4830                         if (i == tx_ring->count) {
4831                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4832                                 i = 0;
4833                         }
4834                         tx_desc->read.olinfo_status = 0;
4835
4836                         dma += IGB_MAX_DATA_PER_TXD;
4837                         size -= IGB_MAX_DATA_PER_TXD;
4838
4839                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4840                 }
4841
4842                 if (likely(!data_len))
4843                         break;
4844
4845                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4846
4847                 i++;
4848                 tx_desc++;
4849                 if (i == tx_ring->count) {
4850                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4851                         i = 0;
4852                 }
4853                 tx_desc->read.olinfo_status = 0;
4854
4855                 size = skb_frag_size(frag);
4856                 data_len -= size;
4857
4858                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4859                                        size, DMA_TO_DEVICE);
4860
4861                 tx_buffer = &tx_ring->tx_buffer_info[i];
4862         }
4863
4864         /* write last descriptor with RS and EOP bits */
4865         cmd_type |= size | IGB_TXD_DCMD;
4866         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4867
4868         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4869
4870         /* set the timestamp */
4871         first->time_stamp = jiffies;
4872
4873         /* Force memory writes to complete before letting h/w know there
4874          * are new descriptors to fetch.  (Only applicable for weak-ordered
4875          * memory model archs, such as IA-64).
4876          *
4877          * We also need this memory barrier to make certain all of the
4878          * status bits have been updated before next_to_watch is written.
4879          */
4880         wmb();
4881
4882         /* set next_to_watch value indicating a packet is present */
4883         first->next_to_watch = tx_desc;
4884
4885         i++;
4886         if (i == tx_ring->count)
4887                 i = 0;
4888
4889         tx_ring->next_to_use = i;
4890
4891         writel(i, tx_ring->tail);
4892
4893         /* we need this if more than one processor can write to our tail
4894          * at a time, it synchronizes IO on IA64/Altix systems
4895          */
4896         mmiowb();
4897
4898         return;
4899
4900 dma_error:
4901         dev_err(tx_ring->dev, "TX DMA map failed\n");
4902
4903         /* clear dma mappings for failed tx_buffer_info map */
4904         for (;;) {
4905                 tx_buffer = &tx_ring->tx_buffer_info[i];
4906                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4907                 if (tx_buffer == first)
4908                         break;
4909                 if (i == 0)
4910                         i = tx_ring->count;
4911                 i--;
4912         }
4913
4914         tx_ring->next_to_use = i;
4915 }
4916
4917 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4918 {
4919         struct net_device *netdev = tx_ring->netdev;
4920
4921         netif_stop_subqueue(netdev, tx_ring->queue_index);
4922
4923         /* Herbert's original patch had:
4924          *  smp_mb__after_netif_stop_queue();
4925          * but since that doesn't exist yet, just open code it.
4926          */
4927         smp_mb();
4928
4929         /* We need to check again in a case another CPU has just
4930          * made room available.
4931          */
4932         if (igb_desc_unused(tx_ring) < size)
4933                 return -EBUSY;
4934
4935         /* A reprieve! */
4936         netif_wake_subqueue(netdev, tx_ring->queue_index);
4937
4938         u64_stats_update_begin(&tx_ring->tx_syncp2);
4939         tx_ring->tx_stats.restart_queue2++;
4940         u64_stats_update_end(&tx_ring->tx_syncp2);
4941
4942         return 0;
4943 }
4944
4945 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4946 {
4947         if (igb_desc_unused(tx_ring) >= size)
4948                 return 0;
4949         return __igb_maybe_stop_tx(tx_ring, size);
4950 }
4951
4952 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4953                                 struct igb_ring *tx_ring)
4954 {
4955         struct igb_tx_buffer *first;
4956         int tso;
4957         u32 tx_flags = 0;
4958         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4959         __be16 protocol = vlan_get_protocol(skb);
4960         u8 hdr_len = 0;
4961
4962         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4963          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4964          *       + 2 desc gap to keep tail from touching head,
4965          *       + 1 desc for context descriptor,
4966          * otherwise try next time
4967          */
4968         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4969                 unsigned short f;
4970
4971                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4972                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4973         } else {
4974                 count += skb_shinfo(skb)->nr_frags;
4975         }
4976
4977         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4978                 /* this is a hard error */
4979                 return NETDEV_TX_BUSY;
4980         }
4981
4982         /* record the location of the first descriptor for this packet */
4983         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4984         first->skb = skb;
4985         first->bytecount = skb->len;
4986         first->gso_segs = 1;
4987
4988         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4989                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4990
4991                 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
4992                                            &adapter->state)) {
4993                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4994                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
4995
4996                         adapter->ptp_tx_skb = skb_get(skb);
4997                         adapter->ptp_tx_start = jiffies;
4998                         if (adapter->hw.mac.type == e1000_82576)
4999                                 schedule_work(&adapter->ptp_tx_work);
5000                 }
5001         }
5002
5003         skb_tx_timestamp(skb);
5004
5005         if (vlan_tx_tag_present(skb)) {
5006                 tx_flags |= IGB_TX_FLAGS_VLAN;
5007                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5008         }
5009
5010         /* record initial flags and protocol */
5011         first->tx_flags = tx_flags;
5012         first->protocol = protocol;
5013
5014         tso = igb_tso(tx_ring, first, &hdr_len);
5015         if (tso < 0)
5016                 goto out_drop;
5017         else if (!tso)
5018                 igb_tx_csum(tx_ring, first);
5019
5020         igb_tx_map(tx_ring, first, hdr_len);
5021
5022         /* Make sure there is space in the ring for the next send. */
5023         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5024
5025         return NETDEV_TX_OK;
5026
5027 out_drop:
5028         igb_unmap_and_free_tx_resource(tx_ring, first);
5029
5030         return NETDEV_TX_OK;
5031 }
5032
5033 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5034                                                     struct sk_buff *skb)
5035 {
5036         unsigned int r_idx = skb->queue_mapping;
5037
5038         if (r_idx >= adapter->num_tx_queues)
5039                 r_idx = r_idx % adapter->num_tx_queues;
5040
5041         return adapter->tx_ring[r_idx];
5042 }
5043
5044 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5045                                   struct net_device *netdev)
5046 {
5047         struct igb_adapter *adapter = netdev_priv(netdev);
5048
5049         if (test_bit(__IGB_DOWN, &adapter->state)) {
5050                 dev_kfree_skb_any(skb);
5051                 return NETDEV_TX_OK;
5052         }
5053
5054         if (skb->len <= 0) {
5055                 dev_kfree_skb_any(skb);
5056                 return NETDEV_TX_OK;
5057         }
5058
5059         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5060          * in order to meet this minimum size requirement.
5061          */
5062         if (unlikely(skb->len < 17)) {
5063                 if (skb_pad(skb, 17 - skb->len))
5064                         return NETDEV_TX_OK;
5065                 skb->len = 17;
5066                 skb_set_tail_pointer(skb, 17);
5067         }
5068
5069         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5070 }
5071
5072 /**
5073  *  igb_tx_timeout - Respond to a Tx Hang
5074  *  @netdev: network interface device structure
5075  **/
5076 static void igb_tx_timeout(struct net_device *netdev)
5077 {
5078         struct igb_adapter *adapter = netdev_priv(netdev);
5079         struct e1000_hw *hw = &adapter->hw;
5080
5081         /* Do the reset outside of interrupt context */
5082         adapter->tx_timeout_count++;
5083
5084         if (hw->mac.type >= e1000_82580)
5085                 hw->dev_spec._82575.global_device_reset = true;
5086
5087         schedule_work(&adapter->reset_task);
5088         wr32(E1000_EICS,
5089              (adapter->eims_enable_mask & ~adapter->eims_other));
5090 }
5091
5092 static void igb_reset_task(struct work_struct *work)
5093 {
5094         struct igb_adapter *adapter;
5095         adapter = container_of(work, struct igb_adapter, reset_task);
5096
5097         igb_dump(adapter);
5098         netdev_err(adapter->netdev, "Reset adapter\n");
5099         igb_reinit_locked(adapter);
5100 }
5101
5102 /**
5103  *  igb_get_stats64 - Get System Network Statistics
5104  *  @netdev: network interface device structure
5105  *  @stats: rtnl_link_stats64 pointer
5106  **/
5107 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5108                                                 struct rtnl_link_stats64 *stats)
5109 {
5110         struct igb_adapter *adapter = netdev_priv(netdev);
5111
5112         spin_lock(&adapter->stats64_lock);
5113         igb_update_stats(adapter, &adapter->stats64);
5114         memcpy(stats, &adapter->stats64, sizeof(*stats));
5115         spin_unlock(&adapter->stats64_lock);
5116
5117         return stats;
5118 }
5119
5120 /**
5121  *  igb_change_mtu - Change the Maximum Transfer Unit
5122  *  @netdev: network interface device structure
5123  *  @new_mtu: new value for maximum frame size
5124  *
5125  *  Returns 0 on success, negative on failure
5126  **/
5127 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5128 {
5129         struct igb_adapter *adapter = netdev_priv(netdev);
5130         struct pci_dev *pdev = adapter->pdev;
5131         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5132
5133         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5134                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5135                 return -EINVAL;
5136         }
5137
5138 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5139         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5140                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5141                 return -EINVAL;
5142         }
5143
5144         /* adjust max frame to be at least the size of a standard frame */
5145         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5146                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5147
5148         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5149                 usleep_range(1000, 2000);
5150
5151         /* igb_down has a dependency on max_frame_size */
5152         adapter->max_frame_size = max_frame;
5153
5154         if (netif_running(netdev))
5155                 igb_down(adapter);
5156
5157         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5158                  netdev->mtu, new_mtu);
5159         netdev->mtu = new_mtu;
5160
5161         if (netif_running(netdev))
5162                 igb_up(adapter);
5163         else
5164                 igb_reset(adapter);
5165
5166         clear_bit(__IGB_RESETTING, &adapter->state);
5167
5168         return 0;
5169 }
5170
5171 /**
5172  *  igb_update_stats - Update the board statistics counters
5173  *  @adapter: board private structure
5174  **/
5175 void igb_update_stats(struct igb_adapter *adapter,
5176                       struct rtnl_link_stats64 *net_stats)
5177 {
5178         struct e1000_hw *hw = &adapter->hw;
5179         struct pci_dev *pdev = adapter->pdev;
5180         u32 reg, mpc;
5181         u16 phy_tmp;
5182         int i;
5183         u64 bytes, packets;
5184         unsigned int start;
5185         u64 _bytes, _packets;
5186
5187 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5188
5189         /* Prevent stats update while adapter is being reset, or if the pci
5190          * connection is down.
5191          */
5192         if (adapter->link_speed == 0)
5193                 return;
5194         if (pci_channel_offline(pdev))
5195                 return;
5196
5197         bytes = 0;
5198         packets = 0;
5199
5200         rcu_read_lock();
5201         for (i = 0; i < adapter->num_rx_queues; i++) {
5202                 struct igb_ring *ring = adapter->rx_ring[i];
5203                 u32 rqdpc = rd32(E1000_RQDPC(i));
5204                 if (hw->mac.type >= e1000_i210)
5205                         wr32(E1000_RQDPC(i), 0);
5206
5207                 if (rqdpc) {
5208                         ring->rx_stats.drops += rqdpc;
5209                         net_stats->rx_fifo_errors += rqdpc;
5210                 }
5211
5212                 do {
5213                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
5214                         _bytes = ring->rx_stats.bytes;
5215                         _packets = ring->rx_stats.packets;
5216                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
5217                 bytes += _bytes;
5218                 packets += _packets;
5219         }
5220
5221         net_stats->rx_bytes = bytes;
5222         net_stats->rx_packets = packets;
5223
5224         bytes = 0;
5225         packets = 0;
5226         for (i = 0; i < adapter->num_tx_queues; i++) {
5227                 struct igb_ring *ring = adapter->tx_ring[i];
5228                 do {
5229                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
5230                         _bytes = ring->tx_stats.bytes;
5231                         _packets = ring->tx_stats.packets;
5232                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
5233                 bytes += _bytes;
5234                 packets += _packets;
5235         }
5236         net_stats->tx_bytes = bytes;
5237         net_stats->tx_packets = packets;
5238         rcu_read_unlock();
5239
5240         /* read stats registers */
5241         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5242         adapter->stats.gprc += rd32(E1000_GPRC);
5243         adapter->stats.gorc += rd32(E1000_GORCL);
5244         rd32(E1000_GORCH); /* clear GORCL */
5245         adapter->stats.bprc += rd32(E1000_BPRC);
5246         adapter->stats.mprc += rd32(E1000_MPRC);
5247         adapter->stats.roc += rd32(E1000_ROC);
5248
5249         adapter->stats.prc64 += rd32(E1000_PRC64);
5250         adapter->stats.prc127 += rd32(E1000_PRC127);
5251         adapter->stats.prc255 += rd32(E1000_PRC255);
5252         adapter->stats.prc511 += rd32(E1000_PRC511);
5253         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5254         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5255         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5256         adapter->stats.sec += rd32(E1000_SEC);
5257
5258         mpc = rd32(E1000_MPC);
5259         adapter->stats.mpc += mpc;
5260         net_stats->rx_fifo_errors += mpc;
5261         adapter->stats.scc += rd32(E1000_SCC);
5262         adapter->stats.ecol += rd32(E1000_ECOL);
5263         adapter->stats.mcc += rd32(E1000_MCC);
5264         adapter->stats.latecol += rd32(E1000_LATECOL);
5265         adapter->stats.dc += rd32(E1000_DC);
5266         adapter->stats.rlec += rd32(E1000_RLEC);
5267         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5268         adapter->stats.xontxc += rd32(E1000_XONTXC);
5269         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5270         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5271         adapter->stats.fcruc += rd32(E1000_FCRUC);
5272         adapter->stats.gptc += rd32(E1000_GPTC);
5273         adapter->stats.gotc += rd32(E1000_GOTCL);
5274         rd32(E1000_GOTCH); /* clear GOTCL */
5275         adapter->stats.rnbc += rd32(E1000_RNBC);
5276         adapter->stats.ruc += rd32(E1000_RUC);
5277         adapter->stats.rfc += rd32(E1000_RFC);
5278         adapter->stats.rjc += rd32(E1000_RJC);
5279         adapter->stats.tor += rd32(E1000_TORH);
5280         adapter->stats.tot += rd32(E1000_TOTH);
5281         adapter->stats.tpr += rd32(E1000_TPR);
5282
5283         adapter->stats.ptc64 += rd32(E1000_PTC64);
5284         adapter->stats.ptc127 += rd32(E1000_PTC127);
5285         adapter->stats.ptc255 += rd32(E1000_PTC255);
5286         adapter->stats.ptc511 += rd32(E1000_PTC511);
5287         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5288         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5289
5290         adapter->stats.mptc += rd32(E1000_MPTC);
5291         adapter->stats.bptc += rd32(E1000_BPTC);
5292
5293         adapter->stats.tpt += rd32(E1000_TPT);
5294         adapter->stats.colc += rd32(E1000_COLC);
5295
5296         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5297         /* read internal phy specific stats */
5298         reg = rd32(E1000_CTRL_EXT);
5299         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5300                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5301
5302                 /* this stat has invalid values on i210/i211 */
5303                 if ((hw->mac.type != e1000_i210) &&
5304                     (hw->mac.type != e1000_i211))
5305                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5306         }
5307
5308         adapter->stats.tsctc += rd32(E1000_TSCTC);
5309         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5310
5311         adapter->stats.iac += rd32(E1000_IAC);
5312         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5313         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5314         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5315         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5316         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5317         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5318         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5319         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5320
5321         /* Fill out the OS statistics structure */
5322         net_stats->multicast = adapter->stats.mprc;
5323         net_stats->collisions = adapter->stats.colc;
5324
5325         /* Rx Errors */
5326
5327         /* RLEC on some newer hardware can be incorrect so build
5328          * our own version based on RUC and ROC
5329          */
5330         net_stats->rx_errors = adapter->stats.rxerrc +
5331                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5332                 adapter->stats.ruc + adapter->stats.roc +
5333                 adapter->stats.cexterr;
5334         net_stats->rx_length_errors = adapter->stats.ruc +
5335                                       adapter->stats.roc;
5336         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5337         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5338         net_stats->rx_missed_errors = adapter->stats.mpc;
5339
5340         /* Tx Errors */
5341         net_stats->tx_errors = adapter->stats.ecol +
5342                                adapter->stats.latecol;
5343         net_stats->tx_aborted_errors = adapter->stats.ecol;
5344         net_stats->tx_window_errors = adapter->stats.latecol;
5345         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5346
5347         /* Tx Dropped needs to be maintained elsewhere */
5348
5349         /* Phy Stats */
5350         if (hw->phy.media_type == e1000_media_type_copper) {
5351                 if ((adapter->link_speed == SPEED_1000) &&
5352                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5353                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5354                         adapter->phy_stats.idle_errors += phy_tmp;
5355                 }
5356         }
5357
5358         /* Management Stats */
5359         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5360         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5361         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5362
5363         /* OS2BMC Stats */
5364         reg = rd32(E1000_MANC);
5365         if (reg & E1000_MANC_EN_BMC2OS) {
5366                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5367                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5368                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5369                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5370         }
5371 }
5372
5373 static irqreturn_t igb_msix_other(int irq, void *data)
5374 {
5375         struct igb_adapter *adapter = data;
5376         struct e1000_hw *hw = &adapter->hw;
5377         u32 icr = rd32(E1000_ICR);
5378         /* reading ICR causes bit 31 of EICR to be cleared */
5379
5380         if (icr & E1000_ICR_DRSTA)
5381                 schedule_work(&adapter->reset_task);
5382
5383         if (icr & E1000_ICR_DOUTSYNC) {
5384                 /* HW is reporting DMA is out of sync */
5385                 adapter->stats.doosync++;
5386                 /* The DMA Out of Sync is also indication of a spoof event
5387                  * in IOV mode. Check the Wrong VM Behavior register to
5388                  * see if it is really a spoof event.
5389                  */
5390                 igb_check_wvbr(adapter);
5391         }
5392
5393         /* Check for a mailbox event */
5394         if (icr & E1000_ICR_VMMB)
5395                 igb_msg_task(adapter);
5396
5397         if (icr & E1000_ICR_LSC) {
5398                 hw->mac.get_link_status = 1;
5399                 /* guard against interrupt when we're going down */
5400                 if (!test_bit(__IGB_DOWN, &adapter->state))
5401                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5402         }
5403
5404         if (icr & E1000_ICR_TS) {
5405                 u32 tsicr = rd32(E1000_TSICR);
5406
5407                 if (tsicr & E1000_TSICR_TXTS) {
5408                         /* acknowledge the interrupt */
5409                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5410                         /* retrieve hardware timestamp */
5411                         schedule_work(&adapter->ptp_tx_work);
5412                 }
5413         }
5414
5415         wr32(E1000_EIMS, adapter->eims_other);
5416
5417         return IRQ_HANDLED;
5418 }
5419
5420 static void igb_write_itr(struct igb_q_vector *q_vector)
5421 {
5422         struct igb_adapter *adapter = q_vector->adapter;
5423         u32 itr_val = q_vector->itr_val & 0x7FFC;
5424
5425         if (!q_vector->set_itr)
5426                 return;
5427
5428         if (!itr_val)
5429                 itr_val = 0x4;
5430
5431         if (adapter->hw.mac.type == e1000_82575)
5432                 itr_val |= itr_val << 16;
5433         else
5434                 itr_val |= E1000_EITR_CNT_IGNR;
5435
5436         writel(itr_val, q_vector->itr_register);
5437         q_vector->set_itr = 0;
5438 }
5439
5440 static irqreturn_t igb_msix_ring(int irq, void *data)
5441 {
5442         struct igb_q_vector *q_vector = data;
5443
5444         /* Write the ITR value calculated from the previous interrupt. */
5445         igb_write_itr(q_vector);
5446
5447         napi_schedule(&q_vector->napi);
5448
5449         return IRQ_HANDLED;
5450 }
5451
5452 #ifdef CONFIG_IGB_DCA
5453 static void igb_update_tx_dca(struct igb_adapter *adapter,
5454                               struct igb_ring *tx_ring,
5455                               int cpu)
5456 {
5457         struct e1000_hw *hw = &adapter->hw;
5458         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5459
5460         if (hw->mac.type != e1000_82575)
5461                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5462
5463         /* We can enable relaxed ordering for reads, but not writes when
5464          * DCA is enabled.  This is due to a known issue in some chipsets
5465          * which will cause the DCA tag to be cleared.
5466          */
5467         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5468                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5469                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5470
5471         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5472 }
5473
5474 static void igb_update_rx_dca(struct igb_adapter *adapter,
5475                               struct igb_ring *rx_ring,
5476                               int cpu)
5477 {
5478         struct e1000_hw *hw = &adapter->hw;
5479         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5480
5481         if (hw->mac.type != e1000_82575)
5482                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5483
5484         /* We can enable relaxed ordering for reads, but not writes when
5485          * DCA is enabled.  This is due to a known issue in some chipsets
5486          * which will cause the DCA tag to be cleared.
5487          */
5488         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5489                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5490
5491         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5492 }
5493
5494 static void igb_update_dca(struct igb_q_vector *q_vector)
5495 {
5496         struct igb_adapter *adapter = q_vector->adapter;
5497         int cpu = get_cpu();
5498
5499         if (q_vector->cpu == cpu)
5500                 goto out_no_update;
5501
5502         if (q_vector->tx.ring)
5503                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5504
5505         if (q_vector->rx.ring)
5506                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5507
5508         q_vector->cpu = cpu;
5509 out_no_update:
5510         put_cpu();
5511 }
5512
5513 static void igb_setup_dca(struct igb_adapter *adapter)
5514 {
5515         struct e1000_hw *hw = &adapter->hw;
5516         int i;
5517
5518         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5519                 return;
5520
5521         /* Always use CB2 mode, difference is masked in the CB driver. */
5522         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5523
5524         for (i = 0; i < adapter->num_q_vectors; i++) {
5525                 adapter->q_vector[i]->cpu = -1;
5526                 igb_update_dca(adapter->q_vector[i]);
5527         }
5528 }
5529
5530 static int __igb_notify_dca(struct device *dev, void *data)
5531 {
5532         struct net_device *netdev = dev_get_drvdata(dev);
5533         struct igb_adapter *adapter = netdev_priv(netdev);
5534         struct pci_dev *pdev = adapter->pdev;
5535         struct e1000_hw *hw = &adapter->hw;
5536         unsigned long event = *(unsigned long *)data;
5537
5538         switch (event) {
5539         case DCA_PROVIDER_ADD:
5540                 /* if already enabled, don't do it again */
5541                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5542                         break;
5543                 if (dca_add_requester(dev) == 0) {
5544                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5545                         dev_info(&pdev->dev, "DCA enabled\n");
5546                         igb_setup_dca(adapter);
5547                         break;
5548                 }
5549                 /* Fall Through since DCA is disabled. */
5550         case DCA_PROVIDER_REMOVE:
5551                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5552                         /* without this a class_device is left
5553                          * hanging around in the sysfs model
5554                          */
5555                         dca_remove_requester(dev);
5556                         dev_info(&pdev->dev, "DCA disabled\n");
5557                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5558                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5559                 }
5560                 break;
5561         }
5562
5563         return 0;
5564 }
5565
5566 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5567                           void *p)
5568 {
5569         int ret_val;
5570
5571         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5572                                          __igb_notify_dca);
5573
5574         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5575 }
5576 #endif /* CONFIG_IGB_DCA */
5577
5578 #ifdef CONFIG_PCI_IOV
5579 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5580 {
5581         unsigned char mac_addr[ETH_ALEN];
5582
5583         eth_zero_addr(mac_addr);
5584         igb_set_vf_mac(adapter, vf, mac_addr);
5585
5586         /* By default spoof check is enabled for all VFs */
5587         adapter->vf_data[vf].spoofchk_enabled = true;
5588
5589         return 0;
5590 }
5591
5592 #endif
5593 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5594 {
5595         struct e1000_hw *hw = &adapter->hw;
5596         u32 ping;
5597         int i;
5598
5599         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5600                 ping = E1000_PF_CONTROL_MSG;
5601                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5602                         ping |= E1000_VT_MSGTYPE_CTS;
5603                 igb_write_mbx(hw, &ping, 1, i);
5604         }
5605 }
5606
5607 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5608 {
5609         struct e1000_hw *hw = &adapter->hw;
5610         u32 vmolr = rd32(E1000_VMOLR(vf));
5611         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5612
5613         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5614                             IGB_VF_FLAG_MULTI_PROMISC);
5615         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5616
5617         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5618                 vmolr |= E1000_VMOLR_MPME;
5619                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5620                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5621         } else {
5622                 /* if we have hashes and we are clearing a multicast promisc
5623                  * flag we need to write the hashes to the MTA as this step
5624                  * was previously skipped
5625                  */
5626                 if (vf_data->num_vf_mc_hashes > 30) {
5627                         vmolr |= E1000_VMOLR_MPME;
5628                 } else if (vf_data->num_vf_mc_hashes) {
5629                         int j;
5630
5631                         vmolr |= E1000_VMOLR_ROMPE;
5632                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5633                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5634                 }
5635         }
5636
5637         wr32(E1000_VMOLR(vf), vmolr);
5638
5639         /* there are flags left unprocessed, likely not supported */
5640         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5641                 return -EINVAL;
5642
5643         return 0;
5644 }
5645
5646 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5647                                   u32 *msgbuf, u32 vf)
5648 {
5649         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5650         u16 *hash_list = (u16 *)&msgbuf[1];
5651         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5652         int i;
5653
5654         /* salt away the number of multicast addresses assigned
5655          * to this VF for later use to restore when the PF multi cast
5656          * list changes
5657          */
5658         vf_data->num_vf_mc_hashes = n;
5659
5660         /* only up to 30 hash values supported */
5661         if (n > 30)
5662                 n = 30;
5663
5664         /* store the hashes for later use */
5665         for (i = 0; i < n; i++)
5666                 vf_data->vf_mc_hashes[i] = hash_list[i];
5667
5668         /* Flush and reset the mta with the new values */
5669         igb_set_rx_mode(adapter->netdev);
5670
5671         return 0;
5672 }
5673
5674 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5675 {
5676         struct e1000_hw *hw = &adapter->hw;
5677         struct vf_data_storage *vf_data;
5678         int i, j;
5679
5680         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5681                 u32 vmolr = rd32(E1000_VMOLR(i));
5682
5683                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5684
5685                 vf_data = &adapter->vf_data[i];
5686
5687                 if ((vf_data->num_vf_mc_hashes > 30) ||
5688                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5689                         vmolr |= E1000_VMOLR_MPME;
5690                 } else if (vf_data->num_vf_mc_hashes) {
5691                         vmolr |= E1000_VMOLR_ROMPE;
5692                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5693                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5694                 }
5695                 wr32(E1000_VMOLR(i), vmolr);
5696         }
5697 }
5698
5699 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5700 {
5701         struct e1000_hw *hw = &adapter->hw;
5702         u32 pool_mask, reg, vid;
5703         int i;
5704
5705         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5706
5707         /* Find the vlan filter for this id */
5708         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5709                 reg = rd32(E1000_VLVF(i));
5710
5711                 /* remove the vf from the pool */
5712                 reg &= ~pool_mask;
5713
5714                 /* if pool is empty then remove entry from vfta */
5715                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5716                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5717                         reg = 0;
5718                         vid = reg & E1000_VLVF_VLANID_MASK;
5719                         igb_vfta_set(hw, vid, false);
5720                 }
5721
5722                 wr32(E1000_VLVF(i), reg);
5723         }
5724
5725         adapter->vf_data[vf].vlans_enabled = 0;
5726 }
5727
5728 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5729 {
5730         struct e1000_hw *hw = &adapter->hw;
5731         u32 reg, i;
5732
5733         /* The vlvf table only exists on 82576 hardware and newer */
5734         if (hw->mac.type < e1000_82576)
5735                 return -1;
5736
5737         /* we only need to do this if VMDq is enabled */
5738         if (!adapter->vfs_allocated_count)
5739                 return -1;
5740
5741         /* Find the vlan filter for this id */
5742         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5743                 reg = rd32(E1000_VLVF(i));
5744                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5745                     vid == (reg & E1000_VLVF_VLANID_MASK))
5746                         break;
5747         }
5748
5749         if (add) {
5750                 if (i == E1000_VLVF_ARRAY_SIZE) {
5751                         /* Did not find a matching VLAN ID entry that was
5752                          * enabled.  Search for a free filter entry, i.e.
5753                          * one without the enable bit set
5754                          */
5755                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5756                                 reg = rd32(E1000_VLVF(i));
5757                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5758                                         break;
5759                         }
5760                 }
5761                 if (i < E1000_VLVF_ARRAY_SIZE) {
5762                         /* Found an enabled/available entry */
5763                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5764
5765                         /* if !enabled we need to set this up in vfta */
5766                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5767                                 /* add VID to filter table */
5768                                 igb_vfta_set(hw, vid, true);
5769                                 reg |= E1000_VLVF_VLANID_ENABLE;
5770                         }
5771                         reg &= ~E1000_VLVF_VLANID_MASK;
5772                         reg |= vid;
5773                         wr32(E1000_VLVF(i), reg);
5774
5775                         /* do not modify RLPML for PF devices */
5776                         if (vf >= adapter->vfs_allocated_count)
5777                                 return 0;
5778
5779                         if (!adapter->vf_data[vf].vlans_enabled) {
5780                                 u32 size;
5781
5782                                 reg = rd32(E1000_VMOLR(vf));
5783                                 size = reg & E1000_VMOLR_RLPML_MASK;
5784                                 size += 4;
5785                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5786                                 reg |= size;
5787                                 wr32(E1000_VMOLR(vf), reg);
5788                         }
5789
5790                         adapter->vf_data[vf].vlans_enabled++;
5791                 }
5792         } else {
5793                 if (i < E1000_VLVF_ARRAY_SIZE) {
5794                         /* remove vf from the pool */
5795                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5796                         /* if pool is empty then remove entry from vfta */
5797                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5798                                 reg = 0;
5799                                 igb_vfta_set(hw, vid, false);
5800                         }
5801                         wr32(E1000_VLVF(i), reg);
5802
5803                         /* do not modify RLPML for PF devices */
5804                         if (vf >= adapter->vfs_allocated_count)
5805                                 return 0;
5806
5807                         adapter->vf_data[vf].vlans_enabled--;
5808                         if (!adapter->vf_data[vf].vlans_enabled) {
5809                                 u32 size;
5810
5811                                 reg = rd32(E1000_VMOLR(vf));
5812                                 size = reg & E1000_VMOLR_RLPML_MASK;
5813                                 size -= 4;
5814                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5815                                 reg |= size;
5816                                 wr32(E1000_VMOLR(vf), reg);
5817                         }
5818                 }
5819         }
5820         return 0;
5821 }
5822
5823 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5824 {
5825         struct e1000_hw *hw = &adapter->hw;
5826
5827         if (vid)
5828                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5829         else
5830                 wr32(E1000_VMVIR(vf), 0);
5831 }
5832
5833 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5834                                int vf, u16 vlan, u8 qos)
5835 {
5836         int err = 0;
5837         struct igb_adapter *adapter = netdev_priv(netdev);
5838
5839         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5840                 return -EINVAL;
5841         if (vlan || qos) {
5842                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5843                 if (err)
5844                         goto out;
5845                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5846                 igb_set_vmolr(adapter, vf, !vlan);
5847                 adapter->vf_data[vf].pf_vlan = vlan;
5848                 adapter->vf_data[vf].pf_qos = qos;
5849                 dev_info(&adapter->pdev->dev,
5850                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5851                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5852                         dev_warn(&adapter->pdev->dev,
5853                                  "The VF VLAN has been set, but the PF device is not up.\n");
5854                         dev_warn(&adapter->pdev->dev,
5855                                  "Bring the PF device up before attempting to use the VF device.\n");
5856                 }
5857         } else {
5858                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5859                              false, vf);
5860                 igb_set_vmvir(adapter, vlan, vf);
5861                 igb_set_vmolr(adapter, vf, true);
5862                 adapter->vf_data[vf].pf_vlan = 0;
5863                 adapter->vf_data[vf].pf_qos = 0;
5864         }
5865 out:
5866         return err;
5867 }
5868
5869 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5870 {
5871         struct e1000_hw *hw = &adapter->hw;
5872         int i;
5873         u32 reg;
5874
5875         /* Find the vlan filter for this id */
5876         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5877                 reg = rd32(E1000_VLVF(i));
5878                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5879                     vid == (reg & E1000_VLVF_VLANID_MASK))
5880                         break;
5881         }
5882
5883         if (i >= E1000_VLVF_ARRAY_SIZE)
5884                 i = -1;
5885
5886         return i;
5887 }
5888
5889 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5890 {
5891         struct e1000_hw *hw = &adapter->hw;
5892         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5893         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5894         int err = 0;
5895
5896         /* If in promiscuous mode we need to make sure the PF also has
5897          * the VLAN filter set.
5898          */
5899         if (add && (adapter->netdev->flags & IFF_PROMISC))
5900                 err = igb_vlvf_set(adapter, vid, add,
5901                                    adapter->vfs_allocated_count);
5902         if (err)
5903                 goto out;
5904
5905         err = igb_vlvf_set(adapter, vid, add, vf);
5906
5907         if (err)
5908                 goto out;
5909
5910         /* Go through all the checks to see if the VLAN filter should
5911          * be wiped completely.
5912          */
5913         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5914                 u32 vlvf, bits;
5915                 int regndx = igb_find_vlvf_entry(adapter, vid);
5916
5917                 if (regndx < 0)
5918                         goto out;
5919                 /* See if any other pools are set for this VLAN filter
5920                  * entry other than the PF.
5921                  */
5922                 vlvf = bits = rd32(E1000_VLVF(regndx));
5923                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5924                               adapter->vfs_allocated_count);
5925                 /* If the filter was removed then ensure PF pool bit
5926                  * is cleared if the PF only added itself to the pool
5927                  * because the PF is in promiscuous mode.
5928                  */
5929                 if ((vlvf & VLAN_VID_MASK) == vid &&
5930                     !test_bit(vid, adapter->active_vlans) &&
5931                     !bits)
5932                         igb_vlvf_set(adapter, vid, add,
5933                                      adapter->vfs_allocated_count);
5934         }
5935
5936 out:
5937         return err;
5938 }
5939
5940 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5941 {
5942         /* clear flags - except flag that indicates PF has set the MAC */
5943         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5944         adapter->vf_data[vf].last_nack = jiffies;
5945
5946         /* reset offloads to defaults */
5947         igb_set_vmolr(adapter, vf, true);
5948
5949         /* reset vlans for device */
5950         igb_clear_vf_vfta(adapter, vf);
5951         if (adapter->vf_data[vf].pf_vlan)
5952                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5953                                     adapter->vf_data[vf].pf_vlan,
5954                                     adapter->vf_data[vf].pf_qos);
5955         else
5956                 igb_clear_vf_vfta(adapter, vf);
5957
5958         /* reset multicast table array for vf */
5959         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5960
5961         /* Flush and reset the mta with the new values */
5962         igb_set_rx_mode(adapter->netdev);
5963 }
5964
5965 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5966 {
5967         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5968
5969         /* clear mac address as we were hotplug removed/added */
5970         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5971                 eth_zero_addr(vf_mac);
5972
5973         /* process remaining reset events */
5974         igb_vf_reset(adapter, vf);
5975 }
5976
5977 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5978 {
5979         struct e1000_hw *hw = &adapter->hw;
5980         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5981         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5982         u32 reg, msgbuf[3];
5983         u8 *addr = (u8 *)(&msgbuf[1]);
5984
5985         /* process all the same items cleared in a function level reset */
5986         igb_vf_reset(adapter, vf);
5987
5988         /* set vf mac address */
5989         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5990
5991         /* enable transmit and receive for vf */
5992         reg = rd32(E1000_VFTE);
5993         wr32(E1000_VFTE, reg | (1 << vf));
5994         reg = rd32(E1000_VFRE);
5995         wr32(E1000_VFRE, reg | (1 << vf));
5996
5997         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5998
5999         /* reply to reset with ack and vf mac address */
6000         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6001         memcpy(addr, vf_mac, ETH_ALEN);
6002         igb_write_mbx(hw, msgbuf, 3, vf);
6003 }
6004
6005 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6006 {
6007         /* The VF MAC Address is stored in a packed array of bytes
6008          * starting at the second 32 bit word of the msg array
6009          */
6010         unsigned char *addr = (char *)&msg[1];
6011         int err = -1;
6012
6013         if (is_valid_ether_addr(addr))
6014                 err = igb_set_vf_mac(adapter, vf, addr);
6015
6016         return err;
6017 }
6018
6019 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6020 {
6021         struct e1000_hw *hw = &adapter->hw;
6022         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6023         u32 msg = E1000_VT_MSGTYPE_NACK;
6024
6025         /* if device isn't clear to send it shouldn't be reading either */
6026         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6027             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6028                 igb_write_mbx(hw, &msg, 1, vf);
6029                 vf_data->last_nack = jiffies;
6030         }
6031 }
6032
6033 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6034 {
6035         struct pci_dev *pdev = adapter->pdev;
6036         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6037         struct e1000_hw *hw = &adapter->hw;
6038         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6039         s32 retval;
6040
6041         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6042
6043         if (retval) {
6044                 /* if receive failed revoke VF CTS stats and restart init */
6045                 dev_err(&pdev->dev, "Error receiving message from VF\n");
6046                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
6047                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6048                         return;
6049                 goto out;
6050         }
6051
6052         /* this is a message we already processed, do nothing */
6053         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6054                 return;
6055
6056         /* until the vf completes a reset it should not be
6057          * allowed to start any configuration.
6058          */
6059         if (msgbuf[0] == E1000_VF_RESET) {
6060                 igb_vf_reset_msg(adapter, vf);
6061                 return;
6062         }
6063
6064         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6065                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
6066                         return;
6067                 retval = -1;
6068                 goto out;
6069         }
6070
6071         switch ((msgbuf[0] & 0xFFFF)) {
6072         case E1000_VF_SET_MAC_ADDR:
6073                 retval = -EINVAL;
6074                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6075                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6076                 else
6077                         dev_warn(&pdev->dev,
6078                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6079                                  vf);
6080                 break;
6081         case E1000_VF_SET_PROMISC:
6082                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6083                 break;
6084         case E1000_VF_SET_MULTICAST:
6085                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6086                 break;
6087         case E1000_VF_SET_LPE:
6088                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6089                 break;
6090         case E1000_VF_SET_VLAN:
6091                 retval = -1;
6092                 if (vf_data->pf_vlan)
6093                         dev_warn(&pdev->dev,
6094                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6095                                  vf);
6096                 else
6097                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6098                 break;
6099         default:
6100                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6101                 retval = -1;
6102                 break;
6103         }
6104
6105         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6106 out:
6107         /* notify the VF of the results of what it sent us */
6108         if (retval)
6109                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6110         else
6111                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6112
6113         igb_write_mbx(hw, msgbuf, 1, vf);
6114 }
6115
6116 static void igb_msg_task(struct igb_adapter *adapter)
6117 {
6118         struct e1000_hw *hw = &adapter->hw;
6119         u32 vf;
6120
6121         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6122                 /* process any reset requests */
6123                 if (!igb_check_for_rst(hw, vf))
6124                         igb_vf_reset_event(adapter, vf);
6125
6126                 /* process any messages pending */
6127                 if (!igb_check_for_msg(hw, vf))
6128                         igb_rcv_msg_from_vf(adapter, vf);
6129
6130                 /* process any acks */
6131                 if (!igb_check_for_ack(hw, vf))
6132                         igb_rcv_ack_from_vf(adapter, vf);
6133         }
6134 }
6135
6136 /**
6137  *  igb_set_uta - Set unicast filter table address
6138  *  @adapter: board private structure
6139  *
6140  *  The unicast table address is a register array of 32-bit registers.
6141  *  The table is meant to be used in a way similar to how the MTA is used
6142  *  however due to certain limitations in the hardware it is necessary to
6143  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6144  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6145  **/
6146 static void igb_set_uta(struct igb_adapter *adapter)
6147 {
6148         struct e1000_hw *hw = &adapter->hw;
6149         int i;
6150
6151         /* The UTA table only exists on 82576 hardware and newer */
6152         if (hw->mac.type < e1000_82576)
6153                 return;
6154
6155         /* we only need to do this if VMDq is enabled */
6156         if (!adapter->vfs_allocated_count)
6157                 return;
6158
6159         for (i = 0; i < hw->mac.uta_reg_count; i++)
6160                 array_wr32(E1000_UTA, i, ~0);
6161 }
6162
6163 /**
6164  *  igb_intr_msi - Interrupt Handler
6165  *  @irq: interrupt number
6166  *  @data: pointer to a network interface device structure
6167  **/
6168 static irqreturn_t igb_intr_msi(int irq, void *data)
6169 {
6170         struct igb_adapter *adapter = data;
6171         struct igb_q_vector *q_vector = adapter->q_vector[0];
6172         struct e1000_hw *hw = &adapter->hw;
6173         /* read ICR disables interrupts using IAM */
6174         u32 icr = rd32(E1000_ICR);
6175
6176         igb_write_itr(q_vector);
6177
6178         if (icr & E1000_ICR_DRSTA)
6179                 schedule_work(&adapter->reset_task);
6180
6181         if (icr & E1000_ICR_DOUTSYNC) {
6182                 /* HW is reporting DMA is out of sync */
6183                 adapter->stats.doosync++;
6184         }
6185
6186         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6187                 hw->mac.get_link_status = 1;
6188                 if (!test_bit(__IGB_DOWN, &adapter->state))
6189                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6190         }
6191
6192         if (icr & E1000_ICR_TS) {
6193                 u32 tsicr = rd32(E1000_TSICR);
6194
6195                 if (tsicr & E1000_TSICR_TXTS) {
6196                         /* acknowledge the interrupt */
6197                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6198                         /* retrieve hardware timestamp */
6199                         schedule_work(&adapter->ptp_tx_work);
6200                 }
6201         }
6202
6203         napi_schedule(&q_vector->napi);
6204
6205         return IRQ_HANDLED;
6206 }
6207
6208 /**
6209  *  igb_intr - Legacy Interrupt Handler
6210  *  @irq: interrupt number
6211  *  @data: pointer to a network interface device structure
6212  **/
6213 static irqreturn_t igb_intr(int irq, void *data)
6214 {
6215         struct igb_adapter *adapter = data;
6216         struct igb_q_vector *q_vector = adapter->q_vector[0];
6217         struct e1000_hw *hw = &adapter->hw;
6218         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6219          * need for the IMC write
6220          */
6221         u32 icr = rd32(E1000_ICR);
6222
6223         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6224          * not set, then the adapter didn't send an interrupt
6225          */
6226         if (!(icr & E1000_ICR_INT_ASSERTED))
6227                 return IRQ_NONE;
6228
6229         igb_write_itr(q_vector);
6230
6231         if (icr & E1000_ICR_DRSTA)
6232                 schedule_work(&adapter->reset_task);
6233
6234         if (icr & E1000_ICR_DOUTSYNC) {
6235                 /* HW is reporting DMA is out of sync */
6236                 adapter->stats.doosync++;
6237         }
6238
6239         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6240                 hw->mac.get_link_status = 1;
6241                 /* guard against interrupt when we're going down */
6242                 if (!test_bit(__IGB_DOWN, &adapter->state))
6243                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6244         }
6245
6246         if (icr & E1000_ICR_TS) {
6247                 u32 tsicr = rd32(E1000_TSICR);
6248
6249                 if (tsicr & E1000_TSICR_TXTS) {
6250                         /* acknowledge the interrupt */
6251                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6252                         /* retrieve hardware timestamp */
6253                         schedule_work(&adapter->ptp_tx_work);
6254                 }
6255         }
6256
6257         napi_schedule(&q_vector->napi);
6258
6259         return IRQ_HANDLED;
6260 }
6261
6262 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6263 {
6264         struct igb_adapter *adapter = q_vector->adapter;
6265         struct e1000_hw *hw = &adapter->hw;
6266
6267         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6268             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6269                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6270                         igb_set_itr(q_vector);
6271                 else
6272                         igb_update_ring_itr(q_vector);
6273         }
6274
6275         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6276                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
6277                         wr32(E1000_EIMS, q_vector->eims_value);
6278                 else
6279                         igb_irq_enable(adapter);
6280         }
6281 }
6282
6283 /**
6284  *  igb_poll - NAPI Rx polling callback
6285  *  @napi: napi polling structure
6286  *  @budget: count of how many packets we should handle
6287  **/
6288 static int igb_poll(struct napi_struct *napi, int budget)
6289 {
6290         struct igb_q_vector *q_vector = container_of(napi,
6291                                                      struct igb_q_vector,
6292                                                      napi);
6293         bool clean_complete = true;
6294
6295 #ifdef CONFIG_IGB_DCA
6296         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6297                 igb_update_dca(q_vector);
6298 #endif
6299         if (q_vector->tx.ring)
6300                 clean_complete = igb_clean_tx_irq(q_vector);
6301
6302         if (q_vector->rx.ring)
6303                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6304
6305         /* If all work not completed, return budget and keep polling */
6306         if (!clean_complete)
6307                 return budget;
6308
6309         /* If not enough Rx work done, exit the polling mode */
6310         napi_complete(napi);
6311         igb_ring_irq_enable(q_vector);
6312
6313         return 0;
6314 }
6315
6316 /**
6317  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6318  *  @q_vector: pointer to q_vector containing needed info
6319  *
6320  *  returns true if ring is completely cleaned
6321  **/
6322 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6323 {
6324         struct igb_adapter *adapter = q_vector->adapter;
6325         struct igb_ring *tx_ring = q_vector->tx.ring;
6326         struct igb_tx_buffer *tx_buffer;
6327         union e1000_adv_tx_desc *tx_desc;
6328         unsigned int total_bytes = 0, total_packets = 0;
6329         unsigned int budget = q_vector->tx.work_limit;
6330         unsigned int i = tx_ring->next_to_clean;
6331
6332         if (test_bit(__IGB_DOWN, &adapter->state))
6333                 return true;
6334
6335         tx_buffer = &tx_ring->tx_buffer_info[i];
6336         tx_desc = IGB_TX_DESC(tx_ring, i);
6337         i -= tx_ring->count;
6338
6339         do {
6340                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6341
6342                 /* if next_to_watch is not set then there is no work pending */
6343                 if (!eop_desc)
6344                         break;
6345
6346                 /* prevent any other reads prior to eop_desc */
6347                 read_barrier_depends();
6348
6349                 /* if DD is not set pending work has not been completed */
6350                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6351                         break;
6352
6353                 /* clear next_to_watch to prevent false hangs */
6354                 tx_buffer->next_to_watch = NULL;
6355
6356                 /* update the statistics for this packet */
6357                 total_bytes += tx_buffer->bytecount;
6358                 total_packets += tx_buffer->gso_segs;
6359
6360                 /* free the skb */
6361                 dev_kfree_skb_any(tx_buffer->skb);
6362
6363                 /* unmap skb header data */
6364                 dma_unmap_single(tx_ring->dev,
6365                                  dma_unmap_addr(tx_buffer, dma),
6366                                  dma_unmap_len(tx_buffer, len),
6367                                  DMA_TO_DEVICE);
6368
6369                 /* clear tx_buffer data */
6370                 tx_buffer->skb = NULL;
6371                 dma_unmap_len_set(tx_buffer, len, 0);
6372
6373                 /* clear last DMA location and unmap remaining buffers */
6374                 while (tx_desc != eop_desc) {
6375                         tx_buffer++;
6376                         tx_desc++;
6377                         i++;
6378                         if (unlikely(!i)) {
6379                                 i -= tx_ring->count;
6380                                 tx_buffer = tx_ring->tx_buffer_info;
6381                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6382                         }
6383
6384                         /* unmap any remaining paged data */
6385                         if (dma_unmap_len(tx_buffer, len)) {
6386                                 dma_unmap_page(tx_ring->dev,
6387                                                dma_unmap_addr(tx_buffer, dma),
6388                                                dma_unmap_len(tx_buffer, len),
6389                                                DMA_TO_DEVICE);
6390                                 dma_unmap_len_set(tx_buffer, len, 0);
6391                         }
6392                 }
6393
6394                 /* move us one more past the eop_desc for start of next pkt */
6395                 tx_buffer++;
6396                 tx_desc++;
6397                 i++;
6398                 if (unlikely(!i)) {
6399                         i -= tx_ring->count;
6400                         tx_buffer = tx_ring->tx_buffer_info;
6401                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6402                 }
6403
6404                 /* issue prefetch for next Tx descriptor */
6405                 prefetch(tx_desc);
6406
6407                 /* update budget accounting */
6408                 budget--;
6409         } while (likely(budget));
6410
6411         netdev_tx_completed_queue(txring_txq(tx_ring),
6412                                   total_packets, total_bytes);
6413         i += tx_ring->count;
6414         tx_ring->next_to_clean = i;
6415         u64_stats_update_begin(&tx_ring->tx_syncp);
6416         tx_ring->tx_stats.bytes += total_bytes;
6417         tx_ring->tx_stats.packets += total_packets;
6418         u64_stats_update_end(&tx_ring->tx_syncp);
6419         q_vector->tx.total_bytes += total_bytes;
6420         q_vector->tx.total_packets += total_packets;
6421
6422         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6423                 struct e1000_hw *hw = &adapter->hw;
6424
6425                 /* Detect a transmit hang in hardware, this serializes the
6426                  * check with the clearing of time_stamp and movement of i
6427                  */
6428                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6429                 if (tx_buffer->next_to_watch &&
6430                     time_after(jiffies, tx_buffer->time_stamp +
6431                                (adapter->tx_timeout_factor * HZ)) &&
6432                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6433
6434                         /* detected Tx unit hang */
6435                         dev_err(tx_ring->dev,
6436                                 "Detected Tx Unit Hang\n"
6437                                 "  Tx Queue             <%d>\n"
6438                                 "  TDH                  <%x>\n"
6439                                 "  TDT                  <%x>\n"
6440                                 "  next_to_use          <%x>\n"
6441                                 "  next_to_clean        <%x>\n"
6442                                 "buffer_info[next_to_clean]\n"
6443                                 "  time_stamp           <%lx>\n"
6444                                 "  next_to_watch        <%p>\n"
6445                                 "  jiffies              <%lx>\n"
6446                                 "  desc.status          <%x>\n",
6447                                 tx_ring->queue_index,
6448                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6449                                 readl(tx_ring->tail),
6450                                 tx_ring->next_to_use,
6451                                 tx_ring->next_to_clean,
6452                                 tx_buffer->time_stamp,
6453                                 tx_buffer->next_to_watch,
6454                                 jiffies,
6455                                 tx_buffer->next_to_watch->wb.status);
6456                         netif_stop_subqueue(tx_ring->netdev,
6457                                             tx_ring->queue_index);
6458
6459                         /* we are about to reset, no point in enabling stuff */
6460                         return true;
6461                 }
6462         }
6463
6464 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6465         if (unlikely(total_packets &&
6466             netif_carrier_ok(tx_ring->netdev) &&
6467             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6468                 /* Make sure that anybody stopping the queue after this
6469                  * sees the new next_to_clean.
6470                  */
6471                 smp_mb();
6472                 if (__netif_subqueue_stopped(tx_ring->netdev,
6473                                              tx_ring->queue_index) &&
6474                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6475                         netif_wake_subqueue(tx_ring->netdev,
6476                                             tx_ring->queue_index);
6477
6478                         u64_stats_update_begin(&tx_ring->tx_syncp);
6479                         tx_ring->tx_stats.restart_queue++;
6480                         u64_stats_update_end(&tx_ring->tx_syncp);
6481                 }
6482         }
6483
6484         return !!budget;
6485 }
6486
6487 /**
6488  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6489  *  @rx_ring: rx descriptor ring to store buffers on
6490  *  @old_buff: donor buffer to have page reused
6491  *
6492  *  Synchronizes page for reuse by the adapter
6493  **/
6494 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6495                               struct igb_rx_buffer *old_buff)
6496 {
6497         struct igb_rx_buffer *new_buff;
6498         u16 nta = rx_ring->next_to_alloc;
6499
6500         new_buff = &rx_ring->rx_buffer_info[nta];
6501
6502         /* update, and store next to alloc */
6503         nta++;
6504         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6505
6506         /* transfer page from old buffer to new buffer */
6507         *new_buff = *old_buff;
6508
6509         /* sync the buffer for use by the device */
6510         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6511                                          old_buff->page_offset,
6512                                          IGB_RX_BUFSZ,
6513                                          DMA_FROM_DEVICE);
6514 }
6515
6516 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6517                                   struct page *page,
6518                                   unsigned int truesize)
6519 {
6520         /* avoid re-using remote pages */
6521         if (unlikely(page_to_nid(page) != numa_node_id()))
6522                 return false;
6523
6524 #if (PAGE_SIZE < 8192)
6525         /* if we are only owner of page we can reuse it */
6526         if (unlikely(page_count(page) != 1))
6527                 return false;
6528
6529         /* flip page offset to other buffer */
6530         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6531
6532         /* since we are the only owner of the page and we need to
6533          * increment it, just set the value to 2 in order to avoid
6534          * an unnecessary locked operation
6535          */
6536         atomic_set(&page->_count, 2);
6537 #else
6538         /* move offset up to the next cache line */
6539         rx_buffer->page_offset += truesize;
6540
6541         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6542                 return false;
6543
6544         /* bump ref count on page before it is given to the stack */
6545         get_page(page);
6546 #endif
6547
6548         return true;
6549 }
6550
6551 /**
6552  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6553  *  @rx_ring: rx descriptor ring to transact packets on
6554  *  @rx_buffer: buffer containing page to add
6555  *  @rx_desc: descriptor containing length of buffer written by hardware
6556  *  @skb: sk_buff to place the data into
6557  *
6558  *  This function will add the data contained in rx_buffer->page to the skb.
6559  *  This is done either through a direct copy if the data in the buffer is
6560  *  less than the skb header size, otherwise it will just attach the page as
6561  *  a frag to the skb.
6562  *
6563  *  The function will then update the page offset if necessary and return
6564  *  true if the buffer can be reused by the adapter.
6565  **/
6566 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6567                             struct igb_rx_buffer *rx_buffer,
6568                             union e1000_adv_rx_desc *rx_desc,
6569                             struct sk_buff *skb)
6570 {
6571         struct page *page = rx_buffer->page;
6572         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6573 #if (PAGE_SIZE < 8192)
6574         unsigned int truesize = IGB_RX_BUFSZ;
6575 #else
6576         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6577 #endif
6578
6579         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6580                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6581
6582                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6583                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6584                         va += IGB_TS_HDR_LEN;
6585                         size -= IGB_TS_HDR_LEN;
6586                 }
6587
6588                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6589
6590                 /* we can reuse buffer as-is, just make sure it is local */
6591                 if (likely(page_to_nid(page) == numa_node_id()))
6592                         return true;
6593
6594                 /* this page cannot be reused so discard it */
6595                 put_page(page);
6596                 return false;
6597         }
6598
6599         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6600                         rx_buffer->page_offset, size, truesize);
6601
6602         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6603 }
6604
6605 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6606                                            union e1000_adv_rx_desc *rx_desc,
6607                                            struct sk_buff *skb)
6608 {
6609         struct igb_rx_buffer *rx_buffer;
6610         struct page *page;
6611
6612         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6613
6614         page = rx_buffer->page;
6615         prefetchw(page);
6616
6617         if (likely(!skb)) {
6618                 void *page_addr = page_address(page) +
6619                                   rx_buffer->page_offset;
6620
6621                 /* prefetch first cache line of first page */
6622                 prefetch(page_addr);
6623 #if L1_CACHE_BYTES < 128
6624                 prefetch(page_addr + L1_CACHE_BYTES);
6625 #endif
6626
6627                 /* allocate a skb to store the frags */
6628                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6629                                                 IGB_RX_HDR_LEN);
6630                 if (unlikely(!skb)) {
6631                         rx_ring->rx_stats.alloc_failed++;
6632                         return NULL;
6633                 }
6634
6635                 /* we will be copying header into skb->data in
6636                  * pskb_may_pull so it is in our interest to prefetch
6637                  * it now to avoid a possible cache miss
6638                  */
6639                 prefetchw(skb->data);
6640         }
6641
6642         /* we are reusing so sync this buffer for CPU use */
6643         dma_sync_single_range_for_cpu(rx_ring->dev,
6644                                       rx_buffer->dma,
6645                                       rx_buffer->page_offset,
6646                                       IGB_RX_BUFSZ,
6647                                       DMA_FROM_DEVICE);
6648
6649         /* pull page into skb */
6650         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6651                 /* hand second half of page back to the ring */
6652                 igb_reuse_rx_page(rx_ring, rx_buffer);
6653         } else {
6654                 /* we are not reusing the buffer so unmap it */
6655                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6656                                PAGE_SIZE, DMA_FROM_DEVICE);
6657         }
6658
6659         /* clear contents of rx_buffer */
6660         rx_buffer->page = NULL;
6661
6662         return skb;
6663 }
6664
6665 static inline void igb_rx_checksum(struct igb_ring *ring,
6666                                    union e1000_adv_rx_desc *rx_desc,
6667                                    struct sk_buff *skb)
6668 {
6669         skb_checksum_none_assert(skb);
6670
6671         /* Ignore Checksum bit is set */
6672         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6673                 return;
6674
6675         /* Rx checksum disabled via ethtool */
6676         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6677                 return;
6678
6679         /* TCP/UDP checksum error bit is set */
6680         if (igb_test_staterr(rx_desc,
6681                              E1000_RXDEXT_STATERR_TCPE |
6682                              E1000_RXDEXT_STATERR_IPE)) {
6683                 /* work around errata with sctp packets where the TCPE aka
6684                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6685                  * packets, (aka let the stack check the crc32c)
6686                  */
6687                 if (!((skb->len == 60) &&
6688                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6689                         u64_stats_update_begin(&ring->rx_syncp);
6690                         ring->rx_stats.csum_err++;
6691                         u64_stats_update_end(&ring->rx_syncp);
6692                 }
6693                 /* let the stack verify checksum errors */
6694                 return;
6695         }
6696         /* It must be a TCP or UDP packet with a valid checksum */
6697         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6698                                       E1000_RXD_STAT_UDPCS))
6699                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6700
6701         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6702                 le32_to_cpu(rx_desc->wb.upper.status_error));
6703 }
6704
6705 static inline void igb_rx_hash(struct igb_ring *ring,
6706                                union e1000_adv_rx_desc *rx_desc,
6707                                struct sk_buff *skb)
6708 {
6709         if (ring->netdev->features & NETIF_F_RXHASH)
6710                 skb_set_hash(skb,
6711                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
6712                              PKT_HASH_TYPE_L3);
6713 }
6714
6715 /**
6716  *  igb_is_non_eop - process handling of non-EOP buffers
6717  *  @rx_ring: Rx ring being processed
6718  *  @rx_desc: Rx descriptor for current buffer
6719  *  @skb: current socket buffer containing buffer in progress
6720  *
6721  *  This function updates next to clean.  If the buffer is an EOP buffer
6722  *  this function exits returning false, otherwise it will place the
6723  *  sk_buff in the next buffer to be chained and return true indicating
6724  *  that this is in fact a non-EOP buffer.
6725  **/
6726 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6727                            union e1000_adv_rx_desc *rx_desc)
6728 {
6729         u32 ntc = rx_ring->next_to_clean + 1;
6730
6731         /* fetch, update, and store next to clean */
6732         ntc = (ntc < rx_ring->count) ? ntc : 0;
6733         rx_ring->next_to_clean = ntc;
6734
6735         prefetch(IGB_RX_DESC(rx_ring, ntc));
6736
6737         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6738                 return false;
6739
6740         return true;
6741 }
6742
6743 /**
6744  *  igb_get_headlen - determine size of header for LRO/GRO
6745  *  @data: pointer to the start of the headers
6746  *  @max_len: total length of section to find headers in
6747  *
6748  *  This function is meant to determine the length of headers that will
6749  *  be recognized by hardware for LRO, and GRO offloads.  The main
6750  *  motivation of doing this is to only perform one pull for IPv4 TCP
6751  *  packets so that we can do basic things like calculating the gso_size
6752  *  based on the average data per packet.
6753  **/
6754 static unsigned int igb_get_headlen(unsigned char *data,
6755                                     unsigned int max_len)
6756 {
6757         union {
6758                 unsigned char *network;
6759                 /* l2 headers */
6760                 struct ethhdr *eth;
6761                 struct vlan_hdr *vlan;
6762                 /* l3 headers */
6763                 struct iphdr *ipv4;
6764                 struct ipv6hdr *ipv6;
6765         } hdr;
6766         __be16 protocol;
6767         u8 nexthdr = 0; /* default to not TCP */
6768         u8 hlen;
6769
6770         /* this should never happen, but better safe than sorry */
6771         if (max_len < ETH_HLEN)
6772                 return max_len;
6773
6774         /* initialize network frame pointer */
6775         hdr.network = data;
6776
6777         /* set first protocol and move network header forward */
6778         protocol = hdr.eth->h_proto;
6779         hdr.network += ETH_HLEN;
6780
6781         /* handle any vlan tag if present */
6782         if (protocol == htons(ETH_P_8021Q)) {
6783                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6784                         return max_len;
6785
6786                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6787                 hdr.network += VLAN_HLEN;
6788         }
6789
6790         /* handle L3 protocols */
6791         if (protocol == htons(ETH_P_IP)) {
6792                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6793                         return max_len;
6794
6795                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6796                 hlen = (hdr.network[0] & 0x0F) << 2;
6797
6798                 /* verify hlen meets minimum size requirements */
6799                 if (hlen < sizeof(struct iphdr))
6800                         return hdr.network - data;
6801
6802                 /* record next protocol if header is present */
6803                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6804                         nexthdr = hdr.ipv4->protocol;
6805         } else if (protocol == htons(ETH_P_IPV6)) {
6806                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6807                         return max_len;
6808
6809                 /* record next protocol */
6810                 nexthdr = hdr.ipv6->nexthdr;
6811                 hlen = sizeof(struct ipv6hdr);
6812         } else {
6813                 return hdr.network - data;
6814         }
6815
6816         /* relocate pointer to start of L4 header */
6817         hdr.network += hlen;
6818
6819         /* finally sort out TCP */
6820         if (nexthdr == IPPROTO_TCP) {
6821                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6822                         return max_len;
6823
6824                 /* access doff as a u8 to avoid unaligned access on ia64 */
6825                 hlen = (hdr.network[12] & 0xF0) >> 2;
6826
6827                 /* verify hlen meets minimum size requirements */
6828                 if (hlen < sizeof(struct tcphdr))
6829                         return hdr.network - data;
6830
6831                 hdr.network += hlen;
6832         } else if (nexthdr == IPPROTO_UDP) {
6833                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6834                         return max_len;
6835
6836                 hdr.network += sizeof(struct udphdr);
6837         }
6838
6839         /* If everything has gone correctly hdr.network should be the
6840          * data section of the packet and will be the end of the header.
6841          * If not then it probably represents the end of the last recognized
6842          * header.
6843          */
6844         if ((hdr.network - data) < max_len)
6845                 return hdr.network - data;
6846         else
6847                 return max_len;
6848 }
6849
6850 /**
6851  *  igb_pull_tail - igb specific version of skb_pull_tail
6852  *  @rx_ring: rx descriptor ring packet is being transacted on
6853  *  @rx_desc: pointer to the EOP Rx descriptor
6854  *  @skb: pointer to current skb being adjusted
6855  *
6856  *  This function is an igb specific version of __pskb_pull_tail.  The
6857  *  main difference between this version and the original function is that
6858  *  this function can make several assumptions about the state of things
6859  *  that allow for significant optimizations versus the standard function.
6860  *  As a result we can do things like drop a frag and maintain an accurate
6861  *  truesize for the skb.
6862  */
6863 static void igb_pull_tail(struct igb_ring *rx_ring,
6864                           union e1000_adv_rx_desc *rx_desc,
6865                           struct sk_buff *skb)
6866 {
6867         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6868         unsigned char *va;
6869         unsigned int pull_len;
6870
6871         /* it is valid to use page_address instead of kmap since we are
6872          * working with pages allocated out of the lomem pool per
6873          * alloc_page(GFP_ATOMIC)
6874          */
6875         va = skb_frag_address(frag);
6876
6877         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6878                 /* retrieve timestamp from buffer */
6879                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6880
6881                 /* update pointers to remove timestamp header */
6882                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6883                 frag->page_offset += IGB_TS_HDR_LEN;
6884                 skb->data_len -= IGB_TS_HDR_LEN;
6885                 skb->len -= IGB_TS_HDR_LEN;
6886
6887                 /* move va to start of packet data */
6888                 va += IGB_TS_HDR_LEN;
6889         }
6890
6891         /* we need the header to contain the greater of either ETH_HLEN or
6892          * 60 bytes if the skb->len is less than 60 for skb_pad.
6893          */
6894         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6895
6896         /* align pull length to size of long to optimize memcpy performance */
6897         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6898
6899         /* update all of the pointers */
6900         skb_frag_size_sub(frag, pull_len);
6901         frag->page_offset += pull_len;
6902         skb->data_len -= pull_len;
6903         skb->tail += pull_len;
6904 }
6905
6906 /**
6907  *  igb_cleanup_headers - Correct corrupted or empty headers
6908  *  @rx_ring: rx descriptor ring packet is being transacted on
6909  *  @rx_desc: pointer to the EOP Rx descriptor
6910  *  @skb: pointer to current skb being fixed
6911  *
6912  *  Address the case where we are pulling data in on pages only
6913  *  and as such no data is present in the skb header.
6914  *
6915  *  In addition if skb is not at least 60 bytes we need to pad it so that
6916  *  it is large enough to qualify as a valid Ethernet frame.
6917  *
6918  *  Returns true if an error was encountered and skb was freed.
6919  **/
6920 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6921                                 union e1000_adv_rx_desc *rx_desc,
6922                                 struct sk_buff *skb)
6923 {
6924         if (unlikely((igb_test_staterr(rx_desc,
6925                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6926                 struct net_device *netdev = rx_ring->netdev;
6927                 if (!(netdev->features & NETIF_F_RXALL)) {
6928                         dev_kfree_skb_any(skb);
6929                         return true;
6930                 }
6931         }
6932
6933         /* place header in linear portion of buffer */
6934         if (skb_is_nonlinear(skb))
6935                 igb_pull_tail(rx_ring, rx_desc, skb);
6936
6937         /* if skb_pad returns an error the skb was freed */
6938         if (unlikely(skb->len < 60)) {
6939                 int pad_len = 60 - skb->len;
6940
6941                 if (skb_pad(skb, pad_len))
6942                         return true;
6943                 __skb_put(skb, pad_len);
6944         }
6945
6946         return false;
6947 }
6948
6949 /**
6950  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6951  *  @rx_ring: rx descriptor ring packet is being transacted on
6952  *  @rx_desc: pointer to the EOP Rx descriptor
6953  *  @skb: pointer to current skb being populated
6954  *
6955  *  This function checks the ring, descriptor, and packet information in
6956  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6957  *  other fields within the skb.
6958  **/
6959 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6960                                    union e1000_adv_rx_desc *rx_desc,
6961                                    struct sk_buff *skb)
6962 {
6963         struct net_device *dev = rx_ring->netdev;
6964
6965         igb_rx_hash(rx_ring, rx_desc, skb);
6966
6967         igb_rx_checksum(rx_ring, rx_desc, skb);
6968
6969         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
6970             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
6971                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
6972
6973         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6974             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6975                 u16 vid;
6976
6977                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6978                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6979                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6980                 else
6981                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6982
6983                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6984         }
6985
6986         skb_record_rx_queue(skb, rx_ring->queue_index);
6987
6988         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6989 }
6990
6991 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6992 {
6993         struct igb_ring *rx_ring = q_vector->rx.ring;
6994         struct sk_buff *skb = rx_ring->skb;
6995         unsigned int total_bytes = 0, total_packets = 0;
6996         u16 cleaned_count = igb_desc_unused(rx_ring);
6997
6998         while (likely(total_packets < budget)) {
6999                 union e1000_adv_rx_desc *rx_desc;
7000
7001                 /* return some buffers to hardware, one at a time is too slow */
7002                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7003                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7004                         cleaned_count = 0;
7005                 }
7006
7007                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
7008
7009                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7010                         break;
7011
7012                 /* This memory barrier is needed to keep us from reading
7013                  * any other fields out of the rx_desc until we know the
7014                  * RXD_STAT_DD bit is set
7015                  */
7016                 rmb();
7017
7018                 /* retrieve a buffer from the ring */
7019                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
7020
7021                 /* exit if we failed to retrieve a buffer */
7022                 if (!skb)
7023                         break;
7024
7025                 cleaned_count++;
7026
7027                 /* fetch next buffer in frame if non-eop */
7028                 if (igb_is_non_eop(rx_ring, rx_desc))
7029                         continue;
7030
7031                 /* verify the packet layout is correct */
7032                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
7033                         skb = NULL;
7034                         continue;
7035                 }
7036
7037                 /* probably a little skewed due to removing CRC */
7038                 total_bytes += skb->len;
7039
7040                 /* populate checksum, timestamp, VLAN, and protocol */
7041                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7042
7043                 napi_gro_receive(&q_vector->napi, skb);
7044
7045                 /* reset skb pointer */
7046                 skb = NULL;
7047
7048                 /* update budget accounting */
7049                 total_packets++;
7050         }
7051
7052         /* place incomplete frames back on ring for completion */
7053         rx_ring->skb = skb;
7054
7055         u64_stats_update_begin(&rx_ring->rx_syncp);
7056         rx_ring->rx_stats.packets += total_packets;
7057         rx_ring->rx_stats.bytes += total_bytes;
7058         u64_stats_update_end(&rx_ring->rx_syncp);
7059         q_vector->rx.total_packets += total_packets;
7060         q_vector->rx.total_bytes += total_bytes;
7061
7062         if (cleaned_count)
7063                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
7064
7065         return total_packets < budget;
7066 }
7067
7068 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
7069                                   struct igb_rx_buffer *bi)
7070 {
7071         struct page *page = bi->page;
7072         dma_addr_t dma;
7073
7074         /* since we are recycling buffers we should seldom need to alloc */
7075         if (likely(page))
7076                 return true;
7077
7078         /* alloc new page for storage */
7079         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
7080         if (unlikely(!page)) {
7081                 rx_ring->rx_stats.alloc_failed++;
7082                 return false;
7083         }
7084
7085         /* map page for use */
7086         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
7087
7088         /* if mapping failed free memory back to system since
7089          * there isn't much point in holding memory we can't use
7090          */
7091         if (dma_mapping_error(rx_ring->dev, dma)) {
7092                 __free_page(page);
7093
7094                 rx_ring->rx_stats.alloc_failed++;
7095                 return false;
7096         }
7097
7098         bi->dma = dma;
7099         bi->page = page;
7100         bi->page_offset = 0;
7101
7102         return true;
7103 }
7104
7105 /**
7106  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7107  *  @adapter: address of board private structure
7108  **/
7109 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7110 {
7111         union e1000_adv_rx_desc *rx_desc;
7112         struct igb_rx_buffer *bi;
7113         u16 i = rx_ring->next_to_use;
7114
7115         /* nothing to do */
7116         if (!cleaned_count)
7117                 return;
7118
7119         rx_desc = IGB_RX_DESC(rx_ring, i);
7120         bi = &rx_ring->rx_buffer_info[i];
7121         i -= rx_ring->count;
7122
7123         do {
7124                 if (!igb_alloc_mapped_page(rx_ring, bi))
7125                         break;
7126
7127                 /* Refresh the desc even if buffer_addrs didn't change
7128                  * because each write-back erases this info.
7129                  */
7130                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7131
7132                 rx_desc++;
7133                 bi++;
7134                 i++;
7135                 if (unlikely(!i)) {
7136                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7137                         bi = rx_ring->rx_buffer_info;
7138                         i -= rx_ring->count;
7139                 }
7140
7141                 /* clear the hdr_addr for the next_to_use descriptor */
7142                 rx_desc->read.hdr_addr = 0;
7143
7144                 cleaned_count--;
7145         } while (cleaned_count);
7146
7147         i += rx_ring->count;
7148
7149         if (rx_ring->next_to_use != i) {
7150                 /* record the next descriptor to use */
7151                 rx_ring->next_to_use = i;
7152
7153                 /* update next to alloc since we have filled the ring */
7154                 rx_ring->next_to_alloc = i;
7155
7156                 /* Force memory writes to complete before letting h/w
7157                  * know there are new descriptors to fetch.  (Only
7158                  * applicable for weak-ordered memory model archs,
7159                  * such as IA-64).
7160                  */
7161                 wmb();
7162                 writel(i, rx_ring->tail);
7163         }
7164 }
7165
7166 /**
7167  * igb_mii_ioctl -
7168  * @netdev:
7169  * @ifreq:
7170  * @cmd:
7171  **/
7172 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7173 {
7174         struct igb_adapter *adapter = netdev_priv(netdev);
7175         struct mii_ioctl_data *data = if_mii(ifr);
7176
7177         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7178                 return -EOPNOTSUPP;
7179
7180         switch (cmd) {
7181         case SIOCGMIIPHY:
7182                 data->phy_id = adapter->hw.phy.addr;
7183                 break;
7184         case SIOCGMIIREG:
7185                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7186                                      &data->val_out))
7187                         return -EIO;
7188                 break;
7189         case SIOCSMIIREG:
7190         default:
7191                 return -EOPNOTSUPP;
7192         }
7193         return 0;
7194 }
7195
7196 /**
7197  * igb_ioctl -
7198  * @netdev:
7199  * @ifreq:
7200  * @cmd:
7201  **/
7202 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7203 {
7204         switch (cmd) {
7205         case SIOCGMIIPHY:
7206         case SIOCGMIIREG:
7207         case SIOCSMIIREG:
7208                 return igb_mii_ioctl(netdev, ifr, cmd);
7209         case SIOCGHWTSTAMP:
7210                 return igb_ptp_get_ts_config(netdev, ifr);
7211         case SIOCSHWTSTAMP:
7212                 return igb_ptp_set_ts_config(netdev, ifr);
7213         default:
7214                 return -EOPNOTSUPP;
7215         }
7216 }
7217
7218 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7219 {
7220         struct igb_adapter *adapter = hw->back;
7221
7222         if (pcie_capability_read_word(adapter->pdev, reg, value))
7223                 return -E1000_ERR_CONFIG;
7224
7225         return 0;
7226 }
7227
7228 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7229 {
7230         struct igb_adapter *adapter = hw->back;
7231
7232         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7233                 return -E1000_ERR_CONFIG;
7234
7235         return 0;
7236 }
7237
7238 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7239 {
7240         struct igb_adapter *adapter = netdev_priv(netdev);
7241         struct e1000_hw *hw = &adapter->hw;
7242         u32 ctrl, rctl;
7243         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7244
7245         if (enable) {
7246                 /* enable VLAN tag insert/strip */
7247                 ctrl = rd32(E1000_CTRL);
7248                 ctrl |= E1000_CTRL_VME;
7249                 wr32(E1000_CTRL, ctrl);
7250
7251                 /* Disable CFI check */
7252                 rctl = rd32(E1000_RCTL);
7253                 rctl &= ~E1000_RCTL_CFIEN;
7254                 wr32(E1000_RCTL, rctl);
7255         } else {
7256                 /* disable VLAN tag insert/strip */
7257                 ctrl = rd32(E1000_CTRL);
7258                 ctrl &= ~E1000_CTRL_VME;
7259                 wr32(E1000_CTRL, ctrl);
7260         }
7261
7262         igb_rlpml_set(adapter);
7263 }
7264
7265 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7266                                __be16 proto, u16 vid)
7267 {
7268         struct igb_adapter *adapter = netdev_priv(netdev);
7269         struct e1000_hw *hw = &adapter->hw;
7270         int pf_id = adapter->vfs_allocated_count;
7271
7272         /* attempt to add filter to vlvf array */
7273         igb_vlvf_set(adapter, vid, true, pf_id);
7274
7275         /* add the filter since PF can receive vlans w/o entry in vlvf */
7276         igb_vfta_set(hw, vid, true);
7277
7278         set_bit(vid, adapter->active_vlans);
7279
7280         return 0;
7281 }
7282
7283 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7284                                 __be16 proto, u16 vid)
7285 {
7286         struct igb_adapter *adapter = netdev_priv(netdev);
7287         struct e1000_hw *hw = &adapter->hw;
7288         int pf_id = adapter->vfs_allocated_count;
7289         s32 err;
7290
7291         /* remove vlan from VLVF table array */
7292         err = igb_vlvf_set(adapter, vid, false, pf_id);
7293
7294         /* if vid was not present in VLVF just remove it from table */
7295         if (err)
7296                 igb_vfta_set(hw, vid, false);
7297
7298         clear_bit(vid, adapter->active_vlans);
7299
7300         return 0;
7301 }
7302
7303 static void igb_restore_vlan(struct igb_adapter *adapter)
7304 {
7305         u16 vid;
7306
7307         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7308
7309         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7310                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7311 }
7312
7313 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7314 {
7315         struct pci_dev *pdev = adapter->pdev;
7316         struct e1000_mac_info *mac = &adapter->hw.mac;
7317
7318         mac->autoneg = 0;
7319
7320         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7321          * for the switch() below to work
7322          */
7323         if ((spd & 1) || (dplx & ~1))
7324                 goto err_inval;
7325
7326         /* Fiber NIC's only allow 1000 gbps Full duplex
7327          * and 100Mbps Full duplex for 100baseFx sfp
7328          */
7329         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7330                 switch (spd + dplx) {
7331                 case SPEED_10 + DUPLEX_HALF:
7332                 case SPEED_10 + DUPLEX_FULL:
7333                 case SPEED_100 + DUPLEX_HALF:
7334                         goto err_inval;
7335                 default:
7336                         break;
7337                 }
7338         }
7339
7340         switch (spd + dplx) {
7341         case SPEED_10 + DUPLEX_HALF:
7342                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7343                 break;
7344         case SPEED_10 + DUPLEX_FULL:
7345                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7346                 break;
7347         case SPEED_100 + DUPLEX_HALF:
7348                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7349                 break;
7350         case SPEED_100 + DUPLEX_FULL:
7351                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7352                 break;
7353         case SPEED_1000 + DUPLEX_FULL:
7354                 mac->autoneg = 1;
7355                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7356                 break;
7357         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7358         default:
7359                 goto err_inval;
7360         }
7361
7362         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7363         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7364
7365         return 0;
7366
7367 err_inval:
7368         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7369         return -EINVAL;
7370 }
7371
7372 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7373                           bool runtime)
7374 {
7375         struct net_device *netdev = pci_get_drvdata(pdev);
7376         struct igb_adapter *adapter = netdev_priv(netdev);
7377         struct e1000_hw *hw = &adapter->hw;
7378         u32 ctrl, rctl, status;
7379         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7380 #ifdef CONFIG_PM
7381         int retval = 0;
7382 #endif
7383
7384         netif_device_detach(netdev);
7385
7386         if (netif_running(netdev))
7387                 __igb_close(netdev, true);
7388
7389         igb_clear_interrupt_scheme(adapter);
7390
7391 #ifdef CONFIG_PM
7392         retval = pci_save_state(pdev);
7393         if (retval)
7394                 return retval;
7395 #endif
7396
7397         status = rd32(E1000_STATUS);
7398         if (status & E1000_STATUS_LU)
7399                 wufc &= ~E1000_WUFC_LNKC;
7400
7401         if (wufc) {
7402                 igb_setup_rctl(adapter);
7403                 igb_set_rx_mode(netdev);
7404
7405                 /* turn on all-multi mode if wake on multicast is enabled */
7406                 if (wufc & E1000_WUFC_MC) {
7407                         rctl = rd32(E1000_RCTL);
7408                         rctl |= E1000_RCTL_MPE;
7409                         wr32(E1000_RCTL, rctl);
7410                 }
7411
7412                 ctrl = rd32(E1000_CTRL);
7413                 /* advertise wake from D3Cold */
7414                 #define E1000_CTRL_ADVD3WUC 0x00100000
7415                 /* phy power management enable */
7416                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7417                 ctrl |= E1000_CTRL_ADVD3WUC;
7418                 wr32(E1000_CTRL, ctrl);
7419
7420                 /* Allow time for pending master requests to run */
7421                 igb_disable_pcie_master(hw);
7422
7423                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7424                 wr32(E1000_WUFC, wufc);
7425         } else {
7426                 wr32(E1000_WUC, 0);
7427                 wr32(E1000_WUFC, 0);
7428         }
7429
7430         *enable_wake = wufc || adapter->en_mng_pt;
7431         if (!*enable_wake)
7432                 igb_power_down_link(adapter);
7433         else
7434                 igb_power_up_link(adapter);
7435
7436         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7437          * would have already happened in close and is redundant.
7438          */
7439         igb_release_hw_control(adapter);
7440
7441         pci_disable_device(pdev);
7442
7443         return 0;
7444 }
7445
7446 #ifdef CONFIG_PM
7447 #ifdef CONFIG_PM_SLEEP
7448 static int igb_suspend(struct device *dev)
7449 {
7450         int retval;
7451         bool wake;
7452         struct pci_dev *pdev = to_pci_dev(dev);
7453
7454         retval = __igb_shutdown(pdev, &wake, 0);
7455         if (retval)
7456                 return retval;
7457
7458         if (wake) {
7459                 pci_prepare_to_sleep(pdev);
7460         } else {
7461                 pci_wake_from_d3(pdev, false);
7462                 pci_set_power_state(pdev, PCI_D3hot);
7463         }
7464
7465         return 0;
7466 }
7467 #endif /* CONFIG_PM_SLEEP */
7468
7469 static int igb_resume(struct device *dev)
7470 {
7471         struct pci_dev *pdev = to_pci_dev(dev);
7472         struct net_device *netdev = pci_get_drvdata(pdev);
7473         struct igb_adapter *adapter = netdev_priv(netdev);
7474         struct e1000_hw *hw = &adapter->hw;
7475         u32 err;
7476
7477         pci_set_power_state(pdev, PCI_D0);
7478         pci_restore_state(pdev);
7479         pci_save_state(pdev);
7480
7481         err = pci_enable_device_mem(pdev);
7482         if (err) {
7483                 dev_err(&pdev->dev,
7484                         "igb: Cannot enable PCI device from suspend\n");
7485                 return err;
7486         }
7487         pci_set_master(pdev);
7488
7489         pci_enable_wake(pdev, PCI_D3hot, 0);
7490         pci_enable_wake(pdev, PCI_D3cold, 0);
7491
7492         if (igb_init_interrupt_scheme(adapter, true)) {
7493                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7494                 return -ENOMEM;
7495         }
7496
7497         igb_reset(adapter);
7498
7499         /* let the f/w know that the h/w is now under the control of the
7500          * driver.
7501          */
7502         igb_get_hw_control(adapter);
7503
7504         wr32(E1000_WUS, ~0);
7505
7506         if (netdev->flags & IFF_UP) {
7507                 rtnl_lock();
7508                 err = __igb_open(netdev, true);
7509                 rtnl_unlock();
7510                 if (err)
7511                         return err;
7512         }
7513
7514         netif_device_attach(netdev);
7515         return 0;
7516 }
7517
7518 #ifdef CONFIG_PM_RUNTIME
7519 static int igb_runtime_idle(struct device *dev)
7520 {
7521         struct pci_dev *pdev = to_pci_dev(dev);
7522         struct net_device *netdev = pci_get_drvdata(pdev);
7523         struct igb_adapter *adapter = netdev_priv(netdev);
7524
7525         if (!igb_has_link(adapter))
7526                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7527
7528         return -EBUSY;
7529 }
7530
7531 static int igb_runtime_suspend(struct device *dev)
7532 {
7533         struct pci_dev *pdev = to_pci_dev(dev);
7534         int retval;
7535         bool wake;
7536
7537         retval = __igb_shutdown(pdev, &wake, 1);
7538         if (retval)
7539                 return retval;
7540
7541         if (wake) {
7542                 pci_prepare_to_sleep(pdev);
7543         } else {
7544                 pci_wake_from_d3(pdev, false);
7545                 pci_set_power_state(pdev, PCI_D3hot);
7546         }
7547
7548         return 0;
7549 }
7550
7551 static int igb_runtime_resume(struct device *dev)
7552 {
7553         return igb_resume(dev);
7554 }
7555 #endif /* CONFIG_PM_RUNTIME */
7556 #endif
7557
7558 static void igb_shutdown(struct pci_dev *pdev)
7559 {
7560         bool wake;
7561
7562         __igb_shutdown(pdev, &wake, 0);
7563
7564         if (system_state == SYSTEM_POWER_OFF) {
7565                 pci_wake_from_d3(pdev, wake);
7566                 pci_set_power_state(pdev, PCI_D3hot);
7567         }
7568 }
7569
7570 #ifdef CONFIG_PCI_IOV
7571 static int igb_sriov_reinit(struct pci_dev *dev)
7572 {
7573         struct net_device *netdev = pci_get_drvdata(dev);
7574         struct igb_adapter *adapter = netdev_priv(netdev);
7575         struct pci_dev *pdev = adapter->pdev;
7576
7577         rtnl_lock();
7578
7579         if (netif_running(netdev))
7580                 igb_close(netdev);
7581
7582         igb_clear_interrupt_scheme(adapter);
7583
7584         igb_init_queue_configuration(adapter);
7585
7586         if (igb_init_interrupt_scheme(adapter, true)) {
7587                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7588                 return -ENOMEM;
7589         }
7590
7591         if (netif_running(netdev))
7592                 igb_open(netdev);
7593
7594         rtnl_unlock();
7595
7596         return 0;
7597 }
7598
7599 static int igb_pci_disable_sriov(struct pci_dev *dev)
7600 {
7601         int err = igb_disable_sriov(dev);
7602
7603         if (!err)
7604                 err = igb_sriov_reinit(dev);
7605
7606         return err;
7607 }
7608
7609 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7610 {
7611         int err = igb_enable_sriov(dev, num_vfs);
7612
7613         if (err)
7614                 goto out;
7615
7616         err = igb_sriov_reinit(dev);
7617         if (!err)
7618                 return num_vfs;
7619
7620 out:
7621         return err;
7622 }
7623
7624 #endif
7625 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7626 {
7627 #ifdef CONFIG_PCI_IOV
7628         if (num_vfs == 0)
7629                 return igb_pci_disable_sriov(dev);
7630         else
7631                 return igb_pci_enable_sriov(dev, num_vfs);
7632 #endif
7633         return 0;
7634 }
7635
7636 #ifdef CONFIG_NET_POLL_CONTROLLER
7637 /* Polling 'interrupt' - used by things like netconsole to send skbs
7638  * without having to re-enable interrupts. It's not called while
7639  * the interrupt routine is executing.
7640  */
7641 static void igb_netpoll(struct net_device *netdev)
7642 {
7643         struct igb_adapter *adapter = netdev_priv(netdev);
7644         struct e1000_hw *hw = &adapter->hw;
7645         struct igb_q_vector *q_vector;
7646         int i;
7647
7648         for (i = 0; i < adapter->num_q_vectors; i++) {
7649                 q_vector = adapter->q_vector[i];
7650                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7651                         wr32(E1000_EIMC, q_vector->eims_value);
7652                 else
7653                         igb_irq_disable(adapter);
7654                 napi_schedule(&q_vector->napi);
7655         }
7656 }
7657 #endif /* CONFIG_NET_POLL_CONTROLLER */
7658
7659 /**
7660  *  igb_io_error_detected - called when PCI error is detected
7661  *  @pdev: Pointer to PCI device
7662  *  @state: The current pci connection state
7663  *
7664  *  This function is called after a PCI bus error affecting
7665  *  this device has been detected.
7666  **/
7667 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7668                                               pci_channel_state_t state)
7669 {
7670         struct net_device *netdev = pci_get_drvdata(pdev);
7671         struct igb_adapter *adapter = netdev_priv(netdev);
7672
7673         netif_device_detach(netdev);
7674
7675         if (state == pci_channel_io_perm_failure)
7676                 return PCI_ERS_RESULT_DISCONNECT;
7677
7678         if (netif_running(netdev))
7679                 igb_down(adapter);
7680         pci_disable_device(pdev);
7681
7682         /* Request a slot slot reset. */
7683         return PCI_ERS_RESULT_NEED_RESET;
7684 }
7685
7686 /**
7687  *  igb_io_slot_reset - called after the pci bus has been reset.
7688  *  @pdev: Pointer to PCI device
7689  *
7690  *  Restart the card from scratch, as if from a cold-boot. Implementation
7691  *  resembles the first-half of the igb_resume routine.
7692  **/
7693 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7694 {
7695         struct net_device *netdev = pci_get_drvdata(pdev);
7696         struct igb_adapter *adapter = netdev_priv(netdev);
7697         struct e1000_hw *hw = &adapter->hw;
7698         pci_ers_result_t result;
7699         int err;
7700
7701         if (pci_enable_device_mem(pdev)) {
7702                 dev_err(&pdev->dev,
7703                         "Cannot re-enable PCI device after reset.\n");
7704                 result = PCI_ERS_RESULT_DISCONNECT;
7705         } else {
7706                 pci_set_master(pdev);
7707                 pci_restore_state(pdev);
7708                 pci_save_state(pdev);
7709
7710                 pci_enable_wake(pdev, PCI_D3hot, 0);
7711                 pci_enable_wake(pdev, PCI_D3cold, 0);
7712
7713                 igb_reset(adapter);
7714                 wr32(E1000_WUS, ~0);
7715                 result = PCI_ERS_RESULT_RECOVERED;
7716         }
7717
7718         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7719         if (err) {
7720                 dev_err(&pdev->dev,
7721                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7722                         err);
7723                 /* non-fatal, continue */
7724         }
7725
7726         return result;
7727 }
7728
7729 /**
7730  *  igb_io_resume - called when traffic can start flowing again.
7731  *  @pdev: Pointer to PCI device
7732  *
7733  *  This callback is called when the error recovery driver tells us that
7734  *  its OK to resume normal operation. Implementation resembles the
7735  *  second-half of the igb_resume routine.
7736  */
7737 static void igb_io_resume(struct pci_dev *pdev)
7738 {
7739         struct net_device *netdev = pci_get_drvdata(pdev);
7740         struct igb_adapter *adapter = netdev_priv(netdev);
7741
7742         if (netif_running(netdev)) {
7743                 if (igb_up(adapter)) {
7744                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7745                         return;
7746                 }
7747         }
7748
7749         netif_device_attach(netdev);
7750
7751         /* let the f/w know that the h/w is now under the control of the
7752          * driver.
7753          */
7754         igb_get_hw_control(adapter);
7755 }
7756
7757 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7758                              u8 qsel)
7759 {
7760         u32 rar_low, rar_high;
7761         struct e1000_hw *hw = &adapter->hw;
7762
7763         /* HW expects these in little endian so we reverse the byte order
7764          * from network order (big endian) to little endian
7765          */
7766         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7767                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7768         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7769
7770         /* Indicate to hardware the Address is Valid. */
7771         rar_high |= E1000_RAH_AV;
7772
7773         if (hw->mac.type == e1000_82575)
7774                 rar_high |= E1000_RAH_POOL_1 * qsel;
7775         else
7776                 rar_high |= E1000_RAH_POOL_1 << qsel;
7777
7778         wr32(E1000_RAL(index), rar_low);
7779         wrfl();
7780         wr32(E1000_RAH(index), rar_high);
7781         wrfl();
7782 }
7783
7784 static int igb_set_vf_mac(struct igb_adapter *adapter,
7785                           int vf, unsigned char *mac_addr)
7786 {
7787         struct e1000_hw *hw = &adapter->hw;
7788         /* VF MAC addresses start at end of receive addresses and moves
7789          * towards the first, as a result a collision should not be possible
7790          */
7791         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7792
7793         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7794
7795         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7796
7797         return 0;
7798 }
7799
7800 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7801 {
7802         struct igb_adapter *adapter = netdev_priv(netdev);
7803         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7804                 return -EINVAL;
7805         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7806         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7807         dev_info(&adapter->pdev->dev,
7808                  "Reload the VF driver to make this change effective.");
7809         if (test_bit(__IGB_DOWN, &adapter->state)) {
7810                 dev_warn(&adapter->pdev->dev,
7811                          "The VF MAC address has been set, but the PF device is not up.\n");
7812                 dev_warn(&adapter->pdev->dev,
7813                          "Bring the PF device up before attempting to use the VF device.\n");
7814         }
7815         return igb_set_vf_mac(adapter, vf, mac);
7816 }
7817
7818 static int igb_link_mbps(int internal_link_speed)
7819 {
7820         switch (internal_link_speed) {
7821         case SPEED_100:
7822                 return 100;
7823         case SPEED_1000:
7824                 return 1000;
7825         default:
7826                 return 0;
7827         }
7828 }
7829
7830 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7831                                   int link_speed)
7832 {
7833         int rf_dec, rf_int;
7834         u32 bcnrc_val;
7835
7836         if (tx_rate != 0) {
7837                 /* Calculate the rate factor values to set */
7838                 rf_int = link_speed / tx_rate;
7839                 rf_dec = (link_speed - (rf_int * tx_rate));
7840                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7841                          tx_rate;
7842
7843                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7844                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7845                               E1000_RTTBCNRC_RF_INT_MASK);
7846                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7847         } else {
7848                 bcnrc_val = 0;
7849         }
7850
7851         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7852         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7853          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7854          */
7855         wr32(E1000_RTTBCNRM, 0x14);
7856         wr32(E1000_RTTBCNRC, bcnrc_val);
7857 }
7858
7859 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7860 {
7861         int actual_link_speed, i;
7862         bool reset_rate = false;
7863
7864         /* VF TX rate limit was not set or not supported */
7865         if ((adapter->vf_rate_link_speed == 0) ||
7866             (adapter->hw.mac.type != e1000_82576))
7867                 return;
7868
7869         actual_link_speed = igb_link_mbps(adapter->link_speed);
7870         if (actual_link_speed != adapter->vf_rate_link_speed) {
7871                 reset_rate = true;
7872                 adapter->vf_rate_link_speed = 0;
7873                 dev_info(&adapter->pdev->dev,
7874                          "Link speed has been changed. VF Transmit rate is disabled\n");
7875         }
7876
7877         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7878                 if (reset_rate)
7879                         adapter->vf_data[i].tx_rate = 0;
7880
7881                 igb_set_vf_rate_limit(&adapter->hw, i,
7882                                       adapter->vf_data[i].tx_rate,
7883                                       actual_link_speed);
7884         }
7885 }
7886
7887 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
7888                              int min_tx_rate, int max_tx_rate)
7889 {
7890         struct igb_adapter *adapter = netdev_priv(netdev);
7891         struct e1000_hw *hw = &adapter->hw;
7892         int actual_link_speed;
7893
7894         if (hw->mac.type != e1000_82576)
7895                 return -EOPNOTSUPP;
7896
7897         if (min_tx_rate)
7898                 return -EINVAL;
7899
7900         actual_link_speed = igb_link_mbps(adapter->link_speed);
7901         if ((vf >= adapter->vfs_allocated_count) ||
7902             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7903             (max_tx_rate < 0) ||
7904             (max_tx_rate > actual_link_speed))
7905                 return -EINVAL;
7906
7907         adapter->vf_rate_link_speed = actual_link_speed;
7908         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
7909         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
7910
7911         return 0;
7912 }
7913
7914 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7915                                    bool setting)
7916 {
7917         struct igb_adapter *adapter = netdev_priv(netdev);
7918         struct e1000_hw *hw = &adapter->hw;
7919         u32 reg_val, reg_offset;
7920
7921         if (!adapter->vfs_allocated_count)
7922                 return -EOPNOTSUPP;
7923
7924         if (vf >= adapter->vfs_allocated_count)
7925                 return -EINVAL;
7926
7927         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7928         reg_val = rd32(reg_offset);
7929         if (setting)
7930                 reg_val |= ((1 << vf) |
7931                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7932         else
7933                 reg_val &= ~((1 << vf) |
7934                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7935         wr32(reg_offset, reg_val);
7936
7937         adapter->vf_data[vf].spoofchk_enabled = setting;
7938         return 0;
7939 }
7940
7941 static int igb_ndo_get_vf_config(struct net_device *netdev,
7942                                  int vf, struct ifla_vf_info *ivi)
7943 {
7944         struct igb_adapter *adapter = netdev_priv(netdev);
7945         if (vf >= adapter->vfs_allocated_count)
7946                 return -EINVAL;
7947         ivi->vf = vf;
7948         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7949         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
7950         ivi->min_tx_rate = 0;
7951         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7952         ivi->qos = adapter->vf_data[vf].pf_qos;
7953         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7954         return 0;
7955 }
7956
7957 static void igb_vmm_control(struct igb_adapter *adapter)
7958 {
7959         struct e1000_hw *hw = &adapter->hw;
7960         u32 reg;
7961
7962         switch (hw->mac.type) {
7963         case e1000_82575:
7964         case e1000_i210:
7965         case e1000_i211:
7966         case e1000_i354:
7967         default:
7968                 /* replication is not supported for 82575 */
7969                 return;
7970         case e1000_82576:
7971                 /* notify HW that the MAC is adding vlan tags */
7972                 reg = rd32(E1000_DTXCTL);
7973                 reg |= E1000_DTXCTL_VLAN_ADDED;
7974                 wr32(E1000_DTXCTL, reg);
7975                 /* Fall through */
7976         case e1000_82580:
7977                 /* enable replication vlan tag stripping */
7978                 reg = rd32(E1000_RPLOLR);
7979                 reg |= E1000_RPLOLR_STRVLAN;
7980                 wr32(E1000_RPLOLR, reg);
7981                 /* Fall through */
7982         case e1000_i350:
7983                 /* none of the above registers are supported by i350 */
7984                 break;
7985         }
7986
7987         if (adapter->vfs_allocated_count) {
7988                 igb_vmdq_set_loopback_pf(hw, true);
7989                 igb_vmdq_set_replication_pf(hw, true);
7990                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7991                                               adapter->vfs_allocated_count);
7992         } else {
7993                 igb_vmdq_set_loopback_pf(hw, false);
7994                 igb_vmdq_set_replication_pf(hw, false);
7995         }
7996 }
7997
7998 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7999 {
8000         struct e1000_hw *hw = &adapter->hw;
8001         u32 dmac_thr;
8002         u16 hwm;
8003
8004         if (hw->mac.type > e1000_82580) {
8005                 if (adapter->flags & IGB_FLAG_DMAC) {
8006                         u32 reg;
8007
8008                         /* force threshold to 0. */
8009                         wr32(E1000_DMCTXTH, 0);
8010
8011                         /* DMA Coalescing high water mark needs to be greater
8012                          * than the Rx threshold. Set hwm to PBA - max frame
8013                          * size in 16B units, capping it at PBA - 6KB.
8014                          */
8015                         hwm = 64 * pba - adapter->max_frame_size / 16;
8016                         if (hwm < 64 * (pba - 6))
8017                                 hwm = 64 * (pba - 6);
8018                         reg = rd32(E1000_FCRTC);
8019                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
8020                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
8021                                 & E1000_FCRTC_RTH_COAL_MASK);
8022                         wr32(E1000_FCRTC, reg);
8023
8024                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8025                          * frame size, capping it at PBA - 10KB.
8026                          */
8027                         dmac_thr = pba - adapter->max_frame_size / 512;
8028                         if (dmac_thr < pba - 10)
8029                                 dmac_thr = pba - 10;
8030                         reg = rd32(E1000_DMACR);
8031                         reg &= ~E1000_DMACR_DMACTHR_MASK;
8032                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
8033                                 & E1000_DMACR_DMACTHR_MASK);
8034
8035                         /* transition to L0x or L1 if available..*/
8036                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
8037
8038                         /* watchdog timer= +-1000 usec in 32usec intervals */
8039                         reg |= (1000 >> 5);
8040
8041                         /* Disable BMC-to-OS Watchdog Enable */
8042                         if (hw->mac.type != e1000_i354)
8043                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
8044
8045                         wr32(E1000_DMACR, reg);
8046
8047                         /* no lower threshold to disable
8048                          * coalescing(smart fifb)-UTRESH=0
8049                          */
8050                         wr32(E1000_DMCRTRH, 0);
8051
8052                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
8053
8054                         wr32(E1000_DMCTLX, reg);
8055
8056                         /* free space in tx packet buffer to wake from
8057                          * DMA coal
8058                          */
8059                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
8060                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
8061
8062                         /* make low power state decision controlled
8063                          * by DMA coal
8064                          */
8065                         reg = rd32(E1000_PCIEMISC);
8066                         reg &= ~E1000_PCIEMISC_LX_DECISION;
8067                         wr32(E1000_PCIEMISC, reg);
8068                 } /* endif adapter->dmac is not disabled */
8069         } else if (hw->mac.type == e1000_82580) {
8070                 u32 reg = rd32(E1000_PCIEMISC);
8071
8072                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
8073                 wr32(E1000_DMACR, 0);
8074         }
8075 }
8076
8077 /**
8078  *  igb_read_i2c_byte - Reads 8 bit word over I2C
8079  *  @hw: pointer to hardware structure
8080  *  @byte_offset: byte offset to read
8081  *  @dev_addr: device address
8082  *  @data: value read
8083  *
8084  *  Performs byte read operation over I2C interface at
8085  *  a specified device address.
8086  **/
8087 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8088                       u8 dev_addr, u8 *data)
8089 {
8090         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8091         struct i2c_client *this_client = adapter->i2c_client;
8092         s32 status;
8093         u16 swfw_mask = 0;
8094
8095         if (!this_client)
8096                 return E1000_ERR_I2C;
8097
8098         swfw_mask = E1000_SWFW_PHY0_SM;
8099
8100         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8101                 return E1000_ERR_SWFW_SYNC;
8102
8103         status = i2c_smbus_read_byte_data(this_client, byte_offset);
8104         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8105
8106         if (status < 0)
8107                 return E1000_ERR_I2C;
8108         else {
8109                 *data = status;
8110                 return 0;
8111         }
8112 }
8113
8114 /**
8115  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8116  *  @hw: pointer to hardware structure
8117  *  @byte_offset: byte offset to write
8118  *  @dev_addr: device address
8119  *  @data: value to write
8120  *
8121  *  Performs byte write operation over I2C interface at
8122  *  a specified device address.
8123  **/
8124 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8125                        u8 dev_addr, u8 data)
8126 {
8127         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8128         struct i2c_client *this_client = adapter->i2c_client;
8129         s32 status;
8130         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8131
8132         if (!this_client)
8133                 return E1000_ERR_I2C;
8134
8135         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
8136                 return E1000_ERR_SWFW_SYNC;
8137         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8138         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8139
8140         if (status)
8141                 return E1000_ERR_I2C;
8142         else
8143                 return 0;
8144
8145 }
8146
8147 int igb_reinit_queues(struct igb_adapter *adapter)
8148 {
8149         struct net_device *netdev = adapter->netdev;
8150         struct pci_dev *pdev = adapter->pdev;
8151         int err = 0;
8152
8153         if (netif_running(netdev))
8154                 igb_close(netdev);
8155
8156         igb_reset_interrupt_capability(adapter);
8157
8158         if (igb_init_interrupt_scheme(adapter, true)) {
8159                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8160                 return -ENOMEM;
8161         }
8162
8163         if (netif_running(netdev))
8164                 err = igb_open(netdev);
8165
8166         return err;
8167 }
8168 /* igb_main.c */