1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/ethtool.h>
47 #include <linux/if_vlan.h>
48 #include <linux/if_macvlan.h>
49 #include <linux/if_bridge.h>
50 #include <linux/prefetch.h>
51 #include <scsi/fc/fc_fcoe.h>
54 #include "ixgbe_common.h"
55 #include "ixgbe_dcb_82599.h"
56 #include "ixgbe_sriov.h"
58 char ixgbe_driver_name[] = "ixgbe";
59 static const char ixgbe_driver_string[] =
60 "Intel(R) 10 Gigabit PCI Express Network Driver";
62 char ixgbe_default_device_descr[] =
63 "Intel(R) 10 Gigabit Network Connection";
65 static char ixgbe_default_device_descr[] =
66 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION "3.19.1-k"
69 const char ixgbe_driver_version[] = DRV_VERSION;
70 static const char ixgbe_copyright[] =
71 "Copyright (c) 1999-2014 Intel Corporation.";
73 static const struct ixgbe_info *ixgbe_info_tbl[] = {
74 [board_82598] = &ixgbe_82598_info,
75 [board_82599] = &ixgbe_82599_info,
76 [board_X540] = &ixgbe_X540_info,
79 /* ixgbe_pci_tbl - PCI Device ID Table
81 * Wildcard entries (PCI_ANY_ID) should come last
82 * Last entry must be all 0s
84 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
85 * Class, Class Mask, private data (not used) }
87 static const struct pci_device_id ixgbe_pci_tbl[] = {
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
118 /* required last entry */
121 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
123 #ifdef CONFIG_IXGBE_DCA
124 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
126 static struct notifier_block dca_notifier = {
127 .notifier_call = ixgbe_notify_dca,
133 #ifdef CONFIG_PCI_IOV
134 static unsigned int max_vfs;
135 module_param(max_vfs, uint, 0);
136 MODULE_PARM_DESC(max_vfs,
137 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
138 #endif /* CONFIG_PCI_IOV */
140 static unsigned int allow_unsupported_sfp;
141 module_param(allow_unsupported_sfp, uint, 0);
142 MODULE_PARM_DESC(allow_unsupported_sfp,
143 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
145 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
146 static int debug = -1;
147 module_param(debug, int, 0);
148 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
150 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
151 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
152 MODULE_LICENSE("GPL");
153 MODULE_VERSION(DRV_VERSION);
155 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
157 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
160 struct pci_dev *parent_dev;
161 struct pci_bus *parent_bus;
163 parent_bus = adapter->pdev->bus->parent;
167 parent_dev = parent_bus->self;
171 if (!pci_is_pcie(parent_dev))
174 pcie_capability_read_word(parent_dev, reg, value);
175 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
176 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
181 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
183 struct ixgbe_hw *hw = &adapter->hw;
187 hw->bus.type = ixgbe_bus_type_pci_express;
189 /* Get the negotiated link width and speed from PCI config space of the
190 * parent, as this device is behind a switch
192 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
194 /* assume caller will handle error case */
198 hw->bus.width = ixgbe_convert_bus_width(link_status);
199 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
205 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
206 * @hw: hw specific details
208 * This function is used by probe to determine whether a device's PCI-Express
209 * bandwidth details should be gathered from the parent bus instead of from the
210 * device. Used to ensure that various locations all have the correct device ID
213 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
215 switch (hw->device_id) {
216 case IXGBE_DEV_ID_82599_SFP_SF_QP:
217 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
224 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
228 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
229 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
230 struct pci_dev *pdev;
232 /* determine whether to use the the parent device
234 if (ixgbe_pcie_from_parent(&adapter->hw))
235 pdev = adapter->pdev->bus->parent->self;
237 pdev = adapter->pdev;
239 if (pcie_get_minimum_link(pdev, &speed, &width) ||
240 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
241 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
246 case PCIE_SPEED_2_5GT:
247 /* 8b/10b encoding reduces max throughput by 20% */
250 case PCIE_SPEED_5_0GT:
251 /* 8b/10b encoding reduces max throughput by 20% */
254 case PCIE_SPEED_8_0GT:
255 /* 128b/130b encoding reduces throughput by less than 2% */
259 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
263 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
265 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
266 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
267 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
268 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
271 (speed == PCIE_SPEED_2_5GT ? "20%" :
272 speed == PCIE_SPEED_5_0GT ? "20%" :
273 speed == PCIE_SPEED_8_0GT ? "<2%" :
276 if (max_gts < expected_gts) {
277 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
278 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
280 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
284 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
286 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
287 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
288 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
289 schedule_work(&adapter->service_task);
292 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
294 struct ixgbe_adapter *adapter = hw->back;
299 e_dev_err("Adapter removed\n");
300 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
301 ixgbe_service_event_schedule(adapter);
304 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
308 /* The following check not only optimizes a bit by not
309 * performing a read on the status register when the
310 * register just read was a status register read that
311 * returned IXGBE_FAILED_READ_REG. It also blocks any
312 * potential recursion.
314 if (reg == IXGBE_STATUS) {
315 ixgbe_remove_adapter(hw);
318 value = ixgbe_read_reg(hw, IXGBE_STATUS);
319 if (value == IXGBE_FAILED_READ_REG)
320 ixgbe_remove_adapter(hw);
324 * ixgbe_read_reg - Read from device register
325 * @hw: hw specific details
326 * @reg: offset of register to read
328 * Returns : value read or IXGBE_FAILED_READ_REG if removed
330 * This function is used to read device registers. It checks for device
331 * removal by confirming any read that returns all ones by checking the
332 * status register value for all ones. This function avoids reading from
333 * the hardware if a removal was previously detected in which case it
334 * returns IXGBE_FAILED_READ_REG (all ones).
336 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
338 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
341 if (ixgbe_removed(reg_addr))
342 return IXGBE_FAILED_READ_REG;
343 value = readl(reg_addr + reg);
344 if (unlikely(value == IXGBE_FAILED_READ_REG))
345 ixgbe_check_remove(hw, reg);
349 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
353 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
354 if (value == IXGBE_FAILED_READ_CFG_WORD) {
355 ixgbe_remove_adapter(hw);
361 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
363 struct ixgbe_adapter *adapter = hw->back;
366 if (ixgbe_removed(hw->hw_addr))
367 return IXGBE_FAILED_READ_CFG_WORD;
368 pci_read_config_word(adapter->pdev, reg, &value);
369 if (value == IXGBE_FAILED_READ_CFG_WORD &&
370 ixgbe_check_cfg_remove(hw, adapter->pdev))
371 return IXGBE_FAILED_READ_CFG_WORD;
375 #ifdef CONFIG_PCI_IOV
376 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
378 struct ixgbe_adapter *adapter = hw->back;
381 if (ixgbe_removed(hw->hw_addr))
382 return IXGBE_FAILED_READ_CFG_DWORD;
383 pci_read_config_dword(adapter->pdev, reg, &value);
384 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
385 ixgbe_check_cfg_remove(hw, adapter->pdev))
386 return IXGBE_FAILED_READ_CFG_DWORD;
389 #endif /* CONFIG_PCI_IOV */
391 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
393 struct ixgbe_adapter *adapter = hw->back;
395 if (ixgbe_removed(hw->hw_addr))
397 pci_write_config_word(adapter->pdev, reg, value);
400 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
402 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
404 /* flush memory to make sure state is correct before next watchdog */
405 smp_mb__before_atomic();
406 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
409 struct ixgbe_reg_info {
414 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
416 /* General Registers */
417 {IXGBE_CTRL, "CTRL"},
418 {IXGBE_STATUS, "STATUS"},
419 {IXGBE_CTRL_EXT, "CTRL_EXT"},
421 /* Interrupt Registers */
422 {IXGBE_EICR, "EICR"},
425 {IXGBE_SRRCTL(0), "SRRCTL"},
426 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
427 {IXGBE_RDLEN(0), "RDLEN"},
428 {IXGBE_RDH(0), "RDH"},
429 {IXGBE_RDT(0), "RDT"},
430 {IXGBE_RXDCTL(0), "RXDCTL"},
431 {IXGBE_RDBAL(0), "RDBAL"},
432 {IXGBE_RDBAH(0), "RDBAH"},
435 {IXGBE_TDBAL(0), "TDBAL"},
436 {IXGBE_TDBAH(0), "TDBAH"},
437 {IXGBE_TDLEN(0), "TDLEN"},
438 {IXGBE_TDH(0), "TDH"},
439 {IXGBE_TDT(0), "TDT"},
440 {IXGBE_TXDCTL(0), "TXDCTL"},
442 /* List Terminator */
448 * ixgbe_regdump - register printout routine
450 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
456 switch (reginfo->ofs) {
457 case IXGBE_SRRCTL(0):
458 for (i = 0; i < 64; i++)
459 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
461 case IXGBE_DCA_RXCTRL(0):
462 for (i = 0; i < 64; i++)
463 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
466 for (i = 0; i < 64; i++)
467 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
470 for (i = 0; i < 64; i++)
471 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
474 for (i = 0; i < 64; i++)
475 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
477 case IXGBE_RXDCTL(0):
478 for (i = 0; i < 64; i++)
479 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
482 for (i = 0; i < 64; i++)
483 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
486 for (i = 0; i < 64; i++)
487 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
490 for (i = 0; i < 64; i++)
491 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
494 for (i = 0; i < 64; i++)
495 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
498 for (i = 0; i < 64; i++)
499 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
502 for (i = 0; i < 64; i++)
503 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
506 for (i = 0; i < 64; i++)
507 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
509 case IXGBE_TXDCTL(0):
510 for (i = 0; i < 64; i++)
511 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
514 pr_info("%-15s %08x\n", reginfo->name,
515 IXGBE_READ_REG(hw, reginfo->ofs));
519 for (i = 0; i < 8; i++) {
520 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
521 pr_err("%-15s", rname);
522 for (j = 0; j < 8; j++)
523 pr_cont(" %08x", regs[i*8+j]);
530 * ixgbe_dump - Print registers, tx-rings and rx-rings
532 static void ixgbe_dump(struct ixgbe_adapter *adapter)
534 struct net_device *netdev = adapter->netdev;
535 struct ixgbe_hw *hw = &adapter->hw;
536 struct ixgbe_reg_info *reginfo;
538 struct ixgbe_ring *tx_ring;
539 struct ixgbe_tx_buffer *tx_buffer;
540 union ixgbe_adv_tx_desc *tx_desc;
541 struct my_u0 { u64 a; u64 b; } *u0;
542 struct ixgbe_ring *rx_ring;
543 union ixgbe_adv_rx_desc *rx_desc;
544 struct ixgbe_rx_buffer *rx_buffer_info;
548 if (!netif_msg_hw(adapter))
551 /* Print netdevice Info */
553 dev_info(&adapter->pdev->dev, "Net device Info\n");
554 pr_info("Device Name state "
555 "trans_start last_rx\n");
556 pr_info("%-15s %016lX %016lX %016lX\n",
563 /* Print Registers */
564 dev_info(&adapter->pdev->dev, "Register Dump\n");
565 pr_info(" Register Name Value\n");
566 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
567 reginfo->name; reginfo++) {
568 ixgbe_regdump(hw, reginfo);
571 /* Print TX Ring Summary */
572 if (!netdev || !netif_running(netdev))
575 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
576 pr_info(" %s %s %s %s\n",
577 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
578 "leng", "ntw", "timestamp");
579 for (n = 0; n < adapter->num_tx_queues; n++) {
580 tx_ring = adapter->tx_ring[n];
581 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
582 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
583 n, tx_ring->next_to_use, tx_ring->next_to_clean,
584 (u64)dma_unmap_addr(tx_buffer, dma),
585 dma_unmap_len(tx_buffer, len),
586 tx_buffer->next_to_watch,
587 (u64)tx_buffer->time_stamp);
591 if (!netif_msg_tx_done(adapter))
592 goto rx_ring_summary;
594 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
596 /* Transmit Descriptor Formats
598 * 82598 Advanced Transmit Descriptor
599 * +--------------------------------------------------------------+
600 * 0 | Buffer Address [63:0] |
601 * +--------------------------------------------------------------+
602 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
603 * +--------------------------------------------------------------+
604 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
606 * 82598 Advanced Transmit Descriptor (Write-Back Format)
607 * +--------------------------------------------------------------+
609 * +--------------------------------------------------------------+
610 * 8 | RSV | STA | NXTSEQ |
611 * +--------------------------------------------------------------+
614 * 82599+ Advanced Transmit Descriptor
615 * +--------------------------------------------------------------+
616 * 0 | Buffer Address [63:0] |
617 * +--------------------------------------------------------------+
618 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
619 * +--------------------------------------------------------------+
620 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
622 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
623 * +--------------------------------------------------------------+
625 * +--------------------------------------------------------------+
626 * 8 | RSV | STA | RSV |
627 * +--------------------------------------------------------------+
631 for (n = 0; n < adapter->num_tx_queues; n++) {
632 tx_ring = adapter->tx_ring[n];
633 pr_info("------------------------------------\n");
634 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
635 pr_info("------------------------------------\n");
636 pr_info("%s%s %s %s %s %s\n",
637 "T [desc] [address 63:0 ] ",
638 "[PlPOIdStDDt Ln] [bi->dma ] ",
639 "leng", "ntw", "timestamp", "bi->skb");
641 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
642 tx_desc = IXGBE_TX_DESC(tx_ring, i);
643 tx_buffer = &tx_ring->tx_buffer_info[i];
644 u0 = (struct my_u0 *)tx_desc;
645 if (dma_unmap_len(tx_buffer, len) > 0) {
646 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
650 (u64)dma_unmap_addr(tx_buffer, dma),
651 dma_unmap_len(tx_buffer, len),
652 tx_buffer->next_to_watch,
653 (u64)tx_buffer->time_stamp,
655 if (i == tx_ring->next_to_use &&
656 i == tx_ring->next_to_clean)
658 else if (i == tx_ring->next_to_use)
660 else if (i == tx_ring->next_to_clean)
665 if (netif_msg_pktdata(adapter) &&
667 print_hex_dump(KERN_INFO, "",
668 DUMP_PREFIX_ADDRESS, 16, 1,
669 tx_buffer->skb->data,
670 dma_unmap_len(tx_buffer, len),
676 /* Print RX Rings Summary */
678 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
679 pr_info("Queue [NTU] [NTC]\n");
680 for (n = 0; n < adapter->num_rx_queues; n++) {
681 rx_ring = adapter->rx_ring[n];
682 pr_info("%5d %5X %5X\n",
683 n, rx_ring->next_to_use, rx_ring->next_to_clean);
687 if (!netif_msg_rx_status(adapter))
690 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
692 /* Receive Descriptor Formats
694 * 82598 Advanced Receive Descriptor (Read) Format
696 * +-----------------------------------------------------+
697 * 0 | Packet Buffer Address [63:1] |A0/NSE|
698 * +----------------------------------------------+------+
699 * 8 | Header Buffer Address [63:1] | DD |
700 * +-----------------------------------------------------+
703 * 82598 Advanced Receive Descriptor (Write-Back) Format
705 * 63 48 47 32 31 30 21 20 16 15 4 3 0
706 * +------------------------------------------------------+
707 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
708 * | Packet | IP | | | | Type | Type |
709 * | Checksum | Ident | | | | | |
710 * +------------------------------------------------------+
711 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
712 * +------------------------------------------------------+
713 * 63 48 47 32 31 20 19 0
715 * 82599+ Advanced Receive Descriptor (Read) Format
717 * +-----------------------------------------------------+
718 * 0 | Packet Buffer Address [63:1] |A0/NSE|
719 * +----------------------------------------------+------+
720 * 8 | Header Buffer Address [63:1] | DD |
721 * +-----------------------------------------------------+
724 * 82599+ Advanced Receive Descriptor (Write-Back) Format
726 * 63 48 47 32 31 30 21 20 17 16 4 3 0
727 * +------------------------------------------------------+
728 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
729 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
730 * |/ Flow Dir Flt ID | | | | | |
731 * +------------------------------------------------------+
732 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
733 * +------------------------------------------------------+
734 * 63 48 47 32 31 20 19 0
737 for (n = 0; n < adapter->num_rx_queues; n++) {
738 rx_ring = adapter->rx_ring[n];
739 pr_info("------------------------------------\n");
740 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
741 pr_info("------------------------------------\n");
743 "R [desc] [ PktBuf A0] ",
744 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
745 "<-- Adv Rx Read format\n");
747 "RWB[desc] [PcsmIpSHl PtRs] ",
748 "[vl er S cks ln] ---------------- [bi->skb ] ",
749 "<-- Adv Rx Write-Back format\n");
751 for (i = 0; i < rx_ring->count; i++) {
752 rx_buffer_info = &rx_ring->rx_buffer_info[i];
753 rx_desc = IXGBE_RX_DESC(rx_ring, i);
754 u0 = (struct my_u0 *)rx_desc;
755 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
756 if (staterr & IXGBE_RXD_STAT_DD) {
757 /* Descriptor Done */
758 pr_info("RWB[0x%03X] %016llX "
759 "%016llX ---------------- %p", i,
762 rx_buffer_info->skb);
764 pr_info("R [0x%03X] %016llX "
765 "%016llX %016llX %p", i,
768 (u64)rx_buffer_info->dma,
769 rx_buffer_info->skb);
771 if (netif_msg_pktdata(adapter) &&
772 rx_buffer_info->dma) {
773 print_hex_dump(KERN_INFO, "",
774 DUMP_PREFIX_ADDRESS, 16, 1,
775 page_address(rx_buffer_info->page) +
776 rx_buffer_info->page_offset,
777 ixgbe_rx_bufsz(rx_ring), true);
781 if (i == rx_ring->next_to_use)
783 else if (i == rx_ring->next_to_clean)
792 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
796 /* Let firmware take over control of h/w */
797 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
798 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
799 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
802 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
806 /* Let firmware know the driver has taken over */
807 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
808 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
809 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
813 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
814 * @adapter: pointer to adapter struct
815 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
816 * @queue: queue to map the corresponding interrupt to
817 * @msix_vector: the vector to map to the corresponding queue
820 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
821 u8 queue, u8 msix_vector)
824 struct ixgbe_hw *hw = &adapter->hw;
825 switch (hw->mac.type) {
826 case ixgbe_mac_82598EB:
827 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
830 index = (((direction * 64) + queue) >> 2) & 0x1F;
831 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
832 ivar &= ~(0xFF << (8 * (queue & 0x3)));
833 ivar |= (msix_vector << (8 * (queue & 0x3)));
834 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
836 case ixgbe_mac_82599EB:
839 case ixgbe_mac_X550EM_x:
840 if (direction == -1) {
842 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
843 index = ((queue & 1) * 8);
844 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
845 ivar &= ~(0xFF << index);
846 ivar |= (msix_vector << index);
847 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
850 /* tx or rx causes */
851 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
852 index = ((16 * (queue & 1)) + (8 * direction));
853 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
854 ivar &= ~(0xFF << index);
855 ivar |= (msix_vector << index);
856 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
864 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
869 switch (adapter->hw.mac.type) {
870 case ixgbe_mac_82598EB:
871 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
872 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
874 case ixgbe_mac_82599EB:
877 case ixgbe_mac_X550EM_x:
878 mask = (qmask & 0xFFFFFFFF);
879 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
880 mask = (qmask >> 32);
881 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
888 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
889 struct ixgbe_tx_buffer *tx_buffer)
891 if (tx_buffer->skb) {
892 dev_kfree_skb_any(tx_buffer->skb);
893 if (dma_unmap_len(tx_buffer, len))
894 dma_unmap_single(ring->dev,
895 dma_unmap_addr(tx_buffer, dma),
896 dma_unmap_len(tx_buffer, len),
898 } else if (dma_unmap_len(tx_buffer, len)) {
899 dma_unmap_page(ring->dev,
900 dma_unmap_addr(tx_buffer, dma),
901 dma_unmap_len(tx_buffer, len),
904 tx_buffer->next_to_watch = NULL;
905 tx_buffer->skb = NULL;
906 dma_unmap_len_set(tx_buffer, len, 0);
907 /* tx_buffer must be completely set up in the transmit path */
910 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
912 struct ixgbe_hw *hw = &adapter->hw;
913 struct ixgbe_hw_stats *hwstats = &adapter->stats;
917 if ((hw->fc.current_mode != ixgbe_fc_full) &&
918 (hw->fc.current_mode != ixgbe_fc_rx_pause))
921 switch (hw->mac.type) {
922 case ixgbe_mac_82598EB:
923 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
926 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
928 hwstats->lxoffrxc += data;
930 /* refill credits (no tx hang) if we received xoff */
934 for (i = 0; i < adapter->num_tx_queues; i++)
935 clear_bit(__IXGBE_HANG_CHECK_ARMED,
936 &adapter->tx_ring[i]->state);
939 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
941 struct ixgbe_hw *hw = &adapter->hw;
942 struct ixgbe_hw_stats *hwstats = &adapter->stats;
946 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
948 if (adapter->ixgbe_ieee_pfc)
949 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
951 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
952 ixgbe_update_xoff_rx_lfc(adapter);
956 /* update stats for each tc, only valid with PFC enabled */
957 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
960 switch (hw->mac.type) {
961 case ixgbe_mac_82598EB:
962 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
965 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
967 hwstats->pxoffrxc[i] += pxoffrxc;
968 /* Get the TC for given UP */
969 tc = netdev_get_prio_tc_map(adapter->netdev, i);
970 xoff[tc] += pxoffrxc;
973 /* disarm tx queues that have received xoff frames */
974 for (i = 0; i < adapter->num_tx_queues; i++) {
975 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
977 tc = tx_ring->dcb_tc;
979 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
983 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
985 return ring->stats.packets;
988 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
990 struct ixgbe_adapter *adapter;
994 if (ring->l2_accel_priv)
995 adapter = ring->l2_accel_priv->real_adapter;
997 adapter = netdev_priv(ring->netdev);
1000 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1001 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1004 return (head < tail) ?
1005 tail - head : (tail + ring->count - head);
1010 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1012 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1013 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1014 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1016 clear_check_for_tx_hang(tx_ring);
1019 * Check for a hung queue, but be thorough. This verifies
1020 * that a transmit has been completed since the previous
1021 * check AND there is at least one packet pending. The
1022 * ARMED bit is set to indicate a potential hang. The
1023 * bit is cleared if a pause frame is received to remove
1024 * false hang detection due to PFC or 802.3x frames. By
1025 * requiring this to fail twice we avoid races with
1026 * pfc clearing the ARMED bit and conditions where we
1027 * run the check_tx_hang logic with a transmit completion
1028 * pending but without time to complete it yet.
1030 if (tx_done_old == tx_done && tx_pending)
1031 /* make sure it is true for two checks in a row */
1032 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1034 /* update completed stats and continue */
1035 tx_ring->tx_stats.tx_done_old = tx_done;
1036 /* reset the countdown */
1037 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1043 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1044 * @adapter: driver private struct
1046 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1049 /* Do the reset outside of interrupt context */
1050 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1051 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1052 e_warn(drv, "initiating reset due to tx timeout\n");
1053 ixgbe_service_event_schedule(adapter);
1058 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1059 * @q_vector: structure containing interrupt and ring information
1060 * @tx_ring: tx ring to clean
1062 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1063 struct ixgbe_ring *tx_ring)
1065 struct ixgbe_adapter *adapter = q_vector->adapter;
1066 struct ixgbe_tx_buffer *tx_buffer;
1067 union ixgbe_adv_tx_desc *tx_desc;
1068 unsigned int total_bytes = 0, total_packets = 0;
1069 unsigned int budget = q_vector->tx.work_limit;
1070 unsigned int i = tx_ring->next_to_clean;
1072 if (test_bit(__IXGBE_DOWN, &adapter->state))
1075 tx_buffer = &tx_ring->tx_buffer_info[i];
1076 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1077 i -= tx_ring->count;
1080 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1082 /* if next_to_watch is not set then there is no work pending */
1086 /* prevent any other reads prior to eop_desc */
1087 read_barrier_depends();
1089 /* if DD is not set pending work has not been completed */
1090 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1093 /* clear next_to_watch to prevent false hangs */
1094 tx_buffer->next_to_watch = NULL;
1096 /* update the statistics for this packet */
1097 total_bytes += tx_buffer->bytecount;
1098 total_packets += tx_buffer->gso_segs;
1101 dev_consume_skb_any(tx_buffer->skb);
1103 /* unmap skb header data */
1104 dma_unmap_single(tx_ring->dev,
1105 dma_unmap_addr(tx_buffer, dma),
1106 dma_unmap_len(tx_buffer, len),
1109 /* clear tx_buffer data */
1110 tx_buffer->skb = NULL;
1111 dma_unmap_len_set(tx_buffer, len, 0);
1113 /* unmap remaining buffers */
1114 while (tx_desc != eop_desc) {
1119 i -= tx_ring->count;
1120 tx_buffer = tx_ring->tx_buffer_info;
1121 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1124 /* unmap any remaining paged data */
1125 if (dma_unmap_len(tx_buffer, len)) {
1126 dma_unmap_page(tx_ring->dev,
1127 dma_unmap_addr(tx_buffer, dma),
1128 dma_unmap_len(tx_buffer, len),
1130 dma_unmap_len_set(tx_buffer, len, 0);
1134 /* move us one more past the eop_desc for start of next pkt */
1139 i -= tx_ring->count;
1140 tx_buffer = tx_ring->tx_buffer_info;
1141 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1144 /* issue prefetch for next Tx descriptor */
1147 /* update budget accounting */
1149 } while (likely(budget));
1151 i += tx_ring->count;
1152 tx_ring->next_to_clean = i;
1153 u64_stats_update_begin(&tx_ring->syncp);
1154 tx_ring->stats.bytes += total_bytes;
1155 tx_ring->stats.packets += total_packets;
1156 u64_stats_update_end(&tx_ring->syncp);
1157 q_vector->tx.total_bytes += total_bytes;
1158 q_vector->tx.total_packets += total_packets;
1160 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1161 /* schedule immediate reset if we believe we hung */
1162 struct ixgbe_hw *hw = &adapter->hw;
1163 e_err(drv, "Detected Tx Unit Hang\n"
1165 " TDH, TDT <%x>, <%x>\n"
1166 " next_to_use <%x>\n"
1167 " next_to_clean <%x>\n"
1168 "tx_buffer_info[next_to_clean]\n"
1169 " time_stamp <%lx>\n"
1171 tx_ring->queue_index,
1172 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1173 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1174 tx_ring->next_to_use, i,
1175 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1177 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1180 "tx hang %d detected on queue %d, resetting adapter\n",
1181 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1183 /* schedule immediate reset if we believe we hung */
1184 ixgbe_tx_timeout_reset(adapter);
1186 /* the adapter is about to reset, no point in enabling stuff */
1190 netdev_tx_completed_queue(txring_txq(tx_ring),
1191 total_packets, total_bytes);
1193 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1194 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1195 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1196 /* Make sure that anybody stopping the queue after this
1197 * sees the new next_to_clean.
1200 if (__netif_subqueue_stopped(tx_ring->netdev,
1201 tx_ring->queue_index)
1202 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1203 netif_wake_subqueue(tx_ring->netdev,
1204 tx_ring->queue_index);
1205 ++tx_ring->tx_stats.restart_queue;
1212 #ifdef CONFIG_IXGBE_DCA
1213 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1214 struct ixgbe_ring *tx_ring,
1217 struct ixgbe_hw *hw = &adapter->hw;
1218 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1221 switch (hw->mac.type) {
1222 case ixgbe_mac_82598EB:
1223 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1225 case ixgbe_mac_82599EB:
1226 case ixgbe_mac_X540:
1227 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1228 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1231 /* for unknown hardware do not write register */
1236 * We can enable relaxed ordering for reads, but not writes when
1237 * DCA is enabled. This is due to a known issue in some chipsets
1238 * which will cause the DCA tag to be cleared.
1240 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1241 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1242 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1244 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1247 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1248 struct ixgbe_ring *rx_ring,
1251 struct ixgbe_hw *hw = &adapter->hw;
1252 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1253 u8 reg_idx = rx_ring->reg_idx;
1256 switch (hw->mac.type) {
1257 case ixgbe_mac_82599EB:
1258 case ixgbe_mac_X540:
1259 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1266 * We can enable relaxed ordering for reads, but not writes when
1267 * DCA is enabled. This is due to a known issue in some chipsets
1268 * which will cause the DCA tag to be cleared.
1270 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1271 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1273 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1276 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1278 struct ixgbe_adapter *adapter = q_vector->adapter;
1279 struct ixgbe_ring *ring;
1280 int cpu = get_cpu();
1282 if (q_vector->cpu == cpu)
1285 ixgbe_for_each_ring(ring, q_vector->tx)
1286 ixgbe_update_tx_dca(adapter, ring, cpu);
1288 ixgbe_for_each_ring(ring, q_vector->rx)
1289 ixgbe_update_rx_dca(adapter, ring, cpu);
1291 q_vector->cpu = cpu;
1296 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1300 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1303 /* always use CB2 mode, difference is masked in the CB driver */
1304 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1306 for (i = 0; i < adapter->num_q_vectors; i++) {
1307 adapter->q_vector[i]->cpu = -1;
1308 ixgbe_update_dca(adapter->q_vector[i]);
1312 static int __ixgbe_notify_dca(struct device *dev, void *data)
1314 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1315 unsigned long event = *(unsigned long *)data;
1317 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1321 case DCA_PROVIDER_ADD:
1322 /* if we're already enabled, don't do it again */
1323 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1325 if (dca_add_requester(dev) == 0) {
1326 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1327 ixgbe_setup_dca(adapter);
1330 /* Fall Through since DCA is disabled. */
1331 case DCA_PROVIDER_REMOVE:
1332 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1333 dca_remove_requester(dev);
1334 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1335 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1343 #endif /* CONFIG_IXGBE_DCA */
1344 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1345 union ixgbe_adv_rx_desc *rx_desc,
1346 struct sk_buff *skb)
1348 if (ring->netdev->features & NETIF_F_RXHASH)
1350 le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1356 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1357 * @ring: structure containing ring specific data
1358 * @rx_desc: advanced rx descriptor
1360 * Returns : true if it is FCoE pkt
1362 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1363 union ixgbe_adv_rx_desc *rx_desc)
1365 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1367 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1368 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1369 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1370 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1373 #endif /* IXGBE_FCOE */
1375 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1376 * @ring: structure containing ring specific data
1377 * @rx_desc: current Rx descriptor being processed
1378 * @skb: skb currently being received and modified
1380 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1381 union ixgbe_adv_rx_desc *rx_desc,
1382 struct sk_buff *skb)
1384 skb_checksum_none_assert(skb);
1386 /* Rx csum disabled */
1387 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1390 /* if IP and error */
1391 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1392 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1393 ring->rx_stats.csum_err++;
1397 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1400 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1401 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1404 * 82599 errata, UDP frames with a 0 checksum can be marked as
1407 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1408 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1411 ring->rx_stats.csum_err++;
1415 /* It must be a TCP or UDP packet with a valid checksum */
1416 skb->ip_summed = CHECKSUM_UNNECESSARY;
1419 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1421 rx_ring->next_to_use = val;
1423 /* update next to alloc since we have filled the ring */
1424 rx_ring->next_to_alloc = val;
1426 * Force memory writes to complete before letting h/w
1427 * know there are new descriptors to fetch. (Only
1428 * applicable for weak-ordered memory model archs,
1432 ixgbe_write_tail(rx_ring, val);
1435 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1436 struct ixgbe_rx_buffer *bi)
1438 struct page *page = bi->page;
1439 dma_addr_t dma = bi->dma;
1441 /* since we are recycling buffers we should seldom need to alloc */
1445 /* alloc new page for storage */
1446 if (likely(!page)) {
1447 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1448 if (unlikely(!page)) {
1449 rx_ring->rx_stats.alloc_rx_page_failed++;
1455 /* map page for use */
1456 dma = dma_map_page(rx_ring->dev, page, 0,
1457 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1460 * if mapping failed free memory back to system since
1461 * there isn't much point in holding memory we can't use
1463 if (dma_mapping_error(rx_ring->dev, dma)) {
1464 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1467 rx_ring->rx_stats.alloc_rx_page_failed++;
1472 bi->page_offset = 0;
1478 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1479 * @rx_ring: ring to place buffers on
1480 * @cleaned_count: number of buffers to replace
1482 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1484 union ixgbe_adv_rx_desc *rx_desc;
1485 struct ixgbe_rx_buffer *bi;
1486 u16 i = rx_ring->next_to_use;
1492 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1493 bi = &rx_ring->rx_buffer_info[i];
1494 i -= rx_ring->count;
1497 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1501 * Refresh the desc even if buffer_addrs didn't change
1502 * because each write-back erases this info.
1504 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1510 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1511 bi = rx_ring->rx_buffer_info;
1512 i -= rx_ring->count;
1515 /* clear the hdr_addr for the next_to_use descriptor */
1516 rx_desc->read.hdr_addr = 0;
1519 } while (cleaned_count);
1521 i += rx_ring->count;
1523 if (rx_ring->next_to_use != i)
1524 ixgbe_release_rx_desc(rx_ring, i);
1527 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1528 struct sk_buff *skb)
1530 u16 hdr_len = skb_headlen(skb);
1532 /* set gso_size to avoid messing up TCP MSS */
1533 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1534 IXGBE_CB(skb)->append_cnt);
1535 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1538 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1539 struct sk_buff *skb)
1541 /* if append_cnt is 0 then frame is not RSC */
1542 if (!IXGBE_CB(skb)->append_cnt)
1545 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1546 rx_ring->rx_stats.rsc_flush++;
1548 ixgbe_set_rsc_gso_size(rx_ring, skb);
1550 /* gso_size is computed using append_cnt so always clear it last */
1551 IXGBE_CB(skb)->append_cnt = 0;
1555 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1556 * @rx_ring: rx descriptor ring packet is being transacted on
1557 * @rx_desc: pointer to the EOP Rx descriptor
1558 * @skb: pointer to current skb being populated
1560 * This function checks the ring, descriptor, and packet information in
1561 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1562 * other fields within the skb.
1564 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1565 union ixgbe_adv_rx_desc *rx_desc,
1566 struct sk_buff *skb)
1568 struct net_device *dev = rx_ring->netdev;
1570 ixgbe_update_rsc_stats(rx_ring, skb);
1572 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1574 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1576 if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1577 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1579 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1580 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1581 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1582 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1585 skb_record_rx_queue(skb, rx_ring->queue_index);
1587 skb->protocol = eth_type_trans(skb, dev);
1590 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1591 struct sk_buff *skb)
1593 struct ixgbe_adapter *adapter = q_vector->adapter;
1595 if (ixgbe_qv_busy_polling(q_vector))
1596 netif_receive_skb(skb);
1597 else if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1598 napi_gro_receive(&q_vector->napi, skb);
1604 * ixgbe_is_non_eop - process handling of non-EOP buffers
1605 * @rx_ring: Rx ring being processed
1606 * @rx_desc: Rx descriptor for current buffer
1607 * @skb: Current socket buffer containing buffer in progress
1609 * This function updates next to clean. If the buffer is an EOP buffer
1610 * this function exits returning false, otherwise it will place the
1611 * sk_buff in the next buffer to be chained and return true indicating
1612 * that this is in fact a non-EOP buffer.
1614 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1615 union ixgbe_adv_rx_desc *rx_desc,
1616 struct sk_buff *skb)
1618 u32 ntc = rx_ring->next_to_clean + 1;
1620 /* fetch, update, and store next to clean */
1621 ntc = (ntc < rx_ring->count) ? ntc : 0;
1622 rx_ring->next_to_clean = ntc;
1624 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1626 /* update RSC append count if present */
1627 if (ring_is_rsc_enabled(rx_ring)) {
1628 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1629 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1631 if (unlikely(rsc_enabled)) {
1632 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1634 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1635 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1637 /* update ntc based on RSC value */
1638 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1639 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1640 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1644 /* if we are the last buffer then there is nothing else to do */
1645 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1648 /* place skb in next buffer to be received */
1649 rx_ring->rx_buffer_info[ntc].skb = skb;
1650 rx_ring->rx_stats.non_eop_descs++;
1656 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1657 * @rx_ring: rx descriptor ring packet is being transacted on
1658 * @skb: pointer to current skb being adjusted
1660 * This function is an ixgbe specific version of __pskb_pull_tail. The
1661 * main difference between this version and the original function is that
1662 * this function can make several assumptions about the state of things
1663 * that allow for significant optimizations versus the standard function.
1664 * As a result we can do things like drop a frag and maintain an accurate
1665 * truesize for the skb.
1667 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1668 struct sk_buff *skb)
1670 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1672 unsigned int pull_len;
1675 * it is valid to use page_address instead of kmap since we are
1676 * working with pages allocated out of the lomem pool per
1677 * alloc_page(GFP_ATOMIC)
1679 va = skb_frag_address(frag);
1682 * we need the header to contain the greater of either ETH_HLEN or
1683 * 60 bytes if the skb->len is less than 60 for skb_pad.
1685 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1687 /* align pull length to size of long to optimize memcpy performance */
1688 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1690 /* update all of the pointers */
1691 skb_frag_size_sub(frag, pull_len);
1692 frag->page_offset += pull_len;
1693 skb->data_len -= pull_len;
1694 skb->tail += pull_len;
1698 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1699 * @rx_ring: rx descriptor ring packet is being transacted on
1700 * @skb: pointer to current skb being updated
1702 * This function provides a basic DMA sync up for the first fragment of an
1703 * skb. The reason for doing this is that the first fragment cannot be
1704 * unmapped until we have reached the end of packet descriptor for a buffer
1707 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1708 struct sk_buff *skb)
1710 /* if the page was released unmap it, else just sync our portion */
1711 if (unlikely(IXGBE_CB(skb)->page_released)) {
1712 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1713 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1714 IXGBE_CB(skb)->page_released = false;
1716 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1718 dma_sync_single_range_for_cpu(rx_ring->dev,
1721 ixgbe_rx_bufsz(rx_ring),
1724 IXGBE_CB(skb)->dma = 0;
1728 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1729 * @rx_ring: rx descriptor ring packet is being transacted on
1730 * @rx_desc: pointer to the EOP Rx descriptor
1731 * @skb: pointer to current skb being fixed
1733 * Check for corrupted packet headers caused by senders on the local L2
1734 * embedded NIC switch not setting up their Tx Descriptors right. These
1735 * should be very rare.
1737 * Also address the case where we are pulling data in on pages only
1738 * and as such no data is present in the skb header.
1740 * In addition if skb is not at least 60 bytes we need to pad it so that
1741 * it is large enough to qualify as a valid Ethernet frame.
1743 * Returns true if an error was encountered and skb was freed.
1745 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1746 union ixgbe_adv_rx_desc *rx_desc,
1747 struct sk_buff *skb)
1749 struct net_device *netdev = rx_ring->netdev;
1751 /* verify that the packet does not have any known errors */
1752 if (unlikely(ixgbe_test_staterr(rx_desc,
1753 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1754 !(netdev->features & NETIF_F_RXALL))) {
1755 dev_kfree_skb_any(skb);
1759 /* place header in linear portion of buffer */
1760 if (skb_is_nonlinear(skb))
1761 ixgbe_pull_tail(rx_ring, skb);
1764 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1765 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1769 /* if skb_pad returns an error the skb was freed */
1770 if (unlikely(skb->len < 60)) {
1771 int pad_len = 60 - skb->len;
1773 if (skb_pad(skb, pad_len))
1775 __skb_put(skb, pad_len);
1782 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1783 * @rx_ring: rx descriptor ring to store buffers on
1784 * @old_buff: donor buffer to have page reused
1786 * Synchronizes page for reuse by the adapter
1788 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1789 struct ixgbe_rx_buffer *old_buff)
1791 struct ixgbe_rx_buffer *new_buff;
1792 u16 nta = rx_ring->next_to_alloc;
1794 new_buff = &rx_ring->rx_buffer_info[nta];
1796 /* update, and store next to alloc */
1798 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1800 /* transfer page from old buffer to new buffer */
1801 new_buff->page = old_buff->page;
1802 new_buff->dma = old_buff->dma;
1803 new_buff->page_offset = old_buff->page_offset;
1805 /* sync the buffer for use by the device */
1806 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1807 new_buff->page_offset,
1808 ixgbe_rx_bufsz(rx_ring),
1813 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1814 * @rx_ring: rx descriptor ring to transact packets on
1815 * @rx_buffer: buffer containing page to add
1816 * @rx_desc: descriptor containing length of buffer written by hardware
1817 * @skb: sk_buff to place the data into
1819 * This function will add the data contained in rx_buffer->page to the skb.
1820 * This is done either through a direct copy if the data in the buffer is
1821 * less than the skb header size, otherwise it will just attach the page as
1822 * a frag to the skb.
1824 * The function will then update the page offset if necessary and return
1825 * true if the buffer can be reused by the adapter.
1827 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1828 struct ixgbe_rx_buffer *rx_buffer,
1829 union ixgbe_adv_rx_desc *rx_desc,
1830 struct sk_buff *skb)
1832 struct page *page = rx_buffer->page;
1833 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1834 #if (PAGE_SIZE < 8192)
1835 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1837 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1838 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1839 ixgbe_rx_bufsz(rx_ring);
1842 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1843 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1845 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1847 /* we can reuse buffer as-is, just make sure it is local */
1848 if (likely(page_to_nid(page) == numa_node_id()))
1851 /* this page cannot be reused so discard it */
1856 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1857 rx_buffer->page_offset, size, truesize);
1859 /* avoid re-using remote pages */
1860 if (unlikely(page_to_nid(page) != numa_node_id()))
1863 #if (PAGE_SIZE < 8192)
1864 /* if we are only owner of page we can reuse it */
1865 if (unlikely(page_count(page) != 1))
1868 /* flip page offset to other buffer */
1869 rx_buffer->page_offset ^= truesize;
1871 /* Even if we own the page, we are not allowed to use atomic_set()
1872 * This would break get_page_unless_zero() users.
1874 atomic_inc(&page->_count);
1876 /* move offset up to the next cache line */
1877 rx_buffer->page_offset += truesize;
1879 if (rx_buffer->page_offset > last_offset)
1882 /* bump ref count on page before it is given to the stack */
1889 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1890 union ixgbe_adv_rx_desc *rx_desc)
1892 struct ixgbe_rx_buffer *rx_buffer;
1893 struct sk_buff *skb;
1896 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1897 page = rx_buffer->page;
1900 skb = rx_buffer->skb;
1903 void *page_addr = page_address(page) +
1904 rx_buffer->page_offset;
1906 /* prefetch first cache line of first page */
1907 prefetch(page_addr);
1908 #if L1_CACHE_BYTES < 128
1909 prefetch(page_addr + L1_CACHE_BYTES);
1912 /* allocate a skb to store the frags */
1913 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1915 if (unlikely(!skb)) {
1916 rx_ring->rx_stats.alloc_rx_buff_failed++;
1921 * we will be copying header into skb->data in
1922 * pskb_may_pull so it is in our interest to prefetch
1923 * it now to avoid a possible cache miss
1925 prefetchw(skb->data);
1928 * Delay unmapping of the first packet. It carries the
1929 * header information, HW may still access the header
1930 * after the writeback. Only unmap it when EOP is
1933 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1936 IXGBE_CB(skb)->dma = rx_buffer->dma;
1938 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1939 ixgbe_dma_sync_frag(rx_ring, skb);
1942 /* we are reusing so sync this buffer for CPU use */
1943 dma_sync_single_range_for_cpu(rx_ring->dev,
1945 rx_buffer->page_offset,
1946 ixgbe_rx_bufsz(rx_ring),
1950 /* pull page into skb */
1951 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
1952 /* hand second half of page back to the ring */
1953 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
1954 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
1955 /* the page has been released from the ring */
1956 IXGBE_CB(skb)->page_released = true;
1958 /* we are not reusing the buffer so unmap it */
1959 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
1960 ixgbe_rx_pg_size(rx_ring),
1964 /* clear contents of buffer_info */
1965 rx_buffer->skb = NULL;
1967 rx_buffer->page = NULL;
1973 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1974 * @q_vector: structure containing interrupt and ring information
1975 * @rx_ring: rx descriptor ring to transact packets on
1976 * @budget: Total limit on number of packets to process
1978 * This function provides a "bounce buffer" approach to Rx interrupt
1979 * processing. The advantage to this is that on systems that have
1980 * expensive overhead for IOMMU access this provides a means of avoiding
1981 * it by maintaining the mapping of the page to the syste.
1983 * Returns amount of work completed
1985 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
1986 struct ixgbe_ring *rx_ring,
1989 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1991 struct ixgbe_adapter *adapter = q_vector->adapter;
1993 unsigned int mss = 0;
1994 #endif /* IXGBE_FCOE */
1995 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
1997 while (likely(total_rx_packets < budget)) {
1998 union ixgbe_adv_rx_desc *rx_desc;
1999 struct sk_buff *skb;
2001 /* return some buffers to hardware, one at a time is too slow */
2002 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2003 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2007 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2009 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
2013 * This memory barrier is needed to keep us from reading
2014 * any other fields out of the rx_desc until we know the
2015 * RXD_STAT_DD bit is set
2019 /* retrieve a buffer from the ring */
2020 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2022 /* exit if we failed to retrieve a buffer */
2028 /* place incomplete frames back on ring for completion */
2029 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2032 /* verify the packet layout is correct */
2033 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2036 /* probably a little skewed due to removing CRC */
2037 total_rx_bytes += skb->len;
2039 /* populate checksum, timestamp, VLAN, and protocol */
2040 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2043 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2044 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2045 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2046 /* include DDPed FCoE data */
2047 if (ddp_bytes > 0) {
2049 mss = rx_ring->netdev->mtu -
2050 sizeof(struct fcoe_hdr) -
2051 sizeof(struct fc_frame_header) -
2052 sizeof(struct fcoe_crc_eof);
2056 total_rx_bytes += ddp_bytes;
2057 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2061 dev_kfree_skb_any(skb);
2066 #endif /* IXGBE_FCOE */
2067 skb_mark_napi_id(skb, &q_vector->napi);
2068 ixgbe_rx_skb(q_vector, skb);
2070 /* update budget accounting */
2074 u64_stats_update_begin(&rx_ring->syncp);
2075 rx_ring->stats.packets += total_rx_packets;
2076 rx_ring->stats.bytes += total_rx_bytes;
2077 u64_stats_update_end(&rx_ring->syncp);
2078 q_vector->rx.total_packets += total_rx_packets;
2079 q_vector->rx.total_bytes += total_rx_bytes;
2081 return total_rx_packets;
2084 #ifdef CONFIG_NET_RX_BUSY_POLL
2085 /* must be called with local_bh_disable()d */
2086 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2088 struct ixgbe_q_vector *q_vector =
2089 container_of(napi, struct ixgbe_q_vector, napi);
2090 struct ixgbe_adapter *adapter = q_vector->adapter;
2091 struct ixgbe_ring *ring;
2094 if (test_bit(__IXGBE_DOWN, &adapter->state))
2095 return LL_FLUSH_FAILED;
2097 if (!ixgbe_qv_lock_poll(q_vector))
2098 return LL_FLUSH_BUSY;
2100 ixgbe_for_each_ring(ring, q_vector->rx) {
2101 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2102 #ifdef BP_EXTENDED_STATS
2104 ring->stats.cleaned += found;
2106 ring->stats.misses++;
2112 ixgbe_qv_unlock_poll(q_vector);
2116 #endif /* CONFIG_NET_RX_BUSY_POLL */
2119 * ixgbe_configure_msix - Configure MSI-X hardware
2120 * @adapter: board private structure
2122 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2125 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2127 struct ixgbe_q_vector *q_vector;
2131 /* Populate MSIX to EITR Select */
2132 if (adapter->num_vfs > 32) {
2133 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2134 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2138 * Populate the IVAR table and set the ITR values to the
2139 * corresponding register.
2141 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2142 struct ixgbe_ring *ring;
2143 q_vector = adapter->q_vector[v_idx];
2145 ixgbe_for_each_ring(ring, q_vector->rx)
2146 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2148 ixgbe_for_each_ring(ring, q_vector->tx)
2149 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2151 ixgbe_write_eitr(q_vector);
2154 switch (adapter->hw.mac.type) {
2155 case ixgbe_mac_82598EB:
2156 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2159 case ixgbe_mac_82599EB:
2160 case ixgbe_mac_X540:
2161 case ixgbe_mac_X550:
2162 case ixgbe_mac_X550EM_x:
2163 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2168 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2170 /* set up to autoclear timer, and the vectors */
2171 mask = IXGBE_EIMS_ENABLE_MASK;
2172 mask &= ~(IXGBE_EIMS_OTHER |
2173 IXGBE_EIMS_MAILBOX |
2176 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2179 enum latency_range {
2183 latency_invalid = 255
2187 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2188 * @q_vector: structure containing interrupt and ring information
2189 * @ring_container: structure containing ring performance data
2191 * Stores a new ITR value based on packets and byte
2192 * counts during the last interrupt. The advantage of per interrupt
2193 * computation is faster updates and more accurate ITR for the current
2194 * traffic pattern. Constants in this function were computed
2195 * based on theoretical maximum wire speed and thresholds were set based
2196 * on testing data as well as attempting to minimize response time
2197 * while increasing bulk throughput.
2198 * this functionality is controlled by the InterruptThrottleRate module
2199 * parameter (see ixgbe_param.c)
2201 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2202 struct ixgbe_ring_container *ring_container)
2204 int bytes = ring_container->total_bytes;
2205 int packets = ring_container->total_packets;
2208 u8 itr_setting = ring_container->itr;
2213 /* simple throttlerate management
2214 * 0-10MB/s lowest (100000 ints/s)
2215 * 10-20MB/s low (20000 ints/s)
2216 * 20-1249MB/s bulk (8000 ints/s)
2218 /* what was last interrupt timeslice? */
2219 timepassed_us = q_vector->itr >> 2;
2220 if (timepassed_us == 0)
2223 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2225 switch (itr_setting) {
2226 case lowest_latency:
2227 if (bytes_perint > 10)
2228 itr_setting = low_latency;
2231 if (bytes_perint > 20)
2232 itr_setting = bulk_latency;
2233 else if (bytes_perint <= 10)
2234 itr_setting = lowest_latency;
2237 if (bytes_perint <= 20)
2238 itr_setting = low_latency;
2242 /* clear work counters since we have the values we need */
2243 ring_container->total_bytes = 0;
2244 ring_container->total_packets = 0;
2246 /* write updated itr to ring container */
2247 ring_container->itr = itr_setting;
2251 * ixgbe_write_eitr - write EITR register in hardware specific way
2252 * @q_vector: structure containing interrupt and ring information
2254 * This function is made to be called by ethtool and by the driver
2255 * when it needs to update EITR registers at runtime. Hardware
2256 * specific quirks/differences are taken care of here.
2258 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2260 struct ixgbe_adapter *adapter = q_vector->adapter;
2261 struct ixgbe_hw *hw = &adapter->hw;
2262 int v_idx = q_vector->v_idx;
2263 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2265 switch (adapter->hw.mac.type) {
2266 case ixgbe_mac_82598EB:
2267 /* must write high and low 16 bits to reset counter */
2268 itr_reg |= (itr_reg << 16);
2270 case ixgbe_mac_82599EB:
2271 case ixgbe_mac_X540:
2272 case ixgbe_mac_X550:
2273 case ixgbe_mac_X550EM_x:
2275 * set the WDIS bit to not clear the timer bits and cause an
2276 * immediate assertion of the interrupt
2278 itr_reg |= IXGBE_EITR_CNT_WDIS;
2283 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2286 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2288 u32 new_itr = q_vector->itr;
2291 ixgbe_update_itr(q_vector, &q_vector->tx);
2292 ixgbe_update_itr(q_vector, &q_vector->rx);
2294 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2296 switch (current_itr) {
2297 /* counts and packets in update_itr are dependent on these numbers */
2298 case lowest_latency:
2299 new_itr = IXGBE_100K_ITR;
2302 new_itr = IXGBE_20K_ITR;
2305 new_itr = IXGBE_8K_ITR;
2311 if (new_itr != q_vector->itr) {
2312 /* do an exponential smoothing */
2313 new_itr = (10 * new_itr * q_vector->itr) /
2314 ((9 * new_itr) + q_vector->itr);
2316 /* save the algorithm value here */
2317 q_vector->itr = new_itr;
2319 ixgbe_write_eitr(q_vector);
2324 * ixgbe_check_overtemp_subtask - check for over temperature
2325 * @adapter: pointer to adapter
2327 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2329 struct ixgbe_hw *hw = &adapter->hw;
2330 u32 eicr = adapter->interrupt_event;
2332 if (test_bit(__IXGBE_DOWN, &adapter->state))
2335 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2336 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2339 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2341 switch (hw->device_id) {
2342 case IXGBE_DEV_ID_82599_T3_LOM:
2344 * Since the warning interrupt is for both ports
2345 * we don't have to check if:
2346 * - This interrupt wasn't for our port.
2347 * - We may have missed the interrupt so always have to
2348 * check if we got a LSC
2350 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2351 !(eicr & IXGBE_EICR_LSC))
2354 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2356 bool link_up = false;
2358 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2364 /* Check if this is not due to overtemp */
2365 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2370 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2375 "Network adapter has been stopped because it has over heated. "
2376 "Restart the computer. If the problem persists, "
2377 "power off the system and replace the adapter\n");
2379 adapter->interrupt_event = 0;
2382 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2384 struct ixgbe_hw *hw = &adapter->hw;
2386 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2387 (eicr & IXGBE_EICR_GPI_SDP1)) {
2388 e_crit(probe, "Fan has stopped, replace the adapter\n");
2389 /* write to clear the interrupt */
2390 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2394 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2396 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2399 switch (adapter->hw.mac.type) {
2400 case ixgbe_mac_82599EB:
2402 * Need to check link state so complete overtemp check
2405 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2406 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2407 adapter->interrupt_event = eicr;
2408 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2409 ixgbe_service_event_schedule(adapter);
2413 case ixgbe_mac_X540:
2414 if (!(eicr & IXGBE_EICR_TS))
2422 "Network adapter has been stopped because it has over heated. "
2423 "Restart the computer. If the problem persists, "
2424 "power off the system and replace the adapter\n");
2427 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2429 struct ixgbe_hw *hw = &adapter->hw;
2431 if (eicr & IXGBE_EICR_GPI_SDP2) {
2432 /* Clear the interrupt */
2433 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2434 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2435 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2436 ixgbe_service_event_schedule(adapter);
2440 if (eicr & IXGBE_EICR_GPI_SDP1) {
2441 /* Clear the interrupt */
2442 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2443 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2444 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2445 ixgbe_service_event_schedule(adapter);
2450 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2452 struct ixgbe_hw *hw = &adapter->hw;
2455 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2456 adapter->link_check_timeout = jiffies;
2457 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2458 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2459 IXGBE_WRITE_FLUSH(hw);
2460 ixgbe_service_event_schedule(adapter);
2464 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2468 struct ixgbe_hw *hw = &adapter->hw;
2470 switch (hw->mac.type) {
2471 case ixgbe_mac_82598EB:
2472 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2473 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2475 case ixgbe_mac_82599EB:
2476 case ixgbe_mac_X540:
2477 case ixgbe_mac_X550:
2478 case ixgbe_mac_X550EM_x:
2479 mask = (qmask & 0xFFFFFFFF);
2481 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2482 mask = (qmask >> 32);
2484 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2489 /* skip the flush */
2492 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2496 struct ixgbe_hw *hw = &adapter->hw;
2498 switch (hw->mac.type) {
2499 case ixgbe_mac_82598EB:
2500 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2501 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2503 case ixgbe_mac_82599EB:
2504 case ixgbe_mac_X540:
2505 case ixgbe_mac_X550:
2506 case ixgbe_mac_X550EM_x:
2507 mask = (qmask & 0xFFFFFFFF);
2509 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2510 mask = (qmask >> 32);
2512 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2517 /* skip the flush */
2521 * ixgbe_irq_enable - Enable default interrupt generation settings
2522 * @adapter: board private structure
2524 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2527 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2529 /* don't reenable LSC while waiting for link */
2530 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2531 mask &= ~IXGBE_EIMS_LSC;
2533 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2534 switch (adapter->hw.mac.type) {
2535 case ixgbe_mac_82599EB:
2536 mask |= IXGBE_EIMS_GPI_SDP0;
2538 case ixgbe_mac_X540:
2539 case ixgbe_mac_X550:
2540 case ixgbe_mac_X550EM_x:
2541 mask |= IXGBE_EIMS_TS;
2546 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2547 mask |= IXGBE_EIMS_GPI_SDP1;
2548 switch (adapter->hw.mac.type) {
2549 case ixgbe_mac_82599EB:
2550 mask |= IXGBE_EIMS_GPI_SDP1;
2551 mask |= IXGBE_EIMS_GPI_SDP2;
2553 case ixgbe_mac_X540:
2554 case ixgbe_mac_X550:
2555 case ixgbe_mac_X550EM_x:
2556 mask |= IXGBE_EIMS_ECC;
2557 mask |= IXGBE_EIMS_MAILBOX;
2563 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2564 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2565 mask |= IXGBE_EIMS_FLOW_DIR;
2567 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2569 ixgbe_irq_enable_queues(adapter, ~0);
2571 IXGBE_WRITE_FLUSH(&adapter->hw);
2574 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2576 struct ixgbe_adapter *adapter = data;
2577 struct ixgbe_hw *hw = &adapter->hw;
2581 * Workaround for Silicon errata. Use clear-by-write instead
2582 * of clear-by-read. Reading with EICS will return the
2583 * interrupt causes without clearing, which later be done
2584 * with the write to EICR.
2586 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2588 /* The lower 16bits of the EICR register are for the queue interrupts
2589 * which should be masked here in order to not accidently clear them if
2590 * the bits are high when ixgbe_msix_other is called. There is a race
2591 * condition otherwise which results in possible performance loss
2592 * especially if the ixgbe_msix_other interrupt is triggering
2593 * consistently (as it would when PPS is turned on for the X540 device)
2597 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2599 if (eicr & IXGBE_EICR_LSC)
2600 ixgbe_check_lsc(adapter);
2602 if (eicr & IXGBE_EICR_MAILBOX)
2603 ixgbe_msg_task(adapter);
2605 switch (hw->mac.type) {
2606 case ixgbe_mac_82599EB:
2607 case ixgbe_mac_X540:
2608 case ixgbe_mac_X550:
2609 case ixgbe_mac_X550EM_x:
2610 if (eicr & IXGBE_EICR_ECC) {
2611 e_info(link, "Received ECC Err, initiating reset\n");
2612 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2613 ixgbe_service_event_schedule(adapter);
2614 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2616 /* Handle Flow Director Full threshold interrupt */
2617 if (eicr & IXGBE_EICR_FLOW_DIR) {
2618 int reinit_count = 0;
2620 for (i = 0; i < adapter->num_tx_queues; i++) {
2621 struct ixgbe_ring *ring = adapter->tx_ring[i];
2622 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2627 /* no more flow director interrupts until after init */
2628 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2629 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2630 ixgbe_service_event_schedule(adapter);
2633 ixgbe_check_sfp_event(adapter, eicr);
2634 ixgbe_check_overtemp_event(adapter, eicr);
2640 ixgbe_check_fan_failure(adapter, eicr);
2642 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2643 ixgbe_ptp_check_pps_event(adapter, eicr);
2645 /* re-enable the original interrupt state, no lsc, no queues */
2646 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2647 ixgbe_irq_enable(adapter, false, false);
2652 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2654 struct ixgbe_q_vector *q_vector = data;
2656 /* EIAM disabled interrupts (on this vector) for us */
2658 if (q_vector->rx.ring || q_vector->tx.ring)
2659 napi_schedule(&q_vector->napi);
2665 * ixgbe_poll - NAPI Rx polling callback
2666 * @napi: structure for representing this polling device
2667 * @budget: how many packets driver is allowed to clean
2669 * This function is used for legacy and MSI, NAPI mode
2671 int ixgbe_poll(struct napi_struct *napi, int budget)
2673 struct ixgbe_q_vector *q_vector =
2674 container_of(napi, struct ixgbe_q_vector, napi);
2675 struct ixgbe_adapter *adapter = q_vector->adapter;
2676 struct ixgbe_ring *ring;
2677 int per_ring_budget;
2678 bool clean_complete = true;
2680 #ifdef CONFIG_IXGBE_DCA
2681 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2682 ixgbe_update_dca(q_vector);
2685 ixgbe_for_each_ring(ring, q_vector->tx)
2686 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2688 if (!ixgbe_qv_lock_napi(q_vector))
2691 /* attempt to distribute budget to each queue fairly, but don't allow
2692 * the budget to go below 1 because we'll exit polling */
2693 if (q_vector->rx.count > 1)
2694 per_ring_budget = max(budget/q_vector->rx.count, 1);
2696 per_ring_budget = budget;
2698 ixgbe_for_each_ring(ring, q_vector->rx)
2699 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2700 per_ring_budget) < per_ring_budget);
2702 ixgbe_qv_unlock_napi(q_vector);
2703 /* If all work not completed, return budget and keep polling */
2704 if (!clean_complete)
2707 /* all work done, exit the polling mode */
2708 napi_complete(napi);
2709 if (adapter->rx_itr_setting & 1)
2710 ixgbe_set_itr(q_vector);
2711 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2712 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2718 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2719 * @adapter: board private structure
2721 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2722 * interrupts from the kernel.
2724 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2726 struct net_device *netdev = adapter->netdev;
2730 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2731 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2732 struct msix_entry *entry = &adapter->msix_entries[vector];
2734 if (q_vector->tx.ring && q_vector->rx.ring) {
2735 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2736 "%s-%s-%d", netdev->name, "TxRx", ri++);
2738 } else if (q_vector->rx.ring) {
2739 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2740 "%s-%s-%d", netdev->name, "rx", ri++);
2741 } else if (q_vector->tx.ring) {
2742 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2743 "%s-%s-%d", netdev->name, "tx", ti++);
2745 /* skip this unused q_vector */
2748 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2749 q_vector->name, q_vector);
2751 e_err(probe, "request_irq failed for MSIX interrupt "
2752 "Error: %d\n", err);
2753 goto free_queue_irqs;
2755 /* If Flow Director is enabled, set interrupt affinity */
2756 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2757 /* assign the mask for this irq */
2758 irq_set_affinity_hint(entry->vector,
2759 &q_vector->affinity_mask);
2763 err = request_irq(adapter->msix_entries[vector].vector,
2764 ixgbe_msix_other, 0, netdev->name, adapter);
2766 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2767 goto free_queue_irqs;
2775 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2777 free_irq(adapter->msix_entries[vector].vector,
2778 adapter->q_vector[vector]);
2780 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2781 pci_disable_msix(adapter->pdev);
2782 kfree(adapter->msix_entries);
2783 adapter->msix_entries = NULL;
2788 * ixgbe_intr - legacy mode Interrupt Handler
2789 * @irq: interrupt number
2790 * @data: pointer to a network interface device structure
2792 static irqreturn_t ixgbe_intr(int irq, void *data)
2794 struct ixgbe_adapter *adapter = data;
2795 struct ixgbe_hw *hw = &adapter->hw;
2796 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2800 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2801 * before the read of EICR.
2803 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2805 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2806 * therefore no explicit interrupt disable is necessary */
2807 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2810 * shared interrupt alert!
2811 * make sure interrupts are enabled because the read will
2812 * have disabled interrupts due to EIAM
2813 * finish the workaround of silicon errata on 82598. Unmask
2814 * the interrupt that we masked before the EICR read.
2816 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2817 ixgbe_irq_enable(adapter, true, true);
2818 return IRQ_NONE; /* Not our interrupt */
2821 if (eicr & IXGBE_EICR_LSC)
2822 ixgbe_check_lsc(adapter);
2824 switch (hw->mac.type) {
2825 case ixgbe_mac_82599EB:
2826 ixgbe_check_sfp_event(adapter, eicr);
2828 case ixgbe_mac_X540:
2829 case ixgbe_mac_X550:
2830 case ixgbe_mac_X550EM_x:
2831 if (eicr & IXGBE_EICR_ECC) {
2832 e_info(link, "Received ECC Err, initiating reset\n");
2833 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2834 ixgbe_service_event_schedule(adapter);
2835 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2837 ixgbe_check_overtemp_event(adapter, eicr);
2843 ixgbe_check_fan_failure(adapter, eicr);
2844 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2845 ixgbe_ptp_check_pps_event(adapter, eicr);
2847 /* would disable interrupts here but EIAM disabled it */
2848 napi_schedule(&q_vector->napi);
2851 * re-enable link(maybe) and non-queue interrupts, no flush.
2852 * ixgbe_poll will re-enable the queue interrupts
2854 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2855 ixgbe_irq_enable(adapter, false, false);
2861 * ixgbe_request_irq - initialize interrupts
2862 * @adapter: board private structure
2864 * Attempts to configure interrupts using the best available
2865 * capabilities of the hardware and kernel.
2867 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2869 struct net_device *netdev = adapter->netdev;
2872 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2873 err = ixgbe_request_msix_irqs(adapter);
2874 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2875 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2876 netdev->name, adapter);
2878 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2879 netdev->name, adapter);
2882 e_err(probe, "request_irq failed, Error %d\n", err);
2887 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2891 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2892 free_irq(adapter->pdev->irq, adapter);
2896 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2897 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2898 struct msix_entry *entry = &adapter->msix_entries[vector];
2900 /* free only the irqs that were actually requested */
2901 if (!q_vector->rx.ring && !q_vector->tx.ring)
2904 /* clear the affinity_mask in the IRQ descriptor */
2905 irq_set_affinity_hint(entry->vector, NULL);
2907 free_irq(entry->vector, q_vector);
2910 free_irq(adapter->msix_entries[vector++].vector, adapter);
2914 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2915 * @adapter: board private structure
2917 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2919 switch (adapter->hw.mac.type) {
2920 case ixgbe_mac_82598EB:
2921 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2923 case ixgbe_mac_82599EB:
2924 case ixgbe_mac_X540:
2925 case ixgbe_mac_X550:
2926 case ixgbe_mac_X550EM_x:
2927 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2928 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2929 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
2934 IXGBE_WRITE_FLUSH(&adapter->hw);
2935 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2938 for (vector = 0; vector < adapter->num_q_vectors; vector++)
2939 synchronize_irq(adapter->msix_entries[vector].vector);
2941 synchronize_irq(adapter->msix_entries[vector++].vector);
2943 synchronize_irq(adapter->pdev->irq);
2948 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2951 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2953 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2955 ixgbe_write_eitr(q_vector);
2957 ixgbe_set_ivar(adapter, 0, 0, 0);
2958 ixgbe_set_ivar(adapter, 1, 0, 0);
2960 e_info(hw, "Legacy interrupt IVAR setup done\n");
2964 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2965 * @adapter: board private structure
2966 * @ring: structure containing ring specific data
2968 * Configure the Tx descriptor ring after a reset.
2970 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2971 struct ixgbe_ring *ring)
2973 struct ixgbe_hw *hw = &adapter->hw;
2974 u64 tdba = ring->dma;
2976 u32 txdctl = IXGBE_TXDCTL_ENABLE;
2977 u8 reg_idx = ring->reg_idx;
2979 /* disable queue to avoid issues while updating state */
2980 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
2981 IXGBE_WRITE_FLUSH(hw);
2983 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
2984 (tdba & DMA_BIT_MASK(32)));
2985 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2986 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2987 ring->count * sizeof(union ixgbe_adv_tx_desc));
2988 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2989 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
2990 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
2993 * set WTHRESH to encourage burst writeback, it should not be set
2994 * higher than 1 when:
2995 * - ITR is 0 as it could cause false TX hangs
2996 * - ITR is set to > 100k int/sec and BQL is enabled
2998 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2999 * to or less than the number of on chip descriptors, which is
3002 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3003 txdctl |= (1 << 16); /* WTHRESH = 1 */
3005 txdctl |= (8 << 16); /* WTHRESH = 8 */
3008 * Setting PTHRESH to 32 both improves performance
3009 * and avoids a TX hang with DFP enabled
3011 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3012 32; /* PTHRESH = 32 */
3014 /* reinitialize flowdirector state */
3015 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3016 ring->atr_sample_rate = adapter->atr_sample_rate;
3017 ring->atr_count = 0;
3018 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3020 ring->atr_sample_rate = 0;
3023 /* initialize XPS */
3024 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3025 struct ixgbe_q_vector *q_vector = ring->q_vector;
3028 netif_set_xps_queue(ring->netdev,
3029 &q_vector->affinity_mask,
3033 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3036 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3038 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3039 if (hw->mac.type == ixgbe_mac_82598EB &&
3040 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3043 /* poll to verify queue is enabled */
3045 usleep_range(1000, 2000);
3046 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3047 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3049 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3052 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3054 struct ixgbe_hw *hw = &adapter->hw;
3056 u8 tcs = netdev_get_num_tc(adapter->netdev);
3058 if (hw->mac.type == ixgbe_mac_82598EB)
3061 /* disable the arbiter while setting MTQC */
3062 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3063 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3064 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3066 /* set transmit pool layout */
3067 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3068 mtqc = IXGBE_MTQC_VT_ENA;
3070 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3072 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3073 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3074 mtqc |= IXGBE_MTQC_32VF;
3076 mtqc |= IXGBE_MTQC_64VF;
3079 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3081 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3083 mtqc = IXGBE_MTQC_64Q_1PB;
3086 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3088 /* Enable Security TX Buffer IFG for multiple pb */
3090 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3091 sectx |= IXGBE_SECTX_DCB;
3092 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3095 /* re-enable the arbiter */
3096 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3097 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3101 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3102 * @adapter: board private structure
3104 * Configure the Tx unit of the MAC after a reset.
3106 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3108 struct ixgbe_hw *hw = &adapter->hw;
3112 ixgbe_setup_mtqc(adapter);
3114 if (hw->mac.type != ixgbe_mac_82598EB) {
3115 /* DMATXCTL.EN must be before Tx queues are enabled */
3116 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3117 dmatxctl |= IXGBE_DMATXCTL_TE;
3118 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3121 /* Setup the HW Tx Head and Tail descriptor pointers */
3122 for (i = 0; i < adapter->num_tx_queues; i++)
3123 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3126 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3127 struct ixgbe_ring *ring)
3129 struct ixgbe_hw *hw = &adapter->hw;
3130 u8 reg_idx = ring->reg_idx;
3131 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3133 srrctl |= IXGBE_SRRCTL_DROP_EN;
3135 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3138 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3139 struct ixgbe_ring *ring)
3141 struct ixgbe_hw *hw = &adapter->hw;
3142 u8 reg_idx = ring->reg_idx;
3143 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3145 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3147 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3150 #ifdef CONFIG_IXGBE_DCB
3151 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3153 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3157 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3159 if (adapter->ixgbe_ieee_pfc)
3160 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3163 * We should set the drop enable bit if:
3166 * Number of Rx queues > 1 and flow control is disabled
3168 * This allows us to avoid head of line blocking for security
3169 * and performance reasons.
3171 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3172 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3173 for (i = 0; i < adapter->num_rx_queues; i++)
3174 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3176 for (i = 0; i < adapter->num_rx_queues; i++)
3177 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3181 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3183 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3184 struct ixgbe_ring *rx_ring)
3186 struct ixgbe_hw *hw = &adapter->hw;
3188 u8 reg_idx = rx_ring->reg_idx;
3190 if (hw->mac.type == ixgbe_mac_82598EB) {
3191 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3194 * if VMDq is not active we must program one srrctl register
3195 * per RSS queue since we have enabled RDRXCTL.MVMEN
3200 /* configure header buffer length, needed for RSC */
3201 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3203 /* configure the packet buffer length */
3204 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3206 /* configure descriptor type */
3207 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3209 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3212 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter, const u32 *seed)
3214 struct ixgbe_hw *hw = &adapter->hw;
3217 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3220 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3221 * make full use of any rings they may have. We will use the
3222 * PSRTYPE register to control how many rings we use within the PF.
3224 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3227 /* Fill out hash function seeds */
3228 for (i = 0; i < 10; i++)
3229 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3231 /* Fill out redirection table */
3232 for (i = 0, j = 0; i < 128; i++, j++) {
3235 /* reta = 4-byte sliding window of
3236 * 0x00..(indices-1)(indices-1)00..etc. */
3237 reta = (reta << 8) | (j * 0x11);
3239 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3243 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3245 struct ixgbe_hw *hw = &adapter->hw;
3246 u32 mrqc = 0, rss_field = 0;
3250 /* Disable indicating checksum in descriptor, enables RSS hash */
3251 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3252 rxcsum |= IXGBE_RXCSUM_PCSD;
3253 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3255 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3256 if (adapter->ring_feature[RING_F_RSS].mask)
3257 mrqc = IXGBE_MRQC_RSSEN;
3259 u8 tcs = netdev_get_num_tc(adapter->netdev);
3261 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3263 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3265 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3266 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3267 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3269 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3272 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3274 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3276 mrqc = IXGBE_MRQC_RSSEN;
3280 /* Perform hash on these packet types */
3281 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3282 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3283 IXGBE_MRQC_RSS_FIELD_IPV6 |
3284 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3286 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3287 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3288 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3289 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3291 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3292 ixgbe_setup_reta(adapter, rss_key);
3294 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3298 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3299 * @adapter: address of board private structure
3300 * @index: index of ring to set
3302 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3303 struct ixgbe_ring *ring)
3305 struct ixgbe_hw *hw = &adapter->hw;
3307 u8 reg_idx = ring->reg_idx;
3309 if (!ring_is_rsc_enabled(ring))
3312 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3313 rscctrl |= IXGBE_RSCCTL_RSCEN;
3315 * we must limit the number of descriptors so that the
3316 * total size of max desc * buf_len is not greater
3319 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3320 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3323 #define IXGBE_MAX_RX_DESC_POLL 10
3324 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3325 struct ixgbe_ring *ring)
3327 struct ixgbe_hw *hw = &adapter->hw;
3328 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3330 u8 reg_idx = ring->reg_idx;
3332 if (ixgbe_removed(hw->hw_addr))
3334 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3335 if (hw->mac.type == ixgbe_mac_82598EB &&
3336 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3340 usleep_range(1000, 2000);
3341 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3342 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3345 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3346 "the polling period\n", reg_idx);
3350 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3351 struct ixgbe_ring *ring)
3353 struct ixgbe_hw *hw = &adapter->hw;
3354 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3356 u8 reg_idx = ring->reg_idx;
3358 if (ixgbe_removed(hw->hw_addr))
3360 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3361 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3363 /* write value back with RXDCTL.ENABLE bit cleared */
3364 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3366 if (hw->mac.type == ixgbe_mac_82598EB &&
3367 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3370 /* the hardware may take up to 100us to really disable the rx queue */
3373 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3374 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3377 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3378 "the polling period\n", reg_idx);
3382 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3383 struct ixgbe_ring *ring)
3385 struct ixgbe_hw *hw = &adapter->hw;
3386 u64 rdba = ring->dma;
3388 u8 reg_idx = ring->reg_idx;
3390 /* disable queue to avoid issues while updating state */
3391 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3392 ixgbe_disable_rx_queue(adapter, ring);
3394 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3395 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3396 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3397 ring->count * sizeof(union ixgbe_adv_rx_desc));
3398 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3399 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3400 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3402 ixgbe_configure_srrctl(adapter, ring);
3403 ixgbe_configure_rscctl(adapter, ring);
3405 if (hw->mac.type == ixgbe_mac_82598EB) {
3407 * enable cache line friendly hardware writes:
3408 * PTHRESH=32 descriptors (half the internal cache),
3409 * this also removes ugly rx_no_buffer_count increment
3410 * HTHRESH=4 descriptors (to minimize latency on fetch)
3411 * WTHRESH=8 burst writeback up to two cache lines
3413 rxdctl &= ~0x3FFFFF;
3417 /* enable receive descriptor ring */
3418 rxdctl |= IXGBE_RXDCTL_ENABLE;
3419 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3421 ixgbe_rx_desc_queue_enable(adapter, ring);
3422 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3425 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3427 struct ixgbe_hw *hw = &adapter->hw;
3428 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3431 /* PSRTYPE must be initialized in non 82598 adapters */
3432 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3433 IXGBE_PSRTYPE_UDPHDR |
3434 IXGBE_PSRTYPE_IPV4HDR |
3435 IXGBE_PSRTYPE_L2HDR |
3436 IXGBE_PSRTYPE_IPV6HDR;
3438 if (hw->mac.type == ixgbe_mac_82598EB)
3446 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3447 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3450 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3452 struct ixgbe_hw *hw = &adapter->hw;
3453 u32 reg_offset, vf_shift;
3454 u32 gcr_ext, vmdctl;
3457 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3460 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3461 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3462 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3463 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3464 vmdctl |= IXGBE_VT_CTL_REPLEN;
3465 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3467 vf_shift = VMDQ_P(0) % 32;
3468 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3470 /* Enable only the PF's pool for Tx/Rx */
3471 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3472 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3473 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3474 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3475 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
3476 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3478 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3479 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3482 * Set up VF register offsets for selected VT Mode,
3483 * i.e. 32 or 64 VFs for SR-IOV
3485 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3486 case IXGBE_82599_VMDQ_8Q_MASK:
3487 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3489 case IXGBE_82599_VMDQ_4Q_MASK:
3490 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3493 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3497 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3500 /* Enable MAC Anti-Spoofing */
3501 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3503 /* For VFs that have spoof checking turned off */
3504 for (i = 0; i < adapter->num_vfs; i++) {
3505 if (!adapter->vfinfo[i].spoofchk_enabled)
3506 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3510 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3512 struct ixgbe_hw *hw = &adapter->hw;
3513 struct net_device *netdev = adapter->netdev;
3514 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3515 struct ixgbe_ring *rx_ring;
3520 /* adjust max frame to be able to do baby jumbo for FCoE */
3521 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3522 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3523 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3525 #endif /* IXGBE_FCOE */
3527 /* adjust max frame to be at least the size of a standard frame */
3528 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3529 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3531 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3532 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3533 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3534 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3536 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3539 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3540 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3541 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3542 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3545 * Setup the HW Rx Head and Tail Descriptor Pointers and
3546 * the Base and Length of the Rx Descriptor Ring
3548 for (i = 0; i < adapter->num_rx_queues; i++) {
3549 rx_ring = adapter->rx_ring[i];
3550 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3551 set_ring_rsc_enabled(rx_ring);
3553 clear_ring_rsc_enabled(rx_ring);
3557 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3559 struct ixgbe_hw *hw = &adapter->hw;
3560 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3562 switch (hw->mac.type) {
3563 case ixgbe_mac_X550:
3564 case ixgbe_mac_X550EM_x:
3565 case ixgbe_mac_82598EB:
3567 * For VMDq support of different descriptor types or
3568 * buffer sizes through the use of multiple SRRCTL
3569 * registers, RDRXCTL.MVMEN must be set to 1
3571 * also, the manual doesn't mention it clearly but DCA hints
3572 * will only use queue 0's tags unless this bit is set. Side
3573 * effects of setting this bit are only that SRRCTL must be
3574 * fully programmed [0..15]
3576 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3578 case ixgbe_mac_82599EB:
3579 case ixgbe_mac_X540:
3580 /* Disable RSC for ACK packets */
3581 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3582 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3583 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3584 /* hardware requires some bits to be set by default */
3585 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3586 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3589 /* We should do nothing since we don't know this hardware */
3593 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3597 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3598 * @adapter: board private structure
3600 * Configure the Rx unit of the MAC after a reset.
3602 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3604 struct ixgbe_hw *hw = &adapter->hw;
3608 /* disable receives while setting up the descriptors */
3609 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3610 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3612 ixgbe_setup_psrtype(adapter);
3613 ixgbe_setup_rdrxctl(adapter);
3616 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3617 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3618 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3619 rfctl |= IXGBE_RFCTL_RSC_DIS;
3620 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3622 /* Program registers for the distribution of queues */
3623 ixgbe_setup_mrqc(adapter);
3625 /* set_rx_buffer_len must be called before ring initialization */
3626 ixgbe_set_rx_buffer_len(adapter);
3629 * Setup the HW Rx Head and Tail Descriptor Pointers and
3630 * the Base and Length of the Rx Descriptor Ring
3632 for (i = 0; i < adapter->num_rx_queues; i++)
3633 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3635 /* disable drop enable for 82598 parts */
3636 if (hw->mac.type == ixgbe_mac_82598EB)
3637 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3639 /* enable all receives */
3640 rxctrl |= IXGBE_RXCTRL_RXEN;
3641 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3644 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3645 __be16 proto, u16 vid)
3647 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3648 struct ixgbe_hw *hw = &adapter->hw;
3650 /* add VID to filter table */
3651 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3652 set_bit(vid, adapter->active_vlans);
3657 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3658 __be16 proto, u16 vid)
3660 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3661 struct ixgbe_hw *hw = &adapter->hw;
3663 /* remove VID from filter table */
3664 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3665 clear_bit(vid, adapter->active_vlans);
3671 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3672 * @adapter: driver data
3674 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3676 struct ixgbe_hw *hw = &adapter->hw;
3680 switch (hw->mac.type) {
3681 case ixgbe_mac_82598EB:
3682 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3683 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3684 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3686 case ixgbe_mac_82599EB:
3687 case ixgbe_mac_X540:
3688 case ixgbe_mac_X550:
3689 case ixgbe_mac_X550EM_x:
3690 for (i = 0; i < adapter->num_rx_queues; i++) {
3691 struct ixgbe_ring *ring = adapter->rx_ring[i];
3693 if (ring->l2_accel_priv)
3696 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3697 vlnctrl &= ~IXGBE_RXDCTL_VME;
3698 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3707 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3708 * @adapter: driver data
3710 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3712 struct ixgbe_hw *hw = &adapter->hw;
3716 switch (hw->mac.type) {
3717 case ixgbe_mac_82598EB:
3718 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3719 vlnctrl |= IXGBE_VLNCTRL_VME;
3720 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3722 case ixgbe_mac_82599EB:
3723 case ixgbe_mac_X540:
3724 case ixgbe_mac_X550:
3725 case ixgbe_mac_X550EM_x:
3726 for (i = 0; i < adapter->num_rx_queues; i++) {
3727 struct ixgbe_ring *ring = adapter->rx_ring[i];
3729 if (ring->l2_accel_priv)
3732 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3733 vlnctrl |= IXGBE_RXDCTL_VME;
3734 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3742 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3746 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3748 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3749 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3753 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3754 * @netdev: network interface device structure
3756 * Writes multicast address list to the MTA hash table.
3757 * Returns: -ENOMEM on failure
3758 * 0 on no addresses written
3759 * X on writing X addresses to MTA
3761 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
3763 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3764 struct ixgbe_hw *hw = &adapter->hw;
3766 if (!netif_running(netdev))
3769 if (hw->mac.ops.update_mc_addr_list)
3770 hw->mac.ops.update_mc_addr_list(hw, netdev);
3774 #ifdef CONFIG_PCI_IOV
3775 ixgbe_restore_vf_multicasts(adapter);
3778 return netdev_mc_count(netdev);
3781 #ifdef CONFIG_PCI_IOV
3782 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
3784 struct ixgbe_hw *hw = &adapter->hw;
3786 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3787 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3788 hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
3789 adapter->mac_table[i].queue,
3792 hw->mac.ops.clear_rar(hw, i);
3794 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
3799 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
3801 struct ixgbe_hw *hw = &adapter->hw;
3803 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3804 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
3805 if (adapter->mac_table[i].state &
3806 IXGBE_MAC_STATE_IN_USE)
3807 hw->mac.ops.set_rar(hw, i,
3808 adapter->mac_table[i].addr,
3809 adapter->mac_table[i].queue,
3812 hw->mac.ops.clear_rar(hw, i);
3814 adapter->mac_table[i].state &=
3815 ~(IXGBE_MAC_STATE_MODIFIED);
3820 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
3823 struct ixgbe_hw *hw = &adapter->hw;
3825 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3826 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3827 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3828 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3829 adapter->mac_table[i].queue = 0;
3831 ixgbe_sync_mac_table(adapter);
3834 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
3836 struct ixgbe_hw *hw = &adapter->hw;
3839 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3840 if (adapter->mac_table[i].state == 0)
3846 /* this function destroys the first RAR entry */
3847 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
3850 struct ixgbe_hw *hw = &adapter->hw;
3852 memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
3853 adapter->mac_table[0].queue = VMDQ_P(0);
3854 adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
3855 IXGBE_MAC_STATE_IN_USE);
3856 hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
3857 adapter->mac_table[0].queue,
3861 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3863 struct ixgbe_hw *hw = &adapter->hw;
3866 if (is_zero_ether_addr(addr))
3869 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3870 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
3872 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
3873 IXGBE_MAC_STATE_IN_USE);
3874 ether_addr_copy(adapter->mac_table[i].addr, addr);
3875 adapter->mac_table[i].queue = queue;
3876 ixgbe_sync_mac_table(adapter);
3882 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
3884 /* search table for addr, if found, set to 0 and sync */
3886 struct ixgbe_hw *hw = &adapter->hw;
3888 if (is_zero_ether_addr(addr))
3891 for (i = 0; i < hw->mac.num_rar_entries; i++) {
3892 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
3893 adapter->mac_table[i].queue == queue) {
3894 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
3895 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
3896 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
3897 adapter->mac_table[i].queue = 0;
3898 ixgbe_sync_mac_table(adapter);
3905 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3906 * @netdev: network interface device structure
3908 * Writes unicast address list to the RAR table.
3909 * Returns: -ENOMEM on failure/insufficient address space
3910 * 0 on no addresses written
3911 * X on writing X addresses to the RAR table
3913 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
3915 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3918 /* return ENOMEM indicating insufficient memory for addresses */
3919 if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
3922 if (!netdev_uc_empty(netdev)) {
3923 struct netdev_hw_addr *ha;
3924 netdev_for_each_uc_addr(ha, netdev) {
3925 ixgbe_del_mac_filter(adapter, ha->addr, vfn);
3926 ixgbe_add_mac_filter(adapter, ha->addr, vfn);
3934 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3935 * @netdev: network interface device structure
3937 * The set_rx_method entry point is called whenever the unicast/multicast
3938 * address list or the network interface flags are updated. This routine is
3939 * responsible for configuring the hardware for proper unicast, multicast and
3942 void ixgbe_set_rx_mode(struct net_device *netdev)
3944 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3945 struct ixgbe_hw *hw = &adapter->hw;
3946 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3950 /* Check for Promiscuous and All Multicast modes */
3951 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3952 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3954 /* set all bits that we expect to always be set */
3955 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3956 fctrl |= IXGBE_FCTRL_BAM;
3957 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3958 fctrl |= IXGBE_FCTRL_PMCF;
3960 /* clear the bits we are changing the status of */
3961 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3962 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3963 if (netdev->flags & IFF_PROMISC) {
3964 hw->addr_ctrl.user_set_promisc = true;
3965 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3966 vmolr |= IXGBE_VMOLR_MPE;
3967 /* Only disable hardware filter vlans in promiscuous mode
3968 * if SR-IOV and VMDQ are disabled - otherwise ensure
3969 * that hardware VLAN filters remain enabled.
3971 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
3972 IXGBE_FLAG_SRIOV_ENABLED))
3973 vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3975 if (netdev->flags & IFF_ALLMULTI) {
3976 fctrl |= IXGBE_FCTRL_MPE;
3977 vmolr |= IXGBE_VMOLR_MPE;
3979 vlnctrl |= IXGBE_VLNCTRL_VFE;
3980 hw->addr_ctrl.user_set_promisc = false;
3984 * Write addresses to available RAR registers, if there is not
3985 * sufficient space to store all the addresses then enable
3986 * unicast promiscuous mode
3988 count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
3990 fctrl |= IXGBE_FCTRL_UPE;
3991 vmolr |= IXGBE_VMOLR_ROPE;
3994 /* Write addresses to the MTA, if the attempt fails
3995 * then we should just turn on promiscuous mode so
3996 * that we can at least receive multicast traffic
3998 count = ixgbe_write_mc_addr_list(netdev);
4000 fctrl |= IXGBE_FCTRL_MPE;
4001 vmolr |= IXGBE_VMOLR_MPE;
4003 vmolr |= IXGBE_VMOLR_ROMPE;
4006 if (hw->mac.type != ixgbe_mac_82598EB) {
4007 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4008 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4010 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4013 /* This is useful for sniffing bad packets. */
4014 if (adapter->netdev->features & NETIF_F_RXALL) {
4015 /* UPE and MPE will be handled by normal PROMISC logic
4016 * in e1000e_set_rx_mode */
4017 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4018 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4019 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4021 fctrl &= ~(IXGBE_FCTRL_DPF);
4022 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4025 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4026 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4028 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4029 ixgbe_vlan_strip_enable(adapter);
4031 ixgbe_vlan_strip_disable(adapter);
4034 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4038 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4039 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4040 napi_enable(&adapter->q_vector[q_idx]->napi);
4044 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4048 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4049 napi_disable(&adapter->q_vector[q_idx]->napi);
4050 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4051 pr_info("QV %d locked\n", q_idx);
4052 usleep_range(1000, 20000);
4057 #ifdef CONFIG_IXGBE_DCB
4059 * ixgbe_configure_dcb - Configure DCB hardware
4060 * @adapter: ixgbe adapter struct
4062 * This is called by the driver on open to configure the DCB hardware.
4063 * This is also called by the gennetlink interface when reconfiguring
4066 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4068 struct ixgbe_hw *hw = &adapter->hw;
4069 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4071 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4072 if (hw->mac.type == ixgbe_mac_82598EB)
4073 netif_set_gso_max_size(adapter->netdev, 65536);
4077 if (hw->mac.type == ixgbe_mac_82598EB)
4078 netif_set_gso_max_size(adapter->netdev, 32768);
4081 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4082 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4085 /* reconfigure the hardware */
4086 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4087 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4089 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4091 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4092 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4093 ixgbe_dcb_hw_ets(&adapter->hw,
4094 adapter->ixgbe_ieee_ets,
4096 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4097 adapter->ixgbe_ieee_pfc->pfc_en,
4098 adapter->ixgbe_ieee_ets->prio_tc);
4101 /* Enable RSS Hash per TC */
4102 if (hw->mac.type != ixgbe_mac_82598EB) {
4104 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4111 /* write msb to all 8 TCs in one write */
4112 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4117 /* Additional bittime to account for IXGBE framing */
4118 #define IXGBE_ETH_FRAMING 20
4121 * ixgbe_hpbthresh - calculate high water mark for flow control
4123 * @adapter: board private structure to calculate for
4124 * @pb: packet buffer to calculate
4126 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4128 struct ixgbe_hw *hw = &adapter->hw;
4129 struct net_device *dev = adapter->netdev;
4130 int link, tc, kb, marker;
4133 /* Calculate max LAN frame size */
4134 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4137 /* FCoE traffic class uses FCOE jumbo frames */
4138 if ((dev->features & NETIF_F_FCOE_MTU) &&
4139 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4140 (pb == ixgbe_fcoe_get_tc(adapter)))
4141 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4144 /* Calculate delay value for device */
4145 switch (hw->mac.type) {
4146 case ixgbe_mac_X540:
4147 case ixgbe_mac_X550:
4148 case ixgbe_mac_X550EM_x:
4149 dv_id = IXGBE_DV_X540(link, tc);
4152 dv_id = IXGBE_DV(link, tc);
4156 /* Loopback switch introduces additional latency */
4157 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4158 dv_id += IXGBE_B2BT(tc);
4160 /* Delay value is calculated in bit times convert to KB */
4161 kb = IXGBE_BT2KB(dv_id);
4162 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4164 marker = rx_pba - kb;
4166 /* It is possible that the packet buffer is not large enough
4167 * to provide required headroom. In this case throw an error
4168 * to user and a do the best we can.
4171 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4172 "headroom to support flow control."
4173 "Decrease MTU or number of traffic classes\n", pb);
4181 * ixgbe_lpbthresh - calculate low water mark for for flow control
4183 * @adapter: board private structure to calculate for
4184 * @pb: packet buffer to calculate
4186 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4188 struct ixgbe_hw *hw = &adapter->hw;
4189 struct net_device *dev = adapter->netdev;
4193 /* Calculate max LAN frame size */
4194 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4197 /* FCoE traffic class uses FCOE jumbo frames */
4198 if ((dev->features & NETIF_F_FCOE_MTU) &&
4199 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4200 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4201 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4204 /* Calculate delay value for device */
4205 switch (hw->mac.type) {
4206 case ixgbe_mac_X540:
4207 case ixgbe_mac_X550:
4208 case ixgbe_mac_X550EM_x:
4209 dv_id = IXGBE_LOW_DV_X540(tc);
4212 dv_id = IXGBE_LOW_DV(tc);
4216 /* Delay value is calculated in bit times convert to KB */
4217 return IXGBE_BT2KB(dv_id);
4221 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4223 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4225 struct ixgbe_hw *hw = &adapter->hw;
4226 int num_tc = netdev_get_num_tc(adapter->netdev);
4232 for (i = 0; i < num_tc; i++) {
4233 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4234 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4236 /* Low water marks must not be larger than high water marks */
4237 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4238 hw->fc.low_water[i] = 0;
4241 for (; i < MAX_TRAFFIC_CLASS; i++)
4242 hw->fc.high_water[i] = 0;
4245 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4247 struct ixgbe_hw *hw = &adapter->hw;
4249 u8 tc = netdev_get_num_tc(adapter->netdev);
4251 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4252 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4253 hdrm = 32 << adapter->fdir_pballoc;
4257 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4258 ixgbe_pbthresh_setup(adapter);
4261 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4263 struct ixgbe_hw *hw = &adapter->hw;
4264 struct hlist_node *node2;
4265 struct ixgbe_fdir_filter *filter;
4267 spin_lock(&adapter->fdir_perfect_lock);
4269 if (!hlist_empty(&adapter->fdir_filter_list))
4270 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4272 hlist_for_each_entry_safe(filter, node2,
4273 &adapter->fdir_filter_list, fdir_node) {
4274 ixgbe_fdir_write_perfect_filter_82599(hw,
4277 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4278 IXGBE_FDIR_DROP_QUEUE :
4279 adapter->rx_ring[filter->action]->reg_idx);
4282 spin_unlock(&adapter->fdir_perfect_lock);
4285 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4286 struct ixgbe_adapter *adapter)
4288 struct ixgbe_hw *hw = &adapter->hw;
4291 /* No unicast promiscuous support for VMDQ devices. */
4292 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4293 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4295 /* clear the affected bit */
4296 vmolr &= ~IXGBE_VMOLR_MPE;
4298 if (dev->flags & IFF_ALLMULTI) {
4299 vmolr |= IXGBE_VMOLR_MPE;
4301 vmolr |= IXGBE_VMOLR_ROMPE;
4302 hw->mac.ops.update_mc_addr_list(hw, dev);
4304 ixgbe_write_uc_addr_list(adapter->netdev, pool);
4305 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4308 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4310 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4311 int rss_i = adapter->num_rx_queues_per_pool;
4312 struct ixgbe_hw *hw = &adapter->hw;
4313 u16 pool = vadapter->pool;
4314 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4315 IXGBE_PSRTYPE_UDPHDR |
4316 IXGBE_PSRTYPE_IPV4HDR |
4317 IXGBE_PSRTYPE_L2HDR |
4318 IXGBE_PSRTYPE_IPV6HDR;
4320 if (hw->mac.type == ixgbe_mac_82598EB)
4328 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4332 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4333 * @rx_ring: ring to free buffers from
4335 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4337 struct device *dev = rx_ring->dev;
4341 /* ring already cleared, nothing to do */
4342 if (!rx_ring->rx_buffer_info)
4345 /* Free all the Rx ring sk_buffs */
4346 for (i = 0; i < rx_ring->count; i++) {
4347 struct ixgbe_rx_buffer *rx_buffer;
4349 rx_buffer = &rx_ring->rx_buffer_info[i];
4350 if (rx_buffer->skb) {
4351 struct sk_buff *skb = rx_buffer->skb;
4352 if (IXGBE_CB(skb)->page_released) {
4355 ixgbe_rx_bufsz(rx_ring),
4357 IXGBE_CB(skb)->page_released = false;
4360 rx_buffer->skb = NULL;
4363 dma_unmap_page(dev, rx_buffer->dma,
4364 ixgbe_rx_pg_size(rx_ring),
4367 if (rx_buffer->page)
4368 __free_pages(rx_buffer->page,
4369 ixgbe_rx_pg_order(rx_ring));
4370 rx_buffer->page = NULL;
4373 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4374 memset(rx_ring->rx_buffer_info, 0, size);
4376 /* Zero out the descriptor ring */
4377 memset(rx_ring->desc, 0, rx_ring->size);
4379 rx_ring->next_to_alloc = 0;
4380 rx_ring->next_to_clean = 0;
4381 rx_ring->next_to_use = 0;
4384 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4385 struct ixgbe_ring *rx_ring)
4387 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4388 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4390 /* shutdown specific queue receive and wait for dma to settle */
4391 ixgbe_disable_rx_queue(adapter, rx_ring);
4392 usleep_range(10000, 20000);
4393 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4394 ixgbe_clean_rx_ring(rx_ring);
4395 rx_ring->l2_accel_priv = NULL;
4398 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4399 struct ixgbe_fwd_adapter *accel)
4401 struct ixgbe_adapter *adapter = accel->real_adapter;
4402 unsigned int rxbase = accel->rx_base_queue;
4403 unsigned int txbase = accel->tx_base_queue;
4406 netif_tx_stop_all_queues(vdev);
4408 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4409 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4410 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4413 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4414 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4415 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4422 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4423 struct ixgbe_fwd_adapter *accel)
4425 struct ixgbe_adapter *adapter = accel->real_adapter;
4426 unsigned int rxbase, txbase, queues;
4427 int i, baseq, err = 0;
4429 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4432 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4433 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4434 accel->pool, adapter->num_rx_pools,
4435 baseq, baseq + adapter->num_rx_queues_per_pool,
4436 adapter->fwd_bitmask);
4438 accel->netdev = vdev;
4439 accel->rx_base_queue = rxbase = baseq;
4440 accel->tx_base_queue = txbase = baseq;
4442 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4443 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4445 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4446 adapter->rx_ring[rxbase + i]->netdev = vdev;
4447 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4448 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4451 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4452 adapter->tx_ring[txbase + i]->netdev = vdev;
4453 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4456 queues = min_t(unsigned int,
4457 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4458 err = netif_set_real_num_tx_queues(vdev, queues);
4462 err = netif_set_real_num_rx_queues(vdev, queues);
4466 if (is_valid_ether_addr(vdev->dev_addr))
4467 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4469 ixgbe_fwd_psrtype(accel);
4470 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4473 ixgbe_fwd_ring_down(vdev, accel);
4477 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4479 struct net_device *upper;
4480 struct list_head *iter;
4483 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4484 if (netif_is_macvlan(upper)) {
4485 struct macvlan_dev *dfwd = netdev_priv(upper);
4486 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4488 if (dfwd->fwd_priv) {
4489 err = ixgbe_fwd_ring_up(upper, vadapter);
4497 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4499 struct ixgbe_hw *hw = &adapter->hw;
4501 ixgbe_configure_pb(adapter);
4502 #ifdef CONFIG_IXGBE_DCB
4503 ixgbe_configure_dcb(adapter);
4506 * We must restore virtualization before VLANs or else
4507 * the VLVF registers will not be populated
4509 ixgbe_configure_virtualization(adapter);
4511 ixgbe_set_rx_mode(adapter->netdev);
4512 ixgbe_restore_vlan(adapter);
4514 switch (hw->mac.type) {
4515 case ixgbe_mac_82599EB:
4516 case ixgbe_mac_X540:
4517 hw->mac.ops.disable_rx_buff(hw);
4523 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4524 ixgbe_init_fdir_signature_82599(&adapter->hw,
4525 adapter->fdir_pballoc);
4526 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4527 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4528 adapter->fdir_pballoc);
4529 ixgbe_fdir_filter_restore(adapter);
4532 switch (hw->mac.type) {
4533 case ixgbe_mac_82599EB:
4534 case ixgbe_mac_X540:
4535 hw->mac.ops.enable_rx_buff(hw);
4542 /* configure FCoE L2 filters, redirection table, and Rx control */
4543 ixgbe_configure_fcoe(adapter);
4545 #endif /* IXGBE_FCOE */
4546 ixgbe_configure_tx(adapter);
4547 ixgbe_configure_rx(adapter);
4548 ixgbe_configure_dfwd(adapter);
4551 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
4553 switch (hw->phy.type) {
4554 case ixgbe_phy_sfp_avago:
4555 case ixgbe_phy_sfp_ftl:
4556 case ixgbe_phy_sfp_intel:
4557 case ixgbe_phy_sfp_unknown:
4558 case ixgbe_phy_sfp_passive_tyco:
4559 case ixgbe_phy_sfp_passive_unknown:
4560 case ixgbe_phy_sfp_active_unknown:
4561 case ixgbe_phy_sfp_ftl_active:
4562 case ixgbe_phy_qsfp_passive_unknown:
4563 case ixgbe_phy_qsfp_active_unknown:
4564 case ixgbe_phy_qsfp_intel:
4565 case ixgbe_phy_qsfp_unknown:
4566 /* ixgbe_phy_none is set when no SFP module is present */
4567 case ixgbe_phy_none:
4570 if (hw->mac.type == ixgbe_mac_82598EB)
4578 * ixgbe_sfp_link_config - set up SFP+ link
4579 * @adapter: pointer to private adapter struct
4581 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4584 * We are assuming the worst case scenario here, and that
4585 * is that an SFP was inserted/removed after the reset
4586 * but before SFP detection was enabled. As such the best
4587 * solution is to just start searching as soon as we start
4589 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4590 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4592 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4596 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4597 * @hw: pointer to private hardware struct
4599 * Returns 0 on success, negative on failure
4601 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4604 bool autoneg, link_up = false;
4605 u32 ret = IXGBE_ERR_LINK_SETUP;
4607 if (hw->mac.ops.check_link)
4608 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4613 speed = hw->phy.autoneg_advertised;
4614 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4615 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4620 if (hw->mac.ops.setup_link)
4621 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4626 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4628 struct ixgbe_hw *hw = &adapter->hw;
4631 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4632 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4634 gpie |= IXGBE_GPIE_EIAME;
4636 * use EIAM to auto-mask when MSI-X interrupt is asserted
4637 * this saves a register write for every interrupt
4639 switch (hw->mac.type) {
4640 case ixgbe_mac_82598EB:
4641 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4643 case ixgbe_mac_82599EB:
4644 case ixgbe_mac_X540:
4645 case ixgbe_mac_X550:
4646 case ixgbe_mac_X550EM_x:
4648 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4649 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4653 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4654 * specifically only auto mask tx and rx interrupts */
4655 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4658 /* XXX: to interrupt immediately for EICS writes, enable this */
4659 /* gpie |= IXGBE_GPIE_EIMEN; */
4661 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4662 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4664 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4665 case IXGBE_82599_VMDQ_8Q_MASK:
4666 gpie |= IXGBE_GPIE_VTMODE_16;
4668 case IXGBE_82599_VMDQ_4Q_MASK:
4669 gpie |= IXGBE_GPIE_VTMODE_32;
4672 gpie |= IXGBE_GPIE_VTMODE_64;
4677 /* Enable Thermal over heat sensor interrupt */
4678 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4679 switch (adapter->hw.mac.type) {
4680 case ixgbe_mac_82599EB:
4681 gpie |= IXGBE_SDP0_GPIEN;
4683 case ixgbe_mac_X540:
4684 gpie |= IXGBE_EIMS_TS;
4691 /* Enable fan failure interrupt */
4692 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4693 gpie |= IXGBE_SDP1_GPIEN;
4695 if (hw->mac.type == ixgbe_mac_82599EB) {
4696 gpie |= IXGBE_SDP1_GPIEN;
4697 gpie |= IXGBE_SDP2_GPIEN;
4700 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4703 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4705 struct ixgbe_hw *hw = &adapter->hw;
4709 ixgbe_get_hw_control(adapter);
4710 ixgbe_setup_gpie(adapter);
4712 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4713 ixgbe_configure_msix(adapter);
4715 ixgbe_configure_msi_and_legacy(adapter);
4717 /* enable the optics for 82599 SFP+ fiber */
4718 if (hw->mac.ops.enable_tx_laser)
4719 hw->mac.ops.enable_tx_laser(hw);
4721 smp_mb__before_atomic();
4722 clear_bit(__IXGBE_DOWN, &adapter->state);
4723 ixgbe_napi_enable_all(adapter);
4725 if (ixgbe_is_sfp(hw)) {
4726 ixgbe_sfp_link_config(adapter);
4728 err = ixgbe_non_sfp_link_config(hw);
4730 e_err(probe, "link_config FAILED %d\n", err);
4733 /* clear any pending interrupts, may auto mask */
4734 IXGBE_READ_REG(hw, IXGBE_EICR);
4735 ixgbe_irq_enable(adapter, true, true);
4738 * If this adapter has a fan, check to see if we had a failure
4739 * before we enabled the interrupt.
4741 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4742 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4743 if (esdp & IXGBE_ESDP_SDP1)
4744 e_crit(drv, "Fan has stopped, replace the adapter\n");
4747 /* bring the link up in the watchdog, this could race with our first
4748 * link up interrupt but shouldn't be a problem */
4749 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4750 adapter->link_check_timeout = jiffies;
4751 mod_timer(&adapter->service_timer, jiffies);
4753 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4754 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4755 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4756 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4759 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4761 WARN_ON(in_interrupt());
4762 /* put off any impending NetWatchDogTimeout */
4763 adapter->netdev->trans_start = jiffies;
4765 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4766 usleep_range(1000, 2000);
4767 ixgbe_down(adapter);
4769 * If SR-IOV enabled then wait a bit before bringing the adapter
4770 * back up to give the VFs time to respond to the reset. The
4771 * two second wait is based upon the watchdog timer cycle in
4774 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4777 clear_bit(__IXGBE_RESETTING, &adapter->state);
4780 void ixgbe_up(struct ixgbe_adapter *adapter)
4782 /* hardware has been reset, we need to reload some things */
4783 ixgbe_configure(adapter);
4785 ixgbe_up_complete(adapter);
4788 void ixgbe_reset(struct ixgbe_adapter *adapter)
4790 struct ixgbe_hw *hw = &adapter->hw;
4791 struct net_device *netdev = adapter->netdev;
4793 u8 old_addr[ETH_ALEN];
4795 if (ixgbe_removed(hw->hw_addr))
4797 /* lock SFP init bit to prevent race conditions with the watchdog */
4798 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4799 usleep_range(1000, 2000);
4801 /* clear all SFP and link config related flags while holding SFP_INIT */
4802 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4803 IXGBE_FLAG2_SFP_NEEDS_RESET);
4804 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4806 err = hw->mac.ops.init_hw(hw);
4809 case IXGBE_ERR_SFP_NOT_PRESENT:
4810 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4812 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4813 e_dev_err("master disable timed out\n");
4815 case IXGBE_ERR_EEPROM_VERSION:
4816 /* We are running on a pre-production device, log a warning */
4817 e_dev_warn("This device is a pre-production adapter/LOM. "
4818 "Please be aware there may be issues associated with "
4819 "your hardware. If you are experiencing problems "
4820 "please contact your Intel or hardware "
4821 "representative who provided you with this "
4825 e_dev_err("Hardware Error: %d\n", err);
4828 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4829 /* do not flush user set addresses */
4830 memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
4831 ixgbe_flush_sw_mac_table(adapter);
4832 ixgbe_mac_set_default_filter(adapter, old_addr);
4834 /* update SAN MAC vmdq pool selection */
4835 if (hw->mac.san_mac_rar_index)
4836 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4838 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
4839 ixgbe_ptp_reset(adapter);
4843 * ixgbe_clean_tx_ring - Free Tx Buffers
4844 * @tx_ring: ring to be cleaned
4846 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4848 struct ixgbe_tx_buffer *tx_buffer_info;
4852 /* ring already cleared, nothing to do */
4853 if (!tx_ring->tx_buffer_info)
4856 /* Free all the Tx ring sk_buffs */
4857 for (i = 0; i < tx_ring->count; i++) {
4858 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4859 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4862 netdev_tx_reset_queue(txring_txq(tx_ring));
4864 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4865 memset(tx_ring->tx_buffer_info, 0, size);
4867 /* Zero out the descriptor ring */
4868 memset(tx_ring->desc, 0, tx_ring->size);
4870 tx_ring->next_to_use = 0;
4871 tx_ring->next_to_clean = 0;
4875 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4876 * @adapter: board private structure
4878 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4882 for (i = 0; i < adapter->num_rx_queues; i++)
4883 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4887 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4888 * @adapter: board private structure
4890 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4894 for (i = 0; i < adapter->num_tx_queues; i++)
4895 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4898 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4900 struct hlist_node *node2;
4901 struct ixgbe_fdir_filter *filter;
4903 spin_lock(&adapter->fdir_perfect_lock);
4905 hlist_for_each_entry_safe(filter, node2,
4906 &adapter->fdir_filter_list, fdir_node) {
4907 hlist_del(&filter->fdir_node);
4910 adapter->fdir_filter_count = 0;
4912 spin_unlock(&adapter->fdir_perfect_lock);
4915 void ixgbe_down(struct ixgbe_adapter *adapter)
4917 struct net_device *netdev = adapter->netdev;
4918 struct ixgbe_hw *hw = &adapter->hw;
4919 struct net_device *upper;
4920 struct list_head *iter;
4924 /* signal that we are down to the interrupt handler */
4925 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
4926 return; /* do nothing if already down */
4928 /* disable receives */
4929 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4930 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4932 /* disable all enabled rx queues */
4933 for (i = 0; i < adapter->num_rx_queues; i++)
4934 /* this call also flushes the previous write */
4935 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4937 usleep_range(10000, 20000);
4939 netif_tx_stop_all_queues(netdev);
4941 /* call carrier off first to avoid false dev_watchdog timeouts */
4942 netif_carrier_off(netdev);
4943 netif_tx_disable(netdev);
4945 /* disable any upper devices */
4946 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4947 if (netif_is_macvlan(upper)) {
4948 struct macvlan_dev *vlan = netdev_priv(upper);
4950 if (vlan->fwd_priv) {
4951 netif_tx_stop_all_queues(upper);
4952 netif_carrier_off(upper);
4953 netif_tx_disable(upper);
4958 ixgbe_irq_disable(adapter);
4960 ixgbe_napi_disable_all(adapter);
4962 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4963 IXGBE_FLAG2_RESET_REQUESTED);
4964 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4966 del_timer_sync(&adapter->service_timer);
4968 if (adapter->num_vfs) {
4969 /* Clear EITR Select mapping */
4970 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4972 /* Mark all the VFs as inactive */
4973 for (i = 0 ; i < adapter->num_vfs; i++)
4974 adapter->vfinfo[i].clear_to_send = false;
4976 /* ping all the active vfs to let them know we are going down */
4977 ixgbe_ping_all_vfs(adapter);
4979 /* Disable all VFTE/VFRE TX/RX */
4980 ixgbe_disable_tx_rx(adapter);
4983 /* disable transmits in the hardware now that interrupts are off */
4984 for (i = 0; i < adapter->num_tx_queues; i++) {
4985 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4986 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4989 /* Disable the Tx DMA engine on 82599 and later MAC */
4990 switch (hw->mac.type) {
4991 case ixgbe_mac_82599EB:
4992 case ixgbe_mac_X540:
4993 case ixgbe_mac_X550:
4994 case ixgbe_mac_X550EM_x:
4995 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4996 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4997 ~IXGBE_DMATXCTL_TE));
5003 if (!pci_channel_offline(adapter->pdev))
5004 ixgbe_reset(adapter);
5006 /* power down the optics for 82599 SFP+ fiber */
5007 if (hw->mac.ops.disable_tx_laser)
5008 hw->mac.ops.disable_tx_laser(hw);
5010 ixgbe_clean_all_tx_rings(adapter);
5011 ixgbe_clean_all_rx_rings(adapter);
5013 #ifdef CONFIG_IXGBE_DCA
5014 /* since we reset the hardware DCA settings were cleared */
5015 ixgbe_setup_dca(adapter);
5020 * ixgbe_tx_timeout - Respond to a Tx Hang
5021 * @netdev: network interface device structure
5023 static void ixgbe_tx_timeout(struct net_device *netdev)
5025 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5027 /* Do the reset outside of interrupt context */
5028 ixgbe_tx_timeout_reset(adapter);
5032 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5033 * @adapter: board private structure to initialize
5035 * ixgbe_sw_init initializes the Adapter private data structure.
5036 * Fields are initialized based on PCI device information and
5037 * OS network device settings (MTU size).
5039 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5041 struct ixgbe_hw *hw = &adapter->hw;
5042 struct pci_dev *pdev = adapter->pdev;
5043 unsigned int rss, fdir;
5045 #ifdef CONFIG_IXGBE_DCB
5047 struct tc_configuration *tc;
5050 /* PCI config space info */
5052 hw->vendor_id = pdev->vendor;
5053 hw->device_id = pdev->device;
5054 hw->revision_id = pdev->revision;
5055 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5056 hw->subsystem_device_id = pdev->subsystem_device;
5058 /* Set common capability flags and settings */
5059 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
5060 adapter->ring_feature[RING_F_RSS].limit = rss;
5061 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5062 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5063 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5064 adapter->atr_sample_rate = 20;
5065 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5066 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5067 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5068 #ifdef CONFIG_IXGBE_DCA
5069 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5072 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5073 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5074 #ifdef CONFIG_IXGBE_DCB
5075 /* Default traffic class to use for FCoE */
5076 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5077 #endif /* CONFIG_IXGBE_DCB */
5078 #endif /* IXGBE_FCOE */
5080 adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5081 hw->mac.num_rar_entries,
5084 /* Set MAC specific capability flags and exceptions */
5085 switch (hw->mac.type) {
5086 case ixgbe_mac_82598EB:
5087 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5088 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5090 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5091 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5093 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5094 adapter->ring_feature[RING_F_FDIR].limit = 0;
5095 adapter->atr_sample_rate = 0;
5096 adapter->fdir_pballoc = 0;
5098 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5099 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5100 #ifdef CONFIG_IXGBE_DCB
5101 adapter->fcoe.up = 0;
5102 #endif /* IXGBE_DCB */
5103 #endif /* IXGBE_FCOE */
5105 case ixgbe_mac_82599EB:
5106 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5107 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5109 case ixgbe_mac_X540:
5110 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
5111 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5112 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5114 case ixgbe_mac_X550EM_x:
5115 case ixgbe_mac_X550:
5116 #ifdef CONFIG_IXGBE_DCA
5117 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5125 /* FCoE support exists, always init the FCoE lock */
5126 spin_lock_init(&adapter->fcoe.lock);
5129 /* n-tuple support exists, always init our spinlock */
5130 spin_lock_init(&adapter->fdir_perfect_lock);
5132 #ifdef CONFIG_IXGBE_DCB
5133 switch (hw->mac.type) {
5134 case ixgbe_mac_X540:
5135 case ixgbe_mac_X550:
5136 case ixgbe_mac_X550EM_x:
5137 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5138 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5141 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5142 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5146 /* Configure DCB traffic classes */
5147 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5148 tc = &adapter->dcb_cfg.tc_config[j];
5149 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5150 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5151 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5152 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5153 tc->dcb_pfc = pfc_disabled;
5156 /* Initialize default user to priority mapping, UPx->TC0 */
5157 tc = &adapter->dcb_cfg.tc_config[0];
5158 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5159 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5161 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5162 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5163 adapter->dcb_cfg.pfc_mode_enable = false;
5164 adapter->dcb_set_bitmap = 0x00;
5165 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5166 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5167 sizeof(adapter->temp_dcb_cfg));
5171 /* default flow control settings */
5172 hw->fc.requested_mode = ixgbe_fc_full;
5173 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5174 ixgbe_pbthresh_setup(adapter);
5175 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5176 hw->fc.send_xon = true;
5177 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5179 #ifdef CONFIG_PCI_IOV
5181 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5183 /* assign number of SR-IOV VFs */
5184 if (hw->mac.type != ixgbe_mac_82598EB) {
5185 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5186 adapter->num_vfs = 0;
5187 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5189 adapter->num_vfs = max_vfs;
5192 #endif /* CONFIG_PCI_IOV */
5194 /* enable itr by default in dynamic mode */
5195 adapter->rx_itr_setting = 1;
5196 adapter->tx_itr_setting = 1;
5198 /* set default ring sizes */
5199 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5200 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5202 /* set default work limits */
5203 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5205 /* initialize eeprom parameters */
5206 if (ixgbe_init_eeprom_params_generic(hw)) {
5207 e_dev_err("EEPROM initialization failed\n");
5211 /* PF holds first pool slot */
5212 set_bit(0, &adapter->fwd_bitmask);
5213 set_bit(__IXGBE_DOWN, &adapter->state);
5219 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5220 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5222 * Return 0 on success, negative on failure
5224 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5226 struct device *dev = tx_ring->dev;
5227 int orig_node = dev_to_node(dev);
5231 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5233 if (tx_ring->q_vector)
5234 ring_node = tx_ring->q_vector->numa_node;
5236 tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5237 if (!tx_ring->tx_buffer_info)
5238 tx_ring->tx_buffer_info = vzalloc(size);
5239 if (!tx_ring->tx_buffer_info)
5242 u64_stats_init(&tx_ring->syncp);
5244 /* round up to nearest 4K */
5245 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5246 tx_ring->size = ALIGN(tx_ring->size, 4096);
5248 set_dev_node(dev, ring_node);
5249 tx_ring->desc = dma_alloc_coherent(dev,
5253 set_dev_node(dev, orig_node);
5255 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5256 &tx_ring->dma, GFP_KERNEL);
5260 tx_ring->next_to_use = 0;
5261 tx_ring->next_to_clean = 0;
5265 vfree(tx_ring->tx_buffer_info);
5266 tx_ring->tx_buffer_info = NULL;
5267 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5272 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5273 * @adapter: board private structure
5275 * If this function returns with an error, then it's possible one or
5276 * more of the rings is populated (while the rest are not). It is the
5277 * callers duty to clean those orphaned rings.
5279 * Return 0 on success, negative on failure
5281 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5285 for (i = 0; i < adapter->num_tx_queues; i++) {
5286 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5290 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5296 /* rewind the index freeing the rings as we go */
5298 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5303 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5304 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5306 * Returns 0 on success, negative on failure
5308 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5310 struct device *dev = rx_ring->dev;
5311 int orig_node = dev_to_node(dev);
5315 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5317 if (rx_ring->q_vector)
5318 ring_node = rx_ring->q_vector->numa_node;
5320 rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5321 if (!rx_ring->rx_buffer_info)
5322 rx_ring->rx_buffer_info = vzalloc(size);
5323 if (!rx_ring->rx_buffer_info)
5326 u64_stats_init(&rx_ring->syncp);
5328 /* Round up to nearest 4K */
5329 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5330 rx_ring->size = ALIGN(rx_ring->size, 4096);
5332 set_dev_node(dev, ring_node);
5333 rx_ring->desc = dma_alloc_coherent(dev,
5337 set_dev_node(dev, orig_node);
5339 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5340 &rx_ring->dma, GFP_KERNEL);
5344 rx_ring->next_to_clean = 0;
5345 rx_ring->next_to_use = 0;
5349 vfree(rx_ring->rx_buffer_info);
5350 rx_ring->rx_buffer_info = NULL;
5351 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5356 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5357 * @adapter: board private structure
5359 * If this function returns with an error, then it's possible one or
5360 * more of the rings is populated (while the rest are not). It is the
5361 * callers duty to clean those orphaned rings.
5363 * Return 0 on success, negative on failure
5365 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5369 for (i = 0; i < adapter->num_rx_queues; i++) {
5370 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5374 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5379 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5384 /* rewind the index freeing the rings as we go */
5386 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5391 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5392 * @tx_ring: Tx descriptor ring for a specific queue
5394 * Free all transmit software resources
5396 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5398 ixgbe_clean_tx_ring(tx_ring);
5400 vfree(tx_ring->tx_buffer_info);
5401 tx_ring->tx_buffer_info = NULL;
5403 /* if not set, then don't free */
5407 dma_free_coherent(tx_ring->dev, tx_ring->size,
5408 tx_ring->desc, tx_ring->dma);
5410 tx_ring->desc = NULL;
5414 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5415 * @adapter: board private structure
5417 * Free all transmit software resources
5419 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5423 for (i = 0; i < adapter->num_tx_queues; i++)
5424 if (adapter->tx_ring[i]->desc)
5425 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5429 * ixgbe_free_rx_resources - Free Rx Resources
5430 * @rx_ring: ring to clean the resources from
5432 * Free all receive software resources
5434 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5436 ixgbe_clean_rx_ring(rx_ring);
5438 vfree(rx_ring->rx_buffer_info);
5439 rx_ring->rx_buffer_info = NULL;
5441 /* if not set, then don't free */
5445 dma_free_coherent(rx_ring->dev, rx_ring->size,
5446 rx_ring->desc, rx_ring->dma);
5448 rx_ring->desc = NULL;
5452 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5453 * @adapter: board private structure
5455 * Free all receive software resources
5457 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5462 ixgbe_free_fcoe_ddp_resources(adapter);
5465 for (i = 0; i < adapter->num_rx_queues; i++)
5466 if (adapter->rx_ring[i]->desc)
5467 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5471 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5472 * @netdev: network interface device structure
5473 * @new_mtu: new value for maximum frame size
5475 * Returns 0 on success, negative on failure
5477 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5479 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5480 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5482 /* MTU < 68 is an error and causes problems on some kernels */
5483 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5487 * For 82599EB we cannot allow legacy VFs to enable their receive
5488 * paths when MTU greater than 1500 is configured. So display a
5489 * warning that legacy VFs will be disabled.
5491 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5492 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5493 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5494 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5496 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5498 /* must set new MTU before calling down or up */
5499 netdev->mtu = new_mtu;
5501 if (netif_running(netdev))
5502 ixgbe_reinit_locked(adapter);
5508 * ixgbe_open - Called when a network interface is made active
5509 * @netdev: network interface device structure
5511 * Returns 0 on success, negative value on failure
5513 * The open entry point is called when a network interface is made
5514 * active by the system (IFF_UP). At this point all resources needed
5515 * for transmit and receive operations are allocated, the interrupt
5516 * handler is registered with the OS, the watchdog timer is started,
5517 * and the stack is notified that the interface is ready.
5519 static int ixgbe_open(struct net_device *netdev)
5521 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5524 /* disallow open during test */
5525 if (test_bit(__IXGBE_TESTING, &adapter->state))
5528 netif_carrier_off(netdev);
5530 /* allocate transmit descriptors */
5531 err = ixgbe_setup_all_tx_resources(adapter);
5535 /* allocate receive descriptors */
5536 err = ixgbe_setup_all_rx_resources(adapter);
5540 ixgbe_configure(adapter);
5542 err = ixgbe_request_irq(adapter);
5546 /* Notify the stack of the actual queue counts. */
5547 if (adapter->num_rx_pools > 1)
5548 queues = adapter->num_rx_queues_per_pool;
5550 queues = adapter->num_tx_queues;
5552 err = netif_set_real_num_tx_queues(netdev, queues);
5554 goto err_set_queues;
5556 if (adapter->num_rx_pools > 1 &&
5557 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5558 queues = IXGBE_MAX_L2A_QUEUES;
5560 queues = adapter->num_rx_queues;
5561 err = netif_set_real_num_rx_queues(netdev, queues);
5563 goto err_set_queues;
5565 ixgbe_ptp_init(adapter);
5567 ixgbe_up_complete(adapter);
5572 ixgbe_free_irq(adapter);
5574 ixgbe_free_all_rx_resources(adapter);
5576 ixgbe_free_all_tx_resources(adapter);
5578 ixgbe_reset(adapter);
5583 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5585 ixgbe_ptp_suspend(adapter);
5587 ixgbe_down(adapter);
5588 ixgbe_free_irq(adapter);
5590 ixgbe_free_all_tx_resources(adapter);
5591 ixgbe_free_all_rx_resources(adapter);
5595 * ixgbe_close - Disables a network interface
5596 * @netdev: network interface device structure
5598 * Returns 0, this is not allowed to fail
5600 * The close entry point is called when an interface is de-activated
5601 * by the OS. The hardware is still under the drivers control, but
5602 * needs to be disabled. A global MAC reset is issued to stop the
5603 * hardware, and all transmit and receive resources are freed.
5605 static int ixgbe_close(struct net_device *netdev)
5607 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5609 ixgbe_ptp_stop(adapter);
5611 ixgbe_close_suspend(adapter);
5613 ixgbe_fdir_filter_exit(adapter);
5615 ixgbe_release_hw_control(adapter);
5621 static int ixgbe_resume(struct pci_dev *pdev)
5623 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5624 struct net_device *netdev = adapter->netdev;
5627 adapter->hw.hw_addr = adapter->io_addr;
5628 pci_set_power_state(pdev, PCI_D0);
5629 pci_restore_state(pdev);
5631 * pci_restore_state clears dev->state_saved so call
5632 * pci_save_state to restore it.
5634 pci_save_state(pdev);
5636 err = pci_enable_device_mem(pdev);
5638 e_dev_err("Cannot enable PCI device from suspend\n");
5641 smp_mb__before_atomic();
5642 clear_bit(__IXGBE_DISABLED, &adapter->state);
5643 pci_set_master(pdev);
5645 pci_wake_from_d3(pdev, false);
5647 ixgbe_reset(adapter);
5649 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5652 err = ixgbe_init_interrupt_scheme(adapter);
5653 if (!err && netif_running(netdev))
5654 err = ixgbe_open(netdev);
5661 netif_device_attach(netdev);
5665 #endif /* CONFIG_PM */
5667 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5669 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5670 struct net_device *netdev = adapter->netdev;
5671 struct ixgbe_hw *hw = &adapter->hw;
5673 u32 wufc = adapter->wol;
5678 netif_device_detach(netdev);
5681 if (netif_running(netdev))
5682 ixgbe_close_suspend(adapter);
5685 ixgbe_clear_interrupt_scheme(adapter);
5688 retval = pci_save_state(pdev);
5693 if (hw->mac.ops.stop_link_on_d3)
5694 hw->mac.ops.stop_link_on_d3(hw);
5697 ixgbe_set_rx_mode(netdev);
5699 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5700 if (hw->mac.ops.enable_tx_laser)
5701 hw->mac.ops.enable_tx_laser(hw);
5703 /* turn on all-multi mode if wake on multicast is enabled */
5704 if (wufc & IXGBE_WUFC_MC) {
5705 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5706 fctrl |= IXGBE_FCTRL_MPE;
5707 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5710 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5711 ctrl |= IXGBE_CTRL_GIO_DIS;
5712 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5714 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5716 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5717 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5720 switch (hw->mac.type) {
5721 case ixgbe_mac_82598EB:
5722 pci_wake_from_d3(pdev, false);
5724 case ixgbe_mac_82599EB:
5725 case ixgbe_mac_X540:
5726 case ixgbe_mac_X550:
5727 case ixgbe_mac_X550EM_x:
5728 pci_wake_from_d3(pdev, !!wufc);
5734 *enable_wake = !!wufc;
5736 ixgbe_release_hw_control(adapter);
5738 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
5739 pci_disable_device(pdev);
5745 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5750 retval = __ixgbe_shutdown(pdev, &wake);
5755 pci_prepare_to_sleep(pdev);
5757 pci_wake_from_d3(pdev, false);
5758 pci_set_power_state(pdev, PCI_D3hot);
5763 #endif /* CONFIG_PM */
5765 static void ixgbe_shutdown(struct pci_dev *pdev)
5769 __ixgbe_shutdown(pdev, &wake);
5771 if (system_state == SYSTEM_POWER_OFF) {
5772 pci_wake_from_d3(pdev, wake);
5773 pci_set_power_state(pdev, PCI_D3hot);
5778 * ixgbe_update_stats - Update the board statistics counters.
5779 * @adapter: board private structure
5781 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5783 struct net_device *netdev = adapter->netdev;
5784 struct ixgbe_hw *hw = &adapter->hw;
5785 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5787 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5788 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5789 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5790 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5792 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5793 test_bit(__IXGBE_RESETTING, &adapter->state))
5796 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5799 for (i = 0; i < adapter->num_rx_queues; i++) {
5800 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5801 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5803 adapter->rsc_total_count = rsc_count;
5804 adapter->rsc_total_flush = rsc_flush;
5807 for (i = 0; i < adapter->num_rx_queues; i++) {
5808 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5809 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5810 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5811 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5812 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5813 bytes += rx_ring->stats.bytes;
5814 packets += rx_ring->stats.packets;
5816 adapter->non_eop_descs = non_eop_descs;
5817 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5818 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5819 adapter->hw_csum_rx_error = hw_csum_rx_error;
5820 netdev->stats.rx_bytes = bytes;
5821 netdev->stats.rx_packets = packets;
5825 /* gather some stats to the adapter struct that are per queue */
5826 for (i = 0; i < adapter->num_tx_queues; i++) {
5827 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5828 restart_queue += tx_ring->tx_stats.restart_queue;
5829 tx_busy += tx_ring->tx_stats.tx_busy;
5830 bytes += tx_ring->stats.bytes;
5831 packets += tx_ring->stats.packets;
5833 adapter->restart_queue = restart_queue;
5834 adapter->tx_busy = tx_busy;
5835 netdev->stats.tx_bytes = bytes;
5836 netdev->stats.tx_packets = packets;
5838 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5840 /* 8 register reads */
5841 for (i = 0; i < 8; i++) {
5842 /* for packet buffers not used, the register should read 0 */
5843 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5845 hwstats->mpc[i] += mpc;
5846 total_mpc += hwstats->mpc[i];
5847 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5848 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5849 switch (hw->mac.type) {
5850 case ixgbe_mac_82598EB:
5851 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5852 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5853 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5854 hwstats->pxonrxc[i] +=
5855 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5857 case ixgbe_mac_82599EB:
5858 case ixgbe_mac_X540:
5859 case ixgbe_mac_X550:
5860 case ixgbe_mac_X550EM_x:
5861 hwstats->pxonrxc[i] +=
5862 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5869 /*16 register reads */
5870 for (i = 0; i < 16; i++) {
5871 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5872 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5873 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5874 (hw->mac.type == ixgbe_mac_X540) ||
5875 (hw->mac.type == ixgbe_mac_X550) ||
5876 (hw->mac.type == ixgbe_mac_X550EM_x)) {
5877 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5878 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5879 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5880 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5884 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5885 /* work around hardware counting issue */
5886 hwstats->gprc -= missed_rx;
5888 ixgbe_update_xoff_received(adapter);
5890 /* 82598 hardware only has a 32 bit counter in the high register */
5891 switch (hw->mac.type) {
5892 case ixgbe_mac_82598EB:
5893 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5894 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5895 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5896 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5898 case ixgbe_mac_X540:
5899 case ixgbe_mac_X550:
5900 case ixgbe_mac_X550EM_x:
5901 /* OS2BMC stats are X540 and later */
5902 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5903 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5904 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5905 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5906 case ixgbe_mac_82599EB:
5907 for (i = 0; i < 16; i++)
5908 adapter->hw_rx_no_dma_resources +=
5909 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5910 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5911 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5912 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5913 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5914 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5915 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5916 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5917 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5918 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5920 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5921 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5922 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5923 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5924 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5925 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5926 /* Add up per cpu counters for total ddp aloc fail */
5927 if (adapter->fcoe.ddp_pool) {
5928 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5929 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5931 u64 noddp = 0, noddp_ext_buff = 0;
5932 for_each_possible_cpu(cpu) {
5933 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
5934 noddp += ddp_pool->noddp;
5935 noddp_ext_buff += ddp_pool->noddp_ext_buff;
5937 hwstats->fcoe_noddp = noddp;
5938 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
5940 #endif /* IXGBE_FCOE */
5945 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5946 hwstats->bprc += bprc;
5947 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5948 if (hw->mac.type == ixgbe_mac_82598EB)
5949 hwstats->mprc -= bprc;
5950 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5951 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5952 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5953 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5954 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5955 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5956 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5957 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5958 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5959 hwstats->lxontxc += lxon;
5960 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5961 hwstats->lxofftxc += lxoff;
5962 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5963 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5965 * 82598 errata - tx of flow control packets is included in tx counters
5967 xon_off_tot = lxon + lxoff;
5968 hwstats->gptc -= xon_off_tot;
5969 hwstats->mptc -= xon_off_tot;
5970 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5971 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5972 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5973 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5974 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5975 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5976 hwstats->ptc64 -= xon_off_tot;
5977 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5978 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5979 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5980 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5981 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5982 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5984 /* Fill out the OS statistics structure */
5985 netdev->stats.multicast = hwstats->mprc;
5988 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5989 netdev->stats.rx_dropped = 0;
5990 netdev->stats.rx_length_errors = hwstats->rlec;
5991 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5992 netdev->stats.rx_missed_errors = total_mpc;
5996 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5997 * @adapter: pointer to the device adapter structure
5999 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6001 struct ixgbe_hw *hw = &adapter->hw;
6004 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6007 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6009 /* if interface is down do nothing */
6010 if (test_bit(__IXGBE_DOWN, &adapter->state))
6013 /* do nothing if we are not using signature filters */
6014 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6017 adapter->fdir_overflow++;
6019 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6020 for (i = 0; i < adapter->num_tx_queues; i++)
6021 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6022 &(adapter->tx_ring[i]->state));
6023 /* re-enable flow director interrupts */
6024 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6026 e_err(probe, "failed to finish FDIR re-initialization, "
6027 "ignored adding FDIR ATR filters\n");
6032 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6033 * @adapter: pointer to the device adapter structure
6035 * This function serves two purposes. First it strobes the interrupt lines
6036 * in order to make certain interrupts are occurring. Secondly it sets the
6037 * bits needed to check for TX hangs. As a result we should immediately
6038 * determine if a hang has occurred.
6040 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6042 struct ixgbe_hw *hw = &adapter->hw;
6046 /* If we're down, removing or resetting, just bail */
6047 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6048 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6049 test_bit(__IXGBE_RESETTING, &adapter->state))
6052 /* Force detection of hung controller */
6053 if (netif_carrier_ok(adapter->netdev)) {
6054 for (i = 0; i < adapter->num_tx_queues; i++)
6055 set_check_for_tx_hang(adapter->tx_ring[i]);
6058 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6060 * for legacy and MSI interrupts don't set any bits
6061 * that are enabled for EIAM, because this operation
6062 * would set *both* EIMS and EICS for any bit in EIAM
6064 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6065 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6067 /* get one bit for every active tx/rx interrupt vector */
6068 for (i = 0; i < adapter->num_q_vectors; i++) {
6069 struct ixgbe_q_vector *qv = adapter->q_vector[i];
6070 if (qv->rx.ring || qv->tx.ring)
6071 eics |= ((u64)1 << i);
6075 /* Cause software interrupt to ensure rings are cleaned */
6076 ixgbe_irq_rearm_queues(adapter, eics);
6081 * ixgbe_watchdog_update_link - update the link status
6082 * @adapter: pointer to the device adapter structure
6083 * @link_speed: pointer to a u32 to store the link_speed
6085 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6087 struct ixgbe_hw *hw = &adapter->hw;
6088 u32 link_speed = adapter->link_speed;
6089 bool link_up = adapter->link_up;
6090 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6092 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6095 if (hw->mac.ops.check_link) {
6096 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6098 /* always assume link is up, if no check link function */
6099 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6103 if (adapter->ixgbe_ieee_pfc)
6104 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6106 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6107 hw->mac.ops.fc_enable(hw);
6108 ixgbe_set_rx_drop_en(adapter);
6112 time_after(jiffies, (adapter->link_check_timeout +
6113 IXGBE_TRY_LINK_TIMEOUT))) {
6114 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6115 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6116 IXGBE_WRITE_FLUSH(hw);
6119 adapter->link_up = link_up;
6120 adapter->link_speed = link_speed;
6123 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6125 #ifdef CONFIG_IXGBE_DCB
6126 struct net_device *netdev = adapter->netdev;
6127 struct dcb_app app = {
6128 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6133 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6134 up = dcb_ieee_getapp_mask(netdev, &app);
6136 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6141 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6142 * print link up message
6143 * @adapter: pointer to the device adapter structure
6145 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6147 struct net_device *netdev = adapter->netdev;
6148 struct ixgbe_hw *hw = &adapter->hw;
6149 struct net_device *upper;
6150 struct list_head *iter;
6151 u32 link_speed = adapter->link_speed;
6152 bool flow_rx, flow_tx;
6154 /* only continue if link was previously down */
6155 if (netif_carrier_ok(netdev))
6158 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6160 switch (hw->mac.type) {
6161 case ixgbe_mac_82598EB: {
6162 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6163 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6164 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6165 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6168 case ixgbe_mac_X540:
6169 case ixgbe_mac_X550:
6170 case ixgbe_mac_X550EM_x:
6171 case ixgbe_mac_82599EB: {
6172 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6173 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6174 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6175 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6184 adapter->last_rx_ptp_check = jiffies;
6186 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6187 ixgbe_ptp_start_cyclecounter(adapter);
6189 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
6190 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
6192 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
6194 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
6197 ((flow_rx && flow_tx) ? "RX/TX" :
6199 (flow_tx ? "TX" : "None"))));
6201 netif_carrier_on(netdev);
6202 ixgbe_check_vf_rate_limit(adapter);
6204 /* enable transmits */
6205 netif_tx_wake_all_queues(adapter->netdev);
6207 /* enable any upper devices */
6209 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6210 if (netif_is_macvlan(upper)) {
6211 struct macvlan_dev *vlan = netdev_priv(upper);
6214 netif_tx_wake_all_queues(upper);
6219 /* update the default user priority for VFs */
6220 ixgbe_update_default_up(adapter);
6222 /* ping all the active vfs to let them know link has changed */
6223 ixgbe_ping_all_vfs(adapter);
6227 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6228 * print link down message
6229 * @adapter: pointer to the adapter structure
6231 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6233 struct net_device *netdev = adapter->netdev;
6234 struct ixgbe_hw *hw = &adapter->hw;
6236 adapter->link_up = false;
6237 adapter->link_speed = 0;
6239 /* only continue if link was up previously */
6240 if (!netif_carrier_ok(netdev))
6243 /* poll for SFP+ cable when link is down */
6244 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6245 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6247 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6248 ixgbe_ptp_start_cyclecounter(adapter);
6250 e_info(drv, "NIC Link is Down\n");
6251 netif_carrier_off(netdev);
6253 /* ping all the active vfs to let them know link has changed */
6254 ixgbe_ping_all_vfs(adapter);
6257 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6261 for (i = 0; i < adapter->num_tx_queues; i++) {
6262 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6264 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6271 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6273 struct ixgbe_hw *hw = &adapter->hw;
6274 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6275 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6279 if (!adapter->num_vfs)
6282 /* resetting the PF is only needed for MAC before X550 */
6283 if (hw->mac.type >= ixgbe_mac_X550)
6286 for (i = 0; i < adapter->num_vfs; i++) {
6287 for (j = 0; j < q_per_pool; j++) {
6290 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6291 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6302 * ixgbe_watchdog_flush_tx - flush queues on link down
6303 * @adapter: pointer to the device adapter structure
6305 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6307 if (!netif_carrier_ok(adapter->netdev)) {
6308 if (ixgbe_ring_tx_pending(adapter) ||
6309 ixgbe_vf_tx_pending(adapter)) {
6310 /* We've lost link, so the controller stops DMA,
6311 * but we've got queued Tx work that's never going
6312 * to get done, so reset controller to flush Tx.
6313 * (Do the reset outside of interrupt context).
6315 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6316 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6321 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6325 /* Do not perform spoof check for 82598 or if not in IOV mode */
6326 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6327 adapter->num_vfs == 0)
6330 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6333 * ssvpc register is cleared on read, if zero then no
6334 * spoofed packets in the last interval.
6339 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6343 * ixgbe_watchdog_subtask - check and bring link up
6344 * @adapter: pointer to the device adapter structure
6346 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6348 /* if interface is down, removing or resetting, do nothing */
6349 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6350 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6351 test_bit(__IXGBE_RESETTING, &adapter->state))
6354 ixgbe_watchdog_update_link(adapter);
6356 if (adapter->link_up)
6357 ixgbe_watchdog_link_is_up(adapter);
6359 ixgbe_watchdog_link_is_down(adapter);
6361 ixgbe_spoof_check(adapter);
6362 ixgbe_update_stats(adapter);
6364 ixgbe_watchdog_flush_tx(adapter);
6368 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6369 * @adapter: the ixgbe adapter structure
6371 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6373 struct ixgbe_hw *hw = &adapter->hw;
6376 /* not searching for SFP so there is nothing to do here */
6377 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6378 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6381 /* someone else is in init, wait until next service event */
6382 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6385 err = hw->phy.ops.identify_sfp(hw);
6386 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6389 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6390 /* If no cable is present, then we need to reset
6391 * the next time we find a good cable. */
6392 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6399 /* exit if reset not needed */
6400 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6403 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6406 * A module may be identified correctly, but the EEPROM may not have
6407 * support for that module. setup_sfp() will fail in that case, so
6408 * we should not allow that module to load.
6410 if (hw->mac.type == ixgbe_mac_82598EB)
6411 err = hw->phy.ops.reset(hw);
6413 err = hw->mac.ops.setup_sfp(hw);
6415 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6418 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6419 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6422 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6424 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6425 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6426 e_dev_err("failed to initialize because an unsupported "
6427 "SFP+ module type was detected.\n");
6428 e_dev_err("Reload the driver after installing a "
6429 "supported module.\n");
6430 unregister_netdev(adapter->netdev);
6435 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6436 * @adapter: the ixgbe adapter structure
6438 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6440 struct ixgbe_hw *hw = &adapter->hw;
6442 bool autoneg = false;
6444 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6447 /* someone else is in init, wait until next service event */
6448 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6451 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6453 speed = hw->phy.autoneg_advertised;
6454 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6455 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6457 /* setup the highest link when no autoneg */
6459 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6460 speed = IXGBE_LINK_SPEED_10GB_FULL;
6464 if (hw->mac.ops.setup_link)
6465 hw->mac.ops.setup_link(hw, speed, true);
6467 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6468 adapter->link_check_timeout = jiffies;
6469 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6472 #ifdef CONFIG_PCI_IOV
6473 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6476 struct ixgbe_hw *hw = &adapter->hw;
6477 struct net_device *netdev = adapter->netdev;
6481 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6482 if (gpc) /* If incrementing then no need for the check below */
6485 * Check to see if a bad DMA write target from an errant or
6486 * malicious VF has caused a PCIe error. If so then we can
6487 * issue a VFLR to the offending VF(s) and then resume without
6488 * requesting a full slot reset.
6491 for (vf = 0; vf < adapter->num_vfs; vf++) {
6492 ciaa = (vf << 16) | 0x80000000;
6493 /* 32 bit read so align, we really want status at offset 6 */
6494 ciaa |= PCI_COMMAND;
6495 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6496 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_BY_MAC(hw));
6498 /* disable debug mode asap after reading data */
6499 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6500 /* Get the upper 16 bits which will be the PCI status reg */
6502 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
6503 netdev_err(netdev, "VF %d Hung DMA\n", vf);
6505 ciaa = (vf << 16) | 0x80000000;
6507 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6508 ciad = 0x00008000; /* VFLR */
6509 IXGBE_WRITE_REG(hw, IXGBE_CIAD_BY_MAC(hw), ciad);
6511 IXGBE_WRITE_REG(hw, IXGBE_CIAA_BY_MAC(hw), ciaa);
6518 * ixgbe_service_timer - Timer Call-back
6519 * @data: pointer to adapter cast into an unsigned long
6521 static void ixgbe_service_timer(unsigned long data)
6523 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6524 unsigned long next_event_offset;
6527 /* poll faster when waiting for link */
6528 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6529 next_event_offset = HZ / 10;
6531 next_event_offset = HZ * 2;
6533 #ifdef CONFIG_PCI_IOV
6535 * don't bother with SR-IOV VF DMA hang check if there are
6536 * no VFs or the link is down
6538 if (!adapter->num_vfs ||
6539 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6540 goto normal_timer_service;
6542 /* If we have VFs allocated then we must check for DMA hangs */
6543 ixgbe_check_for_bad_vf(adapter);
6544 next_event_offset = HZ / 50;
6545 adapter->timer_event_accumulator++;
6547 if (adapter->timer_event_accumulator >= 100)
6548 adapter->timer_event_accumulator = 0;
6552 normal_timer_service:
6554 /* Reset the timer */
6555 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6558 ixgbe_service_event_schedule(adapter);
6561 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6563 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6566 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6568 /* If we're already down, removing or resetting, just bail */
6569 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6570 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6571 test_bit(__IXGBE_RESETTING, &adapter->state))
6574 ixgbe_dump(adapter);
6575 netdev_err(adapter->netdev, "Reset adapter\n");
6576 adapter->tx_timeout_count++;
6579 ixgbe_reinit_locked(adapter);
6584 * ixgbe_service_task - manages and runs subtasks
6585 * @work: pointer to work_struct containing our data
6587 static void ixgbe_service_task(struct work_struct *work)
6589 struct ixgbe_adapter *adapter = container_of(work,
6590 struct ixgbe_adapter,
6592 if (ixgbe_removed(adapter->hw.hw_addr)) {
6593 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6595 ixgbe_down(adapter);
6598 ixgbe_service_event_complete(adapter);
6601 ixgbe_reset_subtask(adapter);
6602 ixgbe_sfp_detection_subtask(adapter);
6603 ixgbe_sfp_link_config_subtask(adapter);
6604 ixgbe_check_overtemp_subtask(adapter);
6605 ixgbe_watchdog_subtask(adapter);
6606 ixgbe_fdir_reinit_subtask(adapter);
6607 ixgbe_check_hang_subtask(adapter);
6609 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6610 ixgbe_ptp_overflow_check(adapter);
6611 ixgbe_ptp_rx_hang(adapter);
6614 ixgbe_service_event_complete(adapter);
6617 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6618 struct ixgbe_tx_buffer *first,
6621 struct sk_buff *skb = first->skb;
6622 u32 vlan_macip_lens, type_tucmd;
6623 u32 mss_l4len_idx, l4len;
6626 if (skb->ip_summed != CHECKSUM_PARTIAL)
6629 if (!skb_is_gso(skb))
6632 err = skb_cow_head(skb, 0);
6636 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6637 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6639 if (first->protocol == htons(ETH_P_IP)) {
6640 struct iphdr *iph = ip_hdr(skb);
6643 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6647 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6648 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6649 IXGBE_TX_FLAGS_CSUM |
6650 IXGBE_TX_FLAGS_IPV4;
6651 } else if (skb_is_gso_v6(skb)) {
6652 ipv6_hdr(skb)->payload_len = 0;
6653 tcp_hdr(skb)->check =
6654 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6655 &ipv6_hdr(skb)->daddr,
6657 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6658 IXGBE_TX_FLAGS_CSUM;
6661 /* compute header lengths */
6662 l4len = tcp_hdrlen(skb);
6663 *hdr_len = skb_transport_offset(skb) + l4len;
6665 /* update gso size and bytecount with header size */
6666 first->gso_segs = skb_shinfo(skb)->gso_segs;
6667 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6669 /* mss_l4len_id: use 0 as index for TSO */
6670 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6671 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6673 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6674 vlan_macip_lens = skb_network_header_len(skb);
6675 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6676 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6678 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6684 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6685 struct ixgbe_tx_buffer *first)
6687 struct sk_buff *skb = first->skb;
6688 u32 vlan_macip_lens = 0;
6689 u32 mss_l4len_idx = 0;
6692 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6693 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6694 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6698 switch (first->protocol) {
6699 case htons(ETH_P_IP):
6700 vlan_macip_lens |= skb_network_header_len(skb);
6701 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6702 l4_hdr = ip_hdr(skb)->protocol;
6704 case htons(ETH_P_IPV6):
6705 vlan_macip_lens |= skb_network_header_len(skb);
6706 l4_hdr = ipv6_hdr(skb)->nexthdr;
6709 if (unlikely(net_ratelimit())) {
6710 dev_warn(tx_ring->dev,
6711 "partial checksum but proto=%x!\n",
6719 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6720 mss_l4len_idx = tcp_hdrlen(skb) <<
6721 IXGBE_ADVTXD_L4LEN_SHIFT;
6724 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6725 mss_l4len_idx = sizeof(struct sctphdr) <<
6726 IXGBE_ADVTXD_L4LEN_SHIFT;
6729 mss_l4len_idx = sizeof(struct udphdr) <<
6730 IXGBE_ADVTXD_L4LEN_SHIFT;
6733 if (unlikely(net_ratelimit())) {
6734 dev_warn(tx_ring->dev,
6735 "partial checksum but l4 proto=%x!\n",
6741 /* update TX checksum flag */
6742 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6745 /* vlan_macip_lens: MACLEN, VLAN tag */
6746 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6747 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6749 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6750 type_tucmd, mss_l4len_idx);
6753 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6754 ((_flag <= _result) ? \
6755 ((u32)(_input & _flag) * (_result / _flag)) : \
6756 ((u32)(_input & _flag) / (_flag / _result)))
6758 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6760 /* set type for advanced descriptor with frame checksum insertion */
6761 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
6762 IXGBE_ADVTXD_DCMD_DEXT |
6763 IXGBE_ADVTXD_DCMD_IFCS;
6765 /* set HW vlan bit if vlan is present */
6766 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
6767 IXGBE_ADVTXD_DCMD_VLE);
6769 /* set segmentation enable bits for TSO/FSO */
6770 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
6771 IXGBE_ADVTXD_DCMD_TSE);
6773 /* set timestamp bit if present */
6774 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
6775 IXGBE_ADVTXD_MAC_TSTAMP);
6777 /* insert frame checksum */
6778 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
6783 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6784 u32 tx_flags, unsigned int paylen)
6786 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
6788 /* enable L4 checksum for TSO and TX checksum offload */
6789 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6790 IXGBE_TX_FLAGS_CSUM,
6791 IXGBE_ADVTXD_POPTS_TXSM);
6793 /* enble IPv4 checksum for TSO */
6794 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6795 IXGBE_TX_FLAGS_IPV4,
6796 IXGBE_ADVTXD_POPTS_IXSM);
6799 * Check Context must be set if Tx switch is enabled, which it
6800 * always is for case where virtual functions are running
6802 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6806 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6809 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6811 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6813 /* Herbert's original patch had:
6814 * smp_mb__after_netif_stop_queue();
6815 * but since that doesn't exist yet, just open code it.
6819 /* We need to check again in a case another CPU has just
6820 * made room available.
6822 if (likely(ixgbe_desc_unused(tx_ring) < size))
6825 /* A reprieve! - use start_queue because it doesn't call schedule */
6826 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6827 ++tx_ring->tx_stats.restart_queue;
6831 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6833 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6836 return __ixgbe_maybe_stop_tx(tx_ring, size);
6839 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6842 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6843 struct ixgbe_tx_buffer *first,
6846 struct sk_buff *skb = first->skb;
6847 struct ixgbe_tx_buffer *tx_buffer;
6848 union ixgbe_adv_tx_desc *tx_desc;
6849 struct skb_frag_struct *frag;
6851 unsigned int data_len, size;
6852 u32 tx_flags = first->tx_flags;
6853 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
6854 u16 i = tx_ring->next_to_use;
6856 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6858 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
6860 size = skb_headlen(skb);
6861 data_len = skb->data_len;
6864 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6865 if (data_len < sizeof(struct fcoe_crc_eof)) {
6866 size -= sizeof(struct fcoe_crc_eof) - data_len;
6869 data_len -= sizeof(struct fcoe_crc_eof);
6874 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6878 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6879 if (dma_mapping_error(tx_ring->dev, dma))
6882 /* record length, and DMA address */
6883 dma_unmap_len_set(tx_buffer, len, size);
6884 dma_unmap_addr_set(tx_buffer, dma, dma);
6886 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6888 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6889 tx_desc->read.cmd_type_len =
6890 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
6894 if (i == tx_ring->count) {
6895 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6898 tx_desc->read.olinfo_status = 0;
6900 dma += IXGBE_MAX_DATA_PER_TXD;
6901 size -= IXGBE_MAX_DATA_PER_TXD;
6903 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6906 if (likely(!data_len))
6909 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6913 if (i == tx_ring->count) {
6914 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6917 tx_desc->read.olinfo_status = 0;
6920 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6922 size = skb_frag_size(frag);
6926 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6929 tx_buffer = &tx_ring->tx_buffer_info[i];
6932 /* write last descriptor with RS and EOP bits */
6933 cmd_type |= size | IXGBE_TXD_CMD;
6934 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6936 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6938 /* set the timestamp */
6939 first->time_stamp = jiffies;
6942 * Force memory writes to complete before letting h/w know there
6943 * are new descriptors to fetch. (Only applicable for weak-ordered
6944 * memory model archs, such as IA-64).
6946 * We also need this memory barrier to make certain all of the
6947 * status bits have been updated before next_to_watch is written.
6951 /* set next_to_watch value indicating a packet is present */
6952 first->next_to_watch = tx_desc;
6955 if (i == tx_ring->count)
6958 tx_ring->next_to_use = i;
6960 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
6962 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
6963 /* notify HW of packet */
6964 ixgbe_write_tail(tx_ring, i);
6969 dev_err(tx_ring->dev, "TX DMA map failed\n");
6971 /* clear dma mappings for failed tx_buffer_info map */
6973 tx_buffer = &tx_ring->tx_buffer_info[i];
6974 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6975 if (tx_buffer == first)
6982 tx_ring->next_to_use = i;
6985 static void ixgbe_atr(struct ixgbe_ring *ring,
6986 struct ixgbe_tx_buffer *first)
6988 struct ixgbe_q_vector *q_vector = ring->q_vector;
6989 union ixgbe_atr_hash_dword input = { .dword = 0 };
6990 union ixgbe_atr_hash_dword common = { .dword = 0 };
6992 unsigned char *network;
6994 struct ipv6hdr *ipv6;
6999 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7003 /* do nothing if sampling is disabled */
7004 if (!ring->atr_sample_rate)
7009 /* snag network header to get L4 type and address */
7010 hdr.network = skb_network_header(first->skb);
7012 /* Currently only IPv4/IPv6 with TCP is supported */
7013 if ((first->protocol != htons(ETH_P_IPV6) ||
7014 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7015 (first->protocol != htons(ETH_P_IP) ||
7016 hdr.ipv4->protocol != IPPROTO_TCP))
7019 th = tcp_hdr(first->skb);
7021 /* skip this packet since it is invalid or the socket is closing */
7025 /* sample on all syn packets or once every atr sample count */
7026 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7029 /* reset sample count */
7030 ring->atr_count = 0;
7032 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7035 * src and dst are inverted, think how the receiver sees them
7037 * The input is broken into two sections, a non-compressed section
7038 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7039 * is XORed together and stored in the compressed dword.
7041 input.formatted.vlan_id = vlan_id;
7044 * since src port and flex bytes occupy the same word XOR them together
7045 * and write the value to source port portion of compressed dword
7047 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7048 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7050 common.port.src ^= th->dest ^ first->protocol;
7051 common.port.dst ^= th->source;
7053 if (first->protocol == htons(ETH_P_IP)) {
7054 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7055 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7057 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7058 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7059 hdr.ipv6->saddr.s6_addr32[1] ^
7060 hdr.ipv6->saddr.s6_addr32[2] ^
7061 hdr.ipv6->saddr.s6_addr32[3] ^
7062 hdr.ipv6->daddr.s6_addr32[0] ^
7063 hdr.ipv6->daddr.s6_addr32[1] ^
7064 hdr.ipv6->daddr.s6_addr32[2] ^
7065 hdr.ipv6->daddr.s6_addr32[3];
7068 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7069 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7070 input, common, ring->queue_index);
7073 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7074 void *accel_priv, select_queue_fallback_t fallback)
7076 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7078 struct ixgbe_adapter *adapter;
7079 struct ixgbe_ring_feature *f;
7084 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7089 * only execute the code below if protocol is FCoE
7090 * or FIP and we have FCoE enabled on the adapter
7092 switch (vlan_get_protocol(skb)) {
7093 case htons(ETH_P_FCOE):
7094 case htons(ETH_P_FIP):
7095 adapter = netdev_priv(dev);
7097 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7100 return fallback(dev, skb);
7103 f = &adapter->ring_feature[RING_F_FCOE];
7105 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7108 while (txq >= f->indices)
7111 return txq + f->offset;
7113 return fallback(dev, skb);
7117 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7118 struct ixgbe_adapter *adapter,
7119 struct ixgbe_ring *tx_ring)
7121 struct ixgbe_tx_buffer *first;
7125 u16 count = TXD_USE_COUNT(skb_headlen(skb));
7126 __be16 protocol = skb->protocol;
7130 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7131 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7132 * + 2 desc gap to keep tail from touching head,
7133 * + 1 desc for context descriptor,
7134 * otherwise try next time
7136 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7137 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7139 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7140 tx_ring->tx_stats.tx_busy++;
7141 return NETDEV_TX_BUSY;
7144 /* record the location of the first descriptor for this packet */
7145 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7147 first->bytecount = skb->len;
7148 first->gso_segs = 1;
7150 /* if we have a HW VLAN tag being added default to the HW one */
7151 if (vlan_tx_tag_present(skb)) {
7152 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7153 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7154 /* else if it is a SW VLAN check the next protocol and store the tag */
7155 } else if (protocol == htons(ETH_P_8021Q)) {
7156 struct vlan_hdr *vhdr, _vhdr;
7157 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7161 protocol = vhdr->h_vlan_encapsulated_proto;
7162 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7163 IXGBE_TX_FLAGS_VLAN_SHIFT;
7164 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7167 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7168 adapter->ptp_clock &&
7169 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7171 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7172 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7174 /* schedule check for Tx timestamp */
7175 adapter->ptp_tx_skb = skb_get(skb);
7176 adapter->ptp_tx_start = jiffies;
7177 schedule_work(&adapter->ptp_tx_work);
7180 skb_tx_timestamp(skb);
7182 #ifdef CONFIG_PCI_IOV
7184 * Use the l2switch_enable flag - would be false if the DMA
7185 * Tx switch had been disabled.
7187 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7188 tx_flags |= IXGBE_TX_FLAGS_CC;
7191 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7192 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7193 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7194 (skb->priority != TC_PRIO_CONTROL))) {
7195 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7196 tx_flags |= (skb->priority & 0x7) <<
7197 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7198 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7199 struct vlan_ethhdr *vhdr;
7201 if (skb_cow_head(skb, 0))
7203 vhdr = (struct vlan_ethhdr *)skb->data;
7204 vhdr->h_vlan_TCI = htons(tx_flags >>
7205 IXGBE_TX_FLAGS_VLAN_SHIFT);
7207 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7211 /* record initial flags and protocol */
7212 first->tx_flags = tx_flags;
7213 first->protocol = protocol;
7216 /* setup tx offload for FCoE */
7217 if ((protocol == htons(ETH_P_FCOE)) &&
7218 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7219 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7226 #endif /* IXGBE_FCOE */
7227 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7231 ixgbe_tx_csum(tx_ring, first);
7233 /* add the ATR filter if ATR is on */
7234 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7235 ixgbe_atr(tx_ring, first);
7239 #endif /* IXGBE_FCOE */
7240 ixgbe_tx_map(tx_ring, first, hdr_len);
7242 return NETDEV_TX_OK;
7245 dev_kfree_skb_any(first->skb);
7248 return NETDEV_TX_OK;
7251 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7252 struct net_device *netdev,
7253 struct ixgbe_ring *ring)
7255 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7256 struct ixgbe_ring *tx_ring;
7259 * The minimum packet size for olinfo paylen is 17 so pad the skb
7260 * in order to meet this minimum size requirement.
7262 if (unlikely(skb->len < 17)) {
7263 if (skb_pad(skb, 17 - skb->len))
7264 return NETDEV_TX_OK;
7266 skb_set_tail_pointer(skb, 17);
7269 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7271 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7274 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7275 struct net_device *netdev)
7277 return __ixgbe_xmit_frame(skb, netdev, NULL);
7281 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7282 * @netdev: network interface device structure
7283 * @p: pointer to an address structure
7285 * Returns 0 on success, negative on failure
7287 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7289 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7290 struct ixgbe_hw *hw = &adapter->hw;
7291 struct sockaddr *addr = p;
7294 if (!is_valid_ether_addr(addr->sa_data))
7295 return -EADDRNOTAVAIL;
7297 ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7298 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7299 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7301 ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7302 return ret > 0 ? 0 : ret;
7306 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7308 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7309 struct ixgbe_hw *hw = &adapter->hw;
7313 if (prtad != hw->phy.mdio.prtad)
7315 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7321 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7322 u16 addr, u16 value)
7324 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7325 struct ixgbe_hw *hw = &adapter->hw;
7327 if (prtad != hw->phy.mdio.prtad)
7329 return hw->phy.ops.write_reg(hw, addr, devad, value);
7332 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7334 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7338 return ixgbe_ptp_set_ts_config(adapter, req);
7340 return ixgbe_ptp_get_ts_config(adapter, req);
7342 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7347 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7349 * @netdev: network interface device structure
7351 * Returns non-zero on failure
7353 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7356 struct ixgbe_adapter *adapter = netdev_priv(dev);
7357 struct ixgbe_hw *hw = &adapter->hw;
7359 if (is_valid_ether_addr(hw->mac.san_addr)) {
7361 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7364 /* update SAN MAC vmdq pool selection */
7365 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7371 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7373 * @netdev: network interface device structure
7375 * Returns non-zero on failure
7377 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7380 struct ixgbe_adapter *adapter = netdev_priv(dev);
7381 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7383 if (is_valid_ether_addr(mac->san_addr)) {
7385 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7391 #ifdef CONFIG_NET_POLL_CONTROLLER
7393 * Polling 'interrupt' - used by things like netconsole to send skbs
7394 * without having to re-enable interrupts. It's not called while
7395 * the interrupt routine is executing.
7397 static void ixgbe_netpoll(struct net_device *netdev)
7399 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7402 /* if interface is down do nothing */
7403 if (test_bit(__IXGBE_DOWN, &adapter->state))
7406 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
7407 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
7408 for (i = 0; i < adapter->num_q_vectors; i++)
7409 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7411 ixgbe_intr(adapter->pdev->irq, netdev);
7413 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
7417 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7418 struct rtnl_link_stats64 *stats)
7420 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7424 for (i = 0; i < adapter->num_rx_queues; i++) {
7425 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7431 start = u64_stats_fetch_begin_irq(&ring->syncp);
7432 packets = ring->stats.packets;
7433 bytes = ring->stats.bytes;
7434 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7435 stats->rx_packets += packets;
7436 stats->rx_bytes += bytes;
7440 for (i = 0; i < adapter->num_tx_queues; i++) {
7441 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7447 start = u64_stats_fetch_begin_irq(&ring->syncp);
7448 packets = ring->stats.packets;
7449 bytes = ring->stats.bytes;
7450 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7451 stats->tx_packets += packets;
7452 stats->tx_bytes += bytes;
7456 /* following stats updated by ixgbe_watchdog_task() */
7457 stats->multicast = netdev->stats.multicast;
7458 stats->rx_errors = netdev->stats.rx_errors;
7459 stats->rx_length_errors = netdev->stats.rx_length_errors;
7460 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7461 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7465 #ifdef CONFIG_IXGBE_DCB
7467 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7468 * @adapter: pointer to ixgbe_adapter
7469 * @tc: number of traffic classes currently enabled
7471 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7472 * 802.1Q priority maps to a packet buffer that exists.
7474 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7476 struct ixgbe_hw *hw = &adapter->hw;
7480 /* 82598 have a static priority to TC mapping that can not
7481 * be changed so no validation is needed.
7483 if (hw->mac.type == ixgbe_mac_82598EB)
7486 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7489 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7490 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7492 /* If up2tc is out of bounds default to zero */
7494 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7498 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7504 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7505 * @adapter: Pointer to adapter struct
7507 * Populate the netdev user priority to tc map
7509 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7511 struct net_device *dev = adapter->netdev;
7512 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7513 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7516 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7519 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7520 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7522 tc = ets->prio_tc[prio];
7524 netdev_set_prio_tc_map(dev, prio, tc);
7528 #endif /* CONFIG_IXGBE_DCB */
7530 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7532 * @netdev: net device to configure
7533 * @tc: number of traffic classes to enable
7535 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7537 struct ixgbe_adapter *adapter = netdev_priv(dev);
7538 struct ixgbe_hw *hw = &adapter->hw;
7541 /* Hardware supports up to 8 traffic classes */
7542 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
7543 (hw->mac.type == ixgbe_mac_82598EB &&
7544 tc < MAX_TRAFFIC_CLASS))
7547 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7548 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7551 /* Hardware has to reinitialize queues and interrupts to
7552 * match packet buffer alignment. Unfortunately, the
7553 * hardware is not flexible enough to do this dynamically.
7555 if (netif_running(dev))
7557 ixgbe_clear_interrupt_scheme(adapter);
7559 #ifdef CONFIG_IXGBE_DCB
7561 netdev_set_num_tc(dev, tc);
7562 ixgbe_set_prio_tc_map(adapter);
7564 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7566 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7567 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7568 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7571 netdev_reset_tc(dev);
7573 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7574 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7576 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7578 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7579 adapter->dcb_cfg.pfc_mode_enable = false;
7582 ixgbe_validate_rtr(adapter, tc);
7584 #endif /* CONFIG_IXGBE_DCB */
7585 ixgbe_init_interrupt_scheme(adapter);
7587 if (netif_running(dev))
7588 return ixgbe_open(dev);
7593 #ifdef CONFIG_PCI_IOV
7594 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7596 struct net_device *netdev = adapter->netdev;
7599 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7604 void ixgbe_do_reset(struct net_device *netdev)
7606 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7608 if (netif_running(netdev))
7609 ixgbe_reinit_locked(adapter);
7611 ixgbe_reset(adapter);
7614 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7615 netdev_features_t features)
7617 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7619 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7620 if (!(features & NETIF_F_RXCSUM))
7621 features &= ~NETIF_F_LRO;
7623 /* Turn off LRO if not RSC capable */
7624 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7625 features &= ~NETIF_F_LRO;
7630 static int ixgbe_set_features(struct net_device *netdev,
7631 netdev_features_t features)
7633 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7634 netdev_features_t changed = netdev->features ^ features;
7635 bool need_reset = false;
7637 /* Make sure RSC matches LRO, reset if change */
7638 if (!(features & NETIF_F_LRO)) {
7639 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7641 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7642 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7643 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7644 if (adapter->rx_itr_setting == 1 ||
7645 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7646 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7648 } else if ((changed ^ features) & NETIF_F_LRO) {
7649 e_info(probe, "rx-usecs set too low, "
7655 * Check if Flow Director n-tuple support was enabled or disabled. If
7656 * the state changed, we need to reset.
7658 switch (features & NETIF_F_NTUPLE) {
7659 case NETIF_F_NTUPLE:
7660 /* turn off ATR, enable perfect filters and reset */
7661 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7664 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7665 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7668 /* turn off perfect filters, enable ATR and reset */
7669 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7672 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7674 /* We cannot enable ATR if SR-IOV is enabled */
7675 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7678 /* We cannot enable ATR if we have 2 or more traffic classes */
7679 if (netdev_get_num_tc(netdev) > 1)
7682 /* We cannot enable ATR if RSS is disabled */
7683 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
7686 /* A sample rate of 0 indicates ATR disabled */
7687 if (!adapter->atr_sample_rate)
7690 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
7694 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7695 ixgbe_vlan_strip_enable(adapter);
7697 ixgbe_vlan_strip_disable(adapter);
7699 if (changed & NETIF_F_RXALL)
7702 netdev->features = features;
7704 ixgbe_do_reset(netdev);
7709 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7710 struct net_device *dev,
7711 const unsigned char *addr,
7714 /* guarantee we can provide a unique filter for the unicast address */
7715 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
7716 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
7720 return ndo_dflt_fdb_add(ndm, tb, dev, addr, flags);
7723 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
7724 struct nlmsghdr *nlh)
7726 struct ixgbe_adapter *adapter = netdev_priv(dev);
7727 struct nlattr *attr, *br_spec;
7730 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7733 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7737 nla_for_each_nested(attr, br_spec, rem) {
7741 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7744 if (nla_len(attr) < sizeof(mode))
7747 mode = nla_get_u16(attr);
7748 if (mode == BRIDGE_MODE_VEPA) {
7750 adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
7751 } else if (mode == BRIDGE_MODE_VEB) {
7752 reg = IXGBE_PFDTXGSWC_VT_LBEN;
7753 adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
7757 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
7759 e_info(drv, "enabling bridge mode: %s\n",
7760 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
7766 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7767 struct net_device *dev,
7770 struct ixgbe_adapter *adapter = netdev_priv(dev);
7773 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7776 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
7777 mode = BRIDGE_MODE_VEB;
7779 mode = BRIDGE_MODE_VEPA;
7781 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
7784 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
7786 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
7787 struct ixgbe_adapter *adapter = netdev_priv(pdev);
7788 int used_pools = adapter->num_vfs + adapter->num_rx_pools;
7792 /* Hardware has a limited number of available pools. Each VF, and the
7793 * PF require a pool. Check to ensure we don't attempt to use more
7794 * then the available number of pools.
7796 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
7797 return ERR_PTR(-EINVAL);
7800 if (vdev->num_rx_queues != vdev->num_tx_queues) {
7801 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
7803 return ERR_PTR(-EINVAL);
7806 /* Check for hardware restriction on number of rx/tx queues */
7807 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
7808 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
7810 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7812 return ERR_PTR(-EINVAL);
7815 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7816 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
7817 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
7818 return ERR_PTR(-EBUSY);
7820 fwd_adapter = kcalloc(1, sizeof(struct ixgbe_fwd_adapter), GFP_KERNEL);
7822 return ERR_PTR(-ENOMEM);
7824 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
7825 adapter->num_rx_pools++;
7826 set_bit(pool, &adapter->fwd_bitmask);
7827 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7829 /* Enable VMDq flag so device will be set in VM mode */
7830 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
7831 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7832 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
7834 /* Force reinit of ring allocation with VMDQ enabled */
7835 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7838 fwd_adapter->pool = pool;
7839 fwd_adapter->real_adapter = adapter;
7840 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
7843 netif_tx_start_all_queues(vdev);
7846 /* unwind counter and free adapter struct */
7848 "%s: dfwd hardware acceleration failed\n", vdev->name);
7849 clear_bit(pool, &adapter->fwd_bitmask);
7850 adapter->num_rx_pools--;
7852 return ERR_PTR(err);
7855 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
7857 struct ixgbe_fwd_adapter *fwd_adapter = priv;
7858 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
7861 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
7862 adapter->num_rx_pools--;
7864 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7865 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7866 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
7867 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7868 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7869 fwd_adapter->pool, adapter->num_rx_pools,
7870 fwd_adapter->rx_base_queue,
7871 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
7872 adapter->fwd_bitmask);
7876 static const struct net_device_ops ixgbe_netdev_ops = {
7877 .ndo_open = ixgbe_open,
7878 .ndo_stop = ixgbe_close,
7879 .ndo_start_xmit = ixgbe_xmit_frame,
7880 .ndo_select_queue = ixgbe_select_queue,
7881 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7882 .ndo_validate_addr = eth_validate_addr,
7883 .ndo_set_mac_address = ixgbe_set_mac,
7884 .ndo_change_mtu = ixgbe_change_mtu,
7885 .ndo_tx_timeout = ixgbe_tx_timeout,
7886 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7887 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7888 .ndo_do_ioctl = ixgbe_ioctl,
7889 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7890 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7891 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
7892 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7893 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7894 .ndo_get_stats64 = ixgbe_get_stats64,
7895 #ifdef CONFIG_IXGBE_DCB
7896 .ndo_setup_tc = ixgbe_setup_tc,
7898 #ifdef CONFIG_NET_POLL_CONTROLLER
7899 .ndo_poll_controller = ixgbe_netpoll,
7901 #ifdef CONFIG_NET_RX_BUSY_POLL
7902 .ndo_busy_poll = ixgbe_low_latency_recv,
7905 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7906 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7907 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7908 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7909 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7910 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7911 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7912 #endif /* IXGBE_FCOE */
7913 .ndo_set_features = ixgbe_set_features,
7914 .ndo_fix_features = ixgbe_fix_features,
7915 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7916 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
7917 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
7918 .ndo_dfwd_add_station = ixgbe_fwd_add,
7919 .ndo_dfwd_del_station = ixgbe_fwd_del,
7923 * ixgbe_enumerate_functions - Get the number of ports this device has
7924 * @adapter: adapter structure
7926 * This function enumerates the phsyical functions co-located on a single slot,
7927 * in order to determine how many ports a device has. This is most useful in
7928 * determining the required GT/s of PCIe bandwidth necessary for optimal
7931 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
7933 struct pci_dev *entry, *pdev = adapter->pdev;
7936 /* Some cards can not use the generic count PCIe functions method,
7937 * because they are behind a parent switch, so we hardcode these with
7938 * the correct number of functions.
7940 if (ixgbe_pcie_from_parent(&adapter->hw))
7943 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
7944 /* don't count virtual functions */
7945 if (entry->is_virtfn)
7948 /* When the devices on the bus don't all match our device ID,
7949 * we can't reliably determine the correct number of
7950 * functions. This can occur if a function has been direct
7951 * attached to a virtual machine using VT-d, for example. In
7952 * this case, simply return -1 to indicate this.
7954 if ((entry->vendor != pdev->vendor) ||
7955 (entry->device != pdev->device))
7965 * ixgbe_wol_supported - Check whether device supports WoL
7966 * @hw: hw specific details
7967 * @device_id: the device ID
7968 * @subdev_id: the subsystem device ID
7970 * This function is used by probe and ethtool to determine
7971 * which devices have WoL support
7974 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
7977 struct ixgbe_hw *hw = &adapter->hw;
7978 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
7979 int is_wol_supported = 0;
7981 switch (device_id) {
7982 case IXGBE_DEV_ID_82599_SFP:
7983 /* Only these subdevices could supports WOL */
7984 switch (subdevice_id) {
7985 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
7986 case IXGBE_SUBDEV_ID_82599_560FLR:
7987 /* only support first port */
7988 if (hw->bus.func != 0)
7990 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
7991 case IXGBE_SUBDEV_ID_82599_SFP:
7992 case IXGBE_SUBDEV_ID_82599_RNDC:
7993 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
7994 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
7995 is_wol_supported = 1;
7999 case IXGBE_DEV_ID_82599EN_SFP:
8000 /* Only this subdevice supports WOL */
8001 switch (subdevice_id) {
8002 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8003 is_wol_supported = 1;
8007 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8008 /* All except this subdevice support WOL */
8009 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8010 is_wol_supported = 1;
8012 case IXGBE_DEV_ID_82599_KX4:
8013 is_wol_supported = 1;
8015 case IXGBE_DEV_ID_X540T:
8016 case IXGBE_DEV_ID_X540T1:
8017 /* check eeprom to see if enabled wol */
8018 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8019 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8020 (hw->bus.func == 0))) {
8021 is_wol_supported = 1;
8026 return is_wol_supported;
8030 * ixgbe_probe - Device Initialization Routine
8031 * @pdev: PCI device information struct
8032 * @ent: entry in ixgbe_pci_tbl
8034 * Returns 0 on success, negative on failure
8036 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8037 * The OS initialization, configuring of the adapter private structure,
8038 * and a hardware reset occur.
8040 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8042 struct net_device *netdev;
8043 struct ixgbe_adapter *adapter = NULL;
8044 struct ixgbe_hw *hw;
8045 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8046 int i, err, pci_using_dac, expected_gts;
8047 unsigned int indices = MAX_TX_QUEUES;
8048 u8 part_str[IXGBE_PBANUM_LENGTH];
8049 bool disable_dev = false;
8055 /* Catch broken hardware that put the wrong VF device ID in
8056 * the PCIe SR-IOV capability.
8058 if (pdev->is_virtfn) {
8059 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8060 pci_name(pdev), pdev->vendor, pdev->device);
8064 err = pci_enable_device_mem(pdev);
8068 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8071 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8074 "No usable DMA configuration, aborting\n");
8080 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8081 IORESOURCE_MEM), ixgbe_driver_name);
8084 "pci_request_selected_regions failed 0x%x\n", err);
8088 pci_enable_pcie_error_reporting(pdev);
8090 pci_set_master(pdev);
8091 pci_save_state(pdev);
8093 if (ii->mac == ixgbe_mac_82598EB) {
8094 #ifdef CONFIG_IXGBE_DCB
8095 /* 8 TC w/ 4 queues per TC */
8096 indices = 4 * MAX_TRAFFIC_CLASS;
8098 indices = IXGBE_MAX_RSS_INDICES;
8102 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8105 goto err_alloc_etherdev;
8108 SET_NETDEV_DEV(netdev, &pdev->dev);
8110 adapter = netdev_priv(netdev);
8111 pci_set_drvdata(pdev, adapter);
8113 adapter->netdev = netdev;
8114 adapter->pdev = pdev;
8117 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8119 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8120 pci_resource_len(pdev, 0));
8121 adapter->io_addr = hw->hw_addr;
8127 netdev->netdev_ops = &ixgbe_netdev_ops;
8128 ixgbe_set_ethtool_ops(netdev);
8129 netdev->watchdog_timeo = 5 * HZ;
8130 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8133 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8134 hw->mac.type = ii->mac;
8137 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8138 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
8139 if (ixgbe_removed(hw->hw_addr)) {
8143 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8144 if (!(eec & (1 << 8)))
8145 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8148 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8149 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8150 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8151 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8152 hw->phy.mdio.mmds = 0;
8153 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8154 hw->phy.mdio.dev = netdev;
8155 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8156 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8158 ii->get_invariants(hw);
8160 /* setup the private structure */
8161 err = ixgbe_sw_init(adapter);
8165 /* Make it possible the adapter to be woken up via WOL */
8166 switch (adapter->hw.mac.type) {
8167 case ixgbe_mac_82599EB:
8168 case ixgbe_mac_X540:
8169 case ixgbe_mac_X550:
8170 case ixgbe_mac_X550EM_x:
8171 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8178 * If there is a fan on this device and it has failed log the
8181 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8182 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8183 if (esdp & IXGBE_ESDP_SDP1)
8184 e_crit(probe, "Fan has stopped, replace the adapter\n");
8187 if (allow_unsupported_sfp)
8188 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8190 /* reset_hw fills in the perm_addr as well */
8191 hw->phy.reset_if_overtemp = true;
8192 err = hw->mac.ops.reset_hw(hw);
8193 hw->phy.reset_if_overtemp = false;
8194 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8195 hw->mac.type == ixgbe_mac_82598EB) {
8197 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8198 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8199 e_dev_err("Reload the driver after installing a supported module.\n");
8202 e_dev_err("HW Init failed: %d\n", err);
8206 #ifdef CONFIG_PCI_IOV
8207 /* SR-IOV not supported on the 82598 */
8208 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8211 ixgbe_init_mbx_params_pf(hw);
8212 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8213 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8214 ixgbe_enable_sriov(adapter);
8218 netdev->features = NETIF_F_SG |
8221 NETIF_F_HW_VLAN_CTAG_TX |
8222 NETIF_F_HW_VLAN_CTAG_RX |
8223 NETIF_F_HW_VLAN_CTAG_FILTER |
8229 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8231 switch (adapter->hw.mac.type) {
8232 case ixgbe_mac_82599EB:
8233 case ixgbe_mac_X540:
8234 case ixgbe_mac_X550:
8235 case ixgbe_mac_X550EM_x:
8236 netdev->features |= NETIF_F_SCTP_CSUM;
8237 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8244 netdev->hw_features |= NETIF_F_RXALL;
8246 netdev->vlan_features |= NETIF_F_TSO;
8247 netdev->vlan_features |= NETIF_F_TSO6;
8248 netdev->vlan_features |= NETIF_F_IP_CSUM;
8249 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8250 netdev->vlan_features |= NETIF_F_SG;
8252 netdev->priv_flags |= IFF_UNICAST_FLT;
8253 netdev->priv_flags |= IFF_SUPP_NOFCS;
8255 #ifdef CONFIG_IXGBE_DCB
8256 netdev->dcbnl_ops = &dcbnl_ops;
8260 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8261 unsigned int fcoe_l;
8263 if (hw->mac.ops.get_device_caps) {
8264 hw->mac.ops.get_device_caps(hw, &device_caps);
8265 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8266 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8270 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8271 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8273 netdev->features |= NETIF_F_FSO |
8276 netdev->vlan_features |= NETIF_F_FSO |
8280 #endif /* IXGBE_FCOE */
8281 if (pci_using_dac) {
8282 netdev->features |= NETIF_F_HIGHDMA;
8283 netdev->vlan_features |= NETIF_F_HIGHDMA;
8286 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8287 netdev->hw_features |= NETIF_F_LRO;
8288 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8289 netdev->features |= NETIF_F_LRO;
8291 /* make sure the EEPROM is good */
8292 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8293 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8298 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8300 if (!is_valid_ether_addr(netdev->dev_addr)) {
8301 e_dev_err("invalid MAC address\n");
8306 ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8308 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8309 (unsigned long) adapter);
8311 if (ixgbe_removed(hw->hw_addr)) {
8315 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8316 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8317 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8319 err = ixgbe_init_interrupt_scheme(adapter);
8323 /* WOL not supported for all devices */
8325 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8326 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8327 pdev->subsystem_device);
8328 if (hw->wol_enabled)
8329 adapter->wol = IXGBE_WUFC_MAG;
8331 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8333 /* save off EEPROM version number */
8334 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8335 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8337 /* pick up the PCI bus settings for reporting later */
8338 hw->mac.ops.get_bus_info(hw);
8339 if (ixgbe_pcie_from_parent(hw))
8340 ixgbe_get_parent_bus_info(adapter);
8342 /* calculate the expected PCIe bandwidth required for optimal
8343 * performance. Note that some older parts will never have enough
8344 * bandwidth due to being older generation PCIe parts. We clamp these
8345 * parts to ensure no warning is displayed if it can't be fixed.
8347 switch (hw->mac.type) {
8348 case ixgbe_mac_82598EB:
8349 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8352 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8356 /* don't check link if we failed to enumerate functions */
8357 if (expected_gts > 0)
8358 ixgbe_check_minimum_link(adapter, expected_gts);
8360 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8362 strlcpy(part_str, "Unknown", sizeof(part_str));
8363 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8364 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8365 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8368 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8369 hw->mac.type, hw->phy.type, part_str);
8371 e_dev_info("%pM\n", netdev->dev_addr);
8373 /* reset the hardware with the new settings */
8374 err = hw->mac.ops.start_hw(hw);
8375 if (err == IXGBE_ERR_EEPROM_VERSION) {
8376 /* We are running on a pre-production device, log a warning */
8377 e_dev_warn("This device is a pre-production adapter/LOM. "
8378 "Please be aware there may be issues associated "
8379 "with your hardware. If you are experiencing "
8380 "problems please contact your Intel or hardware "
8381 "representative who provided you with this "
8384 strcpy(netdev->name, "eth%d");
8385 err = register_netdev(netdev);
8389 /* power down the optics for 82599 SFP+ fiber */
8390 if (hw->mac.ops.disable_tx_laser)
8391 hw->mac.ops.disable_tx_laser(hw);
8393 /* carrier off reporting is important to ethtool even BEFORE open */
8394 netif_carrier_off(netdev);
8396 #ifdef CONFIG_IXGBE_DCA
8397 if (dca_add_requester(&pdev->dev) == 0) {
8398 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8399 ixgbe_setup_dca(adapter);
8402 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8403 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8404 for (i = 0; i < adapter->num_vfs; i++)
8405 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8408 /* firmware requires driver version to be 0xFFFFFFFF
8409 * since os does not support feature
8411 if (hw->mac.ops.set_fw_drv_ver)
8412 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8415 /* add san mac addr to netdev */
8416 ixgbe_add_sanmac_netdev(netdev);
8418 e_dev_info("%s\n", ixgbe_default_device_descr);
8420 #ifdef CONFIG_IXGBE_HWMON
8421 if (ixgbe_sysfs_init(adapter))
8422 e_err(probe, "failed to allocate sysfs resources\n");
8423 #endif /* CONFIG_IXGBE_HWMON */
8425 ixgbe_dbg_adapter_init(adapter);
8427 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8428 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8429 hw->mac.ops.setup_link(hw,
8430 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8436 ixgbe_release_hw_control(adapter);
8437 ixgbe_clear_interrupt_scheme(adapter);
8439 ixgbe_disable_sriov(adapter);
8440 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8441 iounmap(adapter->io_addr);
8442 kfree(adapter->mac_table);
8444 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8445 free_netdev(netdev);
8447 pci_release_selected_regions(pdev,
8448 pci_select_bars(pdev, IORESOURCE_MEM));
8451 if (!adapter || disable_dev)
8452 pci_disable_device(pdev);
8457 * ixgbe_remove - Device Removal Routine
8458 * @pdev: PCI device information struct
8460 * ixgbe_remove is called by the PCI subsystem to alert the driver
8461 * that it should release a PCI device. The could be caused by a
8462 * Hot-Plug event, or because the driver is going to be removed from
8465 static void ixgbe_remove(struct pci_dev *pdev)
8467 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8468 struct net_device *netdev = adapter->netdev;
8471 ixgbe_dbg_adapter_exit(adapter);
8473 set_bit(__IXGBE_REMOVING, &adapter->state);
8474 cancel_work_sync(&adapter->service_task);
8477 #ifdef CONFIG_IXGBE_DCA
8478 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
8479 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
8480 dca_remove_requester(&pdev->dev);
8481 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
8485 #ifdef CONFIG_IXGBE_HWMON
8486 ixgbe_sysfs_exit(adapter);
8487 #endif /* CONFIG_IXGBE_HWMON */
8489 /* remove the added san mac */
8490 ixgbe_del_sanmac_netdev(netdev);
8492 if (netdev->reg_state == NETREG_REGISTERED)
8493 unregister_netdev(netdev);
8495 #ifdef CONFIG_PCI_IOV
8497 * Only disable SR-IOV on unload if the user specified the now
8498 * deprecated max_vfs module parameter.
8501 ixgbe_disable_sriov(adapter);
8503 ixgbe_clear_interrupt_scheme(adapter);
8505 ixgbe_release_hw_control(adapter);
8508 kfree(adapter->ixgbe_ieee_pfc);
8509 kfree(adapter->ixgbe_ieee_ets);
8512 iounmap(adapter->io_addr);
8513 pci_release_selected_regions(pdev, pci_select_bars(pdev,
8516 e_dev_info("complete\n");
8518 kfree(adapter->mac_table);
8519 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
8520 free_netdev(netdev);
8522 pci_disable_pcie_error_reporting(pdev);
8525 pci_disable_device(pdev);
8529 * ixgbe_io_error_detected - called when PCI error is detected
8530 * @pdev: Pointer to PCI device
8531 * @state: The current pci connection state
8533 * This function is called after a PCI bus error affecting
8534 * this device has been detected.
8536 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8537 pci_channel_state_t state)
8539 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8540 struct net_device *netdev = adapter->netdev;
8542 #ifdef CONFIG_PCI_IOV
8543 struct ixgbe_hw *hw = &adapter->hw;
8544 struct pci_dev *bdev, *vfdev;
8545 u32 dw0, dw1, dw2, dw3;
8547 u16 req_id, pf_func;
8549 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
8550 adapter->num_vfs == 0)
8551 goto skip_bad_vf_detection;
8553 bdev = pdev->bus->self;
8554 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
8555 bdev = bdev->bus->self;
8558 goto skip_bad_vf_detection;
8560 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
8562 goto skip_bad_vf_detection;
8564 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
8565 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
8566 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
8567 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
8568 if (ixgbe_removed(hw->hw_addr))
8569 goto skip_bad_vf_detection;
8572 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8573 if (!(req_id & 0x0080))
8574 goto skip_bad_vf_detection;
8576 pf_func = req_id & 0x01;
8577 if ((pf_func & 1) == (pdev->devfn & 1)) {
8578 unsigned int device_id;
8580 vf = (req_id & 0x7F) >> 1;
8581 e_dev_err("VF %d has caused a PCIe error\n", vf);
8582 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8583 "%8.8x\tdw3: %8.8x\n",
8584 dw0, dw1, dw2, dw3);
8585 switch (adapter->hw.mac.type) {
8586 case ixgbe_mac_82599EB:
8587 device_id = IXGBE_82599_VF_DEVICE_ID;
8589 case ixgbe_mac_X540:
8590 device_id = IXGBE_X540_VF_DEVICE_ID;
8592 case ixgbe_mac_X550:
8593 device_id = IXGBE_DEV_ID_X550_VF;
8595 case ixgbe_mac_X550EM_x:
8596 device_id = IXGBE_DEV_ID_X550EM_X_VF;
8603 /* Find the pci device of the offending VF */
8604 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
8606 if (vfdev->devfn == (req_id & 0xFF))
8608 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
8612 * There's a slim chance the VF could have been hot plugged,
8613 * so if it is no longer present we don't need to issue the
8614 * VFLR. Just clean up the AER in that case.
8617 e_dev_err("Issuing VFLR to VF %d\n", vf);
8618 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
8619 /* Free device reference count */
8623 pci_cleanup_aer_uncorrect_error_status(pdev);
8627 * Even though the error may have occurred on the other port
8628 * we still need to increment the vf error reference count for
8629 * both ports because the I/O resume function will be called
8632 adapter->vferr_refcount++;
8634 return PCI_ERS_RESULT_RECOVERED;
8636 skip_bad_vf_detection:
8637 #endif /* CONFIG_PCI_IOV */
8638 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
8639 return PCI_ERS_RESULT_DISCONNECT;
8642 netif_device_detach(netdev);
8644 if (state == pci_channel_io_perm_failure) {
8646 return PCI_ERS_RESULT_DISCONNECT;
8649 if (netif_running(netdev))
8650 ixgbe_down(adapter);
8652 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
8653 pci_disable_device(pdev);
8656 /* Request a slot reset. */
8657 return PCI_ERS_RESULT_NEED_RESET;
8661 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8662 * @pdev: Pointer to PCI device
8664 * Restart the card from scratch, as if from a cold-boot.
8666 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
8668 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8669 pci_ers_result_t result;
8672 if (pci_enable_device_mem(pdev)) {
8673 e_err(probe, "Cannot re-enable PCI device after reset.\n");
8674 result = PCI_ERS_RESULT_DISCONNECT;
8676 smp_mb__before_atomic();
8677 clear_bit(__IXGBE_DISABLED, &adapter->state);
8678 adapter->hw.hw_addr = adapter->io_addr;
8679 pci_set_master(pdev);
8680 pci_restore_state(pdev);
8681 pci_save_state(pdev);
8683 pci_wake_from_d3(pdev, false);
8685 ixgbe_reset(adapter);
8686 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8687 result = PCI_ERS_RESULT_RECOVERED;
8690 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8692 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8693 "failed 0x%0x\n", err);
8694 /* non-fatal, continue */
8701 * ixgbe_io_resume - called when traffic can start flowing again.
8702 * @pdev: Pointer to PCI device
8704 * This callback is called when the error recovery driver tells us that
8705 * its OK to resume normal operation.
8707 static void ixgbe_io_resume(struct pci_dev *pdev)
8709 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8710 struct net_device *netdev = adapter->netdev;
8712 #ifdef CONFIG_PCI_IOV
8713 if (adapter->vferr_refcount) {
8714 e_info(drv, "Resuming after VF err\n");
8715 adapter->vferr_refcount--;
8720 if (netif_running(netdev))
8723 netif_device_attach(netdev);
8726 static const struct pci_error_handlers ixgbe_err_handler = {
8727 .error_detected = ixgbe_io_error_detected,
8728 .slot_reset = ixgbe_io_slot_reset,
8729 .resume = ixgbe_io_resume,
8732 static struct pci_driver ixgbe_driver = {
8733 .name = ixgbe_driver_name,
8734 .id_table = ixgbe_pci_tbl,
8735 .probe = ixgbe_probe,
8736 .remove = ixgbe_remove,
8738 .suspend = ixgbe_suspend,
8739 .resume = ixgbe_resume,
8741 .shutdown = ixgbe_shutdown,
8742 .sriov_configure = ixgbe_pci_sriov_configure,
8743 .err_handler = &ixgbe_err_handler
8747 * ixgbe_init_module - Driver Registration Routine
8749 * ixgbe_init_module is the first routine called when the driver is
8750 * loaded. All it does is register with the PCI subsystem.
8752 static int __init ixgbe_init_module(void)
8755 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
8756 pr_info("%s\n", ixgbe_copyright);
8760 ret = pci_register_driver(&ixgbe_driver);
8766 #ifdef CONFIG_IXGBE_DCA
8767 dca_register_notify(&dca_notifier);
8773 module_init(ixgbe_init_module);
8776 * ixgbe_exit_module - Driver Exit Cleanup Routine
8778 * ixgbe_exit_module is called just before the driver is removed
8781 static void __exit ixgbe_exit_module(void)
8783 #ifdef CONFIG_IXGBE_DCA
8784 dca_unregister_notify(&dca_notifier);
8786 pci_unregister_driver(&ixgbe_driver);
8790 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8793 #ifdef CONFIG_IXGBE_DCA
8794 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
8799 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
8800 __ixgbe_notify_dca);
8802 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
8805 #endif /* CONFIG_IXGBE_DCA */
8807 module_exit(ixgbe_exit_module);