2 * Copyright (c) 2012 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
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8 * OpenIB.org BSD license below:
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11 * without modification, are permitted provided that the following
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15 * copyright notice, this list of conditions and the following
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19 * copyright notice, this list of conditions and the following
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21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/device.h>
38 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
40 static cycle_t mlx4_en_read_clock(const struct cyclecounter *tc)
42 struct mlx4_en_dev *mdev =
43 container_of(tc, struct mlx4_en_dev, cycles);
44 struct mlx4_dev *dev = mdev->dev;
46 return mlx4_read_clock(dev) & tc->mask;
49 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
52 struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
54 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
55 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
60 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
61 struct skb_shared_hwtstamps *hwts,
67 read_lock_irqsave(&mdev->clock_lock, flags);
68 nsec = timecounter_cyc2time(&mdev->clock, timestamp);
69 read_unlock_irqrestore(&mdev->clock_lock, flags);
71 memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
72 hwts->hwtstamp = ns_to_ktime(nsec);
76 * mlx4_en_remove_timestamp - disable PTP device
77 * @mdev: board private structure
79 * Stop the PTP support.
81 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev)
83 if (mdev->ptp_clock) {
84 ptp_clock_unregister(mdev->ptp_clock);
85 mdev->ptp_clock = NULL;
86 mlx4_info(mdev, "removed PHC\n");
90 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
92 bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
93 mdev->overflow_period);
97 write_lock_irqsave(&mdev->clock_lock, flags);
98 timecounter_read(&mdev->clock);
99 write_unlock_irqrestore(&mdev->clock_lock, flags);
100 mdev->last_overflow_check = jiffies;
105 * mlx4_en_phc_adjfreq - adjust the frequency of the hardware clock
106 * @ptp: ptp clock structure
107 * @delta: Desired frequency change in parts per billion
109 * Adjust the frequency of the PHC cycle counter by the indicated delta from
110 * the base frequency.
112 static int mlx4_en_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
118 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
125 mult = mdev->nominal_c_mult;
128 diff = div_u64(adj, 1000000000ULL);
130 write_lock_irqsave(&mdev->clock_lock, flags);
131 timecounter_read(&mdev->clock);
132 mdev->cycles.mult = neg_adj ? mult - diff : mult + diff;
133 write_unlock_irqrestore(&mdev->clock_lock, flags);
139 * mlx4_en_phc_adjtime - Shift the time of the hardware clock
140 * @ptp: ptp clock structure
141 * @delta: Desired change in nanoseconds
143 * Adjust the timer by resetting the timecounter structure.
145 static int mlx4_en_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
147 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
151 write_lock_irqsave(&mdev->clock_lock, flags);
152 timecounter_adjtime(&mdev->clock, delta);
153 write_unlock_irqrestore(&mdev->clock_lock, flags);
159 * mlx4_en_phc_gettime - Reads the current time from the hardware clock
160 * @ptp: ptp clock structure
161 * @ts: timespec structure to hold the current time value
163 * Read the timecounter and return the correct value in ns after converting
164 * it into a struct timespec.
166 static int mlx4_en_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
168 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
174 write_lock_irqsave(&mdev->clock_lock, flags);
175 ns = timecounter_read(&mdev->clock);
176 write_unlock_irqrestore(&mdev->clock_lock, flags);
178 ts->tv_sec = div_u64_rem(ns, NSEC_PER_SEC, &remainder);
179 ts->tv_nsec = remainder;
185 * mlx4_en_phc_settime - Set the current time on the hardware clock
186 * @ptp: ptp clock structure
187 * @ts: timespec containing the new time for the cycle counter
189 * Reset the timecounter to use a new base value instead of the kernel
192 static int mlx4_en_phc_settime(struct ptp_clock_info *ptp,
193 const struct timespec *ts)
195 struct mlx4_en_dev *mdev = container_of(ptp, struct mlx4_en_dev,
197 u64 ns = timespec_to_ns(ts);
200 /* reset the timecounter */
201 write_lock_irqsave(&mdev->clock_lock, flags);
202 timecounter_init(&mdev->clock, &mdev->cycles, ns);
203 write_unlock_irqrestore(&mdev->clock_lock, flags);
209 * mlx4_en_phc_enable - enable or disable an ancillary feature
210 * @ptp: ptp clock structure
211 * @request: Desired resource to enable or disable
212 * @on: Caller passes one to enable or zero to disable
214 * Enable (or disable) ancillary features of the PHC subsystem.
215 * Currently, no ancillary features are supported.
217 static int mlx4_en_phc_enable(struct ptp_clock_info __always_unused *ptp,
218 struct ptp_clock_request __always_unused *request,
219 int __always_unused on)
224 static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
225 .owner = THIS_MODULE,
226 .max_adj = 100000000,
232 .adjfreq = mlx4_en_phc_adjfreq,
233 .adjtime = mlx4_en_phc_adjtime,
234 .gettime = mlx4_en_phc_gettime,
235 .settime = mlx4_en_phc_settime,
236 .enable = mlx4_en_phc_enable,
239 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
241 struct mlx4_dev *dev = mdev->dev;
245 rwlock_init(&mdev->clock_lock);
247 memset(&mdev->cycles, 0, sizeof(mdev->cycles));
248 mdev->cycles.read = mlx4_en_read_clock;
249 mdev->cycles.mask = CLOCKSOURCE_MASK(48);
250 /* Using shift to make calculation more accurate. Since current HW
251 * clock frequency is 427 MHz, and cycles are given using a 48 bits
252 * register, the biggest shift when calculating using u64, is 14
253 * (max_cycles * multiplier < 2^64)
255 mdev->cycles.shift = 14;
257 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
258 mdev->nominal_c_mult = mdev->cycles.mult;
260 write_lock_irqsave(&mdev->clock_lock, flags);
261 timecounter_init(&mdev->clock, &mdev->cycles,
262 ktime_to_ns(ktime_get_real()));
263 write_unlock_irqrestore(&mdev->clock_lock, flags);
265 /* Calculate period in seconds to call the overflow watchdog - to make
266 * sure counter is checked at least once every wrap around.
268 ns = cyclecounter_cyc2ns(&mdev->cycles, mdev->cycles.mask, zero, &zero);
269 do_div(ns, NSEC_PER_SEC / 2 / HZ);
270 mdev->overflow_period = ns;
272 /* Configure the PHC */
273 mdev->ptp_clock_info = mlx4_en_ptp_clock_info;
274 snprintf(mdev->ptp_clock_info.name, 16, "mlx4 ptp");
276 mdev->ptp_clock = ptp_clock_register(&mdev->ptp_clock_info,
278 if (IS_ERR(mdev->ptp_clock)) {
279 mdev->ptp_clock = NULL;
280 mlx4_err(mdev, "ptp_clock_register failed\n");
282 mlx4_info(mdev, "registered PHC clock\n");