vfat: don't use ->d_time
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36                               struct ethtool_drvinfo *drvinfo)
37 {
38         struct mlx5e_priv *priv = netdev_priv(dev);
39         struct mlx5_core_dev *mdev = priv->mdev;
40
41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42         strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43                 sizeof(drvinfo->version));
44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45                  "%d.%d.%d",
46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48                 sizeof(drvinfo->bus_info));
49 }
50
51 struct ptys2ethtool_config {
52         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
53         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
54         u32 speed;
55 };
56
57 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
58
59 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
60         ({                                                              \
61                 struct ptys2ethtool_config *cfg;                        \
62                 const unsigned int modes[] = { __VA_ARGS__ };           \
63                 unsigned int i;                                         \
64                 cfg = &ptys2ethtool_table[reg_];                        \
65                 cfg->speed = speed_;                                    \
66                 bitmap_zero(cfg->supported,                             \
67                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
68                 bitmap_zero(cfg->advertised,                            \
69                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
70                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
71                         __set_bit(modes[i], cfg->supported);            \
72                         __set_bit(modes[i], cfg->advertised);           \
73                 }                                                       \
74         })
75
76 void mlx5e_build_ptys2ethtool_map(void)
77 {
78         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
79                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
80         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
81                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
82         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
83                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
84         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
85                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
86         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
87                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
88         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
89                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
90         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
91                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
92         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
93                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
95                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
97                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
99                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
101                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
103                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
105                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
107                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
109                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
111                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
113                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
115                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
117                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
119                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
121                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
123                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
125                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
127                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
128 }
129
130 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
131 {
132         struct mlx5_core_dev *mdev = priv->mdev;
133         u8 pfc_en_tx;
134         u8 pfc_en_rx;
135         int err;
136
137         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
138
139         return err ? 0 : pfc_en_tx | pfc_en_rx;
140 }
141
142 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
143 {
144         struct mlx5_core_dev *mdev = priv->mdev;
145         u32 rx_pause;
146         u32 tx_pause;
147         int err;
148
149         err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
150
151         return err ? false : rx_pause | tx_pause;
152 }
153
154 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
155 #define MLX5E_NUM_RQ_STATS(priv) \
156         (NUM_RQ_STATS * priv->params.num_channels * \
157          test_bit(MLX5E_STATE_OPENED, &priv->state))
158 #define MLX5E_NUM_SQ_STATS(priv) \
159         (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
160          test_bit(MLX5E_STATE_OPENED, &priv->state))
161 #define MLX5E_NUM_PFC_COUNTERS(priv) \
162         ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
163           NUM_PPORT_PER_PRIO_PFC_COUNTERS)
164
165 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
166 {
167         struct mlx5e_priv *priv = netdev_priv(dev);
168
169         switch (sset) {
170         case ETH_SS_STATS:
171                 return NUM_SW_COUNTERS +
172                        MLX5E_NUM_Q_CNTRS(priv) +
173                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
174                        MLX5E_NUM_RQ_STATS(priv) +
175                        MLX5E_NUM_SQ_STATS(priv) +
176                        MLX5E_NUM_PFC_COUNTERS(priv);
177         case ETH_SS_PRIV_FLAGS:
178                 return ARRAY_SIZE(mlx5e_priv_flags);
179         /* fallthrough */
180         default:
181                 return -EOPNOTSUPP;
182         }
183 }
184
185 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
186 {
187         int i, j, tc, prio, idx = 0;
188         unsigned long pfc_combined;
189
190         /* SW counters */
191         for (i = 0; i < NUM_SW_COUNTERS; i++)
192                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
193
194         /* Q counters */
195         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
196                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
197
198         /* VPORT counters */
199         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
200                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
201                        vport_stats_desc[i].format);
202
203         /* PPORT counters */
204         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
205                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
206                        pport_802_3_stats_desc[i].format);
207
208         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
209                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
210                        pport_2863_stats_desc[i].format);
211
212         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
213                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
214                        pport_2819_stats_desc[i].format);
215
216         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
217                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
218                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
219                                 pport_per_prio_traffic_stats_desc[i].format, prio);
220         }
221
222         pfc_combined = mlx5e_query_pfc_combined(priv);
223         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
224                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
225                         char pfc_string[ETH_GSTRING_LEN];
226
227                         snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
228                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
229                                 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
230                 }
231         }
232
233         if (mlx5e_query_global_pause_combined(priv)) {
234                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
235                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
236                                 pport_per_prio_pfc_stats_desc[i].format, "global");
237                 }
238         }
239
240         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
241                 return;
242
243         /* per channel counters */
244         for (i = 0; i < priv->params.num_channels; i++)
245                 for (j = 0; j < NUM_RQ_STATS; j++)
246                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
247                                 rq_stats_desc[j].format, i);
248
249         for (tc = 0; tc < priv->params.num_tc; tc++)
250                 for (i = 0; i < priv->params.num_channels; i++)
251                         for (j = 0; j < NUM_SQ_STATS; j++)
252                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
253                                         sq_stats_desc[j].format,
254                                         priv->channeltc_to_txq_map[i][tc]);
255 }
256
257 static void mlx5e_get_strings(struct net_device *dev,
258                               uint32_t stringset, uint8_t *data)
259 {
260         struct mlx5e_priv *priv = netdev_priv(dev);
261         int i;
262
263         switch (stringset) {
264         case ETH_SS_PRIV_FLAGS:
265                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
266                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
267                 break;
268
269         case ETH_SS_TEST:
270                 break;
271
272         case ETH_SS_STATS:
273                 mlx5e_fill_stats_strings(priv, data);
274                 break;
275         }
276 }
277
278 static void mlx5e_get_ethtool_stats(struct net_device *dev,
279                                     struct ethtool_stats *stats, u64 *data)
280 {
281         struct mlx5e_priv *priv = netdev_priv(dev);
282         int i, j, tc, prio, idx = 0;
283         unsigned long pfc_combined;
284
285         if (!data)
286                 return;
287
288         mutex_lock(&priv->state_lock);
289         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
290                 mlx5e_update_stats(priv);
291         mutex_unlock(&priv->state_lock);
292
293         for (i = 0; i < NUM_SW_COUNTERS; i++)
294                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
295                                                    sw_stats_desc, i);
296
297         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
298                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
299                                                    q_stats_desc, i);
300
301         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
302                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
303                                                   vport_stats_desc, i);
304
305         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
306                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
307                                                   pport_802_3_stats_desc, i);
308
309         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
310                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
311                                                   pport_2863_stats_desc, i);
312
313         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
314                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
315                                                   pport_2819_stats_desc, i);
316
317         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
318                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
319                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
320                                                  pport_per_prio_traffic_stats_desc, i);
321         }
322
323         pfc_combined = mlx5e_query_pfc_combined(priv);
324         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
325                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
326                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
327                                                           pport_per_prio_pfc_stats_desc, i);
328                 }
329         }
330
331         if (mlx5e_query_global_pause_combined(priv)) {
332                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
333                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
334                                                           pport_per_prio_pfc_stats_desc, 0);
335                 }
336         }
337
338         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
339                 return;
340
341         /* per channel counters */
342         for (i = 0; i < priv->params.num_channels; i++)
343                 for (j = 0; j < NUM_RQ_STATS; j++)
344                         data[idx++] =
345                                MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
346                                                     rq_stats_desc, j);
347
348         for (tc = 0; tc < priv->params.num_tc; tc++)
349                 for (i = 0; i < priv->params.num_channels; i++)
350                         for (j = 0; j < NUM_SQ_STATS; j++)
351                                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
352                                                                    sq_stats_desc, j);
353 }
354
355 static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
356                                     int num_wqe)
357 {
358         int packets_per_wqe;
359         int stride_size;
360         int num_strides;
361         int wqe_size;
362
363         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
364                 return num_wqe;
365
366         stride_size = 1 << priv->params.mpwqe_log_stride_sz;
367         num_strides = 1 << priv->params.mpwqe_log_num_strides;
368         wqe_size = stride_size * num_strides;
369
370         packets_per_wqe = wqe_size /
371                           ALIGN(ETH_DATA_LEN, stride_size);
372         return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1));
373 }
374
375 static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
376                                     int num_packets)
377 {
378         int packets_per_wqe;
379         int stride_size;
380         int num_strides;
381         int wqe_size;
382         int num_wqes;
383
384         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
385                 return num_packets;
386
387         stride_size = 1 << priv->params.mpwqe_log_stride_sz;
388         num_strides = 1 << priv->params.mpwqe_log_num_strides;
389         wqe_size = stride_size * num_strides;
390
391         num_packets = (1 << order_base_2(num_packets));
392
393         packets_per_wqe = wqe_size /
394                           ALIGN(ETH_DATA_LEN, stride_size);
395         num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe);
396         return 1 << (order_base_2(num_wqes));
397 }
398
399 static void mlx5e_get_ringparam(struct net_device *dev,
400                                 struct ethtool_ringparam *param)
401 {
402         struct mlx5e_priv *priv = netdev_priv(dev);
403         int rq_wq_type = priv->params.rq_wq_type;
404
405         param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
406                                                          1 << mlx5_max_log_rq_size(rq_wq_type));
407         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
408         param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
409                                                      1 << priv->params.log_rq_size);
410         param->tx_pending     = 1 << priv->params.log_sq_size;
411 }
412
413 static int mlx5e_set_ringparam(struct net_device *dev,
414                                struct ethtool_ringparam *param)
415 {
416         struct mlx5e_priv *priv = netdev_priv(dev);
417         bool was_opened;
418         int rq_wq_type = priv->params.rq_wq_type;
419         u32 rx_pending_wqes;
420         u32 min_rq_size;
421         u32 max_rq_size;
422         u16 min_rx_wqes;
423         u8 log_rq_size;
424         u8 log_sq_size;
425         u32 num_mtts;
426         int err = 0;
427
428         if (param->rx_jumbo_pending) {
429                 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
430                             __func__);
431                 return -EINVAL;
432         }
433         if (param->rx_mini_pending) {
434                 netdev_info(dev, "%s: rx_mini_pending not supported\n",
435                             __func__);
436                 return -EINVAL;
437         }
438
439         min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
440                                                1 << mlx5_min_log_rq_size(rq_wq_type));
441         max_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
442                                                1 << mlx5_max_log_rq_size(rq_wq_type));
443         rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type,
444                                                    param->rx_pending);
445
446         if (param->rx_pending < min_rq_size) {
447                 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
448                             __func__, param->rx_pending,
449                             min_rq_size);
450                 return -EINVAL;
451         }
452         if (param->rx_pending > max_rq_size) {
453                 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
454                             __func__, param->rx_pending,
455                             max_rq_size);
456                 return -EINVAL;
457         }
458
459         num_mtts = MLX5E_REQUIRED_MTTS(priv->params.num_channels,
460                                        rx_pending_wqes);
461         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
462             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
463                 netdev_info(dev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
464                             __func__, param->rx_pending);
465                 return -EINVAL;
466         }
467
468         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
469                 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
470                             __func__, param->tx_pending,
471                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
472                 return -EINVAL;
473         }
474         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
475                 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
476                             __func__, param->tx_pending,
477                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
478                 return -EINVAL;
479         }
480
481         log_rq_size = order_base_2(rx_pending_wqes);
482         log_sq_size = order_base_2(param->tx_pending);
483         min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, rx_pending_wqes);
484
485         if (log_rq_size == priv->params.log_rq_size &&
486             log_sq_size == priv->params.log_sq_size &&
487             min_rx_wqes == priv->params.min_rx_wqes)
488                 return 0;
489
490         mutex_lock(&priv->state_lock);
491
492         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
493         if (was_opened)
494                 mlx5e_close_locked(dev);
495
496         priv->params.log_rq_size = log_rq_size;
497         priv->params.log_sq_size = log_sq_size;
498         priv->params.min_rx_wqes = min_rx_wqes;
499
500         if (was_opened)
501                 err = mlx5e_open_locked(dev);
502
503         mutex_unlock(&priv->state_lock);
504
505         return err;
506 }
507
508 static void mlx5e_get_channels(struct net_device *dev,
509                                struct ethtool_channels *ch)
510 {
511         struct mlx5e_priv *priv = netdev_priv(dev);
512
513         ch->max_combined   = mlx5e_get_max_num_channels(priv->mdev);
514         ch->combined_count = priv->params.num_channels;
515 }
516
517 static int mlx5e_set_channels(struct net_device *dev,
518                               struct ethtool_channels *ch)
519 {
520         struct mlx5e_priv *priv = netdev_priv(dev);
521         int ncv = mlx5e_get_max_num_channels(priv->mdev);
522         unsigned int count = ch->combined_count;
523         bool arfs_enabled;
524         bool was_opened;
525         u32 num_mtts;
526         int err = 0;
527
528         if (!count) {
529                 netdev_info(dev, "%s: combined_count=0 not supported\n",
530                             __func__);
531                 return -EINVAL;
532         }
533         if (ch->rx_count || ch->tx_count) {
534                 netdev_info(dev, "%s: separate rx/tx count not supported\n",
535                             __func__);
536                 return -EINVAL;
537         }
538         if (count > ncv) {
539                 netdev_info(dev, "%s: count (%d) > max (%d)\n",
540                             __func__, count, ncv);
541                 return -EINVAL;
542         }
543
544         num_mtts = MLX5E_REQUIRED_MTTS(count, BIT(priv->params.log_rq_size));
545         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
546             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
547                 netdev_info(dev, "%s: rx count (%d) request can't be satisfied, try to reduce.\n",
548                             __func__, count);
549                 return -EINVAL;
550         }
551
552         if (priv->params.num_channels == count)
553                 return 0;
554
555         mutex_lock(&priv->state_lock);
556
557         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
558         if (was_opened)
559                 mlx5e_close_locked(dev);
560
561         arfs_enabled = dev->features & NETIF_F_NTUPLE;
562         if (arfs_enabled)
563                 mlx5e_arfs_disable(priv);
564
565         priv->params.num_channels = count;
566         mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
567                                       MLX5E_INDIR_RQT_SIZE, count);
568
569         if (was_opened)
570                 err = mlx5e_open_locked(dev);
571         if (err)
572                 goto out;
573
574         if (arfs_enabled) {
575                 err = mlx5e_arfs_enable(priv);
576                 if (err)
577                         netdev_err(dev, "%s: mlx5e_arfs_enable failed: %d\n",
578                                    __func__, err);
579         }
580
581 out:
582         mutex_unlock(&priv->state_lock);
583
584         return err;
585 }
586
587 static int mlx5e_get_coalesce(struct net_device *netdev,
588                               struct ethtool_coalesce *coal)
589 {
590         struct mlx5e_priv *priv = netdev_priv(netdev);
591
592         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
593                 return -ENOTSUPP;
594
595         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation.usec;
596         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
597         coal->tx_coalesce_usecs       = priv->params.tx_cq_moderation.usec;
598         coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts;
599         coal->use_adaptive_rx_coalesce = priv->params.rx_am_enabled;
600
601         return 0;
602 }
603
604 static int mlx5e_set_coalesce(struct net_device *netdev,
605                               struct ethtool_coalesce *coal)
606 {
607         struct mlx5e_priv *priv    = netdev_priv(netdev);
608         struct mlx5_core_dev *mdev = priv->mdev;
609         struct mlx5e_channel *c;
610         bool restart =
611                 !!coal->use_adaptive_rx_coalesce != priv->params.rx_am_enabled;
612         bool was_opened;
613         int err = 0;
614         int tc;
615         int i;
616
617         if (!MLX5_CAP_GEN(mdev, cq_moderation))
618                 return -ENOTSUPP;
619
620         mutex_lock(&priv->state_lock);
621
622         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
623         if (was_opened && restart) {
624                 mlx5e_close_locked(netdev);
625                 priv->params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
626         }
627
628         priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
629         priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
630         priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
631         priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
632
633         if (!was_opened || restart)
634                 goto out;
635
636         for (i = 0; i < priv->params.num_channels; ++i) {
637                 c = priv->channel[i];
638
639                 for (tc = 0; tc < c->num_tc; tc++) {
640                         mlx5_core_modify_cq_moderation(mdev,
641                                                 &c->sq[tc].cq.mcq,
642                                                 coal->tx_coalesce_usecs,
643                                                 coal->tx_max_coalesced_frames);
644                 }
645
646                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
647                                                coal->rx_coalesce_usecs,
648                                                coal->rx_max_coalesced_frames);
649         }
650
651 out:
652         if (was_opened && restart)
653                 err = mlx5e_open_locked(netdev);
654
655         mutex_unlock(&priv->state_lock);
656         return err;
657 }
658
659 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
660                                         u32 eth_proto_cap)
661 {
662         int proto;
663
664         for_each_set_bit(proto, (unsigned long *)&eth_proto_cap, MLX5E_LINK_MODES_NUMBER)
665                 bitmap_or(supported_modes, supported_modes,
666                           ptys2ethtool_table[proto].supported,
667                           __ETHTOOL_LINK_MODE_MASK_NBITS);
668 }
669
670 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
671                                     u32 eth_proto_cap)
672 {
673         int proto;
674
675         for_each_set_bit(proto, (unsigned long *)&eth_proto_cap, MLX5E_LINK_MODES_NUMBER)
676                 bitmap_or(advertising_modes, advertising_modes,
677                           ptys2ethtool_table[proto].advertised,
678                           __ETHTOOL_LINK_MODE_MASK_NBITS);
679 }
680
681 static void ptys2ethtool_supported_port(struct ethtool_link_ksettings *link_ksettings,
682                                         u32 eth_proto_cap)
683 {
684         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
685                            | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
686                            | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
687                            | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
688                            | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
689                            | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
690                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, FIBRE);
691         }
692
693         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
694                            | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
695                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
696                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
697                            | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
698                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Backplane);
699         }
700 }
701
702 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
703 {
704         u32 max_speed = 0;
705         u32 proto_cap;
706         int err;
707         int i;
708
709         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
710         if (err)
711                 return err;
712
713         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
714                 if (proto_cap & MLX5E_PROT_MASK(i))
715                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
716
717         *speed = max_speed;
718         return 0;
719 }
720
721 static void get_speed_duplex(struct net_device *netdev,
722                              u32 eth_proto_oper,
723                              struct ethtool_link_ksettings *link_ksettings)
724 {
725         int i;
726         u32 speed = SPEED_UNKNOWN;
727         u8 duplex = DUPLEX_UNKNOWN;
728
729         if (!netif_carrier_ok(netdev))
730                 goto out;
731
732         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
733                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
734                         speed = ptys2ethtool_table[i].speed;
735                         duplex = DUPLEX_FULL;
736                         break;
737                 }
738         }
739 out:
740         link_ksettings->base.speed = speed;
741         link_ksettings->base.duplex = duplex;
742 }
743
744 static void get_supported(u32 eth_proto_cap,
745                           struct ethtool_link_ksettings *link_ksettings)
746 {
747         unsigned long *supported = link_ksettings->link_modes.supported;
748
749         ptys2ethtool_supported_port(link_ksettings, eth_proto_cap);
750         ptys2ethtool_supported_link(supported, eth_proto_cap);
751         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
752         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Asym_Pause);
753 }
754
755 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
756                             u8 rx_pause,
757                             struct ethtool_link_ksettings *link_ksettings)
758 {
759         unsigned long *advertising = link_ksettings->link_modes.advertising;
760
761         ptys2ethtool_adver_link(advertising, eth_proto_cap);
762         if (tx_pause)
763                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
764         if (tx_pause ^ rx_pause)
765                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
766 }
767
768 static u8 get_connector_port(u32 eth_proto)
769 {
770         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
771                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
772                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
773                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
774                         return PORT_FIBRE;
775         }
776
777         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
778                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
779                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
780                         return PORT_DA;
781         }
782
783         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
784                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
785                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
786                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
787                         return PORT_NONE;
788         }
789
790         return PORT_OTHER;
791 }
792
793 static void get_lp_advertising(u32 eth_proto_lp,
794                                struct ethtool_link_ksettings *link_ksettings)
795 {
796         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
797
798         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
799 }
800
801 static int mlx5e_get_link_ksettings(struct net_device *netdev,
802                                     struct ethtool_link_ksettings *link_ksettings)
803 {
804         struct mlx5e_priv *priv    = netdev_priv(netdev);
805         struct mlx5_core_dev *mdev = priv->mdev;
806         u32 out[MLX5_ST_SZ_DW(ptys_reg)];
807         u32 eth_proto_cap;
808         u32 eth_proto_admin;
809         u32 eth_proto_lp;
810         u32 eth_proto_oper;
811         u8 an_disable_admin;
812         u8 an_status;
813         int err;
814
815         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
816
817         if (err) {
818                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
819                            __func__, err);
820                 goto err_query_ptys;
821         }
822
823         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
824         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
825         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
826         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
827         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
828         an_status        = MLX5_GET(ptys_reg, out, an_status);
829
830         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
831         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
832
833         get_supported(eth_proto_cap, link_ksettings);
834         get_advertising(eth_proto_admin, 0, 0, link_ksettings);
835         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
836
837         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
838
839         link_ksettings->base.port = get_connector_port(eth_proto_oper);
840         get_lp_advertising(eth_proto_lp, link_ksettings);
841
842         if (an_status == MLX5_AN_COMPLETE)
843                 ethtool_link_ksettings_add_link_mode(link_ksettings,
844                                                      lp_advertising, Autoneg);
845
846         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
847                                                           AUTONEG_ENABLE;
848         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
849                                              Autoneg);
850         if (!an_disable_admin)
851                 ethtool_link_ksettings_add_link_mode(link_ksettings,
852                                                      advertising, Autoneg);
853
854 err_query_ptys:
855         return err;
856 }
857
858 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
859 {
860         u32 i, ptys_modes = 0;
861
862         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
863                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
864                                       link_modes,
865                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
866                         ptys_modes |= MLX5E_PROT_MASK(i);
867         }
868
869         return ptys_modes;
870 }
871
872 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
873 {
874         u32 i, speed_links = 0;
875
876         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
877                 if (ptys2ethtool_table[i].speed == speed)
878                         speed_links |= MLX5E_PROT_MASK(i);
879         }
880
881         return speed_links;
882 }
883
884 static int mlx5e_set_link_ksettings(struct net_device *netdev,
885                                     const struct ethtool_link_ksettings *link_ksettings)
886 {
887         struct mlx5e_priv *priv    = netdev_priv(netdev);
888         struct mlx5_core_dev *mdev = priv->mdev;
889         u32 eth_proto_cap, eth_proto_admin;
890         bool an_changes = false;
891         u8 an_disable_admin;
892         u8 an_disable_cap;
893         bool an_disable;
894         u32 link_modes;
895         u8 an_status;
896         u32 speed;
897         int err;
898
899         speed = link_ksettings->base.speed;
900
901         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
902                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
903                 mlx5e_ethtool2ptys_speed_link(speed);
904
905         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
906         if (err) {
907                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
908                            __func__, err);
909                 goto out;
910         }
911
912         link_modes = link_modes & eth_proto_cap;
913         if (!link_modes) {
914                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
915                            __func__);
916                 err = -EINVAL;
917                 goto out;
918         }
919
920         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
921         if (err) {
922                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
923                            __func__, err);
924                 goto out;
925         }
926
927         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
928                                 &an_disable_cap, &an_disable_admin);
929
930         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
931         an_changes = ((!an_disable && an_disable_admin) ||
932                       (an_disable && !an_disable_admin));
933
934         if (!an_changes && link_modes == eth_proto_admin)
935                 goto out;
936
937         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
938         mlx5_toggle_port_link(mdev);
939
940 out:
941         return err;
942 }
943
944 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
945 {
946         struct mlx5e_priv *priv = netdev_priv(netdev);
947
948         return sizeof(priv->params.toeplitz_hash_key);
949 }
950
951 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
952 {
953         return MLX5E_INDIR_RQT_SIZE;
954 }
955
956 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
957                           u8 *hfunc)
958 {
959         struct mlx5e_priv *priv = netdev_priv(netdev);
960
961         if (indir)
962                 memcpy(indir, priv->params.indirection_rqt,
963                        sizeof(priv->params.indirection_rqt));
964
965         if (key)
966                 memcpy(key, priv->params.toeplitz_hash_key,
967                        sizeof(priv->params.toeplitz_hash_key));
968
969         if (hfunc)
970                 *hfunc = priv->params.rss_hfunc;
971
972         return 0;
973 }
974
975 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
976 {
977         struct mlx5_core_dev *mdev = priv->mdev;
978         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
979         int i;
980
981         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
982         mlx5e_build_tir_ctx_hash(tirc, priv);
983
984         for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
985                 mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen);
986 }
987
988 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
989                           const u8 *key, const u8 hfunc)
990 {
991         struct mlx5e_priv *priv = netdev_priv(dev);
992         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
993         void *in;
994
995         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
996             (hfunc != ETH_RSS_HASH_XOR) &&
997             (hfunc != ETH_RSS_HASH_TOP))
998                 return -EINVAL;
999
1000         in = mlx5_vzalloc(inlen);
1001         if (!in)
1002                 return -ENOMEM;
1003
1004         mutex_lock(&priv->state_lock);
1005
1006         if (indir) {
1007                 u32 rqtn = priv->indir_rqt.rqtn;
1008
1009                 memcpy(priv->params.indirection_rqt, indir,
1010                        sizeof(priv->params.indirection_rqt));
1011                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
1012         }
1013
1014         if (key)
1015                 memcpy(priv->params.toeplitz_hash_key, key,
1016                        sizeof(priv->params.toeplitz_hash_key));
1017
1018         if (hfunc != ETH_RSS_HASH_NO_CHANGE)
1019                 priv->params.rss_hfunc = hfunc;
1020
1021         mlx5e_modify_tirs_hash(priv, in, inlen);
1022
1023         mutex_unlock(&priv->state_lock);
1024
1025         kvfree(in);
1026
1027         return 0;
1028 }
1029
1030 static int mlx5e_get_rxnfc(struct net_device *netdev,
1031                            struct ethtool_rxnfc *info, u32 *rule_locs)
1032 {
1033         struct mlx5e_priv *priv = netdev_priv(netdev);
1034         int err = 0;
1035
1036         switch (info->cmd) {
1037         case ETHTOOL_GRXRINGS:
1038                 info->data = priv->params.num_channels;
1039                 break;
1040         case ETHTOOL_GRXCLSRLCNT:
1041                 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
1042                 break;
1043         case ETHTOOL_GRXCLSRULE:
1044                 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
1045                 break;
1046         case ETHTOOL_GRXCLSRLALL:
1047                 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
1048                 break;
1049         default:
1050                 err = -EOPNOTSUPP;
1051                 break;
1052         }
1053
1054         return err;
1055 }
1056
1057 static int mlx5e_get_tunable(struct net_device *dev,
1058                              const struct ethtool_tunable *tuna,
1059                              void *data)
1060 {
1061         const struct mlx5e_priv *priv = netdev_priv(dev);
1062         int err = 0;
1063
1064         switch (tuna->id) {
1065         case ETHTOOL_TX_COPYBREAK:
1066                 *(u32 *)data = priv->params.tx_max_inline;
1067                 break;
1068         default:
1069                 err = -EINVAL;
1070                 break;
1071         }
1072
1073         return err;
1074 }
1075
1076 static int mlx5e_set_tunable(struct net_device *dev,
1077                              const struct ethtool_tunable *tuna,
1078                              const void *data)
1079 {
1080         struct mlx5e_priv *priv = netdev_priv(dev);
1081         struct mlx5_core_dev *mdev = priv->mdev;
1082         bool was_opened;
1083         u32 val;
1084         int err = 0;
1085
1086         switch (tuna->id) {
1087         case ETHTOOL_TX_COPYBREAK:
1088                 val = *(u32 *)data;
1089                 if (val > mlx5e_get_max_inline_cap(mdev)) {
1090                         err = -EINVAL;
1091                         break;
1092                 }
1093
1094                 mutex_lock(&priv->state_lock);
1095
1096                 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
1097                 if (was_opened)
1098                         mlx5e_close_locked(dev);
1099
1100                 priv->params.tx_max_inline = val;
1101
1102                 if (was_opened)
1103                         err = mlx5e_open_locked(dev);
1104
1105                 mutex_unlock(&priv->state_lock);
1106                 break;
1107         default:
1108                 err = -EINVAL;
1109                 break;
1110         }
1111
1112         return err;
1113 }
1114
1115 static void mlx5e_get_pauseparam(struct net_device *netdev,
1116                                  struct ethtool_pauseparam *pauseparam)
1117 {
1118         struct mlx5e_priv *priv    = netdev_priv(netdev);
1119         struct mlx5_core_dev *mdev = priv->mdev;
1120         int err;
1121
1122         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1123                                     &pauseparam->tx_pause);
1124         if (err) {
1125                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1126                            __func__, err);
1127         }
1128 }
1129
1130 static int mlx5e_set_pauseparam(struct net_device *netdev,
1131                                 struct ethtool_pauseparam *pauseparam)
1132 {
1133         struct mlx5e_priv *priv    = netdev_priv(netdev);
1134         struct mlx5_core_dev *mdev = priv->mdev;
1135         int err;
1136
1137         if (pauseparam->autoneg)
1138                 return -EINVAL;
1139
1140         err = mlx5_set_port_pause(mdev,
1141                                   pauseparam->rx_pause ? 1 : 0,
1142                                   pauseparam->tx_pause ? 1 : 0);
1143         if (err) {
1144                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1145                            __func__, err);
1146         }
1147
1148         return err;
1149 }
1150
1151 static int mlx5e_get_ts_info(struct net_device *dev,
1152                              struct ethtool_ts_info *info)
1153 {
1154         struct mlx5e_priv *priv = netdev_priv(dev);
1155         int ret;
1156
1157         ret = ethtool_op_get_ts_info(dev, info);
1158         if (ret)
1159                 return ret;
1160
1161         info->phc_index = priv->tstamp.ptp ?
1162                           ptp_clock_index(priv->tstamp.ptp) : -1;
1163
1164         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1165                 return 0;
1166
1167         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1168                                  SOF_TIMESTAMPING_RX_HARDWARE |
1169                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1170
1171         info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
1172                          (BIT(1) << HWTSTAMP_TX_ON);
1173
1174         info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
1175                            (BIT(1) << HWTSTAMP_FILTER_ALL);
1176
1177         return 0;
1178 }
1179
1180 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1181 {
1182         __u32 ret = 0;
1183
1184         if (MLX5_CAP_GEN(mdev, wol_g))
1185                 ret |= WAKE_MAGIC;
1186
1187         if (MLX5_CAP_GEN(mdev, wol_s))
1188                 ret |= WAKE_MAGICSECURE;
1189
1190         if (MLX5_CAP_GEN(mdev, wol_a))
1191                 ret |= WAKE_ARP;
1192
1193         if (MLX5_CAP_GEN(mdev, wol_b))
1194                 ret |= WAKE_BCAST;
1195
1196         if (MLX5_CAP_GEN(mdev, wol_m))
1197                 ret |= WAKE_MCAST;
1198
1199         if (MLX5_CAP_GEN(mdev, wol_u))
1200                 ret |= WAKE_UCAST;
1201
1202         if (MLX5_CAP_GEN(mdev, wol_p))
1203                 ret |= WAKE_PHY;
1204
1205         return ret;
1206 }
1207
1208 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1209 {
1210         __u32 ret = 0;
1211
1212         if (mode & MLX5_WOL_MAGIC)
1213                 ret |= WAKE_MAGIC;
1214
1215         if (mode & MLX5_WOL_SECURED_MAGIC)
1216                 ret |= WAKE_MAGICSECURE;
1217
1218         if (mode & MLX5_WOL_ARP)
1219                 ret |= WAKE_ARP;
1220
1221         if (mode & MLX5_WOL_BROADCAST)
1222                 ret |= WAKE_BCAST;
1223
1224         if (mode & MLX5_WOL_MULTICAST)
1225                 ret |= WAKE_MCAST;
1226
1227         if (mode & MLX5_WOL_UNICAST)
1228                 ret |= WAKE_UCAST;
1229
1230         if (mode & MLX5_WOL_PHY_ACTIVITY)
1231                 ret |= WAKE_PHY;
1232
1233         return ret;
1234 }
1235
1236 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1237 {
1238         u8 ret = 0;
1239
1240         if (mode & WAKE_MAGIC)
1241                 ret |= MLX5_WOL_MAGIC;
1242
1243         if (mode & WAKE_MAGICSECURE)
1244                 ret |= MLX5_WOL_SECURED_MAGIC;
1245
1246         if (mode & WAKE_ARP)
1247                 ret |= MLX5_WOL_ARP;
1248
1249         if (mode & WAKE_BCAST)
1250                 ret |= MLX5_WOL_BROADCAST;
1251
1252         if (mode & WAKE_MCAST)
1253                 ret |= MLX5_WOL_MULTICAST;
1254
1255         if (mode & WAKE_UCAST)
1256                 ret |= MLX5_WOL_UNICAST;
1257
1258         if (mode & WAKE_PHY)
1259                 ret |= MLX5_WOL_PHY_ACTIVITY;
1260
1261         return ret;
1262 }
1263
1264 static void mlx5e_get_wol(struct net_device *netdev,
1265                           struct ethtool_wolinfo *wol)
1266 {
1267         struct mlx5e_priv *priv = netdev_priv(netdev);
1268         struct mlx5_core_dev *mdev = priv->mdev;
1269         u8 mlx5_wol_mode;
1270         int err;
1271
1272         memset(wol, 0, sizeof(*wol));
1273
1274         wol->supported = mlx5e_get_wol_supported(mdev);
1275         if (!wol->supported)
1276                 return;
1277
1278         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1279         if (err)
1280                 return;
1281
1282         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1283 }
1284
1285 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1286 {
1287         struct mlx5e_priv *priv = netdev_priv(netdev);
1288         struct mlx5_core_dev *mdev = priv->mdev;
1289         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1290         u32 mlx5_wol_mode;
1291
1292         if (!wol_supported)
1293                 return -ENOTSUPP;
1294
1295         if (wol->wolopts & ~wol_supported)
1296                 return -EINVAL;
1297
1298         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1299
1300         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1301 }
1302
1303 static int mlx5e_set_phys_id(struct net_device *dev,
1304                              enum ethtool_phys_id_state state)
1305 {
1306         struct mlx5e_priv *priv = netdev_priv(dev);
1307         struct mlx5_core_dev *mdev = priv->mdev;
1308         u16 beacon_duration;
1309
1310         if (!MLX5_CAP_GEN(mdev, beacon_led))
1311                 return -EOPNOTSUPP;
1312
1313         switch (state) {
1314         case ETHTOOL_ID_ACTIVE:
1315                 beacon_duration = MLX5_BEACON_DURATION_INF;
1316                 break;
1317         case ETHTOOL_ID_INACTIVE:
1318                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1319                 break;
1320         default:
1321                 return -EOPNOTSUPP;
1322         }
1323
1324         return mlx5_set_port_beacon(mdev, beacon_duration);
1325 }
1326
1327 static int mlx5e_get_module_info(struct net_device *netdev,
1328                                  struct ethtool_modinfo *modinfo)
1329 {
1330         struct mlx5e_priv *priv = netdev_priv(netdev);
1331         struct mlx5_core_dev *dev = priv->mdev;
1332         int size_read = 0;
1333         u8 data[4];
1334
1335         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1336         if (size_read < 2)
1337                 return -EIO;
1338
1339         /* data[0] = identifier byte */
1340         switch (data[0]) {
1341         case MLX5_MODULE_ID_QSFP:
1342                 modinfo->type       = ETH_MODULE_SFF_8436;
1343                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1344                 break;
1345         case MLX5_MODULE_ID_QSFP_PLUS:
1346         case MLX5_MODULE_ID_QSFP28:
1347                 /* data[1] = revision id */
1348                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1349                         modinfo->type       = ETH_MODULE_SFF_8636;
1350                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1351                 } else {
1352                         modinfo->type       = ETH_MODULE_SFF_8436;
1353                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1354                 }
1355                 break;
1356         case MLX5_MODULE_ID_SFP:
1357                 modinfo->type       = ETH_MODULE_SFF_8472;
1358                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1359                 break;
1360         default:
1361                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1362                            __func__, data[0]);
1363                 return -EINVAL;
1364         }
1365
1366         return 0;
1367 }
1368
1369 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1370                                    struct ethtool_eeprom *ee,
1371                                    u8 *data)
1372 {
1373         struct mlx5e_priv *priv = netdev_priv(netdev);
1374         struct mlx5_core_dev *mdev = priv->mdev;
1375         int offset = ee->offset;
1376         int size_read;
1377         int i = 0;
1378
1379         if (!ee->len)
1380                 return -EINVAL;
1381
1382         memset(data, 0, ee->len);
1383
1384         while (i < ee->len) {
1385                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1386                                                      data + i);
1387
1388                 if (!size_read)
1389                         /* Done reading */
1390                         return 0;
1391
1392                 if (size_read < 0) {
1393                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1394                                    __func__, size_read);
1395                         return 0;
1396                 }
1397
1398                 i += size_read;
1399                 offset += size_read;
1400         }
1401
1402         return 0;
1403 }
1404
1405 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1406
1407 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1408 {
1409         struct mlx5e_priv *priv = netdev_priv(netdev);
1410         struct mlx5_core_dev *mdev = priv->mdev;
1411         bool rx_mode_changed;
1412         u8 rx_cq_period_mode;
1413         int err = 0;
1414         bool reset;
1415
1416         rx_cq_period_mode = enable ?
1417                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1418                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1419         rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode;
1420
1421         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1422             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1423                 return -ENOTSUPP;
1424
1425         if (!rx_mode_changed)
1426                 return 0;
1427
1428         reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
1429         if (reset)
1430                 mlx5e_close_locked(netdev);
1431
1432         mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode);
1433
1434         if (reset)
1435                 err = mlx5e_open_locked(netdev);
1436
1437         return err;
1438 }
1439
1440 static int mlx5e_handle_pflag(struct net_device *netdev,
1441                               u32 wanted_flags,
1442                               enum mlx5e_priv_flag flag,
1443                               mlx5e_pflag_handler pflag_handler)
1444 {
1445         struct mlx5e_priv *priv = netdev_priv(netdev);
1446         bool enable = !!(wanted_flags & flag);
1447         u32 changes = wanted_flags ^ priv->pflags;
1448         int err;
1449
1450         if (!(changes & flag))
1451                 return 0;
1452
1453         err = pflag_handler(netdev, enable);
1454         if (err) {
1455                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1456                            enable ? "Enable" : "Disable", flag, err);
1457                 return err;
1458         }
1459
1460         MLX5E_SET_PRIV_FLAG(priv, flag, enable);
1461         return 0;
1462 }
1463
1464 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1465 {
1466         struct mlx5e_priv *priv = netdev_priv(netdev);
1467         int err;
1468
1469         mutex_lock(&priv->state_lock);
1470
1471         err = mlx5e_handle_pflag(netdev, pflags,
1472                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1473                                  set_pflag_rx_cqe_based_moder);
1474
1475         mutex_unlock(&priv->state_lock);
1476         return err ? -EINVAL : 0;
1477 }
1478
1479 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1480 {
1481         struct mlx5e_priv *priv = netdev_priv(netdev);
1482
1483         return priv->pflags;
1484 }
1485
1486 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1487 {
1488         int err = 0;
1489         struct mlx5e_priv *priv = netdev_priv(dev);
1490
1491         switch (cmd->cmd) {
1492         case ETHTOOL_SRXCLSRLINS:
1493                 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1494                 break;
1495         case ETHTOOL_SRXCLSRLDEL:
1496                 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1497                 break;
1498         default:
1499                 err = -EOPNOTSUPP;
1500                 break;
1501         }
1502
1503         return err;
1504 }
1505
1506 const struct ethtool_ops mlx5e_ethtool_ops = {
1507         .get_drvinfo       = mlx5e_get_drvinfo,
1508         .get_link          = ethtool_op_get_link,
1509         .get_strings       = mlx5e_get_strings,
1510         .get_sset_count    = mlx5e_get_sset_count,
1511         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1512         .get_ringparam     = mlx5e_get_ringparam,
1513         .set_ringparam     = mlx5e_set_ringparam,
1514         .get_channels      = mlx5e_get_channels,
1515         .set_channels      = mlx5e_set_channels,
1516         .get_coalesce      = mlx5e_get_coalesce,
1517         .set_coalesce      = mlx5e_set_coalesce,
1518         .get_link_ksettings  = mlx5e_get_link_ksettings,
1519         .set_link_ksettings  = mlx5e_set_link_ksettings,
1520         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1521         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1522         .get_rxfh          = mlx5e_get_rxfh,
1523         .set_rxfh          = mlx5e_set_rxfh,
1524         .get_rxnfc         = mlx5e_get_rxnfc,
1525         .set_rxnfc         = mlx5e_set_rxnfc,
1526         .get_tunable       = mlx5e_get_tunable,
1527         .set_tunable       = mlx5e_set_tunable,
1528         .get_pauseparam    = mlx5e_get_pauseparam,
1529         .set_pauseparam    = mlx5e_set_pauseparam,
1530         .get_ts_info       = mlx5e_get_ts_info,
1531         .set_phys_id       = mlx5e_set_phys_id,
1532         .get_wol           = mlx5e_get_wol,
1533         .set_wol           = mlx5e_set_wol,
1534         .get_module_info   = mlx5e_get_module_info,
1535         .get_module_eeprom = mlx5e_get_module_eeprom,
1536         .get_priv_flags    = mlx5e_get_priv_flags,
1537         .set_priv_flags    = mlx5e_set_priv_flags
1538 };