drivers/net/ethernet/mellanox/mlx5/core/health.c

   1 /*
   2  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/kernel.h>
  34 #include <linux/module.h>
  35 #include <linux/random.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/mlx5/driver.h>
  38 #include <linux/mlx5/cmd.h>
  39 #include "mlx5_core.h"
  40
  41 enum {
  42         MLX5_HEALTH_POLL_INTERVAL       = 2 * HZ,
  43         MAX_MISSES                      = 3,
  44 };
  45
  46 enum {
  47         MLX5_HEALTH_SYNDR_FW_ERR                = 0x1,
  48         MLX5_HEALTH_SYNDR_IRISC_ERR             = 0x7,
  49         MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR  = 0x8,
  50         MLX5_HEALTH_SYNDR_CRC_ERR               = 0x9,
  51         MLX5_HEALTH_SYNDR_FETCH_PCI_ERR         = 0xa,
  52         MLX5_HEALTH_SYNDR_HW_FTL_ERR            = 0xb,
  53         MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR  = 0xc,
  54         MLX5_HEALTH_SYNDR_EQ_ERR                = 0xd,
  55         MLX5_HEALTH_SYNDR_EQ_INV                = 0xe,
  56         MLX5_HEALTH_SYNDR_FFSER_ERR             = 0xf,
  57         MLX5_HEALTH_SYNDR_HIGH_TEMP             = 0x10
  58 };
  59
  60 enum {
  61         MLX5_NIC_IFC_FULL               = 0,
  62         MLX5_NIC_IFC_DISABLED           = 1,
  63         MLX5_NIC_IFC_NO_DRAM_NIC        = 2
  64 };
  65
  66 static u8 get_nic_interface(struct mlx5_core_dev *dev)
  67 {
  68         return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 3;
  69 }
  70
  71 static int in_fatal(struct mlx5_core_dev *dev)
  72 {
  73         struct mlx5_core_health *health = &dev->priv.health;
  74         struct health_buffer __iomem *h = health->health;
  75
  76         if (get_nic_interface(dev) == MLX5_NIC_IFC_DISABLED)
  77                 return 1;
  78
  79         if (ioread32be(&h->fw_ver) == 0xffffffff)
  80                 return 1;
  81
  82         return 0;
  83 }
  84
  85 static void health_care(struct work_struct *work)
  86 {
  87         struct mlx5_core_health *health;
  88         struct mlx5_core_dev *dev;
  89         struct mlx5_priv *priv;
  90
  91         health = container_of(work, struct mlx5_core_health, work);
  92         priv = container_of(health, struct mlx5_priv, health);
  93         dev = container_of(priv, struct mlx5_core_dev, priv);
  94         mlx5_core_warn(dev, "handling bad device here\n");
  95 }
  96
  97 static const char *hsynd_str(u8 synd)
  98 {
  99         switch (synd) {
 100         case MLX5_HEALTH_SYNDR_FW_ERR:
 101                 return "firmware internal error";
 102         case MLX5_HEALTH_SYNDR_IRISC_ERR:
 103                 return "irisc not responding";
 104         case MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR:
 105                 return "unrecoverable hardware error";
 106         case MLX5_HEALTH_SYNDR_CRC_ERR:
 107                 return "firmware CRC error";
 108         case MLX5_HEALTH_SYNDR_FETCH_PCI_ERR:
 109                 return "ICM fetch PCI error";
 110         case MLX5_HEALTH_SYNDR_HW_FTL_ERR:
 111                 return "HW fatal error\n";
 112         case MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR:
 113                 return "async EQ buffer overrun";
 114         case MLX5_HEALTH_SYNDR_EQ_ERR:
 115                 return "EQ error";
 116         case MLX5_HEALTH_SYNDR_EQ_INV:
 117                 return "Invalid EQ refrenced";
 118         case MLX5_HEALTH_SYNDR_FFSER_ERR:
 119                 return "FFSER error";
 120         case MLX5_HEALTH_SYNDR_HIGH_TEMP:
 121                 return "High temprature";
 122         default:
 123                 return "unrecognized error";
 124         }
 125 }
 126
 127 static u16 get_maj(u32 fw)
 128 {
 129         return fw >> 28;
 130 }
 131
 132 static u16 get_min(u32 fw)
 133 {
 134         return fw >> 16 & 0xfff;
 135 }
 136
 137 static u16 get_sub(u32 fw)
 138 {
 139         return fw & 0xffff;
 140 }
 141
 142 static void print_health_info(struct mlx5_core_dev *dev)
 143 {
 144         struct mlx5_core_health *health = &dev->priv.health;
 145         struct health_buffer __iomem *h = health->health;
 146         char fw_str[18];
 147         u32 fw;
 148         int i;
 149
 150         for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
 151                 dev_err(&dev->pdev->dev, "assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i));
 152
 153         dev_err(&dev->pdev->dev, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr));
 154         dev_err(&dev->pdev->dev, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra));
 155         fw = ioread32be(&h->fw_ver);
 156         sprintf(fw_str, "%d.%d.%d", get_maj(fw), get_min(fw), get_sub(fw));
 157         dev_err(&dev->pdev->dev, "fw_ver %s\n", fw_str);
 158         dev_err(&dev->pdev->dev, "hw_id 0x%08x\n", ioread32be(&h->hw_id));
 159         dev_err(&dev->pdev->dev, "irisc_index %d\n", ioread8(&h->irisc_index));
 160         dev_err(&dev->pdev->dev, "synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd)));
 161         dev_err(&dev->pdev->dev, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
 162 }
 163
 164 static unsigned long get_next_poll_jiffies(void)
 165 {
 166         unsigned long next;
 167
 168         get_random_bytes(&next, sizeof(next));
 169         next %= HZ;
 170         next += jiffies + MLX5_HEALTH_POLL_INTERVAL;
 171
 172         return next;
 173 }
 174
 175 static void poll_health(unsigned long data)
 176 {
 177         struct mlx5_core_dev *dev = (struct mlx5_core_dev *)data;
 178         struct mlx5_core_health *health = &dev->priv.health;
 179         u32 count;
 180
 181         count = ioread32be(health->health_counter);
 182         if (count == health->prev)
 183                 ++health->miss_counter;
 184         else
 185                 health->miss_counter = 0;
 186
 187         health->prev = count;
 188         if (health->miss_counter == MAX_MISSES) {
 189                 dev_err(&dev->pdev->dev, "device's health compromised - reached miss count\n");
 190                 print_health_info(dev);
 191         } else {
 192                 mod_timer(&health->timer, get_next_poll_jiffies());
 193         }
 194
 195         if (in_fatal(dev) && !health->sick) {
 196                 health->sick = true;
 197                 print_health_info(dev);
 198                 queue_work(health->wq, &health->work);
 199         }
 200 }
 201
 202 void mlx5_start_health_poll(struct mlx5_core_dev *dev)
 203 {
 204         struct mlx5_core_health *health = &dev->priv.health;
 205
 206         init_timer(&health->timer);
 207         health->health = &dev->iseg->health;
 208         health->health_counter = &dev->iseg->health_counter;
 209
 210         health->timer.data = (unsigned long)dev;
 211         health->timer.function = poll_health;
 212         health->timer.expires = round_jiffies(jiffies + MLX5_HEALTH_POLL_INTERVAL);
 213         add_timer(&health->timer);
 214 }
 215
 216 void mlx5_stop_health_poll(struct mlx5_core_dev *dev)
 217 {
 218         struct mlx5_core_health *health = &dev->priv.health;
 219
 220         del_timer_sync(&health->timer);
 221 }
 222
 223 void mlx5_health_cleanup(struct mlx5_core_dev *dev)
 224 {
 225         struct mlx5_core_health *health = &dev->priv.health;
 226
 227         destroy_workqueue(health->wq);
 228 }
 229
 230 int mlx5_health_init(struct mlx5_core_dev *dev)
 231 {
 232         struct mlx5_core_health *health;
 233         char *name;
 234
 235         health = &dev->priv.health;
 236         name = kmalloc(64, GFP_KERNEL);
 237         if (!name)
 238                 return -ENOMEM;
 239
 240         strcpy(name, "mlx5_health");
 241         strcat(name, dev_name(&dev->pdev->dev));
 242         health->wq = create_singlethread_workqueue(name);
 243         kfree(name);
 244         if (!health->wq)
 245                 return -ENOMEM;
 246
 247         INIT_WORK(&health->work, health_care);
 248
 249         return 0;
 250 }