drivers/net/ethernet/qlogic/qed/qed_main.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015 QLogic Corporation
   3  *
   4  * This software is available under the terms of the GNU General Public License
   5  * (GPL) Version 2, available from the file COPYING in the main directory of
   6  * this source tree.
   7  */
   8
   9 #include <linux/stddef.h>
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/version.h>
  14 #include <linux/delay.h>
  15 #include <asm/byteorder.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/string.h>
  18 #include <linux/module.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/workqueue.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/vmalloc.h>
  24 #include <linux/qed/qed_if.h>
  25
  26 #include "qed.h"
  27 #include "qed_sriov.h"
  28 #include "qed_sp.h"
  29 #include "qed_dev_api.h"
  30 #include "qed_mcp.h"
  31 #include "qed_hw.h"
  32 #include "qed_selftest.h"
  33
  34 static char version[] =
  35         "QLogic FastLinQ 4xxxx Core Module qed " DRV_MODULE_VERSION "\n";
  36
  37 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Core Module");
  38 MODULE_LICENSE("GPL");
  39 MODULE_VERSION(DRV_MODULE_VERSION);
  40
  41 #define FW_FILE_VERSION                         \
  42         __stringify(FW_MAJOR_VERSION) "."       \
  43         __stringify(FW_MINOR_VERSION) "."       \
  44         __stringify(FW_REVISION_VERSION) "."    \
  45         __stringify(FW_ENGINEERING_VERSION)
  46
  47 #define QED_FW_FILE_NAME        \
  48         "qed/qed_init_values_zipped-" FW_FILE_VERSION ".bin"
  49
  50 MODULE_FIRMWARE(QED_FW_FILE_NAME);
  51
  52 static int __init qed_init(void)
  53 {
  54         pr_notice("qed_init called\n");
  55
  56         pr_info("%s", version);
  57
  58         return 0;
  59 }
  60
  61 static void __exit qed_cleanup(void)
  62 {
  63         pr_notice("qed_cleanup called\n");
  64 }
  65
  66 module_init(qed_init);
  67 module_exit(qed_cleanup);
  68
  69 /* Check if the DMA controller on the machine can properly handle the DMA
  70  * addressing required by the device.
  71 */
  72 static int qed_set_coherency_mask(struct qed_dev *cdev)
  73 {
  74         struct device *dev = &cdev->pdev->dev;
  75
  76         if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) {
  77                 if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) {
  78                         DP_NOTICE(cdev,
  79                                   "Can't request 64-bit consistent allocations\n");
  80                         return -EIO;
  81                 }
  82         } else if (dma_set_mask(dev, DMA_BIT_MASK(32)) != 0) {
  83                 DP_NOTICE(cdev, "Can't request 64b/32b DMA addresses\n");
  84                 return -EIO;
  85         }
  86
  87         return 0;
  88 }
  89
  90 static void qed_free_pci(struct qed_dev *cdev)
  91 {
  92         struct pci_dev *pdev = cdev->pdev;
  93
  94         if (cdev->doorbells)
  95                 iounmap(cdev->doorbells);
  96         if (cdev->regview)
  97                 iounmap(cdev->regview);
  98         if (atomic_read(&pdev->enable_cnt) == 1)
  99                 pci_release_regions(pdev);
 100
 101         pci_disable_device(pdev);
 102 }
 103
 104 #define PCI_REVISION_ID_ERROR_VAL       0xff
 105
 106 /* Performs PCI initializations as well as initializing PCI-related parameters
 107  * in the device structrue. Returns 0 in case of success.
 108  */
 109 static int qed_init_pci(struct qed_dev *cdev,
 110                         struct pci_dev *pdev)
 111 {
 112         u8 rev_id;
 113         int rc;
 114
 115         cdev->pdev = pdev;
 116
 117         rc = pci_enable_device(pdev);
 118         if (rc) {
 119                 DP_NOTICE(cdev, "Cannot enable PCI device\n");
 120                 goto err0;
 121         }
 122
 123         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
 124                 DP_NOTICE(cdev, "No memory region found in bar #0\n");
 125                 rc = -EIO;
 126                 goto err1;
 127         }
 128
 129         if (IS_PF(cdev) && !(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 130                 DP_NOTICE(cdev, "No memory region found in bar #2\n");
 131                 rc = -EIO;
 132                 goto err1;
 133         }
 134
 135         if (atomic_read(&pdev->enable_cnt) == 1) {
 136                 rc = pci_request_regions(pdev, "qed");
 137                 if (rc) {
 138                         DP_NOTICE(cdev,
 139                                   "Failed to request PCI memory resources\n");
 140                         goto err1;
 141                 }
 142                 pci_set_master(pdev);
 143                 pci_save_state(pdev);
 144         }
 145
 146         pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
 147         if (rev_id == PCI_REVISION_ID_ERROR_VAL) {
 148                 DP_NOTICE(cdev,
 149                           "Detected PCI device error [rev_id 0x%x]. Probably due to prior indication. Aborting.\n",
 150                           rev_id);
 151                 rc = -ENODEV;
 152                 goto err2;
 153         }
 154         if (!pci_is_pcie(pdev)) {
 155                 DP_NOTICE(cdev, "The bus is not PCI Express\n");
 156                 rc = -EIO;
 157                 goto err2;
 158         }
 159
 160         cdev->pci_params.pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
 161         if (IS_PF(cdev) && !cdev->pci_params.pm_cap)
 162                 DP_NOTICE(cdev, "Cannot find power management capability\n");
 163
 164         rc = qed_set_coherency_mask(cdev);
 165         if (rc)
 166                 goto err2;
 167
 168         cdev->pci_params.mem_start = pci_resource_start(pdev, 0);
 169         cdev->pci_params.mem_end = pci_resource_end(pdev, 0);
 170         cdev->pci_params.irq = pdev->irq;
 171
 172         cdev->regview = pci_ioremap_bar(pdev, 0);
 173         if (!cdev->regview) {
 174                 DP_NOTICE(cdev, "Cannot map register space, aborting\n");
 175                 rc = -ENOMEM;
 176                 goto err2;
 177         }
 178
 179         if (IS_PF(cdev)) {
 180                 cdev->db_phys_addr = pci_resource_start(cdev->pdev, 2);
 181                 cdev->db_size = pci_resource_len(cdev->pdev, 2);
 182                 cdev->doorbells = ioremap_wc(cdev->db_phys_addr, cdev->db_size);
 183                 if (!cdev->doorbells) {
 184                         DP_NOTICE(cdev, "Cannot map doorbell space\n");
 185                         return -ENOMEM;
 186                 }
 187         }
 188
 189         return 0;
 190
 191 err2:
 192         pci_release_regions(pdev);
 193 err1:
 194         pci_disable_device(pdev);
 195 err0:
 196         return rc;
 197 }
 198
 199 int qed_fill_dev_info(struct qed_dev *cdev,
 200                       struct qed_dev_info *dev_info)
 201 {
 202         struct qed_ptt  *ptt;
 203
 204         memset(dev_info, 0, sizeof(struct qed_dev_info));
 205
 206         dev_info->num_hwfns = cdev->num_hwfns;
 207         dev_info->pci_mem_start = cdev->pci_params.mem_start;
 208         dev_info->pci_mem_end = cdev->pci_params.mem_end;
 209         dev_info->pci_irq = cdev->pci_params.irq;
 210         dev_info->rdma_supported =
 211             (cdev->hwfns[0].hw_info.personality == QED_PCI_ETH_ROCE);
 212         dev_info->is_mf_default = IS_MF_DEFAULT(&cdev->hwfns[0]);
 213         ether_addr_copy(dev_info->hw_mac, cdev->hwfns[0].hw_info.hw_mac_addr);
 214
 215         if (IS_PF(cdev)) {
 216                 dev_info->fw_major = FW_MAJOR_VERSION;
 217                 dev_info->fw_minor = FW_MINOR_VERSION;
 218                 dev_info->fw_rev = FW_REVISION_VERSION;
 219                 dev_info->fw_eng = FW_ENGINEERING_VERSION;
 220                 dev_info->mf_mode = cdev->mf_mode;
 221                 dev_info->tx_switching = true;
 222         } else {
 223                 qed_vf_get_fw_version(&cdev->hwfns[0], &dev_info->fw_major,
 224                                       &dev_info->fw_minor, &dev_info->fw_rev,
 225                                       &dev_info->fw_eng);
 226         }
 227
 228         if (IS_PF(cdev)) {
 229                 ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
 230                 if (ptt) {
 231                         qed_mcp_get_mfw_ver(QED_LEADING_HWFN(cdev), ptt,
 232                                             &dev_info->mfw_rev, NULL);
 233
 234                         qed_mcp_get_flash_size(QED_LEADING_HWFN(cdev), ptt,
 235                                                &dev_info->flash_size);
 236
 237                         qed_ptt_release(QED_LEADING_HWFN(cdev), ptt);
 238                 }
 239         } else {
 240                 qed_mcp_get_mfw_ver(QED_LEADING_HWFN(cdev), NULL,
 241                                     &dev_info->mfw_rev, NULL);
 242         }
 243
 244         return 0;
 245 }
 246
 247 static void qed_free_cdev(struct qed_dev *cdev)
 248 {
 249         kfree((void *)cdev);
 250 }
 251
 252 static struct qed_dev *qed_alloc_cdev(struct pci_dev *pdev)
 253 {
 254         struct qed_dev *cdev;
 255
 256         cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
 257         if (!cdev)
 258                 return cdev;
 259
 260         qed_init_struct(cdev);
 261
 262         return cdev;
 263 }
 264
 265 /* Sets the requested power state */
 266 static int qed_set_power_state(struct qed_dev *cdev,
 267                                pci_power_t state)
 268 {
 269         if (!cdev)
 270                 return -ENODEV;
 271
 272         DP_VERBOSE(cdev, NETIF_MSG_DRV, "Omitting Power state change\n");
 273         return 0;
 274 }
 275
 276 /* probing */
 277 static struct qed_dev *qed_probe(struct pci_dev *pdev,
 278                                  struct qed_probe_params *params)
 279 {
 280         struct qed_dev *cdev;
 281         int rc;
 282
 283         cdev = qed_alloc_cdev(pdev);
 284         if (!cdev)
 285                 goto err0;
 286
 287         cdev->protocol = params->protocol;
 288
 289         if (params->is_vf)
 290                 cdev->b_is_vf = true;
 291
 292         qed_init_dp(cdev, params->dp_module, params->dp_level);
 293
 294         rc = qed_init_pci(cdev, pdev);
 295         if (rc) {
 296                 DP_ERR(cdev, "init pci failed\n");
 297                 goto err1;
 298         }
 299         DP_INFO(cdev, "PCI init completed successfully\n");
 300
 301         rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT);
 302         if (rc) {
 303                 DP_ERR(cdev, "hw prepare failed\n");
 304                 goto err2;
 305         }
 306
 307         DP_INFO(cdev, "qed_probe completed successffuly\n");
 308
 309         return cdev;
 310
 311 err2:
 312         qed_free_pci(cdev);
 313 err1:
 314         qed_free_cdev(cdev);
 315 err0:
 316         return NULL;
 317 }
 318
 319 static void qed_remove(struct qed_dev *cdev)
 320 {
 321         if (!cdev)
 322                 return;
 323
 324         qed_hw_remove(cdev);
 325
 326         qed_free_pci(cdev);
 327
 328         qed_set_power_state(cdev, PCI_D3hot);
 329
 330         qed_free_cdev(cdev);
 331 }
 332
 333 static void qed_disable_msix(struct qed_dev *cdev)
 334 {
 335         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 336                 pci_disable_msix(cdev->pdev);
 337                 kfree(cdev->int_params.msix_table);
 338         } else if (cdev->int_params.out.int_mode == QED_INT_MODE_MSI) {
 339                 pci_disable_msi(cdev->pdev);
 340         }
 341
 342         memset(&cdev->int_params.out, 0, sizeof(struct qed_int_param));
 343 }
 344
 345 static int qed_enable_msix(struct qed_dev *cdev,
 346                            struct qed_int_params *int_params)
 347 {
 348         int i, rc, cnt;
 349
 350         cnt = int_params->in.num_vectors;
 351
 352         for (i = 0; i < cnt; i++)
 353                 int_params->msix_table[i].entry = i;
 354
 355         rc = pci_enable_msix_range(cdev->pdev, int_params->msix_table,
 356                                    int_params->in.min_msix_cnt, cnt);
 357         if (rc < cnt && rc >= int_params->in.min_msix_cnt &&
 358             (rc % cdev->num_hwfns)) {
 359                 pci_disable_msix(cdev->pdev);
 360
 361                 /* If fastpath is initialized, we need at least one interrupt
 362                  * per hwfn [and the slow path interrupts]. New requested number
 363                  * should be a multiple of the number of hwfns.
 364                  */
 365                 cnt = (rc / cdev->num_hwfns) * cdev->num_hwfns;
 366                 DP_NOTICE(cdev,
 367                           "Trying to enable MSI-X with less vectors (%d out of %d)\n",
 368                           cnt, int_params->in.num_vectors);
 369                 rc = pci_enable_msix_exact(cdev->pdev,
 370                                            int_params->msix_table, cnt);
 371                 if (!rc)
 372                         rc = cnt;
 373         }
 374
 375         if (rc > 0) {
 376                 /* MSI-x configuration was achieved */
 377                 int_params->out.int_mode = QED_INT_MODE_MSIX;
 378                 int_params->out.num_vectors = rc;
 379                 rc = 0;
 380         } else {
 381                 DP_NOTICE(cdev,
 382                           "Failed to enable MSI-X [Requested %d vectors][rc %d]\n",
 383                           cnt, rc);
 384         }
 385
 386         return rc;
 387 }
 388
 389 /* This function outputs the int mode and the number of enabled msix vector */
 390 static int qed_set_int_mode(struct qed_dev *cdev, bool force_mode)
 391 {
 392         struct qed_int_params *int_params = &cdev->int_params;
 393         struct msix_entry *tbl;
 394         int rc = 0, cnt;
 395
 396         switch (int_params->in.int_mode) {
 397         case QED_INT_MODE_MSIX:
 398                 /* Allocate MSIX table */
 399                 cnt = int_params->in.num_vectors;
 400                 int_params->msix_table = kcalloc(cnt, sizeof(*tbl), GFP_KERNEL);
 401                 if (!int_params->msix_table) {
 402                         rc = -ENOMEM;
 403                         goto out;
 404                 }
 405
 406                 /* Enable MSIX */
 407                 rc = qed_enable_msix(cdev, int_params);
 408                 if (!rc)
 409                         goto out;
 410
 411                 DP_NOTICE(cdev, "Failed to enable MSI-X\n");
 412                 kfree(int_params->msix_table);
 413                 if (force_mode)
 414                         goto out;
 415                 /* Fallthrough */
 416
 417         case QED_INT_MODE_MSI:
 418                 if (cdev->num_hwfns == 1) {
 419                         rc = pci_enable_msi(cdev->pdev);
 420                         if (!rc) {
 421                                 int_params->out.int_mode = QED_INT_MODE_MSI;
 422                                 goto out;
 423                         }
 424
 425                         DP_NOTICE(cdev, "Failed to enable MSI\n");
 426                         if (force_mode)
 427                                 goto out;
 428                 }
 429                 /* Fallthrough */
 430
 431         case QED_INT_MODE_INTA:
 432                         int_params->out.int_mode = QED_INT_MODE_INTA;
 433                         rc = 0;
 434                         goto out;
 435         default:
 436                 DP_NOTICE(cdev, "Unknown int_mode value %d\n",
 437                           int_params->in.int_mode);
 438                 rc = -EINVAL;
 439         }
 440
 441 out:
 442         cdev->int_coalescing_mode = QED_COAL_MODE_ENABLE;
 443
 444         return rc;
 445 }
 446
 447 static void qed_simd_handler_config(struct qed_dev *cdev, void *token,
 448                                     int index, void(*handler)(void *))
 449 {
 450         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 451         int relative_idx = index / cdev->num_hwfns;
 452
 453         hwfn->simd_proto_handler[relative_idx].func = handler;
 454         hwfn->simd_proto_handler[relative_idx].token = token;
 455 }
 456
 457 static void qed_simd_handler_clean(struct qed_dev *cdev, int index)
 458 {
 459         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 460         int relative_idx = index / cdev->num_hwfns;
 461
 462         memset(&hwfn->simd_proto_handler[relative_idx], 0,
 463                sizeof(struct qed_simd_fp_handler));
 464 }
 465
 466 static irqreturn_t qed_msix_sp_int(int irq, void *tasklet)
 467 {
 468         tasklet_schedule((struct tasklet_struct *)tasklet);
 469         return IRQ_HANDLED;
 470 }
 471
 472 static irqreturn_t qed_single_int(int irq, void *dev_instance)
 473 {
 474         struct qed_dev *cdev = (struct qed_dev *)dev_instance;
 475         struct qed_hwfn *hwfn;
 476         irqreturn_t rc = IRQ_NONE;
 477         u64 status;
 478         int i, j;
 479
 480         for (i = 0; i < cdev->num_hwfns; i++) {
 481                 status = qed_int_igu_read_sisr_reg(&cdev->hwfns[i]);
 482
 483                 if (!status)
 484                         continue;
 485
 486                 hwfn = &cdev->hwfns[i];
 487
 488                 /* Slowpath interrupt */
 489                 if (unlikely(status & 0x1)) {
 490                         tasklet_schedule(hwfn->sp_dpc);
 491                         status &= ~0x1;
 492                         rc = IRQ_HANDLED;
 493                 }
 494
 495                 /* Fastpath interrupts */
 496                 for (j = 0; j < 64; j++) {
 497                         if ((0x2ULL << j) & status) {
 498                                 hwfn->simd_proto_handler[j].func(
 499                                         hwfn->simd_proto_handler[j].token);
 500                                 status &= ~(0x2ULL << j);
 501                                 rc = IRQ_HANDLED;
 502                         }
 503                 }
 504
 505                 if (unlikely(status))
 506                         DP_VERBOSE(hwfn, NETIF_MSG_INTR,
 507                                    "got an unknown interrupt status 0x%llx\n",
 508                                    status);
 509         }
 510
 511         return rc;
 512 }
 513
 514 int qed_slowpath_irq_req(struct qed_hwfn *hwfn)
 515 {
 516         struct qed_dev *cdev = hwfn->cdev;
 517         int rc = 0;
 518         u8 id;
 519
 520         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 521                 id = hwfn->my_id;
 522                 snprintf(hwfn->name, NAME_SIZE, "sp-%d-%02x:%02x.%02x",
 523                          id, cdev->pdev->bus->number,
 524                          PCI_SLOT(cdev->pdev->devfn), hwfn->abs_pf_id);
 525                 rc = request_irq(cdev->int_params.msix_table[id].vector,
 526                                  qed_msix_sp_int, 0, hwfn->name, hwfn->sp_dpc);
 527                 if (!rc)
 528                         DP_VERBOSE(hwfn, (NETIF_MSG_INTR | QED_MSG_SP),
 529                                    "Requested slowpath MSI-X\n");
 530         } else {
 531                 unsigned long flags = 0;
 532
 533                 snprintf(cdev->name, NAME_SIZE, "%02x:%02x.%02x",
 534                          cdev->pdev->bus->number, PCI_SLOT(cdev->pdev->devfn),
 535                          PCI_FUNC(cdev->pdev->devfn));
 536
 537                 if (cdev->int_params.out.int_mode == QED_INT_MODE_INTA)
 538                         flags |= IRQF_SHARED;
 539
 540                 rc = request_irq(cdev->pdev->irq, qed_single_int,
 541                                  flags, cdev->name, cdev);
 542         }
 543
 544         return rc;
 545 }
 546
 547 static void qed_slowpath_irq_free(struct qed_dev *cdev)
 548 {
 549         int i;
 550
 551         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 552                 for_each_hwfn(cdev, i) {
 553                         if (!cdev->hwfns[i].b_int_requested)
 554                                 break;
 555                         synchronize_irq(cdev->int_params.msix_table[i].vector);
 556                         free_irq(cdev->int_params.msix_table[i].vector,
 557                                  cdev->hwfns[i].sp_dpc);
 558                 }
 559         } else {
 560                 if (QED_LEADING_HWFN(cdev)->b_int_requested)
 561                         free_irq(cdev->pdev->irq, cdev);
 562         }
 563         qed_int_disable_post_isr_release(cdev);
 564 }
 565
 566 static int qed_nic_stop(struct qed_dev *cdev)
 567 {
 568         int i, rc;
 569
 570         rc = qed_hw_stop(cdev);
 571
 572         for (i = 0; i < cdev->num_hwfns; i++) {
 573                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 574
 575                 if (p_hwfn->b_sp_dpc_enabled) {
 576                         tasklet_disable(p_hwfn->sp_dpc);
 577                         p_hwfn->b_sp_dpc_enabled = false;
 578                         DP_VERBOSE(cdev, NETIF_MSG_IFDOWN,
 579                                    "Disabled sp taskelt [hwfn %d] at %p\n",
 580                                    i, p_hwfn->sp_dpc);
 581                 }
 582         }
 583
 584         return rc;
 585 }
 586
 587 static int qed_nic_reset(struct qed_dev *cdev)
 588 {
 589         int rc;
 590
 591         rc = qed_hw_reset(cdev);
 592         if (rc)
 593                 return rc;
 594
 595         qed_resc_free(cdev);
 596
 597         return 0;
 598 }
 599
 600 static int qed_nic_setup(struct qed_dev *cdev)
 601 {
 602         int rc;
 603
 604         rc = qed_resc_alloc(cdev);
 605         if (rc)
 606                 return rc;
 607
 608         DP_INFO(cdev, "Allocated qed resources\n");
 609
 610         qed_resc_setup(cdev);
 611
 612         return rc;
 613 }
 614
 615 static int qed_set_int_fp(struct qed_dev *cdev, u16 cnt)
 616 {
 617         int limit = 0;
 618
 619         /* Mark the fastpath as free/used */
 620         cdev->int_params.fp_initialized = cnt ? true : false;
 621
 622         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX)
 623                 limit = cdev->num_hwfns * 63;
 624         else if (cdev->int_params.fp_msix_cnt)
 625                 limit = cdev->int_params.fp_msix_cnt;
 626
 627         if (!limit)
 628                 return -ENOMEM;
 629
 630         return min_t(int, cnt, limit);
 631 }
 632
 633 static int qed_get_int_fp(struct qed_dev *cdev, struct qed_int_info *info)
 634 {
 635         memset(info, 0, sizeof(struct qed_int_info));
 636
 637         if (!cdev->int_params.fp_initialized) {
 638                 DP_INFO(cdev,
 639                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
 640                 return -EINVAL;
 641         }
 642
 643         /* Need to expose only MSI-X information; Single IRQ is handled solely
 644          * by qed.
 645          */
 646         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 647                 int msix_base = cdev->int_params.fp_msix_base;
 648
 649                 info->msix_cnt = cdev->int_params.fp_msix_cnt;
 650                 info->msix = &cdev->int_params.msix_table[msix_base];
 651         }
 652
 653         return 0;
 654 }
 655
 656 static int qed_slowpath_setup_int(struct qed_dev *cdev,
 657                                   enum qed_int_mode int_mode)
 658 {
 659         struct qed_sb_cnt_info sb_cnt_info;
 660         int rc;
 661         int i;
 662         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 663
 664         cdev->int_params.in.int_mode = int_mode;
 665         for_each_hwfn(cdev, i) {
 666                 memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
 667                 qed_int_get_num_sbs(&cdev->hwfns[i], &sb_cnt_info);
 668                 cdev->int_params.in.num_vectors += sb_cnt_info.sb_cnt;
 669                 cdev->int_params.in.num_vectors++; /* slowpath */
 670         }
 671
 672         /* We want a minimum of one slowpath and one fastpath vector per hwfn */
 673         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns * 2;
 674
 675         rc = qed_set_int_mode(cdev, false);
 676         if (rc)  {
 677                 DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");
 678                 return rc;
 679         }
 680
 681         cdev->int_params.fp_msix_base = cdev->num_hwfns;
 682         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors -
 683                                        cdev->num_hwfns;
 684
 685         return 0;
 686 }
 687
 688 static int qed_slowpath_vf_setup_int(struct qed_dev *cdev)
 689 {
 690         int rc;
 691
 692         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 693         cdev->int_params.in.int_mode = QED_INT_MODE_MSIX;
 694
 695         qed_vf_get_num_rxqs(QED_LEADING_HWFN(cdev),
 696                             &cdev->int_params.in.num_vectors);
 697         if (cdev->num_hwfns > 1) {
 698                 u8 vectors = 0;
 699
 700                 qed_vf_get_num_rxqs(&cdev->hwfns[1], &vectors);
 701                 cdev->int_params.in.num_vectors += vectors;
 702         }
 703
 704         /* We want a minimum of one fastpath vector per vf hwfn */
 705         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns;
 706
 707         rc = qed_set_int_mode(cdev, true);
 708         if (rc)
 709                 return rc;
 710
 711         cdev->int_params.fp_msix_base = 0;
 712         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors;
 713
 714         return 0;
 715 }
 716
 717 u32 qed_unzip_data(struct qed_hwfn *p_hwfn, u32 input_len,
 718                    u8 *input_buf, u32 max_size, u8 *unzip_buf)
 719 {
 720         int rc;
 721
 722         p_hwfn->stream->next_in = input_buf;
 723         p_hwfn->stream->avail_in = input_len;
 724         p_hwfn->stream->next_out = unzip_buf;
 725         p_hwfn->stream->avail_out = max_size;
 726
 727         rc = zlib_inflateInit2(p_hwfn->stream, MAX_WBITS);
 728
 729         if (rc != Z_OK) {
 730                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "zlib init failed, rc = %d\n",
 731                            rc);
 732                 return 0;
 733         }
 734
 735         rc = zlib_inflate(p_hwfn->stream, Z_FINISH);
 736         zlib_inflateEnd(p_hwfn->stream);
 737
 738         if (rc != Z_OK && rc != Z_STREAM_END) {
 739                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "FW unzip error: %s, rc=%d\n",
 740                            p_hwfn->stream->msg, rc);
 741                 return 0;
 742         }
 743
 744         return p_hwfn->stream->total_out / 4;
 745 }
 746
 747 static int qed_alloc_stream_mem(struct qed_dev *cdev)
 748 {
 749         int i;
 750         void *workspace;
 751
 752         for_each_hwfn(cdev, i) {
 753                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 754
 755                 p_hwfn->stream = kzalloc(sizeof(*p_hwfn->stream), GFP_KERNEL);
 756                 if (!p_hwfn->stream)
 757                         return -ENOMEM;
 758
 759                 workspace = vzalloc(zlib_inflate_workspacesize());
 760                 if (!workspace)
 761                         return -ENOMEM;
 762                 p_hwfn->stream->workspace = workspace;
 763         }
 764
 765         return 0;
 766 }
 767
 768 static void qed_free_stream_mem(struct qed_dev *cdev)
 769 {
 770         int i;
 771
 772         for_each_hwfn(cdev, i) {
 773                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 774
 775                 if (!p_hwfn->stream)
 776                         return;
 777
 778                 vfree(p_hwfn->stream->workspace);
 779                 kfree(p_hwfn->stream);
 780         }
 781 }
 782
 783 static void qed_update_pf_params(struct qed_dev *cdev,
 784                                  struct qed_pf_params *params)
 785 {
 786         int i;
 787
 788         for (i = 0; i < cdev->num_hwfns; i++) {
 789                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 790
 791                 p_hwfn->pf_params = *params;
 792         }
 793 }
 794
 795 static int qed_slowpath_start(struct qed_dev *cdev,
 796                               struct qed_slowpath_params *params)
 797 {
 798         struct qed_tunn_start_params tunn_info;
 799         struct qed_mcp_drv_version drv_version;
 800         const u8 *data = NULL;
 801         struct qed_hwfn *hwfn;
 802         int rc = -EINVAL;
 803
 804         if (qed_iov_wq_start(cdev))
 805                 goto err;
 806
 807         if (IS_PF(cdev)) {
 808                 rc = request_firmware(&cdev->firmware, QED_FW_FILE_NAME,
 809                                       &cdev->pdev->dev);
 810                 if (rc) {
 811                         DP_NOTICE(cdev,
 812                                   "Failed to find fw file - /lib/firmware/%s\n",
 813                                   QED_FW_FILE_NAME);
 814                         goto err;
 815                 }
 816         }
 817
 818         rc = qed_nic_setup(cdev);
 819         if (rc)
 820                 goto err;
 821
 822         if (IS_PF(cdev))
 823                 rc = qed_slowpath_setup_int(cdev, params->int_mode);
 824         else
 825                 rc = qed_slowpath_vf_setup_int(cdev);
 826         if (rc)
 827                 goto err1;
 828
 829         if (IS_PF(cdev)) {
 830                 /* Allocate stream for unzipping */
 831                 rc = qed_alloc_stream_mem(cdev);
 832                 if (rc) {
 833                         DP_NOTICE(cdev, "Failed to allocate stream memory\n");
 834                         goto err2;
 835                 }
 836
 837                 /* First Dword used to diffrentiate between various sources */
 838                 data = cdev->firmware->data + sizeof(u32);
 839         }
 840
 841         memset(&tunn_info, 0, sizeof(tunn_info));
 842         tunn_info.tunn_mode |=  1 << QED_MODE_VXLAN_TUNN |
 843                                 1 << QED_MODE_L2GRE_TUNN |
 844                                 1 << QED_MODE_IPGRE_TUNN |
 845                                 1 << QED_MODE_L2GENEVE_TUNN |
 846                                 1 << QED_MODE_IPGENEVE_TUNN;
 847
 848         tunn_info.tunn_clss_vxlan = QED_TUNN_CLSS_MAC_VLAN;
 849         tunn_info.tunn_clss_l2gre = QED_TUNN_CLSS_MAC_VLAN;
 850         tunn_info.tunn_clss_ipgre = QED_TUNN_CLSS_MAC_VLAN;
 851
 852         /* Start the slowpath */
 853         rc = qed_hw_init(cdev, &tunn_info, true,
 854                          cdev->int_params.out.int_mode,
 855                          true, data);
 856         if (rc)
 857                 goto err2;
 858
 859         DP_INFO(cdev,
 860                 "HW initialization and function start completed successfully\n");
 861
 862         if (IS_PF(cdev)) {
 863                 hwfn = QED_LEADING_HWFN(cdev);
 864                 drv_version.version = (params->drv_major << 24) |
 865                                       (params->drv_minor << 16) |
 866                                       (params->drv_rev << 8) |
 867                                       (params->drv_eng);
 868                 strlcpy(drv_version.name, params->name,
 869                         MCP_DRV_VER_STR_SIZE - 4);
 870                 rc = qed_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
 871                                               &drv_version);
 872                 if (rc) {
 873                         DP_NOTICE(cdev, "Failed sending drv version command\n");
 874                         return rc;
 875                 }
 876         }
 877
 878         qed_reset_vport_stats(cdev);
 879
 880         return 0;
 881
 882 err2:
 883         qed_hw_timers_stop_all(cdev);
 884         if (IS_PF(cdev))
 885                 qed_slowpath_irq_free(cdev);
 886         qed_free_stream_mem(cdev);
 887         qed_disable_msix(cdev);
 888 err1:
 889         qed_resc_free(cdev);
 890 err:
 891         if (IS_PF(cdev))
 892                 release_firmware(cdev->firmware);
 893
 894         qed_iov_wq_stop(cdev, false);
 895
 896         return rc;
 897 }
 898
 899 static int qed_slowpath_stop(struct qed_dev *cdev)
 900 {
 901         if (!cdev)
 902                 return -ENODEV;
 903
 904         if (IS_PF(cdev)) {
 905                 qed_free_stream_mem(cdev);
 906                 if (IS_QED_ETH_IF(cdev))
 907                         qed_sriov_disable(cdev, true);
 908
 909                 qed_nic_stop(cdev);
 910                 qed_slowpath_irq_free(cdev);
 911         }
 912
 913         qed_disable_msix(cdev);
 914         qed_nic_reset(cdev);
 915
 916         qed_iov_wq_stop(cdev, true);
 917
 918         if (IS_PF(cdev))
 919                 release_firmware(cdev->firmware);
 920
 921         return 0;
 922 }
 923
 924 static void qed_set_id(struct qed_dev *cdev, char name[NAME_SIZE],
 925                        char ver_str[VER_SIZE])
 926 {
 927         int i;
 928
 929         memcpy(cdev->name, name, NAME_SIZE);
 930         for_each_hwfn(cdev, i)
 931                 snprintf(cdev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
 932
 933         memcpy(cdev->ver_str, ver_str, VER_SIZE);
 934         cdev->drv_type = DRV_ID_DRV_TYPE_LINUX;
 935 }
 936
 937 static u32 qed_sb_init(struct qed_dev *cdev,
 938                        struct qed_sb_info *sb_info,
 939                        void *sb_virt_addr,
 940                        dma_addr_t sb_phy_addr, u16 sb_id,
 941                        enum qed_sb_type type)
 942 {
 943         struct qed_hwfn *p_hwfn;
 944         int hwfn_index;
 945         u16 rel_sb_id;
 946         u8 n_hwfns;
 947         u32 rc;
 948
 949         /* RoCE uses single engine and CMT uses two engines. When using both
 950          * we force only a single engine. Storage uses only engine 0 too.
 951          */
 952         if (type == QED_SB_TYPE_L2_QUEUE)
 953                 n_hwfns = cdev->num_hwfns;
 954         else
 955                 n_hwfns = 1;
 956
 957         hwfn_index = sb_id % n_hwfns;
 958         p_hwfn = &cdev->hwfns[hwfn_index];
 959         rel_sb_id = sb_id / n_hwfns;
 960
 961         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 962                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 963                    hwfn_index, rel_sb_id, sb_id);
 964
 965         rc = qed_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
 966                              sb_virt_addr, sb_phy_addr, rel_sb_id);
 967
 968         return rc;
 969 }
 970
 971 static u32 qed_sb_release(struct qed_dev *cdev,
 972                           struct qed_sb_info *sb_info,
 973                           u16 sb_id)
 974 {
 975         struct qed_hwfn *p_hwfn;
 976         int hwfn_index;
 977         u16 rel_sb_id;
 978         u32 rc;
 979
 980         hwfn_index = sb_id % cdev->num_hwfns;
 981         p_hwfn = &cdev->hwfns[hwfn_index];
 982         rel_sb_id = sb_id / cdev->num_hwfns;
 983
 984         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 985                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 986                    hwfn_index, rel_sb_id, sb_id);
 987
 988         rc = qed_int_sb_release(p_hwfn, sb_info, rel_sb_id);
 989
 990         return rc;
 991 }
 992
 993 static bool qed_can_link_change(struct qed_dev *cdev)
 994 {
 995         return true;
 996 }
 997
 998 static int qed_set_link(struct qed_dev *cdev, struct qed_link_params *params)
 999 {
1000         struct qed_hwfn *hwfn;
1001         struct qed_mcp_link_params *link_params;
1002         struct qed_ptt *ptt;
1003         int rc;
1004
1005         if (!cdev)
1006                 return -ENODEV;
1007
1008         if (IS_VF(cdev))
1009                 return 0;
1010
1011         /* The link should be set only once per PF */
1012         hwfn = &cdev->hwfns[0];
1013
1014         ptt = qed_ptt_acquire(hwfn);
1015         if (!ptt)
1016                 return -EBUSY;
1017
1018         link_params = qed_mcp_get_link_params(hwfn);
1019         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
1020                 link_params->speed.autoneg = params->autoneg;
1021         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS) {
1022                 link_params->speed.advertised_speeds = 0;
1023                 if ((params->adv_speeds & SUPPORTED_1000baseT_Half) ||
1024                     (params->adv_speeds & SUPPORTED_1000baseT_Full))
1025                         link_params->speed.advertised_speeds |=
1026                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
1027                 if (params->adv_speeds & SUPPORTED_10000baseKR_Full)
1028                         link_params->speed.advertised_speeds |=
1029                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
1030                 if (params->adv_speeds & SUPPORTED_40000baseLR4_Full)
1031                         link_params->speed.advertised_speeds |=
1032                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
1033                 if (params->adv_speeds & 0)
1034                         link_params->speed.advertised_speeds |=
1035                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
1036                 if (params->adv_speeds & 0)
1037                         link_params->speed.advertised_speeds |=
1038                             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G;
1039         }
1040         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_FORCED_SPEED)
1041                 link_params->speed.forced_speed = params->forced_speed;
1042         if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
1043                 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
1044                         link_params->pause.autoneg = true;
1045                 else
1046                         link_params->pause.autoneg = false;
1047                 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
1048                         link_params->pause.forced_rx = true;
1049                 else
1050                         link_params->pause.forced_rx = false;
1051                 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
1052                         link_params->pause.forced_tx = true;
1053                 else
1054                         link_params->pause.forced_tx = false;
1055         }
1056         if (params->override_flags & QED_LINK_OVERRIDE_LOOPBACK_MODE) {
1057                 switch (params->loopback_mode) {
1058                 case QED_LINK_LOOPBACK_INT_PHY:
1059                         link_params->loopback_mode = ETH_LOOPBACK_INT_PHY;
1060                         break;
1061                 case QED_LINK_LOOPBACK_EXT_PHY:
1062                         link_params->loopback_mode = ETH_LOOPBACK_EXT_PHY;
1063                         break;
1064                 case QED_LINK_LOOPBACK_EXT:
1065                         link_params->loopback_mode = ETH_LOOPBACK_EXT;
1066                         break;
1067                 case QED_LINK_LOOPBACK_MAC:
1068                         link_params->loopback_mode = ETH_LOOPBACK_MAC;
1069                         break;
1070                 default:
1071                         link_params->loopback_mode = ETH_LOOPBACK_NONE;
1072                         break;
1073                 }
1074         }
1075
1076         rc = qed_mcp_set_link(hwfn, ptt, params->link_up);
1077
1078         qed_ptt_release(hwfn, ptt);
1079
1080         return rc;
1081 }
1082
1083 static int qed_get_port_type(u32 media_type)
1084 {
1085         int port_type;
1086
1087         switch (media_type) {
1088         case MEDIA_SFPP_10G_FIBER:
1089         case MEDIA_SFP_1G_FIBER:
1090         case MEDIA_XFP_FIBER:
1091         case MEDIA_MODULE_FIBER:
1092         case MEDIA_KR:
1093                 port_type = PORT_FIBRE;
1094                 break;
1095         case MEDIA_DA_TWINAX:
1096                 port_type = PORT_DA;
1097                 break;
1098         case MEDIA_BASE_T:
1099                 port_type = PORT_TP;
1100                 break;
1101         case MEDIA_NOT_PRESENT:
1102                 port_type = PORT_NONE;
1103                 break;
1104         case MEDIA_UNSPECIFIED:
1105         default:
1106                 port_type = PORT_OTHER;
1107                 break;
1108         }
1109         return port_type;
1110 }
1111
1112 static int qed_get_link_data(struct qed_hwfn *hwfn,
1113                              struct qed_mcp_link_params *params,
1114                              struct qed_mcp_link_state *link,
1115                              struct qed_mcp_link_capabilities *link_caps)
1116 {
1117         void *p;
1118
1119         if (!IS_PF(hwfn->cdev)) {
1120                 qed_vf_get_link_params(hwfn, params);
1121                 qed_vf_get_link_state(hwfn, link);
1122                 qed_vf_get_link_caps(hwfn, link_caps);
1123
1124                 return 0;
1125         }
1126
1127         p = qed_mcp_get_link_params(hwfn);
1128         if (!p)
1129                 return -ENXIO;
1130         memcpy(params, p, sizeof(*params));
1131
1132         p = qed_mcp_get_link_state(hwfn);
1133         if (!p)
1134                 return -ENXIO;
1135         memcpy(link, p, sizeof(*link));
1136
1137         p = qed_mcp_get_link_capabilities(hwfn);
1138         if (!p)
1139                 return -ENXIO;
1140         memcpy(link_caps, p, sizeof(*link_caps));
1141
1142         return 0;
1143 }
1144
1145 static void qed_fill_link(struct qed_hwfn *hwfn,
1146                           struct qed_link_output *if_link)
1147 {
1148         struct qed_mcp_link_params params;
1149         struct qed_mcp_link_state link;
1150         struct qed_mcp_link_capabilities link_caps;
1151         u32 media_type;
1152
1153         memset(if_link, 0, sizeof(*if_link));
1154
1155         /* Prepare source inputs */
1156         if (qed_get_link_data(hwfn, &params, &link, &link_caps)) {
1157                 dev_warn(&hwfn->cdev->pdev->dev, "no link data available\n");
1158                 return;
1159         }
1160
1161         /* Set the link parameters to pass to protocol driver */
1162         if (link.link_up)
1163                 if_link->link_up = true;
1164
1165         /* TODO - at the moment assume supported and advertised speed equal */
1166         if_link->supported_caps = SUPPORTED_FIBRE;
1167         if (params.speed.autoneg)
1168                 if_link->supported_caps |= SUPPORTED_Autoneg;
1169         if (params.pause.autoneg ||
1170             (params.pause.forced_rx && params.pause.forced_tx))
1171                 if_link->supported_caps |= SUPPORTED_Asym_Pause;
1172         if (params.pause.autoneg || params.pause.forced_rx ||
1173             params.pause.forced_tx)
1174                 if_link->supported_caps |= SUPPORTED_Pause;
1175
1176         if_link->advertised_caps = if_link->supported_caps;
1177         if (params.speed.advertised_speeds &
1178             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1179                 if_link->advertised_caps |= SUPPORTED_1000baseT_Half |
1180                                            SUPPORTED_1000baseT_Full;
1181         if (params.speed.advertised_speeds &
1182             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1183                 if_link->advertised_caps |= SUPPORTED_10000baseKR_Full;
1184         if (params.speed.advertised_speeds &
1185                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1186                 if_link->advertised_caps |= SUPPORTED_40000baseLR4_Full;
1187         if (params.speed.advertised_speeds &
1188                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1189                 if_link->advertised_caps |= 0;
1190         if (params.speed.advertised_speeds &
1191             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
1192                 if_link->advertised_caps |= 0;
1193
1194         if (link_caps.speed_capabilities &
1195             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1196                 if_link->supported_caps |= SUPPORTED_1000baseT_Half |
1197                                            SUPPORTED_1000baseT_Full;
1198         if (link_caps.speed_capabilities &
1199             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1200                 if_link->supported_caps |= SUPPORTED_10000baseKR_Full;
1201         if (link_caps.speed_capabilities &
1202                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1203                 if_link->supported_caps |= SUPPORTED_40000baseLR4_Full;
1204         if (link_caps.speed_capabilities &
1205                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1206                 if_link->supported_caps |= 0;
1207         if (link_caps.speed_capabilities &
1208             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
1209                 if_link->supported_caps |= 0;
1210
1211         if (link.link_up)
1212                 if_link->speed = link.speed;
1213
1214         /* TODO - fill duplex properly */
1215         if_link->duplex = DUPLEX_FULL;
1216         qed_mcp_get_media_type(hwfn->cdev, &media_type);
1217         if_link->port = qed_get_port_type(media_type);
1218
1219         if_link->autoneg = params.speed.autoneg;
1220
1221         if (params.pause.autoneg)
1222                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1223         if (params.pause.forced_rx)
1224                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1225         if (params.pause.forced_tx)
1226                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1227
1228         /* Link partner capabilities */
1229         if (link.partner_adv_speed &
1230             QED_LINK_PARTNER_SPEED_1G_HD)
1231                 if_link->lp_caps |= SUPPORTED_1000baseT_Half;
1232         if (link.partner_adv_speed &
1233             QED_LINK_PARTNER_SPEED_1G_FD)
1234                 if_link->lp_caps |= SUPPORTED_1000baseT_Full;
1235         if (link.partner_adv_speed &
1236             QED_LINK_PARTNER_SPEED_10G)
1237                 if_link->lp_caps |= SUPPORTED_10000baseKR_Full;
1238         if (link.partner_adv_speed &
1239             QED_LINK_PARTNER_SPEED_40G)
1240                 if_link->lp_caps |= SUPPORTED_40000baseLR4_Full;
1241         if (link.partner_adv_speed &
1242             QED_LINK_PARTNER_SPEED_50G)
1243                 if_link->lp_caps |= 0;
1244         if (link.partner_adv_speed &
1245             QED_LINK_PARTNER_SPEED_100G)
1246                 if_link->lp_caps |= 0;
1247
1248         if (link.an_complete)
1249                 if_link->lp_caps |= SUPPORTED_Autoneg;
1250
1251         if (link.partner_adv_pause)
1252                 if_link->lp_caps |= SUPPORTED_Pause;
1253         if (link.partner_adv_pause == QED_LINK_PARTNER_ASYMMETRIC_PAUSE ||
1254             link.partner_adv_pause == QED_LINK_PARTNER_BOTH_PAUSE)
1255                 if_link->lp_caps |= SUPPORTED_Asym_Pause;
1256 }
1257
1258 static void qed_get_current_link(struct qed_dev *cdev,
1259                                  struct qed_link_output *if_link)
1260 {
1261         int i;
1262
1263         qed_fill_link(&cdev->hwfns[0], if_link);
1264
1265         for_each_hwfn(cdev, i)
1266                 qed_inform_vf_link_state(&cdev->hwfns[i]);
1267 }
1268
1269 void qed_link_update(struct qed_hwfn *hwfn)
1270 {
1271         void *cookie = hwfn->cdev->ops_cookie;
1272         struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
1273         struct qed_link_output if_link;
1274
1275         qed_fill_link(hwfn, &if_link);
1276         qed_inform_vf_link_state(hwfn);
1277
1278         if (IS_LEAD_HWFN(hwfn) && cookie)
1279                 op->link_update(cookie, &if_link);
1280 }
1281
1282 static int qed_drain(struct qed_dev *cdev)
1283 {
1284         struct qed_hwfn *hwfn;
1285         struct qed_ptt *ptt;
1286         int i, rc;
1287
1288         if (IS_VF(cdev))
1289                 return 0;
1290
1291         for_each_hwfn(cdev, i) {
1292                 hwfn = &cdev->hwfns[i];
1293                 ptt = qed_ptt_acquire(hwfn);
1294                 if (!ptt) {
1295                         DP_NOTICE(hwfn, "Failed to drain NIG; No PTT\n");
1296                         return -EBUSY;
1297                 }
1298                 rc = qed_mcp_drain(hwfn, ptt);
1299                 if (rc)
1300                         return rc;
1301                 qed_ptt_release(hwfn, ptt);
1302         }
1303
1304         return 0;
1305 }
1306
1307 static void qed_get_coalesce(struct qed_dev *cdev, u16 *rx_coal, u16 *tx_coal)
1308 {
1309         *rx_coal = cdev->rx_coalesce_usecs;
1310         *tx_coal = cdev->tx_coalesce_usecs;
1311 }
1312
1313 static int qed_set_coalesce(struct qed_dev *cdev, u16 rx_coal, u16 tx_coal,
1314                             u8 qid, u16 sb_id)
1315 {
1316         struct qed_hwfn *hwfn;
1317         struct qed_ptt *ptt;
1318         int hwfn_index;
1319         int status = 0;
1320
1321         hwfn_index = qid % cdev->num_hwfns;
1322         hwfn = &cdev->hwfns[hwfn_index];
1323         ptt = qed_ptt_acquire(hwfn);
1324         if (!ptt)
1325                 return -EAGAIN;
1326
1327         status = qed_set_rxq_coalesce(hwfn, ptt, rx_coal,
1328                                       qid / cdev->num_hwfns, sb_id);
1329         if (status)
1330                 goto out;
1331         status = qed_set_txq_coalesce(hwfn, ptt, tx_coal,
1332                                       qid / cdev->num_hwfns, sb_id);
1333 out:
1334         qed_ptt_release(hwfn, ptt);
1335
1336         return status;
1337 }
1338
1339 static int qed_set_led(struct qed_dev *cdev, enum qed_led_mode mode)
1340 {
1341         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1342         struct qed_ptt *ptt;
1343         int status = 0;
1344
1345         ptt = qed_ptt_acquire(hwfn);
1346         if (!ptt)
1347                 return -EAGAIN;
1348
1349         status = qed_mcp_set_led(hwfn, ptt, mode);
1350
1351         qed_ptt_release(hwfn, ptt);
1352
1353         return status;
1354 }
1355
1356 struct qed_selftest_ops qed_selftest_ops_pass = {
1357         .selftest_memory = &qed_selftest_memory,
1358         .selftest_interrupt = &qed_selftest_interrupt,
1359         .selftest_register = &qed_selftest_register,
1360         .selftest_clock = &qed_selftest_clock,
1361 };
1362
1363 const struct qed_common_ops qed_common_ops_pass = {
1364         .selftest = &qed_selftest_ops_pass,
1365         .probe = &qed_probe,
1366         .remove = &qed_remove,
1367         .set_power_state = &qed_set_power_state,
1368         .set_id = &qed_set_id,
1369         .update_pf_params = &qed_update_pf_params,
1370         .slowpath_start = &qed_slowpath_start,
1371         .slowpath_stop = &qed_slowpath_stop,
1372         .set_fp_int = &qed_set_int_fp,
1373         .get_fp_int = &qed_get_int_fp,
1374         .sb_init = &qed_sb_init,
1375         .sb_release = &qed_sb_release,
1376         .simd_handler_config = &qed_simd_handler_config,
1377         .simd_handler_clean = &qed_simd_handler_clean,
1378         .can_link_change = &qed_can_link_change,
1379         .set_link = &qed_set_link,
1380         .get_link = &qed_get_current_link,
1381         .drain = &qed_drain,
1382         .update_msglvl = &qed_init_dp,
1383         .chain_alloc = &qed_chain_alloc,
1384         .chain_free = &qed_chain_free,
1385         .get_coalesce = &qed_get_coalesce,
1386         .set_coalesce = &qed_set_coalesce,
1387         .set_led = &qed_set_led,
1388 };