drivers/net/ethernet/qlogic/qed/qed_mcp.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015 QLogic Corporation
   3  *
   4  * This software is available under the terms of the GNU General Public License
   5  * (GPL) Version 2, available from the file COPYING in the main directory of
   6  * this source tree.
   7  */
   8
   9 #include <linux/types.h>
  10 #include <asm/byteorder.h>
  11 #include <linux/delay.h>
  12 #include <linux/errno.h>
  13 #include <linux/kernel.h>
  14 #include <linux/slab.h>
  15 #include <linux/spinlock.h>
  16 #include <linux/string.h>
  17 #include "qed.h"
  18 #include "qed_dcbx.h"
  19 #include "qed_hsi.h"
  20 #include "qed_hw.h"
  21 #include "qed_mcp.h"
  22 #include "qed_reg_addr.h"
  23 #include "qed_sriov.h"
  24
  25 #define CHIP_MCP_RESP_ITER_US 10
  26
  27 #define QED_DRV_MB_MAX_RETRIES  (500 * 1000)    /* Account for 5 sec */
  28 #define QED_MCP_RESET_RETRIES   (50 * 1000)     /* Account for 500 msec */
  29
  30 #define DRV_INNER_WR(_p_hwfn, _p_ptt, _ptr, _offset, _val)           \
  31         qed_wr(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset), \
  32                _val)
  33
  34 #define DRV_INNER_RD(_p_hwfn, _p_ptt, _ptr, _offset) \
  35         qed_rd(_p_hwfn, _p_ptt, (_p_hwfn->mcp_info->_ptr + _offset))
  36
  37 #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val)  \
  38         DRV_INNER_WR(p_hwfn, _p_ptt, drv_mb_addr, \
  39                      offsetof(struct public_drv_mb, _field), _val)
  40
  41 #define DRV_MB_RD(_p_hwfn, _p_ptt, _field)         \
  42         DRV_INNER_RD(_p_hwfn, _p_ptt, drv_mb_addr, \
  43                      offsetof(struct public_drv_mb, _field))
  44
  45 #define PDA_COMP (((FW_MAJOR_VERSION) + (FW_MINOR_VERSION << 8)) << \
  46                   DRV_ID_PDA_COMP_VER_SHIFT)
  47
  48 #define MCP_BYTES_PER_MBIT_SHIFT 17
  49
  50 bool qed_mcp_is_init(struct qed_hwfn *p_hwfn)
  51 {
  52         if (!p_hwfn->mcp_info || !p_hwfn->mcp_info->public_base)
  53                 return false;
  54         return true;
  55 }
  56
  57 void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  58 {
  59         u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
  60                                         PUBLIC_PORT);
  61         u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr);
  62
  63         p_hwfn->mcp_info->port_addr = SECTION_ADDR(mfw_mb_offsize,
  64                                                    MFW_PORT(p_hwfn));
  65         DP_VERBOSE(p_hwfn, QED_MSG_SP,
  66                    "port_addr = 0x%x, port_id 0x%02x\n",
  67                    p_hwfn->mcp_info->port_addr, MFW_PORT(p_hwfn));
  68 }
  69
  70 void qed_mcp_read_mb(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  71 {
  72         u32 length = MFW_DRV_MSG_MAX_DWORDS(p_hwfn->mcp_info->mfw_mb_length);
  73         u32 tmp, i;
  74
  75         if (!p_hwfn->mcp_info->public_base)
  76                 return;
  77
  78         for (i = 0; i < length; i++) {
  79                 tmp = qed_rd(p_hwfn, p_ptt,
  80                              p_hwfn->mcp_info->mfw_mb_addr +
  81                              (i << 2) + sizeof(u32));
  82
  83                 /* The MB data is actually BE; Need to force it to cpu */
  84                 ((u32 *)p_hwfn->mcp_info->mfw_mb_cur)[i] =
  85                         be32_to_cpu((__force __be32)tmp);
  86         }
  87 }
  88
  89 int qed_mcp_free(struct qed_hwfn *p_hwfn)
  90 {
  91         if (p_hwfn->mcp_info) {
  92                 kfree(p_hwfn->mcp_info->mfw_mb_cur);
  93                 kfree(p_hwfn->mcp_info->mfw_mb_shadow);
  94         }
  95         kfree(p_hwfn->mcp_info);
  96
  97         return 0;
  98 }
  99
 100 static int qed_load_mcp_offsets(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 101 {
 102         struct qed_mcp_info *p_info = p_hwfn->mcp_info;
 103         u32 drv_mb_offsize, mfw_mb_offsize;
 104         u32 mcp_pf_id = MCP_PF_ID(p_hwfn);
 105
 106         p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR);
 107         if (!p_info->public_base)
 108                 return 0;
 109
 110         p_info->public_base |= GRCBASE_MCP;
 111
 112         /* Calculate the driver and MFW mailbox address */
 113         drv_mb_offsize = qed_rd(p_hwfn, p_ptt,
 114                                 SECTION_OFFSIZE_ADDR(p_info->public_base,
 115                                                      PUBLIC_DRV_MB));
 116         p_info->drv_mb_addr = SECTION_ADDR(drv_mb_offsize, mcp_pf_id);
 117         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 118                    "drv_mb_offsiz = 0x%x, drv_mb_addr = 0x%x mcp_pf_id = 0x%x\n",
 119                    drv_mb_offsize, p_info->drv_mb_addr, mcp_pf_id);
 120
 121         /* Set the MFW MB address */
 122         mfw_mb_offsize = qed_rd(p_hwfn, p_ptt,
 123                                 SECTION_OFFSIZE_ADDR(p_info->public_base,
 124                                                      PUBLIC_MFW_MB));
 125         p_info->mfw_mb_addr = SECTION_ADDR(mfw_mb_offsize, mcp_pf_id);
 126         p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr);
 127
 128         /* Get the current driver mailbox sequence before sending
 129          * the first command
 130          */
 131         p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) &
 132                              DRV_MSG_SEQ_NUMBER_MASK;
 133
 134         /* Get current FW pulse sequence */
 135         p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) &
 136                                 DRV_PULSE_SEQ_MASK;
 137
 138         p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0);
 139
 140         return 0;
 141 }
 142
 143 int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 144 {
 145         struct qed_mcp_info *p_info;
 146         u32 size;
 147
 148         /* Allocate mcp_info structure */
 149         p_hwfn->mcp_info = kzalloc(sizeof(*p_hwfn->mcp_info), GFP_KERNEL);
 150         if (!p_hwfn->mcp_info)
 151                 goto err;
 152         p_info = p_hwfn->mcp_info;
 153
 154         if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) {
 155                 DP_NOTICE(p_hwfn, "MCP is not initialized\n");
 156                 /* Do not free mcp_info here, since public_base indicate that
 157                  * the MCP is not initialized
 158                  */
 159                 return 0;
 160         }
 161
 162         size = MFW_DRV_MSG_MAX_DWORDS(p_info->mfw_mb_length) * sizeof(u32);
 163         p_info->mfw_mb_cur = kzalloc(size, GFP_KERNEL);
 164         p_info->mfw_mb_shadow = kzalloc(size, GFP_KERNEL);
 165         if (!p_info->mfw_mb_shadow || !p_info->mfw_mb_addr)
 166                 goto err;
 167
 168         /* Initialize the MFW spinlock */
 169         spin_lock_init(&p_info->lock);
 170
 171         return 0;
 172
 173 err:
 174         DP_NOTICE(p_hwfn, "Failed to allocate mcp memory\n");
 175         qed_mcp_free(p_hwfn);
 176         return -ENOMEM;
 177 }
 178
 179 /* Locks the MFW mailbox of a PF to ensure a single access.
 180  * The lock is achieved in most cases by holding a spinlock, causing other
 181  * threads to wait till a previous access is done.
 182  * In some cases (currently when a [UN]LOAD_REQ commands are sent), the single
 183  * access is achieved by setting a blocking flag, which will fail other
 184  * competing contexts to send their mailboxes.
 185  */
 186 static int qed_mcp_mb_lock(struct qed_hwfn *p_hwfn, u32 cmd)
 187 {
 188         spin_lock_bh(&p_hwfn->mcp_info->lock);
 189
 190         /* The spinlock shouldn't be acquired when the mailbox command is
 191          * [UN]LOAD_REQ, since the engine is locked by the MFW, and a parallel
 192          * pending [UN]LOAD_REQ command of another PF together with a spinlock
 193          * (i.e. interrupts are disabled) - can lead to a deadlock.
 194          * It is assumed that for a single PF, no other mailbox commands can be
 195          * sent from another context while sending LOAD_REQ, and that any
 196          * parallel commands to UNLOAD_REQ can be cancelled.
 197          */
 198         if (cmd == DRV_MSG_CODE_LOAD_DONE || cmd == DRV_MSG_CODE_UNLOAD_DONE)
 199                 p_hwfn->mcp_info->block_mb_sending = false;
 200
 201         if (p_hwfn->mcp_info->block_mb_sending) {
 202                 DP_NOTICE(p_hwfn,
 203                           "Trying to send a MFW mailbox command [0x%x] in parallel to [UN]LOAD_REQ. Aborting.\n",
 204                           cmd);
 205                 spin_unlock_bh(&p_hwfn->mcp_info->lock);
 206                 return -EBUSY;
 207         }
 208
 209         if (cmd == DRV_MSG_CODE_LOAD_REQ || cmd == DRV_MSG_CODE_UNLOAD_REQ) {
 210                 p_hwfn->mcp_info->block_mb_sending = true;
 211                 spin_unlock_bh(&p_hwfn->mcp_info->lock);
 212         }
 213
 214         return 0;
 215 }
 216
 217 static void qed_mcp_mb_unlock(struct qed_hwfn *p_hwfn, u32 cmd)
 218 {
 219         if (cmd != DRV_MSG_CODE_LOAD_REQ && cmd != DRV_MSG_CODE_UNLOAD_REQ)
 220                 spin_unlock_bh(&p_hwfn->mcp_info->lock);
 221 }
 222
 223 int qed_mcp_reset(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 224 {
 225         u32 seq = ++p_hwfn->mcp_info->drv_mb_seq;
 226         u8 delay = CHIP_MCP_RESP_ITER_US;
 227         u32 org_mcp_reset_seq, cnt = 0;
 228         int rc = 0;
 229
 230         /* Ensure that only a single thread is accessing the mailbox at a
 231          * certain time.
 232          */
 233         rc = qed_mcp_mb_lock(p_hwfn, DRV_MSG_CODE_MCP_RESET);
 234         if (rc != 0)
 235                 return rc;
 236
 237         /* Set drv command along with the updated sequence */
 238         org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0);
 239         DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header,
 240                   (DRV_MSG_CODE_MCP_RESET | seq));
 241
 242         do {
 243                 /* Wait for MFW response */
 244                 udelay(delay);
 245                 /* Give the FW up to 500 second (50*1000*10usec) */
 246         } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt,
 247                                               MISCS_REG_GENERIC_POR_0)) &&
 248                  (cnt++ < QED_MCP_RESET_RETRIES));
 249
 250         if (org_mcp_reset_seq !=
 251             qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) {
 252                 DP_VERBOSE(p_hwfn, QED_MSG_SP,
 253                            "MCP was reset after %d usec\n", cnt * delay);
 254         } else {
 255                 DP_ERR(p_hwfn, "Failed to reset MCP\n");
 256                 rc = -EAGAIN;
 257         }
 258
 259         qed_mcp_mb_unlock(p_hwfn, DRV_MSG_CODE_MCP_RESET);
 260
 261         return rc;
 262 }
 263
 264 static int qed_do_mcp_cmd(struct qed_hwfn *p_hwfn,
 265                           struct qed_ptt *p_ptt,
 266                           u32 cmd,
 267                           u32 param,
 268                           u32 *o_mcp_resp,
 269                           u32 *o_mcp_param)
 270 {
 271         u8 delay = CHIP_MCP_RESP_ITER_US;
 272         u32 seq, cnt = 1, actual_mb_seq;
 273         int rc = 0;
 274
 275         /* Get actual driver mailbox sequence */
 276         actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) &
 277                         DRV_MSG_SEQ_NUMBER_MASK;
 278
 279         /* Use MCP history register to check if MCP reset occurred between
 280          * init time and now.
 281          */
 282         if (p_hwfn->mcp_info->mcp_hist !=
 283             qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) {
 284                 DP_VERBOSE(p_hwfn, QED_MSG_SP, "Rereading MCP offsets\n");
 285                 qed_load_mcp_offsets(p_hwfn, p_ptt);
 286                 qed_mcp_cmd_port_init(p_hwfn, p_ptt);
 287         }
 288         seq = ++p_hwfn->mcp_info->drv_mb_seq;
 289
 290         /* Set drv param */
 291         DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param);
 292
 293         /* Set drv command along with the updated sequence */
 294         DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq));
 295
 296         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 297                    "wrote command (%x) to MFW MB param 0x%08x\n",
 298                    (cmd | seq), param);
 299
 300         do {
 301                 /* Wait for MFW response */
 302                 udelay(delay);
 303                 *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header);
 304
 305                 /* Give the FW up to 5 second (500*10ms) */
 306         } while ((seq != (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) &&
 307                  (cnt++ < QED_DRV_MB_MAX_RETRIES));
 308
 309         DP_VERBOSE(p_hwfn, QED_MSG_SP,
 310                    "[after %d ms] read (%x) seq is (%x) from FW MB\n",
 311                    cnt * delay, *o_mcp_resp, seq);
 312
 313         /* Is this a reply to our command? */
 314         if (seq == (*o_mcp_resp & FW_MSG_SEQ_NUMBER_MASK)) {
 315                 *o_mcp_resp &= FW_MSG_CODE_MASK;
 316                 /* Get the MCP param */
 317                 *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param);
 318         } else {
 319                 /* FW BUG! */
 320                 DP_ERR(p_hwfn, "MFW failed to respond [cmd 0x%x param 0x%x]\n",
 321                        cmd, param);
 322                 *o_mcp_resp = 0;
 323                 rc = -EAGAIN;
 324         }
 325         return rc;
 326 }
 327
 328 static int qed_mcp_cmd_and_union(struct qed_hwfn *p_hwfn,
 329                                  struct qed_ptt *p_ptt,
 330                                  struct qed_mcp_mb_params *p_mb_params)
 331 {
 332         u32 union_data_addr;
 333         int rc;
 334
 335         /* MCP not initialized */
 336         if (!qed_mcp_is_init(p_hwfn)) {
 337                 DP_NOTICE(p_hwfn, "MFW is not initialized!\n");
 338                 return -EBUSY;
 339         }
 340
 341         union_data_addr = p_hwfn->mcp_info->drv_mb_addr +
 342                           offsetof(struct public_drv_mb, union_data);
 343
 344         /* Ensure that only a single thread is accessing the mailbox at a
 345          * certain time.
 346          */
 347         rc = qed_mcp_mb_lock(p_hwfn, p_mb_params->cmd);
 348         if (rc)
 349                 return rc;
 350
 351         if (p_mb_params->p_data_src != NULL)
 352                 qed_memcpy_to(p_hwfn, p_ptt, union_data_addr,
 353                               p_mb_params->p_data_src,
 354                               sizeof(*p_mb_params->p_data_src));
 355
 356         rc = qed_do_mcp_cmd(p_hwfn, p_ptt, p_mb_params->cmd,
 357                             p_mb_params->param, &p_mb_params->mcp_resp,
 358                             &p_mb_params->mcp_param);
 359
 360         if (p_mb_params->p_data_dst != NULL)
 361                 qed_memcpy_from(p_hwfn, p_ptt, p_mb_params->p_data_dst,
 362                                 union_data_addr,
 363                                 sizeof(*p_mb_params->p_data_dst));
 364
 365         qed_mcp_mb_unlock(p_hwfn, p_mb_params->cmd);
 366
 367         return rc;
 368 }
 369
 370 int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
 371                 struct qed_ptt *p_ptt,
 372                 u32 cmd,
 373                 u32 param,
 374                 u32 *o_mcp_resp,
 375                 u32 *o_mcp_param)
 376 {
 377         struct qed_mcp_mb_params mb_params;
 378         int rc;
 379
 380         memset(&mb_params, 0, sizeof(mb_params));
 381         mb_params.cmd = cmd;
 382         mb_params.param = param;
 383         rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
 384         if (rc)
 385                 return rc;
 386
 387         *o_mcp_resp = mb_params.mcp_resp;
 388         *o_mcp_param = mb_params.mcp_param;
 389
 390         return 0;
 391 }
 392
 393 int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
 394                      struct qed_ptt *p_ptt, u32 *p_load_code)
 395 {
 396         struct qed_dev *cdev = p_hwfn->cdev;
 397         struct qed_mcp_mb_params mb_params;
 398         union drv_union_data union_data;
 399         int rc;
 400
 401         memset(&mb_params, 0, sizeof(mb_params));
 402         /* Load Request */
 403         mb_params.cmd = DRV_MSG_CODE_LOAD_REQ;
 404         mb_params.param = PDA_COMP | DRV_ID_MCP_HSI_VER_CURRENT |
 405                           cdev->drv_type;
 406         memcpy(&union_data.ver_str, cdev->ver_str, MCP_DRV_VER_STR_SIZE);
 407         mb_params.p_data_src = &union_data;
 408         rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
 409
 410         /* if mcp fails to respond we must abort */
 411         if (rc) {
 412                 DP_ERR(p_hwfn, "MCP response failure, aborting\n");
 413                 return rc;
 414         }
 415
 416         *p_load_code = mb_params.mcp_resp;
 417
 418         /* If MFW refused (e.g. other port is in diagnostic mode) we
 419          * must abort. This can happen in the following cases:
 420          * - Other port is in diagnostic mode
 421          * - Previously loaded function on the engine is not compliant with
 422          *   the requester.
 423          * - MFW cannot cope with the requester's DRV_MFW_HSI_VERSION.
 424          *      -
 425          */
 426         if (!(*p_load_code) ||
 427             ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_HSI) ||
 428             ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_PDA) ||
 429             ((*p_load_code) == FW_MSG_CODE_DRV_LOAD_REFUSED_DIAG)) {
 430                 DP_ERR(p_hwfn, "MCP refused load request, aborting\n");
 431                 return -EBUSY;
 432         }
 433
 434         return 0;
 435 }
 436
 437 static void qed_mcp_handle_vf_flr(struct qed_hwfn *p_hwfn,
 438                                   struct qed_ptt *p_ptt)
 439 {
 440         u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
 441                                         PUBLIC_PATH);
 442         u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr);
 443         u32 path_addr = SECTION_ADDR(mfw_path_offsize,
 444                                      QED_PATH_ID(p_hwfn));
 445         u32 disabled_vfs[VF_MAX_STATIC / 32];
 446         int i;
 447
 448         DP_VERBOSE(p_hwfn,
 449                    QED_MSG_SP,
 450                    "Reading Disabled VF information from [offset %08x], path_addr %08x\n",
 451                    mfw_path_offsize, path_addr);
 452
 453         for (i = 0; i < (VF_MAX_STATIC / 32); i++) {
 454                 disabled_vfs[i] = qed_rd(p_hwfn, p_ptt,
 455                                          path_addr +
 456                                          offsetof(struct public_path,
 457                                                   mcp_vf_disabled) +
 458                                          sizeof(u32) * i);
 459                 DP_VERBOSE(p_hwfn, (QED_MSG_SP | QED_MSG_IOV),
 460                            "FLR-ed VFs [%08x,...,%08x] - %08x\n",
 461                            i * 32, (i + 1) * 32 - 1, disabled_vfs[i]);
 462         }
 463
 464         if (qed_iov_mark_vf_flr(p_hwfn, disabled_vfs))
 465                 qed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG);
 466 }
 467
 468 int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
 469                        struct qed_ptt *p_ptt, u32 *vfs_to_ack)
 470 {
 471         u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
 472                                         PUBLIC_FUNC);
 473         u32 mfw_func_offsize = qed_rd(p_hwfn, p_ptt, addr);
 474         u32 func_addr = SECTION_ADDR(mfw_func_offsize,
 475                                      MCP_PF_ID(p_hwfn));
 476         struct qed_mcp_mb_params mb_params;
 477         union drv_union_data union_data;
 478         int rc;
 479         int i;
 480
 481         for (i = 0; i < (VF_MAX_STATIC / 32); i++)
 482                 DP_VERBOSE(p_hwfn, (QED_MSG_SP | QED_MSG_IOV),
 483                            "Acking VFs [%08x,...,%08x] - %08x\n",
 484                            i * 32, (i + 1) * 32 - 1, vfs_to_ack[i]);
 485
 486         memset(&mb_params, 0, sizeof(mb_params));
 487         mb_params.cmd = DRV_MSG_CODE_VF_DISABLED_DONE;
 488         memcpy(&union_data.ack_vf_disabled, vfs_to_ack, VF_MAX_STATIC / 8);
 489         mb_params.p_data_src = &union_data;
 490         rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
 491         if (rc) {
 492                 DP_NOTICE(p_hwfn, "Failed to pass ACK for VF flr to MFW\n");
 493                 return -EBUSY;
 494         }
 495
 496         /* Clear the ACK bits */
 497         for (i = 0; i < (VF_MAX_STATIC / 32); i++)
 498                 qed_wr(p_hwfn, p_ptt,
 499                        func_addr +
 500                        offsetof(struct public_func, drv_ack_vf_disabled) +
 501                        i * sizeof(u32), 0);
 502
 503         return rc;
 504 }
 505
 506 static void qed_mcp_handle_transceiver_change(struct qed_hwfn *p_hwfn,
 507                                               struct qed_ptt *p_ptt)
 508 {
 509         u32 transceiver_state;
 510
 511         transceiver_state = qed_rd(p_hwfn, p_ptt,
 512                                    p_hwfn->mcp_info->port_addr +
 513                                    offsetof(struct public_port,
 514                                             transceiver_data));
 515
 516         DP_VERBOSE(p_hwfn,
 517                    (NETIF_MSG_HW | QED_MSG_SP),
 518                    "Received transceiver state update [0x%08x] from mfw [Addr 0x%x]\n",
 519                    transceiver_state,
 520                    (u32)(p_hwfn->mcp_info->port_addr +
 521                           offsetof(struct public_port, transceiver_data)));
 522
 523         transceiver_state = GET_FIELD(transceiver_state,
 524                                       ETH_TRANSCEIVER_STATE);
 525
 526         if (transceiver_state == ETH_TRANSCEIVER_STATE_PRESENT)
 527                 DP_NOTICE(p_hwfn, "Transceiver is present.\n");
 528         else
 529                 DP_NOTICE(p_hwfn, "Transceiver is unplugged.\n");
 530 }
 531
 532 static void qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn,
 533                                        struct qed_ptt *p_ptt, bool b_reset)
 534 {
 535         struct qed_mcp_link_state *p_link;
 536         u8 max_bw, min_bw;
 537         u32 status = 0;
 538
 539         p_link = &p_hwfn->mcp_info->link_output;
 540         memset(p_link, 0, sizeof(*p_link));
 541         if (!b_reset) {
 542                 status = qed_rd(p_hwfn, p_ptt,
 543                                 p_hwfn->mcp_info->port_addr +
 544                                 offsetof(struct public_port, link_status));
 545                 DP_VERBOSE(p_hwfn, (NETIF_MSG_LINK | QED_MSG_SP),
 546                            "Received link update [0x%08x] from mfw [Addr 0x%x]\n",
 547                            status,
 548                            (u32)(p_hwfn->mcp_info->port_addr +
 549                                  offsetof(struct public_port, link_status)));
 550         } else {
 551                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 552                            "Resetting link indications\n");
 553                 return;
 554         }
 555
 556         if (p_hwfn->b_drv_link_init)
 557                 p_link->link_up = !!(status & LINK_STATUS_LINK_UP);
 558         else
 559                 p_link->link_up = false;
 560
 561         p_link->full_duplex = true;
 562         switch ((status & LINK_STATUS_SPEED_AND_DUPLEX_MASK)) {
 563         case LINK_STATUS_SPEED_AND_DUPLEX_100G:
 564                 p_link->speed = 100000;
 565                 break;
 566         case LINK_STATUS_SPEED_AND_DUPLEX_50G:
 567                 p_link->speed = 50000;
 568                 break;
 569         case LINK_STATUS_SPEED_AND_DUPLEX_40G:
 570                 p_link->speed = 40000;
 571                 break;
 572         case LINK_STATUS_SPEED_AND_DUPLEX_25G:
 573                 p_link->speed = 25000;
 574                 break;
 575         case LINK_STATUS_SPEED_AND_DUPLEX_20G:
 576                 p_link->speed = 20000;
 577                 break;
 578         case LINK_STATUS_SPEED_AND_DUPLEX_10G:
 579                 p_link->speed = 10000;
 580                 break;
 581         case LINK_STATUS_SPEED_AND_DUPLEX_1000THD:
 582                 p_link->full_duplex = false;
 583         /* Fall-through */
 584         case LINK_STATUS_SPEED_AND_DUPLEX_1000TFD:
 585                 p_link->speed = 1000;
 586                 break;
 587         default:
 588                 p_link->speed = 0;
 589         }
 590
 591         if (p_link->link_up && p_link->speed)
 592                 p_link->line_speed = p_link->speed;
 593         else
 594                 p_link->line_speed = 0;
 595
 596         max_bw = p_hwfn->mcp_info->func_info.bandwidth_max;
 597         min_bw = p_hwfn->mcp_info->func_info.bandwidth_min;
 598
 599         /* Max bandwidth configuration */
 600         __qed_configure_pf_max_bandwidth(p_hwfn, p_ptt, p_link, max_bw);
 601
 602         /* Min bandwidth configuration */
 603         __qed_configure_pf_min_bandwidth(p_hwfn, p_ptt, p_link, min_bw);
 604         qed_configure_vp_wfq_on_link_change(p_hwfn->cdev, p_link->min_pf_rate);
 605
 606         p_link->an = !!(status & LINK_STATUS_AUTO_NEGOTIATE_ENABLED);
 607         p_link->an_complete = !!(status &
 608                                  LINK_STATUS_AUTO_NEGOTIATE_COMPLETE);
 609         p_link->parallel_detection = !!(status &
 610                                         LINK_STATUS_PARALLEL_DETECTION_USED);
 611         p_link->pfc_enabled = !!(status & LINK_STATUS_PFC_ENABLED);
 612
 613         p_link->partner_adv_speed |=
 614                 (status & LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE) ?
 615                 QED_LINK_PARTNER_SPEED_1G_FD : 0;
 616         p_link->partner_adv_speed |=
 617                 (status & LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE) ?
 618                 QED_LINK_PARTNER_SPEED_1G_HD : 0;
 619         p_link->partner_adv_speed |=
 620                 (status & LINK_STATUS_LINK_PARTNER_10G_CAPABLE) ?
 621                 QED_LINK_PARTNER_SPEED_10G : 0;
 622         p_link->partner_adv_speed |=
 623                 (status & LINK_STATUS_LINK_PARTNER_20G_CAPABLE) ?
 624                 QED_LINK_PARTNER_SPEED_20G : 0;
 625         p_link->partner_adv_speed |=
 626                 (status & LINK_STATUS_LINK_PARTNER_25G_CAPABLE) ?
 627                 QED_LINK_PARTNER_SPEED_25G : 0;
 628         p_link->partner_adv_speed |=
 629                 (status & LINK_STATUS_LINK_PARTNER_40G_CAPABLE) ?
 630                 QED_LINK_PARTNER_SPEED_40G : 0;
 631         p_link->partner_adv_speed |=
 632                 (status & LINK_STATUS_LINK_PARTNER_50G_CAPABLE) ?
 633                 QED_LINK_PARTNER_SPEED_50G : 0;
 634         p_link->partner_adv_speed |=
 635                 (status & LINK_STATUS_LINK_PARTNER_100G_CAPABLE) ?
 636                 QED_LINK_PARTNER_SPEED_100G : 0;
 637
 638         p_link->partner_tx_flow_ctrl_en =
 639                 !!(status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED);
 640         p_link->partner_rx_flow_ctrl_en =
 641                 !!(status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED);
 642
 643         switch (status & LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK) {
 644         case LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE:
 645                 p_link->partner_adv_pause = QED_LINK_PARTNER_SYMMETRIC_PAUSE;
 646                 break;
 647         case LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE:
 648                 p_link->partner_adv_pause = QED_LINK_PARTNER_ASYMMETRIC_PAUSE;
 649                 break;
 650         case LINK_STATUS_LINK_PARTNER_BOTH_PAUSE:
 651                 p_link->partner_adv_pause = QED_LINK_PARTNER_BOTH_PAUSE;
 652                 break;
 653         default:
 654                 p_link->partner_adv_pause = 0;
 655         }
 656
 657         p_link->sfp_tx_fault = !!(status & LINK_STATUS_SFP_TX_FAULT);
 658
 659         qed_link_update(p_hwfn);
 660 }
 661
 662 int qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up)
 663 {
 664         struct qed_mcp_link_params *params = &p_hwfn->mcp_info->link_input;
 665         struct qed_mcp_mb_params mb_params;
 666         union drv_union_data union_data;
 667         struct eth_phy_cfg *phy_cfg;
 668         int rc = 0;
 669         u32 cmd;
 670
 671         /* Set the shmem configuration according to params */
 672         phy_cfg = &union_data.drv_phy_cfg;
 673         memset(phy_cfg, 0, sizeof(*phy_cfg));
 674         cmd = b_up ? DRV_MSG_CODE_INIT_PHY : DRV_MSG_CODE_LINK_RESET;
 675         if (!params->speed.autoneg)
 676                 phy_cfg->speed = params->speed.forced_speed;
 677         phy_cfg->pause |= (params->pause.autoneg) ? ETH_PAUSE_AUTONEG : 0;
 678         phy_cfg->pause |= (params->pause.forced_rx) ? ETH_PAUSE_RX : 0;
 679         phy_cfg->pause |= (params->pause.forced_tx) ? ETH_PAUSE_TX : 0;
 680         phy_cfg->adv_speed = params->speed.advertised_speeds;
 681         phy_cfg->loopback_mode = params->loopback_mode;
 682
 683         p_hwfn->b_drv_link_init = b_up;
 684
 685         if (b_up) {
 686                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 687                            "Configuring Link: Speed 0x%08x, Pause 0x%08x, adv_speed 0x%08x, loopback 0x%08x, features 0x%08x\n",
 688                            phy_cfg->speed,
 689                            phy_cfg->pause,
 690                            phy_cfg->adv_speed,
 691                            phy_cfg->loopback_mode,
 692                            phy_cfg->feature_config_flags);
 693         } else {
 694                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 695                            "Resetting link\n");
 696         }
 697
 698         memset(&mb_params, 0, sizeof(mb_params));
 699         mb_params.cmd = cmd;
 700         mb_params.p_data_src = &union_data;
 701         rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
 702
 703         /* if mcp fails to respond we must abort */
 704         if (rc) {
 705                 DP_ERR(p_hwfn, "MCP response failure, aborting\n");
 706                 return rc;
 707         }
 708
 709         /* Reset the link status if needed */
 710         if (!b_up)
 711                 qed_mcp_handle_link_change(p_hwfn, p_ptt, true);
 712
 713         return 0;
 714 }
 715
 716 static void qed_mcp_send_protocol_stats(struct qed_hwfn *p_hwfn,
 717                                         struct qed_ptt *p_ptt,
 718                                         enum MFW_DRV_MSG_TYPE type)
 719 {
 720         enum qed_mcp_protocol_type stats_type;
 721         union qed_mcp_protocol_stats stats;
 722         struct qed_mcp_mb_params mb_params;
 723         union drv_union_data union_data;
 724         u32 hsi_param;
 725
 726         switch (type) {
 727         case MFW_DRV_MSG_GET_LAN_STATS:
 728                 stats_type = QED_MCP_LAN_STATS;
 729                 hsi_param = DRV_MSG_CODE_STATS_TYPE_LAN;
 730                 break;
 731         case MFW_DRV_MSG_GET_FCOE_STATS:
 732                 stats_type = QED_MCP_FCOE_STATS;
 733                 hsi_param = DRV_MSG_CODE_STATS_TYPE_FCOE;
 734                 break;
 735         case MFW_DRV_MSG_GET_ISCSI_STATS:
 736                 stats_type = QED_MCP_ISCSI_STATS;
 737                 hsi_param = DRV_MSG_CODE_STATS_TYPE_ISCSI;
 738                 break;
 739         case MFW_DRV_MSG_GET_RDMA_STATS:
 740                 stats_type = QED_MCP_RDMA_STATS;
 741                 hsi_param = DRV_MSG_CODE_STATS_TYPE_RDMA;
 742                 break;
 743         default:
 744                 DP_NOTICE(p_hwfn, "Invalid protocol type %d\n", type);
 745                 return;
 746         }
 747
 748         qed_get_protocol_stats(p_hwfn->cdev, stats_type, &stats);
 749
 750         memset(&mb_params, 0, sizeof(mb_params));
 751         mb_params.cmd = DRV_MSG_CODE_GET_STATS;
 752         mb_params.param = hsi_param;
 753         memcpy(&union_data, &stats, sizeof(stats));
 754         mb_params.p_data_src = &union_data;
 755         qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
 756 }
 757
 758 static void qed_read_pf_bandwidth(struct qed_hwfn *p_hwfn,
 759                                   struct public_func *p_shmem_info)
 760 {
 761         struct qed_mcp_function_info *p_info;
 762
 763         p_info = &p_hwfn->mcp_info->func_info;
 764
 765         p_info->bandwidth_min = (p_shmem_info->config &
 766                                  FUNC_MF_CFG_MIN_BW_MASK) >>
 767                                         FUNC_MF_CFG_MIN_BW_SHIFT;
 768         if (p_info->bandwidth_min < 1 || p_info->bandwidth_min > 100) {
 769                 DP_INFO(p_hwfn,
 770                         "bandwidth minimum out of bounds [%02x]. Set to 1\n",
 771                         p_info->bandwidth_min);
 772                 p_info->bandwidth_min = 1;
 773         }
 774
 775         p_info->bandwidth_max = (p_shmem_info->config &
 776                                  FUNC_MF_CFG_MAX_BW_MASK) >>
 777                                         FUNC_MF_CFG_MAX_BW_SHIFT;
 778         if (p_info->bandwidth_max < 1 || p_info->bandwidth_max > 100) {
 779                 DP_INFO(p_hwfn,
 780                         "bandwidth maximum out of bounds [%02x]. Set to 100\n",
 781                         p_info->bandwidth_max);
 782                 p_info->bandwidth_max = 100;
 783         }
 784 }
 785
 786 static u32 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn,
 787                                   struct qed_ptt *p_ptt,
 788                                   struct public_func *p_data, int pfid)
 789 {
 790         u32 addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
 791                                         PUBLIC_FUNC);
 792         u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr);
 793         u32 func_addr = SECTION_ADDR(mfw_path_offsize, pfid);
 794         u32 i, size;
 795
 796         memset(p_data, 0, sizeof(*p_data));
 797
 798         size = min_t(u32, sizeof(*p_data), QED_SECTION_SIZE(mfw_path_offsize));
 799         for (i = 0; i < size / sizeof(u32); i++)
 800                 ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt,
 801                                             func_addr + (i << 2));
 802         return size;
 803 }
 804
 805 int qed_hw_init_first_eth(struct qed_hwfn *p_hwfn,
 806                           struct qed_ptt *p_ptt, u8 *p_pf)
 807 {
 808         struct public_func shmem_info;
 809         int i;
 810
 811         /* Find first Ethernet interface in port */
 812         for (i = 0; i < NUM_OF_ENG_PFS(p_hwfn->cdev);
 813              i += p_hwfn->cdev->num_ports_in_engines) {
 814                 qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info,
 815                                        MCP_PF_ID_BY_REL(p_hwfn, i));
 816
 817                 if (shmem_info.config & FUNC_MF_CFG_FUNC_HIDE)
 818                         continue;
 819
 820                 if ((shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK) ==
 821                     FUNC_MF_CFG_PROTOCOL_ETHERNET) {
 822                         *p_pf = (u8)i;
 823                         return 0;
 824                 }
 825         }
 826
 827         DP_NOTICE(p_hwfn,
 828                   "Failed to find on port an ethernet interface in MF_SI mode\n");
 829
 830         return -EINVAL;
 831 }
 832
 833 static void qed_mcp_update_bw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 834 {
 835         struct qed_mcp_function_info *p_info;
 836         struct public_func shmem_info;
 837         u32 resp = 0, param = 0;
 838
 839         qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, MCP_PF_ID(p_hwfn));
 840
 841         qed_read_pf_bandwidth(p_hwfn, &shmem_info);
 842
 843         p_info = &p_hwfn->mcp_info->func_info;
 844
 845         qed_configure_pf_min_bandwidth(p_hwfn->cdev, p_info->bandwidth_min);
 846         qed_configure_pf_max_bandwidth(p_hwfn->cdev, p_info->bandwidth_max);
 847
 848         /* Acknowledge the MFW */
 849         qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BW_UPDATE_ACK, 0, &resp,
 850                     &param);
 851 }
 852
 853 int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
 854                           struct qed_ptt *p_ptt)
 855 {
 856         struct qed_mcp_info *info = p_hwfn->mcp_info;
 857         int rc = 0;
 858         bool found = false;
 859         u16 i;
 860
 861         DP_VERBOSE(p_hwfn, QED_MSG_SP, "Received message from MFW\n");
 862
 863         /* Read Messages from MFW */
 864         qed_mcp_read_mb(p_hwfn, p_ptt);
 865
 866         /* Compare current messages to old ones */
 867         for (i = 0; i < info->mfw_mb_length; i++) {
 868                 if (info->mfw_mb_cur[i] == info->mfw_mb_shadow[i])
 869                         continue;
 870
 871                 found = true;
 872
 873                 DP_VERBOSE(p_hwfn, NETIF_MSG_LINK,
 874                            "Msg [%d] - old CMD 0x%02x, new CMD 0x%02x\n",
 875                            i, info->mfw_mb_shadow[i], info->mfw_mb_cur[i]);
 876
 877                 switch (i) {
 878                 case MFW_DRV_MSG_LINK_CHANGE:
 879                         qed_mcp_handle_link_change(p_hwfn, p_ptt, false);
 880                         break;
 881                 case MFW_DRV_MSG_VF_DISABLED:
 882                         qed_mcp_handle_vf_flr(p_hwfn, p_ptt);
 883                         break;
 884                 case MFW_DRV_MSG_LLDP_DATA_UPDATED:
 885                         qed_dcbx_mib_update_event(p_hwfn, p_ptt,
 886                                                   QED_DCBX_REMOTE_LLDP_MIB);
 887                         break;
 888                 case MFW_DRV_MSG_DCBX_REMOTE_MIB_UPDATED:
 889                         qed_dcbx_mib_update_event(p_hwfn, p_ptt,
 890                                                   QED_DCBX_REMOTE_MIB);
 891                         break;
 892                 case MFW_DRV_MSG_DCBX_OPERATIONAL_MIB_UPDATED:
 893                         qed_dcbx_mib_update_event(p_hwfn, p_ptt,
 894                                                   QED_DCBX_OPERATIONAL_MIB);
 895                         break;
 896                 case MFW_DRV_MSG_TRANSCEIVER_STATE_CHANGE:
 897                         qed_mcp_handle_transceiver_change(p_hwfn, p_ptt);
 898                         break;
 899                 case MFW_DRV_MSG_GET_LAN_STATS:
 900                 case MFW_DRV_MSG_GET_FCOE_STATS:
 901                 case MFW_DRV_MSG_GET_ISCSI_STATS:
 902                 case MFW_DRV_MSG_GET_RDMA_STATS:
 903                         qed_mcp_send_protocol_stats(p_hwfn, p_ptt, i);
 904                         break;
 905                 case MFW_DRV_MSG_BW_UPDATE:
 906                         qed_mcp_update_bw(p_hwfn, p_ptt);
 907                         break;
 908                 default:
 909                         DP_NOTICE(p_hwfn, "Unimplemented MFW message %d\n", i);
 910                         rc = -EINVAL;
 911                 }
 912         }
 913
 914         /* ACK everything */
 915         for (i = 0; i < MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length); i++) {
 916                 __be32 val = cpu_to_be32(((u32 *)info->mfw_mb_cur)[i]);
 917
 918                 /* MFW expect answer in BE, so we force write in that format */
 919                 qed_wr(p_hwfn, p_ptt,
 920                        info->mfw_mb_addr + sizeof(u32) +
 921                        MFW_DRV_MSG_MAX_DWORDS(info->mfw_mb_length) *
 922                        sizeof(u32) + i * sizeof(u32),
 923                        (__force u32)val);
 924         }
 925
 926         if (!found) {
 927                 DP_NOTICE(p_hwfn,
 928                           "Received an MFW message indication but no new message!\n");
 929                 rc = -EINVAL;
 930         }
 931
 932         /* Copy the new mfw messages into the shadow */
 933         memcpy(info->mfw_mb_shadow, info->mfw_mb_cur, info->mfw_mb_length);
 934
 935         return rc;
 936 }
 937
 938 int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
 939                         struct qed_ptt *p_ptt,
 940                         u32 *p_mfw_ver, u32 *p_running_bundle_id)
 941 {
 942         u32 global_offsize;
 943
 944         if (IS_VF(p_hwfn->cdev)) {
 945                 if (p_hwfn->vf_iov_info) {
 946                         struct pfvf_acquire_resp_tlv *p_resp;
 947
 948                         p_resp = &p_hwfn->vf_iov_info->acquire_resp;
 949                         *p_mfw_ver = p_resp->pfdev_info.mfw_ver;
 950                         return 0;
 951                 } else {
 952                         DP_VERBOSE(p_hwfn,
 953                                    QED_MSG_IOV,
 954                                    "VF requested MFW version prior to ACQUIRE\n");
 955                         return -EINVAL;
 956                 }
 957         }
 958
 959         global_offsize = qed_rd(p_hwfn, p_ptt,
 960                                 SECTION_OFFSIZE_ADDR(p_hwfn->
 961                                                      mcp_info->public_base,
 962                                                      PUBLIC_GLOBAL));
 963         *p_mfw_ver =
 964             qed_rd(p_hwfn, p_ptt,
 965                    SECTION_ADDR(global_offsize,
 966                                 0) + offsetof(struct public_global, mfw_ver));
 967
 968         if (p_running_bundle_id != NULL) {
 969                 *p_running_bundle_id = qed_rd(p_hwfn, p_ptt,
 970                                               SECTION_ADDR(global_offsize, 0) +
 971                                               offsetof(struct public_global,
 972                                                        running_bundle_id));
 973         }
 974
 975         return 0;
 976 }
 977
 978 int qed_mcp_get_media_type(struct qed_dev *cdev, u32 *p_media_type)
 979 {
 980         struct qed_hwfn *p_hwfn = &cdev->hwfns[0];
 981         struct qed_ptt  *p_ptt;
 982
 983         if (IS_VF(cdev))
 984                 return -EINVAL;
 985
 986         if (!qed_mcp_is_init(p_hwfn)) {
 987                 DP_NOTICE(p_hwfn, "MFW is not initialized!\n");
 988                 return -EBUSY;
 989         }
 990
 991         *p_media_type = MEDIA_UNSPECIFIED;
 992
 993         p_ptt = qed_ptt_acquire(p_hwfn);
 994         if (!p_ptt)
 995                 return -EBUSY;
 996
 997         *p_media_type = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr +
 998                                offsetof(struct public_port, media_type));
 999
1000         qed_ptt_release(p_hwfn, p_ptt);
1001
1002         return 0;
1003 }
1004
1005 static int
1006 qed_mcp_get_shmem_proto(struct qed_hwfn *p_hwfn,
1007                         struct public_func *p_info,
1008                         enum qed_pci_personality *p_proto)
1009 {
1010         int rc = 0;
1011
1012         switch (p_info->config & FUNC_MF_CFG_PROTOCOL_MASK) {
1013         case FUNC_MF_CFG_PROTOCOL_ETHERNET:
1014                 if (test_bit(QED_DEV_CAP_ROCE,
1015                              &p_hwfn->hw_info.device_capabilities))
1016                         *p_proto = QED_PCI_ETH_ROCE;
1017                 else
1018                         *p_proto = QED_PCI_ETH;
1019                 break;
1020         case FUNC_MF_CFG_PROTOCOL_ISCSI:
1021                 *p_proto = QED_PCI_ISCSI;
1022                 break;
1023         case FUNC_MF_CFG_PROTOCOL_ROCE:
1024                 DP_NOTICE(p_hwfn, "RoCE personality is not a valid value!\n");
1025                 rc = -EINVAL;
1026                 break;
1027         default:
1028                 rc = -EINVAL;
1029         }
1030
1031         return rc;
1032 }
1033
1034 int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
1035                                  struct qed_ptt *p_ptt)
1036 {
1037         struct qed_mcp_function_info *info;
1038         struct public_func shmem_info;
1039
1040         qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, MCP_PF_ID(p_hwfn));
1041         info = &p_hwfn->mcp_info->func_info;
1042
1043         info->pause_on_host = (shmem_info.config &
1044                                FUNC_MF_CFG_PAUSE_ON_HOST_RING) ? 1 : 0;
1045
1046         if (qed_mcp_get_shmem_proto(p_hwfn, &shmem_info, &info->protocol)) {
1047                 DP_ERR(p_hwfn, "Unknown personality %08x\n",
1048                        (u32)(shmem_info.config & FUNC_MF_CFG_PROTOCOL_MASK));
1049                 return -EINVAL;
1050         }
1051
1052         qed_read_pf_bandwidth(p_hwfn, &shmem_info);
1053
1054         if (shmem_info.mac_upper || shmem_info.mac_lower) {
1055                 info->mac[0] = (u8)(shmem_info.mac_upper >> 8);
1056                 info->mac[1] = (u8)(shmem_info.mac_upper);
1057                 info->mac[2] = (u8)(shmem_info.mac_lower >> 24);
1058                 info->mac[3] = (u8)(shmem_info.mac_lower >> 16);
1059                 info->mac[4] = (u8)(shmem_info.mac_lower >> 8);
1060                 info->mac[5] = (u8)(shmem_info.mac_lower);
1061         } else {
1062                 DP_NOTICE(p_hwfn, "MAC is 0 in shmem\n");
1063         }
1064
1065         info->wwn_port = (u64)shmem_info.fcoe_wwn_port_name_upper |
1066                          (((u64)shmem_info.fcoe_wwn_port_name_lower) << 32);
1067         info->wwn_node = (u64)shmem_info.fcoe_wwn_node_name_upper |
1068                          (((u64)shmem_info.fcoe_wwn_node_name_lower) << 32);
1069
1070         info->ovlan = (u16)(shmem_info.ovlan_stag & FUNC_MF_CFG_OV_STAG_MASK);
1071
1072         DP_VERBOSE(p_hwfn, (QED_MSG_SP | NETIF_MSG_IFUP),
1073                    "Read configuration from shmem: pause_on_host %02x protocol %02x BW [%02x - %02x] MAC %02x:%02x:%02x:%02x:%02x:%02x wwn port %llx node %llx ovlan %04x\n",
1074                 info->pause_on_host, info->protocol,
1075                 info->bandwidth_min, info->bandwidth_max,
1076                 info->mac[0], info->mac[1], info->mac[2],
1077                 info->mac[3], info->mac[4], info->mac[5],
1078                 info->wwn_port, info->wwn_node, info->ovlan);
1079
1080         return 0;
1081 }
1082
1083 struct qed_mcp_link_params
1084 *qed_mcp_get_link_params(struct qed_hwfn *p_hwfn)
1085 {
1086         if (!p_hwfn || !p_hwfn->mcp_info)
1087                 return NULL;
1088         return &p_hwfn->mcp_info->link_input;
1089 }
1090
1091 struct qed_mcp_link_state
1092 *qed_mcp_get_link_state(struct qed_hwfn *p_hwfn)
1093 {
1094         if (!p_hwfn || !p_hwfn->mcp_info)
1095                 return NULL;
1096         return &p_hwfn->mcp_info->link_output;
1097 }
1098
1099 struct qed_mcp_link_capabilities
1100 *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn)
1101 {
1102         if (!p_hwfn || !p_hwfn->mcp_info)
1103                 return NULL;
1104         return &p_hwfn->mcp_info->link_capabilities;
1105 }
1106
1107 int qed_mcp_drain(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1108 {
1109         u32 resp = 0, param = 0;
1110         int rc;
1111
1112         rc = qed_mcp_cmd(p_hwfn, p_ptt,
1113                          DRV_MSG_CODE_NIG_DRAIN, 1000, &resp, &param);
1114
1115         /* Wait for the drain to complete before returning */
1116         msleep(1020);
1117
1118         return rc;
1119 }
1120
1121 int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
1122                            struct qed_ptt *p_ptt, u32 *p_flash_size)
1123 {
1124         u32 flash_size;
1125
1126         if (IS_VF(p_hwfn->cdev))
1127                 return -EINVAL;
1128
1129         flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4);
1130         flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >>
1131                       MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT;
1132         flash_size = (1 << (flash_size + MCP_BYTES_PER_MBIT_SHIFT));
1133
1134         *p_flash_size = flash_size;
1135
1136         return 0;
1137 }
1138
1139 int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
1140                            struct qed_ptt *p_ptt, u8 vf_id, u8 num)
1141 {
1142         u32 resp = 0, param = 0, rc_param = 0;
1143         int rc;
1144
1145         /* Only Leader can configure MSIX, and need to take CMT into account */
1146         if (!IS_LEAD_HWFN(p_hwfn))
1147                 return 0;
1148         num *= p_hwfn->cdev->num_hwfns;
1149
1150         param |= (vf_id << DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_SHIFT) &
1151                  DRV_MB_PARAM_CFG_VF_MSIX_VF_ID_MASK;
1152         param |= (num << DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_SHIFT) &
1153                  DRV_MB_PARAM_CFG_VF_MSIX_SB_NUM_MASK;
1154
1155         rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_CFG_VF_MSIX, param,
1156                          &resp, &rc_param);
1157
1158         if (resp != FW_MSG_CODE_DRV_CFG_VF_MSIX_DONE) {
1159                 DP_NOTICE(p_hwfn, "VF[%d]: MFW failed to set MSI-X\n", vf_id);
1160                 rc = -EINVAL;
1161         } else {
1162                 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1163                            "Requested 0x%02x MSI-x interrupts from VF 0x%02x\n",
1164                            num, vf_id);
1165         }
1166
1167         return rc;
1168 }
1169
1170 int
1171 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
1172                          struct qed_ptt *p_ptt,
1173                          struct qed_mcp_drv_version *p_ver)
1174 {
1175         struct drv_version_stc *p_drv_version;
1176         struct qed_mcp_mb_params mb_params;
1177         union drv_union_data union_data;
1178         __be32 val;
1179         u32 i;
1180         int rc;
1181
1182         p_drv_version = &union_data.drv_version;
1183         p_drv_version->version = p_ver->version;
1184
1185         for (i = 0; i < MCP_DRV_VER_STR_SIZE - 1; i += 4) {
1186                 val = cpu_to_be32(p_ver->name[i]);
1187                 *(__be32 *)&p_drv_version->name[i * sizeof(u32)] = val;
1188         }
1189
1190         memset(&mb_params, 0, sizeof(mb_params));
1191         mb_params.cmd = DRV_MSG_CODE_SET_VERSION;
1192         mb_params.p_data_src = &union_data;
1193         rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
1194         if (rc)
1195                 DP_ERR(p_hwfn, "MCP response failure, aborting\n");
1196
1197         return rc;
1198 }
1199
1200 int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
1201                     struct qed_ptt *p_ptt, enum qed_led_mode mode)
1202 {
1203         u32 resp = 0, param = 0, drv_mb_param;
1204         int rc;
1205
1206         switch (mode) {
1207         case QED_LED_MODE_ON:
1208                 drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_ON;
1209                 break;
1210         case QED_LED_MODE_OFF:
1211                 drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OFF;
1212                 break;
1213         case QED_LED_MODE_RESTORE:
1214                 drv_mb_param = DRV_MB_PARAM_SET_LED_MODE_OPER;
1215                 break;
1216         default:
1217                 DP_NOTICE(p_hwfn, "Invalid LED mode %d\n", mode);
1218                 return -EINVAL;
1219         }
1220
1221         rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_LED_MODE,
1222                          drv_mb_param, &resp, &param);
1223
1224         return rc;
1225 }
1226
1227 int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1228 {
1229         u32 drv_mb_param = 0, rsp, param;
1230         int rc = 0;
1231
1232         drv_mb_param = (DRV_MB_PARAM_BIST_REGISTER_TEST <<
1233                         DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT);
1234
1235         rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST,
1236                          drv_mb_param, &rsp, &param);
1237
1238         if (rc)
1239                 return rc;
1240
1241         if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) ||
1242             (param != DRV_MB_PARAM_BIST_RC_PASSED))
1243                 rc = -EAGAIN;
1244
1245         return rc;
1246 }
1247
1248 int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
1249 {
1250         u32 drv_mb_param, rsp, param;
1251         int rc = 0;
1252
1253         drv_mb_param = (DRV_MB_PARAM_BIST_CLOCK_TEST <<
1254                         DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT);
1255
1256         rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST,
1257                          drv_mb_param, &rsp, &param);
1258
1259         if (rc)
1260                 return rc;
1261
1262         if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) ||
1263             (param != DRV_MB_PARAM_BIST_RC_PASSED))
1264                 rc = -EAGAIN;
1265
1266         return rc;
1267 }