drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  32 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  33 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  34 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  35 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  36 static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *,
  37                                   struct qlcnic_cmd_args *);
  38
  39 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  40         .read_crb                       = qlcnic_83xx_read_crb,
  41         .write_crb                      = qlcnic_83xx_write_crb,
  42         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  43         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  44         .get_mac_address                = qlcnic_83xx_get_mac_address,
  45         .setup_intr                     = qlcnic_83xx_setup_intr,
  46         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  47         .mbx_cmd                        = qlcnic_sriov_vf_mbx_op,
  48         .get_func_no                    = qlcnic_83xx_get_func_no,
  49         .api_lock                       = qlcnic_83xx_cam_lock,
  50         .api_unlock                     = qlcnic_83xx_cam_unlock,
  51         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  52         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  53         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  54         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  55         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  56         .setup_link_event               = qlcnic_83xx_setup_link_event,
  57         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  58         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  59         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  60         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  61         .napi_enable                    = qlcnic_83xx_napi_enable,
  62         .napi_disable                   = qlcnic_83xx_napi_disable,
  63         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  64         .config_rss                     = qlcnic_83xx_config_rss,
  65         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  66         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  67         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  68         .get_board_info                 = qlcnic_83xx_get_port_info,
  69         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  70 };
  71
  72 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  73         .config_bridged_mode    = qlcnic_config_bridged_mode,
  74         .config_led             = qlcnic_config_led,
  75         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  76         .napi_add               = qlcnic_83xx_napi_add,
  77         .napi_del               = qlcnic_83xx_napi_del,
  78         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  79         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  80 };
  81
  82 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  83         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  84         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  85         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  86         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  87 };
  88
  89 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  90 {
  91         return (val & (1 << QLC_BC_MSG)) ? true : false;
  92 }
  93
  94 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  95 {
  96         return (val & (1 << QLC_BC_CFREE)) ? true : false;
  97 }
  98
  99 static inline bool qlcnic_sriov_flr_check(u32 val)
 100 {
 101         return (val & (1 << QLC_BC_FLR)) ? true : false;
 102 }
 103
 104 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 105 {
 106         return (val >> 4) & 0xff;
 107 }
 108
 109 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 110 {
 111         struct pci_dev *dev = adapter->pdev;
 112         int pos;
 113         u16 stride, offset;
 114
 115         if (qlcnic_sriov_vf_check(adapter))
 116                 return 0;
 117
 118         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 119         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 120         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 121
 122         return (dev->devfn + offset + stride * vf_id) & 0xff;
 123 }
 124
 125 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 126 {
 127         struct qlcnic_sriov *sriov;
 128         struct qlcnic_back_channel *bc;
 129         struct workqueue_struct *wq;
 130         struct qlcnic_vport *vp;
 131         struct qlcnic_vf_info *vf;
 132         int err, i;
 133
 134         if (!qlcnic_sriov_enable_check(adapter))
 135                 return -EIO;
 136
 137         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 138         if (!sriov)
 139                 return -ENOMEM;
 140
 141         adapter->ahw->sriov = sriov;
 142         sriov->num_vfs = num_vfs;
 143         bc = &sriov->bc;
 144         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 145                                  num_vfs, GFP_KERNEL);
 146         if (!sriov->vf_info) {
 147                 err = -ENOMEM;
 148                 goto qlcnic_free_sriov;
 149         }
 150
 151         wq = create_singlethread_workqueue("bc-trans");
 152         if (wq == NULL) {
 153                 err = -ENOMEM;
 154                 dev_err(&adapter->pdev->dev,
 155                         "Cannot create bc-trans workqueue\n");
 156                 goto qlcnic_free_vf_info;
 157         }
 158
 159         bc->bc_trans_wq = wq;
 160
 161         wq = create_singlethread_workqueue("async");
 162         if (wq == NULL) {
 163                 err = -ENOMEM;
 164                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 165                 goto qlcnic_destroy_trans_wq;
 166         }
 167
 168         bc->bc_async_wq =  wq;
 169         INIT_LIST_HEAD(&bc->async_list);
 170
 171         for (i = 0; i < num_vfs; i++) {
 172                 vf = &sriov->vf_info[i];
 173                 vf->adapter = adapter;
 174                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 175                 mutex_init(&vf->send_cmd_lock);
 176                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 177                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 178                 spin_lock_init(&vf->rcv_act.lock);
 179                 spin_lock_init(&vf->rcv_pend.lock);
 180                 init_completion(&vf->ch_free_cmpl);
 181
 182                 if (qlcnic_sriov_pf_check(adapter)) {
 183                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 184                         if (!vp) {
 185                                 err = -ENOMEM;
 186                                 goto qlcnic_destroy_async_wq;
 187                         }
 188                         sriov->vf_info[i].vp = vp;
 189                         vp->max_tx_bw = MAX_BW;
 190                         random_ether_addr(vp->mac);
 191                         dev_info(&adapter->pdev->dev,
 192                                  "MAC Address %pM is configured for VF %d\n",
 193                                  vp->mac, i);
 194                 }
 195         }
 196
 197         return 0;
 198
 199 qlcnic_destroy_async_wq:
 200         destroy_workqueue(bc->bc_async_wq);
 201
 202 qlcnic_destroy_trans_wq:
 203         destroy_workqueue(bc->bc_trans_wq);
 204
 205 qlcnic_free_vf_info:
 206         kfree(sriov->vf_info);
 207
 208 qlcnic_free_sriov:
 209         kfree(adapter->ahw->sriov);
 210         return err;
 211 }
 212
 213 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 214 {
 215         struct qlcnic_bc_trans *trans;
 216         struct qlcnic_cmd_args cmd;
 217         unsigned long flags;
 218
 219         spin_lock_irqsave(&t_list->lock, flags);
 220
 221         while (!list_empty(&t_list->wait_list)) {
 222                 trans = list_first_entry(&t_list->wait_list,
 223                                          struct qlcnic_bc_trans, list);
 224                 list_del(&trans->list);
 225                 t_list->count--;
 226                 cmd.req.arg = (u32 *)trans->req_pay;
 227                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 228                 qlcnic_free_mbx_args(&cmd);
 229                 qlcnic_sriov_cleanup_transaction(trans);
 230         }
 231
 232         spin_unlock_irqrestore(&t_list->lock, flags);
 233 }
 234
 235 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 236 {
 237         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 238         struct qlcnic_back_channel *bc = &sriov->bc;
 239         struct qlcnic_vf_info *vf;
 240         int i;
 241
 242         if (!qlcnic_sriov_enable_check(adapter))
 243                 return;
 244
 245         qlcnic_sriov_cleanup_async_list(bc);
 246         destroy_workqueue(bc->bc_async_wq);
 247
 248         for (i = 0; i < sriov->num_vfs; i++) {
 249                 vf = &sriov->vf_info[i];
 250                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 251                 cancel_work_sync(&vf->trans_work);
 252                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 253         }
 254
 255         destroy_workqueue(bc->bc_trans_wq);
 256
 257         for (i = 0; i < sriov->num_vfs; i++)
 258                 kfree(sriov->vf_info[i].vp);
 259
 260         kfree(sriov->vf_info);
 261         kfree(adapter->ahw->sriov);
 262 }
 263
 264 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 265 {
 266         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 267         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 268         __qlcnic_sriov_cleanup(adapter);
 269 }
 270
 271 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 272 {
 273         if (qlcnic_sriov_pf_check(adapter))
 274                 qlcnic_sriov_pf_cleanup(adapter);
 275
 276         if (qlcnic_sriov_vf_check(adapter))
 277                 qlcnic_sriov_vf_cleanup(adapter);
 278 }
 279
 280 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 281                                     u32 *pay, u8 pci_func, u8 size)
 282 {
 283         u32 rsp, mbx_val, fw_data, rsp_num, mbx_cmd, val, wait_time = 0;
 284         struct qlcnic_hardware_context *ahw = adapter->ahw;
 285         unsigned long flags;
 286         u16 opcode;
 287         u8 mbx_err_code;
 288         int i, j;
 289
 290         opcode = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 291
 292         if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
 293                 dev_info(&adapter->pdev->dev,
 294                          "Mailbox cmd attempted, 0x%x\n", opcode);
 295                 dev_info(&adapter->pdev->dev, "Mailbox detached\n");
 296                 return 0;
 297         }
 298
 299         spin_lock_irqsave(&ahw->mbx_lock, flags);
 300
 301         mbx_val = QLCRDX(ahw, QLCNIC_HOST_MBX_CTRL);
 302         if (mbx_val) {
 303                 QLCDB(adapter, DRV, "Mailbox cmd attempted, 0x%x\n", opcode);
 304                 spin_unlock_irqrestore(&ahw->mbx_lock, flags);
 305                 return QLCNIC_RCODE_TIMEOUT;
 306         }
 307         /* Fill in mailbox registers */
 308         val = size + (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 309         mbx_cmd = 0x31 | (val << 16) | (adapter->ahw->fw_hal_version << 29);
 310
 311         writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 0));
 312         mbx_cmd = 0x1 | (1 << 4);
 313
 314         if (qlcnic_sriov_pf_check(adapter))
 315                 mbx_cmd |= (pci_func << 5);
 316
 317         writel(mbx_cmd, QLCNIC_MBX_HOST(ahw, 1));
 318         for (i = 2, j = 0; j < (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 319                         i++, j++) {
 320                 writel(*(hdr++), QLCNIC_MBX_HOST(ahw, i));
 321         }
 322         for (j = 0; j < size; j++, i++)
 323                 writel(*(pay++), QLCNIC_MBX_HOST(ahw, i));
 324
 325         /* Signal FW about the impending command */
 326         QLCWRX(ahw, QLCNIC_HOST_MBX_CTRL, QLCNIC_SET_OWNER);
 327
 328         /* Waiting for the mailbox cmd to complete and while waiting here
 329          * some AEN might arrive. If more than 5 seconds expire we can
 330          * assume something is wrong.
 331          */
 332 poll:
 333         rsp = qlcnic_83xx_mbx_poll(adapter, &wait_time);
 334         if (rsp != QLCNIC_RCODE_TIMEOUT) {
 335                 /* Get the FW response data */
 336                 fw_data = readl(QLCNIC_MBX_FW(ahw, 0));
 337                 if (fw_data &  QLCNIC_MBX_ASYNC_EVENT) {
 338                         __qlcnic_83xx_process_aen(adapter);
 339                         goto poll;
 340                 }
 341                 mbx_err_code = QLCNIC_MBX_STATUS(fw_data);
 342                 rsp_num = QLCNIC_MBX_NUM_REGS(fw_data);
 343                 opcode = QLCNIC_MBX_RSP(fw_data);
 344
 345                 switch (mbx_err_code) {
 346                 case QLCNIC_MBX_RSP_OK:
 347                 case QLCNIC_MBX_PORT_RSP_OK:
 348                         rsp = QLCNIC_RCODE_SUCCESS;
 349                         break;
 350                 default:
 351                         if (opcode == QLCNIC_CMD_CONFIG_MAC_VLAN) {
 352                                 rsp = qlcnic_83xx_mac_rcode(adapter);
 353                                 if (!rsp)
 354                                         goto out;
 355                         }
 356                         dev_err(&adapter->pdev->dev,
 357                                 "MBX command 0x%x failed with err:0x%x\n",
 358                                 opcode, mbx_err_code);
 359                         rsp = mbx_err_code;
 360                         break;
 361                 }
 362                 goto out;
 363         }
 364
 365         dev_err(&adapter->pdev->dev, "MBX command 0x%x timed out\n",
 366                 QLCNIC_MBX_RSP(mbx_cmd));
 367         rsp = QLCNIC_RCODE_TIMEOUT;
 368 out:
 369         /* clear fw mbx control register */
 370         QLCWRX(ahw, QLCNIC_FW_MBX_CTRL, QLCNIC_CLR_OWNER);
 371         spin_unlock_irqrestore(&adapter->ahw->mbx_lock, flags);
 372         return rsp;
 373 }
 374
 375 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 376 {
 377         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 378         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 379         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 380         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 381         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 382         adapter->max_rds_rings = MAX_RDS_RINGS;
 383 }
 384
 385 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 386                                    struct qlcnic_info *npar_info, u16 vport_id)
 387 {
 388         struct device *dev = &adapter->pdev->dev;
 389         struct qlcnic_cmd_args cmd;
 390         int err;
 391         u32 status;
 392
 393         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 394         if (err)
 395                 return err;
 396
 397         cmd.req.arg[1] = vport_id << 16 | 0x1;
 398         err = qlcnic_issue_cmd(adapter, &cmd);
 399         if (err) {
 400                 dev_err(&adapter->pdev->dev,
 401                         "Failed to get vport info, err=%d\n", err);
 402                 qlcnic_free_mbx_args(&cmd);
 403                 return err;
 404         }
 405
 406         status = cmd.rsp.arg[2] & 0xffff;
 407         if (status & BIT_0)
 408                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 409         if (status & BIT_1)
 410                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 411         if (status & BIT_2)
 412                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 413         if (status & BIT_3)
 414                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 415         if (status & BIT_4)
 416                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 417         if (status & BIT_5)
 418                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 419         if (status & BIT_6)
 420                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 421         if (status & BIT_7)
 422                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 423         if (status & BIT_8)
 424                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 425         if (status & BIT_9)
 426                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 427
 428         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 429         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 430         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 431         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 432
 433         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 434                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 435                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 436                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 437                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 438                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 439                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 440                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 441                  npar_info->max_rx_mcast_mac_filters,
 442                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 443                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 444                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 445                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 446                  npar_info->max_remote_ipv6_addrs);
 447
 448         qlcnic_free_mbx_args(&cmd);
 449         return err;
 450 }
 451
 452 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 453                                       struct qlcnic_cmd_args *cmd)
 454 {
 455         adapter->rx_pvid = (cmd->rsp.arg[1] >> 16) & 0xffff;
 456         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 457         return 0;
 458 }
 459
 460 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 461                                             struct qlcnic_cmd_args *cmd)
 462 {
 463         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 464         int i, num_vlans;
 465         u16 *vlans;
 466
 467         if (sriov->allowed_vlans)
 468                 return 0;
 469
 470         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 471         if (!sriov->any_vlan)
 472                 return 0;
 473
 474         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 475         num_vlans = sriov->num_allowed_vlans;
 476         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 477         if (!sriov->allowed_vlans)
 478                 return -ENOMEM;
 479
 480         vlans = (u16 *)&cmd->rsp.arg[3];
 481         for (i = 0; i < num_vlans; i++)
 482                 sriov->allowed_vlans[i] = vlans[i];
 483
 484         return 0;
 485 }
 486
 487 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter)
 488 {
 489         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 490         struct qlcnic_cmd_args cmd;
 491         int ret;
 492
 493         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 494         if (ret)
 495                 return ret;
 496
 497         ret = qlcnic_issue_cmd(adapter, &cmd);
 498         if (ret) {
 499                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 500                         ret);
 501         } else {
 502                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 503                 switch (sriov->vlan_mode) {
 504                 case QLC_GUEST_VLAN_MODE:
 505                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 506                         break;
 507                 case QLC_PVID_MODE:
 508                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 509                         break;
 510                 }
 511         }
 512
 513         qlcnic_free_mbx_args(&cmd);
 514         return ret;
 515 }
 516
 517 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 518 {
 519         struct qlcnic_info nic_info;
 520         struct qlcnic_hardware_context *ahw = adapter->ahw;
 521         int err;
 522
 523         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 524         if (err)
 525                 return err;
 526
 527         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 528         if (err)
 529                 return -EIO;
 530
 531         err = qlcnic_sriov_get_vf_acl(adapter);
 532         if (err)
 533                 return err;
 534
 535         if (qlcnic_83xx_get_port_info(adapter))
 536                 return -EIO;
 537
 538         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 539         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 540         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 541                  adapter->ahw->fw_hal_version);
 542
 543         ahw->physical_port = (u8) nic_info.phys_port;
 544         ahw->switch_mode = nic_info.switch_mode;
 545         ahw->max_mtu = nic_info.max_mtu;
 546         ahw->op_mode = nic_info.op_mode;
 547         ahw->capabilities = nic_info.capabilities;
 548         return 0;
 549 }
 550
 551 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 552                                  int pci_using_dac)
 553 {
 554         int err;
 555
 556         INIT_LIST_HEAD(&adapter->vf_mc_list);
 557         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 558                 dev_warn(&adapter->pdev->dev,
 559                          "83xx adapter do not support MSI interrupts\n");
 560
 561         err = qlcnic_setup_intr(adapter, 1);
 562         if (err) {
 563                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 564                 goto err_out_disable_msi;
 565         }
 566
 567         err = qlcnic_83xx_setup_mbx_intr(adapter);
 568         if (err)
 569                 goto err_out_disable_msi;
 570
 571         err = qlcnic_sriov_init(adapter, 1);
 572         if (err)
 573                 goto err_out_disable_mbx_intr;
 574
 575         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 576         if (err)
 577                 goto err_out_cleanup_sriov;
 578
 579         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 580         if (err)
 581                 goto err_out_disable_bc_intr;
 582
 583         err = qlcnic_sriov_vf_init_driver(adapter);
 584         if (err)
 585                 goto err_out_send_channel_term;
 586
 587         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 588         if (err)
 589                 goto err_out_send_channel_term;
 590
 591         pci_set_drvdata(adapter->pdev, adapter);
 592         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 593                  adapter->netdev->name);
 594         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 595                              adapter->ahw->idc.delay);
 596         return 0;
 597
 598 err_out_send_channel_term:
 599         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 600
 601 err_out_disable_bc_intr:
 602         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 603
 604 err_out_cleanup_sriov:
 605         __qlcnic_sriov_cleanup(adapter);
 606
 607 err_out_disable_mbx_intr:
 608         qlcnic_83xx_free_mbx_intr(adapter);
 609
 610 err_out_disable_msi:
 611         qlcnic_teardown_intr(adapter);
 612         return err;
 613 }
 614
 615 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 616 {
 617         u32 state;
 618
 619         do {
 620                 msleep(20);
 621                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 622                         return -EIO;
 623                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 624         } while (state != QLC_83XX_IDC_DEV_READY);
 625
 626         return 0;
 627 }
 628
 629 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 630 {
 631         struct qlcnic_hardware_context *ahw = adapter->ahw;
 632         int err;
 633
 634         spin_lock_init(&ahw->mbx_lock);
 635         set_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
 636         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 637         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 638         ahw->reset_context = 0;
 639         adapter->fw_fail_cnt = 0;
 640         ahw->msix_supported = 1;
 641         adapter->need_fw_reset = 0;
 642         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 643
 644         err = qlcnic_sriov_check_dev_ready(adapter);
 645         if (err)
 646                 return err;
 647
 648         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 649         if (err)
 650                 return err;
 651
 652         if (qlcnic_read_mac_addr(adapter))
 653                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 654
 655         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 656         return 0;
 657 }
 658
 659 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 660 {
 661         struct qlcnic_hardware_context *ahw = adapter->ahw;
 662
 663         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 664         dev_info(&adapter->pdev->dev,
 665                  "HAL Version: %d Non Privileged SRIOV function\n",
 666                  ahw->fw_hal_version);
 667         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 668         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 669         return;
 670 }
 671
 672 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 673 {
 674         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 675         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 676         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 677 }
 678
 679 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 680 {
 681         u32 pay_size;
 682
 683         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 684
 685         if (pay_size)
 686                 pay_size = QLC_BC_PAYLOAD_SZ;
 687         else
 688                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 689
 690         return pay_size;
 691 }
 692
 693 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 694 {
 695         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 696         u8 i;
 697
 698         if (qlcnic_sriov_vf_check(adapter))
 699                 return 0;
 700
 701         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 702                 if (vf_info[i].pci_func == pci_func)
 703                         return i;
 704         }
 705
 706         return -EINVAL;
 707 }
 708
 709 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 710 {
 711         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 712         if (!*trans)
 713                 return -ENOMEM;
 714
 715         init_completion(&(*trans)->resp_cmpl);
 716         return 0;
 717 }
 718
 719 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 720                                             u32 size)
 721 {
 722         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 723         if (!*hdr)
 724                 return -ENOMEM;
 725
 726         return 0;
 727 }
 728
 729 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 730 {
 731         const struct qlcnic_mailbox_metadata *mbx_tbl;
 732         int i, size;
 733
 734         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 735         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 736
 737         for (i = 0; i < size; i++) {
 738                 if (type == mbx_tbl[i].cmd) {
 739                         mbx->op_type = QLC_BC_CMD;
 740                         mbx->req.num = mbx_tbl[i].in_args;
 741                         mbx->rsp.num = mbx_tbl[i].out_args;
 742                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 743                                                GFP_ATOMIC);
 744                         if (!mbx->req.arg)
 745                                 return -ENOMEM;
 746                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 747                                                GFP_ATOMIC);
 748                         if (!mbx->rsp.arg) {
 749                                 kfree(mbx->req.arg);
 750                                 mbx->req.arg = NULL;
 751                                 return -ENOMEM;
 752                         }
 753                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 754                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 755                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 756                                            (3 << 29));
 757                         return 0;
 758                 }
 759         }
 760         return -EINVAL;
 761 }
 762
 763 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 764                                        struct qlcnic_cmd_args *cmd,
 765                                        u16 seq, u8 msg_type)
 766 {
 767         struct qlcnic_bc_hdr *hdr;
 768         int i;
 769         u32 num_regs, bc_pay_sz;
 770         u16 remainder;
 771         u8 cmd_op, num_frags, t_num_frags;
 772
 773         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 774         if (msg_type == QLC_BC_COMMAND) {
 775                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 776                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 777                 num_regs = cmd->req.num;
 778                 trans->req_pay_size = (num_regs * 4);
 779                 num_regs = cmd->rsp.num;
 780                 trans->rsp_pay_size = (num_regs * 4);
 781                 cmd_op = cmd->req.arg[0] & 0xff;
 782                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 783                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 784                 if (remainder)
 785                         num_frags++;
 786                 t_num_frags = num_frags;
 787                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 788                         return -ENOMEM;
 789                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 790                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 791                 if (remainder)
 792                         num_frags++;
 793                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 794                         return -ENOMEM;
 795                 num_frags  = t_num_frags;
 796                 hdr = trans->req_hdr;
 797         }  else {
 798                 cmd->req.arg = (u32 *)trans->req_pay;
 799                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 800                 cmd_op = cmd->req.arg[0] & 0xff;
 801                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 802                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 803                 if (remainder)
 804                         num_frags++;
 805                 cmd->req.num = trans->req_pay_size / 4;
 806                 cmd->rsp.num = trans->rsp_pay_size / 4;
 807                 hdr = trans->rsp_hdr;
 808         }
 809
 810         trans->trans_id = seq;
 811         trans->cmd_id = cmd_op;
 812         for (i = 0; i < num_frags; i++) {
 813                 hdr[i].version = 2;
 814                 hdr[i].msg_type = msg_type;
 815                 hdr[i].op_type = cmd->op_type;
 816                 hdr[i].num_cmds = 1;
 817                 hdr[i].num_frags = num_frags;
 818                 hdr[i].frag_num = i + 1;
 819                 hdr[i].cmd_op = cmd_op;
 820                 hdr[i].seq_id = seq;
 821         }
 822         return 0;
 823 }
 824
 825 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 826 {
 827         if (!trans)
 828                 return;
 829         kfree(trans->req_hdr);
 830         kfree(trans->rsp_hdr);
 831         kfree(trans);
 832 }
 833
 834 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 835                                     struct qlcnic_bc_trans *trans, u8 type)
 836 {
 837         struct qlcnic_trans_list *t_list;
 838         unsigned long flags;
 839         int ret = 0;
 840
 841         if (type == QLC_BC_RESPONSE) {
 842                 t_list = &vf->rcv_act;
 843                 spin_lock_irqsave(&t_list->lock, flags);
 844                 t_list->count--;
 845                 list_del(&trans->list);
 846                 if (t_list->count > 0)
 847                         ret = 1;
 848                 spin_unlock_irqrestore(&t_list->lock, flags);
 849         }
 850         if (type == QLC_BC_COMMAND) {
 851                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 852                         msleep(100);
 853                 vf->send_cmd = NULL;
 854                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 855         }
 856         return ret;
 857 }
 858
 859 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 860                                          struct qlcnic_vf_info *vf,
 861                                          work_func_t func)
 862 {
 863         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 864             vf->adapter->need_fw_reset)
 865                 return;
 866
 867         INIT_WORK(&vf->trans_work, func);
 868         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 869 }
 870
 871 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 872 {
 873         struct completion *cmpl = &trans->resp_cmpl;
 874
 875         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 876                 trans->trans_state = QLC_END;
 877         else
 878                 trans->trans_state = QLC_ABORT;
 879
 880         return;
 881 }
 882
 883 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 884                                             u8 type)
 885 {
 886         if (type == QLC_BC_RESPONSE) {
 887                 trans->curr_rsp_frag++;
 888                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 889                         trans->trans_state = QLC_INIT;
 890                 else
 891                         trans->trans_state = QLC_END;
 892         } else {
 893                 trans->curr_req_frag++;
 894                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 895                         trans->trans_state = QLC_INIT;
 896                 else
 897                         trans->trans_state = QLC_WAIT_FOR_RESP;
 898         }
 899 }
 900
 901 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 902                                                u8 type)
 903 {
 904         struct qlcnic_vf_info *vf = trans->vf;
 905         struct completion *cmpl = &vf->ch_free_cmpl;
 906
 907         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 908                 trans->trans_state = QLC_ABORT;
 909                 return;
 910         }
 911
 912         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 913         qlcnic_sriov_handle_multi_frags(trans, type);
 914 }
 915
 916 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 917                                      u32 *hdr, u32 *pay, u32 size)
 918 {
 919         struct qlcnic_hardware_context *ahw = adapter->ahw;
 920         u32 fw_mbx;
 921         u8 i, max = 2, hdr_size, j;
 922
 923         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 924         max = (size / sizeof(u32)) + hdr_size;
 925
 926         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 927         for (i = 2, j = 0; j < hdr_size; i++, j++)
 928                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 929         for (; j < max; i++, j++)
 930                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 931 }
 932
 933 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 934 {
 935         int ret = -EBUSY;
 936         u32 timeout = 10000;
 937
 938         do {
 939                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 940                         ret = 0;
 941                         break;
 942                 }
 943                 mdelay(1);
 944         } while (--timeout);
 945
 946         return ret;
 947 }
 948
 949 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 950 {
 951         struct qlcnic_vf_info *vf = trans->vf;
 952         u32 pay_size, hdr_size;
 953         u32 *hdr, *pay;
 954         int ret;
 955         u8 pci_func = trans->func_id;
 956
 957         if (__qlcnic_sriov_issue_bc_post(vf))
 958                 return -EBUSY;
 959
 960         if (type == QLC_BC_COMMAND) {
 961                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 962                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 963                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 964                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 965                                                        trans->curr_req_frag);
 966                 pay_size = (pay_size / sizeof(u32));
 967         } else {
 968                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 969                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 970                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 971                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 972                                                        trans->curr_rsp_frag);
 973                 pay_size = (pay_size / sizeof(u32));
 974         }
 975
 976         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 977                                        pci_func, pay_size);
 978         return ret;
 979 }
 980
 981 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 982                                       struct qlcnic_vf_info *vf, u8 type)
 983 {
 984         bool flag = true;
 985         int err = -EIO;
 986
 987         while (flag) {
 988                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 989                     vf->adapter->need_fw_reset)
 990                         trans->trans_state = QLC_ABORT;
 991
 992                 switch (trans->trans_state) {
 993                 case QLC_INIT:
 994                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 995                         if (qlcnic_sriov_issue_bc_post(trans, type))
 996                                 trans->trans_state = QLC_ABORT;
 997                         break;
 998                 case QLC_WAIT_FOR_CHANNEL_FREE:
 999                         qlcnic_sriov_wait_for_channel_free(trans, type);
1000                         break;
1001                 case QLC_WAIT_FOR_RESP:
1002                         qlcnic_sriov_wait_for_resp(trans);
1003                         break;
1004                 case QLC_END:
1005                         err = 0;
1006                         flag = false;
1007                         break;
1008                 case QLC_ABORT:
1009                         err = -EIO;
1010                         flag = false;
1011                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
1012                         break;
1013                 default:
1014                         err = -EIO;
1015                         flag = false;
1016                 }
1017         }
1018         return err;
1019 }
1020
1021 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
1022                                     struct qlcnic_bc_trans *trans, int pci_func)
1023 {
1024         struct qlcnic_vf_info *vf;
1025         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
1026
1027         if (index < 0)
1028                 return -EIO;
1029
1030         vf = &adapter->ahw->sriov->vf_info[index];
1031         trans->vf = vf;
1032         trans->func_id = pci_func;
1033
1034         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
1035                 if (qlcnic_sriov_pf_check(adapter))
1036                         return -EIO;
1037                 if (qlcnic_sriov_vf_check(adapter) &&
1038                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
1039                         return -EIO;
1040         }
1041
1042         mutex_lock(&vf->send_cmd_lock);
1043         vf->send_cmd = trans;
1044         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1045         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1046         mutex_unlock(&vf->send_cmd_lock);
1047         return err;
1048 }
1049
1050 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1051                                           struct qlcnic_bc_trans *trans,
1052                                           struct qlcnic_cmd_args *cmd)
1053 {
1054 #ifdef CONFIG_QLCNIC_SRIOV
1055         if (qlcnic_sriov_pf_check(adapter)) {
1056                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1057                 return;
1058         }
1059 #endif
1060         cmd->rsp.arg[0] |= (0x9 << 25);
1061         return;
1062 }
1063
1064 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1065 {
1066         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1067                                                  trans_work);
1068         struct qlcnic_bc_trans *trans = NULL;
1069         struct qlcnic_adapter *adapter  = vf->adapter;
1070         struct qlcnic_cmd_args cmd;
1071         u8 req;
1072
1073         if (adapter->need_fw_reset)
1074                 return;
1075
1076         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1077                 return;
1078
1079         trans = list_first_entry(&vf->rcv_act.wait_list,
1080                                  struct qlcnic_bc_trans, list);
1081         adapter = vf->adapter;
1082
1083         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1084                                         QLC_BC_RESPONSE))
1085                 goto cleanup_trans;
1086
1087         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1088         trans->trans_state = QLC_INIT;
1089         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1090
1091 cleanup_trans:
1092         qlcnic_free_mbx_args(&cmd);
1093         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1094         qlcnic_sriov_cleanup_transaction(trans);
1095         if (req)
1096                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1097                                              qlcnic_sriov_process_bc_cmd);
1098 }
1099
1100 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1101                                         struct qlcnic_vf_info *vf)
1102 {
1103         struct qlcnic_bc_trans *trans;
1104         u32 pay_size;
1105
1106         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1107                 return;
1108
1109         trans = vf->send_cmd;
1110
1111         if (trans == NULL)
1112                 goto clear_send;
1113
1114         if (trans->trans_id != hdr->seq_id)
1115                 goto clear_send;
1116
1117         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1118                                                trans->curr_rsp_frag);
1119         qlcnic_sriov_pull_bc_msg(vf->adapter,
1120                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1121                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1122                                  pay_size);
1123         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1124                 goto clear_send;
1125
1126         complete(&trans->resp_cmpl);
1127
1128 clear_send:
1129         clear_bit(QLC_BC_VF_SEND, &vf->state);
1130 }
1131
1132 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1133                                 struct qlcnic_vf_info *vf,
1134                                 struct qlcnic_bc_trans *trans)
1135 {
1136         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1137
1138         t_list->count++;
1139         list_add_tail(&trans->list, &t_list->wait_list);
1140         if (t_list->count == 1)
1141                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1142                                              qlcnic_sriov_process_bc_cmd);
1143         return 0;
1144 }
1145
1146 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1147                                      struct qlcnic_vf_info *vf,
1148                                      struct qlcnic_bc_trans *trans)
1149 {
1150         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1151
1152         spin_lock(&t_list->lock);
1153
1154         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1155
1156         spin_unlock(&t_list->lock);
1157         return 0;
1158 }
1159
1160 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1161                                               struct qlcnic_vf_info *vf,
1162                                               struct qlcnic_bc_hdr *hdr)
1163 {
1164         struct qlcnic_bc_trans *trans = NULL;
1165         struct list_head *node;
1166         u32 pay_size, curr_frag;
1167         u8 found = 0, active = 0;
1168
1169         spin_lock(&vf->rcv_pend.lock);
1170         if (vf->rcv_pend.count > 0) {
1171                 list_for_each(node, &vf->rcv_pend.wait_list) {
1172                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1173                         if (trans->trans_id == hdr->seq_id) {
1174                                 found = 1;
1175                                 break;
1176                         }
1177                 }
1178         }
1179
1180         if (found) {
1181                 curr_frag = trans->curr_req_frag;
1182                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1183                                                        curr_frag);
1184                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1185                                          (u32 *)(trans->req_hdr + curr_frag),
1186                                          (u32 *)(trans->req_pay + curr_frag),
1187                                          pay_size);
1188                 trans->curr_req_frag++;
1189                 if (trans->curr_req_frag >= hdr->num_frags) {
1190                         vf->rcv_pend.count--;
1191                         list_del(&trans->list);
1192                         active = 1;
1193                 }
1194         }
1195         spin_unlock(&vf->rcv_pend.lock);
1196
1197         if (active)
1198                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1199                         qlcnic_sriov_cleanup_transaction(trans);
1200
1201         return;
1202 }
1203
1204 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1205                                        struct qlcnic_bc_hdr *hdr,
1206                                        struct qlcnic_vf_info *vf)
1207 {
1208         struct qlcnic_bc_trans *trans;
1209         struct qlcnic_adapter *adapter = vf->adapter;
1210         struct qlcnic_cmd_args cmd;
1211         u32 pay_size;
1212         int err;
1213         u8 cmd_op;
1214
1215         if (adapter->need_fw_reset)
1216                 return;
1217
1218         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1219             hdr->op_type != QLC_BC_CMD &&
1220             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1221                 return;
1222
1223         if (hdr->frag_num > 1) {
1224                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1225                 return;
1226         }
1227
1228         cmd_op = hdr->cmd_op;
1229         if (qlcnic_sriov_alloc_bc_trans(&trans))
1230                 return;
1231
1232         if (hdr->op_type == QLC_BC_CMD)
1233                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1234         else
1235                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1236
1237         if (err) {
1238                 qlcnic_sriov_cleanup_transaction(trans);
1239                 return;
1240         }
1241
1242         cmd.op_type = hdr->op_type;
1243         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1244                                         QLC_BC_COMMAND)) {
1245                 qlcnic_free_mbx_args(&cmd);
1246                 qlcnic_sriov_cleanup_transaction(trans);
1247                 return;
1248         }
1249
1250         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1251                                          trans->curr_req_frag);
1252         qlcnic_sriov_pull_bc_msg(vf->adapter,
1253                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1254                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1255                                  pay_size);
1256         trans->func_id = vf->pci_func;
1257         trans->vf = vf;
1258         trans->trans_id = hdr->seq_id;
1259         trans->curr_req_frag++;
1260
1261         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1262                 return;
1263
1264         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1265                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1266                         qlcnic_free_mbx_args(&cmd);
1267                         qlcnic_sriov_cleanup_transaction(trans);
1268                 }
1269         } else {
1270                 spin_lock(&vf->rcv_pend.lock);
1271                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1272                 vf->rcv_pend.count++;
1273                 spin_unlock(&vf->rcv_pend.lock);
1274         }
1275 }
1276
1277 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1278                                           struct qlcnic_vf_info *vf)
1279 {
1280         struct qlcnic_bc_hdr hdr;
1281         u32 *ptr = (u32 *)&hdr;
1282         u8 msg_type, i;
1283
1284         for (i = 2; i < 6; i++)
1285                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1286         msg_type = hdr.msg_type;
1287
1288         switch (msg_type) {
1289         case QLC_BC_COMMAND:
1290                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1291                 break;
1292         case QLC_BC_RESPONSE:
1293                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1294                 break;
1295         }
1296 }
1297
1298 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1299                                           struct qlcnic_vf_info *vf)
1300 {
1301         struct qlcnic_adapter *adapter = vf->adapter;
1302
1303         if (qlcnic_sriov_pf_check(adapter))
1304                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1305         else
1306                 dev_err(&adapter->pdev->dev,
1307                         "Invalid event to VF. VF should not get FLR event\n");
1308 }
1309
1310 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1311 {
1312         struct qlcnic_vf_info *vf;
1313         struct qlcnic_sriov *sriov;
1314         int index;
1315         u8 pci_func;
1316
1317         sriov = adapter->ahw->sriov;
1318         pci_func = qlcnic_sriov_target_func_id(event);
1319         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1320
1321         if (index < 0)
1322                 return;
1323
1324         vf = &sriov->vf_info[index];
1325         vf->pci_func = pci_func;
1326
1327         if (qlcnic_sriov_channel_free_check(event))
1328                 complete(&vf->ch_free_cmpl);
1329
1330         if (qlcnic_sriov_flr_check(event)) {
1331                 qlcnic_sriov_handle_flr_event(sriov, vf);
1332                 return;
1333         }
1334
1335         if (qlcnic_sriov_bc_msg_check(event))
1336                 qlcnic_sriov_handle_msg_event(sriov, vf);
1337 }
1338
1339 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1340 {
1341         struct qlcnic_cmd_args cmd;
1342         int err;
1343
1344         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1345                 return 0;
1346
1347         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1348                 return -ENOMEM;
1349
1350         if (enable)
1351                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1352
1353         err = qlcnic_83xx_mbx_op(adapter, &cmd);
1354
1355         if (err != QLCNIC_RCODE_SUCCESS) {
1356                 dev_err(&adapter->pdev->dev,
1357                         "Failed to %s bc events, err=%d\n",
1358                         (enable ? "enable" : "disable"), err);
1359         }
1360
1361         qlcnic_free_mbx_args(&cmd);
1362         return err;
1363 }
1364
1365 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1366                                      struct qlcnic_bc_trans *trans)
1367 {
1368         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1369         u32 state;
1370
1371         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1372         if (state == QLC_83XX_IDC_DEV_READY) {
1373                 msleep(20);
1374                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1375                 trans->trans_state = QLC_INIT;
1376                 if (++adapter->fw_fail_cnt > max)
1377                         return -EIO;
1378                 else
1379                         return 0;
1380         }
1381
1382         return -EIO;
1383 }
1384
1385 static int qlcnic_sriov_vf_mbx_op(struct qlcnic_adapter *adapter,
1386                                   struct qlcnic_cmd_args *cmd)
1387 {
1388         struct qlcnic_hardware_context *ahw = adapter->ahw;
1389         struct device *dev = &adapter->pdev->dev;
1390         struct qlcnic_bc_trans *trans;
1391         int err;
1392         u32 rsp_data, opcode, mbx_err_code, rsp;
1393         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1394         u8 func = ahw->pci_func;
1395
1396         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1397         if (rsp)
1398                 return rsp;
1399
1400         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1401         if (rsp)
1402                 goto cleanup_transaction;
1403
1404 retry:
1405         if (!test_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status)) {
1406                 rsp = -EIO;
1407                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1408                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1409                 goto err_out;
1410         }
1411
1412         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1413         if (err) {
1414                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1415                         (cmd->req.arg[0] & 0xffff), func);
1416                 rsp = QLCNIC_RCODE_TIMEOUT;
1417
1418                 /* After adapter reset PF driver may take some time to
1419                  * respond to VF's request. Retry request till maximum retries.
1420                  */
1421                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1422                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1423                         goto retry;
1424
1425                 goto err_out;
1426         }
1427
1428         rsp_data = cmd->rsp.arg[0];
1429         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1430         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1431
1432         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1433             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1434                 rsp = QLCNIC_RCODE_SUCCESS;
1435         } else {
1436                 rsp = mbx_err_code;
1437                 if (!rsp)
1438                         rsp = 1;
1439                 dev_err(dev,
1440                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1441                         opcode, mbx_err_code, func);
1442         }
1443
1444 err_out:
1445         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1446                 ahw->reset_context = 1;
1447                 adapter->need_fw_reset = 1;
1448                 clear_bit(QLC_83XX_MBX_READY, &ahw->idc.status);
1449         }
1450
1451 cleanup_transaction:
1452         qlcnic_sriov_cleanup_transaction(trans);
1453         return rsp;
1454 }
1455
1456 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1457 {
1458         struct qlcnic_cmd_args cmd;
1459         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1460         int ret;
1461
1462         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1463                 return -ENOMEM;
1464
1465         ret = qlcnic_issue_cmd(adapter, &cmd);
1466         if (ret) {
1467                 dev_err(&adapter->pdev->dev,
1468                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1469                         ret);
1470                 goto out;
1471         }
1472
1473         cmd_op = (cmd.rsp.arg[0] & 0xff);
1474         if (cmd.rsp.arg[0] >> 25 == 2)
1475                 return 2;
1476         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1477                 set_bit(QLC_BC_VF_STATE, &vf->state);
1478         else
1479                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1480
1481 out:
1482         qlcnic_free_mbx_args(&cmd);
1483         return ret;
1484 }
1485
1486 void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
1487 {
1488         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1489         struct qlcnic_mac_list_s *cur;
1490         struct list_head *head, tmp_list;
1491
1492         INIT_LIST_HEAD(&tmp_list);
1493         head = &adapter->vf_mc_list;
1494         netif_addr_lock_bh(netdev);
1495
1496         while (!list_empty(head)) {
1497                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1498                 list_move(&cur->list, &tmp_list);
1499         }
1500
1501         netif_addr_unlock_bh(netdev);
1502
1503         while (!list_empty(&tmp_list)) {
1504                 cur = list_entry((&tmp_list)->next,
1505                                  struct qlcnic_mac_list_s, list);
1506                 qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
1507                 list_del(&cur->list);
1508                 kfree(cur);
1509         }
1510 }
1511
1512 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1513 {
1514         struct list_head *head = &bc->async_list;
1515         struct qlcnic_async_work_list *entry;
1516
1517         while (!list_empty(head)) {
1518                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1519                                    list);
1520                 cancel_work_sync(&entry->work);
1521                 list_del(&entry->list);
1522                 kfree(entry);
1523         }
1524 }
1525
1526 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1527 {
1528         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1529         u16 vlan;
1530
1531         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1532                 return;
1533
1534         vlan = adapter->ahw->sriov->vlan;
1535         __qlcnic_set_multi(netdev, vlan);
1536 }
1537
1538 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1539 {
1540         struct qlcnic_async_work_list *entry;
1541         struct net_device *netdev;
1542
1543         entry = container_of(work, struct qlcnic_async_work_list, work);
1544         netdev = (struct net_device *)entry->ptr;
1545
1546         qlcnic_sriov_vf_set_multi(netdev);
1547         return;
1548 }
1549
1550 static struct qlcnic_async_work_list *
1551 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1552 {
1553         struct list_head *node;
1554         struct qlcnic_async_work_list *entry = NULL;
1555         u8 empty = 0;
1556
1557         list_for_each(node, &bc->async_list) {
1558                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1559                 if (!work_pending(&entry->work)) {
1560                         empty = 1;
1561                         break;
1562                 }
1563         }
1564
1565         if (!empty) {
1566                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1567                                 GFP_ATOMIC);
1568                 if (entry == NULL)
1569                         return NULL;
1570                 list_add_tail(&entry->list, &bc->async_list);
1571         }
1572
1573         return entry;
1574 }
1575
1576 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1577                                                 work_func_t func, void *data)
1578 {
1579         struct qlcnic_async_work_list *entry = NULL;
1580
1581         entry = qlcnic_sriov_get_free_node_async_work(bc);
1582         if (!entry)
1583                 return;
1584
1585         entry->ptr = data;
1586         INIT_WORK(&entry->work, func);
1587         queue_work(bc->bc_async_wq, &entry->work);
1588 }
1589
1590 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1591 {
1592
1593         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1594         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1595
1596         if (adapter->need_fw_reset)
1597                 return;
1598
1599         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1600                                             netdev);
1601 }
1602
1603 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1604 {
1605         int err;
1606
1607         set_bit(QLC_83XX_MBX_READY, &adapter->ahw->idc.status);
1608         qlcnic_83xx_enable_mbx_intrpt(adapter);
1609
1610         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1611         if (err)
1612                 return err;
1613
1614         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1615         if (err)
1616                 goto err_out_cleanup_bc_intr;
1617
1618         err = qlcnic_sriov_vf_init_driver(adapter);
1619         if (err)
1620                 goto err_out_term_channel;
1621
1622         return 0;
1623
1624 err_out_term_channel:
1625         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1626
1627 err_out_cleanup_bc_intr:
1628         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1629         return err;
1630 }
1631
1632 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1633 {
1634         struct net_device *netdev = adapter->netdev;
1635
1636         if (netif_running(netdev)) {
1637                 if (!qlcnic_up(adapter, netdev))
1638                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1639         }
1640
1641         netif_device_attach(netdev);
1642 }
1643
1644 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1645 {
1646         struct qlcnic_hardware_context *ahw = adapter->ahw;
1647         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1648         struct net_device *netdev = adapter->netdev;
1649         u8 i, max_ints = ahw->num_msix - 1;
1650
1651         qlcnic_83xx_disable_mbx_intr(adapter);
1652         netif_device_detach(netdev);
1653         if (netif_running(netdev))
1654                 qlcnic_down(adapter, netdev);
1655
1656         for (i = 0; i < max_ints; i++) {
1657                 intr_tbl[i].id = i;
1658                 intr_tbl[i].enabled = 0;
1659                 intr_tbl[i].src = 0;
1660         }
1661         ahw->reset_context = 0;
1662 }
1663
1664 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1665 {
1666         struct qlcnic_hardware_context *ahw = adapter->ahw;
1667         struct device *dev = &adapter->pdev->dev;
1668         struct qlc_83xx_idc *idc = &ahw->idc;
1669         u8 func = ahw->pci_func;
1670         u32 state;
1671
1672         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1673             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1674                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1675                         qlcnic_sriov_vf_attach(adapter);
1676                         adapter->fw_fail_cnt = 0;
1677                         dev_info(dev,
1678                                  "%s: Reinitalization of VF 0x%x done after FW reset\n",
1679                                  __func__, func);
1680                 } else {
1681                         dev_err(dev,
1682                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1683                                 __func__, func);
1684                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1685                         dev_info(dev, "Current state 0x%x after FW reset\n",
1686                                  state);
1687                 }
1688         }
1689
1690         return 0;
1691 }
1692
1693 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1694 {
1695         struct qlcnic_hardware_context *ahw = adapter->ahw;
1696         struct device *dev = &adapter->pdev->dev;
1697         struct qlc_83xx_idc *idc = &ahw->idc;
1698         u8 func = ahw->pci_func;
1699         u32 state;
1700
1701         adapter->reset_ctx_cnt++;
1702
1703         /* Skip the context reset and check if FW is hung */
1704         if (adapter->reset_ctx_cnt < 3) {
1705                 adapter->need_fw_reset = 1;
1706                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1707                 dev_info(dev,
1708                          "Resetting context, wait here to check if FW is in failed state\n");
1709                 return 0;
1710         }
1711
1712         /* Check if number of resets exceed the threshold.
1713          * If it exceeds the threshold just fail the VF.
1714          */
1715         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1716                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1717                 adapter->tx_timeo_cnt = 0;
1718                 adapter->fw_fail_cnt = 0;
1719                 adapter->reset_ctx_cnt = 0;
1720                 qlcnic_sriov_vf_detach(adapter);
1721                 dev_err(dev,
1722                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1723                 return -EIO;
1724         }
1725
1726         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1727         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1728                  __func__, adapter->reset_ctx_cnt, func);
1729         set_bit(__QLCNIC_RESETTING, &adapter->state);
1730         adapter->need_fw_reset = 1;
1731         clear_bit(QLC_83XX_MBX_READY, &idc->status);
1732         qlcnic_sriov_vf_detach(adapter);
1733         adapter->need_fw_reset = 0;
1734
1735         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1736                 qlcnic_sriov_vf_attach(adapter);
1737                 adapter->tx_timeo_cnt = 0;
1738                 adapter->reset_ctx_cnt = 0;
1739                 adapter->fw_fail_cnt = 0;
1740                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1741         } else {
1742                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1743                         __func__, func);
1744                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1745                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1746         }
1747
1748         return 0;
1749 }
1750
1751 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1752 {
1753         struct qlcnic_hardware_context *ahw = adapter->ahw;
1754         int ret = 0;
1755
1756         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1757                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1758         else if (ahw->reset_context)
1759                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1760
1761         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1762         return ret;
1763 }
1764
1765 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1766 {
1767         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1768
1769         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1770         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1771                 qlcnic_sriov_vf_detach(adapter);
1772
1773         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1774         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1775         return -EIO;
1776 }
1777
1778 static int
1779 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1780 {
1781         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1782
1783         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1784         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1785                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1786                 adapter->tx_timeo_cnt = 0;
1787                 adapter->reset_ctx_cnt = 0;
1788                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1789                 qlcnic_sriov_vf_detach(adapter);
1790         }
1791
1792         return 0;
1793 }
1794
1795 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1796 {
1797         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1798         u8 func = adapter->ahw->pci_func;
1799
1800         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1801                 dev_err(&adapter->pdev->dev,
1802                         "Firmware hang detected by VF 0x%x\n", func);
1803                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1804                 adapter->tx_timeo_cnt = 0;
1805                 adapter->reset_ctx_cnt = 0;
1806                 clear_bit(QLC_83XX_MBX_READY, &idc->status);
1807                 qlcnic_sriov_vf_detach(adapter);
1808         }
1809         return 0;
1810 }
1811
1812 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1813 {
1814         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1815         return 0;
1816 }
1817
1818 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1819 {
1820         struct qlcnic_adapter *adapter;
1821         struct qlc_83xx_idc *idc;
1822         int ret = 0;
1823
1824         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1825         idc = &adapter->ahw->idc;
1826         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1827
1828         switch (idc->curr_state) {
1829         case QLC_83XX_IDC_DEV_READY:
1830                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1831                 break;
1832         case QLC_83XX_IDC_DEV_NEED_RESET:
1833         case QLC_83XX_IDC_DEV_INIT:
1834                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1835                 break;
1836         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1837                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1838                 break;
1839         case QLC_83XX_IDC_DEV_FAILED:
1840                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1841                 break;
1842         case QLC_83XX_IDC_DEV_QUISCENT:
1843                 break;
1844         default:
1845                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1846         }
1847
1848         idc->prev_state = idc->curr_state;
1849         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1850                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1851                                      idc->delay);
1852 }
1853
1854 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1855 {
1856         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1857                 msleep(20);
1858
1859         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1860         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1861         cancel_delayed_work_sync(&adapter->fw_work);
1862 }
1863
1864 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
1865                                           u16 vid, u8 enable)
1866 {
1867         u16 vlan = sriov->vlan;
1868         u8 allowed = 0;
1869         int i;
1870
1871         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1872                 return -EINVAL;
1873
1874         if (enable) {
1875                 if (vlan)
1876                         return -EINVAL;
1877
1878                 if (sriov->any_vlan) {
1879                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1880                                 if (sriov->allowed_vlans[i] == vid)
1881                                         allowed = 1;
1882                         }
1883
1884                         if (!allowed)
1885                                 return -EINVAL;
1886                 }
1887         } else {
1888                 if (!vlan || vlan != vid)
1889                         return -EINVAL;
1890         }
1891
1892         return 0;
1893 }
1894
1895 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
1896                                    u16 vid, u8 enable)
1897 {
1898         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1899         struct qlcnic_cmd_args cmd;
1900         int ret;
1901
1902         if (vid == 0)
1903                 return 0;
1904
1905         ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
1906         if (ret)
1907                 return ret;
1908
1909         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
1910                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
1911         if (ret)
1912                 return ret;
1913
1914         cmd.req.arg[1] = (enable & 1) | vid << 16;
1915
1916         qlcnic_sriov_cleanup_async_list(&sriov->bc);
1917         ret = qlcnic_issue_cmd(adapter, &cmd);
1918         if (ret) {
1919                 dev_err(&adapter->pdev->dev,
1920                         "Failed to configure guest VLAN, err=%d\n", ret);
1921         } else {
1922                 qlcnic_free_mac_list(adapter);
1923
1924                 if (enable)
1925                         sriov->vlan = vid;
1926                 else
1927                         sriov->vlan = 0;
1928
1929                 qlcnic_sriov_vf_set_multi(adapter->netdev);
1930         }
1931
1932         qlcnic_free_mbx_args(&cmd);
1933         return ret;
1934 }
1935
1936 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
1937 {
1938         struct list_head *head = &adapter->mac_list;
1939         struct qlcnic_mac_list_s *cur;
1940         u16 vlan;
1941
1942         vlan = adapter->ahw->sriov->vlan;
1943
1944         while (!list_empty(head)) {
1945                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1946                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
1947                                           vlan, QLCNIC_MAC_DEL);
1948                 list_del(&cur->list);
1949                 kfree(cur);
1950         }
1951 }