Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux...
[cascardo/linux.git] / drivers / net / ethernet / sfc / rx.c
1 /****************************************************************************
2  * Driver for Solarflare network controllers and boards
3  * Copyright 2005-2006 Fen Systems Ltd.
4  * Copyright 2005-2013 Solarflare Communications Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License version 2 as published
8  * by the Free Software Foundation, incorporated herein by reference.
9  */
10
11 #include <linux/socket.h>
12 #include <linux/in.h>
13 #include <linux/slab.h>
14 #include <linux/ip.h>
15 #include <linux/ipv6.h>
16 #include <linux/tcp.h>
17 #include <linux/udp.h>
18 #include <linux/prefetch.h>
19 #include <linux/moduleparam.h>
20 #include <linux/iommu.h>
21 #include <net/ip.h>
22 #include <net/checksum.h>
23 #include "net_driver.h"
24 #include "efx.h"
25 #include "filter.h"
26 #include "nic.h"
27 #include "selftest.h"
28 #include "workarounds.h"
29
30 /* Preferred number of descriptors to fill at once */
31 #define EFX_RX_PREFERRED_BATCH 8U
32
33 /* Number of RX buffers to recycle pages for.  When creating the RX page recycle
34  * ring, this number is divided by the number of buffers per page to calculate
35  * the number of pages to store in the RX page recycle ring.
36  */
37 #define EFX_RECYCLE_RING_SIZE_IOMMU 4096
38 #define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
39
40 /* Size of buffer allocated for skb header area. */
41 #define EFX_SKB_HEADERS  128u
42
43 /* This is the percentage fill level below which new RX descriptors
44  * will be added to the RX descriptor ring.
45  */
46 static unsigned int rx_refill_threshold;
47
48 /* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
49 #define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
50                                       EFX_RX_USR_BUF_SIZE)
51
52 /*
53  * RX maximum head room required.
54  *
55  * This must be at least 1 to prevent overflow, plus one packet-worth
56  * to allow pipelined receives.
57  */
58 #define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
59
60 static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
61 {
62         return page_address(buf->page) + buf->page_offset;
63 }
64
65 static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
66 {
67 #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
68         return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
69 #else
70         const u8 *data = eh + efx->rx_packet_hash_offset;
71         return (u32)data[0]       |
72                (u32)data[1] << 8  |
73                (u32)data[2] << 16 |
74                (u32)data[3] << 24;
75 #endif
76 }
77
78 static inline struct efx_rx_buffer *
79 efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
80 {
81         if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
82                 return efx_rx_buffer(rx_queue, 0);
83         else
84                 return rx_buf + 1;
85 }
86
87 static inline void efx_sync_rx_buffer(struct efx_nic *efx,
88                                       struct efx_rx_buffer *rx_buf,
89                                       unsigned int len)
90 {
91         dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
92                                 DMA_FROM_DEVICE);
93 }
94
95 void efx_rx_config_page_split(struct efx_nic *efx)
96 {
97         efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
98                                       EFX_RX_BUF_ALIGNMENT);
99         efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
100                 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
101                  efx->rx_page_buf_step);
102         efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
103                 efx->rx_bufs_per_page;
104         efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
105                                                efx->rx_bufs_per_page);
106 }
107
108 /* Check the RX page recycle ring for a page that can be reused. */
109 static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
110 {
111         struct efx_nic *efx = rx_queue->efx;
112         struct page *page;
113         struct efx_rx_page_state *state;
114         unsigned index;
115
116         index = rx_queue->page_remove & rx_queue->page_ptr_mask;
117         page = rx_queue->page_ring[index];
118         if (page == NULL)
119                 return NULL;
120
121         rx_queue->page_ring[index] = NULL;
122         /* page_remove cannot exceed page_add. */
123         if (rx_queue->page_remove != rx_queue->page_add)
124                 ++rx_queue->page_remove;
125
126         /* If page_count is 1 then we hold the only reference to this page. */
127         if (page_count(page) == 1) {
128                 ++rx_queue->page_recycle_count;
129                 return page;
130         } else {
131                 state = page_address(page);
132                 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
133                                PAGE_SIZE << efx->rx_buffer_order,
134                                DMA_FROM_DEVICE);
135                 put_page(page);
136                 ++rx_queue->page_recycle_failed;
137         }
138
139         return NULL;
140 }
141
142 /**
143  * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
144  *
145  * @rx_queue:           Efx RX queue
146  *
147  * This allocates a batch of pages, maps them for DMA, and populates
148  * struct efx_rx_buffers for each one. Return a negative error code or
149  * 0 on success. If a single page can be used for multiple buffers,
150  * then the page will either be inserted fully, or not at all.
151  */
152 static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
153 {
154         struct efx_nic *efx = rx_queue->efx;
155         struct efx_rx_buffer *rx_buf;
156         struct page *page;
157         unsigned int page_offset;
158         struct efx_rx_page_state *state;
159         dma_addr_t dma_addr;
160         unsigned index, count;
161
162         count = 0;
163         do {
164                 page = efx_reuse_page(rx_queue);
165                 if (page == NULL) {
166                         page = alloc_pages(__GFP_COLD | __GFP_COMP |
167                                            (atomic ? GFP_ATOMIC : GFP_KERNEL),
168                                            efx->rx_buffer_order);
169                         if (unlikely(page == NULL))
170                                 return -ENOMEM;
171                         dma_addr =
172                                 dma_map_page(&efx->pci_dev->dev, page, 0,
173                                              PAGE_SIZE << efx->rx_buffer_order,
174                                              DMA_FROM_DEVICE);
175                         if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
176                                                        dma_addr))) {
177                                 __free_pages(page, efx->rx_buffer_order);
178                                 return -EIO;
179                         }
180                         state = page_address(page);
181                         state->dma_addr = dma_addr;
182                 } else {
183                         state = page_address(page);
184                         dma_addr = state->dma_addr;
185                 }
186
187                 dma_addr += sizeof(struct efx_rx_page_state);
188                 page_offset = sizeof(struct efx_rx_page_state);
189
190                 do {
191                         index = rx_queue->added_count & rx_queue->ptr_mask;
192                         rx_buf = efx_rx_buffer(rx_queue, index);
193                         rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
194                         rx_buf->page = page;
195                         rx_buf->page_offset = page_offset + efx->rx_ip_align;
196                         rx_buf->len = efx->rx_dma_len;
197                         rx_buf->flags = 0;
198                         ++rx_queue->added_count;
199                         get_page(page);
200                         dma_addr += efx->rx_page_buf_step;
201                         page_offset += efx->rx_page_buf_step;
202                 } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
203
204                 rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
205         } while (++count < efx->rx_pages_per_batch);
206
207         return 0;
208 }
209
210 /* Unmap a DMA-mapped page.  This function is only called for the final RX
211  * buffer in a page.
212  */
213 static void efx_unmap_rx_buffer(struct efx_nic *efx,
214                                 struct efx_rx_buffer *rx_buf)
215 {
216         struct page *page = rx_buf->page;
217
218         if (page) {
219                 struct efx_rx_page_state *state = page_address(page);
220                 dma_unmap_page(&efx->pci_dev->dev,
221                                state->dma_addr,
222                                PAGE_SIZE << efx->rx_buffer_order,
223                                DMA_FROM_DEVICE);
224         }
225 }
226
227 static void efx_free_rx_buffers(struct efx_rx_queue *rx_queue,
228                                 struct efx_rx_buffer *rx_buf,
229                                 unsigned int num_bufs)
230 {
231         do {
232                 if (rx_buf->page) {
233                         put_page(rx_buf->page);
234                         rx_buf->page = NULL;
235                 }
236                 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
237         } while (--num_bufs);
238 }
239
240 /* Attempt to recycle the page if there is an RX recycle ring; the page can
241  * only be added if this is the final RX buffer, to prevent pages being used in
242  * the descriptor ring and appearing in the recycle ring simultaneously.
243  */
244 static void efx_recycle_rx_page(struct efx_channel *channel,
245                                 struct efx_rx_buffer *rx_buf)
246 {
247         struct page *page = rx_buf->page;
248         struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
249         struct efx_nic *efx = rx_queue->efx;
250         unsigned index;
251
252         /* Only recycle the page after processing the final buffer. */
253         if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
254                 return;
255
256         index = rx_queue->page_add & rx_queue->page_ptr_mask;
257         if (rx_queue->page_ring[index] == NULL) {
258                 unsigned read_index = rx_queue->page_remove &
259                         rx_queue->page_ptr_mask;
260
261                 /* The next slot in the recycle ring is available, but
262                  * increment page_remove if the read pointer currently
263                  * points here.
264                  */
265                 if (read_index == index)
266                         ++rx_queue->page_remove;
267                 rx_queue->page_ring[index] = page;
268                 ++rx_queue->page_add;
269                 return;
270         }
271         ++rx_queue->page_recycle_full;
272         efx_unmap_rx_buffer(efx, rx_buf);
273         put_page(rx_buf->page);
274 }
275
276 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
277                                struct efx_rx_buffer *rx_buf)
278 {
279         /* Release the page reference we hold for the buffer. */
280         if (rx_buf->page)
281                 put_page(rx_buf->page);
282
283         /* If this is the last buffer in a page, unmap and free it. */
284         if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
285                 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
286                 efx_free_rx_buffers(rx_queue, rx_buf, 1);
287         }
288         rx_buf->page = NULL;
289 }
290
291 /* Recycle the pages that are used by buffers that have just been received. */
292 static void efx_recycle_rx_pages(struct efx_channel *channel,
293                                  struct efx_rx_buffer *rx_buf,
294                                  unsigned int n_frags)
295 {
296         struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
297
298         do {
299                 efx_recycle_rx_page(channel, rx_buf);
300                 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
301         } while (--n_frags);
302 }
303
304 static void efx_discard_rx_packet(struct efx_channel *channel,
305                                   struct efx_rx_buffer *rx_buf,
306                                   unsigned int n_frags)
307 {
308         struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
309
310         efx_recycle_rx_pages(channel, rx_buf, n_frags);
311
312         efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
313 }
314
315 /**
316  * efx_fast_push_rx_descriptors - push new RX descriptors quickly
317  * @rx_queue:           RX descriptor queue
318  *
319  * This will aim to fill the RX descriptor queue up to
320  * @rx_queue->@max_fill. If there is insufficient atomic
321  * memory to do so, a slow fill will be scheduled.
322  *
323  * The caller must provide serialisation (none is used here). In practise,
324  * this means this function must run from the NAPI handler, or be called
325  * when NAPI is disabled.
326  */
327 void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
328 {
329         struct efx_nic *efx = rx_queue->efx;
330         unsigned int fill_level, batch_size;
331         int space, rc = 0;
332
333         if (!rx_queue->refill_enabled)
334                 return;
335
336         /* Calculate current fill level, and exit if we don't need to fill */
337         fill_level = (rx_queue->added_count - rx_queue->removed_count);
338         EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
339         if (fill_level >= rx_queue->fast_fill_trigger)
340                 goto out;
341
342         /* Record minimum fill level */
343         if (unlikely(fill_level < rx_queue->min_fill)) {
344                 if (fill_level)
345                         rx_queue->min_fill = fill_level;
346         }
347
348         batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
349         space = rx_queue->max_fill - fill_level;
350         EFX_BUG_ON_PARANOID(space < batch_size);
351
352         netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
353                    "RX queue %d fast-filling descriptor ring from"
354                    " level %d to level %d\n",
355                    efx_rx_queue_index(rx_queue), fill_level,
356                    rx_queue->max_fill);
357
358
359         do {
360                 rc = efx_init_rx_buffers(rx_queue, atomic);
361                 if (unlikely(rc)) {
362                         /* Ensure that we don't leave the rx queue empty */
363                         if (rx_queue->added_count == rx_queue->removed_count)
364                                 efx_schedule_slow_fill(rx_queue);
365                         goto out;
366                 }
367         } while ((space -= batch_size) >= batch_size);
368
369         netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
370                    "RX queue %d fast-filled descriptor ring "
371                    "to level %d\n", efx_rx_queue_index(rx_queue),
372                    rx_queue->added_count - rx_queue->removed_count);
373
374  out:
375         if (rx_queue->notified_count != rx_queue->added_count)
376                 efx_nic_notify_rx_desc(rx_queue);
377 }
378
379 void efx_rx_slow_fill(unsigned long context)
380 {
381         struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
382
383         /* Post an event to cause NAPI to run and refill the queue */
384         efx_nic_generate_fill_event(rx_queue);
385         ++rx_queue->slow_fill_count;
386 }
387
388 static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
389                                      struct efx_rx_buffer *rx_buf,
390                                      int len)
391 {
392         struct efx_nic *efx = rx_queue->efx;
393         unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
394
395         if (likely(len <= max_len))
396                 return;
397
398         /* The packet must be discarded, but this is only a fatal error
399          * if the caller indicated it was
400          */
401         rx_buf->flags |= EFX_RX_PKT_DISCARD;
402
403         if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
404                 if (net_ratelimit())
405                         netif_err(efx, rx_err, efx->net_dev,
406                                   " RX queue %d seriously overlength "
407                                   "RX event (0x%x > 0x%x+0x%x). Leaking\n",
408                                   efx_rx_queue_index(rx_queue), len, max_len,
409                                   efx->type->rx_buffer_padding);
410                 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
411         } else {
412                 if (net_ratelimit())
413                         netif_err(efx, rx_err, efx->net_dev,
414                                   " RX queue %d overlength RX event "
415                                   "(0x%x > 0x%x)\n",
416                                   efx_rx_queue_index(rx_queue), len, max_len);
417         }
418
419         efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
420 }
421
422 /* Pass a received packet up through GRO.  GRO can handle pages
423  * regardless of checksum state and skbs with a good checksum.
424  */
425 static void
426 efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
427                   unsigned int n_frags, u8 *eh)
428 {
429         struct napi_struct *napi = &channel->napi_str;
430         gro_result_t gro_result;
431         struct efx_nic *efx = channel->efx;
432         struct sk_buff *skb;
433
434         skb = napi_get_frags(napi);
435         if (unlikely(!skb)) {
436                 struct efx_rx_queue *rx_queue;
437
438                 rx_queue = efx_channel_get_rx_queue(channel);
439                 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
440                 return;
441         }
442
443         if (efx->net_dev->features & NETIF_F_RXHASH)
444                 skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
445                              PKT_HASH_TYPE_L3);
446         skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
447                           CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
448
449         for (;;) {
450                 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
451                                    rx_buf->page, rx_buf->page_offset,
452                                    rx_buf->len);
453                 rx_buf->page = NULL;
454                 skb->len += rx_buf->len;
455                 if (skb_shinfo(skb)->nr_frags == n_frags)
456                         break;
457
458                 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
459         }
460
461         skb->data_len = skb->len;
462         skb->truesize += n_frags * efx->rx_buffer_truesize;
463
464         skb_record_rx_queue(skb, channel->rx_queue.core_index);
465
466         gro_result = napi_gro_frags(napi);
467         if (gro_result != GRO_DROP)
468                 channel->irq_mod_score += 2;
469 }
470
471 /* Allocate and construct an SKB around page fragments */
472 static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
473                                      struct efx_rx_buffer *rx_buf,
474                                      unsigned int n_frags,
475                                      u8 *eh, int hdr_len)
476 {
477         struct efx_nic *efx = channel->efx;
478         struct sk_buff *skb;
479
480         /* Allocate an SKB to store the headers */
481         skb = netdev_alloc_skb(efx->net_dev,
482                                efx->rx_ip_align + efx->rx_prefix_size +
483                                hdr_len);
484         if (unlikely(skb == NULL)) {
485                 atomic_inc(&efx->n_rx_noskb_drops);
486                 return NULL;
487         }
488
489         EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len);
490
491         memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
492                efx->rx_prefix_size + hdr_len);
493         skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
494         __skb_put(skb, hdr_len);
495
496         /* Append the remaining page(s) onto the frag list */
497         if (rx_buf->len > hdr_len) {
498                 rx_buf->page_offset += hdr_len;
499                 rx_buf->len -= hdr_len;
500
501                 for (;;) {
502                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
503                                            rx_buf->page, rx_buf->page_offset,
504                                            rx_buf->len);
505                         rx_buf->page = NULL;
506                         skb->len += rx_buf->len;
507                         skb->data_len += rx_buf->len;
508                         if (skb_shinfo(skb)->nr_frags == n_frags)
509                                 break;
510
511                         rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
512                 }
513         } else {
514                 __free_pages(rx_buf->page, efx->rx_buffer_order);
515                 rx_buf->page = NULL;
516                 n_frags = 0;
517         }
518
519         skb->truesize += n_frags * efx->rx_buffer_truesize;
520
521         /* Move past the ethernet header */
522         skb->protocol = eth_type_trans(skb, efx->net_dev);
523
524         skb_mark_napi_id(skb, &channel->napi_str);
525
526         return skb;
527 }
528
529 void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
530                    unsigned int n_frags, unsigned int len, u16 flags)
531 {
532         struct efx_nic *efx = rx_queue->efx;
533         struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
534         struct efx_rx_buffer *rx_buf;
535
536         rx_queue->rx_packets++;
537
538         rx_buf = efx_rx_buffer(rx_queue, index);
539         rx_buf->flags |= flags;
540
541         /* Validate the number of fragments and completed length */
542         if (n_frags == 1) {
543                 if (!(flags & EFX_RX_PKT_PREFIX_LEN))
544                         efx_rx_packet__check_len(rx_queue, rx_buf, len);
545         } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
546                    unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
547                    unlikely(len > n_frags * efx->rx_dma_len) ||
548                    unlikely(!efx->rx_scatter)) {
549                 /* If this isn't an explicit discard request, either
550                  * the hardware or the driver is broken.
551                  */
552                 WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
553                 rx_buf->flags |= EFX_RX_PKT_DISCARD;
554         }
555
556         netif_vdbg(efx, rx_status, efx->net_dev,
557                    "RX queue %d received ids %x-%x len %d %s%s\n",
558                    efx_rx_queue_index(rx_queue), index,
559                    (index + n_frags - 1) & rx_queue->ptr_mask, len,
560                    (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
561                    (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
562
563         /* Discard packet, if instructed to do so.  Process the
564          * previous receive first.
565          */
566         if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
567                 efx_rx_flush_packet(channel);
568                 efx_discard_rx_packet(channel, rx_buf, n_frags);
569                 return;
570         }
571
572         if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
573                 rx_buf->len = len;
574
575         /* Release and/or sync the DMA mapping - assumes all RX buffers
576          * consumed in-order per RX queue.
577          */
578         efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
579
580         /* Prefetch nice and early so data will (hopefully) be in cache by
581          * the time we look at it.
582          */
583         prefetch(efx_rx_buf_va(rx_buf));
584
585         rx_buf->page_offset += efx->rx_prefix_size;
586         rx_buf->len -= efx->rx_prefix_size;
587
588         if (n_frags > 1) {
589                 /* Release/sync DMA mapping for additional fragments.
590                  * Fix length for last fragment.
591                  */
592                 unsigned int tail_frags = n_frags - 1;
593
594                 for (;;) {
595                         rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
596                         if (--tail_frags == 0)
597                                 break;
598                         efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
599                 }
600                 rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
601                 efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
602         }
603
604         /* All fragments have been DMA-synced, so recycle pages. */
605         rx_buf = efx_rx_buffer(rx_queue, index);
606         efx_recycle_rx_pages(channel, rx_buf, n_frags);
607
608         /* Pipeline receives so that we give time for packet headers to be
609          * prefetched into cache.
610          */
611         efx_rx_flush_packet(channel);
612         channel->rx_pkt_n_frags = n_frags;
613         channel->rx_pkt_index = index;
614 }
615
616 static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
617                            struct efx_rx_buffer *rx_buf,
618                            unsigned int n_frags)
619 {
620         struct sk_buff *skb;
621         u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
622
623         skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
624         if (unlikely(skb == NULL)) {
625                 struct efx_rx_queue *rx_queue;
626
627                 rx_queue = efx_channel_get_rx_queue(channel);
628                 efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
629                 return;
630         }
631         skb_record_rx_queue(skb, channel->rx_queue.core_index);
632
633         /* Set the SKB flags */
634         skb_checksum_none_assert(skb);
635         if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED))
636                 skb->ip_summed = CHECKSUM_UNNECESSARY;
637
638         efx_rx_skb_attach_timestamp(channel, skb);
639
640         if (channel->type->receive_skb)
641                 if (channel->type->receive_skb(channel, skb))
642                         return;
643
644         /* Pass the packet up */
645         netif_receive_skb(skb);
646 }
647
648 /* Handle a received packet.  Second half: Touches packet payload. */
649 void __efx_rx_packet(struct efx_channel *channel)
650 {
651         struct efx_nic *efx = channel->efx;
652         struct efx_rx_buffer *rx_buf =
653                 efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
654         u8 *eh = efx_rx_buf_va(rx_buf);
655
656         /* Read length from the prefix if necessary.  This already
657          * excludes the length of the prefix itself.
658          */
659         if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
660                 rx_buf->len = le16_to_cpup((__le16 *)
661                                            (eh + efx->rx_packet_len_offset));
662
663         /* If we're in loopback test, then pass the packet directly to the
664          * loopback layer, and free the rx_buf here
665          */
666         if (unlikely(efx->loopback_selftest)) {
667                 struct efx_rx_queue *rx_queue;
668
669                 efx_loopback_rx_packet(efx, eh, rx_buf->len);
670                 rx_queue = efx_channel_get_rx_queue(channel);
671                 efx_free_rx_buffers(rx_queue, rx_buf,
672                                     channel->rx_pkt_n_frags);
673                 goto out;
674         }
675
676         if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
677                 rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
678
679         if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb &&
680             !efx_channel_busy_polling(channel))
681                 efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
682         else
683                 efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
684 out:
685         channel->rx_pkt_n_frags = 0;
686 }
687
688 int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
689 {
690         struct efx_nic *efx = rx_queue->efx;
691         unsigned int entries;
692         int rc;
693
694         /* Create the smallest power-of-two aligned ring */
695         entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
696         EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
697         rx_queue->ptr_mask = entries - 1;
698
699         netif_dbg(efx, probe, efx->net_dev,
700                   "creating RX queue %d size %#x mask %#x\n",
701                   efx_rx_queue_index(rx_queue), efx->rxq_entries,
702                   rx_queue->ptr_mask);
703
704         /* Allocate RX buffers */
705         rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
706                                    GFP_KERNEL);
707         if (!rx_queue->buffer)
708                 return -ENOMEM;
709
710         rc = efx_nic_probe_rx(rx_queue);
711         if (rc) {
712                 kfree(rx_queue->buffer);
713                 rx_queue->buffer = NULL;
714         }
715
716         return rc;
717 }
718
719 static void efx_init_rx_recycle_ring(struct efx_nic *efx,
720                                      struct efx_rx_queue *rx_queue)
721 {
722         unsigned int bufs_in_recycle_ring, page_ring_size;
723
724         /* Set the RX recycle ring size */
725 #ifdef CONFIG_PPC64
726         bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
727 #else
728         if (iommu_present(&pci_bus_type))
729                 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
730         else
731                 bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
732 #endif /* CONFIG_PPC64 */
733
734         page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
735                                             efx->rx_bufs_per_page);
736         rx_queue->page_ring = kcalloc(page_ring_size,
737                                       sizeof(*rx_queue->page_ring), GFP_KERNEL);
738         rx_queue->page_ptr_mask = page_ring_size - 1;
739 }
740
741 void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
742 {
743         struct efx_nic *efx = rx_queue->efx;
744         unsigned int max_fill, trigger, max_trigger;
745
746         netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
747                   "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
748
749         /* Initialise ptr fields */
750         rx_queue->added_count = 0;
751         rx_queue->notified_count = 0;
752         rx_queue->removed_count = 0;
753         rx_queue->min_fill = -1U;
754         efx_init_rx_recycle_ring(efx, rx_queue);
755
756         rx_queue->page_remove = 0;
757         rx_queue->page_add = rx_queue->page_ptr_mask + 1;
758         rx_queue->page_recycle_count = 0;
759         rx_queue->page_recycle_failed = 0;
760         rx_queue->page_recycle_full = 0;
761
762         /* Initialise limit fields */
763         max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
764         max_trigger =
765                 max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
766         if (rx_refill_threshold != 0) {
767                 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
768                 if (trigger > max_trigger)
769                         trigger = max_trigger;
770         } else {
771                 trigger = max_trigger;
772         }
773
774         rx_queue->max_fill = max_fill;
775         rx_queue->fast_fill_trigger = trigger;
776         rx_queue->refill_enabled = true;
777
778         /* Set up RX descriptor ring */
779         efx_nic_init_rx(rx_queue);
780 }
781
782 void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
783 {
784         int i;
785         struct efx_nic *efx = rx_queue->efx;
786         struct efx_rx_buffer *rx_buf;
787
788         netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
789                   "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
790
791         del_timer_sync(&rx_queue->slow_fill);
792
793         /* Release RX buffers from the current read ptr to the write ptr */
794         if (rx_queue->buffer) {
795                 for (i = rx_queue->removed_count; i < rx_queue->added_count;
796                      i++) {
797                         unsigned index = i & rx_queue->ptr_mask;
798                         rx_buf = efx_rx_buffer(rx_queue, index);
799                         efx_fini_rx_buffer(rx_queue, rx_buf);
800                 }
801         }
802
803         /* Unmap and release the pages in the recycle ring. Remove the ring. */
804         for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
805                 struct page *page = rx_queue->page_ring[i];
806                 struct efx_rx_page_state *state;
807
808                 if (page == NULL)
809                         continue;
810
811                 state = page_address(page);
812                 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
813                                PAGE_SIZE << efx->rx_buffer_order,
814                                DMA_FROM_DEVICE);
815                 put_page(page);
816         }
817         kfree(rx_queue->page_ring);
818         rx_queue->page_ring = NULL;
819 }
820
821 void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
822 {
823         netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
824                   "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
825
826         efx_nic_remove_rx(rx_queue);
827
828         kfree(rx_queue->buffer);
829         rx_queue->buffer = NULL;
830 }
831
832
833 module_param(rx_refill_threshold, uint, 0444);
834 MODULE_PARM_DESC(rx_refill_threshold,
835                  "RX descriptor ring refill threshold (%)");
836
837 #ifdef CONFIG_RFS_ACCEL
838
839 int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
840                    u16 rxq_index, u32 flow_id)
841 {
842         struct efx_nic *efx = netdev_priv(net_dev);
843         struct efx_channel *channel;
844         struct efx_filter_spec spec;
845         struct flow_keys fk;
846         int rc;
847
848         if (flow_id == RPS_FLOW_ID_INVALID)
849                 return -EINVAL;
850
851         if (!skb_flow_dissect_flow_keys(skb, &fk, 0))
852                 return -EPROTONOSUPPORT;
853
854         if (fk.basic.n_proto != htons(ETH_P_IP) && fk.basic.n_proto != htons(ETH_P_IPV6))
855                 return -EPROTONOSUPPORT;
856         if (fk.control.flags & FLOW_DIS_IS_FRAGMENT)
857                 return -EPROTONOSUPPORT;
858
859         efx_filter_init_rx(&spec, EFX_FILTER_PRI_HINT,
860                            efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
861                            rxq_index);
862         spec.match_flags =
863                 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
864                 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
865                 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
866         spec.ether_type = fk.basic.n_proto;
867         spec.ip_proto = fk.basic.ip_proto;
868
869         if (fk.basic.n_proto == htons(ETH_P_IP)) {
870                 spec.rem_host[0] = fk.addrs.v4addrs.src;
871                 spec.loc_host[0] = fk.addrs.v4addrs.dst;
872         } else {
873                 memcpy(spec.rem_host, &fk.addrs.v6addrs.src, sizeof(struct in6_addr));
874                 memcpy(spec.loc_host, &fk.addrs.v6addrs.dst, sizeof(struct in6_addr));
875         }
876
877         spec.rem_port = fk.ports.src;
878         spec.loc_port = fk.ports.dst;
879
880         rc = efx->type->filter_rfs_insert(efx, &spec);
881         if (rc < 0)
882                 return rc;
883
884         /* Remember this so we can check whether to expire the filter later */
885         channel = efx_get_channel(efx, rxq_index);
886         channel->rps_flow_id[rc] = flow_id;
887         ++channel->rfs_filters_added;
888
889         if (spec.ether_type == htons(ETH_P_IP))
890                 netif_info(efx, rx_status, efx->net_dev,
891                            "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
892                            (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
893                            spec.rem_host, ntohs(spec.rem_port), spec.loc_host,
894                            ntohs(spec.loc_port), rxq_index, flow_id, rc);
895         else
896                 netif_info(efx, rx_status, efx->net_dev,
897                            "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
898                            (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
899                            spec.rem_host, ntohs(spec.rem_port), spec.loc_host,
900                            ntohs(spec.loc_port), rxq_index, flow_id, rc);
901
902         return rc;
903 }
904
905 bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
906 {
907         bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
908         unsigned int channel_idx, index, size;
909         u32 flow_id;
910
911         if (!spin_trylock_bh(&efx->filter_lock))
912                 return false;
913
914         expire_one = efx->type->filter_rfs_expire_one;
915         channel_idx = efx->rps_expire_channel;
916         index = efx->rps_expire_index;
917         size = efx->type->max_rx_ip_filters;
918         while (quota--) {
919                 struct efx_channel *channel = efx_get_channel(efx, channel_idx);
920                 flow_id = channel->rps_flow_id[index];
921
922                 if (flow_id != RPS_FLOW_ID_INVALID &&
923                     expire_one(efx, flow_id, index)) {
924                         netif_info(efx, rx_status, efx->net_dev,
925                                    "expired filter %d [queue %u flow %u]\n",
926                                    index, channel_idx, flow_id);
927                         channel->rps_flow_id[index] = RPS_FLOW_ID_INVALID;
928                 }
929                 if (++index == size) {
930                         if (++channel_idx == efx->n_channels)
931                                 channel_idx = 0;
932                         index = 0;
933                 }
934         }
935         efx->rps_expire_channel = channel_idx;
936         efx->rps_expire_index = index;
937
938         spin_unlock_bh(&efx->filter_lock);
939         return true;
940 }
941
942 #endif /* CONFIG_RFS_ACCEL */
943
944 /**
945  * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
946  * @spec: Specification to test
947  *
948  * Return: %true if the specification is a non-drop RX filter that
949  * matches a local MAC address I/G bit value of 1 or matches a local
950  * IPv4 or IPv6 address value in the respective multicast address
951  * range.  Otherwise %false.
952  */
953 bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
954 {
955         if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
956             spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
957                 return false;
958
959         if (spec->match_flags &
960             (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
961             is_multicast_ether_addr(spec->loc_mac))
962                 return true;
963
964         if ((spec->match_flags &
965              (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
966             (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
967                 if (spec->ether_type == htons(ETH_P_IP) &&
968                     ipv4_is_multicast(spec->loc_host[0]))
969                         return true;
970                 if (spec->ether_type == htons(ETH_P_IPV6) &&
971                     ((const u8 *)spec->loc_host)[0] == 0xff)
972                         return true;
973         }
974
975         return false;
976 }