drivers/net/irda/ali-ircc.c

   1 /*********************************************************************
   2  *
   3  * Filename:      ali-ircc.h
   4  * Version:       0.5
   5  * Description:   Driver for the ALI M1535D and M1543C FIR Controller
   6  * Status:        Experimental.
   7  * Author:        Benjamin Kong <benjamin_kong@ali.com.tw>
   8  * Created at:    2000/10/16 03:46PM
   9  * Modified at:   2001/1/3 02:55PM
  10  * Modified by:   Benjamin Kong <benjamin_kong@ali.com.tw>
  11  * Modified at:   2003/11/6 and support for ALi south-bridge chipsets M1563
  12  * Modified by:   Clear Zhang <clear_zhang@ali.com.tw>
  13  *
  14  *     Copyright (c) 2000 Benjamin Kong <benjamin_kong@ali.com.tw>
  15  *     All Rights Reserved
  16  *
  17  *     This program is free software; you can redistribute it and/or
  18  *     modify it under the terms of the GNU General Public License as
  19  *     published by the Free Software Foundation; either version 2 of
  20  *     the License, or (at your option) any later version.
  21  *
  22  ********************************************************************/
  23
  24 #include <linux/module.h>
  25 #include <linux/gfp.h>
  26
  27 #include <linux/kernel.h>
  28 #include <linux/types.h>
  29 #include <linux/skbuff.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/ioport.h>
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/rtnetlink.h>
  36 #include <linux/serial_reg.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/platform_device.h>
  39
  40 #include <asm/io.h>
  41 #include <asm/dma.h>
  42 #include <asm/byteorder.h>
  43
  44 #include <net/irda/wrapper.h>
  45 #include <net/irda/irda.h>
  46 #include <net/irda/irda_device.h>
  47
  48 #include "ali-ircc.h"
  49
  50 #define CHIP_IO_EXTENT 8
  51 #define BROKEN_DONGLE_ID
  52
  53 #define ALI_IRCC_DRIVER_NAME "ali-ircc"
  54
  55 /* Power Management */
  56 static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state);
  57 static int ali_ircc_resume(struct platform_device *dev);
  58
  59 static struct platform_driver ali_ircc_driver = {
  60         .suspend        = ali_ircc_suspend,
  61         .resume         = ali_ircc_resume,
  62         .driver         = {
  63                 .name   = ALI_IRCC_DRIVER_NAME,
  64                 .owner  = THIS_MODULE,
  65         },
  66 };
  67
  68 /* Module parameters */
  69 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
  70
  71 /* Use BIOS settions by default, but user may supply module parameters */
  72 static unsigned int io[]  = { ~0, ~0, ~0, ~0 };
  73 static unsigned int irq[] = { 0, 0, 0, 0 };
  74 static unsigned int dma[] = { 0, 0, 0, 0 };
  75
  76 static int  ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info);
  77 static int  ali_ircc_init_43(ali_chip_t *chip, chipio_t *info);
  78 static int  ali_ircc_init_53(ali_chip_t *chip, chipio_t *info);
  79
  80 /* These are the currently known ALi south-bridge chipsets, the only one difference
  81  * is that M1543C doesn't support HP HDSL-3600
  82  */
  83 static ali_chip_t chips[] =
  84 {
  85         { "M1543", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x43, ali_ircc_probe_53, ali_ircc_init_43 },
  86         { "M1535", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x53, ali_ircc_probe_53, ali_ircc_init_53 },
  87         { "M1563", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x63, ali_ircc_probe_53, ali_ircc_init_53 },
  88         { NULL }
  89 };
  90
  91 /* Max 4 instances for now */
  92 static struct ali_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
  93
  94 /* Dongle Types */
  95 static char *dongle_types[] = {
  96         "TFDS6000",
  97         "HP HSDL-3600",
  98         "HP HSDL-1100",
  99         "No dongle connected",
 100 };
 101
 102 /* Some prototypes */
 103 static int  ali_ircc_open(int i, chipio_t *info);
 104
 105 static int  ali_ircc_close(struct ali_ircc_cb *self);
 106
 107 static int  ali_ircc_setup(chipio_t *info);
 108 static int  ali_ircc_is_receiving(struct ali_ircc_cb *self);
 109 static int  ali_ircc_net_open(struct net_device *dev);
 110 static int  ali_ircc_net_close(struct net_device *dev);
 111 static int  ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
 112 static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud);
 113
 114 /* SIR function */
 115 static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb,
 116                                                 struct net_device *dev);
 117 static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self);
 118 static void ali_ircc_sir_receive(struct ali_ircc_cb *self);
 119 static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self);
 120 static int  ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
 121 static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed);
 122
 123 /* FIR function */
 124 static netdev_tx_t  ali_ircc_fir_hard_xmit(struct sk_buff *skb,
 125                                                  struct net_device *dev);
 126 static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 speed);
 127 static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self);
 128 static int  ali_ircc_dma_receive(struct ali_ircc_cb *self);
 129 static int  ali_ircc_dma_receive_complete(struct ali_ircc_cb *self);
 130 static int  ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self);
 131 static void ali_ircc_dma_xmit(struct ali_ircc_cb *self);
 132
 133 /* My Function */
 134 static int  ali_ircc_read_dongle_id (int i, chipio_t *info);
 135 static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed);
 136
 137 /* ALi chip function */
 138 static void SIR2FIR(int iobase);
 139 static void FIR2SIR(int iobase);
 140 static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable);
 141
 142 /*
 143  * Function ali_ircc_init ()
 144  *
 145  *    Initialize chip. Find out whay kinds of chips we are dealing with
 146  *    and their configuration registers address
 147  */
 148 static int __init ali_ircc_init(void)
 149 {
 150         ali_chip_t *chip;
 151         chipio_t info;
 152         int ret;
 153         int cfg, cfg_base;
 154         int reg, revision;
 155         int i = 0;
 156
 157         ret = platform_driver_register(&ali_ircc_driver);
 158         if (ret) {
 159                 net_err_ratelimited("%s, Can't register driver!\n",
 160                                     ALI_IRCC_DRIVER_NAME);
 161                 return ret;
 162         }
 163
 164         ret = -ENODEV;
 165
 166         /* Probe for all the ALi chipsets we know about */
 167         for (chip= chips; chip->name; chip++, i++)
 168         {
 169                 pr_debug("%s(), Probing for %s ...\n", __func__, chip->name);
 170
 171                 /* Try all config registers for this chip */
 172                 for (cfg=0; cfg<2; cfg++)
 173                 {
 174                         cfg_base = chip->cfg[cfg];
 175                         if (!cfg_base)
 176                                 continue;
 177
 178                         memset(&info, 0, sizeof(chipio_t));
 179                         info.cfg_base = cfg_base;
 180                         info.fir_base = io[i];
 181                         info.dma = dma[i];
 182                         info.irq = irq[i];
 183
 184
 185                         /* Enter Configuration */
 186                         outb(chip->entr1, cfg_base);
 187                         outb(chip->entr2, cfg_base);
 188
 189                         /* Select Logical Device 5 Registers (UART2) */
 190                         outb(0x07, cfg_base);
 191                         outb(0x05, cfg_base+1);
 192
 193                         /* Read Chip Identification Register */
 194                         outb(chip->cid_index, cfg_base);
 195                         reg = inb(cfg_base+1);
 196
 197                         if (reg == chip->cid_value)
 198                         {
 199                                 pr_debug("%s(), Chip found at 0x%03x\n",
 200                                          __func__, cfg_base);
 201
 202                                 outb(0x1F, cfg_base);
 203                                 revision = inb(cfg_base+1);
 204                                 pr_debug("%s(), Found %s chip, revision=%d\n",
 205                                          __func__, chip->name, revision);
 206
 207                                 /*
 208                                  * If the user supplies the base address, then
 209                                  * we init the chip, if not we probe the values
 210                                  * set by the BIOS
 211                                  */
 212                                 if (io[i] < 2000)
 213                                 {
 214                                         chip->init(chip, &info);
 215                                 }
 216                                 else
 217                                 {
 218                                         chip->probe(chip, &info);
 219                                 }
 220
 221                                 if (ali_ircc_open(i, &info) == 0)
 222                                         ret = 0;
 223                                 i++;
 224                         }
 225                         else
 226                         {
 227                                 pr_debug("%s(), No %s chip at 0x%03x\n",
 228                                          __func__, chip->name, cfg_base);
 229                         }
 230                         /* Exit configuration */
 231                         outb(0xbb, cfg_base);
 232                 }
 233         }
 234
 235         if (ret)
 236                 platform_driver_unregister(&ali_ircc_driver);
 237
 238         return ret;
 239 }
 240
 241 /*
 242  * Function ali_ircc_cleanup ()
 243  *
 244  *    Close all configured chips
 245  *
 246  */
 247 static void __exit ali_ircc_cleanup(void)
 248 {
 249         int i;
 250
 251         for (i=0; i < ARRAY_SIZE(dev_self); i++) {
 252                 if (dev_self[i])
 253                         ali_ircc_close(dev_self[i]);
 254         }
 255
 256         platform_driver_unregister(&ali_ircc_driver);
 257
 258 }
 259
 260 static const struct net_device_ops ali_ircc_sir_ops = {
 261         .ndo_open       = ali_ircc_net_open,
 262         .ndo_stop       = ali_ircc_net_close,
 263         .ndo_start_xmit = ali_ircc_sir_hard_xmit,
 264         .ndo_do_ioctl   = ali_ircc_net_ioctl,
 265 };
 266
 267 static const struct net_device_ops ali_ircc_fir_ops = {
 268         .ndo_open       = ali_ircc_net_open,
 269         .ndo_stop       = ali_ircc_net_close,
 270         .ndo_start_xmit = ali_ircc_fir_hard_xmit,
 271         .ndo_do_ioctl   = ali_ircc_net_ioctl,
 272 };
 273
 274 /*
 275  * Function ali_ircc_open (int i, chipio_t *inf)
 276  *
 277  *    Open driver instance
 278  *
 279  */
 280 static int ali_ircc_open(int i, chipio_t *info)
 281 {
 282         struct net_device *dev;
 283         struct ali_ircc_cb *self;
 284         int dongle_id;
 285         int err;
 286
 287         if (i >= ARRAY_SIZE(dev_self)) {
 288                 net_err_ratelimited("%s(), maximum number of supported chips reached!\n",
 289                                     __func__);
 290                 return -ENOMEM;
 291         }
 292
 293         /* Set FIR FIFO and DMA Threshold */
 294         if ((ali_ircc_setup(info)) == -1)
 295                 return -1;
 296
 297         dev = alloc_irdadev(sizeof(*self));
 298         if (dev == NULL) {
 299                 net_err_ratelimited("%s(), can't allocate memory for control block!\n",
 300                                     __func__);
 301                 return -ENOMEM;
 302         }
 303
 304         self = netdev_priv(dev);
 305         self->netdev = dev;
 306         spin_lock_init(&self->lock);
 307
 308         /* Need to store self somewhere */
 309         dev_self[i] = self;
 310         self->index = i;
 311
 312         /* Initialize IO */
 313         self->io.cfg_base  = info->cfg_base;    /* In ali_ircc_probe_53 assign          */
 314         self->io.fir_base  = info->fir_base;    /* info->sir_base = info->fir_base      */
 315         self->io.sir_base  = info->sir_base;    /* ALi SIR and FIR use the same address */
 316         self->io.irq       = info->irq;
 317         self->io.fir_ext   = CHIP_IO_EXTENT;
 318         self->io.dma       = info->dma;
 319         self->io.fifo_size = 16;                /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */
 320
 321         /* Reserve the ioports that we need */
 322         if (!request_region(self->io.fir_base, self->io.fir_ext,
 323                             ALI_IRCC_DRIVER_NAME)) {
 324                 net_warn_ratelimited("%s(), can't get iobase of 0x%03x\n",
 325                                      __func__, self->io.fir_base);
 326                 err = -ENODEV;
 327                 goto err_out1;
 328         }
 329
 330         /* Initialize QoS for this device */
 331         irda_init_max_qos_capabilies(&self->qos);
 332
 333         /* The only value we must override it the baudrate */
 334         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
 335                 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); // benjamin 2000/11/8 05:27PM
 336
 337         self->qos.min_turn_time.bits = qos_mtt_bits;
 338
 339         irda_qos_bits_to_value(&self->qos);
 340
 341         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 342         self->rx_buff.truesize = 14384;
 343         self->tx_buff.truesize = 14384;
 344
 345         /* Allocate memory if needed */
 346         self->rx_buff.head =
 347                 dma_zalloc_coherent(NULL, self->rx_buff.truesize,
 348                                     &self->rx_buff_dma, GFP_KERNEL);
 349         if (self->rx_buff.head == NULL) {
 350                 err = -ENOMEM;
 351                 goto err_out2;
 352         }
 353
 354         self->tx_buff.head =
 355                 dma_zalloc_coherent(NULL, self->tx_buff.truesize,
 356                                     &self->tx_buff_dma, GFP_KERNEL);
 357         if (self->tx_buff.head == NULL) {
 358                 err = -ENOMEM;
 359                 goto err_out3;
 360         }
 361
 362         self->rx_buff.in_frame = FALSE;
 363         self->rx_buff.state = OUTSIDE_FRAME;
 364         self->tx_buff.data = self->tx_buff.head;
 365         self->rx_buff.data = self->rx_buff.head;
 366
 367         /* Reset Tx queue info */
 368         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 369         self->tx_fifo.tail = self->tx_buff.head;
 370
 371         /* Override the network functions we need to use */
 372         dev->netdev_ops = &ali_ircc_sir_ops;
 373
 374         err = register_netdev(dev);
 375         if (err) {
 376                 net_err_ratelimited("%s(), register_netdev() failed!\n",
 377                                     __func__);
 378                 goto err_out4;
 379         }
 380         net_info_ratelimited("IrDA: Registered device %s\n", dev->name);
 381
 382         /* Check dongle id */
 383         dongle_id = ali_ircc_read_dongle_id(i, info);
 384         net_info_ratelimited("%s(), %s, Found dongle: %s\n",
 385                              __func__, ALI_IRCC_DRIVER_NAME,
 386                              dongle_types[dongle_id]);
 387
 388         self->io.dongle_id = dongle_id;
 389
 390
 391         return 0;
 392
 393  err_out4:
 394         dma_free_coherent(NULL, self->tx_buff.truesize,
 395                           self->tx_buff.head, self->tx_buff_dma);
 396  err_out3:
 397         dma_free_coherent(NULL, self->rx_buff.truesize,
 398                           self->rx_buff.head, self->rx_buff_dma);
 399  err_out2:
 400         release_region(self->io.fir_base, self->io.fir_ext);
 401  err_out1:
 402         dev_self[i] = NULL;
 403         free_netdev(dev);
 404         return err;
 405 }
 406
 407
 408 /*
 409  * Function ali_ircc_close (self)
 410  *
 411  *    Close driver instance
 412  *
 413  */
 414 static int __exit ali_ircc_close(struct ali_ircc_cb *self)
 415 {
 416         int iobase;
 417
 418         IRDA_ASSERT(self != NULL, return -1;);
 419
 420         iobase = self->io.fir_base;
 421
 422         /* Remove netdevice */
 423         unregister_netdev(self->netdev);
 424
 425         /* Release the PORT that this driver is using */
 426         pr_debug("%s(), Releasing Region %03x\n", __func__, self->io.fir_base);
 427         release_region(self->io.fir_base, self->io.fir_ext);
 428
 429         if (self->tx_buff.head)
 430                 dma_free_coherent(NULL, self->tx_buff.truesize,
 431                                   self->tx_buff.head, self->tx_buff_dma);
 432
 433         if (self->rx_buff.head)
 434                 dma_free_coherent(NULL, self->rx_buff.truesize,
 435                                   self->rx_buff.head, self->rx_buff_dma);
 436
 437         dev_self[self->index] = NULL;
 438         free_netdev(self->netdev);
 439
 440
 441         return 0;
 442 }
 443
 444 /*
 445  * Function ali_ircc_init_43 (chip, info)
 446  *
 447  *    Initialize the ALi M1543 chip.
 448  */
 449 static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info)
 450 {
 451         /* All controller information like I/O address, DMA channel, IRQ
 452          * are set by BIOS
 453          */
 454
 455         return 0;
 456 }
 457
 458 /*
 459  * Function ali_ircc_init_53 (chip, info)
 460  *
 461  *    Initialize the ALi M1535 chip.
 462  */
 463 static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info)
 464 {
 465         /* All controller information like I/O address, DMA channel, IRQ
 466          * are set by BIOS
 467          */
 468
 469         return 0;
 470 }
 471
 472 /*
 473  * Function ali_ircc_probe_53 (chip, info)
 474  *
 475  *      Probes for the ALi M1535D or M1535
 476  */
 477 static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info)
 478 {
 479         int cfg_base = info->cfg_base;
 480         int hi, low, reg;
 481
 482
 483         /* Enter Configuration */
 484         outb(chip->entr1, cfg_base);
 485         outb(chip->entr2, cfg_base);
 486
 487         /* Select Logical Device 5 Registers (UART2) */
 488         outb(0x07, cfg_base);
 489         outb(0x05, cfg_base+1);
 490
 491         /* Read address control register */
 492         outb(0x60, cfg_base);
 493         hi = inb(cfg_base+1);
 494         outb(0x61, cfg_base);
 495         low = inb(cfg_base+1);
 496         info->fir_base = (hi<<8) + low;
 497
 498         info->sir_base = info->fir_base;
 499
 500         pr_debug("%s(), probing fir_base=0x%03x\n", __func__, info->fir_base);
 501
 502         /* Read IRQ control register */
 503         outb(0x70, cfg_base);
 504         reg = inb(cfg_base+1);
 505         info->irq = reg & 0x0f;
 506         pr_debug("%s(), probing irq=%d\n", __func__, info->irq);
 507
 508         /* Read DMA channel */
 509         outb(0x74, cfg_base);
 510         reg = inb(cfg_base+1);
 511         info->dma = reg & 0x07;
 512
 513         if(info->dma == 0x04)
 514                 net_warn_ratelimited("%s(), No DMA channel assigned !\n",
 515                                      __func__);
 516         else
 517                 pr_debug("%s(), probing dma=%d\n", __func__, info->dma);
 518
 519         /* Read Enabled Status */
 520         outb(0x30, cfg_base);
 521         reg = inb(cfg_base+1);
 522         info->enabled = (reg & 0x80) && (reg & 0x01);
 523         pr_debug("%s(), probing enabled=%d\n", __func__, info->enabled);
 524
 525         /* Read Power Status */
 526         outb(0x22, cfg_base);
 527         reg = inb(cfg_base+1);
 528         info->suspended = (reg & 0x20);
 529         pr_debug("%s(), probing suspended=%d\n", __func__, info->suspended);
 530
 531         /* Exit configuration */
 532         outb(0xbb, cfg_base);
 533
 534
 535         return 0;
 536 }
 537
 538 /*
 539  * Function ali_ircc_setup (info)
 540  *
 541  *      Set FIR FIFO and DMA Threshold
 542  *      Returns non-negative on success.
 543  *
 544  */
 545 static int ali_ircc_setup(chipio_t *info)
 546 {
 547         unsigned char tmp;
 548         int version;
 549         int iobase = info->fir_base;
 550
 551
 552         /* Locking comments :
 553          * Most operations here need to be protected. We are called before
 554          * the device instance is created in ali_ircc_open(), therefore
 555          * nobody can bother us - Jean II */
 556
 557         /* Switch to FIR space */
 558         SIR2FIR(iobase);
 559
 560         /* Master Reset */
 561         outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM
 562
 563         /* Read FIR ID Version Register */
 564         switch_bank(iobase, BANK3);
 565         version = inb(iobase+FIR_ID_VR);
 566
 567         /* Should be 0x00 in the M1535/M1535D */
 568         if(version != 0x00)
 569         {
 570                 net_err_ratelimited("%s, Wrong chip version %02x\n",
 571                                     ALI_IRCC_DRIVER_NAME, version);
 572                 return -1;
 573         }
 574
 575         /* Set FIR FIFO Threshold Register */
 576         switch_bank(iobase, BANK1);
 577         outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);
 578
 579         /* Set FIR DMA Threshold Register */
 580         outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);
 581
 582         /* CRC enable */
 583         switch_bank(iobase, BANK2);
 584         outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR);
 585
 586         /* NDIS driver set TX Length here BANK2 Alias 3, Alias4*/
 587
 588         /* Switch to Bank 0 */
 589         switch_bank(iobase, BANK0);
 590
 591         tmp = inb(iobase+FIR_LCR_B);
 592         tmp &=~0x20; // disable SIP
 593         tmp |= 0x80; // these two steps make RX mode
 594         tmp &= 0xbf;
 595         outb(tmp, iobase+FIR_LCR_B);
 596
 597         /* Disable Interrupt */
 598         outb(0x00, iobase+FIR_IER);
 599
 600
 601         /* Switch to SIR space */
 602         FIR2SIR(iobase);
 603
 604         net_info_ratelimited("%s, driver loaded (Benjamin Kong)\n",
 605                              ALI_IRCC_DRIVER_NAME);
 606
 607         /* Enable receive interrupts */
 608         // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM
 609         // Turn on the interrupts in ali_ircc_net_open
 610
 611
 612         return 0;
 613 }
 614
 615 /*
 616  * Function ali_ircc_read_dongle_id (int index, info)
 617  *
 618  * Try to read dongle identification. This procedure needs to be executed
 619  * once after power-on/reset. It also needs to be used whenever you suspect
 620  * that the user may have plugged/unplugged the IrDA Dongle.
 621  */
 622 static int ali_ircc_read_dongle_id (int i, chipio_t *info)
 623 {
 624         int dongle_id, reg;
 625         int cfg_base = info->cfg_base;
 626
 627
 628         /* Enter Configuration */
 629         outb(chips[i].entr1, cfg_base);
 630         outb(chips[i].entr2, cfg_base);
 631
 632         /* Select Logical Device 5 Registers (UART2) */
 633         outb(0x07, cfg_base);
 634         outb(0x05, cfg_base+1);
 635
 636         /* Read Dongle ID */
 637         outb(0xf0, cfg_base);
 638         reg = inb(cfg_base+1);
 639         dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01);
 640         pr_debug("%s(), probing dongle_id=%d, dongle_types=%s\n",
 641                  __func__, dongle_id, dongle_types[dongle_id]);
 642
 643         /* Exit configuration */
 644         outb(0xbb, cfg_base);
 645
 646
 647         return dongle_id;
 648 }
 649
 650 /*
 651  * Function ali_ircc_interrupt (irq, dev_id, regs)
 652  *
 653  *    An interrupt from the chip has arrived. Time to do some work
 654  *
 655  */
 656 static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id)
 657 {
 658         struct net_device *dev = dev_id;
 659         struct ali_ircc_cb *self;
 660         int ret;
 661
 662
 663         self = netdev_priv(dev);
 664
 665         spin_lock(&self->lock);
 666
 667         /* Dispatch interrupt handler for the current speed */
 668         if (self->io.speed > 115200)
 669                 ret = ali_ircc_fir_interrupt(self);
 670         else
 671                 ret = ali_ircc_sir_interrupt(self);
 672
 673         spin_unlock(&self->lock);
 674
 675         return ret;
 676 }
 677 /*
 678  * Function ali_ircc_fir_interrupt(irq, struct ali_ircc_cb *self)
 679  *
 680  *    Handle MIR/FIR interrupt
 681  *
 682  */
 683 static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self)
 684 {
 685         __u8 eir, OldMessageCount;
 686         int iobase, tmp;
 687
 688
 689         iobase = self->io.fir_base;
 690
 691         switch_bank(iobase, BANK0);
 692         self->InterruptID = inb(iobase+FIR_IIR);
 693         self->BusStatus = inb(iobase+FIR_BSR);
 694
 695         OldMessageCount = (self->LineStatus + 1) & 0x07;
 696         self->LineStatus = inb(iobase+FIR_LSR);
 697         //self->ier = inb(iobase+FIR_IER);              2000/12/1 04:32PM
 698         eir = self->InterruptID & self->ier; /* Mask out the interesting ones */
 699
 700         pr_debug("%s(), self->InterruptID = %x\n", __func__, self->InterruptID);
 701         pr_debug("%s(), self->LineStatus = %x\n", __func__, self->LineStatus);
 702         pr_debug("%s(), self->ier = %x\n", __func__, self->ier);
 703         pr_debug("%s(), eir = %x\n", __func__, eir);
 704
 705         /* Disable interrupts */
 706          SetCOMInterrupts(self, FALSE);
 707
 708         /* Tx or Rx Interrupt */
 709
 710         if (eir & IIR_EOM)
 711         {
 712                 if (self->io.direction == IO_XMIT) /* TX */
 713                 {
 714                         pr_debug("%s(), ******* IIR_EOM (Tx) *******\n",
 715                                  __func__);
 716
 717                         if(ali_ircc_dma_xmit_complete(self))
 718                         {
 719                                 if (irda_device_txqueue_empty(self->netdev))
 720                                 {
 721                                         /* Prepare for receive */
 722                                         ali_ircc_dma_receive(self);
 723                                         self->ier = IER_EOM;
 724                                 }
 725                         }
 726                         else
 727                         {
 728                                 self->ier = IER_EOM;
 729                         }
 730
 731                 }
 732                 else /* RX */
 733                 {
 734                         pr_debug("%s(), ******* IIR_EOM (Rx) *******\n",
 735                                  __func__);
 736
 737                         if(OldMessageCount > ((self->LineStatus+1) & 0x07))
 738                         {
 739                                 self->rcvFramesOverflow = TRUE;
 740                                 pr_debug("%s(), ******* self->rcvFramesOverflow = TRUE ********\n",
 741                                          __func__);
 742                         }
 743
 744                         if (ali_ircc_dma_receive_complete(self))
 745                         {
 746                                 pr_debug("%s(), ******* receive complete ********\n",
 747                                          __func__);
 748
 749                                 self->ier = IER_EOM;
 750                         }
 751                         else
 752                         {
 753                                 pr_debug("%s(), ******* Not receive complete ********\n",
 754                                          __func__);
 755
 756                                 self->ier = IER_EOM | IER_TIMER;
 757                         }
 758
 759                 }
 760         }
 761         /* Timer Interrupt */
 762         else if (eir & IIR_TIMER)
 763         {
 764                 if(OldMessageCount > ((self->LineStatus+1) & 0x07))
 765                 {
 766                         self->rcvFramesOverflow = TRUE;
 767                         pr_debug("%s(), ******* self->rcvFramesOverflow = TRUE *******\n",
 768                                  __func__);
 769                 }
 770                 /* Disable Timer */
 771                 switch_bank(iobase, BANK1);
 772                 tmp = inb(iobase+FIR_CR);
 773                 outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR);
 774
 775                 /* Check if this is a Tx timer interrupt */
 776                 if (self->io.direction == IO_XMIT)
 777                 {
 778                         ali_ircc_dma_xmit(self);
 779
 780                         /* Interrupt on EOM */
 781                         self->ier = IER_EOM;
 782
 783                 }
 784                 else /* Rx */
 785                 {
 786                         if(ali_ircc_dma_receive_complete(self))
 787                         {
 788                                 self->ier = IER_EOM;
 789                         }
 790                         else
 791                         {
 792                                 self->ier = IER_EOM | IER_TIMER;
 793                         }
 794                 }
 795         }
 796
 797         /* Restore Interrupt */
 798         SetCOMInterrupts(self, TRUE);
 799
 800         return IRQ_RETVAL(eir);
 801 }
 802
 803 /*
 804  * Function ali_ircc_sir_interrupt (irq, self, eir)
 805  *
 806  *    Handle SIR interrupt
 807  *
 808  */
 809 static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self)
 810 {
 811         int iobase;
 812         int iir, lsr;
 813
 814
 815         iobase = self->io.sir_base;
 816
 817         iir = inb(iobase+UART_IIR) & UART_IIR_ID;
 818         if (iir) {
 819                 /* Clear interrupt */
 820                 lsr = inb(iobase+UART_LSR);
 821
 822                 pr_debug("%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
 823                          __func__, iir, lsr, iobase);
 824
 825                 switch (iir)
 826                 {
 827                         case UART_IIR_RLSI:
 828                                 pr_debug("%s(), RLSI\n", __func__);
 829                                 break;
 830                         case UART_IIR_RDI:
 831                                 /* Receive interrupt */
 832                                 ali_ircc_sir_receive(self);
 833                                 break;
 834                         case UART_IIR_THRI:
 835                                 if (lsr & UART_LSR_THRE)
 836                                 {
 837                                         /* Transmitter ready for data */
 838                                         ali_ircc_sir_write_wakeup(self);
 839                                 }
 840                                 break;
 841                         default:
 842                                 pr_debug("%s(), unhandled IIR=%#x\n",
 843                                          __func__, iir);
 844                                 break;
 845                 }
 846
 847         }
 848
 849
 850         return IRQ_RETVAL(iir);
 851 }
 852
 853
 854 /*
 855  * Function ali_ircc_sir_receive (self)
 856  *
 857  *    Receive one frame from the infrared port
 858  *
 859  */
 860 static void ali_ircc_sir_receive(struct ali_ircc_cb *self)
 861 {
 862         int boguscount = 0;
 863         int iobase;
 864
 865         IRDA_ASSERT(self != NULL, return;);
 866
 867         iobase = self->io.sir_base;
 868
 869         /*
 870          * Receive all characters in Rx FIFO, unwrap and unstuff them.
 871          * async_unwrap_char will deliver all found frames
 872          */
 873         do {
 874                 async_unwrap_char(self->netdev, &self->netdev->stats, &self->rx_buff,
 875                                   inb(iobase+UART_RX));
 876
 877                 /* Make sure we don't stay here too long */
 878                 if (boguscount++ > 32) {
 879                         pr_debug("%s(), breaking!\n", __func__);
 880                         break;
 881                 }
 882         } while (inb(iobase+UART_LSR) & UART_LSR_DR);
 883
 884 }
 885
 886 /*
 887  * Function ali_ircc_sir_write_wakeup (tty)
 888  *
 889  *    Called by the driver when there's room for more data.  If we have
 890  *    more packets to send, we send them here.
 891  *
 892  */
 893 static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self)
 894 {
 895         int actual = 0;
 896         int iobase;
 897
 898         IRDA_ASSERT(self != NULL, return;);
 899
 900
 901         iobase = self->io.sir_base;
 902
 903         /* Finished with frame?  */
 904         if (self->tx_buff.len > 0)
 905         {
 906                 /* Write data left in transmit buffer */
 907                 actual = ali_ircc_sir_write(iobase, self->io.fifo_size,
 908                                       self->tx_buff.data, self->tx_buff.len);
 909                 self->tx_buff.data += actual;
 910                 self->tx_buff.len  -= actual;
 911         }
 912         else
 913         {
 914                 if (self->new_speed)
 915                 {
 916                         /* We must wait until all data are gone */
 917                         while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT))
 918                                 pr_debug("%s(), UART_LSR_THRE\n", __func__);
 919
 920                         pr_debug("%s(), Changing speed! self->new_speed = %d\n",
 921                                  __func__, self->new_speed);
 922                         ali_ircc_change_speed(self, self->new_speed);
 923                         self->new_speed = 0;
 924
 925                         // benjamin 2000/11/10 06:32PM
 926                         if (self->io.speed > 115200)
 927                         {
 928                                 pr_debug("%s(), ali_ircc_change_speed from UART_LSR_TEMT\n",
 929                                          __func__);
 930
 931                                 self->ier = IER_EOM;
 932                                 // SetCOMInterrupts(self, TRUE);
 933                                 return;
 934                         }
 935                 }
 936                 else
 937                 {
 938                         netif_wake_queue(self->netdev);
 939                 }
 940
 941                 self->netdev->stats.tx_packets++;
 942
 943                 /* Turn on receive interrupts */
 944                 outb(UART_IER_RDI, iobase+UART_IER);
 945         }
 946
 947 }
 948
 949 static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud)
 950 {
 951         struct net_device *dev = self->netdev;
 952         int iobase;
 953
 954
 955         pr_debug("%s(), setting speed = %d\n", __func__, baud);
 956
 957         /* This function *must* be called with irq off and spin-lock.
 958          * - Jean II */
 959
 960         iobase = self->io.fir_base;
 961
 962         SetCOMInterrupts(self, FALSE); // 2000/11/24 11:43AM
 963
 964         /* Go to MIR, FIR Speed */
 965         if (baud > 115200)
 966         {
 967
 968
 969                 ali_ircc_fir_change_speed(self, baud);
 970
 971                 /* Install FIR xmit handler*/
 972                 dev->netdev_ops = &ali_ircc_fir_ops;
 973
 974                 /* Enable Interuupt */
 975                 self->ier = IER_EOM; // benjamin 2000/11/20 07:24PM
 976
 977                 /* Be ready for incoming frames */
 978                 ali_ircc_dma_receive(self);     // benajmin 2000/11/8 07:46PM not complete
 979         }
 980         /* Go to SIR Speed */
 981         else
 982         {
 983                 ali_ircc_sir_change_speed(self, baud);
 984
 985                 /* Install SIR xmit handler*/
 986                 dev->netdev_ops = &ali_ircc_sir_ops;
 987         }
 988
 989
 990         SetCOMInterrupts(self, TRUE);   // 2000/11/24 11:43AM
 991
 992         netif_wake_queue(self->netdev);
 993
 994 }
 995
 996 static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud)
 997 {
 998
 999         int iobase;
1000         struct ali_ircc_cb *self = priv;
1001         struct net_device *dev;
1002
1003
1004         IRDA_ASSERT(self != NULL, return;);
1005
1006         dev = self->netdev;
1007         iobase = self->io.fir_base;
1008
1009         pr_debug("%s(), self->io.speed = %d, change to speed = %d\n",
1010                  __func__, self->io.speed, baud);
1011
1012         /* Come from SIR speed */
1013         if(self->io.speed <=115200)
1014         {
1015                 SIR2FIR(iobase);
1016         }
1017
1018         /* Update accounting for new speed */
1019         self->io.speed = baud;
1020
1021         // Set Dongle Speed mode
1022         ali_ircc_change_dongle_speed(self, baud);
1023
1024 }
1025
1026 /*
1027  * Function ali_sir_change_speed (self, speed)
1028  *
1029  *    Set speed of IrDA port to specified baudrate
1030  *
1031  */
1032 static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed)
1033 {
1034         struct ali_ircc_cb *self = priv;
1035         unsigned long flags;
1036         int iobase;
1037         int fcr;    /* FIFO control reg */
1038         int lcr;    /* Line control reg */
1039         int divisor;
1040
1041
1042         pr_debug("%s(), Setting speed to: %d\n", __func__, speed);
1043
1044         IRDA_ASSERT(self != NULL, return;);
1045
1046         iobase = self->io.sir_base;
1047
1048         /* Come from MIR or FIR speed */
1049         if(self->io.speed >115200)
1050         {
1051                 // Set Dongle Speed mode first
1052                 ali_ircc_change_dongle_speed(self, speed);
1053
1054                 FIR2SIR(iobase);
1055         }
1056
1057         // Clear Line and Auxiluary status registers 2000/11/24 11:47AM
1058
1059         inb(iobase+UART_LSR);
1060         inb(iobase+UART_SCR);
1061
1062         /* Update accounting for new speed */
1063         self->io.speed = speed;
1064
1065         spin_lock_irqsave(&self->lock, flags);
1066
1067         divisor = 115200/speed;
1068
1069         fcr = UART_FCR_ENABLE_FIFO;
1070
1071         /*
1072          * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1073          * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1074          * about this timeout since it will always be fast enough.
1075          */
1076         if (self->io.speed < 38400)
1077                 fcr |= UART_FCR_TRIGGER_1;
1078         else
1079                 fcr |= UART_FCR_TRIGGER_14;
1080
1081         /* IrDA ports use 8N1 */
1082         lcr = UART_LCR_WLEN8;
1083
1084         outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */
1085         outb(divisor & 0xff,      iobase+UART_DLL); /* Set speed */
1086         outb(divisor >> 8,        iobase+UART_DLM);
1087         outb(lcr,                 iobase+UART_LCR); /* Set 8N1  */
1088         outb(fcr,                 iobase+UART_FCR); /* Enable FIFO's */
1089
1090         /* without this, the connection will be broken after come back from FIR speed,
1091            but with this, the SIR connection is harder to established */
1092         outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR);
1093
1094         spin_unlock_irqrestore(&self->lock, flags);
1095
1096 }
1097
1098 static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed)
1099 {
1100
1101         struct ali_ircc_cb *self = priv;
1102         int iobase,dongle_id;
1103         int tmp = 0;
1104
1105
1106         iobase = self->io.fir_base;     /* or iobase = self->io.sir_base; */
1107         dongle_id = self->io.dongle_id;
1108
1109         /* We are already locked, no need to do it again */
1110
1111         pr_debug("%s(), Set Speed for %s , Speed = %d\n",
1112                  __func__, dongle_types[dongle_id], speed);
1113
1114         switch_bank(iobase, BANK2);
1115         tmp = inb(iobase+FIR_IRDA_CR);
1116
1117         /* IBM type dongle */
1118         if(dongle_id == 0)
1119         {
1120                 if(speed == 4000000)
1121                 {
1122                         //            __ __
1123                         // SD/MODE __|     |__ __
1124                         //               __ __
1125                         // IRTX    __ __|     |__
1126                         //         T1 T2 T3 T4 T5
1127
1128                         tmp &=  ~IRDA_CR_HDLC;          // HDLC=0
1129                         tmp |= IRDA_CR_CRC;             // CRC=1
1130
1131                         switch_bank(iobase, BANK2);
1132                         outb(tmp, iobase+FIR_IRDA_CR);
1133
1134                         // T1 -> SD/MODE:0 IRTX:0
1135                         tmp &= ~0x09;
1136                         tmp |= 0x02;
1137                         outb(tmp, iobase+FIR_IRDA_CR);
1138                         udelay(2);
1139
1140                         // T2 -> SD/MODE:1 IRTX:0
1141                         tmp &= ~0x01;
1142                         tmp |= 0x0a;
1143                         outb(tmp, iobase+FIR_IRDA_CR);
1144                         udelay(2);
1145
1146                         // T3 -> SD/MODE:1 IRTX:1
1147                         tmp |= 0x0b;
1148                         outb(tmp, iobase+FIR_IRDA_CR);
1149                         udelay(2);
1150
1151                         // T4 -> SD/MODE:0 IRTX:1
1152                         tmp &= ~0x08;
1153                         tmp |= 0x03;
1154                         outb(tmp, iobase+FIR_IRDA_CR);
1155                         udelay(2);
1156
1157                         // T5 -> SD/MODE:0 IRTX:0
1158                         tmp &= ~0x09;
1159                         tmp |= 0x02;
1160                         outb(tmp, iobase+FIR_IRDA_CR);
1161                         udelay(2);
1162
1163                         // reset -> Normal TX output Signal
1164                         outb(tmp & ~0x02, iobase+FIR_IRDA_CR);
1165                 }
1166                 else /* speed <=1152000 */
1167                 {
1168                         //            __
1169                         // SD/MODE __|  |__
1170                         //
1171                         // IRTX    ________
1172                         //         T1 T2 T3
1173
1174                         /* MIR 115200, 57600 */
1175                         if (speed==1152000)
1176                         {
1177                                 tmp |= 0xA0;       //HDLC=1, 1.152Mbps=1
1178                         }
1179                         else
1180                         {
1181                                 tmp &=~0x80;       //HDLC 0.576Mbps
1182                                 tmp |= 0x20;       //HDLC=1,
1183                         }
1184
1185                         tmp |= IRDA_CR_CRC;             // CRC=1
1186
1187                         switch_bank(iobase, BANK2);
1188                         outb(tmp, iobase+FIR_IRDA_CR);
1189
1190                         /* MIR 115200, 57600 */
1191
1192                         //switch_bank(iobase, BANK2);
1193                         // T1 -> SD/MODE:0 IRTX:0
1194                         tmp &= ~0x09;
1195                         tmp |= 0x02;
1196                         outb(tmp, iobase+FIR_IRDA_CR);
1197                         udelay(2);
1198
1199                         // T2 -> SD/MODE:1 IRTX:0
1200                         tmp &= ~0x01;
1201                         tmp |= 0x0a;
1202                         outb(tmp, iobase+FIR_IRDA_CR);
1203
1204                         // T3 -> SD/MODE:0 IRTX:0
1205                         tmp &= ~0x09;
1206                         tmp |= 0x02;
1207                         outb(tmp, iobase+FIR_IRDA_CR);
1208                         udelay(2);
1209
1210                         // reset -> Normal TX output Signal
1211                         outb(tmp & ~0x02, iobase+FIR_IRDA_CR);
1212                 }
1213         }
1214         else if (dongle_id == 1) /* HP HDSL-3600 */
1215         {
1216                 switch(speed)
1217                 {
1218                 case 4000000:
1219                         tmp &=  ~IRDA_CR_HDLC;  // HDLC=0
1220                         break;
1221
1222                 case 1152000:
1223                         tmp |= 0xA0;            // HDLC=1, 1.152Mbps=1
1224                         break;
1225
1226                 case 576000:
1227                         tmp &=~0x80;            // HDLC 0.576Mbps
1228                         tmp |= 0x20;            // HDLC=1,
1229                         break;
1230                 }
1231
1232                 tmp |= IRDA_CR_CRC;             // CRC=1
1233
1234                 switch_bank(iobase, BANK2);
1235                 outb(tmp, iobase+FIR_IRDA_CR);
1236         }
1237         else /* HP HDSL-1100 */
1238         {
1239                 if(speed <= 115200) /* SIR */
1240                 {
1241
1242                         tmp &= ~IRDA_CR_FIR_SIN;        // HP sin select = 0
1243
1244                         switch_bank(iobase, BANK2);
1245                         outb(tmp, iobase+FIR_IRDA_CR);
1246                 }
1247                 else /* MIR FIR */
1248                 {
1249
1250                         switch(speed)
1251                         {
1252                         case 4000000:
1253                                 tmp &=  ~IRDA_CR_HDLC;  // HDLC=0
1254                                 break;
1255
1256                         case 1152000:
1257                                 tmp |= 0xA0;            // HDLC=1, 1.152Mbps=1
1258                                 break;
1259
1260                         case 576000:
1261                                 tmp &=~0x80;            // HDLC 0.576Mbps
1262                                 tmp |= 0x20;            // HDLC=1,
1263                                 break;
1264                         }
1265
1266                         tmp |= IRDA_CR_CRC;             // CRC=1
1267                         tmp |= IRDA_CR_FIR_SIN;         // HP sin select = 1
1268
1269                         switch_bank(iobase, BANK2);
1270                         outb(tmp, iobase+FIR_IRDA_CR);
1271                 }
1272         }
1273
1274         switch_bank(iobase, BANK0);
1275
1276 }
1277
1278 /*
1279  * Function ali_ircc_sir_write (driver)
1280  *
1281  *    Fill Tx FIFO with transmit data
1282  *
1283  */
1284 static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1285 {
1286         int actual = 0;
1287
1288
1289         /* Tx FIFO should be empty! */
1290         if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {
1291                 pr_debug("%s(), failed, fifo not empty!\n", __func__);
1292                 return 0;
1293         }
1294
1295         /* Fill FIFO with current frame */
1296         while ((fifo_size-- > 0) && (actual < len)) {
1297                 /* Transmit next byte */
1298                 outb(buf[actual], iobase+UART_TX);
1299
1300                 actual++;
1301         }
1302
1303         return actual;
1304 }
1305
1306 /*
1307  * Function ali_ircc_net_open (dev)
1308  *
1309  *    Start the device
1310  *
1311  */
1312 static int ali_ircc_net_open(struct net_device *dev)
1313 {
1314         struct ali_ircc_cb *self;
1315         int iobase;
1316         char hwname[32];
1317
1318
1319         IRDA_ASSERT(dev != NULL, return -1;);
1320
1321         self = netdev_priv(dev);
1322
1323         IRDA_ASSERT(self != NULL, return 0;);
1324
1325         iobase = self->io.fir_base;
1326
1327         /* Request IRQ and install Interrupt Handler */
1328         if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev))
1329         {
1330                 net_warn_ratelimited("%s, unable to allocate irq=%d\n",
1331                                      ALI_IRCC_DRIVER_NAME, self->io.irq);
1332                 return -EAGAIN;
1333         }
1334
1335         /*
1336          * Always allocate the DMA channel after the IRQ, and clean up on
1337          * failure.
1338          */
1339         if (request_dma(self->io.dma, dev->name)) {
1340                 net_warn_ratelimited("%s, unable to allocate dma=%d\n",
1341                                      ALI_IRCC_DRIVER_NAME, self->io.dma);
1342                 free_irq(self->io.irq, dev);
1343                 return -EAGAIN;
1344         }
1345
1346         /* Turn on interrups */
1347         outb(UART_IER_RDI , iobase+UART_IER);
1348
1349         /* Ready to play! */
1350         netif_start_queue(dev); //benjamin by irport
1351
1352         /* Give self a hardware name */
1353         sprintf(hwname, "ALI-FIR @ 0x%03x", self->io.fir_base);
1354
1355         /*
1356          * Open new IrLAP layer instance, now that everything should be
1357          * initialized properly
1358          */
1359         self->irlap = irlap_open(dev, &self->qos, hwname);
1360
1361
1362         return 0;
1363 }
1364
1365 /*
1366  * Function ali_ircc_net_close (dev)
1367  *
1368  *    Stop the device
1369  *
1370  */
1371 static int ali_ircc_net_close(struct net_device *dev)
1372 {
1373
1374         struct ali_ircc_cb *self;
1375         //int iobase;
1376
1377
1378         IRDA_ASSERT(dev != NULL, return -1;);
1379
1380         self = netdev_priv(dev);
1381         IRDA_ASSERT(self != NULL, return 0;);
1382
1383         /* Stop device */
1384         netif_stop_queue(dev);
1385
1386         /* Stop and remove instance of IrLAP */
1387         if (self->irlap)
1388                 irlap_close(self->irlap);
1389         self->irlap = NULL;
1390
1391         disable_dma(self->io.dma);
1392
1393         /* Disable interrupts */
1394         SetCOMInterrupts(self, FALSE);
1395
1396         free_irq(self->io.irq, dev);
1397         free_dma(self->io.dma);
1398
1399
1400         return 0;
1401 }
1402
1403 /*
1404  * Function ali_ircc_fir_hard_xmit (skb, dev)
1405  *
1406  *    Transmit the frame
1407  *
1408  */
1409 static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb,
1410                                                 struct net_device *dev)
1411 {
1412         struct ali_ircc_cb *self;
1413         unsigned long flags;
1414         int iobase;
1415         __u32 speed;
1416         int mtt, diff;
1417
1418
1419         self = netdev_priv(dev);
1420         iobase = self->io.fir_base;
1421
1422         netif_stop_queue(dev);
1423
1424         /* Make sure tests *& speed change are atomic */
1425         spin_lock_irqsave(&self->lock, flags);
1426
1427         /* Note : you should make sure that speed changes are not going
1428          * to corrupt any outgoing frame. Look at nsc-ircc for the gory
1429          * details - Jean II */
1430
1431         /* Check if we need to change the speed */
1432         speed = irda_get_next_speed(skb);
1433         if ((speed != self->io.speed) && (speed != -1)) {
1434                 /* Check for empty frame */
1435                 if (!skb->len) {
1436                         ali_ircc_change_speed(self, speed);
1437                         dev->trans_start = jiffies;
1438                         spin_unlock_irqrestore(&self->lock, flags);
1439                         dev_kfree_skb(skb);
1440                         return NETDEV_TX_OK;
1441                 } else
1442                         self->new_speed = speed;
1443         }
1444
1445         /* Register and copy this frame to DMA memory */
1446         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1447         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1448         self->tx_fifo.tail += skb->len;
1449
1450         dev->stats.tx_bytes += skb->len;
1451
1452         skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1453                       skb->len);
1454         self->tx_fifo.len++;
1455         self->tx_fifo.free++;
1456
1457         /* Start transmit only if there is currently no transmit going on */
1458         if (self->tx_fifo.len == 1)
1459         {
1460                 /* Check if we must wait the min turn time or not */
1461                 mtt = irda_get_mtt(skb);
1462
1463                 if (mtt)
1464                 {
1465                         /* Check how much time we have used already */
1466                         do_gettimeofday(&self->now);
1467
1468                         diff = self->now.tv_usec - self->stamp.tv_usec;
1469                         /* self->stamp is set from ali_ircc_dma_receive_complete() */
1470
1471                         pr_debug("%s(), ******* diff = %d *******\n",
1472                                  __func__, diff);
1473
1474                         if (diff < 0)
1475                                 diff += 1000000;
1476
1477                         /* Check if the mtt is larger than the time we have
1478                          * already used by all the protocol processing
1479                          */
1480                         if (mtt > diff)
1481                         {
1482                                 mtt -= diff;
1483
1484                                 /*
1485                                  * Use timer if delay larger than 1000 us, and
1486                                  * use udelay for smaller values which should
1487                                  * be acceptable
1488                                  */
1489                                 if (mtt > 500)
1490                                 {
1491                                         /* Adjust for timer resolution */
1492                                         mtt = (mtt+250) / 500;  /* 4 discard, 5 get advanced, Let's round off */
1493
1494                                         pr_debug("%s(), ************** mtt = %d ***********\n",
1495                                                  __func__, mtt);
1496
1497                                         /* Setup timer */
1498                                         if (mtt == 1) /* 500 us */
1499                                         {
1500                                                 switch_bank(iobase, BANK1);
1501                                                 outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR);
1502                                         }
1503                                         else if (mtt == 2) /* 1 ms */
1504                                         {
1505                                                 switch_bank(iobase, BANK1);
1506                                                 outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR);
1507                                         }
1508                                         else /* > 2ms -> 4ms */
1509                                         {
1510                                                 switch_bank(iobase, BANK1);
1511                                                 outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR);
1512                                         }
1513
1514
1515                                         /* Start timer */
1516                                         outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);
1517                                         self->io.direction = IO_XMIT;
1518
1519                                         /* Enable timer interrupt */
1520                                         self->ier = IER_TIMER;
1521                                         SetCOMInterrupts(self, TRUE);
1522
1523                                         /* Timer will take care of the rest */
1524                                         goto out;
1525                                 }
1526                                 else
1527                                         udelay(mtt);
1528                         } // if (if (mtt > diff)
1529                 }// if (mtt)
1530
1531                 /* Enable EOM interrupt */
1532                 self->ier = IER_EOM;
1533                 SetCOMInterrupts(self, TRUE);
1534
1535                 /* Transmit frame */
1536                 ali_ircc_dma_xmit(self);
1537         } // if (self->tx_fifo.len == 1)
1538
1539  out:
1540
1541         /* Not busy transmitting anymore if window is not full */
1542         if (self->tx_fifo.free < MAX_TX_WINDOW)
1543                 netif_wake_queue(self->netdev);
1544
1545         /* Restore bank register */
1546         switch_bank(iobase, BANK0);
1547
1548         dev->trans_start = jiffies;
1549         spin_unlock_irqrestore(&self->lock, flags);
1550         dev_kfree_skb(skb);
1551
1552         return NETDEV_TX_OK;
1553 }
1554
1555
1556 static void ali_ircc_dma_xmit(struct ali_ircc_cb *self)
1557 {
1558         int iobase, tmp;
1559         unsigned char FIFO_OPTI, Hi, Lo;
1560
1561
1562
1563         iobase = self->io.fir_base;
1564
1565         /* FIFO threshold , this method comes from NDIS5 code */
1566
1567         if(self->tx_fifo.queue[self->tx_fifo.ptr].len < TX_FIFO_Threshold)
1568                 FIFO_OPTI = self->tx_fifo.queue[self->tx_fifo.ptr].len-1;
1569         else
1570                 FIFO_OPTI = TX_FIFO_Threshold;
1571
1572         /* Disable DMA */
1573         switch_bank(iobase, BANK1);
1574         outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1575
1576         self->io.direction = IO_XMIT;
1577
1578         irda_setup_dma(self->io.dma,
1579                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1580                         self->tx_buff.head) + self->tx_buff_dma,
1581                        self->tx_fifo.queue[self->tx_fifo.ptr].len,
1582                        DMA_TX_MODE);
1583
1584         /* Reset Tx FIFO */
1585         switch_bank(iobase, BANK0);
1586         outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A);
1587
1588         /* Set Tx FIFO threshold */
1589         if (self->fifo_opti_buf!=FIFO_OPTI)
1590         {
1591                 switch_bank(iobase, BANK1);
1592                 outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ;
1593                 self->fifo_opti_buf=FIFO_OPTI;
1594         }
1595
1596         /* Set Tx DMA threshold */
1597         switch_bank(iobase, BANK1);
1598         outb(TX_DMA_Threshold, iobase+FIR_DMA_TR);
1599
1600         /* Set max Tx frame size */
1601         Hi = (self->tx_fifo.queue[self->tx_fifo.ptr].len >> 8) & 0x0f;
1602         Lo = self->tx_fifo.queue[self->tx_fifo.ptr].len & 0xff;
1603         switch_bank(iobase, BANK2);
1604         outb(Hi, iobase+FIR_TX_DSR_HI);
1605         outb(Lo, iobase+FIR_TX_DSR_LO);
1606
1607         /* Disable SIP , Disable Brick Wall (we don't support in TX mode), Change to TX mode */
1608         switch_bank(iobase, BANK0);
1609         tmp = inb(iobase+FIR_LCR_B);
1610         tmp &= ~0x20; // Disable SIP
1611         outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B);
1612         pr_debug("%s(), *** Change to TX mode: FIR_LCR_B = 0x%x ***\n",
1613                  __func__, inb(iobase + FIR_LCR_B));
1614
1615         outb(0, iobase+FIR_LSR);
1616
1617         /* Enable DMA and Burst Mode */
1618         switch_bank(iobase, BANK1);
1619         outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);
1620
1621         switch_bank(iobase, BANK0);
1622
1623 }
1624
1625 static int  ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self)
1626 {
1627         int iobase;
1628         int ret = TRUE;
1629
1630
1631         iobase = self->io.fir_base;
1632
1633         /* Disable DMA */
1634         switch_bank(iobase, BANK1);
1635         outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1636
1637         /* Check for underrun! */
1638         switch_bank(iobase, BANK0);
1639         if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT)
1640
1641         {
1642                 net_err_ratelimited("%s(), ********* LSR_FRAME_ABORT *********\n",
1643                                     __func__);
1644                 self->netdev->stats.tx_errors++;
1645                 self->netdev->stats.tx_fifo_errors++;
1646         }
1647         else
1648         {
1649                 self->netdev->stats.tx_packets++;
1650         }
1651
1652         /* Check if we need to change the speed */
1653         if (self->new_speed)
1654         {
1655                 ali_ircc_change_speed(self, self->new_speed);
1656                 self->new_speed = 0;
1657         }
1658
1659         /* Finished with this frame, so prepare for next */
1660         self->tx_fifo.ptr++;
1661         self->tx_fifo.len--;
1662
1663         /* Any frames to be sent back-to-back? */
1664         if (self->tx_fifo.len)
1665         {
1666                 ali_ircc_dma_xmit(self);
1667
1668                 /* Not finished yet! */
1669                 ret = FALSE;
1670         }
1671         else
1672         {       /* Reset Tx FIFO info */
1673                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1674                 self->tx_fifo.tail = self->tx_buff.head;
1675         }
1676
1677         /* Make sure we have room for more frames */
1678         if (self->tx_fifo.free < MAX_TX_WINDOW) {
1679                 /* Not busy transmitting anymore */
1680                 /* Tell the network layer, that we can accept more frames */
1681                 netif_wake_queue(self->netdev);
1682         }
1683
1684         switch_bank(iobase, BANK0);
1685
1686         return ret;
1687 }
1688
1689 /*
1690  * Function ali_ircc_dma_receive (self)
1691  *
1692  *    Get ready for receiving a frame. The device will initiate a DMA
1693  *    if it starts to receive a frame.
1694  *
1695  */
1696 static int ali_ircc_dma_receive(struct ali_ircc_cb *self)
1697 {
1698         int iobase, tmp;
1699
1700
1701         iobase = self->io.fir_base;
1702
1703         /* Reset Tx FIFO info */
1704         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1705         self->tx_fifo.tail = self->tx_buff.head;
1706
1707         /* Disable DMA */
1708         switch_bank(iobase, BANK1);
1709         outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1710
1711         /* Reset Message Count */
1712         switch_bank(iobase, BANK0);
1713         outb(0x07, iobase+FIR_LSR);
1714
1715         self->rcvFramesOverflow = FALSE;
1716
1717         self->LineStatus = inb(iobase+FIR_LSR) ;
1718
1719         /* Reset Rx FIFO info */
1720         self->io.direction = IO_RECV;
1721         self->rx_buff.data = self->rx_buff.head;
1722
1723         /* Reset Rx FIFO */
1724         // switch_bank(iobase, BANK0);
1725         outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A);
1726
1727         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1728         self->st_fifo.tail = self->st_fifo.head = 0;
1729
1730         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1731                        DMA_RX_MODE);
1732
1733         /* Set Receive Mode,Brick Wall */
1734         //switch_bank(iobase, BANK0);
1735         tmp = inb(iobase+FIR_LCR_B);
1736         outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM
1737         pr_debug("%s(), *** Change To RX mode: FIR_LCR_B = 0x%x ***\n",
1738                  __func__, inb(iobase + FIR_LCR_B));
1739
1740         /* Set Rx Threshold */
1741         switch_bank(iobase, BANK1);
1742         outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);
1743         outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);
1744
1745         /* Enable DMA and Burst Mode */
1746         // switch_bank(iobase, BANK1);
1747         outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);
1748
1749         switch_bank(iobase, BANK0);
1750         return 0;
1751 }
1752
1753 static int  ali_ircc_dma_receive_complete(struct ali_ircc_cb *self)
1754 {
1755         struct st_fifo *st_fifo;
1756         struct sk_buff *skb;
1757         __u8 status, MessageCount;
1758         int len, i, iobase, val;
1759
1760         st_fifo = &self->st_fifo;
1761         iobase = self->io.fir_base;
1762
1763         switch_bank(iobase, BANK0);
1764         MessageCount = inb(iobase+ FIR_LSR)&0x07;
1765
1766         if (MessageCount > 0)
1767                 pr_debug("%s(), Message count = %d\n", __func__, MessageCount);
1768
1769         for (i=0; i<=MessageCount; i++)
1770         {
1771                 /* Bank 0 */
1772                 switch_bank(iobase, BANK0);
1773                 status = inb(iobase+FIR_LSR);
1774
1775                 switch_bank(iobase, BANK2);
1776                 len = inb(iobase+FIR_RX_DSR_HI) & 0x0f;
1777                 len = len << 8;
1778                 len |= inb(iobase+FIR_RX_DSR_LO);
1779
1780                 pr_debug("%s(), RX Length = 0x%.2x,\n", __func__ , len);
1781                 pr_debug("%s(), RX Status = 0x%.2x,\n", __func__ , status);
1782
1783                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1784                         pr_debug("%s(), window is full!\n", __func__);
1785                         continue;
1786                 }
1787
1788                 st_fifo->entries[st_fifo->tail].status = status;
1789                 st_fifo->entries[st_fifo->tail].len = len;
1790                 st_fifo->pending_bytes += len;
1791                 st_fifo->tail++;
1792                 st_fifo->len++;
1793         }
1794
1795         for (i=0; i<=MessageCount; i++)
1796         {
1797                 /* Get first entry */
1798                 status = st_fifo->entries[st_fifo->head].status;
1799                 len    = st_fifo->entries[st_fifo->head].len;
1800                 st_fifo->pending_bytes -= len;
1801                 st_fifo->head++;
1802                 st_fifo->len--;
1803
1804                 /* Check for errors */
1805                 if ((status & 0xd8) || self->rcvFramesOverflow || (len==0))
1806                 {
1807                         pr_debug("%s(), ************* RX Errors ************\n",
1808                                  __func__);
1809
1810                         /* Skip frame */
1811                         self->netdev->stats.rx_errors++;
1812
1813                         self->rx_buff.data += len;
1814
1815                         if (status & LSR_FIFO_UR)
1816                         {
1817                                 self->netdev->stats.rx_frame_errors++;
1818                                 pr_debug("%s(), ************* FIFO Errors ************\n",
1819                                          __func__);
1820                         }
1821                         if (status & LSR_FRAME_ERROR)
1822                         {
1823                                 self->netdev->stats.rx_frame_errors++;
1824                                 pr_debug("%s(), ************* FRAME Errors ************\n",
1825                                          __func__);
1826                         }
1827
1828                         if (status & LSR_CRC_ERROR)
1829                         {
1830                                 self->netdev->stats.rx_crc_errors++;
1831                                 pr_debug("%s(), ************* CRC Errors ************\n",
1832                                          __func__);
1833                         }
1834
1835                         if(self->rcvFramesOverflow)
1836                         {
1837                                 self->netdev->stats.rx_frame_errors++;
1838                                 pr_debug("%s(), ************* Overran DMA buffer ************\n",
1839                                          __func__);
1840                         }
1841                         if(len == 0)
1842                         {
1843                                 self->netdev->stats.rx_frame_errors++;
1844                                 pr_debug("%s(), ********** Receive Frame Size = 0 *********\n",
1845                                          __func__);
1846                         }
1847                 }
1848                 else
1849                 {
1850
1851                         if (st_fifo->pending_bytes < 32)
1852                         {
1853                                 switch_bank(iobase, BANK0);
1854                                 val = inb(iobase+FIR_BSR);
1855                                 if ((val& BSR_FIFO_NOT_EMPTY)== 0x80)
1856                                 {
1857                                         pr_debug("%s(), ************* BSR_FIFO_NOT_EMPTY ************\n",
1858                                                  __func__);
1859
1860                                         /* Put this entry back in fifo */
1861                                         st_fifo->head--;
1862                                         st_fifo->len++;
1863                                         st_fifo->pending_bytes += len;
1864                                         st_fifo->entries[st_fifo->head].status = status;
1865                                         st_fifo->entries[st_fifo->head].len = len;
1866
1867                                         /*
1868                                         * DMA not finished yet, so try again
1869                                         * later, set timer value, resolution
1870                                         * 500 us
1871                                         */
1872
1873                                         switch_bank(iobase, BANK1);
1874                                         outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM
1875
1876                                         /* Enable Timer */
1877                                         outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);
1878
1879                                         return FALSE; /* I'll be back! */
1880                                 }
1881                         }
1882
1883                         /*
1884                          * Remember the time we received this frame, so we can
1885                          * reduce the min turn time a bit since we will know
1886                          * how much time we have used for protocol processing
1887                          */
1888                         do_gettimeofday(&self->stamp);
1889
1890                         skb = dev_alloc_skb(len+1);
1891                         if (skb == NULL)
1892                         {
1893                                 self->netdev->stats.rx_dropped++;
1894
1895                                 return FALSE;
1896                         }
1897
1898                         /* Make sure IP header gets aligned */
1899                         skb_reserve(skb, 1);
1900
1901                         /* Copy frame without CRC, CRC is removed by hardware*/
1902                         skb_put(skb, len);
1903                         skb_copy_to_linear_data(skb, self->rx_buff.data, len);
1904
1905                         /* Move to next frame */
1906                         self->rx_buff.data += len;
1907                         self->netdev->stats.rx_bytes += len;
1908                         self->netdev->stats.rx_packets++;
1909
1910                         skb->dev = self->netdev;
1911                         skb_reset_mac_header(skb);
1912                         skb->protocol = htons(ETH_P_IRDA);
1913                         netif_rx(skb);
1914                 }
1915         }
1916
1917         switch_bank(iobase, BANK0);
1918
1919         return TRUE;
1920 }
1921
1922
1923
1924 /*
1925  * Function ali_ircc_sir_hard_xmit (skb, dev)
1926  *
1927  *    Transmit the frame!
1928  *
1929  */
1930 static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb,
1931                                                 struct net_device *dev)
1932 {
1933         struct ali_ircc_cb *self;
1934         unsigned long flags;
1935         int iobase;
1936         __u32 speed;
1937
1938
1939         IRDA_ASSERT(dev != NULL, return NETDEV_TX_OK;);
1940
1941         self = netdev_priv(dev);
1942         IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
1943
1944         iobase = self->io.sir_base;
1945
1946         netif_stop_queue(dev);
1947
1948         /* Make sure tests *& speed change are atomic */
1949         spin_lock_irqsave(&self->lock, flags);
1950
1951         /* Note : you should make sure that speed changes are not going
1952          * to corrupt any outgoing frame. Look at nsc-ircc for the gory
1953          * details - Jean II */
1954
1955         /* Check if we need to change the speed */
1956         speed = irda_get_next_speed(skb);
1957         if ((speed != self->io.speed) && (speed != -1)) {
1958                 /* Check for empty frame */
1959                 if (!skb->len) {
1960                         ali_ircc_change_speed(self, speed);
1961                         dev->trans_start = jiffies;
1962                         spin_unlock_irqrestore(&self->lock, flags);
1963                         dev_kfree_skb(skb);
1964                         return NETDEV_TX_OK;
1965                 } else
1966                         self->new_speed = speed;
1967         }
1968
1969         /* Init tx buffer */
1970         self->tx_buff.data = self->tx_buff.head;
1971
1972         /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
1973         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1974                                            self->tx_buff.truesize);
1975
1976         self->netdev->stats.tx_bytes += self->tx_buff.len;
1977
1978         /* Turn on transmit finished interrupt. Will fire immediately!  */
1979         outb(UART_IER_THRI, iobase+UART_IER);
1980
1981         dev->trans_start = jiffies;
1982         spin_unlock_irqrestore(&self->lock, flags);
1983
1984         dev_kfree_skb(skb);
1985
1986
1987         return NETDEV_TX_OK;
1988 }
1989
1990
1991 /*
1992  * Function ali_ircc_net_ioctl (dev, rq, cmd)
1993  *
1994  *    Process IOCTL commands for this device
1995  *
1996  */
1997 static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1998 {
1999         struct if_irda_req *irq = (struct if_irda_req *) rq;
2000         struct ali_ircc_cb *self;
2001         unsigned long flags;
2002         int ret = 0;
2003
2004
2005         IRDA_ASSERT(dev != NULL, return -1;);
2006
2007         self = netdev_priv(dev);
2008
2009         IRDA_ASSERT(self != NULL, return -1;);
2010
2011         pr_debug("%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd);
2012
2013         switch (cmd) {
2014         case SIOCSBANDWIDTH: /* Set bandwidth */
2015                 pr_debug("%s(), SIOCSBANDWIDTH\n", __func__);
2016                 /*
2017                  * This function will also be used by IrLAP to change the
2018                  * speed, so we still must allow for speed change within
2019                  * interrupt context.
2020                  */
2021                 if (!in_interrupt() && !capable(CAP_NET_ADMIN))
2022                         return -EPERM;
2023
2024                 spin_lock_irqsave(&self->lock, flags);
2025                 ali_ircc_change_speed(self, irq->ifr_baudrate);
2026                 spin_unlock_irqrestore(&self->lock, flags);
2027                 break;
2028         case SIOCSMEDIABUSY: /* Set media busy */
2029                 pr_debug("%s(), SIOCSMEDIABUSY\n", __func__);
2030                 if (!capable(CAP_NET_ADMIN))
2031                         return -EPERM;
2032                 irda_device_set_media_busy(self->netdev, TRUE);
2033                 break;
2034         case SIOCGRECEIVING: /* Check if we are receiving right now */
2035                 pr_debug("%s(), SIOCGRECEIVING\n", __func__);
2036                 /* This is protected */
2037                 irq->ifr_receiving = ali_ircc_is_receiving(self);
2038                 break;
2039         default:
2040                 ret = -EOPNOTSUPP;
2041         }
2042
2043
2044         return ret;
2045 }
2046
2047 /*
2048  * Function ali_ircc_is_receiving (self)
2049  *
2050  *    Return TRUE is we are currently receiving a frame
2051  *
2052  */
2053 static int ali_ircc_is_receiving(struct ali_ircc_cb *self)
2054 {
2055         unsigned long flags;
2056         int status = FALSE;
2057         int iobase;
2058
2059
2060         IRDA_ASSERT(self != NULL, return FALSE;);
2061
2062         spin_lock_irqsave(&self->lock, flags);
2063
2064         if (self->io.speed > 115200)
2065         {
2066                 iobase = self->io.fir_base;
2067
2068                 switch_bank(iobase, BANK1);
2069                 if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0)
2070                 {
2071                         /* We are receiving something */
2072                         pr_debug("%s(), We are receiving something\n",
2073                                  __func__);
2074                         status = TRUE;
2075                 }
2076                 switch_bank(iobase, BANK0);
2077         }
2078         else
2079         {
2080                 status = (self->rx_buff.state != OUTSIDE_FRAME);
2081         }
2082
2083         spin_unlock_irqrestore(&self->lock, flags);
2084
2085
2086         return status;
2087 }
2088
2089 static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state)
2090 {
2091         struct ali_ircc_cb *self = platform_get_drvdata(dev);
2092
2093         net_info_ratelimited("%s, Suspending\n", ALI_IRCC_DRIVER_NAME);
2094
2095         if (self->io.suspended)
2096                 return 0;
2097
2098         ali_ircc_net_close(self->netdev);
2099
2100         self->io.suspended = 1;
2101
2102         return 0;
2103 }
2104
2105 static int ali_ircc_resume(struct platform_device *dev)
2106 {
2107         struct ali_ircc_cb *self = platform_get_drvdata(dev);
2108
2109         if (!self->io.suspended)
2110                 return 0;
2111
2112         ali_ircc_net_open(self->netdev);
2113
2114         net_info_ratelimited("%s, Waking up\n", ALI_IRCC_DRIVER_NAME);
2115
2116         self->io.suspended = 0;
2117
2118         return 0;
2119 }
2120
2121 /* ALi Chip Function */
2122
2123 static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable)
2124 {
2125
2126         unsigned char newMask;
2127
2128         int iobase = self->io.fir_base; /* or sir_base */
2129
2130         pr_debug("%s(), -------- Start -------- ( Enable = %d )\n",
2131                  __func__, enable);
2132
2133         /* Enable the interrupt which we wish to */
2134         if (enable){
2135                 if (self->io.direction == IO_XMIT)
2136                 {
2137                         if (self->io.speed > 115200) /* FIR, MIR */
2138                         {
2139                                 newMask = self->ier;
2140                         }
2141                         else /* SIR */
2142                         {
2143                                 newMask = UART_IER_THRI | UART_IER_RDI;
2144                         }
2145                 }
2146                 else {
2147                         if (self->io.speed > 115200) /* FIR, MIR */
2148                         {
2149                                 newMask = self->ier;
2150                         }
2151                         else /* SIR */
2152                         {
2153                                 newMask = UART_IER_RDI;
2154                         }
2155                 }
2156         }
2157         else /* Disable all the interrupts */
2158         {
2159                 newMask = 0x00;
2160
2161         }
2162
2163         //SIR and FIR has different registers
2164         if (self->io.speed > 115200)
2165         {
2166                 switch_bank(iobase, BANK0);
2167                 outb(newMask, iobase+FIR_IER);
2168         }
2169         else
2170                 outb(newMask, iobase+UART_IER);
2171
2172 }
2173
2174 static void SIR2FIR(int iobase)
2175 {
2176         //unsigned char tmp;
2177
2178
2179         /* Already protected (change_speed() or setup()), no need to lock.
2180          * Jean II */
2181
2182         outb(0x28, iobase+UART_MCR);
2183         outb(0x68, iobase+UART_MCR);
2184         outb(0x88, iobase+UART_MCR);
2185
2186         outb(0x60, iobase+FIR_MCR);     /*  Master Reset */
2187         outb(0x20, iobase+FIR_MCR);     /*  Master Interrupt Enable */
2188
2189         //tmp = inb(iobase+FIR_LCR_B);  /* SIP enable */
2190         //tmp |= 0x20;
2191         //outb(tmp, iobase+FIR_LCR_B);
2192
2193 }
2194
2195 static void FIR2SIR(int iobase)
2196 {
2197         unsigned char val;
2198
2199
2200         /* Already protected (change_speed() or setup()), no need to lock.
2201          * Jean II */
2202
2203         outb(0x20, iobase+FIR_MCR);     /* IRQ to low */
2204         outb(0x00, iobase+UART_IER);
2205
2206         outb(0xA0, iobase+FIR_MCR);     /* Don't set master reset */
2207         outb(0x00, iobase+UART_FCR);
2208         outb(0x07, iobase+UART_FCR);
2209
2210         val = inb(iobase+UART_RX);
2211         val = inb(iobase+UART_LSR);
2212         val = inb(iobase+UART_MSR);
2213
2214 }
2215
2216 MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>");
2217 MODULE_DESCRIPTION("ALi FIR Controller Driver");
2218 MODULE_LICENSE("GPL");
2219 MODULE_ALIAS("platform:" ALI_IRCC_DRIVER_NAME);
2220
2221
2222 module_param_array(io, int, NULL, 0);
2223 MODULE_PARM_DESC(io, "Base I/O addresses");
2224 module_param_array(irq, int, NULL, 0);
2225 MODULE_PARM_DESC(irq, "IRQ lines");
2226 module_param_array(dma, int, NULL, 0);
2227 MODULE_PARM_DESC(dma, "DMA channels");
2228
2229 module_init(ali_ircc_init);
2230 module_exit(ali_ircc_cleanup);