2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "5"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_LAN_ON 3
398 #define PHY_STAT_PWRDN 5
401 #define EEE_CLKDIV_EN 0x8000
402 #define EN_ALDPS 0x0004
403 #define EN_10M_PLLOFF 0x0001
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP 0x8000
407 #define RG_MATCLR_EN 0x4000
408 #define EEE_10_CAP 0x2000
409 #define EEE_NWAY_EN 0x1000
410 #define TX_QUIET_EN 0x0200
411 #define RX_QUIET_EN 0x0100
412 #define sd_rise_time_mask 0x0070
413 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP 0x0008
415 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN 0x0400
420 #define RG_LDVQUIET_EN 0x0200
421 #define RG_CKRSEL 0x0020
422 #define RG_EEEPRG_EN 0x0010
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask 0xff80
426 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
427 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
428 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
431 /* bit[15:14] function */
432 #define FUN_ADDR 0x0000
433 #define FUN_DATA 0x4000
434 /* bit[4:0] device addr */
437 #define CTAP_SHORT_EN 0x0040
438 #define EEE10_EN 0x0010
441 #define EN_10M_BGOFF 0x0080
444 #define TXDIS_STATE 0x01
445 #define ABD_STATE 0x02
448 #define CKADSEL_L 0x0100
449 #define ADC_EN 0x0080
450 #define EN_EMI_L 0x0040
453 #define LPF_AUTO_TUNE 0x8000
456 #define GDAC_IB_UPALL 0x0008
459 #define AMP_DN 0x0200
462 #define RX_DRIVING_MASK 0x6000
465 #define AD_MASK 0xfee0
467 #define PASS_THRU_MASK 0x1
469 enum rtl_register_content {
477 #define RTL8152_MAX_TX 4
478 #define RTL8152_MAX_RX 10
484 #define INTR_LINK 0x0004
486 #define RTL8152_REQT_READ 0xc0
487 #define RTL8152_REQT_WRITE 0x40
488 #define RTL8152_REQ_GET_REGS 0x05
489 #define RTL8152_REQ_SET_REGS 0x05
491 #define BYTE_EN_DWORD 0xff
492 #define BYTE_EN_WORD 0x33
493 #define BYTE_EN_BYTE 0x11
494 #define BYTE_EN_SIX_BYTES 0x3f
495 #define BYTE_EN_START_MASK 0x0f
496 #define BYTE_EN_END_MASK 0xf0
498 #define RTL8153_MAX_PACKET 9216 /* 9K */
499 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT 64
516 /* Define these values to match your device */
517 #define VENDOR_ID_REALTEK 0x0bda
518 #define VENDOR_ID_SAMSUNG 0x04e8
519 #define VENDOR_ID_LENOVO 0x17ef
520 #define VENDOR_ID_NVIDIA 0x0955
522 #define MCU_TYPE_PLA 0x0100
523 #define MCU_TYPE_USB 0x0000
525 struct tally_counter {
532 __le32 tx_one_collision;
533 __le32 tx_multi_collision;
543 #define RX_LEN_MASK 0x7fff
546 #define RD_UDP_CS BIT(23)
547 #define RD_TCP_CS BIT(22)
548 #define RD_IPV6_CS BIT(20)
549 #define RD_IPV4_CS BIT(19)
552 #define IPF BIT(23) /* IP checksum fail */
553 #define UDPF BIT(22) /* UDP checksum fail */
554 #define TCPF BIT(21) /* TCP checksum fail */
555 #define RX_VLAN_TAG BIT(16)
564 #define TX_FS BIT(31) /* First segment of a packet */
565 #define TX_LS BIT(30) /* Final segment of a packet */
566 #define GTSENDV4 BIT(28)
567 #define GTSENDV6 BIT(27)
568 #define GTTCPHO_SHIFT 18
569 #define GTTCPHO_MAX 0x7fU
570 #define TX_LEN_MAX 0x3ffffU
573 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
574 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
575 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
576 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
578 #define MSS_MAX 0x7ffU
579 #define TCPHO_SHIFT 17
580 #define TCPHO_MAX 0x7ffU
581 #define TX_VLAN_TAG BIT(16)
587 struct list_head list;
589 struct r8152 *context;
595 struct list_head list;
597 struct r8152 *context;
606 struct usb_device *udev;
607 struct napi_struct napi;
608 struct usb_interface *intf;
609 struct net_device *netdev;
610 struct urb *intr_urb;
611 struct tx_agg tx_info[RTL8152_MAX_TX];
612 struct rx_agg rx_info[RTL8152_MAX_RX];
613 struct list_head rx_done, tx_free;
614 struct sk_buff_head tx_queue, rx_queue;
615 spinlock_t rx_lock, tx_lock;
616 struct delayed_work schedule, hw_phy_work;
617 struct mii_if_info mii;
618 struct mutex control; /* use for hw setting */
619 #ifdef CONFIG_PM_SLEEP
620 struct notifier_block pm_notifier;
624 void (*init)(struct r8152 *);
625 int (*enable)(struct r8152 *);
626 void (*disable)(struct r8152 *);
627 void (*up)(struct r8152 *);
628 void (*down)(struct r8152 *);
629 void (*unload)(struct r8152 *);
630 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
631 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
632 bool (*in_nway)(struct r8152 *);
633 void (*hw_phy_cfg)(struct r8152 *);
634 void (*autosuspend_en)(struct r8152 *tp, bool enable);
667 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
668 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
670 static const int multicast_filter_limit = 32;
671 static unsigned int agg_buf_sz = 16384;
673 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
674 VLAN_ETH_HLEN - VLAN_HLEN)
677 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
682 tmp = kmalloc(size, GFP_KERNEL);
686 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
687 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
688 value, index, tmp, size, 500);
690 memcpy(data, tmp, size);
697 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
702 tmp = kmemdup(data, size, GFP_KERNEL);
706 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
707 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
708 value, index, tmp, size, 500);
715 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
716 void *data, u16 type)
721 if (test_bit(RTL8152_UNPLUG, &tp->flags))
724 /* both size and indix must be 4 bytes align */
725 if ((size & 3) || !size || (index & 3) || !data)
728 if ((u32)index + (u32)size > 0xffff)
733 ret = get_registers(tp, index, type, limit, data);
741 ret = get_registers(tp, index, type, size, data);
753 set_bit(RTL8152_UNPLUG, &tp->flags);
758 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
759 u16 size, void *data, u16 type)
762 u16 byteen_start, byteen_end, byen;
765 if (test_bit(RTL8152_UNPLUG, &tp->flags))
768 /* both size and indix must be 4 bytes align */
769 if ((size & 3) || !size || (index & 3) || !data)
772 if ((u32)index + (u32)size > 0xffff)
775 byteen_start = byteen & BYTE_EN_START_MASK;
776 byteen_end = byteen & BYTE_EN_END_MASK;
778 byen = byteen_start | (byteen_start << 4);
779 ret = set_registers(tp, index, type | byen, 4, data);
792 ret = set_registers(tp, index,
793 type | BYTE_EN_DWORD,
802 ret = set_registers(tp, index,
803 type | BYTE_EN_DWORD,
815 byen = byteen_end | (byteen_end >> 4);
816 ret = set_registers(tp, index, type | byen, 4, data);
823 set_bit(RTL8152_UNPLUG, &tp->flags);
829 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
831 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
835 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
837 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
841 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
843 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
847 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
849 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
852 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
856 generic_ocp_read(tp, index, sizeof(data), &data, type);
858 return __le32_to_cpu(data);
861 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
863 __le32 tmp = __cpu_to_le32(data);
865 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
868 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
872 u8 shift = index & 2;
876 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
878 data = __le32_to_cpu(tmp);
879 data >>= (shift * 8);
885 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
889 u16 byen = BYTE_EN_WORD;
890 u8 shift = index & 2;
896 mask <<= (shift * 8);
897 data <<= (shift * 8);
901 tmp = __cpu_to_le32(data);
903 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
906 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
910 u8 shift = index & 3;
914 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
916 data = __le32_to_cpu(tmp);
917 data >>= (shift * 8);
923 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
927 u16 byen = BYTE_EN_BYTE;
928 u8 shift = index & 3;
934 mask <<= (shift * 8);
935 data <<= (shift * 8);
939 tmp = __cpu_to_le32(data);
941 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
944 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
946 u16 ocp_base, ocp_index;
948 ocp_base = addr & 0xf000;
949 if (ocp_base != tp->ocp_base) {
950 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
951 tp->ocp_base = ocp_base;
954 ocp_index = (addr & 0x0fff) | 0xb000;
955 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
958 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
960 u16 ocp_base, ocp_index;
962 ocp_base = addr & 0xf000;
963 if (ocp_base != tp->ocp_base) {
964 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
965 tp->ocp_base = ocp_base;
968 ocp_index = (addr & 0x0fff) | 0xb000;
969 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
972 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
974 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
977 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
979 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
982 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
984 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
985 ocp_reg_write(tp, OCP_SRAM_DATA, data);
988 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
990 struct r8152 *tp = netdev_priv(netdev);
993 if (test_bit(RTL8152_UNPLUG, &tp->flags))
996 if (phy_id != R8152_PHY_ID)
999 ret = r8152_mdio_read(tp, reg);
1005 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1007 struct r8152 *tp = netdev_priv(netdev);
1009 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1012 if (phy_id != R8152_PHY_ID)
1015 r8152_mdio_write(tp, reg, val);
1019 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1021 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1023 struct r8152 *tp = netdev_priv(netdev);
1024 struct sockaddr *addr = p;
1025 int ret = -EADDRNOTAVAIL;
1027 if (!is_valid_ether_addr(addr->sa_data))
1030 ret = usb_autopm_get_interface(tp->intf);
1034 mutex_lock(&tp->control);
1036 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1038 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1039 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1040 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1042 mutex_unlock(&tp->control);
1044 usb_autopm_put_interface(tp->intf);
1049 /* Devices containing RTL8153-AD can support a persistent
1050 * host system provided MAC address.
1051 * Examples of this are Dell TB15 and Dell WD15 docks
1053 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1056 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1057 union acpi_object *obj;
1060 unsigned char buf[6];
1062 /* test for -AD variant of RTL8153 */
1063 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1064 if ((ocp_data & AD_MASK) != 0x1000)
1067 /* test for MAC address pass-through bit */
1068 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1069 if ((ocp_data & PASS_THRU_MASK) != 1)
1072 /* returns _AUXMAC_#AABBCCDDEEFF# */
1073 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1074 obj = (union acpi_object *)buffer.pointer;
1075 if (!ACPI_SUCCESS(status))
1077 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1078 netif_warn(tp, probe, tp->netdev,
1079 "Invalid buffer when reading pass-thru MAC addr: "
1081 obj->type, obj->string.length);
1084 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1085 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1086 netif_warn(tp, probe, tp->netdev,
1087 "Invalid header when reading pass-thru MAC addr\n");
1090 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1091 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1092 netif_warn(tp, probe, tp->netdev,
1093 "Invalid MAC when reading pass-thru MAC addr: "
1094 "%d, %pM\n", ret, buf);
1098 memcpy(sa->sa_data, buf, 6);
1099 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1100 netif_info(tp, probe, tp->netdev,
1101 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1108 static int set_ethernet_addr(struct r8152 *tp)
1110 struct net_device *dev = tp->netdev;
1114 if (tp->version == RTL_VER_01)
1115 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1117 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1118 * or system doesn't provide valid _SB.AMAC this will be
1119 * be expected to non-zero
1121 ret = vendor_mac_passthru_addr_read(tp, &sa);
1123 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1127 netif_err(tp, probe, dev, "Get ether addr fail\n");
1128 } else if (!is_valid_ether_addr(sa.sa_data)) {
1129 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1131 eth_hw_addr_random(dev);
1132 ether_addr_copy(sa.sa_data, dev->dev_addr);
1133 ret = rtl8152_set_mac_address(dev, &sa);
1134 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1137 if (tp->version == RTL_VER_01)
1138 ether_addr_copy(dev->dev_addr, sa.sa_data);
1140 ret = rtl8152_set_mac_address(dev, &sa);
1146 static void read_bulk_callback(struct urb *urb)
1148 struct net_device *netdev;
1149 int status = urb->status;
1161 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1164 if (!test_bit(WORK_ENABLE, &tp->flags))
1167 netdev = tp->netdev;
1169 /* When link down, the driver would cancel all bulks. */
1170 /* This avoid the re-submitting bulk */
1171 if (!netif_carrier_ok(netdev))
1174 usb_mark_last_busy(tp->udev);
1178 if (urb->actual_length < ETH_ZLEN)
1181 spin_lock(&tp->rx_lock);
1182 list_add_tail(&agg->list, &tp->rx_done);
1183 spin_unlock(&tp->rx_lock);
1184 napi_schedule(&tp->napi);
1187 set_bit(RTL8152_UNPLUG, &tp->flags);
1188 netif_device_detach(tp->netdev);
1191 return; /* the urb is in unlink state */
1193 if (net_ratelimit())
1194 netdev_warn(netdev, "maybe reset is needed?\n");
1197 if (net_ratelimit())
1198 netdev_warn(netdev, "Rx status %d\n", status);
1202 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1205 static void write_bulk_callback(struct urb *urb)
1207 struct net_device_stats *stats;
1208 struct net_device *netdev;
1211 int status = urb->status;
1221 netdev = tp->netdev;
1222 stats = &netdev->stats;
1224 if (net_ratelimit())
1225 netdev_warn(netdev, "Tx status %d\n", status);
1226 stats->tx_errors += agg->skb_num;
1228 stats->tx_packets += agg->skb_num;
1229 stats->tx_bytes += agg->skb_len;
1232 spin_lock(&tp->tx_lock);
1233 list_add_tail(&agg->list, &tp->tx_free);
1234 spin_unlock(&tp->tx_lock);
1236 usb_autopm_put_interface_async(tp->intf);
1238 if (!netif_carrier_ok(netdev))
1241 if (!test_bit(WORK_ENABLE, &tp->flags))
1244 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1247 if (!skb_queue_empty(&tp->tx_queue))
1248 napi_schedule(&tp->napi);
1251 static void intr_callback(struct urb *urb)
1255 int status = urb->status;
1262 if (!test_bit(WORK_ENABLE, &tp->flags))
1265 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1269 case 0: /* success */
1271 case -ECONNRESET: /* unlink */
1273 netif_device_detach(tp->netdev);
1276 netif_info(tp, intr, tp->netdev,
1277 "Stop submitting intr, status %d\n", status);
1280 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1282 /* -EPIPE: should clear the halt */
1284 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1288 d = urb->transfer_buffer;
1289 if (INTR_LINK & __le16_to_cpu(d[0])) {
1290 if (!netif_carrier_ok(tp->netdev)) {
1291 set_bit(RTL8152_LINK_CHG, &tp->flags);
1292 schedule_delayed_work(&tp->schedule, 0);
1295 if (netif_carrier_ok(tp->netdev)) {
1296 set_bit(RTL8152_LINK_CHG, &tp->flags);
1297 schedule_delayed_work(&tp->schedule, 0);
1302 res = usb_submit_urb(urb, GFP_ATOMIC);
1303 if (res == -ENODEV) {
1304 set_bit(RTL8152_UNPLUG, &tp->flags);
1305 netif_device_detach(tp->netdev);
1307 netif_err(tp, intr, tp->netdev,
1308 "can't resubmit intr, status %d\n", res);
1312 static inline void *rx_agg_align(void *data)
1314 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1317 static inline void *tx_agg_align(void *data)
1319 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1322 static void free_all_mem(struct r8152 *tp)
1326 for (i = 0; i < RTL8152_MAX_RX; i++) {
1327 usb_free_urb(tp->rx_info[i].urb);
1328 tp->rx_info[i].urb = NULL;
1330 kfree(tp->rx_info[i].buffer);
1331 tp->rx_info[i].buffer = NULL;
1332 tp->rx_info[i].head = NULL;
1335 for (i = 0; i < RTL8152_MAX_TX; i++) {
1336 usb_free_urb(tp->tx_info[i].urb);
1337 tp->tx_info[i].urb = NULL;
1339 kfree(tp->tx_info[i].buffer);
1340 tp->tx_info[i].buffer = NULL;
1341 tp->tx_info[i].head = NULL;
1344 usb_free_urb(tp->intr_urb);
1345 tp->intr_urb = NULL;
1347 kfree(tp->intr_buff);
1348 tp->intr_buff = NULL;
1351 static int alloc_all_mem(struct r8152 *tp)
1353 struct net_device *netdev = tp->netdev;
1354 struct usb_interface *intf = tp->intf;
1355 struct usb_host_interface *alt = intf->cur_altsetting;
1356 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1361 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1363 spin_lock_init(&tp->rx_lock);
1364 spin_lock_init(&tp->tx_lock);
1365 INIT_LIST_HEAD(&tp->tx_free);
1366 skb_queue_head_init(&tp->tx_queue);
1367 skb_queue_head_init(&tp->rx_queue);
1369 for (i = 0; i < RTL8152_MAX_RX; i++) {
1370 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1374 if (buf != rx_agg_align(buf)) {
1376 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1382 urb = usb_alloc_urb(0, GFP_KERNEL);
1388 INIT_LIST_HEAD(&tp->rx_info[i].list);
1389 tp->rx_info[i].context = tp;
1390 tp->rx_info[i].urb = urb;
1391 tp->rx_info[i].buffer = buf;
1392 tp->rx_info[i].head = rx_agg_align(buf);
1395 for (i = 0; i < RTL8152_MAX_TX; i++) {
1396 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1400 if (buf != tx_agg_align(buf)) {
1402 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1408 urb = usb_alloc_urb(0, GFP_KERNEL);
1414 INIT_LIST_HEAD(&tp->tx_info[i].list);
1415 tp->tx_info[i].context = tp;
1416 tp->tx_info[i].urb = urb;
1417 tp->tx_info[i].buffer = buf;
1418 tp->tx_info[i].head = tx_agg_align(buf);
1420 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1423 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1427 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1431 tp->intr_interval = (int)ep_intr->desc.bInterval;
1432 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1433 tp->intr_buff, INTBUFSIZE, intr_callback,
1434 tp, tp->intr_interval);
1443 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1445 struct tx_agg *agg = NULL;
1446 unsigned long flags;
1448 if (list_empty(&tp->tx_free))
1451 spin_lock_irqsave(&tp->tx_lock, flags);
1452 if (!list_empty(&tp->tx_free)) {
1453 struct list_head *cursor;
1455 cursor = tp->tx_free.next;
1456 list_del_init(cursor);
1457 agg = list_entry(cursor, struct tx_agg, list);
1459 spin_unlock_irqrestore(&tp->tx_lock, flags);
1464 /* r8152_csum_workaround()
1465 * The hw limites the value the transport offset. When the offset is out of the
1466 * range, calculate the checksum by sw.
1468 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1469 struct sk_buff_head *list)
1471 if (skb_shinfo(skb)->gso_size) {
1472 netdev_features_t features = tp->netdev->features;
1473 struct sk_buff_head seg_list;
1474 struct sk_buff *segs, *nskb;
1476 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1477 segs = skb_gso_segment(skb, features);
1478 if (IS_ERR(segs) || !segs)
1481 __skb_queue_head_init(&seg_list);
1487 __skb_queue_tail(&seg_list, nskb);
1490 skb_queue_splice(&seg_list, list);
1492 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1493 if (skb_checksum_help(skb) < 0)
1496 __skb_queue_head(list, skb);
1498 struct net_device_stats *stats;
1501 stats = &tp->netdev->stats;
1502 stats->tx_dropped++;
1507 /* msdn_giant_send_check()
1508 * According to the document of microsoft, the TCP Pseudo Header excludes the
1509 * packet length for IPv6 TCP large packets.
1511 static int msdn_giant_send_check(struct sk_buff *skb)
1513 const struct ipv6hdr *ipv6h;
1517 ret = skb_cow_head(skb, 0);
1521 ipv6h = ipv6_hdr(skb);
1525 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1530 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1532 if (skb_vlan_tag_present(skb)) {
1535 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1536 desc->opts2 |= cpu_to_le32(opts2);
1540 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1542 u32 opts2 = le32_to_cpu(desc->opts2);
1544 if (opts2 & RX_VLAN_TAG)
1545 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1546 swab16(opts2 & 0xffff));
1549 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1550 struct sk_buff *skb, u32 len, u32 transport_offset)
1552 u32 mss = skb_shinfo(skb)->gso_size;
1553 u32 opts1, opts2 = 0;
1554 int ret = TX_CSUM_SUCCESS;
1556 WARN_ON_ONCE(len > TX_LEN_MAX);
1558 opts1 = len | TX_FS | TX_LS;
1561 if (transport_offset > GTTCPHO_MAX) {
1562 netif_warn(tp, tx_err, tp->netdev,
1563 "Invalid transport offset 0x%x for TSO\n",
1569 switch (vlan_get_protocol(skb)) {
1570 case htons(ETH_P_IP):
1574 case htons(ETH_P_IPV6):
1575 if (msdn_giant_send_check(skb)) {
1587 opts1 |= transport_offset << GTTCPHO_SHIFT;
1588 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1589 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1592 if (transport_offset > TCPHO_MAX) {
1593 netif_warn(tp, tx_err, tp->netdev,
1594 "Invalid transport offset 0x%x\n",
1600 switch (vlan_get_protocol(skb)) {
1601 case htons(ETH_P_IP):
1603 ip_protocol = ip_hdr(skb)->protocol;
1606 case htons(ETH_P_IPV6):
1608 ip_protocol = ipv6_hdr(skb)->nexthdr;
1612 ip_protocol = IPPROTO_RAW;
1616 if (ip_protocol == IPPROTO_TCP)
1618 else if (ip_protocol == IPPROTO_UDP)
1623 opts2 |= transport_offset << TCPHO_SHIFT;
1626 desc->opts2 = cpu_to_le32(opts2);
1627 desc->opts1 = cpu_to_le32(opts1);
1633 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1635 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1639 __skb_queue_head_init(&skb_head);
1640 spin_lock(&tx_queue->lock);
1641 skb_queue_splice_init(tx_queue, &skb_head);
1642 spin_unlock(&tx_queue->lock);
1644 tx_data = agg->head;
1647 remain = agg_buf_sz;
1649 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1650 struct tx_desc *tx_desc;
1651 struct sk_buff *skb;
1655 skb = __skb_dequeue(&skb_head);
1659 len = skb->len + sizeof(*tx_desc);
1662 __skb_queue_head(&skb_head, skb);
1666 tx_data = tx_agg_align(tx_data);
1667 tx_desc = (struct tx_desc *)tx_data;
1669 offset = (u32)skb_transport_offset(skb);
1671 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1672 r8152_csum_workaround(tp, skb, &skb_head);
1676 rtl_tx_vlan_tag(tx_desc, skb);
1678 tx_data += sizeof(*tx_desc);
1681 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1682 struct net_device_stats *stats = &tp->netdev->stats;
1684 stats->tx_dropped++;
1685 dev_kfree_skb_any(skb);
1686 tx_data -= sizeof(*tx_desc);
1691 agg->skb_len += len;
1694 dev_kfree_skb_any(skb);
1696 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1699 if (!skb_queue_empty(&skb_head)) {
1700 spin_lock(&tx_queue->lock);
1701 skb_queue_splice(&skb_head, tx_queue);
1702 spin_unlock(&tx_queue->lock);
1705 netif_tx_lock(tp->netdev);
1707 if (netif_queue_stopped(tp->netdev) &&
1708 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1709 netif_wake_queue(tp->netdev);
1711 netif_tx_unlock(tp->netdev);
1713 ret = usb_autopm_get_interface_async(tp->intf);
1717 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1718 agg->head, (int)(tx_data - (u8 *)agg->head),
1719 (usb_complete_t)write_bulk_callback, agg);
1721 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1723 usb_autopm_put_interface_async(tp->intf);
1729 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1731 u8 checksum = CHECKSUM_NONE;
1734 if (tp->version == RTL_VER_01)
1737 opts2 = le32_to_cpu(rx_desc->opts2);
1738 opts3 = le32_to_cpu(rx_desc->opts3);
1740 if (opts2 & RD_IPV4_CS) {
1742 checksum = CHECKSUM_NONE;
1743 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1744 checksum = CHECKSUM_NONE;
1745 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1746 checksum = CHECKSUM_NONE;
1748 checksum = CHECKSUM_UNNECESSARY;
1749 } else if (RD_IPV6_CS) {
1750 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1751 checksum = CHECKSUM_UNNECESSARY;
1752 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1753 checksum = CHECKSUM_UNNECESSARY;
1760 static int rx_bottom(struct r8152 *tp, int budget)
1762 unsigned long flags;
1763 struct list_head *cursor, *next, rx_queue;
1764 int ret = 0, work_done = 0;
1766 if (!skb_queue_empty(&tp->rx_queue)) {
1767 while (work_done < budget) {
1768 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1769 struct net_device *netdev = tp->netdev;
1770 struct net_device_stats *stats = &netdev->stats;
1771 unsigned int pkt_len;
1777 napi_gro_receive(&tp->napi, skb);
1779 stats->rx_packets++;
1780 stats->rx_bytes += pkt_len;
1784 if (list_empty(&tp->rx_done))
1787 INIT_LIST_HEAD(&rx_queue);
1788 spin_lock_irqsave(&tp->rx_lock, flags);
1789 list_splice_init(&tp->rx_done, &rx_queue);
1790 spin_unlock_irqrestore(&tp->rx_lock, flags);
1792 list_for_each_safe(cursor, next, &rx_queue) {
1793 struct rx_desc *rx_desc;
1799 list_del_init(cursor);
1801 agg = list_entry(cursor, struct rx_agg, list);
1803 if (urb->actual_length < ETH_ZLEN)
1806 rx_desc = agg->head;
1807 rx_data = agg->head;
1808 len_used += sizeof(struct rx_desc);
1810 while (urb->actual_length > len_used) {
1811 struct net_device *netdev = tp->netdev;
1812 struct net_device_stats *stats = &netdev->stats;
1813 unsigned int pkt_len;
1814 struct sk_buff *skb;
1816 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1817 if (pkt_len < ETH_ZLEN)
1820 len_used += pkt_len;
1821 if (urb->actual_length < len_used)
1824 pkt_len -= CRC_SIZE;
1825 rx_data += sizeof(struct rx_desc);
1827 skb = napi_alloc_skb(&tp->napi, pkt_len);
1829 stats->rx_dropped++;
1833 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1834 memcpy(skb->data, rx_data, pkt_len);
1835 skb_put(skb, pkt_len);
1836 skb->protocol = eth_type_trans(skb, netdev);
1837 rtl_rx_vlan_tag(rx_desc, skb);
1838 if (work_done < budget) {
1839 napi_gro_receive(&tp->napi, skb);
1841 stats->rx_packets++;
1842 stats->rx_bytes += pkt_len;
1844 __skb_queue_tail(&tp->rx_queue, skb);
1848 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1849 rx_desc = (struct rx_desc *)rx_data;
1850 len_used = (int)(rx_data - (u8 *)agg->head);
1851 len_used += sizeof(struct rx_desc);
1856 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1858 urb->actual_length = 0;
1859 list_add_tail(&agg->list, next);
1863 if (!list_empty(&rx_queue)) {
1864 spin_lock_irqsave(&tp->rx_lock, flags);
1865 list_splice_tail(&rx_queue, &tp->rx_done);
1866 spin_unlock_irqrestore(&tp->rx_lock, flags);
1873 static void tx_bottom(struct r8152 *tp)
1880 if (skb_queue_empty(&tp->tx_queue))
1883 agg = r8152_get_tx_agg(tp);
1887 res = r8152_tx_agg_fill(tp, agg);
1889 struct net_device *netdev = tp->netdev;
1891 if (res == -ENODEV) {
1892 set_bit(RTL8152_UNPLUG, &tp->flags);
1893 netif_device_detach(netdev);
1895 struct net_device_stats *stats = &netdev->stats;
1896 unsigned long flags;
1898 netif_warn(tp, tx_err, netdev,
1899 "failed tx_urb %d\n", res);
1900 stats->tx_dropped += agg->skb_num;
1902 spin_lock_irqsave(&tp->tx_lock, flags);
1903 list_add_tail(&agg->list, &tp->tx_free);
1904 spin_unlock_irqrestore(&tp->tx_lock, flags);
1910 static void bottom_half(struct r8152 *tp)
1912 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1915 if (!test_bit(WORK_ENABLE, &tp->flags))
1918 /* When link down, the driver would cancel all bulks. */
1919 /* This avoid the re-submitting bulk */
1920 if (!netif_carrier_ok(tp->netdev))
1923 clear_bit(SCHEDULE_NAPI, &tp->flags);
1928 static int r8152_poll(struct napi_struct *napi, int budget)
1930 struct r8152 *tp = container_of(napi, struct r8152, napi);
1933 work_done = rx_bottom(tp, budget);
1936 if (work_done < budget) {
1937 napi_complete(napi);
1938 if (!list_empty(&tp->rx_done))
1939 napi_schedule(napi);
1946 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1950 /* The rx would be stopped, so skip submitting */
1951 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1952 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1955 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1956 agg->head, agg_buf_sz,
1957 (usb_complete_t)read_bulk_callback, agg);
1959 ret = usb_submit_urb(agg->urb, mem_flags);
1960 if (ret == -ENODEV) {
1961 set_bit(RTL8152_UNPLUG, &tp->flags);
1962 netif_device_detach(tp->netdev);
1964 struct urb *urb = agg->urb;
1965 unsigned long flags;
1967 urb->actual_length = 0;
1968 spin_lock_irqsave(&tp->rx_lock, flags);
1969 list_add_tail(&agg->list, &tp->rx_done);
1970 spin_unlock_irqrestore(&tp->rx_lock, flags);
1972 netif_err(tp, rx_err, tp->netdev,
1973 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1975 napi_schedule(&tp->napi);
1981 static void rtl_drop_queued_tx(struct r8152 *tp)
1983 struct net_device_stats *stats = &tp->netdev->stats;
1984 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1985 struct sk_buff *skb;
1987 if (skb_queue_empty(tx_queue))
1990 __skb_queue_head_init(&skb_head);
1991 spin_lock_bh(&tx_queue->lock);
1992 skb_queue_splice_init(tx_queue, &skb_head);
1993 spin_unlock_bh(&tx_queue->lock);
1995 while ((skb = __skb_dequeue(&skb_head))) {
1997 stats->tx_dropped++;
2001 static void rtl8152_tx_timeout(struct net_device *netdev)
2003 struct r8152 *tp = netdev_priv(netdev);
2005 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2007 usb_queue_reset_device(tp->intf);
2010 static void rtl8152_set_rx_mode(struct net_device *netdev)
2012 struct r8152 *tp = netdev_priv(netdev);
2014 if (netif_carrier_ok(netdev)) {
2015 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2016 schedule_delayed_work(&tp->schedule, 0);
2020 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2022 struct r8152 *tp = netdev_priv(netdev);
2023 u32 mc_filter[2]; /* Multicast hash filter */
2027 netif_stop_queue(netdev);
2028 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2029 ocp_data &= ~RCR_ACPT_ALL;
2030 ocp_data |= RCR_AB | RCR_APM;
2032 if (netdev->flags & IFF_PROMISC) {
2033 /* Unconditionally log net taps. */
2034 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2035 ocp_data |= RCR_AM | RCR_AAP;
2036 mc_filter[1] = 0xffffffff;
2037 mc_filter[0] = 0xffffffff;
2038 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2039 (netdev->flags & IFF_ALLMULTI)) {
2040 /* Too many to filter perfectly -- accept all multicasts. */
2042 mc_filter[1] = 0xffffffff;
2043 mc_filter[0] = 0xffffffff;
2045 struct netdev_hw_addr *ha;
2049 netdev_for_each_mc_addr(ha, netdev) {
2050 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2052 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2057 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2058 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2060 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2061 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2062 netif_wake_queue(netdev);
2065 static netdev_features_t
2066 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2067 netdev_features_t features)
2069 u32 mss = skb_shinfo(skb)->gso_size;
2070 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2071 int offset = skb_transport_offset(skb);
2073 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2074 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2075 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2076 features &= ~NETIF_F_GSO_MASK;
2081 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2082 struct net_device *netdev)
2084 struct r8152 *tp = netdev_priv(netdev);
2086 skb_tx_timestamp(skb);
2088 skb_queue_tail(&tp->tx_queue, skb);
2090 if (!list_empty(&tp->tx_free)) {
2091 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2092 set_bit(SCHEDULE_NAPI, &tp->flags);
2093 schedule_delayed_work(&tp->schedule, 0);
2095 usb_mark_last_busy(tp->udev);
2096 napi_schedule(&tp->napi);
2098 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2099 netif_stop_queue(netdev);
2102 return NETDEV_TX_OK;
2105 static void r8152b_reset_packet_filter(struct r8152 *tp)
2109 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2110 ocp_data &= ~FMC_FCR_MCU_EN;
2111 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2112 ocp_data |= FMC_FCR_MCU_EN;
2113 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2116 static void rtl8152_nic_reset(struct r8152 *tp)
2120 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2122 for (i = 0; i < 1000; i++) {
2123 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2125 usleep_range(100, 400);
2129 static void set_tx_qlen(struct r8152 *tp)
2131 struct net_device *netdev = tp->netdev;
2133 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2134 sizeof(struct tx_desc));
2137 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2139 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2142 static void rtl_set_eee_plus(struct r8152 *tp)
2147 speed = rtl8152_get_speed(tp);
2148 if (speed & _10bps) {
2149 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2150 ocp_data |= EEEP_CR_EEEP_TX;
2151 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2153 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2154 ocp_data &= ~EEEP_CR_EEEP_TX;
2155 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2159 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2163 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2165 ocp_data |= RXDY_GATED_EN;
2167 ocp_data &= ~RXDY_GATED_EN;
2168 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2171 static int rtl_start_rx(struct r8152 *tp)
2175 INIT_LIST_HEAD(&tp->rx_done);
2176 for (i = 0; i < RTL8152_MAX_RX; i++) {
2177 INIT_LIST_HEAD(&tp->rx_info[i].list);
2178 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2183 if (ret && ++i < RTL8152_MAX_RX) {
2184 struct list_head rx_queue;
2185 unsigned long flags;
2187 INIT_LIST_HEAD(&rx_queue);
2190 struct rx_agg *agg = &tp->rx_info[i++];
2191 struct urb *urb = agg->urb;
2193 urb->actual_length = 0;
2194 list_add_tail(&agg->list, &rx_queue);
2195 } while (i < RTL8152_MAX_RX);
2197 spin_lock_irqsave(&tp->rx_lock, flags);
2198 list_splice_tail(&rx_queue, &tp->rx_done);
2199 spin_unlock_irqrestore(&tp->rx_lock, flags);
2205 static int rtl_stop_rx(struct r8152 *tp)
2209 for (i = 0; i < RTL8152_MAX_RX; i++)
2210 usb_kill_urb(tp->rx_info[i].urb);
2212 while (!skb_queue_empty(&tp->rx_queue))
2213 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2218 static int rtl_enable(struct r8152 *tp)
2222 r8152b_reset_packet_filter(tp);
2224 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2225 ocp_data |= CR_RE | CR_TE;
2226 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2228 rxdy_gated_en(tp, false);
2233 static int rtl8152_enable(struct r8152 *tp)
2235 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2239 rtl_set_eee_plus(tp);
2241 return rtl_enable(tp);
2244 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2246 u32 ocp_data = tp->coalesce / 8;
2248 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2251 static void r8153_set_rx_early_size(struct r8152 *tp)
2253 u32 mtu = tp->netdev->mtu;
2254 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 8;
2256 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2259 static int rtl8153_enable(struct r8152 *tp)
2261 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2264 usb_disable_lpm(tp->udev);
2266 rtl_set_eee_plus(tp);
2267 r8153_set_rx_early_timeout(tp);
2268 r8153_set_rx_early_size(tp);
2270 return rtl_enable(tp);
2273 static void rtl_disable(struct r8152 *tp)
2278 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2279 rtl_drop_queued_tx(tp);
2283 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2284 ocp_data &= ~RCR_ACPT_ALL;
2285 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2287 rtl_drop_queued_tx(tp);
2289 for (i = 0; i < RTL8152_MAX_TX; i++)
2290 usb_kill_urb(tp->tx_info[i].urb);
2292 rxdy_gated_en(tp, true);
2294 for (i = 0; i < 1000; i++) {
2295 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2296 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2298 usleep_range(1000, 2000);
2301 for (i = 0; i < 1000; i++) {
2302 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2304 usleep_range(1000, 2000);
2309 rtl8152_nic_reset(tp);
2312 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2316 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2318 ocp_data |= POWER_CUT;
2320 ocp_data &= ~POWER_CUT;
2321 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2323 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2324 ocp_data &= ~RESUME_INDICATE;
2325 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2328 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2332 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2334 ocp_data |= CPCR_RX_VLAN;
2336 ocp_data &= ~CPCR_RX_VLAN;
2337 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2340 static int rtl8152_set_features(struct net_device *dev,
2341 netdev_features_t features)
2343 netdev_features_t changed = features ^ dev->features;
2344 struct r8152 *tp = netdev_priv(dev);
2347 ret = usb_autopm_get_interface(tp->intf);
2351 mutex_lock(&tp->control);
2353 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2354 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2355 rtl_rx_vlan_en(tp, true);
2357 rtl_rx_vlan_en(tp, false);
2360 mutex_unlock(&tp->control);
2362 usb_autopm_put_interface(tp->intf);
2368 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2370 static u32 __rtl_get_wol(struct r8152 *tp)
2375 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2376 if (ocp_data & LINK_ON_WAKE_EN)
2377 wolopts |= WAKE_PHY;
2379 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2380 if (ocp_data & UWF_EN)
2381 wolopts |= WAKE_UCAST;
2382 if (ocp_data & BWF_EN)
2383 wolopts |= WAKE_BCAST;
2384 if (ocp_data & MWF_EN)
2385 wolopts |= WAKE_MCAST;
2387 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2388 if (ocp_data & MAGIC_EN)
2389 wolopts |= WAKE_MAGIC;
2394 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2398 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2400 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2401 ocp_data &= ~LINK_ON_WAKE_EN;
2402 if (wolopts & WAKE_PHY)
2403 ocp_data |= LINK_ON_WAKE_EN;
2404 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2406 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2407 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2408 if (wolopts & WAKE_UCAST)
2410 if (wolopts & WAKE_BCAST)
2412 if (wolopts & WAKE_MCAST)
2414 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2416 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2418 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2419 ocp_data &= ~MAGIC_EN;
2420 if (wolopts & WAKE_MAGIC)
2421 ocp_data |= MAGIC_EN;
2422 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2424 if (wolopts & WAKE_ANY)
2425 device_set_wakeup_enable(&tp->udev->dev, true);
2427 device_set_wakeup_enable(&tp->udev->dev, false);
2430 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2435 memset(u1u2, 0xff, sizeof(u1u2));
2437 memset(u1u2, 0x00, sizeof(u1u2));
2439 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2442 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2446 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2447 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2448 ocp_data |= U2P3_ENABLE;
2450 ocp_data &= ~U2P3_ENABLE;
2451 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2454 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2458 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2460 ocp_data |= PWR_EN | PHASE2_EN;
2462 ocp_data &= ~(PWR_EN | PHASE2_EN);
2463 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2465 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2466 ocp_data &= ~PCUT_STATUS;
2467 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2470 static bool rtl_can_wakeup(struct r8152 *tp)
2472 struct usb_device *udev = tp->udev;
2474 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2477 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2482 __rtl_set_wol(tp, WAKE_ANY);
2484 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2486 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2487 ocp_data |= LINK_OFF_WAKE_EN;
2488 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2490 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2494 __rtl_set_wol(tp, tp->saved_wolopts);
2496 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2498 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2499 ocp_data &= ~LINK_OFF_WAKE_EN;
2500 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2502 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2506 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2508 rtl_runtime_suspend_enable(tp, enable);
2511 r8153_u1u2en(tp, false);
2512 r8153_u2p3en(tp, false);
2514 r8153_u2p3en(tp, true);
2515 r8153_u1u2en(tp, true);
2519 static void r8153_teredo_off(struct r8152 *tp)
2523 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2524 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2525 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2527 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2528 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2529 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2532 static void rtl_reset_bmu(struct r8152 *tp)
2536 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2537 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2538 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2539 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2540 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2543 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2546 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2547 LINKENA | DIS_SDSAVE);
2549 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2555 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2557 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2558 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2559 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2562 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2566 r8152_mmd_indirect(tp, dev, reg);
2567 data = ocp_reg_read(tp, OCP_EEE_DATA);
2568 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2573 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2575 r8152_mmd_indirect(tp, dev, reg);
2576 ocp_reg_write(tp, OCP_EEE_DATA, data);
2577 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2580 static void r8152_eee_en(struct r8152 *tp, bool enable)
2582 u16 config1, config2, config3;
2585 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2586 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2587 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2588 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2591 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2592 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2593 config1 |= sd_rise_time(1);
2594 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2595 config3 |= fast_snr(42);
2597 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2598 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2600 config1 |= sd_rise_time(7);
2601 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2602 config3 |= fast_snr(511);
2605 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2606 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2607 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2608 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2611 static void r8152b_enable_eee(struct r8152 *tp)
2613 r8152_eee_en(tp, true);
2614 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2617 static void r8152b_enable_fc(struct r8152 *tp)
2621 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2622 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2623 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2626 static void rtl8152_disable(struct r8152 *tp)
2628 r8152_aldps_en(tp, false);
2630 r8152_aldps_en(tp, true);
2633 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2635 set_bit(PHY_RESET, &tp->flags);
2638 static void r8152b_exit_oob(struct r8152 *tp)
2643 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2644 ocp_data &= ~RCR_ACPT_ALL;
2645 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2647 rxdy_gated_en(tp, true);
2648 r8153_teredo_off(tp);
2649 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2650 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2652 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2653 ocp_data &= ~NOW_IS_OOB;
2654 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2656 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2657 ocp_data &= ~MCU_BORW_EN;
2658 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2660 for (i = 0; i < 1000; i++) {
2661 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2662 if (ocp_data & LINK_LIST_READY)
2664 usleep_range(1000, 2000);
2667 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2668 ocp_data |= RE_INIT_LL;
2669 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2671 for (i = 0; i < 1000; i++) {
2672 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2673 if (ocp_data & LINK_LIST_READY)
2675 usleep_range(1000, 2000);
2678 rtl8152_nic_reset(tp);
2680 /* rx share fifo credit full threshold */
2681 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2683 if (tp->udev->speed == USB_SPEED_FULL ||
2684 tp->udev->speed == USB_SPEED_LOW) {
2685 /* rx share fifo credit near full threshold */
2686 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2688 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2691 /* rx share fifo credit near full threshold */
2692 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2694 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2698 /* TX share fifo free credit full threshold */
2699 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2701 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2702 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2703 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2704 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2706 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2708 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2710 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2711 ocp_data |= TCR0_AUTO_FIFO;
2712 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2715 static void r8152b_enter_oob(struct r8152 *tp)
2720 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2721 ocp_data &= ~NOW_IS_OOB;
2722 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2724 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2725 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2726 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2730 for (i = 0; i < 1000; i++) {
2731 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2732 if (ocp_data & LINK_LIST_READY)
2734 usleep_range(1000, 2000);
2737 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2738 ocp_data |= RE_INIT_LL;
2739 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2741 for (i = 0; i < 1000; i++) {
2742 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2743 if (ocp_data & LINK_LIST_READY)
2745 usleep_range(1000, 2000);
2748 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2750 rtl_rx_vlan_en(tp, true);
2752 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2753 ocp_data |= ALDPS_PROXY_MODE;
2754 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2756 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2757 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2758 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2760 rxdy_gated_en(tp, false);
2762 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2763 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2764 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2767 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2771 data = ocp_reg_read(tp, OCP_POWER_CFG);
2774 ocp_reg_write(tp, OCP_POWER_CFG, data);
2777 ocp_reg_write(tp, OCP_POWER_CFG, data);
2782 static void r8153_eee_en(struct r8152 *tp, bool enable)
2787 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2788 config = ocp_reg_read(tp, OCP_EEE_CFG);
2791 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2794 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2795 config &= ~EEE10_EN;
2798 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2799 ocp_reg_write(tp, OCP_EEE_CFG, config);
2802 static void r8153_enable_eee(struct r8152 *tp)
2804 r8153_eee_en(tp, true);
2805 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2808 static void r8153_hw_phy_cfg(struct r8152 *tp)
2813 if (tp->version == RTL_VER_03) {
2814 data = ocp_reg_read(tp, OCP_EEE_CFG);
2815 data &= ~CTAP_SHORT_EN;
2816 ocp_reg_write(tp, OCP_EEE_CFG, data);
2819 data = ocp_reg_read(tp, OCP_POWER_CFG);
2820 data |= EEE_CLKDIV_EN;
2821 ocp_reg_write(tp, OCP_POWER_CFG, data);
2823 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2824 data |= EN_10M_BGOFF;
2825 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2826 data = ocp_reg_read(tp, OCP_POWER_CFG);
2827 data |= EN_10M_PLLOFF;
2828 ocp_reg_write(tp, OCP_POWER_CFG, data);
2829 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2831 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2832 ocp_data |= PFM_PWM_SWITCH;
2833 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2835 /* Enable LPF corner auto tune */
2836 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2838 /* Adjust 10M Amplitude */
2839 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2840 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2842 set_bit(PHY_RESET, &tp->flags);
2845 static void r8153_first_init(struct r8152 *tp)
2850 rxdy_gated_en(tp, true);
2851 r8153_teredo_off(tp);
2853 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2854 ocp_data &= ~RCR_ACPT_ALL;
2855 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2857 rtl8152_nic_reset(tp);
2860 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2861 ocp_data &= ~NOW_IS_OOB;
2862 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2864 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2865 ocp_data &= ~MCU_BORW_EN;
2866 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2868 for (i = 0; i < 1000; i++) {
2869 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2870 if (ocp_data & LINK_LIST_READY)
2872 usleep_range(1000, 2000);
2875 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2876 ocp_data |= RE_INIT_LL;
2877 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2879 for (i = 0; i < 1000; i++) {
2880 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2881 if (ocp_data & LINK_LIST_READY)
2883 usleep_range(1000, 2000);
2886 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2888 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2889 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2891 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2892 ocp_data |= TCR0_AUTO_FIFO;
2893 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2895 rtl8152_nic_reset(tp);
2897 /* rx share fifo credit full threshold */
2898 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2899 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2900 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2901 /* TX share fifo free credit full threshold */
2902 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2904 /* rx aggregation */
2905 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2906 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2907 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2910 static void r8153_enter_oob(struct r8152 *tp)
2915 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2916 ocp_data &= ~NOW_IS_OOB;
2917 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2922 for (i = 0; i < 1000; i++) {
2923 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2924 if (ocp_data & LINK_LIST_READY)
2926 usleep_range(1000, 2000);
2929 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2930 ocp_data |= RE_INIT_LL;
2931 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2933 for (i = 0; i < 1000; i++) {
2934 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2935 if (ocp_data & LINK_LIST_READY)
2937 usleep_range(1000, 2000);
2940 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2942 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2943 ocp_data &= ~TEREDO_WAKE_MASK;
2944 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2946 rtl_rx_vlan_en(tp, true);
2948 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2949 ocp_data |= ALDPS_PROXY_MODE;
2950 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2952 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2953 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2954 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2956 rxdy_gated_en(tp, false);
2958 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2959 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2960 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2963 static void rtl8153_disable(struct r8152 *tp)
2965 r8153_aldps_en(tp, false);
2968 r8153_aldps_en(tp, true);
2969 usb_enable_lpm(tp->udev);
2972 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2974 u16 bmcr, anar, gbcr;
2977 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2978 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2979 ADVERTISE_100HALF | ADVERTISE_100FULL);
2980 if (tp->mii.supports_gmii) {
2981 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2982 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2987 if (autoneg == AUTONEG_DISABLE) {
2988 if (speed == SPEED_10) {
2990 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2991 } else if (speed == SPEED_100) {
2992 bmcr = BMCR_SPEED100;
2993 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2994 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2995 bmcr = BMCR_SPEED1000;
2996 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3002 if (duplex == DUPLEX_FULL)
3003 bmcr |= BMCR_FULLDPLX;
3005 if (speed == SPEED_10) {
3006 if (duplex == DUPLEX_FULL)
3007 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3009 anar |= ADVERTISE_10HALF;
3010 } else if (speed == SPEED_100) {
3011 if (duplex == DUPLEX_FULL) {
3012 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3013 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3015 anar |= ADVERTISE_10HALF;
3016 anar |= ADVERTISE_100HALF;
3018 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3019 if (duplex == DUPLEX_FULL) {
3020 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3021 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3022 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3024 anar |= ADVERTISE_10HALF;
3025 anar |= ADVERTISE_100HALF;
3026 gbcr |= ADVERTISE_1000HALF;
3033 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3036 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3039 if (tp->mii.supports_gmii)
3040 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3042 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3043 r8152_mdio_write(tp, MII_BMCR, bmcr);
3045 if (bmcr & BMCR_RESET) {
3048 for (i = 0; i < 50; i++) {
3050 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3059 static void rtl8152_up(struct r8152 *tp)
3061 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3064 r8152_aldps_en(tp, false);
3065 r8152b_exit_oob(tp);
3066 r8152_aldps_en(tp, true);
3069 static void rtl8152_down(struct r8152 *tp)
3071 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3072 rtl_drop_queued_tx(tp);
3076 r8152_power_cut_en(tp, false);
3077 r8152_aldps_en(tp, false);
3078 r8152b_enter_oob(tp);
3079 r8152_aldps_en(tp, true);
3082 static void rtl8153_up(struct r8152 *tp)
3084 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3087 r8153_u1u2en(tp, false);
3088 r8153_aldps_en(tp, false);
3089 r8153_first_init(tp);
3090 r8153_aldps_en(tp, true);
3091 r8153_u2p3en(tp, true);
3092 r8153_u1u2en(tp, true);
3093 usb_enable_lpm(tp->udev);
3096 static void rtl8153_down(struct r8152 *tp)
3098 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3099 rtl_drop_queued_tx(tp);
3103 r8153_u1u2en(tp, false);
3104 r8153_u2p3en(tp, false);
3105 r8153_power_cut_en(tp, false);
3106 r8153_aldps_en(tp, false);
3107 r8153_enter_oob(tp);
3108 r8153_aldps_en(tp, true);
3111 static bool rtl8152_in_nway(struct r8152 *tp)
3115 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3116 tp->ocp_base = 0x2000;
3117 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3118 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3120 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3121 if (nway_state & 0xc000)
3127 static bool rtl8153_in_nway(struct r8152 *tp)
3129 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3131 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3137 static void set_carrier(struct r8152 *tp)
3139 struct net_device *netdev = tp->netdev;
3142 speed = rtl8152_get_speed(tp);
3144 if (speed & LINK_STATUS) {
3145 if (!netif_carrier_ok(netdev)) {
3146 tp->rtl_ops.enable(tp);
3147 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3148 napi_disable(&tp->napi);
3149 netif_carrier_on(netdev);
3151 napi_enable(&tp->napi);
3154 if (netif_carrier_ok(netdev)) {
3155 netif_carrier_off(netdev);
3156 napi_disable(&tp->napi);
3157 tp->rtl_ops.disable(tp);
3158 napi_enable(&tp->napi);
3163 static void rtl_work_func_t(struct work_struct *work)
3165 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3167 /* If the device is unplugged or !netif_running(), the workqueue
3168 * doesn't need to wake the device, and could return directly.
3170 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3173 if (usb_autopm_get_interface(tp->intf) < 0)
3176 if (!test_bit(WORK_ENABLE, &tp->flags))
3179 if (!mutex_trylock(&tp->control)) {
3180 schedule_delayed_work(&tp->schedule, 0);
3184 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3187 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3188 _rtl8152_set_rx_mode(tp->netdev);
3190 /* don't schedule napi before linking */
3191 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3192 netif_carrier_ok(tp->netdev))
3193 napi_schedule(&tp->napi);
3195 mutex_unlock(&tp->control);
3198 usb_autopm_put_interface(tp->intf);
3201 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3203 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3205 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3208 if (usb_autopm_get_interface(tp->intf) < 0)
3211 mutex_lock(&tp->control);
3213 tp->rtl_ops.hw_phy_cfg(tp);
3215 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3217 mutex_unlock(&tp->control);
3219 usb_autopm_put_interface(tp->intf);
3222 #ifdef CONFIG_PM_SLEEP
3223 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3226 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3229 case PM_HIBERNATION_PREPARE:
3230 case PM_SUSPEND_PREPARE:
3231 usb_autopm_get_interface(tp->intf);
3234 case PM_POST_HIBERNATION:
3235 case PM_POST_SUSPEND:
3236 usb_autopm_put_interface(tp->intf);
3239 case PM_POST_RESTORE:
3240 case PM_RESTORE_PREPARE:
3249 static int rtl8152_open(struct net_device *netdev)
3251 struct r8152 *tp = netdev_priv(netdev);
3254 res = alloc_all_mem(tp);
3258 res = usb_autopm_get_interface(tp->intf);
3264 mutex_lock(&tp->control);
3268 netif_carrier_off(netdev);
3269 netif_start_queue(netdev);
3270 set_bit(WORK_ENABLE, &tp->flags);
3272 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3275 netif_device_detach(tp->netdev);
3276 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3280 napi_enable(&tp->napi);
3283 mutex_unlock(&tp->control);
3285 usb_autopm_put_interface(tp->intf);
3286 #ifdef CONFIG_PM_SLEEP
3287 tp->pm_notifier.notifier_call = rtl_notifier;
3288 register_pm_notifier(&tp->pm_notifier);
3295 static int rtl8152_close(struct net_device *netdev)
3297 struct r8152 *tp = netdev_priv(netdev);
3300 #ifdef CONFIG_PM_SLEEP
3301 unregister_pm_notifier(&tp->pm_notifier);
3303 napi_disable(&tp->napi);
3304 clear_bit(WORK_ENABLE, &tp->flags);
3305 usb_kill_urb(tp->intr_urb);
3306 cancel_delayed_work_sync(&tp->schedule);
3307 netif_stop_queue(netdev);
3309 res = usb_autopm_get_interface(tp->intf);
3310 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3311 rtl_drop_queued_tx(tp);
3314 mutex_lock(&tp->control);
3316 tp->rtl_ops.down(tp);
3318 mutex_unlock(&tp->control);
3320 usb_autopm_put_interface(tp->intf);
3328 static void rtl_tally_reset(struct r8152 *tp)
3332 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3333 ocp_data |= TALLY_RESET;
3334 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3337 static void r8152b_init(struct r8152 *tp)
3342 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3345 data = r8152_mdio_read(tp, MII_BMCR);
3346 if (data & BMCR_PDOWN) {
3347 data &= ~BMCR_PDOWN;
3348 r8152_mdio_write(tp, MII_BMCR, data);
3351 r8152_aldps_en(tp, false);
3353 if (tp->version == RTL_VER_01) {
3354 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3355 ocp_data &= ~LED_MODE_MASK;
3356 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3359 r8152_power_cut_en(tp, false);
3361 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3362 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3363 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3364 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3365 ocp_data &= ~MCU_CLK_RATIO_MASK;
3366 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3367 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3368 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3369 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3370 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3372 r8152b_enable_eee(tp);
3373 r8152_aldps_en(tp, true);
3374 r8152b_enable_fc(tp);
3375 rtl_tally_reset(tp);
3377 /* enable rx aggregation */
3378 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3379 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3380 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3383 static void r8153_init(struct r8152 *tp)
3389 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3392 r8153_aldps_en(tp, false);
3393 r8153_u1u2en(tp, false);
3395 for (i = 0; i < 500; i++) {
3396 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3402 for (i = 0; i < 500; i++) {
3403 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3404 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3409 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3410 tp->version == RTL_VER_05)
3411 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3413 data = r8152_mdio_read(tp, MII_BMCR);
3414 if (data & BMCR_PDOWN) {
3415 data &= ~BMCR_PDOWN;
3416 r8152_mdio_write(tp, MII_BMCR, data);
3419 for (i = 0; i < 500; i++) {
3420 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3421 if (ocp_data == PHY_STAT_LAN_ON)
3426 usb_disable_lpm(tp->udev);
3427 r8153_u2p3en(tp, false);
3429 if (tp->version == RTL_VER_04) {
3430 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3431 ocp_data &= ~pwd_dn_scale_mask;
3432 ocp_data |= pwd_dn_scale(96);
3433 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3435 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3436 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3437 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3438 } else if (tp->version == RTL_VER_05) {
3439 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3440 ocp_data &= ~ECM_ALDPS;
3441 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3443 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3444 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3445 ocp_data &= ~DYNAMIC_BURST;
3447 ocp_data |= DYNAMIC_BURST;
3448 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3449 } else if (tp->version == RTL_VER_06) {
3450 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3451 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3452 ocp_data &= ~DYNAMIC_BURST;
3454 ocp_data |= DYNAMIC_BURST;
3455 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3458 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3459 ocp_data |= EP4_FULL_FC;
3460 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3462 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3463 ocp_data &= ~TIMER11_EN;
3464 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3466 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3467 ocp_data &= ~LED_MODE_MASK;
3468 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3470 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3471 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3472 ocp_data |= LPM_TIMER_500MS;
3474 ocp_data |= LPM_TIMER_500US;
3475 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3477 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3478 ocp_data &= ~SEN_VAL_MASK;
3479 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3480 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3482 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3484 r8153_power_cut_en(tp, false);
3485 r8153_u1u2en(tp, true);
3487 /* MAC clock speed down */
3488 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3489 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3490 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3491 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3493 r8153_enable_eee(tp);
3494 r8153_aldps_en(tp, true);
3495 r8152b_enable_fc(tp);
3496 rtl_tally_reset(tp);
3497 r8153_u2p3en(tp, true);
3500 static int rtl8152_pre_reset(struct usb_interface *intf)
3502 struct r8152 *tp = usb_get_intfdata(intf);
3503 struct net_device *netdev;
3508 netdev = tp->netdev;
3509 if (!netif_running(netdev))
3512 napi_disable(&tp->napi);
3513 clear_bit(WORK_ENABLE, &tp->flags);
3514 usb_kill_urb(tp->intr_urb);
3515 cancel_delayed_work_sync(&tp->schedule);
3516 if (netif_carrier_ok(netdev)) {
3517 netif_stop_queue(netdev);
3518 mutex_lock(&tp->control);
3519 tp->rtl_ops.disable(tp);
3520 mutex_unlock(&tp->control);
3526 static int rtl8152_post_reset(struct usb_interface *intf)
3528 struct r8152 *tp = usb_get_intfdata(intf);
3529 struct net_device *netdev;
3534 netdev = tp->netdev;
3535 if (!netif_running(netdev))
3538 set_bit(WORK_ENABLE, &tp->flags);
3539 if (netif_carrier_ok(netdev)) {
3540 mutex_lock(&tp->control);
3541 tp->rtl_ops.enable(tp);
3542 rtl8152_set_rx_mode(netdev);
3543 mutex_unlock(&tp->control);
3544 netif_wake_queue(netdev);
3547 napi_enable(&tp->napi);
3552 static bool delay_autosuspend(struct r8152 *tp)
3554 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3555 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3557 /* This means a linking change occurs and the driver doesn't detect it,
3558 * yet. If the driver has disabled tx/rx and hw is linking on, the
3559 * device wouldn't wake up by receiving any packet.
3561 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3564 /* If the linking down is occurred by nway, the device may miss the
3565 * linking change event. And it wouldn't wake when linking on.
3567 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3573 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3575 struct r8152 *tp = usb_get_intfdata(intf);
3576 struct net_device *netdev = tp->netdev;
3579 mutex_lock(&tp->control);
3581 if (PMSG_IS_AUTO(message)) {
3582 if (netif_running(netdev) && delay_autosuspend(tp)) {
3587 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3589 netif_device_detach(netdev);
3592 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3593 clear_bit(WORK_ENABLE, &tp->flags);
3594 usb_kill_urb(tp->intr_urb);
3595 napi_disable(&tp->napi);
3596 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3598 tp->rtl_ops.autosuspend_en(tp, true);
3600 cancel_delayed_work_sync(&tp->schedule);
3601 tp->rtl_ops.down(tp);
3603 napi_enable(&tp->napi);
3606 mutex_unlock(&tp->control);
3611 static int rtl8152_resume(struct usb_interface *intf)
3613 struct r8152 *tp = usb_get_intfdata(intf);
3615 mutex_lock(&tp->control);
3617 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3618 tp->rtl_ops.init(tp);
3619 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3620 netif_device_attach(tp->netdev);
3623 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3624 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3625 tp->rtl_ops.autosuspend_en(tp, false);
3626 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3627 napi_disable(&tp->napi);
3628 set_bit(WORK_ENABLE, &tp->flags);
3629 if (netif_carrier_ok(tp->netdev))
3631 napi_enable(&tp->napi);
3634 netif_carrier_off(tp->netdev);
3635 set_bit(WORK_ENABLE, &tp->flags);
3637 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3638 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3639 if (tp->netdev->flags & IFF_UP)
3640 tp->rtl_ops.autosuspend_en(tp, false);
3641 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3644 mutex_unlock(&tp->control);
3649 static int rtl8152_reset_resume(struct usb_interface *intf)
3651 struct r8152 *tp = usb_get_intfdata(intf);
3653 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3654 return rtl8152_resume(intf);
3657 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3659 struct r8152 *tp = netdev_priv(dev);
3661 if (usb_autopm_get_interface(tp->intf) < 0)
3664 if (!rtl_can_wakeup(tp)) {
3668 mutex_lock(&tp->control);
3669 wol->supported = WAKE_ANY;
3670 wol->wolopts = __rtl_get_wol(tp);
3671 mutex_unlock(&tp->control);
3674 usb_autopm_put_interface(tp->intf);
3677 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3679 struct r8152 *tp = netdev_priv(dev);
3682 if (!rtl_can_wakeup(tp))
3685 ret = usb_autopm_get_interface(tp->intf);
3689 mutex_lock(&tp->control);
3691 __rtl_set_wol(tp, wol->wolopts);
3692 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3694 mutex_unlock(&tp->control);
3696 usb_autopm_put_interface(tp->intf);
3702 static u32 rtl8152_get_msglevel(struct net_device *dev)
3704 struct r8152 *tp = netdev_priv(dev);
3706 return tp->msg_enable;
3709 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3711 struct r8152 *tp = netdev_priv(dev);
3713 tp->msg_enable = value;
3716 static void rtl8152_get_drvinfo(struct net_device *netdev,
3717 struct ethtool_drvinfo *info)
3719 struct r8152 *tp = netdev_priv(netdev);
3721 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3722 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3723 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3727 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3729 struct r8152 *tp = netdev_priv(netdev);
3732 if (!tp->mii.mdio_read)
3735 ret = usb_autopm_get_interface(tp->intf);
3739 mutex_lock(&tp->control);
3741 ret = mii_ethtool_gset(&tp->mii, cmd);
3743 mutex_unlock(&tp->control);
3745 usb_autopm_put_interface(tp->intf);
3751 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3753 struct r8152 *tp = netdev_priv(dev);
3756 ret = usb_autopm_get_interface(tp->intf);
3760 mutex_lock(&tp->control);
3762 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3764 tp->autoneg = cmd->autoneg;
3765 tp->speed = cmd->speed;
3766 tp->duplex = cmd->duplex;
3769 mutex_unlock(&tp->control);
3771 usb_autopm_put_interface(tp->intf);
3777 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3784 "tx_single_collisions",
3785 "tx_multi_collisions",
3793 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3797 return ARRAY_SIZE(rtl8152_gstrings);
3803 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3804 struct ethtool_stats *stats, u64 *data)
3806 struct r8152 *tp = netdev_priv(dev);
3807 struct tally_counter tally;
3809 if (usb_autopm_get_interface(tp->intf) < 0)
3812 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3814 usb_autopm_put_interface(tp->intf);
3816 data[0] = le64_to_cpu(tally.tx_packets);
3817 data[1] = le64_to_cpu(tally.rx_packets);
3818 data[2] = le64_to_cpu(tally.tx_errors);
3819 data[3] = le32_to_cpu(tally.rx_errors);
3820 data[4] = le16_to_cpu(tally.rx_missed);
3821 data[5] = le16_to_cpu(tally.align_errors);
3822 data[6] = le32_to_cpu(tally.tx_one_collision);
3823 data[7] = le32_to_cpu(tally.tx_multi_collision);
3824 data[8] = le64_to_cpu(tally.rx_unicast);
3825 data[9] = le64_to_cpu(tally.rx_broadcast);
3826 data[10] = le32_to_cpu(tally.rx_multicast);
3827 data[11] = le16_to_cpu(tally.tx_aborted);
3828 data[12] = le16_to_cpu(tally.tx_underrun);
3831 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3833 switch (stringset) {
3835 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3840 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3842 u32 ocp_data, lp, adv, supported = 0;
3845 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3846 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3848 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3849 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3851 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3852 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3854 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3855 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3857 eee->eee_enabled = !!ocp_data;
3858 eee->eee_active = !!(supported & adv & lp);
3859 eee->supported = supported;
3860 eee->advertised = adv;
3861 eee->lp_advertised = lp;
3866 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3868 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3870 r8152_eee_en(tp, eee->eee_enabled);
3872 if (!eee->eee_enabled)
3875 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3880 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3882 u32 ocp_data, lp, adv, supported = 0;
3885 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3886 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3888 val = ocp_reg_read(tp, OCP_EEE_ADV);
3889 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3891 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3892 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3894 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3895 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3897 eee->eee_enabled = !!ocp_data;
3898 eee->eee_active = !!(supported & adv & lp);
3899 eee->supported = supported;
3900 eee->advertised = adv;
3901 eee->lp_advertised = lp;
3906 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3908 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3910 r8153_eee_en(tp, eee->eee_enabled);
3912 if (!eee->eee_enabled)
3915 ocp_reg_write(tp, OCP_EEE_ADV, val);
3921 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3923 struct r8152 *tp = netdev_priv(net);
3926 ret = usb_autopm_get_interface(tp->intf);
3930 mutex_lock(&tp->control);
3932 ret = tp->rtl_ops.eee_get(tp, edata);
3934 mutex_unlock(&tp->control);
3936 usb_autopm_put_interface(tp->intf);
3943 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3945 struct r8152 *tp = netdev_priv(net);
3948 ret = usb_autopm_get_interface(tp->intf);
3952 mutex_lock(&tp->control);
3954 ret = tp->rtl_ops.eee_set(tp, edata);
3956 ret = mii_nway_restart(&tp->mii);
3958 mutex_unlock(&tp->control);
3960 usb_autopm_put_interface(tp->intf);
3966 static int rtl8152_nway_reset(struct net_device *dev)
3968 struct r8152 *tp = netdev_priv(dev);
3971 ret = usb_autopm_get_interface(tp->intf);
3975 mutex_lock(&tp->control);
3977 ret = mii_nway_restart(&tp->mii);
3979 mutex_unlock(&tp->control);
3981 usb_autopm_put_interface(tp->intf);
3987 static int rtl8152_get_coalesce(struct net_device *netdev,
3988 struct ethtool_coalesce *coalesce)
3990 struct r8152 *tp = netdev_priv(netdev);
3992 switch (tp->version) {
4000 coalesce->rx_coalesce_usecs = tp->coalesce;
4005 static int rtl8152_set_coalesce(struct net_device *netdev,
4006 struct ethtool_coalesce *coalesce)
4008 struct r8152 *tp = netdev_priv(netdev);
4011 switch (tp->version) {
4019 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4022 ret = usb_autopm_get_interface(tp->intf);
4026 mutex_lock(&tp->control);
4028 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4029 tp->coalesce = coalesce->rx_coalesce_usecs;
4031 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4032 r8153_set_rx_early_timeout(tp);
4035 mutex_unlock(&tp->control);
4037 usb_autopm_put_interface(tp->intf);
4042 static struct ethtool_ops ops = {
4043 .get_drvinfo = rtl8152_get_drvinfo,
4044 .get_settings = rtl8152_get_settings,
4045 .set_settings = rtl8152_set_settings,
4046 .get_link = ethtool_op_get_link,
4047 .nway_reset = rtl8152_nway_reset,
4048 .get_msglevel = rtl8152_get_msglevel,
4049 .set_msglevel = rtl8152_set_msglevel,
4050 .get_wol = rtl8152_get_wol,
4051 .set_wol = rtl8152_set_wol,
4052 .get_strings = rtl8152_get_strings,
4053 .get_sset_count = rtl8152_get_sset_count,
4054 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4055 .get_coalesce = rtl8152_get_coalesce,
4056 .set_coalesce = rtl8152_set_coalesce,
4057 .get_eee = rtl_ethtool_get_eee,
4058 .set_eee = rtl_ethtool_set_eee,
4061 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4063 struct r8152 *tp = netdev_priv(netdev);
4064 struct mii_ioctl_data *data = if_mii(rq);
4067 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4070 res = usb_autopm_get_interface(tp->intf);
4076 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4080 mutex_lock(&tp->control);
4081 data->val_out = r8152_mdio_read(tp, data->reg_num);
4082 mutex_unlock(&tp->control);
4086 if (!capable(CAP_NET_ADMIN)) {
4090 mutex_lock(&tp->control);
4091 r8152_mdio_write(tp, data->reg_num, data->val_in);
4092 mutex_unlock(&tp->control);
4099 usb_autopm_put_interface(tp->intf);
4105 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4107 struct r8152 *tp = netdev_priv(dev);
4110 switch (tp->version) {
4113 return eth_change_mtu(dev, new_mtu);
4118 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4121 ret = usb_autopm_get_interface(tp->intf);
4125 mutex_lock(&tp->control);
4129 if (netif_running(dev) && netif_carrier_ok(dev))
4130 r8153_set_rx_early_size(tp);
4132 mutex_unlock(&tp->control);
4134 usb_autopm_put_interface(tp->intf);
4139 static const struct net_device_ops rtl8152_netdev_ops = {
4140 .ndo_open = rtl8152_open,
4141 .ndo_stop = rtl8152_close,
4142 .ndo_do_ioctl = rtl8152_ioctl,
4143 .ndo_start_xmit = rtl8152_start_xmit,
4144 .ndo_tx_timeout = rtl8152_tx_timeout,
4145 .ndo_set_features = rtl8152_set_features,
4146 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4147 .ndo_set_mac_address = rtl8152_set_mac_address,
4148 .ndo_change_mtu = rtl8152_change_mtu,
4149 .ndo_validate_addr = eth_validate_addr,
4150 .ndo_features_check = rtl8152_features_check,
4153 static void r8152b_get_version(struct r8152 *tp)
4158 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4159 version = (u16)(ocp_data & VERSION_MASK);
4163 tp->version = RTL_VER_01;
4166 tp->version = RTL_VER_02;
4169 tp->version = RTL_VER_03;
4170 tp->mii.supports_gmii = 1;
4173 tp->version = RTL_VER_04;
4174 tp->mii.supports_gmii = 1;
4177 tp->version = RTL_VER_05;
4178 tp->mii.supports_gmii = 1;
4181 tp->version = RTL_VER_06;
4182 tp->mii.supports_gmii = 1;
4185 netif_info(tp, probe, tp->netdev,
4186 "Unknown version 0x%04x\n", version);
4191 static void rtl8152_unload(struct r8152 *tp)
4193 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4196 if (tp->version != RTL_VER_01)
4197 r8152_power_cut_en(tp, true);
4200 static void rtl8153_unload(struct r8152 *tp)
4202 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4205 r8153_power_cut_en(tp, false);
4208 static int rtl_ops_init(struct r8152 *tp)
4210 struct rtl_ops *ops = &tp->rtl_ops;
4213 switch (tp->version) {
4216 ops->init = r8152b_init;
4217 ops->enable = rtl8152_enable;
4218 ops->disable = rtl8152_disable;
4219 ops->up = rtl8152_up;
4220 ops->down = rtl8152_down;
4221 ops->unload = rtl8152_unload;
4222 ops->eee_get = r8152_get_eee;
4223 ops->eee_set = r8152_set_eee;
4224 ops->in_nway = rtl8152_in_nway;
4225 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4226 ops->autosuspend_en = rtl_runtime_suspend_enable;
4233 ops->init = r8153_init;
4234 ops->enable = rtl8153_enable;
4235 ops->disable = rtl8153_disable;
4236 ops->up = rtl8153_up;
4237 ops->down = rtl8153_down;
4238 ops->unload = rtl8153_unload;
4239 ops->eee_get = r8153_get_eee;
4240 ops->eee_set = r8153_set_eee;
4241 ops->in_nway = rtl8153_in_nway;
4242 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4243 ops->autosuspend_en = rtl8153_runtime_enable;
4248 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4255 static int rtl8152_probe(struct usb_interface *intf,
4256 const struct usb_device_id *id)
4258 struct usb_device *udev = interface_to_usbdev(intf);
4260 struct net_device *netdev;
4263 if (udev->actconfig->desc.bConfigurationValue != 1) {
4264 usb_driver_set_configuration(udev, 1);
4268 usb_reset_device(udev);
4269 netdev = alloc_etherdev(sizeof(struct r8152));
4271 dev_err(&intf->dev, "Out of memory\n");
4275 SET_NETDEV_DEV(netdev, &intf->dev);
4276 tp = netdev_priv(netdev);
4277 tp->msg_enable = 0x7FFF;
4280 tp->netdev = netdev;
4283 r8152b_get_version(tp);
4284 ret = rtl_ops_init(tp);
4288 mutex_init(&tp->control);
4289 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4290 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4292 netdev->netdev_ops = &rtl8152_netdev_ops;
4293 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4295 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4296 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4297 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4298 NETIF_F_HW_VLAN_CTAG_TX;
4299 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4300 NETIF_F_TSO | NETIF_F_FRAGLIST |
4301 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4302 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4303 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4304 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4305 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4307 netdev->ethtool_ops = &ops;
4308 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4310 tp->mii.dev = netdev;
4311 tp->mii.mdio_read = read_mii_word;
4312 tp->mii.mdio_write = write_mii_word;
4313 tp->mii.phy_id_mask = 0x3f;
4314 tp->mii.reg_num_mask = 0x1f;
4315 tp->mii.phy_id = R8152_PHY_ID;
4317 switch (udev->speed) {
4318 case USB_SPEED_SUPER:
4319 case USB_SPEED_SUPER_PLUS:
4320 tp->coalesce = COALESCE_SUPER;
4322 case USB_SPEED_HIGH:
4323 tp->coalesce = COALESCE_HIGH;
4326 tp->coalesce = COALESCE_SLOW;
4330 tp->autoneg = AUTONEG_ENABLE;
4331 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4332 tp->duplex = DUPLEX_FULL;
4334 intf->needs_remote_wakeup = 1;
4336 tp->rtl_ops.init(tp);
4337 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4338 set_ethernet_addr(tp);
4340 usb_set_intfdata(intf, tp);
4341 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4343 ret = register_netdev(netdev);
4345 netif_err(tp, probe, netdev, "couldn't register the device\n");
4349 if (!rtl_can_wakeup(tp))
4350 __rtl_set_wol(tp, 0);
4352 tp->saved_wolopts = __rtl_get_wol(tp);
4353 if (tp->saved_wolopts)
4354 device_set_wakeup_enable(&udev->dev, true);
4356 device_set_wakeup_enable(&udev->dev, false);
4358 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4363 netif_napi_del(&tp->napi);
4364 usb_set_intfdata(intf, NULL);
4366 free_netdev(netdev);
4370 static void rtl8152_disconnect(struct usb_interface *intf)
4372 struct r8152 *tp = usb_get_intfdata(intf);
4374 usb_set_intfdata(intf, NULL);
4376 struct usb_device *udev = tp->udev;
4378 if (udev->state == USB_STATE_NOTATTACHED)
4379 set_bit(RTL8152_UNPLUG, &tp->flags);
4381 netif_napi_del(&tp->napi);
4382 unregister_netdev(tp->netdev);
4383 cancel_delayed_work_sync(&tp->hw_phy_work);
4384 tp->rtl_ops.unload(tp);
4385 free_netdev(tp->netdev);
4389 #define REALTEK_USB_DEVICE(vend, prod) \
4390 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4391 USB_DEVICE_ID_MATCH_INT_CLASS, \
4392 .idVendor = (vend), \
4393 .idProduct = (prod), \
4394 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4397 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4398 USB_DEVICE_ID_MATCH_DEVICE, \
4399 .idVendor = (vend), \
4400 .idProduct = (prod), \
4401 .bInterfaceClass = USB_CLASS_COMM, \
4402 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4403 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4405 /* table of devices that work with this driver */
4406 static struct usb_device_id rtl8152_table[] = {
4407 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4408 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4409 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4410 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4411 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4412 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4416 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4418 static struct usb_driver rtl8152_driver = {
4420 .id_table = rtl8152_table,
4421 .probe = rtl8152_probe,
4422 .disconnect = rtl8152_disconnect,
4423 .suspend = rtl8152_suspend,
4424 .resume = rtl8152_resume,
4425 .reset_resume = rtl8152_reset_resume,
4426 .pre_reset = rtl8152_pre_reset,
4427 .post_reset = rtl8152_post_reset,
4428 .supports_autosuspend = 1,
4429 .disable_hub_initiated_lpm = 1,
4432 module_usb_driver(rtl8152_driver);
4434 MODULE_AUTHOR(DRIVER_AUTHOR);
4435 MODULE_DESCRIPTION(DRIVER_DESC);
4436 MODULE_LICENSE("GPL");
4437 MODULE_VERSION(DRIVER_VERSION);