3abf8d617d3212446a9bd62fb9ce0eb1f7f45755
[cascardo/linux.git] / drivers / net / wireless / ath / ath10k / core.c
1 /*
2  * Copyright (c) 2005-2011 Atheros Communications Inc.
3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17
18 #include <linux/module.h>
19 #include <linux/firmware.h>
20 #include <linux/of.h>
21 #include <asm/byteorder.h>
22
23 #include "core.h"
24 #include "mac.h"
25 #include "htc.h"
26 #include "hif.h"
27 #include "wmi.h"
28 #include "bmi.h"
29 #include "debug.h"
30 #include "htt.h"
31 #include "testmode.h"
32 #include "wmi-ops.h"
33
34 unsigned int ath10k_debug_mask;
35 static unsigned int ath10k_cryptmode_param;
36 static bool uart_print;
37 static bool skip_otp;
38 static bool rawmode;
39
40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
42 module_param(uart_print, bool, 0644);
43 module_param(skip_otp, bool, 0644);
44 module_param(rawmode, bool, 0644);
45
46 MODULE_PARM_DESC(debug_mask, "Debugging mask");
47 MODULE_PARM_DESC(uart_print, "Uart target debugging");
48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
51
52 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
53         {
54                 .id = QCA988X_HW_2_0_VERSION,
55                 .dev_id = QCA988X_2_0_DEVICE_ID,
56                 .name = "qca988x hw2.0",
57                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
58                 .uart_pin = 7,
59                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
60                 .otp_exe_param = 0,
61                 .channel_counters_freq_hz = 88000,
62                 .max_probe_resp_desc_thres = 0,
63                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
64                 .cal_data_len = 2116,
65                 .fw = {
66                         .dir = QCA988X_HW_2_0_FW_DIR,
67                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
68                         .board_size = QCA988X_BOARD_DATA_SZ,
69                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
70                 },
71         },
72         {
73                 .id = QCA9887_HW_1_0_VERSION,
74                 .dev_id = QCA9887_1_0_DEVICE_ID,
75                 .name = "qca9887 hw1.0",
76                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
77                 .uart_pin = 7,
78                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
79                 .otp_exe_param = 0,
80                 .channel_counters_freq_hz = 88000,
81                 .max_probe_resp_desc_thres = 0,
82                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
83                 .cal_data_len = 2116,
84                 .fw = {
85                         .dir = QCA9887_HW_1_0_FW_DIR,
86                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
87                         .board_size = QCA9887_BOARD_DATA_SZ,
88                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
89                 },
90         },
91         {
92                 .id = QCA6174_HW_2_1_VERSION,
93                 .dev_id = QCA6164_2_1_DEVICE_ID,
94                 .name = "qca6164 hw2.1",
95                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
96                 .uart_pin = 6,
97                 .otp_exe_param = 0,
98                 .channel_counters_freq_hz = 88000,
99                 .max_probe_resp_desc_thres = 0,
100                 .cal_data_len = 8124,
101                 .fw = {
102                         .dir = QCA6174_HW_2_1_FW_DIR,
103                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
104                         .board_size = QCA6174_BOARD_DATA_SZ,
105                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
106                 },
107         },
108         {
109                 .id = QCA6174_HW_2_1_VERSION,
110                 .dev_id = QCA6174_2_1_DEVICE_ID,
111                 .name = "qca6174 hw2.1",
112                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
113                 .uart_pin = 6,
114                 .otp_exe_param = 0,
115                 .channel_counters_freq_hz = 88000,
116                 .max_probe_resp_desc_thres = 0,
117                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
118                 .cal_data_len = 8124,
119                 .fw = {
120                         .dir = QCA6174_HW_2_1_FW_DIR,
121                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
122                         .board_size = QCA6174_BOARD_DATA_SZ,
123                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
124                 },
125         },
126         {
127                 .id = QCA6174_HW_3_0_VERSION,
128                 .dev_id = QCA6174_2_1_DEVICE_ID,
129                 .name = "qca6174 hw3.0",
130                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
131                 .uart_pin = 6,
132                 .otp_exe_param = 0,
133                 .channel_counters_freq_hz = 88000,
134                 .max_probe_resp_desc_thres = 0,
135                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
136                 .cal_data_len = 8124,
137                 .fw = {
138                         .dir = QCA6174_HW_3_0_FW_DIR,
139                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
140                         .board_size = QCA6174_BOARD_DATA_SZ,
141                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
142                 },
143         },
144         {
145                 .id = QCA6174_HW_3_2_VERSION,
146                 .dev_id = QCA6174_2_1_DEVICE_ID,
147                 .name = "qca6174 hw3.2",
148                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
149                 .uart_pin = 6,
150                 .otp_exe_param = 0,
151                 .channel_counters_freq_hz = 88000,
152                 .max_probe_resp_desc_thres = 0,
153                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
154                 .cal_data_len = 8124,
155                 .fw = {
156                         /* uses same binaries as hw3.0 */
157                         .dir = QCA6174_HW_3_0_FW_DIR,
158                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
159                         .board_size = QCA6174_BOARD_DATA_SZ,
160                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
161                 },
162         },
163         {
164                 .id = QCA99X0_HW_2_0_DEV_VERSION,
165                 .dev_id = QCA99X0_2_0_DEVICE_ID,
166                 .name = "qca99x0 hw2.0",
167                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
168                 .uart_pin = 7,
169                 .otp_exe_param = 0x00000700,
170                 .continuous_frag_desc = true,
171                 .cck_rate_map_rev2 = true,
172                 .channel_counters_freq_hz = 150000,
173                 .max_probe_resp_desc_thres = 24,
174                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
175                 .tx_chain_mask = 0xf,
176                 .rx_chain_mask = 0xf,
177                 .max_spatial_stream = 4,
178                 .cal_data_len = 12064,
179                 .fw = {
180                         .dir = QCA99X0_HW_2_0_FW_DIR,
181                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
182                         .board_size = QCA99X0_BOARD_DATA_SZ,
183                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
184                 },
185                 .sw_decrypt_mcast_mgmt = true,
186         },
187         {
188                 .id = QCA9984_HW_1_0_DEV_VERSION,
189                 .dev_id = QCA9984_1_0_DEVICE_ID,
190                 .name = "qca9984/qca9994 hw1.0",
191                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
192                 .uart_pin = 7,
193                 .otp_exe_param = 0x00000700,
194                 .continuous_frag_desc = true,
195                 .cck_rate_map_rev2 = true,
196                 .channel_counters_freq_hz = 150000,
197                 .max_probe_resp_desc_thres = 24,
198                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
199                 .tx_chain_mask = 0xf,
200                 .rx_chain_mask = 0xf,
201                 .max_spatial_stream = 4,
202                 .cal_data_len = 12064,
203                 .fw = {
204                         .dir = QCA9984_HW_1_0_FW_DIR,
205                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
206                         .board_size = QCA99X0_BOARD_DATA_SZ,
207                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
208                 },
209                 .sw_decrypt_mcast_mgmt = true,
210         },
211         {
212                 .id = QCA9888_HW_2_0_DEV_VERSION,
213                 .dev_id = QCA9888_2_0_DEVICE_ID,
214                 .name = "qca9888 hw2.0",
215                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
216                 .uart_pin = 7,
217                 .otp_exe_param = 0x00000700,
218                 .continuous_frag_desc = true,
219                 .channel_counters_freq_hz = 150000,
220                 .max_probe_resp_desc_thres = 24,
221                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
222                 .tx_chain_mask = 3,
223                 .rx_chain_mask = 3,
224                 .max_spatial_stream = 2,
225                 .cal_data_len = 12064,
226                 .fw = {
227                         .dir = QCA9888_HW_2_0_FW_DIR,
228                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
229                         .board_size = QCA99X0_BOARD_DATA_SZ,
230                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
231                 },
232                 .sw_decrypt_mcast_mgmt = true,
233         },
234         {
235                 .id = QCA9377_HW_1_0_DEV_VERSION,
236                 .dev_id = QCA9377_1_0_DEVICE_ID,
237                 .name = "qca9377 hw1.0",
238                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
239                 .uart_pin = 6,
240                 .otp_exe_param = 0,
241                 .channel_counters_freq_hz = 88000,
242                 .max_probe_resp_desc_thres = 0,
243                 .cal_data_len = 8124,
244                 .fw = {
245                         .dir = QCA9377_HW_1_0_FW_DIR,
246                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
247                         .board_size = QCA9377_BOARD_DATA_SZ,
248                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
249                 },
250         },
251         {
252                 .id = QCA9377_HW_1_1_DEV_VERSION,
253                 .dev_id = QCA9377_1_0_DEVICE_ID,
254                 .name = "qca9377 hw1.1",
255                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
256                 .uart_pin = 6,
257                 .otp_exe_param = 0,
258                 .channel_counters_freq_hz = 88000,
259                 .max_probe_resp_desc_thres = 0,
260                 .cal_data_len = 8124,
261                 .fw = {
262                         .dir = QCA9377_HW_1_0_FW_DIR,
263                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
264                         .board_size = QCA9377_BOARD_DATA_SZ,
265                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
266                 },
267         },
268         {
269                 .id = QCA4019_HW_1_0_DEV_VERSION,
270                 .dev_id = 0,
271                 .name = "qca4019 hw1.0",
272                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
273                 .uart_pin = 7,
274                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
275                 .otp_exe_param = 0x0010000,
276                 .continuous_frag_desc = true,
277                 .cck_rate_map_rev2 = true,
278                 .channel_counters_freq_hz = 125000,
279                 .max_probe_resp_desc_thres = 24,
280                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
281                 .tx_chain_mask = 0x3,
282                 .rx_chain_mask = 0x3,
283                 .max_spatial_stream = 2,
284                 .cal_data_len = 12064,
285                 .fw = {
286                         .dir = QCA4019_HW_1_0_FW_DIR,
287                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
288                         .board_size = QCA4019_BOARD_DATA_SZ,
289                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
290                 },
291                 .sw_decrypt_mcast_mgmt = true,
292         },
293 };
294
295 static const char *const ath10k_core_fw_feature_str[] = {
296         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
297         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
298         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
299         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
300         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
301         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
302         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
303         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
304         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
305         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
306         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
307         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
308         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
309         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
310         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
311         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
312 };
313
314 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
315                                                    size_t buf_len,
316                                                    enum ath10k_fw_features feat)
317 {
318         /* make sure that ath10k_core_fw_feature_str[] gets updated */
319         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
320                      ATH10K_FW_FEATURE_COUNT);
321
322         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
323             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
324                 return scnprintf(buf, buf_len, "bit%d", feat);
325         }
326
327         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
328 }
329
330 void ath10k_core_get_fw_features_str(struct ath10k *ar,
331                                      char *buf,
332                                      size_t buf_len)
333 {
334         unsigned int len = 0;
335         int i;
336
337         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
338                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
339                         if (len > 0)
340                                 len += scnprintf(buf + len, buf_len - len, ",");
341
342                         len += ath10k_core_get_fw_feature_str(buf + len,
343                                                               buf_len - len,
344                                                               i);
345                 }
346         }
347 }
348
349 static void ath10k_send_suspend_complete(struct ath10k *ar)
350 {
351         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
352
353         complete(&ar->target_suspend);
354 }
355
356 static int ath10k_init_configure_target(struct ath10k *ar)
357 {
358         u32 param_host;
359         int ret;
360
361         /* tell target which HTC version it is used*/
362         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
363                                  HTC_PROTOCOL_VERSION);
364         if (ret) {
365                 ath10k_err(ar, "settings HTC version failed\n");
366                 return ret;
367         }
368
369         /* set the firmware mode to STA/IBSS/AP */
370         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
371         if (ret) {
372                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
373                 return ret;
374         }
375
376         /* TODO following parameters need to be re-visited. */
377         /* num_device */
378         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
379         /* Firmware mode */
380         /* FIXME: Why FW_MODE_AP ??.*/
381         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
382         /* mac_addr_method */
383         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
384         /* firmware_bridge */
385         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
386         /* fwsubmode */
387         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
388
389         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
390         if (ret) {
391                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
392                 return ret;
393         }
394
395         /* We do all byte-swapping on the host */
396         ret = ath10k_bmi_write32(ar, hi_be, 0);
397         if (ret) {
398                 ath10k_err(ar, "setting host CPU BE mode failed\n");
399                 return ret;
400         }
401
402         /* FW descriptor/Data swap flags */
403         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
404
405         if (ret) {
406                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
407                 return ret;
408         }
409
410         /* Some devices have a special sanity check that verifies the PCI
411          * Device ID is written to this host interest var. It is known to be
412          * required to boot QCA6164.
413          */
414         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
415                                  ar->dev_id);
416         if (ret) {
417                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
418                 return ret;
419         }
420
421         return 0;
422 }
423
424 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
425                                                    const char *dir,
426                                                    const char *file)
427 {
428         char filename[100];
429         const struct firmware *fw;
430         int ret;
431
432         if (file == NULL)
433                 return ERR_PTR(-ENOENT);
434
435         if (dir == NULL)
436                 dir = ".";
437
438         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
439         ret = request_firmware(&fw, filename, ar->dev);
440         if (ret)
441                 return ERR_PTR(ret);
442
443         return fw;
444 }
445
446 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
447                                       size_t data_len)
448 {
449         u32 board_data_size = ar->hw_params.fw.board_size;
450         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
451         u32 board_ext_data_addr;
452         int ret;
453
454         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
455         if (ret) {
456                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
457                            ret);
458                 return ret;
459         }
460
461         ath10k_dbg(ar, ATH10K_DBG_BOOT,
462                    "boot push board extended data addr 0x%x\n",
463                    board_ext_data_addr);
464
465         if (board_ext_data_addr == 0)
466                 return 0;
467
468         if (data_len != (board_data_size + board_ext_data_size)) {
469                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
470                            data_len, board_data_size, board_ext_data_size);
471                 return -EINVAL;
472         }
473
474         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
475                                       data + board_data_size,
476                                       board_ext_data_size);
477         if (ret) {
478                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
479                 return ret;
480         }
481
482         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
483                                  (board_ext_data_size << 16) | 1);
484         if (ret) {
485                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
486                            ret);
487                 return ret;
488         }
489
490         return 0;
491 }
492
493 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
494                                       size_t data_len)
495 {
496         u32 board_data_size = ar->hw_params.fw.board_size;
497         u32 address;
498         int ret;
499
500         ret = ath10k_push_board_ext_data(ar, data, data_len);
501         if (ret) {
502                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
503                 goto exit;
504         }
505
506         ret = ath10k_bmi_read32(ar, hi_board_data, &address);
507         if (ret) {
508                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
509                 goto exit;
510         }
511
512         ret = ath10k_bmi_write_memory(ar, address, data,
513                                       min_t(u32, board_data_size,
514                                             data_len));
515         if (ret) {
516                 ath10k_err(ar, "could not write board data (%d)\n", ret);
517                 goto exit;
518         }
519
520         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
521         if (ret) {
522                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
523                 goto exit;
524         }
525
526 exit:
527         return ret;
528 }
529
530 static int ath10k_download_cal_file(struct ath10k *ar,
531                                     const struct firmware *file)
532 {
533         int ret;
534
535         if (!file)
536                 return -ENOENT;
537
538         if (IS_ERR(file))
539                 return PTR_ERR(file);
540
541         ret = ath10k_download_board_data(ar, file->data, file->size);
542         if (ret) {
543                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
544                 return ret;
545         }
546
547         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
548
549         return 0;
550 }
551
552 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
553 {
554         struct device_node *node;
555         int data_len;
556         void *data;
557         int ret;
558
559         node = ar->dev->of_node;
560         if (!node)
561                 /* Device Tree is optional, don't print any warnings if
562                  * there's no node for ath10k.
563                  */
564                 return -ENOENT;
565
566         if (!of_get_property(node, dt_name, &data_len)) {
567                 /* The calibration data node is optional */
568                 return -ENOENT;
569         }
570
571         if (data_len != ar->hw_params.cal_data_len) {
572                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
573                             data_len);
574                 ret = -EMSGSIZE;
575                 goto out;
576         }
577
578         data = kmalloc(data_len, GFP_KERNEL);
579         if (!data) {
580                 ret = -ENOMEM;
581                 goto out;
582         }
583
584         ret = of_property_read_u8_array(node, dt_name, data, data_len);
585         if (ret) {
586                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
587                             ret);
588                 goto out_free;
589         }
590
591         ret = ath10k_download_board_data(ar, data, data_len);
592         if (ret) {
593                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
594                             ret);
595                 goto out_free;
596         }
597
598         ret = 0;
599
600 out_free:
601         kfree(data);
602
603 out:
604         return ret;
605 }
606
607 static int ath10k_download_cal_eeprom(struct ath10k *ar)
608 {
609         size_t data_len;
610         void *data = NULL;
611         int ret;
612
613         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
614         if (ret) {
615                 if (ret != -EOPNOTSUPP)
616                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
617                                     ret);
618                 goto out_free;
619         }
620
621         ret = ath10k_download_board_data(ar, data, data_len);
622         if (ret) {
623                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
624                             ret);
625                 goto out_free;
626         }
627
628         ret = 0;
629
630 out_free:
631         kfree(data);
632
633         return ret;
634 }
635
636 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
637 {
638         u32 result, address;
639         u8 board_id, chip_id;
640         int ret;
641
642         address = ar->hw_params.patch_load_addr;
643
644         if (!ar->normal_mode_fw.fw_file.otp_data ||
645             !ar->normal_mode_fw.fw_file.otp_len) {
646                 ath10k_warn(ar,
647                             "failed to retrieve board id because of invalid otp\n");
648                 return -ENODATA;
649         }
650
651         ath10k_dbg(ar, ATH10K_DBG_BOOT,
652                    "boot upload otp to 0x%x len %zd for board id\n",
653                    address, ar->normal_mode_fw.fw_file.otp_len);
654
655         ret = ath10k_bmi_fast_download(ar, address,
656                                        ar->normal_mode_fw.fw_file.otp_data,
657                                        ar->normal_mode_fw.fw_file.otp_len);
658         if (ret) {
659                 ath10k_err(ar, "could not write otp for board id check: %d\n",
660                            ret);
661                 return ret;
662         }
663
664         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
665                                  &result);
666         if (ret) {
667                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
668                            ret);
669                 return ret;
670         }
671
672         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
673         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
674
675         ath10k_dbg(ar, ATH10K_DBG_BOOT,
676                    "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
677                    result, board_id, chip_id);
678
679         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0)
680                 return -EOPNOTSUPP;
681
682         ar->id.bmi_ids_valid = true;
683         ar->id.bmi_board_id = board_id;
684         ar->id.bmi_chip_id = chip_id;
685
686         return 0;
687 }
688
689 static int ath10k_download_and_run_otp(struct ath10k *ar)
690 {
691         u32 result, address = ar->hw_params.patch_load_addr;
692         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
693         int ret;
694
695         ret = ath10k_download_board_data(ar,
696                                          ar->running_fw->board_data,
697                                          ar->running_fw->board_len);
698         if (ret) {
699                 ath10k_err(ar, "failed to download board data: %d\n", ret);
700                 return ret;
701         }
702
703         /* OTP is optional */
704
705         if (!ar->running_fw->fw_file.otp_data ||
706             !ar->running_fw->fw_file.otp_len) {
707                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
708                             ar->running_fw->fw_file.otp_data,
709                             ar->running_fw->fw_file.otp_len);
710                 return 0;
711         }
712
713         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
714                    address, ar->running_fw->fw_file.otp_len);
715
716         ret = ath10k_bmi_fast_download(ar, address,
717                                        ar->running_fw->fw_file.otp_data,
718                                        ar->running_fw->fw_file.otp_len);
719         if (ret) {
720                 ath10k_err(ar, "could not write otp (%d)\n", ret);
721                 return ret;
722         }
723
724         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
725         if (ret) {
726                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
727                 return ret;
728         }
729
730         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
731
732         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
733                                    ar->running_fw->fw_file.fw_features)) &&
734             result != 0) {
735                 ath10k_err(ar, "otp calibration failed: %d", result);
736                 return -EINVAL;
737         }
738
739         return 0;
740 }
741
742 static int ath10k_download_fw(struct ath10k *ar)
743 {
744         u32 address, data_len;
745         const void *data;
746         int ret;
747
748         address = ar->hw_params.patch_load_addr;
749
750         data = ar->running_fw->fw_file.firmware_data;
751         data_len = ar->running_fw->fw_file.firmware_len;
752
753         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
754         if (ret) {
755                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
756                            ret);
757                 return ret;
758         }
759
760         ath10k_dbg(ar, ATH10K_DBG_BOOT,
761                    "boot uploading firmware image %pK len %d\n",
762                    data, data_len);
763
764         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
765         if (ret) {
766                 ath10k_err(ar, "failed to download firmware: %d\n",
767                            ret);
768                 return ret;
769         }
770
771         return ret;
772 }
773
774 static void ath10k_core_free_board_files(struct ath10k *ar)
775 {
776         if (!IS_ERR(ar->normal_mode_fw.board))
777                 release_firmware(ar->normal_mode_fw.board);
778
779         ar->normal_mode_fw.board = NULL;
780         ar->normal_mode_fw.board_data = NULL;
781         ar->normal_mode_fw.board_len = 0;
782 }
783
784 static void ath10k_core_free_firmware_files(struct ath10k *ar)
785 {
786         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
787                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
788
789         if (!IS_ERR(ar->cal_file))
790                 release_firmware(ar->cal_file);
791
792         if (!IS_ERR(ar->pre_cal_file))
793                 release_firmware(ar->pre_cal_file);
794
795         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
796
797         ar->normal_mode_fw.fw_file.otp_data = NULL;
798         ar->normal_mode_fw.fw_file.otp_len = 0;
799
800         ar->normal_mode_fw.fw_file.firmware = NULL;
801         ar->normal_mode_fw.fw_file.firmware_data = NULL;
802         ar->normal_mode_fw.fw_file.firmware_len = 0;
803
804         ar->cal_file = NULL;
805         ar->pre_cal_file = NULL;
806 }
807
808 static int ath10k_fetch_cal_file(struct ath10k *ar)
809 {
810         char filename[100];
811
812         /* pre-cal-<bus>-<id>.bin */
813         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
814                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
815
816         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
817         if (!IS_ERR(ar->pre_cal_file))
818                 goto success;
819
820         /* cal-<bus>-<id>.bin */
821         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
822                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
823
824         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
825         if (IS_ERR(ar->cal_file))
826                 /* calibration file is optional, don't print any warnings */
827                 return PTR_ERR(ar->cal_file);
828 success:
829         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
830                    ATH10K_FW_DIR, filename);
831
832         return 0;
833 }
834
835 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
836 {
837         if (!ar->hw_params.fw.board) {
838                 ath10k_err(ar, "failed to find board file fw entry\n");
839                 return -EINVAL;
840         }
841
842         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
843                                                         ar->hw_params.fw.dir,
844                                                         ar->hw_params.fw.board);
845         if (IS_ERR(ar->normal_mode_fw.board))
846                 return PTR_ERR(ar->normal_mode_fw.board);
847
848         ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
849         ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
850
851         return 0;
852 }
853
854 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
855                                          const void *buf, size_t buf_len,
856                                          const char *boardname)
857 {
858         const struct ath10k_fw_ie *hdr;
859         bool name_match_found;
860         int ret, board_ie_id;
861         size_t board_ie_len;
862         const void *board_ie_data;
863
864         name_match_found = false;
865
866         /* go through ATH10K_BD_IE_BOARD_ elements */
867         while (buf_len > sizeof(struct ath10k_fw_ie)) {
868                 hdr = buf;
869                 board_ie_id = le32_to_cpu(hdr->id);
870                 board_ie_len = le32_to_cpu(hdr->len);
871                 board_ie_data = hdr->data;
872
873                 buf_len -= sizeof(*hdr);
874                 buf += sizeof(*hdr);
875
876                 if (buf_len < ALIGN(board_ie_len, 4)) {
877                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
878                                    buf_len, ALIGN(board_ie_len, 4));
879                         ret = -EINVAL;
880                         goto out;
881                 }
882
883                 switch (board_ie_id) {
884                 case ATH10K_BD_IE_BOARD_NAME:
885                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
886                                         board_ie_data, board_ie_len);
887
888                         if (board_ie_len != strlen(boardname))
889                                 break;
890
891                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
892                         if (ret)
893                                 break;
894
895                         name_match_found = true;
896                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
897                                    "boot found match for name '%s'",
898                                    boardname);
899                         break;
900                 case ATH10K_BD_IE_BOARD_DATA:
901                         if (!name_match_found)
902                                 /* no match found */
903                                 break;
904
905                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
906                                    "boot found board data for '%s'",
907                                    boardname);
908
909                         ar->normal_mode_fw.board_data = board_ie_data;
910                         ar->normal_mode_fw.board_len = board_ie_len;
911
912                         ret = 0;
913                         goto out;
914                 default:
915                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
916                                     board_ie_id);
917                         break;
918                 }
919
920                 /* jump over the padding */
921                 board_ie_len = ALIGN(board_ie_len, 4);
922
923                 buf_len -= board_ie_len;
924                 buf += board_ie_len;
925         }
926
927         /* no match found */
928         ret = -ENOENT;
929
930 out:
931         return ret;
932 }
933
934 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
935                                               const char *boardname,
936                                               const char *filename)
937 {
938         size_t len, magic_len, ie_len;
939         struct ath10k_fw_ie *hdr;
940         const u8 *data;
941         int ret, ie_id;
942
943         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
944                                                         ar->hw_params.fw.dir,
945                                                         filename);
946         if (IS_ERR(ar->normal_mode_fw.board))
947                 return PTR_ERR(ar->normal_mode_fw.board);
948
949         data = ar->normal_mode_fw.board->data;
950         len = ar->normal_mode_fw.board->size;
951
952         /* magic has extra null byte padded */
953         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
954         if (len < magic_len) {
955                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
956                            ar->hw_params.fw.dir, filename, len);
957                 ret = -EINVAL;
958                 goto err;
959         }
960
961         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
962                 ath10k_err(ar, "found invalid board magic\n");
963                 ret = -EINVAL;
964                 goto err;
965         }
966
967         /* magic is padded to 4 bytes */
968         magic_len = ALIGN(magic_len, 4);
969         if (len < magic_len) {
970                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
971                            ar->hw_params.fw.dir, filename, len);
972                 ret = -EINVAL;
973                 goto err;
974         }
975
976         data += magic_len;
977         len -= magic_len;
978
979         while (len > sizeof(struct ath10k_fw_ie)) {
980                 hdr = (struct ath10k_fw_ie *)data;
981                 ie_id = le32_to_cpu(hdr->id);
982                 ie_len = le32_to_cpu(hdr->len);
983
984                 len -= sizeof(*hdr);
985                 data = hdr->data;
986
987                 if (len < ALIGN(ie_len, 4)) {
988                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
989                                    ie_id, ie_len, len);
990                         ret = -EINVAL;
991                         goto err;
992                 }
993
994                 switch (ie_id) {
995                 case ATH10K_BD_IE_BOARD:
996                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
997                                                             boardname);
998                         if (ret == -ENOENT)
999                                 /* no match found, continue */
1000                                 break;
1001                         else if (ret)
1002                                 /* there was an error, bail out */
1003                                 goto err;
1004
1005                         /* board data found */
1006                         goto out;
1007                 }
1008
1009                 /* jump over the padding */
1010                 ie_len = ALIGN(ie_len, 4);
1011
1012                 len -= ie_len;
1013                 data += ie_len;
1014         }
1015
1016 out:
1017         if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
1018                 ath10k_err(ar,
1019                            "failed to fetch board data for %s from %s/%s\n",
1020                            boardname, ar->hw_params.fw.dir, filename);
1021                 ret = -ENODATA;
1022                 goto err;
1023         }
1024
1025         return 0;
1026
1027 err:
1028         ath10k_core_free_board_files(ar);
1029         return ret;
1030 }
1031
1032 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1033                                          size_t name_len)
1034 {
1035         if (ar->id.bmi_ids_valid) {
1036                 scnprintf(name, name_len,
1037                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
1038                           ath10k_bus_str(ar->hif.bus),
1039                           ar->id.bmi_chip_id,
1040                           ar->id.bmi_board_id);
1041                 goto out;
1042         }
1043
1044         scnprintf(name, name_len,
1045                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x",
1046                   ath10k_bus_str(ar->hif.bus),
1047                   ar->id.vendor, ar->id.device,
1048                   ar->id.subsystem_vendor, ar->id.subsystem_device);
1049
1050 out:
1051         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1052
1053         return 0;
1054 }
1055
1056 static int ath10k_core_fetch_board_file(struct ath10k *ar)
1057 {
1058         char boardname[100];
1059         int ret;
1060
1061         ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
1062         if (ret) {
1063                 ath10k_err(ar, "failed to create board name: %d", ret);
1064                 return ret;
1065         }
1066
1067         ar->bd_api = 2;
1068         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1069                                                  ATH10K_BOARD_API2_FILE);
1070         if (!ret)
1071                 goto success;
1072
1073         ar->bd_api = 1;
1074         ret = ath10k_core_fetch_board_data_api_1(ar);
1075         if (ret) {
1076                 ath10k_err(ar, "failed to fetch board data\n");
1077                 return ret;
1078         }
1079
1080 success:
1081         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1082         return 0;
1083 }
1084
1085 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1086                                      struct ath10k_fw_file *fw_file)
1087 {
1088         size_t magic_len, len, ie_len;
1089         int ie_id, i, index, bit, ret;
1090         struct ath10k_fw_ie *hdr;
1091         const u8 *data;
1092         __le32 *timestamp, *version;
1093
1094         /* first fetch the firmware file (firmware-*.bin) */
1095         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1096                                                  name);
1097         if (IS_ERR(fw_file->firmware)) {
1098                 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
1099                            ar->hw_params.fw.dir, name,
1100                            PTR_ERR(fw_file->firmware));
1101                 return PTR_ERR(fw_file->firmware);
1102         }
1103
1104         data = fw_file->firmware->data;
1105         len = fw_file->firmware->size;
1106
1107         /* magic also includes the null byte, check that as well */
1108         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1109
1110         if (len < magic_len) {
1111                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1112                            ar->hw_params.fw.dir, name, len);
1113                 ret = -EINVAL;
1114                 goto err;
1115         }
1116
1117         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1118                 ath10k_err(ar, "invalid firmware magic\n");
1119                 ret = -EINVAL;
1120                 goto err;
1121         }
1122
1123         /* jump over the padding */
1124         magic_len = ALIGN(magic_len, 4);
1125
1126         len -= magic_len;
1127         data += magic_len;
1128
1129         /* loop elements */
1130         while (len > sizeof(struct ath10k_fw_ie)) {
1131                 hdr = (struct ath10k_fw_ie *)data;
1132
1133                 ie_id = le32_to_cpu(hdr->id);
1134                 ie_len = le32_to_cpu(hdr->len);
1135
1136                 len -= sizeof(*hdr);
1137                 data += sizeof(*hdr);
1138
1139                 if (len < ie_len) {
1140                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1141                                    ie_id, len, ie_len);
1142                         ret = -EINVAL;
1143                         goto err;
1144                 }
1145
1146                 switch (ie_id) {
1147                 case ATH10K_FW_IE_FW_VERSION:
1148                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1149                                 break;
1150
1151                         memcpy(fw_file->fw_version, data, ie_len);
1152                         fw_file->fw_version[ie_len] = '\0';
1153
1154                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1155                                    "found fw version %s\n",
1156                                     fw_file->fw_version);
1157                         break;
1158                 case ATH10K_FW_IE_TIMESTAMP:
1159                         if (ie_len != sizeof(u32))
1160                                 break;
1161
1162                         timestamp = (__le32 *)data;
1163
1164                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1165                                    le32_to_cpup(timestamp));
1166                         break;
1167                 case ATH10K_FW_IE_FEATURES:
1168                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1169                                    "found firmware features ie (%zd B)\n",
1170                                    ie_len);
1171
1172                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1173                                 index = i / 8;
1174                                 bit = i % 8;
1175
1176                                 if (index == ie_len)
1177                                         break;
1178
1179                                 if (data[index] & (1 << bit)) {
1180                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1181                                                    "Enabling feature bit: %i\n",
1182                                                    i);
1183                                         __set_bit(i, fw_file->fw_features);
1184                                 }
1185                         }
1186
1187                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1188                                         fw_file->fw_features,
1189                                         sizeof(fw_file->fw_features));
1190                         break;
1191                 case ATH10K_FW_IE_FW_IMAGE:
1192                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1193                                    "found fw image ie (%zd B)\n",
1194                                    ie_len);
1195
1196                         fw_file->firmware_data = data;
1197                         fw_file->firmware_len = ie_len;
1198
1199                         break;
1200                 case ATH10K_FW_IE_OTP_IMAGE:
1201                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1202                                    "found otp image ie (%zd B)\n",
1203                                    ie_len);
1204
1205                         fw_file->otp_data = data;
1206                         fw_file->otp_len = ie_len;
1207
1208                         break;
1209                 case ATH10K_FW_IE_WMI_OP_VERSION:
1210                         if (ie_len != sizeof(u32))
1211                                 break;
1212
1213                         version = (__le32 *)data;
1214
1215                         fw_file->wmi_op_version = le32_to_cpup(version);
1216
1217                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1218                                    fw_file->wmi_op_version);
1219                         break;
1220                 case ATH10K_FW_IE_HTT_OP_VERSION:
1221                         if (ie_len != sizeof(u32))
1222                                 break;
1223
1224                         version = (__le32 *)data;
1225
1226                         fw_file->htt_op_version = le32_to_cpup(version);
1227
1228                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1229                                    fw_file->htt_op_version);
1230                         break;
1231                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1232                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1233                                    "found fw code swap image ie (%zd B)\n",
1234                                    ie_len);
1235                         fw_file->codeswap_data = data;
1236                         fw_file->codeswap_len = ie_len;
1237                         break;
1238                 default:
1239                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1240                                     le32_to_cpu(hdr->id));
1241                         break;
1242                 }
1243
1244                 /* jump over the padding */
1245                 ie_len = ALIGN(ie_len, 4);
1246
1247                 len -= ie_len;
1248                 data += ie_len;
1249         }
1250
1251         if (!fw_file->firmware_data ||
1252             !fw_file->firmware_len) {
1253                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1254                             ar->hw_params.fw.dir, name);
1255                 ret = -ENOMEDIUM;
1256                 goto err;
1257         }
1258
1259         return 0;
1260
1261 err:
1262         ath10k_core_free_firmware_files(ar);
1263         return ret;
1264 }
1265
1266 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1267 {
1268         int ret;
1269
1270         /* calibration file is optional, don't check for any errors */
1271         ath10k_fetch_cal_file(ar);
1272
1273         ar->fw_api = 5;
1274         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1275
1276         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE,
1277                                                &ar->normal_mode_fw.fw_file);
1278         if (ret == 0)
1279                 goto success;
1280
1281         ar->fw_api = 4;
1282         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1283
1284         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE,
1285                                                &ar->normal_mode_fw.fw_file);
1286         if (ret == 0)
1287                 goto success;
1288
1289         ar->fw_api = 3;
1290         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1291
1292         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE,
1293                                                &ar->normal_mode_fw.fw_file);
1294         if (ret == 0)
1295                 goto success;
1296
1297         ar->fw_api = 2;
1298         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1299
1300         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE,
1301                                                &ar->normal_mode_fw.fw_file);
1302         if (ret)
1303                 return ret;
1304
1305 success:
1306         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1307
1308         return 0;
1309 }
1310
1311 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1312 {
1313         int ret;
1314
1315         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1316         if (ret == 0) {
1317                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1318                 goto success;
1319         }
1320
1321         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1322                    "boot did not find a pre calibration file, try DT next: %d\n",
1323                    ret);
1324
1325         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1326         if (ret) {
1327                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1328                            "unable to load pre cal data from DT: %d\n", ret);
1329                 return ret;
1330         }
1331         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1332
1333 success:
1334         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1335                    ath10k_cal_mode_str(ar->cal_mode));
1336
1337         return 0;
1338 }
1339
1340 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1341 {
1342         int ret;
1343
1344         ret = ath10k_core_pre_cal_download(ar);
1345         if (ret) {
1346                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1347                            "failed to load pre cal data: %d\n", ret);
1348                 return ret;
1349         }
1350
1351         ret = ath10k_core_get_board_id_from_otp(ar);
1352         if (ret) {
1353                 ath10k_err(ar, "failed to get board id: %d\n", ret);
1354                 return ret;
1355         }
1356
1357         ret = ath10k_download_and_run_otp(ar);
1358         if (ret) {
1359                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1360                 return ret;
1361         }
1362
1363         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1364                    "pre cal configuration done successfully\n");
1365
1366         return 0;
1367 }
1368
1369 static int ath10k_download_cal_data(struct ath10k *ar)
1370 {
1371         int ret;
1372
1373         ret = ath10k_core_pre_cal_config(ar);
1374         if (ret == 0)
1375                 return 0;
1376
1377         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1378                    "pre cal download procedure failed, try cal file: %d\n",
1379                    ret);
1380
1381         ret = ath10k_download_cal_file(ar, ar->cal_file);
1382         if (ret == 0) {
1383                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1384                 goto done;
1385         }
1386
1387         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1388                    "boot did not find a calibration file, try DT next: %d\n",
1389                    ret);
1390
1391         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1392         if (ret == 0) {
1393                 ar->cal_mode = ATH10K_CAL_MODE_DT;
1394                 goto done;
1395         }
1396
1397         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1398                    "boot did not find DT entry, try target EEPROM next: %d\n",
1399                    ret);
1400
1401         ret = ath10k_download_cal_eeprom(ar);
1402         if (ret == 0) {
1403                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1404                 goto done;
1405         }
1406
1407         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1408                    "boot did not find target EEPROM entry, try OTP next: %d\n",
1409                    ret);
1410
1411         ret = ath10k_download_and_run_otp(ar);
1412         if (ret) {
1413                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1414                 return ret;
1415         }
1416
1417         ar->cal_mode = ATH10K_CAL_MODE_OTP;
1418
1419 done:
1420         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1421                    ath10k_cal_mode_str(ar->cal_mode));
1422         return 0;
1423 }
1424
1425 static int ath10k_init_uart(struct ath10k *ar)
1426 {
1427         int ret;
1428
1429         /*
1430          * Explicitly setting UART prints to zero as target turns it on
1431          * based on scratch registers.
1432          */
1433         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1434         if (ret) {
1435                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1436                 return ret;
1437         }
1438
1439         if (!uart_print)
1440                 return 0;
1441
1442         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1443         if (ret) {
1444                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1445                 return ret;
1446         }
1447
1448         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1449         if (ret) {
1450                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1451                 return ret;
1452         }
1453
1454         /* Set the UART baud rate to 19200. */
1455         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1456         if (ret) {
1457                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1458                 return ret;
1459         }
1460
1461         ath10k_info(ar, "UART prints enabled\n");
1462         return 0;
1463 }
1464
1465 static int ath10k_init_hw_params(struct ath10k *ar)
1466 {
1467         const struct ath10k_hw_params *uninitialized_var(hw_params);
1468         int i;
1469
1470         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1471                 hw_params = &ath10k_hw_params_list[i];
1472
1473                 if (hw_params->id == ar->target_version &&
1474                     hw_params->dev_id == ar->dev_id)
1475                         break;
1476         }
1477
1478         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1479                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1480                            ar->target_version);
1481                 return -EINVAL;
1482         }
1483
1484         ar->hw_params = *hw_params;
1485
1486         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1487                    ar->hw_params.name, ar->target_version);
1488
1489         return 0;
1490 }
1491
1492 static void ath10k_core_restart(struct work_struct *work)
1493 {
1494         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1495
1496         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1497
1498         /* Place a barrier to make sure the compiler doesn't reorder
1499          * CRASH_FLUSH and calling other functions.
1500          */
1501         barrier();
1502
1503         ieee80211_stop_queues(ar->hw);
1504         ath10k_drain_tx(ar);
1505         complete(&ar->scan.started);
1506         complete(&ar->scan.completed);
1507         complete(&ar->scan.on_channel);
1508         complete(&ar->offchan_tx_completed);
1509         complete(&ar->install_key_done);
1510         complete(&ar->vdev_setup_done);
1511         complete(&ar->thermal.wmi_sync);
1512         complete(&ar->bss_survey_done);
1513         wake_up(&ar->htt.empty_tx_wq);
1514         wake_up(&ar->wmi.tx_credits_wq);
1515         wake_up(&ar->peer_mapping_wq);
1516
1517         mutex_lock(&ar->conf_mutex);
1518
1519         switch (ar->state) {
1520         case ATH10K_STATE_ON:
1521                 ar->state = ATH10K_STATE_RESTARTING;
1522                 ath10k_hif_stop(ar);
1523                 ath10k_scan_finish(ar);
1524                 ieee80211_restart_hw(ar->hw);
1525                 break;
1526         case ATH10K_STATE_OFF:
1527                 /* this can happen if driver is being unloaded
1528                  * or if the crash happens during FW probing */
1529                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1530                 break;
1531         case ATH10K_STATE_RESTARTING:
1532                 /* hw restart might be requested from multiple places */
1533                 break;
1534         case ATH10K_STATE_RESTARTED:
1535                 ar->state = ATH10K_STATE_WEDGED;
1536                 /* fall through */
1537         case ATH10K_STATE_WEDGED:
1538                 ath10k_warn(ar, "device is wedged, will not restart\n");
1539                 break;
1540         case ATH10K_STATE_UTF:
1541                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1542                 break;
1543         }
1544
1545         mutex_unlock(&ar->conf_mutex);
1546 }
1547
1548 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1549 {
1550         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1551
1552         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1553             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1554                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1555                 return -EINVAL;
1556         }
1557
1558         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1559                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1560                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1561                 return -EINVAL;
1562         }
1563
1564         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1565         switch (ath10k_cryptmode_param) {
1566         case ATH10K_CRYPT_MODE_HW:
1567                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1568                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1569                 break;
1570         case ATH10K_CRYPT_MODE_SW:
1571                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1572                               fw_file->fw_features)) {
1573                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1574                         return -EINVAL;
1575                 }
1576
1577                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1578                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1579                 break;
1580         default:
1581                 ath10k_info(ar, "invalid cryptmode: %d\n",
1582                             ath10k_cryptmode_param);
1583                 return -EINVAL;
1584         }
1585
1586         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1587         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1588
1589         if (rawmode) {
1590                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1591                               fw_file->fw_features)) {
1592                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
1593                         return -EINVAL;
1594                 }
1595                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1596         }
1597
1598         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1599                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1600
1601                 /* Workaround:
1602                  *
1603                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1604                  * and causes enormous performance issues (malformed frames,
1605                  * etc).
1606                  *
1607                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
1608                  * albeit a bit slower compared to regular operation.
1609                  */
1610                 ar->htt.max_num_amsdu = 1;
1611         }
1612
1613         /* Backwards compatibility for firmwares without
1614          * ATH10K_FW_IE_WMI_OP_VERSION.
1615          */
1616         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1617                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1618                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1619                                      fw_file->fw_features))
1620                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1621                         else
1622                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1623                 } else {
1624                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1625                 }
1626         }
1627
1628         switch (fw_file->wmi_op_version) {
1629         case ATH10K_FW_WMI_OP_VERSION_MAIN:
1630                 ar->max_num_peers = TARGET_NUM_PEERS;
1631                 ar->max_num_stations = TARGET_NUM_STATIONS;
1632                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1633                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1634                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1635                         WMI_STAT_PEER;
1636                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1637                 break;
1638         case ATH10K_FW_WMI_OP_VERSION_10_1:
1639         case ATH10K_FW_WMI_OP_VERSION_10_2:
1640         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1641                 if (ath10k_peer_stats_enabled(ar)) {
1642                         ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1643                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1644                 } else {
1645                         ar->max_num_peers = TARGET_10X_NUM_PEERS;
1646                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1647                 }
1648                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1649                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1650                 ar->fw_stats_req_mask = WMI_STAT_PEER;
1651                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1652                 break;
1653         case ATH10K_FW_WMI_OP_VERSION_TLV:
1654                 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1655                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1656                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1657                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1658                 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1659                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1660                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1661                         WMI_STAT_PEER;
1662                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1663                 break;
1664         case ATH10K_FW_WMI_OP_VERSION_10_4:
1665                 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1666                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1667                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1668                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1669                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1670                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1671                                         WMI_10_4_STAT_PEER_EXTD;
1672                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
1673
1674                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1675                              fw_file->fw_features))
1676                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1677                 else
1678                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1679                 break;
1680         case ATH10K_FW_WMI_OP_VERSION_UNSET:
1681         case ATH10K_FW_WMI_OP_VERSION_MAX:
1682                 WARN_ON(1);
1683                 return -EINVAL;
1684         }
1685
1686         /* Backwards compatibility for firmwares without
1687          * ATH10K_FW_IE_HTT_OP_VERSION.
1688          */
1689         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1690                 switch (fw_file->wmi_op_version) {
1691                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1692                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1693                         break;
1694                 case ATH10K_FW_WMI_OP_VERSION_10_1:
1695                 case ATH10K_FW_WMI_OP_VERSION_10_2:
1696                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1697                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1698                         break;
1699                 case ATH10K_FW_WMI_OP_VERSION_TLV:
1700                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1701                         break;
1702                 case ATH10K_FW_WMI_OP_VERSION_10_4:
1703                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1704                 case ATH10K_FW_WMI_OP_VERSION_MAX:
1705                         ath10k_err(ar, "htt op version not found from fw meta data");
1706                         return -EINVAL;
1707                 }
1708         }
1709
1710         return 0;
1711 }
1712
1713 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
1714 {
1715         int ret;
1716         int vdev_id;
1717         int vdev_type;
1718         int vdev_subtype;
1719         const u8 *vdev_addr;
1720
1721         vdev_id = 0;
1722         vdev_type = WMI_VDEV_TYPE_STA;
1723         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
1724         vdev_addr = ar->mac_addr;
1725
1726         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
1727                                      vdev_addr);
1728         if (ret) {
1729                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
1730                 return ret;
1731         }
1732
1733         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
1734         if (ret) {
1735                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
1736                 return ret;
1737         }
1738
1739         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
1740          * serialized properly implicitly.
1741          *
1742          * Moreover (most) WMI commands have no explicit acknowledges. It is
1743          * possible to infer it implicitly by poking firmware with echo
1744          * command - getting a reply means all preceding comments have been
1745          * (mostly) processed.
1746          *
1747          * In case of vdev create/delete this is sufficient.
1748          *
1749          * Without this it's possible to end up with a race when HTT Rx ring is
1750          * started before vdev create/delete hack is complete allowing a short
1751          * window of opportunity to receive (and Tx ACK) a bunch of frames.
1752          */
1753         ret = ath10k_wmi_barrier(ar);
1754         if (ret) {
1755                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
1756                 return ret;
1757         }
1758
1759         return 0;
1760 }
1761
1762 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1763                       const struct ath10k_fw_components *fw)
1764 {
1765         int status;
1766         u32 val;
1767
1768         lockdep_assert_held(&ar->conf_mutex);
1769
1770         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1771
1772         ar->running_fw = fw;
1773
1774         ath10k_bmi_start(ar);
1775
1776         if (ath10k_init_configure_target(ar)) {
1777                 status = -EINVAL;
1778                 goto err;
1779         }
1780
1781         status = ath10k_download_cal_data(ar);
1782         if (status)
1783                 goto err;
1784
1785         /* Some of of qca988x solutions are having global reset issue
1786          * during target initialization. Bypassing PLL setting before
1787          * downloading firmware and letting the SoC run on REF_CLK is
1788          * fixing the problem. Corresponding firmware change is also needed
1789          * to set the clock source once the target is initialized.
1790          */
1791         if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1792                      ar->running_fw->fw_file.fw_features)) {
1793                 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1794                 if (status) {
1795                         ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1796                                    status);
1797                         goto err;
1798                 }
1799         }
1800
1801         status = ath10k_download_fw(ar);
1802         if (status)
1803                 goto err;
1804
1805         status = ath10k_init_uart(ar);
1806         if (status)
1807                 goto err;
1808
1809         ar->htc.htc_ops.target_send_suspend_complete =
1810                 ath10k_send_suspend_complete;
1811
1812         status = ath10k_htc_init(ar);
1813         if (status) {
1814                 ath10k_err(ar, "could not init HTC (%d)\n", status);
1815                 goto err;
1816         }
1817
1818         status = ath10k_bmi_done(ar);
1819         if (status)
1820                 goto err;
1821
1822         status = ath10k_wmi_attach(ar);
1823         if (status) {
1824                 ath10k_err(ar, "WMI attach failed: %d\n", status);
1825                 goto err;
1826         }
1827
1828         status = ath10k_htt_init(ar);
1829         if (status) {
1830                 ath10k_err(ar, "failed to init htt: %d\n", status);
1831                 goto err_wmi_detach;
1832         }
1833
1834         status = ath10k_htt_tx_alloc(&ar->htt);
1835         if (status) {
1836                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1837                 goto err_wmi_detach;
1838         }
1839
1840         status = ath10k_htt_rx_alloc(&ar->htt);
1841         if (status) {
1842                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1843                 goto err_htt_tx_detach;
1844         }
1845
1846         status = ath10k_hif_start(ar);
1847         if (status) {
1848                 ath10k_err(ar, "could not start HIF: %d\n", status);
1849                 goto err_htt_rx_detach;
1850         }
1851
1852         status = ath10k_htc_wait_target(&ar->htc);
1853         if (status) {
1854                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1855                 goto err_hif_stop;
1856         }
1857
1858         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1859                 status = ath10k_htt_connect(&ar->htt);
1860                 if (status) {
1861                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
1862                         goto err_hif_stop;
1863                 }
1864         }
1865
1866         status = ath10k_wmi_connect(ar);
1867         if (status) {
1868                 ath10k_err(ar, "could not connect wmi: %d\n", status);
1869                 goto err_hif_stop;
1870         }
1871
1872         status = ath10k_htc_start(&ar->htc);
1873         if (status) {
1874                 ath10k_err(ar, "failed to start htc: %d\n", status);
1875                 goto err_hif_stop;
1876         }
1877
1878         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1879                 status = ath10k_wmi_wait_for_service_ready(ar);
1880                 if (status) {
1881                         ath10k_warn(ar, "wmi service ready event not received");
1882                         goto err_hif_stop;
1883                 }
1884         }
1885
1886         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
1887                    ar->hw->wiphy->fw_version);
1888
1889         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) {
1890                 val = 0;
1891                 if (ath10k_peer_stats_enabled(ar))
1892                         val = WMI_10_4_PEER_STATS;
1893
1894                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
1895                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
1896
1897                 /* 10.4 firmware supports BT-Coex without reloading firmware
1898                  * via pdev param. To support Bluetooth coexistence pdev param,
1899                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
1900                  * enabled always.
1901                  */
1902                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
1903                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
1904                              ar->running_fw->fw_file.fw_features))
1905                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
1906
1907                 status = ath10k_mac_ext_resource_config(ar, val);
1908                 if (status) {
1909                         ath10k_err(ar,
1910                                    "failed to send ext resource cfg command : %d\n",
1911                                    status);
1912                         goto err_hif_stop;
1913                 }
1914         }
1915
1916         status = ath10k_wmi_cmd_init(ar);
1917         if (status) {
1918                 ath10k_err(ar, "could not send WMI init command (%d)\n",
1919                            status);
1920                 goto err_hif_stop;
1921         }
1922
1923         status = ath10k_wmi_wait_for_unified_ready(ar);
1924         if (status) {
1925                 ath10k_err(ar, "wmi unified ready event not received\n");
1926                 goto err_hif_stop;
1927         }
1928
1929         /* Some firmware revisions do not properly set up hardware rx filter
1930          * registers.
1931          *
1932          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
1933          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
1934          * any frames that matches MAC_PCU_RX_FILTER which is also
1935          * misconfigured to accept anything.
1936          *
1937          * The ADDR1 is programmed using internal firmware structure field and
1938          * can't be (easily/sanely) reached from the driver explicitly. It is
1939          * possible to implicitly make it correct by creating a dummy vdev and
1940          * then deleting it.
1941          */
1942         status = ath10k_core_reset_rx_filter(ar);
1943         if (status) {
1944                 ath10k_err(ar, "failed to reset rx filter: %d\n", status);
1945                 goto err_hif_stop;
1946         }
1947
1948         /* If firmware indicates Full Rx Reorder support it must be used in a
1949          * slightly different manner. Let HTT code know.
1950          */
1951         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1952                                                 ar->wmi.svc_map));
1953
1954         status = ath10k_htt_rx_ring_refill(ar);
1955         if (status) {
1956                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1957                 goto err_hif_stop;
1958         }
1959
1960         ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
1961
1962         INIT_LIST_HEAD(&ar->arvifs);
1963
1964         /* we don't care about HTT in UTF mode */
1965         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1966                 status = ath10k_htt_setup(&ar->htt);
1967                 if (status) {
1968                         ath10k_err(ar, "failed to setup htt: %d\n", status);
1969                         goto err_hif_stop;
1970                 }
1971         }
1972
1973         status = ath10k_debug_start(ar);
1974         if (status)
1975                 goto err_hif_stop;
1976
1977         return 0;
1978
1979 err_hif_stop:
1980         ath10k_hif_stop(ar);
1981 err_htt_rx_detach:
1982         ath10k_htt_rx_free(&ar->htt);
1983 err_htt_tx_detach:
1984         ath10k_htt_tx_free(&ar->htt);
1985 err_wmi_detach:
1986         ath10k_wmi_detach(ar);
1987 err:
1988         return status;
1989 }
1990 EXPORT_SYMBOL(ath10k_core_start);
1991
1992 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1993 {
1994         int ret;
1995         unsigned long time_left;
1996
1997         reinit_completion(&ar->target_suspend);
1998
1999         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2000         if (ret) {
2001                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2002                 return ret;
2003         }
2004
2005         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2006
2007         if (!time_left) {
2008                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2009                 return -ETIMEDOUT;
2010         }
2011
2012         return 0;
2013 }
2014
2015 void ath10k_core_stop(struct ath10k *ar)
2016 {
2017         lockdep_assert_held(&ar->conf_mutex);
2018         ath10k_debug_stop(ar);
2019
2020         /* try to suspend target */
2021         if (ar->state != ATH10K_STATE_RESTARTING &&
2022             ar->state != ATH10K_STATE_UTF)
2023                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2024
2025         ath10k_hif_stop(ar);
2026         ath10k_htt_tx_free(&ar->htt);
2027         ath10k_htt_rx_free(&ar->htt);
2028         ath10k_wmi_detach(ar);
2029 }
2030 EXPORT_SYMBOL(ath10k_core_stop);
2031
2032 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2033  * order to know what hw capabilities should be advertised to mac80211 it is
2034  * necessary to load the firmware (and tear it down immediately since start
2035  * hook will try to init it again) before registering */
2036 static int ath10k_core_probe_fw(struct ath10k *ar)
2037 {
2038         struct bmi_target_info target_info;
2039         int ret = 0;
2040
2041         ret = ath10k_hif_power_up(ar);
2042         if (ret) {
2043                 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
2044                 return ret;
2045         }
2046
2047         memset(&target_info, 0, sizeof(target_info));
2048         ret = ath10k_bmi_get_target_info(ar, &target_info);
2049         if (ret) {
2050                 ath10k_err(ar, "could not get target info (%d)\n", ret);
2051                 goto err_power_down;
2052         }
2053
2054         ar->target_version = target_info.version;
2055         ar->hw->wiphy->hw_version = target_info.version;
2056
2057         ret = ath10k_init_hw_params(ar);
2058         if (ret) {
2059                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2060                 goto err_power_down;
2061         }
2062
2063         ret = ath10k_core_fetch_firmware_files(ar);
2064         if (ret) {
2065                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2066                 goto err_power_down;
2067         }
2068
2069         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2070                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
2071         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2072                sizeof(ar->hw->wiphy->fw_version));
2073
2074         ath10k_debug_print_hwfw_info(ar);
2075
2076         ret = ath10k_core_pre_cal_download(ar);
2077         if (ret) {
2078                 /* pre calibration data download is not necessary
2079                  * for all the chipsets. Ignore failures and continue.
2080                  */
2081                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2082                            "could not load pre cal data: %d\n", ret);
2083         }
2084
2085         ret = ath10k_core_get_board_id_from_otp(ar);
2086         if (ret && ret != -EOPNOTSUPP) {
2087                 ath10k_err(ar, "failed to get board id from otp: %d\n",
2088                            ret);
2089                 goto err_free_firmware_files;
2090         }
2091
2092         ret = ath10k_core_fetch_board_file(ar);
2093         if (ret) {
2094                 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2095                 goto err_free_firmware_files;
2096         }
2097
2098         ath10k_debug_print_board_info(ar);
2099
2100         ret = ath10k_core_init_firmware_features(ar);
2101         if (ret) {
2102                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2103                            ret);
2104                 goto err_free_firmware_files;
2105         }
2106
2107         ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file);
2108         if (ret) {
2109                 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2110                            ret);
2111                 goto err_free_firmware_files;
2112         }
2113
2114         mutex_lock(&ar->conf_mutex);
2115
2116         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2117                                 &ar->normal_mode_fw);
2118         if (ret) {
2119                 ath10k_err(ar, "could not init core (%d)\n", ret);
2120                 goto err_unlock;
2121         }
2122
2123         ath10k_debug_print_boot_info(ar);
2124         ath10k_core_stop(ar);
2125
2126         mutex_unlock(&ar->conf_mutex);
2127
2128         ath10k_hif_power_down(ar);
2129         return 0;
2130
2131 err_unlock:
2132         mutex_unlock(&ar->conf_mutex);
2133
2134 err_free_firmware_files:
2135         ath10k_core_free_firmware_files(ar);
2136
2137 err_power_down:
2138         ath10k_hif_power_down(ar);
2139
2140         return ret;
2141 }
2142
2143 static void ath10k_core_register_work(struct work_struct *work)
2144 {
2145         struct ath10k *ar = container_of(work, struct ath10k, register_work);
2146         int status;
2147
2148         status = ath10k_core_probe_fw(ar);
2149         if (status) {
2150                 ath10k_err(ar, "could not probe fw (%d)\n", status);
2151                 goto err;
2152         }
2153
2154         status = ath10k_mac_register(ar);
2155         if (status) {
2156                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2157                 goto err_release_fw;
2158         }
2159
2160         status = ath10k_debug_register(ar);
2161         if (status) {
2162                 ath10k_err(ar, "unable to initialize debugfs\n");
2163                 goto err_unregister_mac;
2164         }
2165
2166         status = ath10k_spectral_create(ar);
2167         if (status) {
2168                 ath10k_err(ar, "failed to initialize spectral\n");
2169                 goto err_debug_destroy;
2170         }
2171
2172         status = ath10k_thermal_register(ar);
2173         if (status) {
2174                 ath10k_err(ar, "could not register thermal device: %d\n",
2175                            status);
2176                 goto err_spectral_destroy;
2177         }
2178
2179         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2180         return;
2181
2182 err_spectral_destroy:
2183         ath10k_spectral_destroy(ar);
2184 err_debug_destroy:
2185         ath10k_debug_destroy(ar);
2186 err_unregister_mac:
2187         ath10k_mac_unregister(ar);
2188 err_release_fw:
2189         ath10k_core_free_firmware_files(ar);
2190 err:
2191         /* TODO: It's probably a good idea to release device from the driver
2192          * but calling device_release_driver() here will cause a deadlock.
2193          */
2194         return;
2195 }
2196
2197 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2198 {
2199         ar->chip_id = chip_id;
2200         queue_work(ar->workqueue, &ar->register_work);
2201
2202         return 0;
2203 }
2204 EXPORT_SYMBOL(ath10k_core_register);
2205
2206 void ath10k_core_unregister(struct ath10k *ar)
2207 {
2208         cancel_work_sync(&ar->register_work);
2209
2210         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2211                 return;
2212
2213         ath10k_thermal_unregister(ar);
2214         /* Stop spectral before unregistering from mac80211 to remove the
2215          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2216          * would be already be free'd recursively, leading to a double free.
2217          */
2218         ath10k_spectral_destroy(ar);
2219
2220         /* We must unregister from mac80211 before we stop HTC and HIF.
2221          * Otherwise we will fail to submit commands to FW and mac80211 will be
2222          * unhappy about callback failures. */
2223         ath10k_mac_unregister(ar);
2224
2225         ath10k_testmode_destroy(ar);
2226
2227         ath10k_core_free_firmware_files(ar);
2228         ath10k_core_free_board_files(ar);
2229
2230         ath10k_debug_unregister(ar);
2231 }
2232 EXPORT_SYMBOL(ath10k_core_unregister);
2233
2234 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2235                                   enum ath10k_bus bus,
2236                                   enum ath10k_hw_rev hw_rev,
2237                                   const struct ath10k_hif_ops *hif_ops)
2238 {
2239         struct ath10k *ar;
2240         int ret;
2241
2242         ar = ath10k_mac_create(priv_size);
2243         if (!ar)
2244                 return NULL;
2245
2246         ar->ath_common.priv = ar;
2247         ar->ath_common.hw = ar->hw;
2248         ar->dev = dev;
2249         ar->hw_rev = hw_rev;
2250         ar->hif.ops = hif_ops;
2251         ar->hif.bus = bus;
2252
2253         switch (hw_rev) {
2254         case ATH10K_HW_QCA988X:
2255         case ATH10K_HW_QCA9887:
2256                 ar->regs = &qca988x_regs;
2257                 ar->hw_values = &qca988x_values;
2258                 break;
2259         case ATH10K_HW_QCA6174:
2260         case ATH10K_HW_QCA9377:
2261                 ar->regs = &qca6174_regs;
2262                 ar->hw_values = &qca6174_values;
2263                 break;
2264         case ATH10K_HW_QCA99X0:
2265         case ATH10K_HW_QCA9984:
2266                 ar->regs = &qca99x0_regs;
2267                 ar->hw_values = &qca99x0_values;
2268                 break;
2269         case ATH10K_HW_QCA9888:
2270                 ar->regs = &qca99x0_regs;
2271                 ar->hw_values = &qca9888_values;
2272                 break;
2273         case ATH10K_HW_QCA4019:
2274                 ar->regs = &qca4019_regs;
2275                 ar->hw_values = &qca4019_values;
2276                 break;
2277         default:
2278                 ath10k_err(ar, "unsupported core hardware revision %d\n",
2279                            hw_rev);
2280                 ret = -ENOTSUPP;
2281                 goto err_free_mac;
2282         }
2283
2284         init_completion(&ar->scan.started);
2285         init_completion(&ar->scan.completed);
2286         init_completion(&ar->scan.on_channel);
2287         init_completion(&ar->target_suspend);
2288         init_completion(&ar->wow.wakeup_completed);
2289
2290         init_completion(&ar->install_key_done);
2291         init_completion(&ar->vdev_setup_done);
2292         init_completion(&ar->thermal.wmi_sync);
2293         init_completion(&ar->bss_survey_done);
2294
2295         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2296
2297         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2298         if (!ar->workqueue)
2299                 goto err_free_mac;
2300
2301         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2302         if (!ar->workqueue_aux)
2303                 goto err_free_wq;
2304
2305         mutex_init(&ar->conf_mutex);
2306         spin_lock_init(&ar->data_lock);
2307         spin_lock_init(&ar->txqs_lock);
2308
2309         INIT_LIST_HEAD(&ar->txqs);
2310         INIT_LIST_HEAD(&ar->peers);
2311         init_waitqueue_head(&ar->peer_mapping_wq);
2312         init_waitqueue_head(&ar->htt.empty_tx_wq);
2313         init_waitqueue_head(&ar->wmi.tx_credits_wq);
2314
2315         init_completion(&ar->offchan_tx_completed);
2316         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2317         skb_queue_head_init(&ar->offchan_tx_queue);
2318
2319         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2320         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2321
2322         INIT_WORK(&ar->register_work, ath10k_core_register_work);
2323         INIT_WORK(&ar->restart_work, ath10k_core_restart);
2324
2325         init_dummy_netdev(&ar->napi_dev);
2326
2327         ret = ath10k_debug_create(ar);
2328         if (ret)
2329                 goto err_free_aux_wq;
2330
2331         return ar;
2332
2333 err_free_aux_wq:
2334         destroy_workqueue(ar->workqueue_aux);
2335 err_free_wq:
2336         destroy_workqueue(ar->workqueue);
2337
2338 err_free_mac:
2339         ath10k_mac_destroy(ar);
2340
2341         return NULL;
2342 }
2343 EXPORT_SYMBOL(ath10k_core_create);
2344
2345 void ath10k_core_destroy(struct ath10k *ar)
2346 {
2347         flush_workqueue(ar->workqueue);
2348         destroy_workqueue(ar->workqueue);
2349
2350         flush_workqueue(ar->workqueue_aux);
2351         destroy_workqueue(ar->workqueue_aux);
2352
2353         ath10k_debug_destroy(ar);
2354         ath10k_wmi_free_host_mem(ar);
2355         ath10k_mac_destroy(ar);
2356 }
2357 EXPORT_SYMBOL(ath10k_core_destroy);
2358
2359 MODULE_AUTHOR("Qualcomm Atheros");
2360 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2361 MODULE_LICENSE("Dual BSD/GPL");