drivers/net/wireless/ath/ath10k/core.c

   1 /*
   2  * Copyright (c) 2005-2011 Atheros Communications Inc.
   3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/firmware.h>
  20 #include <linux/of.h>
  21
  22 #include "core.h"
  23 #include "mac.h"
  24 #include "htc.h"
  25 #include "hif.h"
  26 #include "wmi.h"
  27 #include "bmi.h"
  28 #include "debug.h"
  29 #include "htt.h"
  30 #include "testmode.h"
  31 #include "wmi-ops.h"
  32
  33 unsigned int ath10k_debug_mask;
  34 static unsigned int ath10k_cryptmode_param;
  35 static bool uart_print;
  36 static bool skip_otp;
  37 static bool rawmode;
  38
  39 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  40 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  41 module_param(uart_print, bool, 0644);
  42 module_param(skip_otp, bool, 0644);
  43 module_param(rawmode, bool, 0644);
  44
  45 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  46 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  50
  51 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  52         {
  53                 .id = QCA988X_HW_2_0_VERSION,
  54                 .dev_id = QCA988X_2_0_DEVICE_ID,
  55                 .name = "qca988x hw2.0",
  56                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  57                 .uart_pin = 7,
  58                 .has_shifted_cc_wraparound = true,
  59                 .otp_exe_param = 0,
  60                 .channel_counters_freq_hz = 88000,
  61                 .max_probe_resp_desc_thres = 0,
  62                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
  63                 .cal_data_len = 2116,
  64                 .fw = {
  65                         .dir = QCA988X_HW_2_0_FW_DIR,
  66                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  67                         .board_size = QCA988X_BOARD_DATA_SZ,
  68                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  69                 },
  70         },
  71         {
  72                 .id = QCA6174_HW_2_1_VERSION,
  73                 .dev_id = QCA6164_2_1_DEVICE_ID,
  74                 .name = "qca6164 hw2.1",
  75                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  76                 .uart_pin = 6,
  77                 .otp_exe_param = 0,
  78                 .channel_counters_freq_hz = 88000,
  79                 .max_probe_resp_desc_thres = 0,
  80                 .cal_data_len = 8124,
  81                 .fw = {
  82                         .dir = QCA6174_HW_2_1_FW_DIR,
  83                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
  84                         .board_size = QCA6174_BOARD_DATA_SZ,
  85                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  86                 },
  87         },
  88         {
  89                 .id = QCA6174_HW_2_1_VERSION,
  90                 .dev_id = QCA6174_2_1_DEVICE_ID,
  91                 .name = "qca6174 hw2.1",
  92                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  93                 .uart_pin = 6,
  94                 .otp_exe_param = 0,
  95                 .channel_counters_freq_hz = 88000,
  96                 .max_probe_resp_desc_thres = 0,
  97                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
  98                 .cal_data_len = 8124,
  99                 .fw = {
 100                         .dir = QCA6174_HW_2_1_FW_DIR,
 101                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 102                         .board_size = QCA6174_BOARD_DATA_SZ,
 103                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 104                 },
 105         },
 106         {
 107                 .id = QCA6174_HW_3_0_VERSION,
 108                 .dev_id = QCA6174_2_1_DEVICE_ID,
 109                 .name = "qca6174 hw3.0",
 110                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 111                 .uart_pin = 6,
 112                 .otp_exe_param = 0,
 113                 .channel_counters_freq_hz = 88000,
 114                 .max_probe_resp_desc_thres = 0,
 115                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
 116                 .cal_data_len = 8124,
 117                 .fw = {
 118                         .dir = QCA6174_HW_3_0_FW_DIR,
 119                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 120                         .board_size = QCA6174_BOARD_DATA_SZ,
 121                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 122                 },
 123         },
 124         {
 125                 .id = QCA6174_HW_3_2_VERSION,
 126                 .dev_id = QCA6174_2_1_DEVICE_ID,
 127                 .name = "qca6174 hw3.2",
 128                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 129                 .uart_pin = 6,
 130                 .otp_exe_param = 0,
 131                 .channel_counters_freq_hz = 88000,
 132                 .max_probe_resp_desc_thres = 0,
 133                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
 134                 .cal_data_len = 8124,
 135                 .fw = {
 136                         /* uses same binaries as hw3.0 */
 137                         .dir = QCA6174_HW_3_0_FW_DIR,
 138                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 139                         .board_size = QCA6174_BOARD_DATA_SZ,
 140                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 141                 },
 142         },
 143         {
 144                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 145                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 146                 .name = "qca99x0 hw2.0",
 147                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 148                 .uart_pin = 7,
 149                 .otp_exe_param = 0x00000700,
 150                 .continuous_frag_desc = true,
 151                 .channel_counters_freq_hz = 150000,
 152                 .max_probe_resp_desc_thres = 24,
 153                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
 154                 .tx_chain_mask = 0xf,
 155                 .rx_chain_mask = 0xf,
 156                 .max_spatial_stream = 4,
 157                 .cal_data_len = 12064,
 158                 .fw = {
 159                         .dir = QCA99X0_HW_2_0_FW_DIR,
 160                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 161                         .board_size = QCA99X0_BOARD_DATA_SZ,
 162                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 163                 },
 164         },
 165         {
 166                 .id = QCA9377_HW_1_0_DEV_VERSION,
 167                 .dev_id = QCA9377_1_0_DEVICE_ID,
 168                 .name = "qca9377 hw1.0",
 169                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 170                 .uart_pin = 6,
 171                 .otp_exe_param = 0,
 172                 .channel_counters_freq_hz = 88000,
 173                 .max_probe_resp_desc_thres = 0,
 174                 .cal_data_len = 8124,
 175                 .fw = {
 176                         .dir = QCA9377_HW_1_0_FW_DIR,
 177                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 178                         .board_size = QCA9377_BOARD_DATA_SZ,
 179                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 180                 },
 181         },
 182         {
 183                 .id = QCA9377_HW_1_1_DEV_VERSION,
 184                 .dev_id = QCA9377_1_0_DEVICE_ID,
 185                 .name = "qca9377 hw1.1",
 186                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 187                 .uart_pin = 6,
 188                 .otp_exe_param = 0,
 189                 .channel_counters_freq_hz = 88000,
 190                 .max_probe_resp_desc_thres = 0,
 191                 .cal_data_len = 8124,
 192                 .fw = {
 193                         .dir = QCA9377_HW_1_0_FW_DIR,
 194                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 195                         .board_size = QCA9377_BOARD_DATA_SZ,
 196                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 197                 },
 198         },
 199         {
 200                 .id = QCA4019_HW_1_0_DEV_VERSION,
 201                 .dev_id = 0,
 202                 .name = "qca4019 hw1.0",
 203                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 204                 .uart_pin = 7,
 205                 .otp_exe_param = 0x0010000,
 206                 .continuous_frag_desc = true,
 207                 .channel_counters_freq_hz = 125000,
 208                 .max_probe_resp_desc_thres = 24,
 209                 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE,
 210                 .tx_chain_mask = 0x3,
 211                 .rx_chain_mask = 0x3,
 212                 .max_spatial_stream = 2,
 213                 .cal_data_len = 12064,
 214                 .fw = {
 215                         .dir = QCA4019_HW_1_0_FW_DIR,
 216                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 217                         .board_size = QCA4019_BOARD_DATA_SZ,
 218                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 219                 },
 220         },
 221 };
 222
 223 static const char *const ath10k_core_fw_feature_str[] = {
 224         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 225         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 226         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 227         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 228         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 229         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 230         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 231         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 232         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 233         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 234         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 235         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 236         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 237         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 238 };
 239
 240 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 241                                                    size_t buf_len,
 242                                                    enum ath10k_fw_features feat)
 243 {
 244         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 245         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 246                      ATH10K_FW_FEATURE_COUNT);
 247
 248         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 249             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 250                 return scnprintf(buf, buf_len, "bit%d", feat);
 251         }
 252
 253         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 254 }
 255
 256 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 257                                      char *buf,
 258                                      size_t buf_len)
 259 {
 260         unsigned int len = 0;
 261         int i;
 262
 263         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 264                 if (test_bit(i, ar->fw_features)) {
 265                         if (len > 0)
 266                                 len += scnprintf(buf + len, buf_len - len, ",");
 267
 268                         len += ath10k_core_get_fw_feature_str(buf + len,
 269                                                               buf_len - len,
 270                                                               i);
 271                 }
 272         }
 273 }
 274
 275 static void ath10k_send_suspend_complete(struct ath10k *ar)
 276 {
 277         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 278
 279         complete(&ar->target_suspend);
 280 }
 281
 282 static int ath10k_init_configure_target(struct ath10k *ar)
 283 {
 284         u32 param_host;
 285         int ret;
 286
 287         /* tell target which HTC version it is used*/
 288         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 289                                  HTC_PROTOCOL_VERSION);
 290         if (ret) {
 291                 ath10k_err(ar, "settings HTC version failed\n");
 292                 return ret;
 293         }
 294
 295         /* set the firmware mode to STA/IBSS/AP */
 296         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 297         if (ret) {
 298                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 299                 return ret;
 300         }
 301
 302         /* TODO following parameters need to be re-visited. */
 303         /* num_device */
 304         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 305         /* Firmware mode */
 306         /* FIXME: Why FW_MODE_AP ??.*/
 307         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 308         /* mac_addr_method */
 309         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 310         /* firmware_bridge */
 311         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 312         /* fwsubmode */
 313         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 314
 315         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 316         if (ret) {
 317                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 318                 return ret;
 319         }
 320
 321         /* We do all byte-swapping on the host */
 322         ret = ath10k_bmi_write32(ar, hi_be, 0);
 323         if (ret) {
 324                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 325                 return ret;
 326         }
 327
 328         /* FW descriptor/Data swap flags */
 329         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 330
 331         if (ret) {
 332                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 333                 return ret;
 334         }
 335
 336         /* Some devices have a special sanity check that verifies the PCI
 337          * Device ID is written to this host interest var. It is known to be
 338          * required to boot QCA6164.
 339          */
 340         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 341                                  ar->dev_id);
 342         if (ret) {
 343                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 344                 return ret;
 345         }
 346
 347         return 0;
 348 }
 349
 350 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 351                                                    const char *dir,
 352                                                    const char *file)
 353 {
 354         char filename[100];
 355         const struct firmware *fw;
 356         int ret;
 357
 358         if (file == NULL)
 359                 return ERR_PTR(-ENOENT);
 360
 361         if (dir == NULL)
 362                 dir = ".";
 363
 364         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 365         ret = request_firmware(&fw, filename, ar->dev);
 366         if (ret)
 367                 return ERR_PTR(ret);
 368
 369         return fw;
 370 }
 371
 372 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 373                                       size_t data_len)
 374 {
 375         u32 board_data_size = ar->hw_params.fw.board_size;
 376         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 377         u32 board_ext_data_addr;
 378         int ret;
 379
 380         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 381         if (ret) {
 382                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 383                            ret);
 384                 return ret;
 385         }
 386
 387         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 388                    "boot push board extended data addr 0x%x\n",
 389                    board_ext_data_addr);
 390
 391         if (board_ext_data_addr == 0)
 392                 return 0;
 393
 394         if (data_len != (board_data_size + board_ext_data_size)) {
 395                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 396                            data_len, board_data_size, board_ext_data_size);
 397                 return -EINVAL;
 398         }
 399
 400         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 401                                       data + board_data_size,
 402                                       board_ext_data_size);
 403         if (ret) {
 404                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 405                 return ret;
 406         }
 407
 408         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 409                                  (board_ext_data_size << 16) | 1);
 410         if (ret) {
 411                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 412                            ret);
 413                 return ret;
 414         }
 415
 416         return 0;
 417 }
 418
 419 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
 420                                       size_t data_len)
 421 {
 422         u32 board_data_size = ar->hw_params.fw.board_size;
 423         u32 address;
 424         int ret;
 425
 426         ret = ath10k_push_board_ext_data(ar, data, data_len);
 427         if (ret) {
 428                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
 429                 goto exit;
 430         }
 431
 432         ret = ath10k_bmi_read32(ar, hi_board_data, &address);
 433         if (ret) {
 434                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
 435                 goto exit;
 436         }
 437
 438         ret = ath10k_bmi_write_memory(ar, address, data,
 439                                       min_t(u32, board_data_size,
 440                                             data_len));
 441         if (ret) {
 442                 ath10k_err(ar, "could not write board data (%d)\n", ret);
 443                 goto exit;
 444         }
 445
 446         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
 447         if (ret) {
 448                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
 449                 goto exit;
 450         }
 451
 452 exit:
 453         return ret;
 454 }
 455
 456 static int ath10k_download_cal_file(struct ath10k *ar,
 457                                     const struct firmware *file)
 458 {
 459         int ret;
 460
 461         if (!file)
 462                 return -ENOENT;
 463
 464         if (IS_ERR(file))
 465                 return PTR_ERR(file);
 466
 467         ret = ath10k_download_board_data(ar, file->data, file->size);
 468         if (ret) {
 469                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
 470                 return ret;
 471         }
 472
 473         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
 474
 475         return 0;
 476 }
 477
 478 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
 479 {
 480         struct device_node *node;
 481         int data_len;
 482         void *data;
 483         int ret;
 484
 485         node = ar->dev->of_node;
 486         if (!node)
 487                 /* Device Tree is optional, don't print any warnings if
 488                  * there's no node for ath10k.
 489                  */
 490                 return -ENOENT;
 491
 492         if (!of_get_property(node, dt_name, &data_len)) {
 493                 /* The calibration data node is optional */
 494                 return -ENOENT;
 495         }
 496
 497         if (data_len != ar->hw_params.cal_data_len) {
 498                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
 499                             data_len);
 500                 ret = -EMSGSIZE;
 501                 goto out;
 502         }
 503
 504         data = kmalloc(data_len, GFP_KERNEL);
 505         if (!data) {
 506                 ret = -ENOMEM;
 507                 goto out;
 508         }
 509
 510         ret = of_property_read_u8_array(node, dt_name, data, data_len);
 511         if (ret) {
 512                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
 513                             ret);
 514                 goto out_free;
 515         }
 516
 517         ret = ath10k_download_board_data(ar, data, data_len);
 518         if (ret) {
 519                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
 520                             ret);
 521                 goto out_free;
 522         }
 523
 524         ret = 0;
 525
 526 out_free:
 527         kfree(data);
 528
 529 out:
 530         return ret;
 531 }
 532
 533 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 534 {
 535         u32 result, address;
 536         u8 board_id, chip_id;
 537         int ret;
 538
 539         address = ar->hw_params.patch_load_addr;
 540
 541         if (!ar->otp_data || !ar->otp_len) {
 542                 ath10k_warn(ar,
 543                             "failed to retrieve board id because of invalid otp\n");
 544                 return -ENODATA;
 545         }
 546
 547         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 548                    "boot upload otp to 0x%x len %zd for board id\n",
 549                    address, ar->otp_len);
 550
 551         ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
 552         if (ret) {
 553                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 554                            ret);
 555                 return ret;
 556         }
 557
 558         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
 559                                  &result);
 560         if (ret) {
 561                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 562                            ret);
 563                 return ret;
 564         }
 565
 566         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 567         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 568
 569         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 570                    "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
 571                    result, board_id, chip_id);
 572
 573         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0)
 574                 return -EOPNOTSUPP;
 575
 576         ar->id.bmi_ids_valid = true;
 577         ar->id.bmi_board_id = board_id;
 578         ar->id.bmi_chip_id = chip_id;
 579
 580         return 0;
 581 }
 582
 583 static int ath10k_download_and_run_otp(struct ath10k *ar)
 584 {
 585         u32 result, address = ar->hw_params.patch_load_addr;
 586         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
 587         int ret;
 588
 589         ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
 590         if (ret) {
 591                 ath10k_err(ar, "failed to download board data: %d\n", ret);
 592                 return ret;
 593         }
 594
 595         /* OTP is optional */
 596
 597         if (!ar->otp_data || !ar->otp_len) {
 598                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
 599                             ar->otp_data, ar->otp_len);
 600                 return 0;
 601         }
 602
 603         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
 604                    address, ar->otp_len);
 605
 606         ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
 607         if (ret) {
 608                 ath10k_err(ar, "could not write otp (%d)\n", ret);
 609                 return ret;
 610         }
 611
 612         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
 613         if (ret) {
 614                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
 615                 return ret;
 616         }
 617
 618         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
 619
 620         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
 621                                    ar->fw_features)) &&
 622             result != 0) {
 623                 ath10k_err(ar, "otp calibration failed: %d", result);
 624                 return -EINVAL;
 625         }
 626
 627         return 0;
 628 }
 629
 630 static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
 631 {
 632         u32 address, data_len;
 633         const char *mode_name;
 634         const void *data;
 635         int ret;
 636
 637         address = ar->hw_params.patch_load_addr;
 638
 639         switch (mode) {
 640         case ATH10K_FIRMWARE_MODE_NORMAL:
 641                 data = ar->firmware_data;
 642                 data_len = ar->firmware_len;
 643                 mode_name = "normal";
 644                 ret = ath10k_swap_code_seg_configure(ar,
 645                                                      ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW);
 646                 if (ret) {
 647                         ath10k_err(ar, "failed to configure fw code swap: %d\n",
 648                                    ret);
 649                         return ret;
 650                 }
 651                 break;
 652         case ATH10K_FIRMWARE_MODE_UTF:
 653                 data = ar->testmode.utf_firmware_data;
 654                 data_len = ar->testmode.utf_firmware_len;
 655                 mode_name = "utf";
 656                 break;
 657         default:
 658                 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
 659                 return -EINVAL;
 660         }
 661
 662         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 663                    "boot uploading firmware image %p len %d mode %s\n",
 664                    data, data_len, mode_name);
 665
 666         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
 667         if (ret) {
 668                 ath10k_err(ar, "failed to download %s firmware: %d\n",
 669                            mode_name, ret);
 670                 return ret;
 671         }
 672
 673         return ret;
 674 }
 675
 676 static void ath10k_core_free_board_files(struct ath10k *ar)
 677 {
 678         if (!IS_ERR(ar->board))
 679                 release_firmware(ar->board);
 680
 681         ar->board = NULL;
 682         ar->board_data = NULL;
 683         ar->board_len = 0;
 684 }
 685
 686 static void ath10k_core_free_firmware_files(struct ath10k *ar)
 687 {
 688         if (!IS_ERR(ar->firmware))
 689                 release_firmware(ar->firmware);
 690
 691         if (!IS_ERR(ar->cal_file))
 692                 release_firmware(ar->cal_file);
 693
 694         ath10k_swap_code_seg_release(ar);
 695
 696         ar->otp_data = NULL;
 697         ar->otp_len = 0;
 698
 699         ar->firmware = NULL;
 700         ar->firmware_data = NULL;
 701         ar->firmware_len = 0;
 702
 703         ar->cal_file = NULL;
 704 }
 705
 706 static int ath10k_fetch_cal_file(struct ath10k *ar)
 707 {
 708         char filename[100];
 709
 710         /* pre-cal-<bus>-<id>.bin */
 711         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
 712                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 713
 714         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 715         if (!IS_ERR(ar->pre_cal_file))
 716                 goto success;
 717
 718         /* cal-<bus>-<id>.bin */
 719         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
 720                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 721
 722         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 723         if (IS_ERR(ar->cal_file))
 724                 /* calibration file is optional, don't print any warnings */
 725                 return PTR_ERR(ar->cal_file);
 726 success:
 727         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
 728                    ATH10K_FW_DIR, filename);
 729
 730         return 0;
 731 }
 732
 733 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
 734 {
 735         if (!ar->hw_params.fw.board) {
 736                 ath10k_err(ar, "failed to find board file fw entry\n");
 737                 return -EINVAL;
 738         }
 739
 740         ar->board = ath10k_fetch_fw_file(ar,
 741                                          ar->hw_params.fw.dir,
 742                                          ar->hw_params.fw.board);
 743         if (IS_ERR(ar->board))
 744                 return PTR_ERR(ar->board);
 745
 746         ar->board_data = ar->board->data;
 747         ar->board_len = ar->board->size;
 748
 749         return 0;
 750 }
 751
 752 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
 753                                          const void *buf, size_t buf_len,
 754                                          const char *boardname)
 755 {
 756         const struct ath10k_fw_ie *hdr;
 757         bool name_match_found;
 758         int ret, board_ie_id;
 759         size_t board_ie_len;
 760         const void *board_ie_data;
 761
 762         name_match_found = false;
 763
 764         /* go through ATH10K_BD_IE_BOARD_ elements */
 765         while (buf_len > sizeof(struct ath10k_fw_ie)) {
 766                 hdr = buf;
 767                 board_ie_id = le32_to_cpu(hdr->id);
 768                 board_ie_len = le32_to_cpu(hdr->len);
 769                 board_ie_data = hdr->data;
 770
 771                 buf_len -= sizeof(*hdr);
 772                 buf += sizeof(*hdr);
 773
 774                 if (buf_len < ALIGN(board_ie_len, 4)) {
 775                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
 776                                    buf_len, ALIGN(board_ie_len, 4));
 777                         ret = -EINVAL;
 778                         goto out;
 779                 }
 780
 781                 switch (board_ie_id) {
 782                 case ATH10K_BD_IE_BOARD_NAME:
 783                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
 784                                         board_ie_data, board_ie_len);
 785
 786                         if (board_ie_len != strlen(boardname))
 787                                 break;
 788
 789                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
 790                         if (ret)
 791                                 break;
 792
 793                         name_match_found = true;
 794                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 795                                    "boot found match for name '%s'",
 796                                    boardname);
 797                         break;
 798                 case ATH10K_BD_IE_BOARD_DATA:
 799                         if (!name_match_found)
 800                                 /* no match found */
 801                                 break;
 802
 803                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 804                                    "boot found board data for '%s'",
 805                                    boardname);
 806
 807                         ar->board_data = board_ie_data;
 808                         ar->board_len = board_ie_len;
 809
 810                         ret = 0;
 811                         goto out;
 812                 default:
 813                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
 814                                     board_ie_id);
 815                         break;
 816                 }
 817
 818                 /* jump over the padding */
 819                 board_ie_len = ALIGN(board_ie_len, 4);
 820
 821                 buf_len -= board_ie_len;
 822                 buf += board_ie_len;
 823         }
 824
 825         /* no match found */
 826         ret = -ENOENT;
 827
 828 out:
 829         return ret;
 830 }
 831
 832 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
 833                                               const char *boardname,
 834                                               const char *filename)
 835 {
 836         size_t len, magic_len, ie_len;
 837         struct ath10k_fw_ie *hdr;
 838         const u8 *data;
 839         int ret, ie_id;
 840
 841         ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename);
 842         if (IS_ERR(ar->board))
 843                 return PTR_ERR(ar->board);
 844
 845         data = ar->board->data;
 846         len = ar->board->size;
 847
 848         /* magic has extra null byte padded */
 849         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
 850         if (len < magic_len) {
 851                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
 852                            ar->hw_params.fw.dir, filename, len);
 853                 ret = -EINVAL;
 854                 goto err;
 855         }
 856
 857         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
 858                 ath10k_err(ar, "found invalid board magic\n");
 859                 ret = -EINVAL;
 860                 goto err;
 861         }
 862
 863         /* magic is padded to 4 bytes */
 864         magic_len = ALIGN(magic_len, 4);
 865         if (len < magic_len) {
 866                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
 867                            ar->hw_params.fw.dir, filename, len);
 868                 ret = -EINVAL;
 869                 goto err;
 870         }
 871
 872         data += magic_len;
 873         len -= magic_len;
 874
 875         while (len > sizeof(struct ath10k_fw_ie)) {
 876                 hdr = (struct ath10k_fw_ie *)data;
 877                 ie_id = le32_to_cpu(hdr->id);
 878                 ie_len = le32_to_cpu(hdr->len);
 879
 880                 len -= sizeof(*hdr);
 881                 data = hdr->data;
 882
 883                 if (len < ALIGN(ie_len, 4)) {
 884                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
 885                                    ie_id, ie_len, len);
 886                         ret = -EINVAL;
 887                         goto err;
 888                 }
 889
 890                 switch (ie_id) {
 891                 case ATH10K_BD_IE_BOARD:
 892                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
 893                                                             boardname);
 894                         if (ret == -ENOENT)
 895                                 /* no match found, continue */
 896                                 break;
 897                         else if (ret)
 898                                 /* there was an error, bail out */
 899                                 goto err;
 900
 901                         /* board data found */
 902                         goto out;
 903                 }
 904
 905                 /* jump over the padding */
 906                 ie_len = ALIGN(ie_len, 4);
 907
 908                 len -= ie_len;
 909                 data += ie_len;
 910         }
 911
 912 out:
 913         if (!ar->board_data || !ar->board_len) {
 914                 ath10k_err(ar,
 915                            "failed to fetch board data for %s from %s/%s\n",
 916                            boardname, ar->hw_params.fw.dir, filename);
 917                 ret = -ENODATA;
 918                 goto err;
 919         }
 920
 921         return 0;
 922
 923 err:
 924         ath10k_core_free_board_files(ar);
 925         return ret;
 926 }
 927
 928 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
 929                                          size_t name_len)
 930 {
 931         if (ar->id.bmi_ids_valid) {
 932                 scnprintf(name, name_len,
 933                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
 934                           ath10k_bus_str(ar->hif.bus),
 935                           ar->id.bmi_chip_id,
 936                           ar->id.bmi_board_id);
 937                 goto out;
 938         }
 939
 940         scnprintf(name, name_len,
 941                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x",
 942                   ath10k_bus_str(ar->hif.bus),
 943                   ar->id.vendor, ar->id.device,
 944                   ar->id.subsystem_vendor, ar->id.subsystem_device);
 945
 946 out:
 947         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
 948
 949         return 0;
 950 }
 951
 952 static int ath10k_core_fetch_board_file(struct ath10k *ar)
 953 {
 954         char boardname[100];
 955         int ret;
 956
 957         ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
 958         if (ret) {
 959                 ath10k_err(ar, "failed to create board name: %d", ret);
 960                 return ret;
 961         }
 962
 963         ar->bd_api = 2;
 964         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
 965                                                  ATH10K_BOARD_API2_FILE);
 966         if (!ret)
 967                 goto success;
 968
 969         ar->bd_api = 1;
 970         ret = ath10k_core_fetch_board_data_api_1(ar);
 971         if (ret) {
 972                 ath10k_err(ar, "failed to fetch board data\n");
 973                 return ret;
 974         }
 975
 976 success:
 977         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
 978         return 0;
 979 }
 980
 981 static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
 982 {
 983         size_t magic_len, len, ie_len;
 984         int ie_id, i, index, bit, ret;
 985         struct ath10k_fw_ie *hdr;
 986         const u8 *data;
 987         __le32 *timestamp, *version;
 988
 989         /* first fetch the firmware file (firmware-*.bin) */
 990         ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
 991         if (IS_ERR(ar->firmware)) {
 992                 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
 993                            ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
 994                 return PTR_ERR(ar->firmware);
 995         }
 996
 997         data = ar->firmware->data;
 998         len = ar->firmware->size;
 999
1000         /* magic also includes the null byte, check that as well */
1001         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1002
1003         if (len < magic_len) {
1004                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1005                            ar->hw_params.fw.dir, name, len);
1006                 ret = -EINVAL;
1007                 goto err;
1008         }
1009
1010         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1011                 ath10k_err(ar, "invalid firmware magic\n");
1012                 ret = -EINVAL;
1013                 goto err;
1014         }
1015
1016         /* jump over the padding */
1017         magic_len = ALIGN(magic_len, 4);
1018
1019         len -= magic_len;
1020         data += magic_len;
1021
1022         /* loop elements */
1023         while (len > sizeof(struct ath10k_fw_ie)) {
1024                 hdr = (struct ath10k_fw_ie *)data;
1025
1026                 ie_id = le32_to_cpu(hdr->id);
1027                 ie_len = le32_to_cpu(hdr->len);
1028
1029                 len -= sizeof(*hdr);
1030                 data += sizeof(*hdr);
1031
1032                 if (len < ie_len) {
1033                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1034                                    ie_id, len, ie_len);
1035                         ret = -EINVAL;
1036                         goto err;
1037                 }
1038
1039                 switch (ie_id) {
1040                 case ATH10K_FW_IE_FW_VERSION:
1041                         if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
1042                                 break;
1043
1044                         memcpy(ar->hw->wiphy->fw_version, data, ie_len);
1045                         ar->hw->wiphy->fw_version[ie_len] = '\0';
1046
1047                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1048                                    "found fw version %s\n",
1049                                     ar->hw->wiphy->fw_version);
1050                         break;
1051                 case ATH10K_FW_IE_TIMESTAMP:
1052                         if (ie_len != sizeof(u32))
1053                                 break;
1054
1055                         timestamp = (__le32 *)data;
1056
1057                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1058                                    le32_to_cpup(timestamp));
1059                         break;
1060                 case ATH10K_FW_IE_FEATURES:
1061                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1062                                    "found firmware features ie (%zd B)\n",
1063                                    ie_len);
1064
1065                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1066                                 index = i / 8;
1067                                 bit = i % 8;
1068
1069                                 if (index == ie_len)
1070                                         break;
1071
1072                                 if (data[index] & (1 << bit)) {
1073                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1074                                                    "Enabling feature bit: %i\n",
1075                                                    i);
1076                                         __set_bit(i, ar->fw_features);
1077                                 }
1078                         }
1079
1080                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1081                                         ar->fw_features,
1082                                         sizeof(ar->fw_features));
1083                         break;
1084                 case ATH10K_FW_IE_FW_IMAGE:
1085                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1086                                    "found fw image ie (%zd B)\n",
1087                                    ie_len);
1088
1089                         ar->firmware_data = data;
1090                         ar->firmware_len = ie_len;
1091
1092                         break;
1093                 case ATH10K_FW_IE_OTP_IMAGE:
1094                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1095                                    "found otp image ie (%zd B)\n",
1096                                    ie_len);
1097
1098                         ar->otp_data = data;
1099                         ar->otp_len = ie_len;
1100
1101                         break;
1102                 case ATH10K_FW_IE_WMI_OP_VERSION:
1103                         if (ie_len != sizeof(u32))
1104                                 break;
1105
1106                         version = (__le32 *)data;
1107
1108                         ar->wmi.op_version = le32_to_cpup(version);
1109
1110                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1111                                    ar->wmi.op_version);
1112                         break;
1113                 case ATH10K_FW_IE_HTT_OP_VERSION:
1114                         if (ie_len != sizeof(u32))
1115                                 break;
1116
1117                         version = (__le32 *)data;
1118
1119                         ar->htt.op_version = le32_to_cpup(version);
1120
1121                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1122                                    ar->htt.op_version);
1123                         break;
1124                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1125                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1126                                    "found fw code swap image ie (%zd B)\n",
1127                                    ie_len);
1128                         ar->swap.firmware_codeswap_data = data;
1129                         ar->swap.firmware_codeswap_len = ie_len;
1130                         break;
1131                 default:
1132                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1133                                     le32_to_cpu(hdr->id));
1134                         break;
1135                 }
1136
1137                 /* jump over the padding */
1138                 ie_len = ALIGN(ie_len, 4);
1139
1140                 len -= ie_len;
1141                 data += ie_len;
1142         }
1143
1144         if (!ar->firmware_data || !ar->firmware_len) {
1145                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1146                             ar->hw_params.fw.dir, name);
1147                 ret = -ENOMEDIUM;
1148                 goto err;
1149         }
1150
1151         return 0;
1152
1153 err:
1154         ath10k_core_free_firmware_files(ar);
1155         return ret;
1156 }
1157
1158 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1159 {
1160         int ret;
1161
1162         /* calibration file is optional, don't check for any errors */
1163         ath10k_fetch_cal_file(ar);
1164
1165         ar->fw_api = 5;
1166         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1167
1168         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE);
1169         if (ret == 0)
1170                 goto success;
1171
1172         ar->fw_api = 4;
1173         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1174
1175         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE);
1176         if (ret == 0)
1177                 goto success;
1178
1179         ar->fw_api = 3;
1180         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1181
1182         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
1183         if (ret == 0)
1184                 goto success;
1185
1186         ar->fw_api = 2;
1187         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1188
1189         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
1190         if (ret)
1191                 return ret;
1192
1193 success:
1194         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1195
1196         return 0;
1197 }
1198
1199 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1200 {
1201         int ret;
1202
1203         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1204         if (ret == 0) {
1205                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1206                 goto success;
1207         }
1208
1209         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1210                    "boot did not find a pre calibration file, try DT next: %d\n",
1211                    ret);
1212
1213         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1214         if (ret) {
1215                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1216                            "unable to load pre cal data from DT: %d\n", ret);
1217                 return ret;
1218         }
1219         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1220
1221 success:
1222         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1223                    ath10k_cal_mode_str(ar->cal_mode));
1224
1225         return 0;
1226 }
1227
1228 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1229 {
1230         int ret;
1231
1232         ret = ath10k_core_pre_cal_download(ar);
1233         if (ret) {
1234                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1235                            "failed to load pre cal data: %d\n", ret);
1236                 return ret;
1237         }
1238
1239         ret = ath10k_core_get_board_id_from_otp(ar);
1240         if (ret) {
1241                 ath10k_err(ar, "failed to get board id: %d\n", ret);
1242                 return ret;
1243         }
1244
1245         ret = ath10k_download_and_run_otp(ar);
1246         if (ret) {
1247                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1248                 return ret;
1249         }
1250
1251         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1252                    "pre cal configuration done successfully\n");
1253
1254         return 0;
1255 }
1256
1257 static int ath10k_download_cal_data(struct ath10k *ar)
1258 {
1259         int ret;
1260
1261         ret = ath10k_core_pre_cal_config(ar);
1262         if (ret == 0)
1263                 return 0;
1264
1265         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1266                    "pre cal download procedure failed, try cal file: %d\n",
1267                    ret);
1268
1269         ret = ath10k_download_cal_file(ar, ar->cal_file);
1270         if (ret == 0) {
1271                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1272                 goto done;
1273         }
1274
1275         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1276                    "boot did not find a calibration file, try DT next: %d\n",
1277                    ret);
1278
1279         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1280         if (ret == 0) {
1281                 ar->cal_mode = ATH10K_CAL_MODE_DT;
1282                 goto done;
1283         }
1284
1285         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1286                    "boot did not find DT entry, try OTP next: %d\n",
1287                    ret);
1288
1289         ret = ath10k_download_and_run_otp(ar);
1290         if (ret) {
1291                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1292                 return ret;
1293         }
1294
1295         ar->cal_mode = ATH10K_CAL_MODE_OTP;
1296
1297 done:
1298         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1299                    ath10k_cal_mode_str(ar->cal_mode));
1300         return 0;
1301 }
1302
1303 static int ath10k_init_uart(struct ath10k *ar)
1304 {
1305         int ret;
1306
1307         /*
1308          * Explicitly setting UART prints to zero as target turns it on
1309          * based on scratch registers.
1310          */
1311         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1312         if (ret) {
1313                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1314                 return ret;
1315         }
1316
1317         if (!uart_print)
1318                 return 0;
1319
1320         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1321         if (ret) {
1322                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1323                 return ret;
1324         }
1325
1326         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1327         if (ret) {
1328                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1329                 return ret;
1330         }
1331
1332         /* Set the UART baud rate to 19200. */
1333         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1334         if (ret) {
1335                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1336                 return ret;
1337         }
1338
1339         ath10k_info(ar, "UART prints enabled\n");
1340         return 0;
1341 }
1342
1343 static int ath10k_init_hw_params(struct ath10k *ar)
1344 {
1345         const struct ath10k_hw_params *uninitialized_var(hw_params);
1346         int i;
1347
1348         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1349                 hw_params = &ath10k_hw_params_list[i];
1350
1351                 if (hw_params->id == ar->target_version &&
1352                     hw_params->dev_id == ar->dev_id)
1353                         break;
1354         }
1355
1356         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1357                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1358                            ar->target_version);
1359                 return -EINVAL;
1360         }
1361
1362         ar->hw_params = *hw_params;
1363
1364         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1365                    ar->hw_params.name, ar->target_version);
1366
1367         return 0;
1368 }
1369
1370 static void ath10k_core_restart(struct work_struct *work)
1371 {
1372         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1373
1374         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1375
1376         /* Place a barrier to make sure the compiler doesn't reorder
1377          * CRASH_FLUSH and calling other functions.
1378          */
1379         barrier();
1380
1381         ieee80211_stop_queues(ar->hw);
1382         ath10k_drain_tx(ar);
1383         complete_all(&ar->scan.started);
1384         complete_all(&ar->scan.completed);
1385         complete_all(&ar->scan.on_channel);
1386         complete_all(&ar->offchan_tx_completed);
1387         complete_all(&ar->install_key_done);
1388         complete_all(&ar->vdev_setup_done);
1389         complete_all(&ar->thermal.wmi_sync);
1390         wake_up(&ar->htt.empty_tx_wq);
1391         wake_up(&ar->wmi.tx_credits_wq);
1392         wake_up(&ar->peer_mapping_wq);
1393
1394         mutex_lock(&ar->conf_mutex);
1395
1396         switch (ar->state) {
1397         case ATH10K_STATE_ON:
1398                 ar->state = ATH10K_STATE_RESTARTING;
1399                 ath10k_hif_stop(ar);
1400                 ath10k_scan_finish(ar);
1401                 ieee80211_restart_hw(ar->hw);
1402                 break;
1403         case ATH10K_STATE_OFF:
1404                 /* this can happen if driver is being unloaded
1405                  * or if the crash happens during FW probing */
1406                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1407                 break;
1408         case ATH10K_STATE_RESTARTING:
1409                 /* hw restart might be requested from multiple places */
1410                 break;
1411         case ATH10K_STATE_RESTARTED:
1412                 ar->state = ATH10K_STATE_WEDGED;
1413                 /* fall through */
1414         case ATH10K_STATE_WEDGED:
1415                 ath10k_warn(ar, "device is wedged, will not restart\n");
1416                 break;
1417         case ATH10K_STATE_UTF:
1418                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1419                 break;
1420         }
1421
1422         mutex_unlock(&ar->conf_mutex);
1423 }
1424
1425 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1426 {
1427         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
1428             !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1429                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1430                 return -EINVAL;
1431         }
1432
1433         if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1434                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1435                            ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
1436                 return -EINVAL;
1437         }
1438
1439         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1440         switch (ath10k_cryptmode_param) {
1441         case ATH10K_CRYPT_MODE_HW:
1442                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1443                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1444                 break;
1445         case ATH10K_CRYPT_MODE_SW:
1446                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1447                               ar->fw_features)) {
1448                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1449                         return -EINVAL;
1450                 }
1451
1452                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1453                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1454                 break;
1455         default:
1456                 ath10k_info(ar, "invalid cryptmode: %d\n",
1457                             ath10k_cryptmode_param);
1458                 return -EINVAL;
1459         }
1460
1461         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1462         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1463
1464         if (rawmode) {
1465                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1466                               ar->fw_features)) {
1467                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
1468                         return -EINVAL;
1469                 }
1470                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1471         }
1472
1473         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1474                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1475
1476                 /* Workaround:
1477                  *
1478                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1479                  * and causes enormous performance issues (malformed frames,
1480                  * etc).
1481                  *
1482                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
1483                  * albeit a bit slower compared to regular operation.
1484                  */
1485                 ar->htt.max_num_amsdu = 1;
1486         }
1487
1488         /* Backwards compatibility for firmwares without
1489          * ATH10K_FW_IE_WMI_OP_VERSION.
1490          */
1491         if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1492                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1493                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1494                                      ar->fw_features))
1495                                 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1496                         else
1497                                 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1498                 } else {
1499                         ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1500                 }
1501         }
1502
1503         switch (ar->wmi.op_version) {
1504         case ATH10K_FW_WMI_OP_VERSION_MAIN:
1505                 ar->max_num_peers = TARGET_NUM_PEERS;
1506                 ar->max_num_stations = TARGET_NUM_STATIONS;
1507                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1508                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1509                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1510                         WMI_STAT_PEER;
1511                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1512                 break;
1513         case ATH10K_FW_WMI_OP_VERSION_10_1:
1514         case ATH10K_FW_WMI_OP_VERSION_10_2:
1515         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1516                 if (ath10k_peer_stats_enabled(ar)) {
1517                         ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1518                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1519                 } else {
1520                         ar->max_num_peers = TARGET_10X_NUM_PEERS;
1521                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1522                 }
1523                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1524                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1525                 ar->fw_stats_req_mask = WMI_STAT_PEER;
1526                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1527                 break;
1528         case ATH10K_FW_WMI_OP_VERSION_TLV:
1529                 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1530                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1531                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1532                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1533                 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1534                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1535                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1536                         WMI_STAT_PEER;
1537                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1538                 break;
1539         case ATH10K_FW_WMI_OP_VERSION_10_4:
1540                 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1541                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1542                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1543                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1544                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1545                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1546                                         WMI_10_4_STAT_PEER_EXTD;
1547                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
1548
1549                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1550                              ar->fw_features))
1551                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1552                 else
1553                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1554                 break;
1555         case ATH10K_FW_WMI_OP_VERSION_UNSET:
1556         case ATH10K_FW_WMI_OP_VERSION_MAX:
1557                 WARN_ON(1);
1558                 return -EINVAL;
1559         }
1560
1561         /* Backwards compatibility for firmwares without
1562          * ATH10K_FW_IE_HTT_OP_VERSION.
1563          */
1564         if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1565                 switch (ar->wmi.op_version) {
1566                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1567                         ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1568                         break;
1569                 case ATH10K_FW_WMI_OP_VERSION_10_1:
1570                 case ATH10K_FW_WMI_OP_VERSION_10_2:
1571                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1572                         ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1573                         break;
1574                 case ATH10K_FW_WMI_OP_VERSION_TLV:
1575                         ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1576                         break;
1577                 case ATH10K_FW_WMI_OP_VERSION_10_4:
1578                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1579                 case ATH10K_FW_WMI_OP_VERSION_MAX:
1580                         WARN_ON(1);
1581                         return -EINVAL;
1582                 }
1583         }
1584
1585         return 0;
1586 }
1587
1588 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
1589 {
1590         int status;
1591         u32 val;
1592
1593         lockdep_assert_held(&ar->conf_mutex);
1594
1595         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1596
1597         ath10k_bmi_start(ar);
1598
1599         if (ath10k_init_configure_target(ar)) {
1600                 status = -EINVAL;
1601                 goto err;
1602         }
1603
1604         status = ath10k_download_cal_data(ar);
1605         if (status)
1606                 goto err;
1607
1608         /* Some of of qca988x solutions are having global reset issue
1609          * during target initialization. Bypassing PLL setting before
1610          * downloading firmware and letting the SoC run on REF_CLK is
1611          * fixing the problem. Corresponding firmware change is also needed
1612          * to set the clock source once the target is initialized.
1613          */
1614         if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1615                      ar->fw_features)) {
1616                 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1617                 if (status) {
1618                         ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1619                                    status);
1620                         goto err;
1621                 }
1622         }
1623
1624         status = ath10k_download_fw(ar, mode);
1625         if (status)
1626                 goto err;
1627
1628         status = ath10k_init_uart(ar);
1629         if (status)
1630                 goto err;
1631
1632         ar->htc.htc_ops.target_send_suspend_complete =
1633                 ath10k_send_suspend_complete;
1634
1635         status = ath10k_htc_init(ar);
1636         if (status) {
1637                 ath10k_err(ar, "could not init HTC (%d)\n", status);
1638                 goto err;
1639         }
1640
1641         status = ath10k_bmi_done(ar);
1642         if (status)
1643                 goto err;
1644
1645         status = ath10k_wmi_attach(ar);
1646         if (status) {
1647                 ath10k_err(ar, "WMI attach failed: %d\n", status);
1648                 goto err;
1649         }
1650
1651         status = ath10k_htt_init(ar);
1652         if (status) {
1653                 ath10k_err(ar, "failed to init htt: %d\n", status);
1654                 goto err_wmi_detach;
1655         }
1656
1657         status = ath10k_htt_tx_alloc(&ar->htt);
1658         if (status) {
1659                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1660                 goto err_wmi_detach;
1661         }
1662
1663         status = ath10k_htt_rx_alloc(&ar->htt);
1664         if (status) {
1665                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1666                 goto err_htt_tx_detach;
1667         }
1668
1669         status = ath10k_hif_start(ar);
1670         if (status) {
1671                 ath10k_err(ar, "could not start HIF: %d\n", status);
1672                 goto err_htt_rx_detach;
1673         }
1674
1675         status = ath10k_htc_wait_target(&ar->htc);
1676         if (status) {
1677                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1678                 goto err_hif_stop;
1679         }
1680
1681         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1682                 status = ath10k_htt_connect(&ar->htt);
1683                 if (status) {
1684                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
1685                         goto err_hif_stop;
1686                 }
1687         }
1688
1689         status = ath10k_wmi_connect(ar);
1690         if (status) {
1691                 ath10k_err(ar, "could not connect wmi: %d\n", status);
1692                 goto err_hif_stop;
1693         }
1694
1695         status = ath10k_htc_start(&ar->htc);
1696         if (status) {
1697                 ath10k_err(ar, "failed to start htc: %d\n", status);
1698                 goto err_hif_stop;
1699         }
1700
1701         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1702                 status = ath10k_wmi_wait_for_service_ready(ar);
1703                 if (status) {
1704                         ath10k_warn(ar, "wmi service ready event not received");
1705                         goto err_hif_stop;
1706                 }
1707         }
1708
1709         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
1710                    ar->hw->wiphy->fw_version);
1711
1712         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) {
1713                 val = 0;
1714                 if (ath10k_peer_stats_enabled(ar))
1715                         val = WMI_10_4_PEER_STATS;
1716
1717                 status = ath10k_mac_ext_resource_config(ar, val);
1718                 if (status) {
1719                         ath10k_err(ar,
1720                                    "failed to send ext resource cfg command : %d\n",
1721                                    status);
1722                         goto err_hif_stop;
1723                 }
1724         }
1725
1726         status = ath10k_wmi_cmd_init(ar);
1727         if (status) {
1728                 ath10k_err(ar, "could not send WMI init command (%d)\n",
1729                            status);
1730                 goto err_hif_stop;
1731         }
1732
1733         status = ath10k_wmi_wait_for_unified_ready(ar);
1734         if (status) {
1735                 ath10k_err(ar, "wmi unified ready event not received\n");
1736                 goto err_hif_stop;
1737         }
1738
1739         /* If firmware indicates Full Rx Reorder support it must be used in a
1740          * slightly different manner. Let HTT code know.
1741          */
1742         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1743                                                 ar->wmi.svc_map));
1744
1745         status = ath10k_htt_rx_ring_refill(ar);
1746         if (status) {
1747                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1748                 goto err_hif_stop;
1749         }
1750
1751         /* we don't care about HTT in UTF mode */
1752         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1753                 status = ath10k_htt_setup(&ar->htt);
1754                 if (status) {
1755                         ath10k_err(ar, "failed to setup htt: %d\n", status);
1756                         goto err_hif_stop;
1757                 }
1758         }
1759
1760         status = ath10k_debug_start(ar);
1761         if (status)
1762                 goto err_hif_stop;
1763
1764         ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
1765
1766         INIT_LIST_HEAD(&ar->arvifs);
1767
1768         return 0;
1769
1770 err_hif_stop:
1771         ath10k_hif_stop(ar);
1772 err_htt_rx_detach:
1773         ath10k_htt_rx_free(&ar->htt);
1774 err_htt_tx_detach:
1775         ath10k_htt_tx_free(&ar->htt);
1776 err_wmi_detach:
1777         ath10k_wmi_detach(ar);
1778 err:
1779         return status;
1780 }
1781 EXPORT_SYMBOL(ath10k_core_start);
1782
1783 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1784 {
1785         int ret;
1786         unsigned long time_left;
1787
1788         reinit_completion(&ar->target_suspend);
1789
1790         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1791         if (ret) {
1792                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
1793                 return ret;
1794         }
1795
1796         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
1797
1798         if (!time_left) {
1799                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
1800                 return -ETIMEDOUT;
1801         }
1802
1803         return 0;
1804 }
1805
1806 void ath10k_core_stop(struct ath10k *ar)
1807 {
1808         lockdep_assert_held(&ar->conf_mutex);
1809         ath10k_debug_stop(ar);
1810
1811         /* try to suspend target */
1812         if (ar->state != ATH10K_STATE_RESTARTING &&
1813             ar->state != ATH10K_STATE_UTF)
1814                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1815
1816         ath10k_hif_stop(ar);
1817         ath10k_htt_tx_free(&ar->htt);
1818         ath10k_htt_rx_free(&ar->htt);
1819         ath10k_wmi_detach(ar);
1820 }
1821 EXPORT_SYMBOL(ath10k_core_stop);
1822
1823 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
1824  * order to know what hw capabilities should be advertised to mac80211 it is
1825  * necessary to load the firmware (and tear it down immediately since start
1826  * hook will try to init it again) before registering */
1827 static int ath10k_core_probe_fw(struct ath10k *ar)
1828 {
1829         struct bmi_target_info target_info;
1830         int ret = 0;
1831
1832         ret = ath10k_hif_power_up(ar);
1833         if (ret) {
1834                 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
1835                 return ret;
1836         }
1837
1838         memset(&target_info, 0, sizeof(target_info));
1839         ret = ath10k_bmi_get_target_info(ar, &target_info);
1840         if (ret) {
1841                 ath10k_err(ar, "could not get target info (%d)\n", ret);
1842                 goto err_power_down;
1843         }
1844
1845         ar->target_version = target_info.version;
1846         ar->hw->wiphy->hw_version = target_info.version;
1847
1848         ret = ath10k_init_hw_params(ar);
1849         if (ret) {
1850                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
1851                 goto err_power_down;
1852         }
1853
1854         ret = ath10k_core_fetch_firmware_files(ar);
1855         if (ret) {
1856                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
1857                 goto err_power_down;
1858         }
1859
1860         ath10k_debug_print_hwfw_info(ar);
1861
1862         ret = ath10k_core_pre_cal_download(ar);
1863         if (ret) {
1864                 /* pre calibration data download is not necessary
1865                  * for all the chipsets. Ignore failures and continue.
1866                  */
1867                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1868                            "could not load pre cal data: %d\n", ret);
1869         }
1870
1871         ret = ath10k_core_get_board_id_from_otp(ar);
1872         if (ret && ret != -EOPNOTSUPP) {
1873                 ath10k_err(ar, "failed to get board id from otp: %d\n",
1874                            ret);
1875                 goto err_free_firmware_files;
1876         }
1877
1878         ret = ath10k_core_fetch_board_file(ar);
1879         if (ret) {
1880                 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
1881                 goto err_free_firmware_files;
1882         }
1883
1884         ath10k_debug_print_board_info(ar);
1885
1886         ret = ath10k_core_init_firmware_features(ar);
1887         if (ret) {
1888                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
1889                            ret);
1890                 goto err_free_firmware_files;
1891         }
1892
1893         ret = ath10k_swap_code_seg_init(ar);
1894         if (ret) {
1895                 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
1896                            ret);
1897                 goto err_free_firmware_files;
1898         }
1899
1900         mutex_lock(&ar->conf_mutex);
1901
1902         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
1903         if (ret) {
1904                 ath10k_err(ar, "could not init core (%d)\n", ret);
1905                 goto err_unlock;
1906         }
1907
1908         ath10k_debug_print_boot_info(ar);
1909         ath10k_core_stop(ar);
1910
1911         mutex_unlock(&ar->conf_mutex);
1912
1913         ath10k_hif_power_down(ar);
1914         return 0;
1915
1916 err_unlock:
1917         mutex_unlock(&ar->conf_mutex);
1918
1919 err_free_firmware_files:
1920         ath10k_core_free_firmware_files(ar);
1921
1922 err_power_down:
1923         ath10k_hif_power_down(ar);
1924
1925         return ret;
1926 }
1927
1928 static void ath10k_core_register_work(struct work_struct *work)
1929 {
1930         struct ath10k *ar = container_of(work, struct ath10k, register_work);
1931         int status;
1932
1933         status = ath10k_core_probe_fw(ar);
1934         if (status) {
1935                 ath10k_err(ar, "could not probe fw (%d)\n", status);
1936                 goto err;
1937         }
1938
1939         status = ath10k_mac_register(ar);
1940         if (status) {
1941                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
1942                 goto err_release_fw;
1943         }
1944
1945         status = ath10k_debug_register(ar);
1946         if (status) {
1947                 ath10k_err(ar, "unable to initialize debugfs\n");
1948                 goto err_unregister_mac;
1949         }
1950
1951         status = ath10k_spectral_create(ar);
1952         if (status) {
1953                 ath10k_err(ar, "failed to initialize spectral\n");
1954                 goto err_debug_destroy;
1955         }
1956
1957         status = ath10k_thermal_register(ar);
1958         if (status) {
1959                 ath10k_err(ar, "could not register thermal device: %d\n",
1960                            status);
1961                 goto err_spectral_destroy;
1962         }
1963
1964         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1965         return;
1966
1967 err_spectral_destroy:
1968         ath10k_spectral_destroy(ar);
1969 err_debug_destroy:
1970         ath10k_debug_destroy(ar);
1971 err_unregister_mac:
1972         ath10k_mac_unregister(ar);
1973 err_release_fw:
1974         ath10k_core_free_firmware_files(ar);
1975 err:
1976         /* TODO: It's probably a good idea to release device from the driver
1977          * but calling device_release_driver() here will cause a deadlock.
1978          */
1979         return;
1980 }
1981
1982 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1983 {
1984         ar->chip_id = chip_id;
1985         queue_work(ar->workqueue, &ar->register_work);
1986
1987         return 0;
1988 }
1989 EXPORT_SYMBOL(ath10k_core_register);
1990
1991 void ath10k_core_unregister(struct ath10k *ar)
1992 {
1993         cancel_work_sync(&ar->register_work);
1994
1995         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1996                 return;
1997
1998         ath10k_thermal_unregister(ar);
1999         /* Stop spectral before unregistering from mac80211 to remove the
2000          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2001          * would be already be free'd recursively, leading to a double free.
2002          */
2003         ath10k_spectral_destroy(ar);
2004
2005         /* We must unregister from mac80211 before we stop HTC and HIF.
2006          * Otherwise we will fail to submit commands to FW and mac80211 will be
2007          * unhappy about callback failures. */
2008         ath10k_mac_unregister(ar);
2009
2010         ath10k_testmode_destroy(ar);
2011
2012         ath10k_core_free_firmware_files(ar);
2013         ath10k_core_free_board_files(ar);
2014
2015         ath10k_debug_unregister(ar);
2016 }
2017 EXPORT_SYMBOL(ath10k_core_unregister);
2018
2019 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2020                                   enum ath10k_bus bus,
2021                                   enum ath10k_hw_rev hw_rev,
2022                                   const struct ath10k_hif_ops *hif_ops)
2023 {
2024         struct ath10k *ar;
2025         int ret;
2026
2027         ar = ath10k_mac_create(priv_size);
2028         if (!ar)
2029                 return NULL;
2030
2031         ar->ath_common.priv = ar;
2032         ar->ath_common.hw = ar->hw;
2033         ar->dev = dev;
2034         ar->hw_rev = hw_rev;
2035         ar->hif.ops = hif_ops;
2036         ar->hif.bus = bus;
2037
2038         switch (hw_rev) {
2039         case ATH10K_HW_QCA988X:
2040                 ar->regs = &qca988x_regs;
2041                 ar->hw_values = &qca988x_values;
2042                 break;
2043         case ATH10K_HW_QCA6174:
2044         case ATH10K_HW_QCA9377:
2045                 ar->regs = &qca6174_regs;
2046                 ar->hw_values = &qca6174_values;
2047                 break;
2048         case ATH10K_HW_QCA99X0:
2049                 ar->regs = &qca99x0_regs;
2050                 ar->hw_values = &qca99x0_values;
2051                 break;
2052         case ATH10K_HW_QCA4019:
2053                 ar->regs = &qca4019_regs;
2054                 ar->hw_values = &qca4019_values;
2055                 break;
2056         default:
2057                 ath10k_err(ar, "unsupported core hardware revision %d\n",
2058                            hw_rev);
2059                 ret = -ENOTSUPP;
2060                 goto err_free_mac;
2061         }
2062
2063         init_completion(&ar->scan.started);
2064         init_completion(&ar->scan.completed);
2065         init_completion(&ar->scan.on_channel);
2066         init_completion(&ar->target_suspend);
2067         init_completion(&ar->wow.wakeup_completed);
2068
2069         init_completion(&ar->install_key_done);
2070         init_completion(&ar->vdev_setup_done);
2071         init_completion(&ar->thermal.wmi_sync);
2072
2073         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2074
2075         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2076         if (!ar->workqueue)
2077                 goto err_free_mac;
2078
2079         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2080         if (!ar->workqueue_aux)
2081                 goto err_free_wq;
2082
2083         mutex_init(&ar->conf_mutex);
2084         spin_lock_init(&ar->data_lock);
2085         spin_lock_init(&ar->txqs_lock);
2086
2087         INIT_LIST_HEAD(&ar->txqs);
2088         INIT_LIST_HEAD(&ar->peers);
2089         init_waitqueue_head(&ar->peer_mapping_wq);
2090         init_waitqueue_head(&ar->htt.empty_tx_wq);
2091         init_waitqueue_head(&ar->wmi.tx_credits_wq);
2092
2093         init_completion(&ar->offchan_tx_completed);
2094         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2095         skb_queue_head_init(&ar->offchan_tx_queue);
2096
2097         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2098         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2099
2100         INIT_WORK(&ar->register_work, ath10k_core_register_work);
2101         INIT_WORK(&ar->restart_work, ath10k_core_restart);
2102
2103         ret = ath10k_debug_create(ar);
2104         if (ret)
2105                 goto err_free_aux_wq;
2106
2107         return ar;
2108
2109 err_free_aux_wq:
2110         destroy_workqueue(ar->workqueue_aux);
2111 err_free_wq:
2112         destroy_workqueue(ar->workqueue);
2113
2114 err_free_mac:
2115         ath10k_mac_destroy(ar);
2116
2117         return NULL;
2118 }
2119 EXPORT_SYMBOL(ath10k_core_create);
2120
2121 void ath10k_core_destroy(struct ath10k *ar)
2122 {
2123         flush_workqueue(ar->workqueue);
2124         destroy_workqueue(ar->workqueue);
2125
2126         flush_workqueue(ar->workqueue_aux);
2127         destroy_workqueue(ar->workqueue_aux);
2128
2129         ath10k_debug_destroy(ar);
2130         ath10k_wmi_free_host_mem(ar);
2131         ath10k_mac_destroy(ar);
2132 }
2133 EXPORT_SYMBOL(ath10k_core_destroy);
2134
2135 MODULE_AUTHOR("Qualcomm Atheros");
2136 MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
2137 MODULE_LICENSE("Dual BSD/GPL");