drivers/net/wireless/ath/ath10k/core.c

   1 /*
   2  * Copyright (c) 2005-2011 Atheros Communications Inc.
   3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/firmware.h>
  20 #include <linux/of.h>
  21 #include <asm/byteorder.h>
  22
  23 #include "core.h"
  24 #include "mac.h"
  25 #include "htc.h"
  26 #include "hif.h"
  27 #include "wmi.h"
  28 #include "bmi.h"
  29 #include "debug.h"
  30 #include "htt.h"
  31 #include "testmode.h"
  32 #include "wmi-ops.h"
  33
  34 unsigned int ath10k_debug_mask;
  35 static unsigned int ath10k_cryptmode_param;
  36 static bool uart_print;
  37 static bool skip_otp;
  38 static bool rawmode;
  39
  40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  42 module_param(uart_print, bool, 0644);
  43 module_param(skip_otp, bool, 0644);
  44 module_param(rawmode, bool, 0644);
  45
  46 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  47 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  51
  52 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  53         {
  54                 .id = QCA988X_HW_2_0_VERSION,
  55                 .dev_id = QCA988X_2_0_DEVICE_ID,
  56                 .name = "qca988x hw2.0",
  57                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  58                 .uart_pin = 7,
  59                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  60                 .otp_exe_param = 0,
  61                 .channel_counters_freq_hz = 88000,
  62                 .max_probe_resp_desc_thres = 0,
  63                 .cal_data_len = 2116,
  64                 .fw = {
  65                         .dir = QCA988X_HW_2_0_FW_DIR,
  66                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  67                         .board_size = QCA988X_BOARD_DATA_SZ,
  68                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  69                 },
  70                 .hw_ops = &qca988x_ops,
  71                 .decap_align_bytes = 4,
  72         },
  73         {
  74                 .id = QCA9887_HW_1_0_VERSION,
  75                 .dev_id = QCA9887_1_0_DEVICE_ID,
  76                 .name = "qca9887 hw1.0",
  77                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
  78                 .uart_pin = 7,
  79                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  80                 .otp_exe_param = 0,
  81                 .channel_counters_freq_hz = 88000,
  82                 .max_probe_resp_desc_thres = 0,
  83                 .cal_data_len = 2116,
  84                 .fw = {
  85                         .dir = QCA9887_HW_1_0_FW_DIR,
  86                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
  87                         .board_size = QCA9887_BOARD_DATA_SZ,
  88                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
  89                 },
  90                 .hw_ops = &qca988x_ops,
  91                 .decap_align_bytes = 4,
  92         },
  93         {
  94                 .id = QCA6174_HW_2_1_VERSION,
  95                 .dev_id = QCA6164_2_1_DEVICE_ID,
  96                 .name = "qca6164 hw2.1",
  97                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  98                 .uart_pin = 6,
  99                 .otp_exe_param = 0,
 100                 .channel_counters_freq_hz = 88000,
 101                 .max_probe_resp_desc_thres = 0,
 102                 .cal_data_len = 8124,
 103                 .fw = {
 104                         .dir = QCA6174_HW_2_1_FW_DIR,
 105                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 106                         .board_size = QCA6174_BOARD_DATA_SZ,
 107                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 108                 },
 109                 .hw_ops = &qca988x_ops,
 110                 .decap_align_bytes = 4,
 111         },
 112         {
 113                 .id = QCA6174_HW_2_1_VERSION,
 114                 .dev_id = QCA6174_2_1_DEVICE_ID,
 115                 .name = "qca6174 hw2.1",
 116                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 117                 .uart_pin = 6,
 118                 .otp_exe_param = 0,
 119                 .channel_counters_freq_hz = 88000,
 120                 .max_probe_resp_desc_thres = 0,
 121                 .cal_data_len = 8124,
 122                 .fw = {
 123                         .dir = QCA6174_HW_2_1_FW_DIR,
 124                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 125                         .board_size = QCA6174_BOARD_DATA_SZ,
 126                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 127                 },
 128                 .hw_ops = &qca988x_ops,
 129                 .decap_align_bytes = 4,
 130         },
 131         {
 132                 .id = QCA6174_HW_3_0_VERSION,
 133                 .dev_id = QCA6174_2_1_DEVICE_ID,
 134                 .name = "qca6174 hw3.0",
 135                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 136                 .uart_pin = 6,
 137                 .otp_exe_param = 0,
 138                 .channel_counters_freq_hz = 88000,
 139                 .max_probe_resp_desc_thres = 0,
 140                 .cal_data_len = 8124,
 141                 .fw = {
 142                         .dir = QCA6174_HW_3_0_FW_DIR,
 143                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 144                         .board_size = QCA6174_BOARD_DATA_SZ,
 145                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 146                 },
 147                 .hw_ops = &qca988x_ops,
 148                 .decap_align_bytes = 4,
 149         },
 150         {
 151                 .id = QCA6174_HW_3_2_VERSION,
 152                 .dev_id = QCA6174_2_1_DEVICE_ID,
 153                 .name = "qca6174 hw3.2",
 154                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 155                 .uart_pin = 6,
 156                 .otp_exe_param = 0,
 157                 .channel_counters_freq_hz = 88000,
 158                 .max_probe_resp_desc_thres = 0,
 159                 .cal_data_len = 8124,
 160                 .fw = {
 161                         /* uses same binaries as hw3.0 */
 162                         .dir = QCA6174_HW_3_0_FW_DIR,
 163                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 164                         .board_size = QCA6174_BOARD_DATA_SZ,
 165                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 166                 },
 167                 .hw_ops = &qca988x_ops,
 168                 .decap_align_bytes = 4,
 169         },
 170         {
 171                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 172                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 173                 .name = "qca99x0 hw2.0",
 174                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 175                 .uart_pin = 7,
 176                 .otp_exe_param = 0x00000700,
 177                 .continuous_frag_desc = true,
 178                 .cck_rate_map_rev2 = true,
 179                 .channel_counters_freq_hz = 150000,
 180                 .max_probe_resp_desc_thres = 24,
 181                 .tx_chain_mask = 0xf,
 182                 .rx_chain_mask = 0xf,
 183                 .max_spatial_stream = 4,
 184                 .cal_data_len = 12064,
 185                 .fw = {
 186                         .dir = QCA99X0_HW_2_0_FW_DIR,
 187                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 188                         .board_size = QCA99X0_BOARD_DATA_SZ,
 189                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 190                 },
 191                 .sw_decrypt_mcast_mgmt = true,
 192                 .hw_ops = &qca99x0_ops,
 193                 .decap_align_bytes = 1,
 194         },
 195         {
 196                 .id = QCA9984_HW_1_0_DEV_VERSION,
 197                 .dev_id = QCA9984_1_0_DEVICE_ID,
 198                 .name = "qca9984/qca9994 hw1.0",
 199                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 200                 .uart_pin = 7,
 201                 .otp_exe_param = 0x00000700,
 202                 .continuous_frag_desc = true,
 203                 .cck_rate_map_rev2 = true,
 204                 .channel_counters_freq_hz = 150000,
 205                 .max_probe_resp_desc_thres = 24,
 206                 .tx_chain_mask = 0xf,
 207                 .rx_chain_mask = 0xf,
 208                 .max_spatial_stream = 4,
 209                 .cal_data_len = 12064,
 210                 .fw = {
 211                         .dir = QCA9984_HW_1_0_FW_DIR,
 212                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 213                         .board_size = QCA99X0_BOARD_DATA_SZ,
 214                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 215                 },
 216                 .sw_decrypt_mcast_mgmt = true,
 217                 .hw_ops = &qca99x0_ops,
 218                 .decap_align_bytes = 1,
 219         },
 220         {
 221                 .id = QCA9888_HW_2_0_DEV_VERSION,
 222                 .dev_id = QCA9888_2_0_DEVICE_ID,
 223                 .name = "qca9888 hw2.0",
 224                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 225                 .uart_pin = 7,
 226                 .otp_exe_param = 0x00000700,
 227                 .continuous_frag_desc = true,
 228                 .channel_counters_freq_hz = 150000,
 229                 .max_probe_resp_desc_thres = 24,
 230                 .tx_chain_mask = 3,
 231                 .rx_chain_mask = 3,
 232                 .max_spatial_stream = 2,
 233                 .cal_data_len = 12064,
 234                 .fw = {
 235                         .dir = QCA9888_HW_2_0_FW_DIR,
 236                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 237                         .board_size = QCA99X0_BOARD_DATA_SZ,
 238                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 239                 },
 240                 .sw_decrypt_mcast_mgmt = true,
 241                 .hw_ops = &qca99x0_ops,
 242                 .decap_align_bytes = 1,
 243         },
 244         {
 245                 .id = QCA9377_HW_1_0_DEV_VERSION,
 246                 .dev_id = QCA9377_1_0_DEVICE_ID,
 247                 .name = "qca9377 hw1.0",
 248                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 249                 .uart_pin = 6,
 250                 .otp_exe_param = 0,
 251                 .channel_counters_freq_hz = 88000,
 252                 .max_probe_resp_desc_thres = 0,
 253                 .cal_data_len = 8124,
 254                 .fw = {
 255                         .dir = QCA9377_HW_1_0_FW_DIR,
 256                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 257                         .board_size = QCA9377_BOARD_DATA_SZ,
 258                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 259                 },
 260                 .hw_ops = &qca988x_ops,
 261                 .decap_align_bytes = 4,
 262         },
 263         {
 264                 .id = QCA9377_HW_1_1_DEV_VERSION,
 265                 .dev_id = QCA9377_1_0_DEVICE_ID,
 266                 .name = "qca9377 hw1.1",
 267                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 268                 .uart_pin = 6,
 269                 .otp_exe_param = 0,
 270                 .channel_counters_freq_hz = 88000,
 271                 .max_probe_resp_desc_thres = 0,
 272                 .cal_data_len = 8124,
 273                 .fw = {
 274                         .dir = QCA9377_HW_1_0_FW_DIR,
 275                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 276                         .board_size = QCA9377_BOARD_DATA_SZ,
 277                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 278                 },
 279                 .hw_ops = &qca988x_ops,
 280                 .decap_align_bytes = 4,
 281         },
 282         {
 283                 .id = QCA4019_HW_1_0_DEV_VERSION,
 284                 .dev_id = 0,
 285                 .name = "qca4019 hw1.0",
 286                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 287                 .uart_pin = 7,
 288                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 289                 .otp_exe_param = 0x0010000,
 290                 .continuous_frag_desc = true,
 291                 .cck_rate_map_rev2 = true,
 292                 .channel_counters_freq_hz = 125000,
 293                 .max_probe_resp_desc_thres = 24,
 294                 .tx_chain_mask = 0x3,
 295                 .rx_chain_mask = 0x3,
 296                 .max_spatial_stream = 2,
 297                 .cal_data_len = 12064,
 298                 .fw = {
 299                         .dir = QCA4019_HW_1_0_FW_DIR,
 300                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 301                         .board_size = QCA4019_BOARD_DATA_SZ,
 302                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 303                 },
 304                 .sw_decrypt_mcast_mgmt = true,
 305                 .hw_ops = &qca99x0_ops,
 306                 .decap_align_bytes = 1,
 307         },
 308 };
 309
 310 static const char *const ath10k_core_fw_feature_str[] = {
 311         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 312         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 313         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 314         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 315         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 316         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 317         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 318         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 319         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 320         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 321         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 322         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 323         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 324         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 325         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 326         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 327 };
 328
 329 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 330                                                    size_t buf_len,
 331                                                    enum ath10k_fw_features feat)
 332 {
 333         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 334         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 335                      ATH10K_FW_FEATURE_COUNT);
 336
 337         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 338             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 339                 return scnprintf(buf, buf_len, "bit%d", feat);
 340         }
 341
 342         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 343 }
 344
 345 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 346                                      char *buf,
 347                                      size_t buf_len)
 348 {
 349         unsigned int len = 0;
 350         int i;
 351
 352         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 353                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 354                         if (len > 0)
 355                                 len += scnprintf(buf + len, buf_len - len, ",");
 356
 357                         len += ath10k_core_get_fw_feature_str(buf + len,
 358                                                               buf_len - len,
 359                                                               i);
 360                 }
 361         }
 362 }
 363
 364 static void ath10k_send_suspend_complete(struct ath10k *ar)
 365 {
 366         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 367
 368         complete(&ar->target_suspend);
 369 }
 370
 371 static int ath10k_init_configure_target(struct ath10k *ar)
 372 {
 373         u32 param_host;
 374         int ret;
 375
 376         /* tell target which HTC version it is used*/
 377         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 378                                  HTC_PROTOCOL_VERSION);
 379         if (ret) {
 380                 ath10k_err(ar, "settings HTC version failed\n");
 381                 return ret;
 382         }
 383
 384         /* set the firmware mode to STA/IBSS/AP */
 385         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 386         if (ret) {
 387                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 388                 return ret;
 389         }
 390
 391         /* TODO following parameters need to be re-visited. */
 392         /* num_device */
 393         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 394         /* Firmware mode */
 395         /* FIXME: Why FW_MODE_AP ??.*/
 396         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 397         /* mac_addr_method */
 398         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 399         /* firmware_bridge */
 400         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 401         /* fwsubmode */
 402         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 403
 404         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 405         if (ret) {
 406                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 407                 return ret;
 408         }
 409
 410         /* We do all byte-swapping on the host */
 411         ret = ath10k_bmi_write32(ar, hi_be, 0);
 412         if (ret) {
 413                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 414                 return ret;
 415         }
 416
 417         /* FW descriptor/Data swap flags */
 418         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 419
 420         if (ret) {
 421                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 422                 return ret;
 423         }
 424
 425         /* Some devices have a special sanity check that verifies the PCI
 426          * Device ID is written to this host interest var. It is known to be
 427          * required to boot QCA6164.
 428          */
 429         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 430                                  ar->dev_id);
 431         if (ret) {
 432                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 433                 return ret;
 434         }
 435
 436         return 0;
 437 }
 438
 439 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 440                                                    const char *dir,
 441                                                    const char *file)
 442 {
 443         char filename[100];
 444         const struct firmware *fw;
 445         int ret;
 446
 447         if (file == NULL)
 448                 return ERR_PTR(-ENOENT);
 449
 450         if (dir == NULL)
 451                 dir = ".";
 452
 453         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 454         ret = request_firmware(&fw, filename, ar->dev);
 455         if (ret)
 456                 return ERR_PTR(ret);
 457
 458         return fw;
 459 }
 460
 461 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 462                                       size_t data_len)
 463 {
 464         u32 board_data_size = ar->hw_params.fw.board_size;
 465         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 466         u32 board_ext_data_addr;
 467         int ret;
 468
 469         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 470         if (ret) {
 471                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 472                            ret);
 473                 return ret;
 474         }
 475
 476         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 477                    "boot push board extended data addr 0x%x\n",
 478                    board_ext_data_addr);
 479
 480         if (board_ext_data_addr == 0)
 481                 return 0;
 482
 483         if (data_len != (board_data_size + board_ext_data_size)) {
 484                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 485                            data_len, board_data_size, board_ext_data_size);
 486                 return -EINVAL;
 487         }
 488
 489         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 490                                       data + board_data_size,
 491                                       board_ext_data_size);
 492         if (ret) {
 493                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 494                 return ret;
 495         }
 496
 497         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 498                                  (board_ext_data_size << 16) | 1);
 499         if (ret) {
 500                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 501                            ret);
 502                 return ret;
 503         }
 504
 505         return 0;
 506 }
 507
 508 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
 509                                       size_t data_len)
 510 {
 511         u32 board_data_size = ar->hw_params.fw.board_size;
 512         u32 address;
 513         int ret;
 514
 515         ret = ath10k_push_board_ext_data(ar, data, data_len);
 516         if (ret) {
 517                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
 518                 goto exit;
 519         }
 520
 521         ret = ath10k_bmi_read32(ar, hi_board_data, &address);
 522         if (ret) {
 523                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
 524                 goto exit;
 525         }
 526
 527         ret = ath10k_bmi_write_memory(ar, address, data,
 528                                       min_t(u32, board_data_size,
 529                                             data_len));
 530         if (ret) {
 531                 ath10k_err(ar, "could not write board data (%d)\n", ret);
 532                 goto exit;
 533         }
 534
 535         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
 536         if (ret) {
 537                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
 538                 goto exit;
 539         }
 540
 541 exit:
 542         return ret;
 543 }
 544
 545 static int ath10k_download_cal_file(struct ath10k *ar,
 546                                     const struct firmware *file)
 547 {
 548         int ret;
 549
 550         if (!file)
 551                 return -ENOENT;
 552
 553         if (IS_ERR(file))
 554                 return PTR_ERR(file);
 555
 556         ret = ath10k_download_board_data(ar, file->data, file->size);
 557         if (ret) {
 558                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
 559                 return ret;
 560         }
 561
 562         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
 563
 564         return 0;
 565 }
 566
 567 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
 568 {
 569         struct device_node *node;
 570         int data_len;
 571         void *data;
 572         int ret;
 573
 574         node = ar->dev->of_node;
 575         if (!node)
 576                 /* Device Tree is optional, don't print any warnings if
 577                  * there's no node for ath10k.
 578                  */
 579                 return -ENOENT;
 580
 581         if (!of_get_property(node, dt_name, &data_len)) {
 582                 /* The calibration data node is optional */
 583                 return -ENOENT;
 584         }
 585
 586         if (data_len != ar->hw_params.cal_data_len) {
 587                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
 588                             data_len);
 589                 ret = -EMSGSIZE;
 590                 goto out;
 591         }
 592
 593         data = kmalloc(data_len, GFP_KERNEL);
 594         if (!data) {
 595                 ret = -ENOMEM;
 596                 goto out;
 597         }
 598
 599         ret = of_property_read_u8_array(node, dt_name, data, data_len);
 600         if (ret) {
 601                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
 602                             ret);
 603                 goto out_free;
 604         }
 605
 606         ret = ath10k_download_board_data(ar, data, data_len);
 607         if (ret) {
 608                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
 609                             ret);
 610                 goto out_free;
 611         }
 612
 613         ret = 0;
 614
 615 out_free:
 616         kfree(data);
 617
 618 out:
 619         return ret;
 620 }
 621
 622 static int ath10k_download_cal_eeprom(struct ath10k *ar)
 623 {
 624         size_t data_len;
 625         void *data = NULL;
 626         int ret;
 627
 628         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
 629         if (ret) {
 630                 if (ret != -EOPNOTSUPP)
 631                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
 632                                     ret);
 633                 goto out_free;
 634         }
 635
 636         ret = ath10k_download_board_data(ar, data, data_len);
 637         if (ret) {
 638                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
 639                             ret);
 640                 goto out_free;
 641         }
 642
 643         ret = 0;
 644
 645 out_free:
 646         kfree(data);
 647
 648         return ret;
 649 }
 650
 651 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 652 {
 653         u32 result, address;
 654         u8 board_id, chip_id;
 655         int ret;
 656
 657         address = ar->hw_params.patch_load_addr;
 658
 659         if (!ar->normal_mode_fw.fw_file.otp_data ||
 660             !ar->normal_mode_fw.fw_file.otp_len) {
 661                 ath10k_warn(ar,
 662                             "failed to retrieve board id because of invalid otp\n");
 663                 return -ENODATA;
 664         }
 665
 666         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 667                    "boot upload otp to 0x%x len %zd for board id\n",
 668                    address, ar->normal_mode_fw.fw_file.otp_len);
 669
 670         ret = ath10k_bmi_fast_download(ar, address,
 671                                        ar->normal_mode_fw.fw_file.otp_data,
 672                                        ar->normal_mode_fw.fw_file.otp_len);
 673         if (ret) {
 674                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 675                            ret);
 676                 return ret;
 677         }
 678
 679         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
 680                                  &result);
 681         if (ret) {
 682                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 683                            ret);
 684                 return ret;
 685         }
 686
 687         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 688         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 689
 690         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 691                    "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
 692                    result, board_id, chip_id);
 693
 694         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0)
 695                 return -EOPNOTSUPP;
 696
 697         ar->id.bmi_ids_valid = true;
 698         ar->id.bmi_board_id = board_id;
 699         ar->id.bmi_chip_id = chip_id;
 700
 701         return 0;
 702 }
 703
 704 static int ath10k_download_and_run_otp(struct ath10k *ar)
 705 {
 706         u32 result, address = ar->hw_params.patch_load_addr;
 707         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
 708         int ret;
 709
 710         ret = ath10k_download_board_data(ar,
 711                                          ar->running_fw->board_data,
 712                                          ar->running_fw->board_len);
 713         if (ret) {
 714                 ath10k_err(ar, "failed to download board data: %d\n", ret);
 715                 return ret;
 716         }
 717
 718         /* OTP is optional */
 719
 720         if (!ar->running_fw->fw_file.otp_data ||
 721             !ar->running_fw->fw_file.otp_len) {
 722                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
 723                             ar->running_fw->fw_file.otp_data,
 724                             ar->running_fw->fw_file.otp_len);
 725                 return 0;
 726         }
 727
 728         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
 729                    address, ar->running_fw->fw_file.otp_len);
 730
 731         ret = ath10k_bmi_fast_download(ar, address,
 732                                        ar->running_fw->fw_file.otp_data,
 733                                        ar->running_fw->fw_file.otp_len);
 734         if (ret) {
 735                 ath10k_err(ar, "could not write otp (%d)\n", ret);
 736                 return ret;
 737         }
 738
 739         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
 740         if (ret) {
 741                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
 742                 return ret;
 743         }
 744
 745         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
 746
 747         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
 748                                    ar->running_fw->fw_file.fw_features)) &&
 749             result != 0) {
 750                 ath10k_err(ar, "otp calibration failed: %d", result);
 751                 return -EINVAL;
 752         }
 753
 754         return 0;
 755 }
 756
 757 static int ath10k_download_fw(struct ath10k *ar)
 758 {
 759         u32 address, data_len;
 760         const void *data;
 761         int ret;
 762
 763         address = ar->hw_params.patch_load_addr;
 764
 765         data = ar->running_fw->fw_file.firmware_data;
 766         data_len = ar->running_fw->fw_file.firmware_len;
 767
 768         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
 769         if (ret) {
 770                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
 771                            ret);
 772                 return ret;
 773         }
 774
 775         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 776                    "boot uploading firmware image %pK len %d\n",
 777                    data, data_len);
 778
 779         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
 780         if (ret) {
 781                 ath10k_err(ar, "failed to download firmware: %d\n",
 782                            ret);
 783                 return ret;
 784         }
 785
 786         return ret;
 787 }
 788
 789 static void ath10k_core_free_board_files(struct ath10k *ar)
 790 {
 791         if (!IS_ERR(ar->normal_mode_fw.board))
 792                 release_firmware(ar->normal_mode_fw.board);
 793
 794         ar->normal_mode_fw.board = NULL;
 795         ar->normal_mode_fw.board_data = NULL;
 796         ar->normal_mode_fw.board_len = 0;
 797 }
 798
 799 static void ath10k_core_free_firmware_files(struct ath10k *ar)
 800 {
 801         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
 802                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
 803
 804         if (!IS_ERR(ar->cal_file))
 805                 release_firmware(ar->cal_file);
 806
 807         if (!IS_ERR(ar->pre_cal_file))
 808                 release_firmware(ar->pre_cal_file);
 809
 810         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
 811
 812         ar->normal_mode_fw.fw_file.otp_data = NULL;
 813         ar->normal_mode_fw.fw_file.otp_len = 0;
 814
 815         ar->normal_mode_fw.fw_file.firmware = NULL;
 816         ar->normal_mode_fw.fw_file.firmware_data = NULL;
 817         ar->normal_mode_fw.fw_file.firmware_len = 0;
 818
 819         ar->cal_file = NULL;
 820         ar->pre_cal_file = NULL;
 821 }
 822
 823 static int ath10k_fetch_cal_file(struct ath10k *ar)
 824 {
 825         char filename[100];
 826
 827         /* pre-cal-<bus>-<id>.bin */
 828         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
 829                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 830
 831         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 832         if (!IS_ERR(ar->pre_cal_file))
 833                 goto success;
 834
 835         /* cal-<bus>-<id>.bin */
 836         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
 837                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 838
 839         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 840         if (IS_ERR(ar->cal_file))
 841                 /* calibration file is optional, don't print any warnings */
 842                 return PTR_ERR(ar->cal_file);
 843 success:
 844         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
 845                    ATH10K_FW_DIR, filename);
 846
 847         return 0;
 848 }
 849
 850 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
 851 {
 852         if (!ar->hw_params.fw.board) {
 853                 ath10k_err(ar, "failed to find board file fw entry\n");
 854                 return -EINVAL;
 855         }
 856
 857         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
 858                                                         ar->hw_params.fw.dir,
 859                                                         ar->hw_params.fw.board);
 860         if (IS_ERR(ar->normal_mode_fw.board))
 861                 return PTR_ERR(ar->normal_mode_fw.board);
 862
 863         ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
 864         ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
 865
 866         return 0;
 867 }
 868
 869 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
 870                                          const void *buf, size_t buf_len,
 871                                          const char *boardname)
 872 {
 873         const struct ath10k_fw_ie *hdr;
 874         bool name_match_found;
 875         int ret, board_ie_id;
 876         size_t board_ie_len;
 877         const void *board_ie_data;
 878
 879         name_match_found = false;
 880
 881         /* go through ATH10K_BD_IE_BOARD_ elements */
 882         while (buf_len > sizeof(struct ath10k_fw_ie)) {
 883                 hdr = buf;
 884                 board_ie_id = le32_to_cpu(hdr->id);
 885                 board_ie_len = le32_to_cpu(hdr->len);
 886                 board_ie_data = hdr->data;
 887
 888                 buf_len -= sizeof(*hdr);
 889                 buf += sizeof(*hdr);
 890
 891                 if (buf_len < ALIGN(board_ie_len, 4)) {
 892                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
 893                                    buf_len, ALIGN(board_ie_len, 4));
 894                         ret = -EINVAL;
 895                         goto out;
 896                 }
 897
 898                 switch (board_ie_id) {
 899                 case ATH10K_BD_IE_BOARD_NAME:
 900                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
 901                                         board_ie_data, board_ie_len);
 902
 903                         if (board_ie_len != strlen(boardname))
 904                                 break;
 905
 906                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
 907                         if (ret)
 908                                 break;
 909
 910                         name_match_found = true;
 911                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 912                                    "boot found match for name '%s'",
 913                                    boardname);
 914                         break;
 915                 case ATH10K_BD_IE_BOARD_DATA:
 916                         if (!name_match_found)
 917                                 /* no match found */
 918                                 break;
 919
 920                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 921                                    "boot found board data for '%s'",
 922                                    boardname);
 923
 924                         ar->normal_mode_fw.board_data = board_ie_data;
 925                         ar->normal_mode_fw.board_len = board_ie_len;
 926
 927                         ret = 0;
 928                         goto out;
 929                 default:
 930                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
 931                                     board_ie_id);
 932                         break;
 933                 }
 934
 935                 /* jump over the padding */
 936                 board_ie_len = ALIGN(board_ie_len, 4);
 937
 938                 buf_len -= board_ie_len;
 939                 buf += board_ie_len;
 940         }
 941
 942         /* no match found */
 943         ret = -ENOENT;
 944
 945 out:
 946         return ret;
 947 }
 948
 949 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
 950                                               const char *boardname,
 951                                               const char *filename)
 952 {
 953         size_t len, magic_len, ie_len;
 954         struct ath10k_fw_ie *hdr;
 955         const u8 *data;
 956         int ret, ie_id;
 957
 958         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
 959                                                         ar->hw_params.fw.dir,
 960                                                         filename);
 961         if (IS_ERR(ar->normal_mode_fw.board))
 962                 return PTR_ERR(ar->normal_mode_fw.board);
 963
 964         data = ar->normal_mode_fw.board->data;
 965         len = ar->normal_mode_fw.board->size;
 966
 967         /* magic has extra null byte padded */
 968         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
 969         if (len < magic_len) {
 970                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
 971                            ar->hw_params.fw.dir, filename, len);
 972                 ret = -EINVAL;
 973                 goto err;
 974         }
 975
 976         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
 977                 ath10k_err(ar, "found invalid board magic\n");
 978                 ret = -EINVAL;
 979                 goto err;
 980         }
 981
 982         /* magic is padded to 4 bytes */
 983         magic_len = ALIGN(magic_len, 4);
 984         if (len < magic_len) {
 985                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
 986                            ar->hw_params.fw.dir, filename, len);
 987                 ret = -EINVAL;
 988                 goto err;
 989         }
 990
 991         data += magic_len;
 992         len -= magic_len;
 993
 994         while (len > sizeof(struct ath10k_fw_ie)) {
 995                 hdr = (struct ath10k_fw_ie *)data;
 996                 ie_id = le32_to_cpu(hdr->id);
 997                 ie_len = le32_to_cpu(hdr->len);
 998
 999                 len -= sizeof(*hdr);
1000                 data = hdr->data;
1001
1002                 if (len < ALIGN(ie_len, 4)) {
1003                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1004                                    ie_id, ie_len, len);
1005                         ret = -EINVAL;
1006                         goto err;
1007                 }
1008
1009                 switch (ie_id) {
1010                 case ATH10K_BD_IE_BOARD:
1011                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1012                                                             boardname);
1013                         if (ret == -ENOENT)
1014                                 /* no match found, continue */
1015                                 break;
1016                         else if (ret)
1017                                 /* there was an error, bail out */
1018                                 goto err;
1019
1020                         /* board data found */
1021                         goto out;
1022                 }
1023
1024                 /* jump over the padding */
1025                 ie_len = ALIGN(ie_len, 4);
1026
1027                 len -= ie_len;
1028                 data += ie_len;
1029         }
1030
1031 out:
1032         if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
1033                 ath10k_err(ar,
1034                            "failed to fetch board data for %s from %s/%s\n",
1035                            boardname, ar->hw_params.fw.dir, filename);
1036                 ret = -ENODATA;
1037                 goto err;
1038         }
1039
1040         return 0;
1041
1042 err:
1043         ath10k_core_free_board_files(ar);
1044         return ret;
1045 }
1046
1047 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1048                                          size_t name_len)
1049 {
1050         if (ar->id.bmi_ids_valid) {
1051                 scnprintf(name, name_len,
1052                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
1053                           ath10k_bus_str(ar->hif.bus),
1054                           ar->id.bmi_chip_id,
1055                           ar->id.bmi_board_id);
1056                 goto out;
1057         }
1058
1059         scnprintf(name, name_len,
1060                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x",
1061                   ath10k_bus_str(ar->hif.bus),
1062                   ar->id.vendor, ar->id.device,
1063                   ar->id.subsystem_vendor, ar->id.subsystem_device);
1064
1065 out:
1066         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1067
1068         return 0;
1069 }
1070
1071 static int ath10k_core_fetch_board_file(struct ath10k *ar)
1072 {
1073         char boardname[100];
1074         int ret;
1075
1076         ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
1077         if (ret) {
1078                 ath10k_err(ar, "failed to create board name: %d", ret);
1079                 return ret;
1080         }
1081
1082         ar->bd_api = 2;
1083         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1084                                                  ATH10K_BOARD_API2_FILE);
1085         if (!ret)
1086                 goto success;
1087
1088         ar->bd_api = 1;
1089         ret = ath10k_core_fetch_board_data_api_1(ar);
1090         if (ret) {
1091                 ath10k_err(ar, "failed to fetch board data\n");
1092                 return ret;
1093         }
1094
1095 success:
1096         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1097         return 0;
1098 }
1099
1100 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1101                                      struct ath10k_fw_file *fw_file)
1102 {
1103         size_t magic_len, len, ie_len;
1104         int ie_id, i, index, bit, ret;
1105         struct ath10k_fw_ie *hdr;
1106         const u8 *data;
1107         __le32 *timestamp, *version;
1108
1109         /* first fetch the firmware file (firmware-*.bin) */
1110         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1111                                                  name);
1112         if (IS_ERR(fw_file->firmware)) {
1113                 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
1114                            ar->hw_params.fw.dir, name,
1115                            PTR_ERR(fw_file->firmware));
1116                 return PTR_ERR(fw_file->firmware);
1117         }
1118
1119         data = fw_file->firmware->data;
1120         len = fw_file->firmware->size;
1121
1122         /* magic also includes the null byte, check that as well */
1123         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1124
1125         if (len < magic_len) {
1126                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1127                            ar->hw_params.fw.dir, name, len);
1128                 ret = -EINVAL;
1129                 goto err;
1130         }
1131
1132         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1133                 ath10k_err(ar, "invalid firmware magic\n");
1134                 ret = -EINVAL;
1135                 goto err;
1136         }
1137
1138         /* jump over the padding */
1139         magic_len = ALIGN(magic_len, 4);
1140
1141         len -= magic_len;
1142         data += magic_len;
1143
1144         /* loop elements */
1145         while (len > sizeof(struct ath10k_fw_ie)) {
1146                 hdr = (struct ath10k_fw_ie *)data;
1147
1148                 ie_id = le32_to_cpu(hdr->id);
1149                 ie_len = le32_to_cpu(hdr->len);
1150
1151                 len -= sizeof(*hdr);
1152                 data += sizeof(*hdr);
1153
1154                 if (len < ie_len) {
1155                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1156                                    ie_id, len, ie_len);
1157                         ret = -EINVAL;
1158                         goto err;
1159                 }
1160
1161                 switch (ie_id) {
1162                 case ATH10K_FW_IE_FW_VERSION:
1163                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1164                                 break;
1165
1166                         memcpy(fw_file->fw_version, data, ie_len);
1167                         fw_file->fw_version[ie_len] = '\0';
1168
1169                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1170                                    "found fw version %s\n",
1171                                     fw_file->fw_version);
1172                         break;
1173                 case ATH10K_FW_IE_TIMESTAMP:
1174                         if (ie_len != sizeof(u32))
1175                                 break;
1176
1177                         timestamp = (__le32 *)data;
1178
1179                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1180                                    le32_to_cpup(timestamp));
1181                         break;
1182                 case ATH10K_FW_IE_FEATURES:
1183                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1184                                    "found firmware features ie (%zd B)\n",
1185                                    ie_len);
1186
1187                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1188                                 index = i / 8;
1189                                 bit = i % 8;
1190
1191                                 if (index == ie_len)
1192                                         break;
1193
1194                                 if (data[index] & (1 << bit)) {
1195                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1196                                                    "Enabling feature bit: %i\n",
1197                                                    i);
1198                                         __set_bit(i, fw_file->fw_features);
1199                                 }
1200                         }
1201
1202                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1203                                         fw_file->fw_features,
1204                                         sizeof(fw_file->fw_features));
1205                         break;
1206                 case ATH10K_FW_IE_FW_IMAGE:
1207                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1208                                    "found fw image ie (%zd B)\n",
1209                                    ie_len);
1210
1211                         fw_file->firmware_data = data;
1212                         fw_file->firmware_len = ie_len;
1213
1214                         break;
1215                 case ATH10K_FW_IE_OTP_IMAGE:
1216                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1217                                    "found otp image ie (%zd B)\n",
1218                                    ie_len);
1219
1220                         fw_file->otp_data = data;
1221                         fw_file->otp_len = ie_len;
1222
1223                         break;
1224                 case ATH10K_FW_IE_WMI_OP_VERSION:
1225                         if (ie_len != sizeof(u32))
1226                                 break;
1227
1228                         version = (__le32 *)data;
1229
1230                         fw_file->wmi_op_version = le32_to_cpup(version);
1231
1232                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1233                                    fw_file->wmi_op_version);
1234                         break;
1235                 case ATH10K_FW_IE_HTT_OP_VERSION:
1236                         if (ie_len != sizeof(u32))
1237                                 break;
1238
1239                         version = (__le32 *)data;
1240
1241                         fw_file->htt_op_version = le32_to_cpup(version);
1242
1243                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1244                                    fw_file->htt_op_version);
1245                         break;
1246                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1247                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1248                                    "found fw code swap image ie (%zd B)\n",
1249                                    ie_len);
1250                         fw_file->codeswap_data = data;
1251                         fw_file->codeswap_len = ie_len;
1252                         break;
1253                 default:
1254                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1255                                     le32_to_cpu(hdr->id));
1256                         break;
1257                 }
1258
1259                 /* jump over the padding */
1260                 ie_len = ALIGN(ie_len, 4);
1261
1262                 len -= ie_len;
1263                 data += ie_len;
1264         }
1265
1266         if (!fw_file->firmware_data ||
1267             !fw_file->firmware_len) {
1268                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1269                             ar->hw_params.fw.dir, name);
1270                 ret = -ENOMEDIUM;
1271                 goto err;
1272         }
1273
1274         return 0;
1275
1276 err:
1277         ath10k_core_free_firmware_files(ar);
1278         return ret;
1279 }
1280
1281 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1282 {
1283         int ret;
1284
1285         /* calibration file is optional, don't check for any errors */
1286         ath10k_fetch_cal_file(ar);
1287
1288         ar->fw_api = 5;
1289         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1290
1291         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE,
1292                                                &ar->normal_mode_fw.fw_file);
1293         if (ret == 0)
1294                 goto success;
1295
1296         ar->fw_api = 4;
1297         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1298
1299         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE,
1300                                                &ar->normal_mode_fw.fw_file);
1301         if (ret == 0)
1302                 goto success;
1303
1304         ar->fw_api = 3;
1305         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1306
1307         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE,
1308                                                &ar->normal_mode_fw.fw_file);
1309         if (ret == 0)
1310                 goto success;
1311
1312         ar->fw_api = 2;
1313         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1314
1315         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE,
1316                                                &ar->normal_mode_fw.fw_file);
1317         if (ret)
1318                 return ret;
1319
1320 success:
1321         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1322
1323         return 0;
1324 }
1325
1326 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1327 {
1328         int ret;
1329
1330         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1331         if (ret == 0) {
1332                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1333                 goto success;
1334         }
1335
1336         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1337                    "boot did not find a pre calibration file, try DT next: %d\n",
1338                    ret);
1339
1340         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1341         if (ret) {
1342                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1343                            "unable to load pre cal data from DT: %d\n", ret);
1344                 return ret;
1345         }
1346         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1347
1348 success:
1349         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1350                    ath10k_cal_mode_str(ar->cal_mode));
1351
1352         return 0;
1353 }
1354
1355 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1356 {
1357         int ret;
1358
1359         ret = ath10k_core_pre_cal_download(ar);
1360         if (ret) {
1361                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1362                            "failed to load pre cal data: %d\n", ret);
1363                 return ret;
1364         }
1365
1366         ret = ath10k_core_get_board_id_from_otp(ar);
1367         if (ret) {
1368                 ath10k_err(ar, "failed to get board id: %d\n", ret);
1369                 return ret;
1370         }
1371
1372         ret = ath10k_download_and_run_otp(ar);
1373         if (ret) {
1374                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1375                 return ret;
1376         }
1377
1378         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1379                    "pre cal configuration done successfully\n");
1380
1381         return 0;
1382 }
1383
1384 static int ath10k_download_cal_data(struct ath10k *ar)
1385 {
1386         int ret;
1387
1388         ret = ath10k_core_pre_cal_config(ar);
1389         if (ret == 0)
1390                 return 0;
1391
1392         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1393                    "pre cal download procedure failed, try cal file: %d\n",
1394                    ret);
1395
1396         ret = ath10k_download_cal_file(ar, ar->cal_file);
1397         if (ret == 0) {
1398                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1399                 goto done;
1400         }
1401
1402         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1403                    "boot did not find a calibration file, try DT next: %d\n",
1404                    ret);
1405
1406         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1407         if (ret == 0) {
1408                 ar->cal_mode = ATH10K_CAL_MODE_DT;
1409                 goto done;
1410         }
1411
1412         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1413                    "boot did not find DT entry, try target EEPROM next: %d\n",
1414                    ret);
1415
1416         ret = ath10k_download_cal_eeprom(ar);
1417         if (ret == 0) {
1418                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1419                 goto done;
1420         }
1421
1422         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1423                    "boot did not find target EEPROM entry, try OTP next: %d\n",
1424                    ret);
1425
1426         ret = ath10k_download_and_run_otp(ar);
1427         if (ret) {
1428                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1429                 return ret;
1430         }
1431
1432         ar->cal_mode = ATH10K_CAL_MODE_OTP;
1433
1434 done:
1435         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1436                    ath10k_cal_mode_str(ar->cal_mode));
1437         return 0;
1438 }
1439
1440 static int ath10k_init_uart(struct ath10k *ar)
1441 {
1442         int ret;
1443
1444         /*
1445          * Explicitly setting UART prints to zero as target turns it on
1446          * based on scratch registers.
1447          */
1448         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1449         if (ret) {
1450                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1451                 return ret;
1452         }
1453
1454         if (!uart_print)
1455                 return 0;
1456
1457         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1458         if (ret) {
1459                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1460                 return ret;
1461         }
1462
1463         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1464         if (ret) {
1465                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1466                 return ret;
1467         }
1468
1469         /* Set the UART baud rate to 19200. */
1470         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1471         if (ret) {
1472                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1473                 return ret;
1474         }
1475
1476         ath10k_info(ar, "UART prints enabled\n");
1477         return 0;
1478 }
1479
1480 static int ath10k_init_hw_params(struct ath10k *ar)
1481 {
1482         const struct ath10k_hw_params *uninitialized_var(hw_params);
1483         int i;
1484
1485         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1486                 hw_params = &ath10k_hw_params_list[i];
1487
1488                 if (hw_params->id == ar->target_version &&
1489                     hw_params->dev_id == ar->dev_id)
1490                         break;
1491         }
1492
1493         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1494                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1495                            ar->target_version);
1496                 return -EINVAL;
1497         }
1498
1499         ar->hw_params = *hw_params;
1500
1501         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1502                    ar->hw_params.name, ar->target_version);
1503
1504         return 0;
1505 }
1506
1507 static void ath10k_core_restart(struct work_struct *work)
1508 {
1509         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1510
1511         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1512
1513         /* Place a barrier to make sure the compiler doesn't reorder
1514          * CRASH_FLUSH and calling other functions.
1515          */
1516         barrier();
1517
1518         ieee80211_stop_queues(ar->hw);
1519         ath10k_drain_tx(ar);
1520         complete(&ar->scan.started);
1521         complete(&ar->scan.completed);
1522         complete(&ar->scan.on_channel);
1523         complete(&ar->offchan_tx_completed);
1524         complete(&ar->install_key_done);
1525         complete(&ar->vdev_setup_done);
1526         complete(&ar->thermal.wmi_sync);
1527         complete(&ar->bss_survey_done);
1528         wake_up(&ar->htt.empty_tx_wq);
1529         wake_up(&ar->wmi.tx_credits_wq);
1530         wake_up(&ar->peer_mapping_wq);
1531
1532         mutex_lock(&ar->conf_mutex);
1533
1534         switch (ar->state) {
1535         case ATH10K_STATE_ON:
1536                 ar->state = ATH10K_STATE_RESTARTING;
1537                 ath10k_hif_stop(ar);
1538                 ath10k_scan_finish(ar);
1539                 ieee80211_restart_hw(ar->hw);
1540                 break;
1541         case ATH10K_STATE_OFF:
1542                 /* this can happen if driver is being unloaded
1543                  * or if the crash happens during FW probing */
1544                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1545                 break;
1546         case ATH10K_STATE_RESTARTING:
1547                 /* hw restart might be requested from multiple places */
1548                 break;
1549         case ATH10K_STATE_RESTARTED:
1550                 ar->state = ATH10K_STATE_WEDGED;
1551                 /* fall through */
1552         case ATH10K_STATE_WEDGED:
1553                 ath10k_warn(ar, "device is wedged, will not restart\n");
1554                 break;
1555         case ATH10K_STATE_UTF:
1556                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1557                 break;
1558         }
1559
1560         mutex_unlock(&ar->conf_mutex);
1561 }
1562
1563 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1564 {
1565         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1566
1567         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1568             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1569                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1570                 return -EINVAL;
1571         }
1572
1573         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1574                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1575                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1576                 return -EINVAL;
1577         }
1578
1579         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1580         switch (ath10k_cryptmode_param) {
1581         case ATH10K_CRYPT_MODE_HW:
1582                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1583                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1584                 break;
1585         case ATH10K_CRYPT_MODE_SW:
1586                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1587                               fw_file->fw_features)) {
1588                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1589                         return -EINVAL;
1590                 }
1591
1592                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1593                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1594                 break;
1595         default:
1596                 ath10k_info(ar, "invalid cryptmode: %d\n",
1597                             ath10k_cryptmode_param);
1598                 return -EINVAL;
1599         }
1600
1601         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1602         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1603
1604         if (rawmode) {
1605                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1606                               fw_file->fw_features)) {
1607                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
1608                         return -EINVAL;
1609                 }
1610                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1611         }
1612
1613         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1614                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1615
1616                 /* Workaround:
1617                  *
1618                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1619                  * and causes enormous performance issues (malformed frames,
1620                  * etc).
1621                  *
1622                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
1623                  * albeit a bit slower compared to regular operation.
1624                  */
1625                 ar->htt.max_num_amsdu = 1;
1626         }
1627
1628         /* Backwards compatibility for firmwares without
1629          * ATH10K_FW_IE_WMI_OP_VERSION.
1630          */
1631         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1632                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1633                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1634                                      fw_file->fw_features))
1635                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1636                         else
1637                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1638                 } else {
1639                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1640                 }
1641         }
1642
1643         switch (fw_file->wmi_op_version) {
1644         case ATH10K_FW_WMI_OP_VERSION_MAIN:
1645                 ar->max_num_peers = TARGET_NUM_PEERS;
1646                 ar->max_num_stations = TARGET_NUM_STATIONS;
1647                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1648                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1649                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1650                         WMI_STAT_PEER;
1651                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1652                 break;
1653         case ATH10K_FW_WMI_OP_VERSION_10_1:
1654         case ATH10K_FW_WMI_OP_VERSION_10_2:
1655         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1656                 if (ath10k_peer_stats_enabled(ar)) {
1657                         ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1658                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1659                 } else {
1660                         ar->max_num_peers = TARGET_10X_NUM_PEERS;
1661                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1662                 }
1663                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1664                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1665                 ar->fw_stats_req_mask = WMI_STAT_PEER;
1666                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1667                 break;
1668         case ATH10K_FW_WMI_OP_VERSION_TLV:
1669                 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1670                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1671                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1672                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1673                 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1674                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1675                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1676                         WMI_STAT_PEER;
1677                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1678                 break;
1679         case ATH10K_FW_WMI_OP_VERSION_10_4:
1680                 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1681                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1682                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1683                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1684                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1685                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1686                                         WMI_10_4_STAT_PEER_EXTD;
1687                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
1688
1689                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1690                              fw_file->fw_features))
1691                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1692                 else
1693                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1694                 break;
1695         case ATH10K_FW_WMI_OP_VERSION_UNSET:
1696         case ATH10K_FW_WMI_OP_VERSION_MAX:
1697                 WARN_ON(1);
1698                 return -EINVAL;
1699         }
1700
1701         /* Backwards compatibility for firmwares without
1702          * ATH10K_FW_IE_HTT_OP_VERSION.
1703          */
1704         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1705                 switch (fw_file->wmi_op_version) {
1706                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1707                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1708                         break;
1709                 case ATH10K_FW_WMI_OP_VERSION_10_1:
1710                 case ATH10K_FW_WMI_OP_VERSION_10_2:
1711                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1712                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1713                         break;
1714                 case ATH10K_FW_WMI_OP_VERSION_TLV:
1715                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1716                         break;
1717                 case ATH10K_FW_WMI_OP_VERSION_10_4:
1718                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1719                 case ATH10K_FW_WMI_OP_VERSION_MAX:
1720                         ath10k_err(ar, "htt op version not found from fw meta data");
1721                         return -EINVAL;
1722                 }
1723         }
1724
1725         return 0;
1726 }
1727
1728 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
1729 {
1730         int ret;
1731         int vdev_id;
1732         int vdev_type;
1733         int vdev_subtype;
1734         const u8 *vdev_addr;
1735
1736         vdev_id = 0;
1737         vdev_type = WMI_VDEV_TYPE_STA;
1738         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
1739         vdev_addr = ar->mac_addr;
1740
1741         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
1742                                      vdev_addr);
1743         if (ret) {
1744                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
1745                 return ret;
1746         }
1747
1748         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
1749         if (ret) {
1750                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
1751                 return ret;
1752         }
1753
1754         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
1755          * serialized properly implicitly.
1756          *
1757          * Moreover (most) WMI commands have no explicit acknowledges. It is
1758          * possible to infer it implicitly by poking firmware with echo
1759          * command - getting a reply means all preceding comments have been
1760          * (mostly) processed.
1761          *
1762          * In case of vdev create/delete this is sufficient.
1763          *
1764          * Without this it's possible to end up with a race when HTT Rx ring is
1765          * started before vdev create/delete hack is complete allowing a short
1766          * window of opportunity to receive (and Tx ACK) a bunch of frames.
1767          */
1768         ret = ath10k_wmi_barrier(ar);
1769         if (ret) {
1770                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
1771                 return ret;
1772         }
1773
1774         return 0;
1775 }
1776
1777 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1778                       const struct ath10k_fw_components *fw)
1779 {
1780         int status;
1781         u32 val;
1782
1783         lockdep_assert_held(&ar->conf_mutex);
1784
1785         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1786
1787         ar->running_fw = fw;
1788
1789         ath10k_bmi_start(ar);
1790
1791         if (ath10k_init_configure_target(ar)) {
1792                 status = -EINVAL;
1793                 goto err;
1794         }
1795
1796         status = ath10k_download_cal_data(ar);
1797         if (status)
1798                 goto err;
1799
1800         /* Some of of qca988x solutions are having global reset issue
1801          * during target initialization. Bypassing PLL setting before
1802          * downloading firmware and letting the SoC run on REF_CLK is
1803          * fixing the problem. Corresponding firmware change is also needed
1804          * to set the clock source once the target is initialized.
1805          */
1806         if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1807                      ar->running_fw->fw_file.fw_features)) {
1808                 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1809                 if (status) {
1810                         ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1811                                    status);
1812                         goto err;
1813                 }
1814         }
1815
1816         status = ath10k_download_fw(ar);
1817         if (status)
1818                 goto err;
1819
1820         status = ath10k_init_uart(ar);
1821         if (status)
1822                 goto err;
1823
1824         ar->htc.htc_ops.target_send_suspend_complete =
1825                 ath10k_send_suspend_complete;
1826
1827         status = ath10k_htc_init(ar);
1828         if (status) {
1829                 ath10k_err(ar, "could not init HTC (%d)\n", status);
1830                 goto err;
1831         }
1832
1833         status = ath10k_bmi_done(ar);
1834         if (status)
1835                 goto err;
1836
1837         status = ath10k_wmi_attach(ar);
1838         if (status) {
1839                 ath10k_err(ar, "WMI attach failed: %d\n", status);
1840                 goto err;
1841         }
1842
1843         status = ath10k_htt_init(ar);
1844         if (status) {
1845                 ath10k_err(ar, "failed to init htt: %d\n", status);
1846                 goto err_wmi_detach;
1847         }
1848
1849         status = ath10k_htt_tx_alloc(&ar->htt);
1850         if (status) {
1851                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1852                 goto err_wmi_detach;
1853         }
1854
1855         status = ath10k_htt_rx_alloc(&ar->htt);
1856         if (status) {
1857                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1858                 goto err_htt_tx_detach;
1859         }
1860
1861         status = ath10k_hif_start(ar);
1862         if (status) {
1863                 ath10k_err(ar, "could not start HIF: %d\n", status);
1864                 goto err_htt_rx_detach;
1865         }
1866
1867         status = ath10k_htc_wait_target(&ar->htc);
1868         if (status) {
1869                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1870                 goto err_hif_stop;
1871         }
1872
1873         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1874                 status = ath10k_htt_connect(&ar->htt);
1875                 if (status) {
1876                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
1877                         goto err_hif_stop;
1878                 }
1879         }
1880
1881         status = ath10k_wmi_connect(ar);
1882         if (status) {
1883                 ath10k_err(ar, "could not connect wmi: %d\n", status);
1884                 goto err_hif_stop;
1885         }
1886
1887         status = ath10k_htc_start(&ar->htc);
1888         if (status) {
1889                 ath10k_err(ar, "failed to start htc: %d\n", status);
1890                 goto err_hif_stop;
1891         }
1892
1893         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1894                 status = ath10k_wmi_wait_for_service_ready(ar);
1895                 if (status) {
1896                         ath10k_warn(ar, "wmi service ready event not received");
1897                         goto err_hif_stop;
1898                 }
1899         }
1900
1901         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
1902                    ar->hw->wiphy->fw_version);
1903
1904         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) {
1905                 val = 0;
1906                 if (ath10k_peer_stats_enabled(ar))
1907                         val = WMI_10_4_PEER_STATS;
1908
1909                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
1910                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
1911
1912                 /* 10.4 firmware supports BT-Coex without reloading firmware
1913                  * via pdev param. To support Bluetooth coexistence pdev param,
1914                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
1915                  * enabled always.
1916                  */
1917                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
1918                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
1919                              ar->running_fw->fw_file.fw_features))
1920                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
1921
1922                 status = ath10k_mac_ext_resource_config(ar, val);
1923                 if (status) {
1924                         ath10k_err(ar,
1925                                    "failed to send ext resource cfg command : %d\n",
1926                                    status);
1927                         goto err_hif_stop;
1928                 }
1929         }
1930
1931         status = ath10k_wmi_cmd_init(ar);
1932         if (status) {
1933                 ath10k_err(ar, "could not send WMI init command (%d)\n",
1934                            status);
1935                 goto err_hif_stop;
1936         }
1937
1938         status = ath10k_wmi_wait_for_unified_ready(ar);
1939         if (status) {
1940                 ath10k_err(ar, "wmi unified ready event not received\n");
1941                 goto err_hif_stop;
1942         }
1943
1944         /* Some firmware revisions do not properly set up hardware rx filter
1945          * registers.
1946          *
1947          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
1948          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
1949          * any frames that matches MAC_PCU_RX_FILTER which is also
1950          * misconfigured to accept anything.
1951          *
1952          * The ADDR1 is programmed using internal firmware structure field and
1953          * can't be (easily/sanely) reached from the driver explicitly. It is
1954          * possible to implicitly make it correct by creating a dummy vdev and
1955          * then deleting it.
1956          */
1957         status = ath10k_core_reset_rx_filter(ar);
1958         if (status) {
1959                 ath10k_err(ar, "failed to reset rx filter: %d\n", status);
1960                 goto err_hif_stop;
1961         }
1962
1963         /* If firmware indicates Full Rx Reorder support it must be used in a
1964          * slightly different manner. Let HTT code know.
1965          */
1966         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1967                                                 ar->wmi.svc_map));
1968
1969         status = ath10k_htt_rx_ring_refill(ar);
1970         if (status) {
1971                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1972                 goto err_hif_stop;
1973         }
1974
1975         if (ar->max_num_vdevs >= 64)
1976                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
1977         else
1978                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
1979
1980         INIT_LIST_HEAD(&ar->arvifs);
1981
1982         /* we don't care about HTT in UTF mode */
1983         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1984                 status = ath10k_htt_setup(&ar->htt);
1985                 if (status) {
1986                         ath10k_err(ar, "failed to setup htt: %d\n", status);
1987                         goto err_hif_stop;
1988                 }
1989         }
1990
1991         status = ath10k_debug_start(ar);
1992         if (status)
1993                 goto err_hif_stop;
1994
1995         return 0;
1996
1997 err_hif_stop:
1998         ath10k_hif_stop(ar);
1999 err_htt_rx_detach:
2000         ath10k_htt_rx_free(&ar->htt);
2001 err_htt_tx_detach:
2002         ath10k_htt_tx_free(&ar->htt);
2003 err_wmi_detach:
2004         ath10k_wmi_detach(ar);
2005 err:
2006         return status;
2007 }
2008 EXPORT_SYMBOL(ath10k_core_start);
2009
2010 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2011 {
2012         int ret;
2013         unsigned long time_left;
2014
2015         reinit_completion(&ar->target_suspend);
2016
2017         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2018         if (ret) {
2019                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2020                 return ret;
2021         }
2022
2023         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2024
2025         if (!time_left) {
2026                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2027                 return -ETIMEDOUT;
2028         }
2029
2030         return 0;
2031 }
2032
2033 void ath10k_core_stop(struct ath10k *ar)
2034 {
2035         lockdep_assert_held(&ar->conf_mutex);
2036         ath10k_debug_stop(ar);
2037
2038         /* try to suspend target */
2039         if (ar->state != ATH10K_STATE_RESTARTING &&
2040             ar->state != ATH10K_STATE_UTF)
2041                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2042
2043         ath10k_hif_stop(ar);
2044         ath10k_htt_tx_free(&ar->htt);
2045         ath10k_htt_rx_free(&ar->htt);
2046         ath10k_wmi_detach(ar);
2047 }
2048 EXPORT_SYMBOL(ath10k_core_stop);
2049
2050 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2051  * order to know what hw capabilities should be advertised to mac80211 it is
2052  * necessary to load the firmware (and tear it down immediately since start
2053  * hook will try to init it again) before registering */
2054 static int ath10k_core_probe_fw(struct ath10k *ar)
2055 {
2056         struct bmi_target_info target_info;
2057         int ret = 0;
2058
2059         ret = ath10k_hif_power_up(ar);
2060         if (ret) {
2061                 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
2062                 return ret;
2063         }
2064
2065         memset(&target_info, 0, sizeof(target_info));
2066         ret = ath10k_bmi_get_target_info(ar, &target_info);
2067         if (ret) {
2068                 ath10k_err(ar, "could not get target info (%d)\n", ret);
2069                 goto err_power_down;
2070         }
2071
2072         ar->target_version = target_info.version;
2073         ar->hw->wiphy->hw_version = target_info.version;
2074
2075         ret = ath10k_init_hw_params(ar);
2076         if (ret) {
2077                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2078                 goto err_power_down;
2079         }
2080
2081         ret = ath10k_core_fetch_firmware_files(ar);
2082         if (ret) {
2083                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2084                 goto err_power_down;
2085         }
2086
2087         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2088                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
2089         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2090                sizeof(ar->hw->wiphy->fw_version));
2091
2092         ath10k_debug_print_hwfw_info(ar);
2093
2094         ret = ath10k_core_pre_cal_download(ar);
2095         if (ret) {
2096                 /* pre calibration data download is not necessary
2097                  * for all the chipsets. Ignore failures and continue.
2098                  */
2099                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2100                            "could not load pre cal data: %d\n", ret);
2101         }
2102
2103         ret = ath10k_core_get_board_id_from_otp(ar);
2104         if (ret && ret != -EOPNOTSUPP) {
2105                 ath10k_err(ar, "failed to get board id from otp: %d\n",
2106                            ret);
2107                 goto err_free_firmware_files;
2108         }
2109
2110         ret = ath10k_core_fetch_board_file(ar);
2111         if (ret) {
2112                 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2113                 goto err_free_firmware_files;
2114         }
2115
2116         ath10k_debug_print_board_info(ar);
2117
2118         ret = ath10k_core_init_firmware_features(ar);
2119         if (ret) {
2120                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2121                            ret);
2122                 goto err_free_firmware_files;
2123         }
2124
2125         ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file);
2126         if (ret) {
2127                 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2128                            ret);
2129                 goto err_free_firmware_files;
2130         }
2131
2132         mutex_lock(&ar->conf_mutex);
2133
2134         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2135                                 &ar->normal_mode_fw);
2136         if (ret) {
2137                 ath10k_err(ar, "could not init core (%d)\n", ret);
2138                 goto err_unlock;
2139         }
2140
2141         ath10k_debug_print_boot_info(ar);
2142         ath10k_core_stop(ar);
2143
2144         mutex_unlock(&ar->conf_mutex);
2145
2146         ath10k_hif_power_down(ar);
2147         return 0;
2148
2149 err_unlock:
2150         mutex_unlock(&ar->conf_mutex);
2151
2152 err_free_firmware_files:
2153         ath10k_core_free_firmware_files(ar);
2154
2155 err_power_down:
2156         ath10k_hif_power_down(ar);
2157
2158         return ret;
2159 }
2160
2161 static void ath10k_core_register_work(struct work_struct *work)
2162 {
2163         struct ath10k *ar = container_of(work, struct ath10k, register_work);
2164         int status;
2165
2166         /* peer stats are enabled by default */
2167         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2168
2169         status = ath10k_core_probe_fw(ar);
2170         if (status) {
2171                 ath10k_err(ar, "could not probe fw (%d)\n", status);
2172                 goto err;
2173         }
2174
2175         status = ath10k_mac_register(ar);
2176         if (status) {
2177                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2178                 goto err_release_fw;
2179         }
2180
2181         status = ath10k_debug_register(ar);
2182         if (status) {
2183                 ath10k_err(ar, "unable to initialize debugfs\n");
2184                 goto err_unregister_mac;
2185         }
2186
2187         status = ath10k_spectral_create(ar);
2188         if (status) {
2189                 ath10k_err(ar, "failed to initialize spectral\n");
2190                 goto err_debug_destroy;
2191         }
2192
2193         status = ath10k_thermal_register(ar);
2194         if (status) {
2195                 ath10k_err(ar, "could not register thermal device: %d\n",
2196                            status);
2197                 goto err_spectral_destroy;
2198         }
2199
2200         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2201         return;
2202
2203 err_spectral_destroy:
2204         ath10k_spectral_destroy(ar);
2205 err_debug_destroy:
2206         ath10k_debug_destroy(ar);
2207 err_unregister_mac:
2208         ath10k_mac_unregister(ar);
2209 err_release_fw:
2210         ath10k_core_free_firmware_files(ar);
2211 err:
2212         /* TODO: It's probably a good idea to release device from the driver
2213          * but calling device_release_driver() here will cause a deadlock.
2214          */
2215         return;
2216 }
2217
2218 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2219 {
2220         ar->chip_id = chip_id;
2221         queue_work(ar->workqueue, &ar->register_work);
2222
2223         return 0;
2224 }
2225 EXPORT_SYMBOL(ath10k_core_register);
2226
2227 void ath10k_core_unregister(struct ath10k *ar)
2228 {
2229         cancel_work_sync(&ar->register_work);
2230
2231         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2232                 return;
2233
2234         ath10k_thermal_unregister(ar);
2235         /* Stop spectral before unregistering from mac80211 to remove the
2236          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2237          * would be already be free'd recursively, leading to a double free.
2238          */
2239         ath10k_spectral_destroy(ar);
2240
2241         /* We must unregister from mac80211 before we stop HTC and HIF.
2242          * Otherwise we will fail to submit commands to FW and mac80211 will be
2243          * unhappy about callback failures. */
2244         ath10k_mac_unregister(ar);
2245
2246         ath10k_testmode_destroy(ar);
2247
2248         ath10k_core_free_firmware_files(ar);
2249         ath10k_core_free_board_files(ar);
2250
2251         ath10k_debug_unregister(ar);
2252 }
2253 EXPORT_SYMBOL(ath10k_core_unregister);
2254
2255 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2256                                   enum ath10k_bus bus,
2257                                   enum ath10k_hw_rev hw_rev,
2258                                   const struct ath10k_hif_ops *hif_ops)
2259 {
2260         struct ath10k *ar;
2261         int ret;
2262
2263         ar = ath10k_mac_create(priv_size);
2264         if (!ar)
2265                 return NULL;
2266
2267         ar->ath_common.priv = ar;
2268         ar->ath_common.hw = ar->hw;
2269         ar->dev = dev;
2270         ar->hw_rev = hw_rev;
2271         ar->hif.ops = hif_ops;
2272         ar->hif.bus = bus;
2273
2274         switch (hw_rev) {
2275         case ATH10K_HW_QCA988X:
2276         case ATH10K_HW_QCA9887:
2277                 ar->regs = &qca988x_regs;
2278                 ar->hw_values = &qca988x_values;
2279                 break;
2280         case ATH10K_HW_QCA6174:
2281         case ATH10K_HW_QCA9377:
2282                 ar->regs = &qca6174_regs;
2283                 ar->hw_values = &qca6174_values;
2284                 break;
2285         case ATH10K_HW_QCA99X0:
2286         case ATH10K_HW_QCA9984:
2287                 ar->regs = &qca99x0_regs;
2288                 ar->hw_values = &qca99x0_values;
2289                 break;
2290         case ATH10K_HW_QCA9888:
2291                 ar->regs = &qca99x0_regs;
2292                 ar->hw_values = &qca9888_values;
2293                 break;
2294         case ATH10K_HW_QCA4019:
2295                 ar->regs = &qca4019_regs;
2296                 ar->hw_values = &qca4019_values;
2297                 break;
2298         default:
2299                 ath10k_err(ar, "unsupported core hardware revision %d\n",
2300                            hw_rev);
2301                 ret = -ENOTSUPP;
2302                 goto err_free_mac;
2303         }
2304
2305         init_completion(&ar->scan.started);
2306         init_completion(&ar->scan.completed);
2307         init_completion(&ar->scan.on_channel);
2308         init_completion(&ar->target_suspend);
2309         init_completion(&ar->wow.wakeup_completed);
2310
2311         init_completion(&ar->install_key_done);
2312         init_completion(&ar->vdev_setup_done);
2313         init_completion(&ar->thermal.wmi_sync);
2314         init_completion(&ar->bss_survey_done);
2315
2316         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2317
2318         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2319         if (!ar->workqueue)
2320                 goto err_free_mac;
2321
2322         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2323         if (!ar->workqueue_aux)
2324                 goto err_free_wq;
2325
2326         mutex_init(&ar->conf_mutex);
2327         spin_lock_init(&ar->data_lock);
2328         spin_lock_init(&ar->txqs_lock);
2329
2330         INIT_LIST_HEAD(&ar->txqs);
2331         INIT_LIST_HEAD(&ar->peers);
2332         init_waitqueue_head(&ar->peer_mapping_wq);
2333         init_waitqueue_head(&ar->htt.empty_tx_wq);
2334         init_waitqueue_head(&ar->wmi.tx_credits_wq);
2335
2336         init_completion(&ar->offchan_tx_completed);
2337         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2338         skb_queue_head_init(&ar->offchan_tx_queue);
2339
2340         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2341         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2342
2343         INIT_WORK(&ar->register_work, ath10k_core_register_work);
2344         INIT_WORK(&ar->restart_work, ath10k_core_restart);
2345
2346         init_dummy_netdev(&ar->napi_dev);
2347
2348         ret = ath10k_debug_create(ar);
2349         if (ret)
2350                 goto err_free_aux_wq;
2351
2352         return ar;
2353
2354 err_free_aux_wq:
2355         destroy_workqueue(ar->workqueue_aux);
2356 err_free_wq:
2357         destroy_workqueue(ar->workqueue);
2358
2359 err_free_mac:
2360         ath10k_mac_destroy(ar);
2361
2362         return NULL;
2363 }
2364 EXPORT_SYMBOL(ath10k_core_create);
2365
2366 void ath10k_core_destroy(struct ath10k *ar)
2367 {
2368         flush_workqueue(ar->workqueue);
2369         destroy_workqueue(ar->workqueue);
2370
2371         flush_workqueue(ar->workqueue_aux);
2372         destroy_workqueue(ar->workqueue_aux);
2373
2374         ath10k_debug_destroy(ar);
2375         ath10k_wmi_free_host_mem(ar);
2376         ath10k_mac_destroy(ar);
2377 }
2378 EXPORT_SYMBOL(ath10k_core_destroy);
2379
2380 MODULE_AUTHOR("Qualcomm Atheros");
2381 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2382 MODULE_LICENSE("Dual BSD/GPL");