ath10k: fix use of multiple blank lines
[cascardo/linux.git] / drivers / net / wireless / ath / ath10k / htt_rx.c
1 /*
2  * Copyright (c) 2005-2011 Atheros Communications Inc.
3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17
18 #include "core.h"
19 #include "htc.h"
20 #include "htt.h"
21 #include "txrx.h"
22 #include "debug.h"
23 #include "trace.h"
24 #include "mac.h"
25
26 #include <linux/log2.h>
27
28 /* slightly larger than one large A-MPDU */
29 #define HTT_RX_RING_SIZE_MIN 128
30
31 /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32 #define HTT_RX_RING_SIZE_MAX 2048
33
34 #define HTT_RX_AVG_FRM_BYTES 1000
35
36 /* ms, very conservative */
37 #define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39 /* ms, conservative */
40 #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42 /* when under memory pressure rx ring refill may fail and needs a retry */
43 #define HTT_RX_RING_REFILL_RETRY_MS 50
44
45 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
46 static void ath10k_htt_txrx_compl_task(unsigned long ptr);
47
48 static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49 {
50         int size;
51
52         /*
53          * It is expected that the host CPU will typically be able to
54          * service the rx indication from one A-MPDU before the rx
55          * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56          * later. However, the rx ring should be sized very conservatively,
57          * to accomodate the worst reasonable delay before the host CPU
58          * services a rx indication interrupt.
59          *
60          * The rx ring need not be kept full of empty buffers. In theory,
61          * the htt host SW can dynamically track the low-water mark in the
62          * rx ring, and dynamically adjust the level to which the rx ring
63          * is filled with empty buffers, to dynamically meet the desired
64          * low-water mark.
65          *
66          * In contrast, it's difficult to resize the rx ring itself, once
67          * it's in use. Thus, the ring itself should be sized very
68          * conservatively, while the degree to which the ring is filled
69          * with empty buffers should be sized moderately conservatively.
70          */
71
72         /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73         size =
74             htt->max_throughput_mbps +
75             1000  /
76             (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78         if (size < HTT_RX_RING_SIZE_MIN)
79                 size = HTT_RX_RING_SIZE_MIN;
80
81         if (size > HTT_RX_RING_SIZE_MAX)
82                 size = HTT_RX_RING_SIZE_MAX;
83
84         size = roundup_pow_of_two(size);
85
86         return size;
87 }
88
89 static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90 {
91         int size;
92
93         /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94         size =
95             htt->max_throughput_mbps *
96             1000  /
97             (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99         /*
100          * Make sure the fill level is at least 1 less than the ring size.
101          * Leaving 1 element empty allows the SW to easily distinguish
102          * between a full ring vs. an empty ring.
103          */
104         if (size >= htt->rx_ring.size)
105                 size = htt->rx_ring.size - 1;
106
107         return size;
108 }
109
110 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111 {
112         struct sk_buff *skb;
113         struct ath10k_skb_cb *cb;
114         int i;
115
116         for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117                 skb = htt->rx_ring.netbufs_ring[i];
118                 cb = ATH10K_SKB_CB(skb);
119                 dma_unmap_single(htt->ar->dev, cb->paddr,
120                                  skb->len + skb_tailroom(skb),
121                                  DMA_FROM_DEVICE);
122                 dev_kfree_skb_any(skb);
123         }
124
125         htt->rx_ring.fill_cnt = 0;
126 }
127
128 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129 {
130         struct htt_rx_desc *rx_desc;
131         struct sk_buff *skb;
132         dma_addr_t paddr;
133         int ret = 0, idx;
134
135         idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
136         while (num > 0) {
137                 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138                 if (!skb) {
139                         ret = -ENOMEM;
140                         goto fail;
141                 }
142
143                 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144                         skb_pull(skb,
145                                  PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146                                  skb->data);
147
148                 /* Clear rx_desc attention word before posting to Rx ring */
149                 rx_desc = (struct htt_rx_desc *)skb->data;
150                 rx_desc->attention.flags = __cpu_to_le32(0);
151
152                 paddr = dma_map_single(htt->ar->dev, skb->data,
153                                        skb->len + skb_tailroom(skb),
154                                        DMA_FROM_DEVICE);
155
156                 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157                         dev_kfree_skb_any(skb);
158                         ret = -ENOMEM;
159                         goto fail;
160                 }
161
162                 ATH10K_SKB_CB(skb)->paddr = paddr;
163                 htt->rx_ring.netbufs_ring[idx] = skb;
164                 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165                 htt->rx_ring.fill_cnt++;
166
167                 num--;
168                 idx++;
169                 idx &= htt->rx_ring.size_mask;
170         }
171
172 fail:
173         *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
174         return ret;
175 }
176
177 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178 {
179         lockdep_assert_held(&htt->rx_ring.lock);
180         return __ath10k_htt_rx_ring_fill_n(htt, num);
181 }
182
183 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184 {
185         int ret, num_deficit, num_to_fill;
186
187         /* Refilling the whole RX ring buffer proves to be a bad idea. The
188          * reason is RX may take up significant amount of CPU cycles and starve
189          * other tasks, e.g. TX on an ethernet device while acting as a bridge
190          * with ath10k wlan interface. This ended up with very poor performance
191          * once CPU the host system was overwhelmed with RX on ath10k.
192          *
193          * By limiting the number of refills the replenishing occurs
194          * progressively. This in turns makes use of the fact tasklets are
195          * processed in FIFO order. This means actual RX processing can starve
196          * out refilling. If there's not enough buffers on RX ring FW will not
197          * report RX until it is refilled with enough buffers. This
198          * automatically balances load wrt to CPU power.
199          *
200          * This probably comes at a cost of lower maximum throughput but
201          * improves the avarage and stability. */
202         spin_lock_bh(&htt->rx_ring.lock);
203         num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204         num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205         num_deficit -= num_to_fill;
206         ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207         if (ret == -ENOMEM) {
208                 /*
209                  * Failed to fill it to the desired level -
210                  * we'll start a timer and try again next time.
211                  * As long as enough buffers are left in the ring for
212                  * another A-MPDU rx, no special recovery is needed.
213                  */
214                 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215                           msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
216         } else if (num_deficit > 0) {
217                 tasklet_schedule(&htt->rx_replenish_task);
218         }
219         spin_unlock_bh(&htt->rx_ring.lock);
220 }
221
222 static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223 {
224         struct ath10k_htt *htt = (struct ath10k_htt *)arg;
225         ath10k_htt_rx_msdu_buff_replenish(htt);
226 }
227
228 static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
229 {
230         struct sk_buff *skb;
231         int i;
232
233         for (i = 0; i < htt->rx_ring.size; i++) {
234                 skb = htt->rx_ring.netbufs_ring[i];
235                 if (!skb)
236                         continue;
237
238                 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
239                                  skb->len + skb_tailroom(skb),
240                                  DMA_FROM_DEVICE);
241                 dev_kfree_skb_any(skb);
242                 htt->rx_ring.netbufs_ring[i] = NULL;
243         }
244 }
245
246 void ath10k_htt_rx_free(struct ath10k_htt *htt)
247 {
248         del_timer_sync(&htt->rx_ring.refill_retry_timer);
249         tasklet_kill(&htt->rx_replenish_task);
250         tasklet_kill(&htt->txrx_compl_task);
251
252         skb_queue_purge(&htt->tx_compl_q);
253         skb_queue_purge(&htt->rx_compl_q);
254
255         ath10k_htt_rx_ring_clean_up(htt);
256
257         dma_free_coherent(htt->ar->dev,
258                           (htt->rx_ring.size *
259                            sizeof(htt->rx_ring.paddrs_ring)),
260                           htt->rx_ring.paddrs_ring,
261                           htt->rx_ring.base_paddr);
262
263         dma_free_coherent(htt->ar->dev,
264                           sizeof(*htt->rx_ring.alloc_idx.vaddr),
265                           htt->rx_ring.alloc_idx.vaddr,
266                           htt->rx_ring.alloc_idx.paddr);
267
268         kfree(htt->rx_ring.netbufs_ring);
269 }
270
271 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
272 {
273         struct ath10k *ar = htt->ar;
274         int idx;
275         struct sk_buff *msdu;
276
277         lockdep_assert_held(&htt->rx_ring.lock);
278
279         if (htt->rx_ring.fill_cnt == 0) {
280                 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
281                 return NULL;
282         }
283
284         idx = htt->rx_ring.sw_rd_idx.msdu_payld;
285         msdu = htt->rx_ring.netbufs_ring[idx];
286         htt->rx_ring.netbufs_ring[idx] = NULL;
287
288         idx++;
289         idx &= htt->rx_ring.size_mask;
290         htt->rx_ring.sw_rd_idx.msdu_payld = idx;
291         htt->rx_ring.fill_cnt--;
292
293         return msdu;
294 }
295
296 static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
297 {
298         struct sk_buff *next;
299
300         while (skb) {
301                 next = skb->next;
302                 dev_kfree_skb_any(skb);
303                 skb = next;
304         }
305 }
306
307 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
308 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
309                                    u8 **fw_desc, int *fw_desc_len,
310                                    struct sk_buff **head_msdu,
311                                    struct sk_buff **tail_msdu,
312                                    u32 *attention)
313 {
314         struct ath10k *ar = htt->ar;
315         int msdu_len, msdu_chaining = 0;
316         struct sk_buff *msdu;
317         struct htt_rx_desc *rx_desc;
318
319         lockdep_assert_held(&htt->rx_ring.lock);
320
321         if (htt->rx_confused) {
322                 ath10k_warn(ar, "htt is confused. refusing rx\n");
323                 return -1;
324         }
325
326         msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
327         while (msdu) {
328                 int last_msdu, msdu_len_invalid, msdu_chained;
329
330                 dma_unmap_single(htt->ar->dev,
331                                  ATH10K_SKB_CB(msdu)->paddr,
332                                  msdu->len + skb_tailroom(msdu),
333                                  DMA_FROM_DEVICE);
334
335                 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
336                                 msdu->data, msdu->len + skb_tailroom(msdu));
337
338                 rx_desc = (struct htt_rx_desc *)msdu->data;
339
340                 /* FIXME: we must report msdu payload since this is what caller
341                  *        expects now */
342                 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
343                 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
344
345                 /*
346                  * Sanity check - confirm the HW is finished filling in the
347                  * rx data.
348                  * If the HW and SW are working correctly, then it's guaranteed
349                  * that the HW's MAC DMA is done before this point in the SW.
350                  * To prevent the case that we handle a stale Rx descriptor,
351                  * just assert for now until we have a way to recover.
352                  */
353                 if (!(__le32_to_cpu(rx_desc->attention.flags)
354                                 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
355                         ath10k_htt_rx_free_msdu_chain(*head_msdu);
356                         *head_msdu = NULL;
357                         msdu = NULL;
358                         ath10k_err(ar, "htt rx stopped. cannot recover\n");
359                         htt->rx_confused = true;
360                         break;
361                 }
362
363                 *attention |= __le32_to_cpu(rx_desc->attention.flags) &
364                                             (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
365                                              RX_ATTENTION_FLAGS_DECRYPT_ERR |
366                                              RX_ATTENTION_FLAGS_FCS_ERR |
367                                              RX_ATTENTION_FLAGS_MGMT_TYPE);
368                 /*
369                  * Copy the FW rx descriptor for this MSDU from the rx
370                  * indication message into the MSDU's netbuf. HL uses the
371                  * same rx indication message definition as LL, and simply
372                  * appends new info (fields from the HW rx desc, and the
373                  * MSDU payload itself). So, the offset into the rx
374                  * indication message only has to account for the standard
375                  * offset of the per-MSDU FW rx desc info within the
376                  * message, and how many bytes of the per-MSDU FW rx desc
377                  * info have already been consumed. (And the endianness of
378                  * the host, since for a big-endian host, the rx ind
379                  * message contents, including the per-MSDU rx desc bytes,
380                  * were byteswapped during upload.)
381                  */
382                 if (*fw_desc_len > 0) {
383                         rx_desc->fw_desc.info0 = **fw_desc;
384                         /*
385                          * The target is expected to only provide the basic
386                          * per-MSDU rx descriptors. Just to be sure, verify
387                          * that the target has not attached extension data
388                          * (e.g. LRO flow ID).
389                          */
390
391                         /* or more, if there's extension data */
392                         (*fw_desc)++;
393                         (*fw_desc_len)--;
394                 } else {
395                         /*
396                          * When an oversized AMSDU happened, FW will lost
397                          * some of MSDU status - in this case, the FW
398                          * descriptors provided will be less than the
399                          * actual MSDUs inside this MPDU. Mark the FW
400                          * descriptors so that it will still deliver to
401                          * upper stack, if no CRC error for this MPDU.
402                          *
403                          * FIX THIS - the FW descriptors are actually for
404                          * MSDUs in the end of this A-MSDU instead of the
405                          * beginning.
406                          */
407                         rx_desc->fw_desc.info0 = 0;
408                 }
409
410                 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
411                                         & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
412                                            RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
413                 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
414                               RX_MSDU_START_INFO0_MSDU_LENGTH);
415                 msdu_chained = rx_desc->frag_info.ring2_more_count;
416
417                 if (msdu_len_invalid)
418                         msdu_len = 0;
419
420                 skb_trim(msdu, 0);
421                 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
422                 msdu_len -= msdu->len;
423
424                 /* FIXME: Do chained buffers include htt_rx_desc or not? */
425                 while (msdu_chained--) {
426                         struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
427
428                         dma_unmap_single(htt->ar->dev,
429                                          ATH10K_SKB_CB(next)->paddr,
430                                          next->len + skb_tailroom(next),
431                                          DMA_FROM_DEVICE);
432
433                         ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
434                                         "htt rx chained: ", next->data,
435                                         next->len + skb_tailroom(next));
436
437                         skb_trim(next, 0);
438                         skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
439                         msdu_len -= next->len;
440
441                         msdu->next = next;
442                         msdu = next;
443                         msdu_chaining = 1;
444                 }
445
446                 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
447                                 RX_MSDU_END_INFO0_LAST_MSDU;
448
449                 if (last_msdu) {
450                         msdu->next = NULL;
451                         break;
452                 } else {
453                         struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
454                         msdu->next = next;
455                         msdu = next;
456                 }
457         }
458         *tail_msdu = msdu;
459
460         if (*head_msdu == NULL)
461                 msdu_chaining = -1;
462
463         /*
464          * Don't refill the ring yet.
465          *
466          * First, the elements popped here are still in use - it is not
467          * safe to overwrite them until the matching call to
468          * mpdu_desc_list_next. Second, for efficiency it is preferable to
469          * refill the rx ring with 1 PPDU's worth of rx buffers (something
470          * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
471          * (something like 3 buffers). Consequently, we'll rely on the txrx
472          * SW to tell us when it is done pulling all the PPDU's rx buffers
473          * out of the rx ring, and then refill it just once.
474          */
475
476         return msdu_chaining;
477 }
478
479 static void ath10k_htt_rx_replenish_task(unsigned long ptr)
480 {
481         struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
482         ath10k_htt_rx_msdu_buff_replenish(htt);
483 }
484
485 int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
486 {
487         struct ath10k *ar = htt->ar;
488         dma_addr_t paddr;
489         void *vaddr;
490         size_t size;
491         struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
492
493         htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
494         if (!is_power_of_2(htt->rx_ring.size)) {
495                 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
496                 return -EINVAL;
497         }
498
499         htt->rx_ring.size_mask = htt->rx_ring.size - 1;
500
501         /*
502          * Set the initial value for the level to which the rx ring
503          * should be filled, based on the max throughput and the
504          * worst likely latency for the host to fill the rx ring
505          * with new buffers. In theory, this fill level can be
506          * dynamically adjusted from the initial value set here, to
507          * reflect the actual host latency rather than a
508          * conservative assumption about the host latency.
509          */
510         htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
511
512         htt->rx_ring.netbufs_ring =
513                 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
514                         GFP_KERNEL);
515         if (!htt->rx_ring.netbufs_ring)
516                 goto err_netbuf;
517
518         size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
519
520         vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
521         if (!vaddr)
522                 goto err_dma_ring;
523
524         htt->rx_ring.paddrs_ring = vaddr;
525         htt->rx_ring.base_paddr = paddr;
526
527         vaddr = dma_alloc_coherent(htt->ar->dev,
528                                    sizeof(*htt->rx_ring.alloc_idx.vaddr),
529                                    &paddr, GFP_DMA);
530         if (!vaddr)
531                 goto err_dma_idx;
532
533         htt->rx_ring.alloc_idx.vaddr = vaddr;
534         htt->rx_ring.alloc_idx.paddr = paddr;
535         htt->rx_ring.sw_rd_idx.msdu_payld = 0;
536         *htt->rx_ring.alloc_idx.vaddr = 0;
537
538         /* Initialize the Rx refill retry timer */
539         setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
540
541         spin_lock_init(&htt->rx_ring.lock);
542
543         htt->rx_ring.fill_cnt = 0;
544         if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
545                 goto err_fill_ring;
546
547         tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
548                      (unsigned long)htt);
549
550         skb_queue_head_init(&htt->tx_compl_q);
551         skb_queue_head_init(&htt->rx_compl_q);
552
553         tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
554                      (unsigned long)htt);
555
556         ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
557                    htt->rx_ring.size, htt->rx_ring.fill_level);
558         return 0;
559
560 err_fill_ring:
561         ath10k_htt_rx_ring_free(htt);
562         dma_free_coherent(htt->ar->dev,
563                           sizeof(*htt->rx_ring.alloc_idx.vaddr),
564                           htt->rx_ring.alloc_idx.vaddr,
565                           htt->rx_ring.alloc_idx.paddr);
566 err_dma_idx:
567         dma_free_coherent(htt->ar->dev,
568                           (htt->rx_ring.size *
569                            sizeof(htt->rx_ring.paddrs_ring)),
570                           htt->rx_ring.paddrs_ring,
571                           htt->rx_ring.base_paddr);
572 err_dma_ring:
573         kfree(htt->rx_ring.netbufs_ring);
574 err_netbuf:
575         return -ENOMEM;
576 }
577
578 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
579                                           enum htt_rx_mpdu_encrypt_type type)
580 {
581         switch (type) {
582         case HTT_RX_MPDU_ENCRYPT_WEP40:
583         case HTT_RX_MPDU_ENCRYPT_WEP104:
584                 return 4;
585         case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
586         case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
587         case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
588         case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
589         case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
590                 return 8;
591         case HTT_RX_MPDU_ENCRYPT_NONE:
592                 return 0;
593         }
594
595         ath10k_warn(ar, "unknown encryption type %d\n", type);
596         return 0;
597 }
598
599 static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
600                                          enum htt_rx_mpdu_encrypt_type type)
601 {
602         switch (type) {
603         case HTT_RX_MPDU_ENCRYPT_NONE:
604         case HTT_RX_MPDU_ENCRYPT_WEP40:
605         case HTT_RX_MPDU_ENCRYPT_WEP104:
606         case HTT_RX_MPDU_ENCRYPT_WEP128:
607         case HTT_RX_MPDU_ENCRYPT_WAPI:
608                 return 0;
609         case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
610         case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
611                 return 4;
612         case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
613                 return 8;
614         }
615
616         ath10k_warn(ar, "unknown encryption type %d\n", type);
617         return 0;
618 }
619
620 /* Applies for first msdu in chain, before altering it. */
621 static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
622 {
623         struct htt_rx_desc *rxd;
624         enum rx_msdu_decap_format fmt;
625
626         rxd = (void *)skb->data - sizeof(*rxd);
627         fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
628                  RX_MSDU_START_INFO1_DECAP_FORMAT);
629
630         if (fmt == RX_MSDU_DECAP_RAW)
631                 return (void *)skb->data;
632         else
633                 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
634 }
635
636 /* This function only applies for first msdu in an msdu chain */
637 static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
638 {
639         if (ieee80211_is_data_qos(hdr->frame_control)) {
640                 u8 *qc = ieee80211_get_qos_ctl(hdr);
641                 if (qc[0] & 0x80)
642                         return true;
643         }
644         return false;
645 }
646
647 struct rfc1042_hdr {
648         u8 llc_dsap;
649         u8 llc_ssap;
650         u8 llc_ctrl;
651         u8 snap_oui[3];
652         __be16 snap_type;
653 } __packed;
654
655 struct amsdu_subframe_hdr {
656         u8 dst[ETH_ALEN];
657         u8 src[ETH_ALEN];
658         __be16 len;
659 } __packed;
660
661 static const u8 rx_legacy_rate_idx[] = {
662         3,      /* 0x00  - 11Mbps  */
663         2,      /* 0x01  - 5.5Mbps */
664         1,      /* 0x02  - 2Mbps   */
665         0,      /* 0x03  - 1Mbps   */
666         3,      /* 0x04  - 11Mbps  */
667         2,      /* 0x05  - 5.5Mbps */
668         1,      /* 0x06  - 2Mbps   */
669         0,      /* 0x07  - 1Mbps   */
670         10,     /* 0x08  - 48Mbps  */
671         8,      /* 0x09  - 24Mbps  */
672         6,      /* 0x0A  - 12Mbps  */
673         4,      /* 0x0B  - 6Mbps   */
674         11,     /* 0x0C  - 54Mbps  */
675         9,      /* 0x0D  - 36Mbps  */
676         7,      /* 0x0E  - 18Mbps  */
677         5,      /* 0x0F  - 9Mbps   */
678 };
679
680 static void ath10k_htt_rx_h_rates(struct ath10k *ar,
681                                   enum ieee80211_band band,
682                                   u8 info0, u32 info1, u32 info2,
683                                   struct ieee80211_rx_status *status)
684 {
685         u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
686         u8 preamble = 0;
687
688         /* Check if valid fields */
689         if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
690                 return;
691
692         preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
693
694         switch (preamble) {
695         case HTT_RX_LEGACY:
696                 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
697                 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
698                 rate_idx = 0;
699
700                 if (rate < 0x08 || rate > 0x0F)
701                         break;
702
703                 switch (band) {
704                 case IEEE80211_BAND_2GHZ:
705                         if (cck)
706                                 rate &= ~BIT(3);
707                         rate_idx = rx_legacy_rate_idx[rate];
708                         break;
709                 case IEEE80211_BAND_5GHZ:
710                         rate_idx = rx_legacy_rate_idx[rate];
711                         /* We are using same rate table registering
712                            HW - ath10k_rates[]. In case of 5GHz skip
713                            CCK rates, so -4 here */
714                         rate_idx -= 4;
715                         break;
716                 default:
717                         break;
718                 }
719
720                 status->rate_idx = rate_idx;
721                 break;
722         case HTT_RX_HT:
723         case HTT_RX_HT_WITH_TXBF:
724                 /* HT-SIG - Table 20-11 in info1 and info2 */
725                 mcs = info1 & 0x1F;
726                 nss = mcs >> 3;
727                 bw = (info1 >> 7) & 1;
728                 sgi = (info2 >> 7) & 1;
729
730                 status->rate_idx = mcs;
731                 status->flag |= RX_FLAG_HT;
732                 if (sgi)
733                         status->flag |= RX_FLAG_SHORT_GI;
734                 if (bw)
735                         status->flag |= RX_FLAG_40MHZ;
736                 break;
737         case HTT_RX_VHT:
738         case HTT_RX_VHT_WITH_TXBF:
739                 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
740                    TODO check this */
741                 mcs = (info2 >> 4) & 0x0F;
742                 nss = ((info1 >> 10) & 0x07) + 1;
743                 bw = info1 & 3;
744                 sgi = info2 & 1;
745
746                 status->rate_idx = mcs;
747                 status->vht_nss = nss;
748
749                 if (sgi)
750                         status->flag |= RX_FLAG_SHORT_GI;
751
752                 switch (bw) {
753                 /* 20MHZ */
754                 case 0:
755                         break;
756                 /* 40MHZ */
757                 case 1:
758                         status->flag |= RX_FLAG_40MHZ;
759                         break;
760                 /* 80MHZ */
761                 case 2:
762                         status->vht_flag |= RX_VHT_FLAG_80MHZ;
763                 }
764
765                 status->flag |= RX_FLAG_VHT;
766                 break;
767         default:
768                 break;
769         }
770 }
771
772 static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
773                                       struct ieee80211_rx_status *rx_status,
774                                       struct sk_buff *skb,
775                                       enum htt_rx_mpdu_encrypt_type enctype,
776                                       enum rx_msdu_decap_format fmt,
777                                       bool dot11frag)
778 {
779         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
780
781         rx_status->flag &= ~(RX_FLAG_DECRYPTED |
782                              RX_FLAG_IV_STRIPPED |
783                              RX_FLAG_MMIC_STRIPPED);
784
785         if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
786                 return;
787
788         /*
789          * There's no explicit rx descriptor flag to indicate whether a given
790          * frame has been decrypted or not. We're forced to use the decap
791          * format as an implicit indication. However fragmentation rx is always
792          * raw and it probably never reports undecrypted raws.
793          *
794          * This makes sure sniffed frames are reported as-is without stripping
795          * the protected flag.
796          */
797         if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
798                 return;
799
800         rx_status->flag |= RX_FLAG_DECRYPTED |
801                            RX_FLAG_IV_STRIPPED |
802                            RX_FLAG_MMIC_STRIPPED;
803         hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
804                                            ~IEEE80211_FCTL_PROTECTED);
805 }
806
807 static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
808                                     struct ieee80211_rx_status *status)
809 {
810         struct ieee80211_channel *ch;
811
812         spin_lock_bh(&ar->data_lock);
813         ch = ar->scan_channel;
814         if (!ch)
815                 ch = ar->rx_channel;
816         spin_unlock_bh(&ar->data_lock);
817
818         if (!ch)
819                 return false;
820
821         status->band = ch->band;
822         status->freq = ch->center_freq;
823
824         return true;
825 }
826
827 static const char * const tid_to_ac[] = {
828         "BE",
829         "BK",
830         "BK",
831         "BE",
832         "VI",
833         "VI",
834         "VO",
835         "VO",
836 };
837
838 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
839 {
840         u8 *qc;
841         int tid;
842
843         if (!ieee80211_is_data_qos(hdr->frame_control))
844                 return "";
845
846         qc = ieee80211_get_qos_ctl(hdr);
847         tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
848         if (tid < 8)
849                 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
850         else
851                 snprintf(out, size, "tid %d", tid);
852
853         return out;
854 }
855
856 static void ath10k_process_rx(struct ath10k *ar,
857                               struct ieee80211_rx_status *rx_status,
858                               struct sk_buff *skb)
859 {
860         struct ieee80211_rx_status *status;
861         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
862         char tid[32];
863
864         status = IEEE80211_SKB_RXCB(skb);
865         *status = *rx_status;
866
867         ath10k_dbg(ar, ATH10K_DBG_DATA,
868                    "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
869                    skb,
870                    skb->len,
871                    ieee80211_get_SA(hdr),
872                    ath10k_get_tid(hdr, tid, sizeof(tid)),
873                    is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
874                                                         "mcast" : "ucast",
875                    (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
876                    status->flag == 0 ? "legacy" : "",
877                    status->flag & RX_FLAG_HT ? "ht" : "",
878                    status->flag & RX_FLAG_VHT ? "vht" : "",
879                    status->flag & RX_FLAG_40MHZ ? "40" : "",
880                    status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
881                    status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
882                    status->rate_idx,
883                    status->vht_nss,
884                    status->freq,
885                    status->band, status->flag,
886                    !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
887                    !!(status->flag & RX_FLAG_MMIC_ERROR),
888                    !!(status->flag & RX_FLAG_AMSDU_MORE));
889         ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
890                         skb->data, skb->len);
891
892         ieee80211_rx(ar->hw, skb);
893 }
894
895 static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
896 {
897         /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
898         return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
899 }
900
901 static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
902                                 struct ieee80211_rx_status *rx_status,
903                                 struct sk_buff *skb_in)
904 {
905         struct ath10k *ar = htt->ar;
906         struct htt_rx_desc *rxd;
907         struct sk_buff *skb = skb_in;
908         struct sk_buff *first;
909         enum rx_msdu_decap_format fmt;
910         enum htt_rx_mpdu_encrypt_type enctype;
911         struct ieee80211_hdr *hdr;
912         u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos;
913         unsigned int hdr_len;
914
915         rxd = (void *)skb->data - sizeof(*rxd);
916         enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
917                      RX_MPDU_START_INFO0_ENCRYPT_TYPE);
918
919         hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
920         hdr_len = ieee80211_hdrlen(hdr->frame_control);
921         memcpy(hdr_buf, hdr, hdr_len);
922         hdr = (struct ieee80211_hdr *)hdr_buf;
923
924         first = skb;
925         while (skb) {
926                 void *decap_hdr;
927                 int len;
928
929                 rxd = (void *)skb->data - sizeof(*rxd);
930                 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
931                          RX_MSDU_START_INFO1_DECAP_FORMAT);
932                 decap_hdr = (void *)rxd->rx_hdr_status;
933
934                 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
935
936                 /* First frame in an A-MSDU chain has more decapped data. */
937                 if (skb == first) {
938                         len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
939                         len += round_up(ath10k_htt_rx_crypto_param_len(ar,
940                                                 enctype), 4);
941                         decap_hdr += len;
942                 }
943
944                 switch (fmt) {
945                 case RX_MSDU_DECAP_RAW:
946                         /* remove trailing FCS */
947                         skb_trim(skb, skb->len - FCS_LEN);
948                         break;
949                 case RX_MSDU_DECAP_NATIVE_WIFI:
950                         /* pull decapped header and copy SA & DA */
951                         hdr = (struct ieee80211_hdr *)skb->data;
952                         hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
953                         memcpy(da, ieee80211_get_DA(hdr), ETH_ALEN);
954                         memcpy(sa, ieee80211_get_SA(hdr), ETH_ALEN);
955                         skb_pull(skb, hdr_len);
956
957                         /* push original 802.11 header */
958                         hdr = (struct ieee80211_hdr *)hdr_buf;
959                         hdr_len = ieee80211_hdrlen(hdr->frame_control);
960                         memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
961
962                         /* original A-MSDU header has the bit set but we're
963                          * not including A-MSDU subframe header */
964                         hdr = (struct ieee80211_hdr *)skb->data;
965                         qos = ieee80211_get_qos_ctl(hdr);
966                         qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
967
968                         /* original 802.11 header has a different DA and in
969                          * case of 4addr it may also have different SA
970                          */
971                         memcpy(ieee80211_get_DA(hdr), da, ETH_ALEN);
972                         memcpy(ieee80211_get_SA(hdr), sa, ETH_ALEN);
973                         break;
974                 case RX_MSDU_DECAP_ETHERNET2_DIX:
975                         /* strip ethernet header and insert decapped 802.11
976                          * header, amsdu subframe header and rfc1042 header */
977
978                         len = 0;
979                         len += sizeof(struct rfc1042_hdr);
980                         len += sizeof(struct amsdu_subframe_hdr);
981
982                         skb_pull(skb, sizeof(struct ethhdr));
983                         memcpy(skb_push(skb, len), decap_hdr, len);
984                         memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
985                         break;
986                 case RX_MSDU_DECAP_8023_SNAP_LLC:
987                         /* insert decapped 802.11 header making a singly
988                          * A-MSDU */
989                         memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
990                         break;
991                 }
992
993                 skb_in = skb;
994                 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
995                                           false);
996                 skb = skb->next;
997                 skb_in->next = NULL;
998
999                 if (skb)
1000                         rx_status->flag |= RX_FLAG_AMSDU_MORE;
1001                 else
1002                         rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
1003
1004                 ath10k_process_rx(htt->ar, rx_status, skb_in);
1005         }
1006
1007         /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
1008          * monitor interface active for sniffing purposes. */
1009 }
1010
1011 static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
1012                                struct ieee80211_rx_status *rx_status,
1013                                struct sk_buff *skb)
1014 {
1015         struct ath10k *ar = htt->ar;
1016         struct htt_rx_desc *rxd;
1017         struct ieee80211_hdr *hdr;
1018         enum rx_msdu_decap_format fmt;
1019         enum htt_rx_mpdu_encrypt_type enctype;
1020         int hdr_len;
1021         void *rfc1042;
1022
1023         /* This shouldn't happen. If it does than it may be a FW bug. */
1024         if (skb->next) {
1025                 ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n");
1026                 ath10k_htt_rx_free_msdu_chain(skb->next);
1027                 skb->next = NULL;
1028         }
1029
1030         rxd = (void *)skb->data - sizeof(*rxd);
1031         fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1032                  RX_MSDU_START_INFO1_DECAP_FORMAT);
1033         enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1034                      RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1035         hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1036         hdr_len = ieee80211_hdrlen(hdr->frame_control);
1037
1038         skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
1039
1040         switch (fmt) {
1041         case RX_MSDU_DECAP_RAW:
1042                 /* remove trailing FCS */
1043                 skb_trim(skb, skb->len - FCS_LEN);
1044                 break;
1045         case RX_MSDU_DECAP_NATIVE_WIFI:
1046                 /* Pull decapped header */
1047                 hdr = (struct ieee80211_hdr *)skb->data;
1048                 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
1049                 skb_pull(skb, hdr_len);
1050
1051                 /* Push original header */
1052                 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1053                 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1054                 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
1055                 break;
1056         case RX_MSDU_DECAP_ETHERNET2_DIX:
1057                 /* strip ethernet header and insert decapped 802.11 header and
1058                  * rfc1042 header */
1059
1060                 rfc1042 = hdr;
1061                 rfc1042 += roundup(hdr_len, 4);
1062                 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar,
1063                                         enctype), 4);
1064
1065                 skb_pull(skb, sizeof(struct ethhdr));
1066                 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
1067                        rfc1042, sizeof(struct rfc1042_hdr));
1068                 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
1069                 break;
1070         case RX_MSDU_DECAP_8023_SNAP_LLC:
1071                 /* remove A-MSDU subframe header and insert
1072                  * decapped 802.11 header. rfc1042 header is already there */
1073
1074                 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1075                 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
1076                 break;
1077         }
1078
1079         ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
1080
1081         ath10k_process_rx(htt->ar, rx_status, skb);
1082 }
1083
1084 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1085 {
1086         struct htt_rx_desc *rxd;
1087         u32 flags, info;
1088         bool is_ip4, is_ip6;
1089         bool is_tcp, is_udp;
1090         bool ip_csum_ok, tcpudp_csum_ok;
1091
1092         rxd = (void *)skb->data - sizeof(*rxd);
1093         flags = __le32_to_cpu(rxd->attention.flags);
1094         info = __le32_to_cpu(rxd->msdu_start.info1);
1095
1096         is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1097         is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1098         is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1099         is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1100         ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1101         tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1102
1103         if (!is_ip4 && !is_ip6)
1104                 return CHECKSUM_NONE;
1105         if (!is_tcp && !is_udp)
1106                 return CHECKSUM_NONE;
1107         if (!ip_csum_ok)
1108                 return CHECKSUM_NONE;
1109         if (!tcpudp_csum_ok)
1110                 return CHECKSUM_NONE;
1111
1112         return CHECKSUM_UNNECESSARY;
1113 }
1114
1115 static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1116 {
1117         struct sk_buff *next = msdu_head->next;
1118         struct sk_buff *to_free = next;
1119         int space;
1120         int total_len = 0;
1121
1122         /* TODO:  Might could optimize this by using
1123          * skb_try_coalesce or similar method to
1124          * decrease copying, or maybe get mac80211 to
1125          * provide a way to just receive a list of
1126          * skb?
1127          */
1128
1129         msdu_head->next = NULL;
1130
1131         /* Allocate total length all at once. */
1132         while (next) {
1133                 total_len += next->len;
1134                 next = next->next;
1135         }
1136
1137         space = total_len - skb_tailroom(msdu_head);
1138         if ((space > 0) &&
1139             (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1140                 /* TODO:  bump some rx-oom error stat */
1141                 /* put it back together so we can free the
1142                  * whole list at once.
1143                  */
1144                 msdu_head->next = to_free;
1145                 return -1;
1146         }
1147
1148         /* Walk list again, copying contents into
1149          * msdu_head
1150          */
1151         next = to_free;
1152         while (next) {
1153                 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1154                                           next->len);
1155                 next = next->next;
1156         }
1157
1158         /* If here, we have consolidated skb.  Free the
1159          * fragments and pass the main skb on up the
1160          * stack.
1161          */
1162         ath10k_htt_rx_free_msdu_chain(to_free);
1163         return 0;
1164 }
1165
1166 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1167                                         struct sk_buff *head,
1168                                         enum htt_rx_mpdu_status status,
1169                                         bool channel_set,
1170                                         u32 attention)
1171 {
1172         struct ath10k *ar = htt->ar;
1173
1174         if (head->len == 0) {
1175                 ath10k_dbg(ar, ATH10K_DBG_HTT,
1176                            "htt rx dropping due to zero-len\n");
1177                 return false;
1178         }
1179
1180         if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
1181                 ath10k_dbg(ar, ATH10K_DBG_HTT,
1182                            "htt rx dropping due to decrypt-err\n");
1183                 return false;
1184         }
1185
1186         if (!channel_set) {
1187                 ath10k_warn(ar, "no channel configured; ignoring frame!\n");
1188                 return false;
1189         }
1190
1191         /* Skip mgmt frames while we handle this in WMI */
1192         if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
1193             attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
1194                 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
1195                 return false;
1196         }
1197
1198         if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1199             status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1200             status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
1201             !htt->ar->monitor_started) {
1202                 ath10k_dbg(ar, ATH10K_DBG_HTT,
1203                            "htt rx ignoring frame w/ status %d\n",
1204                            status);
1205                 return false;
1206         }
1207
1208         if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
1209                 ath10k_dbg(ar, ATH10K_DBG_HTT,
1210                            "htt rx CAC running\n");
1211                 return false;
1212         }
1213
1214         return true;
1215 }
1216
1217 static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1218                                   struct htt_rx_indication *rx)
1219 {
1220         struct ath10k *ar = htt->ar;
1221         struct ieee80211_rx_status *rx_status = &htt->rx_status;
1222         struct htt_rx_indication_mpdu_range *mpdu_ranges;
1223         struct htt_rx_desc *rxd;
1224         enum htt_rx_mpdu_status status;
1225         struct ieee80211_hdr *hdr;
1226         int num_mpdu_ranges;
1227         u32 attention;
1228         int fw_desc_len;
1229         u8 *fw_desc;
1230         bool channel_set;
1231         int i, j;
1232         int ret;
1233
1234         lockdep_assert_held(&htt->rx_ring.lock);
1235
1236         fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1237         fw_desc = (u8 *)&rx->fw_desc;
1238
1239         num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1240                              HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1241         mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1242
1243         /* Fill this once, while this is per-ppdu */
1244         if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1245                 memset(rx_status, 0, sizeof(*rx_status));
1246                 rx_status->signal  = ATH10K_DEFAULT_NOISE_FLOOR +
1247                                      rx->ppdu.combined_rssi;
1248         }
1249
1250         if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1251                 /* TSF available only in 32-bit */
1252                 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1253                 rx_status->flag |= RX_FLAG_MACTIME_END;
1254         }
1255
1256         channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
1257
1258         if (channel_set) {
1259                 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
1260                                       rx->ppdu.info0,
1261                                       __le32_to_cpu(rx->ppdu.info1),
1262                                       __le32_to_cpu(rx->ppdu.info2),
1263                                       rx_status);
1264         }
1265
1266         ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
1267                         rx, sizeof(*rx) +
1268                         (sizeof(struct htt_rx_indication_mpdu_range) *
1269                                 num_mpdu_ranges));
1270
1271         for (i = 0; i < num_mpdu_ranges; i++) {
1272                 status = mpdu_ranges[i].mpdu_range_status;
1273
1274                 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1275                         struct sk_buff *msdu_head, *msdu_tail;
1276
1277                         attention = 0;
1278                         msdu_head = NULL;
1279                         msdu_tail = NULL;
1280                         ret = ath10k_htt_rx_amsdu_pop(htt,
1281                                                       &fw_desc,
1282                                                       &fw_desc_len,
1283                                                       &msdu_head,
1284                                                       &msdu_tail,
1285                                                       &attention);
1286
1287                         if (ret < 0) {
1288                                 ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n",
1289                                             ret);
1290                                 ath10k_htt_rx_free_msdu_chain(msdu_head);
1291                                 continue;
1292                         }
1293
1294                         rxd = container_of((void *)msdu_head->data,
1295                                            struct htt_rx_desc,
1296                                            msdu_payload);
1297
1298                         if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
1299                                                          status,
1300                                                          channel_set,
1301                                                          attention)) {
1302                                 ath10k_htt_rx_free_msdu_chain(msdu_head);
1303                                 continue;
1304                         }
1305
1306                         if (ret > 0 &&
1307                             ath10k_unchain_msdu(msdu_head) < 0) {
1308                                 ath10k_htt_rx_free_msdu_chain(msdu_head);
1309                                 continue;
1310                         }
1311
1312                         if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
1313                                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
1314                         else
1315                                 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
1316
1317                         if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
1318                                 rx_status->flag |= RX_FLAG_MMIC_ERROR;
1319                         else
1320                                 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
1321
1322                         hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1323
1324                         if (ath10k_htt_rx_hdr_is_amsdu(hdr))
1325                                 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
1326                         else
1327                                 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
1328                 }
1329         }
1330
1331         tasklet_schedule(&htt->rx_replenish_task);
1332 }
1333
1334 static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
1335                                        struct htt_rx_fragment_indication *frag)
1336 {
1337         struct ath10k *ar = htt->ar;
1338         struct sk_buff *msdu_head, *msdu_tail;
1339         enum htt_rx_mpdu_encrypt_type enctype;
1340         struct htt_rx_desc *rxd;
1341         enum rx_msdu_decap_format fmt;
1342         struct ieee80211_rx_status *rx_status = &htt->rx_status;
1343         struct ieee80211_hdr *hdr;
1344         int ret;
1345         bool tkip_mic_err;
1346         bool decrypt_err;
1347         u8 *fw_desc;
1348         int fw_desc_len, hdrlen, paramlen;
1349         int trim;
1350         u32 attention = 0;
1351
1352         fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1353         fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1354
1355         msdu_head = NULL;
1356         msdu_tail = NULL;
1357
1358         spin_lock_bh(&htt->rx_ring.lock);
1359         ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
1360                                       &msdu_head, &msdu_tail,
1361                                       &attention);
1362         spin_unlock_bh(&htt->rx_ring.lock);
1363
1364         ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
1365
1366         if (ret) {
1367                 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
1368                             ret);
1369                 ath10k_htt_rx_free_msdu_chain(msdu_head);
1370                 return;
1371         }
1372
1373         /* FIXME: implement signal strength */
1374         rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1375
1376         hdr = (struct ieee80211_hdr *)msdu_head->data;
1377         rxd = (void *)msdu_head->data - sizeof(*rxd);
1378         tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1379         decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1380         fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1381                  RX_MSDU_START_INFO1_DECAP_FORMAT);
1382
1383         if (fmt != RX_MSDU_DECAP_RAW) {
1384                 ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n");
1385                 dev_kfree_skb_any(msdu_head);
1386                 goto end;
1387         }
1388
1389         enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1390                      RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1391         ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
1392                                   true);
1393         msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
1394
1395         if (tkip_mic_err)
1396                 ath10k_warn(ar, "tkip mic error\n");
1397
1398         if (decrypt_err) {
1399                 ath10k_warn(ar, "decryption err in fragmented rx\n");
1400                 dev_kfree_skb_any(msdu_head);
1401                 goto end;
1402         }
1403
1404         if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
1405                 hdrlen = ieee80211_hdrlen(hdr->frame_control);
1406                 paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype);
1407
1408                 /* It is more efficient to move the header than the payload */
1409                 memmove((void *)msdu_head->data + paramlen,
1410                         (void *)msdu_head->data,
1411                         hdrlen);
1412                 skb_pull(msdu_head, paramlen);
1413                 hdr = (struct ieee80211_hdr *)msdu_head->data;
1414         }
1415
1416         /* remove trailing FCS */
1417         trim  = 4;
1418
1419         /* remove crypto trailer */
1420         trim += ath10k_htt_rx_crypto_tail_len(ar, enctype);
1421
1422         /* last fragment of TKIP frags has MIC */
1423         if (!ieee80211_has_morefrags(hdr->frame_control) &&
1424             enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1425                 trim += 8;
1426
1427         if (trim > msdu_head->len) {
1428                 ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n");
1429                 dev_kfree_skb_any(msdu_head);
1430                 goto end;
1431         }
1432
1433         skb_trim(msdu_head, msdu_head->len - trim);
1434
1435         ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
1436                         msdu_head->data, msdu_head->len);
1437         ath10k_process_rx(htt->ar, rx_status, msdu_head);
1438
1439 end:
1440         if (fw_desc_len > 0) {
1441                 ath10k_dbg(ar, ATH10K_DBG_HTT,
1442                            "expecting more fragmented rx in one indication %d\n",
1443                            fw_desc_len);
1444         }
1445 }
1446
1447 static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1448                                        struct sk_buff *skb)
1449 {
1450         struct ath10k_htt *htt = &ar->htt;
1451         struct htt_resp *resp = (struct htt_resp *)skb->data;
1452         struct htt_tx_done tx_done = {};
1453         int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1454         __le16 msdu_id;
1455         int i;
1456
1457         lockdep_assert_held(&htt->tx_lock);
1458
1459         switch (status) {
1460         case HTT_DATA_TX_STATUS_NO_ACK:
1461                 tx_done.no_ack = true;
1462                 break;
1463         case HTT_DATA_TX_STATUS_OK:
1464                 break;
1465         case HTT_DATA_TX_STATUS_DISCARD:
1466         case HTT_DATA_TX_STATUS_POSTPONE:
1467         case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1468                 tx_done.discard = true;
1469                 break;
1470         default:
1471                 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
1472                 tx_done.discard = true;
1473                 break;
1474         }
1475
1476         ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1477                    resp->data_tx_completion.num_msdus);
1478
1479         for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1480                 msdu_id = resp->data_tx_completion.msdus[i];
1481                 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1482                 ath10k_txrx_tx_unref(htt, &tx_done);
1483         }
1484 }
1485
1486 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1487 {
1488         struct htt_rx_addba *ev = &resp->rx_addba;
1489         struct ath10k_peer *peer;
1490         struct ath10k_vif *arvif;
1491         u16 info0, tid, peer_id;
1492
1493         info0 = __le16_to_cpu(ev->info0);
1494         tid = MS(info0, HTT_RX_BA_INFO0_TID);
1495         peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1496
1497         ath10k_dbg(ar, ATH10K_DBG_HTT,
1498                    "htt rx addba tid %hu peer_id %hu size %hhu\n",
1499                    tid, peer_id, ev->window_size);
1500
1501         spin_lock_bh(&ar->data_lock);
1502         peer = ath10k_peer_find_by_id(ar, peer_id);
1503         if (!peer) {
1504                 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
1505                             peer_id);
1506                 spin_unlock_bh(&ar->data_lock);
1507                 return;
1508         }
1509
1510         arvif = ath10k_get_arvif(ar, peer->vdev_id);
1511         if (!arvif) {
1512                 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
1513                             peer->vdev_id);
1514                 spin_unlock_bh(&ar->data_lock);
1515                 return;
1516         }
1517
1518         ath10k_dbg(ar, ATH10K_DBG_HTT,
1519                    "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1520                    peer->addr, tid, ev->window_size);
1521
1522         ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1523         spin_unlock_bh(&ar->data_lock);
1524 }
1525
1526 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1527 {
1528         struct htt_rx_delba *ev = &resp->rx_delba;
1529         struct ath10k_peer *peer;
1530         struct ath10k_vif *arvif;
1531         u16 info0, tid, peer_id;
1532
1533         info0 = __le16_to_cpu(ev->info0);
1534         tid = MS(info0, HTT_RX_BA_INFO0_TID);
1535         peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1536
1537         ath10k_dbg(ar, ATH10K_DBG_HTT,
1538                    "htt rx delba tid %hu peer_id %hu\n",
1539                    tid, peer_id);
1540
1541         spin_lock_bh(&ar->data_lock);
1542         peer = ath10k_peer_find_by_id(ar, peer_id);
1543         if (!peer) {
1544                 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
1545                             peer_id);
1546                 spin_unlock_bh(&ar->data_lock);
1547                 return;
1548         }
1549
1550         arvif = ath10k_get_arvif(ar, peer->vdev_id);
1551         if (!arvif) {
1552                 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
1553                             peer->vdev_id);
1554                 spin_unlock_bh(&ar->data_lock);
1555                 return;
1556         }
1557
1558         ath10k_dbg(ar, ATH10K_DBG_HTT,
1559                    "htt rx stop rx ba session sta %pM tid %hu\n",
1560                    peer->addr, tid);
1561
1562         ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1563         spin_unlock_bh(&ar->data_lock);
1564 }
1565
1566 void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1567 {
1568         struct ath10k_htt *htt = &ar->htt;
1569         struct htt_resp *resp = (struct htt_resp *)skb->data;
1570
1571         /* confirm alignment */
1572         if (!IS_ALIGNED((unsigned long)skb->data, 4))
1573                 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
1574
1575         ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
1576                    resp->hdr.msg_type);
1577         switch (resp->hdr.msg_type) {
1578         case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1579                 htt->target_version_major = resp->ver_resp.major;
1580                 htt->target_version_minor = resp->ver_resp.minor;
1581                 complete(&htt->target_version_received);
1582                 break;
1583         }
1584         case HTT_T2H_MSG_TYPE_RX_IND:
1585                 spin_lock_bh(&htt->rx_ring.lock);
1586                 __skb_queue_tail(&htt->rx_compl_q, skb);
1587                 spin_unlock_bh(&htt->rx_ring.lock);
1588                 tasklet_schedule(&htt->txrx_compl_task);
1589                 return;
1590         case HTT_T2H_MSG_TYPE_PEER_MAP: {
1591                 struct htt_peer_map_event ev = {
1592                         .vdev_id = resp->peer_map.vdev_id,
1593                         .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1594                 };
1595                 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1596                 ath10k_peer_map_event(htt, &ev);
1597                 break;
1598         }
1599         case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1600                 struct htt_peer_unmap_event ev = {
1601                         .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1602                 };
1603                 ath10k_peer_unmap_event(htt, &ev);
1604                 break;
1605         }
1606         case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1607                 struct htt_tx_done tx_done = {};
1608                 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1609
1610                 tx_done.msdu_id =
1611                         __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1612
1613                 switch (status) {
1614                 case HTT_MGMT_TX_STATUS_OK:
1615                         break;
1616                 case HTT_MGMT_TX_STATUS_RETRY:
1617                         tx_done.no_ack = true;
1618                         break;
1619                 case HTT_MGMT_TX_STATUS_DROP:
1620                         tx_done.discard = true;
1621                         break;
1622                 }
1623
1624                 spin_lock_bh(&htt->tx_lock);
1625                 ath10k_txrx_tx_unref(htt, &tx_done);
1626                 spin_unlock_bh(&htt->tx_lock);
1627                 break;
1628         }
1629         case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1630                 spin_lock_bh(&htt->tx_lock);
1631                 __skb_queue_tail(&htt->tx_compl_q, skb);
1632                 spin_unlock_bh(&htt->tx_lock);
1633                 tasklet_schedule(&htt->txrx_compl_task);
1634                 return;
1635         case HTT_T2H_MSG_TYPE_SEC_IND: {
1636                 struct ath10k *ar = htt->ar;
1637                 struct htt_security_indication *ev = &resp->security_indication;
1638
1639                 ath10k_dbg(ar, ATH10K_DBG_HTT,
1640                            "sec ind peer_id %d unicast %d type %d\n",
1641                           __le16_to_cpu(ev->peer_id),
1642                           !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1643                           MS(ev->flags, HTT_SECURITY_TYPE));
1644                 complete(&ar->install_key_done);
1645                 break;
1646         }
1647         case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
1648                 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1649                                 skb->data, skb->len);
1650                 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1651                 break;
1652         }
1653         case HTT_T2H_MSG_TYPE_TEST:
1654                 /* FIX THIS */
1655                 break;
1656         case HTT_T2H_MSG_TYPE_STATS_CONF:
1657                 trace_ath10k_htt_stats(ar, skb->data, skb->len);
1658                 break;
1659         case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
1660                 /* Firmware can return tx frames if it's unable to fully
1661                  * process them and suspects host may be able to fix it. ath10k
1662                  * sends all tx frames as already inspected so this shouldn't
1663                  * happen unless fw has a bug.
1664                  */
1665                 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
1666                 break;
1667         case HTT_T2H_MSG_TYPE_RX_ADDBA:
1668                 ath10k_htt_rx_addba(ar, resp);
1669                 break;
1670         case HTT_T2H_MSG_TYPE_RX_DELBA:
1671                 ath10k_htt_rx_delba(ar, resp);
1672                 break;
1673         case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1674                 /* Ignore this event because mac80211 takes care of Rx
1675                  * aggregation reordering.
1676                  */
1677                 break;
1678         }
1679         default:
1680                 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt event (%d) not handled\n",
1681                            resp->hdr.msg_type);
1682                 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1683                                 skb->data, skb->len);
1684                 break;
1685         };
1686
1687         /* Free the indication buffer */
1688         dev_kfree_skb_any(skb);
1689 }
1690
1691 static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1692 {
1693         struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1694         struct htt_resp *resp;
1695         struct sk_buff *skb;
1696
1697         spin_lock_bh(&htt->tx_lock);
1698         while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
1699                 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1700                 dev_kfree_skb_any(skb);
1701         }
1702         spin_unlock_bh(&htt->tx_lock);
1703
1704         spin_lock_bh(&htt->rx_ring.lock);
1705         while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
1706                 resp = (struct htt_resp *)skb->data;
1707                 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1708                 dev_kfree_skb_any(skb);
1709         }
1710         spin_unlock_bh(&htt->rx_ring.lock);
1711 }