drivers/net/wireless/ath/ath6kl/init.c

   1
   2 /*
   3  * Copyright (c) 2011 Atheros Communications Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #include <linux/moduleparam.h>
  19 #include <linux/errno.h>
  20 #include <linux/export.h>
  21 #include <linux/of.h>
  22 #include <linux/mmc/sdio_func.h>
  23
  24 #include "core.h"
  25 #include "cfg80211.h"
  26 #include "target.h"
  27 #include "debug.h"
  28 #include "hif-ops.h"
  29
  30 static unsigned int testmode;
  31
  32 module_param(testmode, uint, 0644);
  33
  34 static const struct ath6kl_hw hw_list[] = {
  35         {
  36                 .id                             = AR6003_HW_2_0_VERSION,
  37                 .name                           = "ar6003 hw 2.0",
  38                 .dataset_patch_addr             = 0x57e884,
  39                 .app_load_addr                  = 0x543180,
  40                 .board_ext_data_addr            = 0x57e500,
  41                 .reserved_ram_size              = 6912,
  42                 .refclk_hz                      = 26000000,
  43                 .uarttx_pin                     = 8,
  44
  45                 /* hw2.0 needs override address hardcoded */
  46                 .app_start_override_addr        = 0x944C00,
  47
  48                 .fw = {
  49                         .dir            = AR6003_HW_2_0_FW_DIR,
  50                         .otp            = AR6003_HW_2_0_OTP_FILE,
  51                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
  52                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  53                         .patch          = AR6003_HW_2_0_PATCH_FILE,
  54                 },
  55
  56                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
  57                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  58         },
  59         {
  60                 .id                             = AR6003_HW_2_1_1_VERSION,
  61                 .name                           = "ar6003 hw 2.1.1",
  62                 .dataset_patch_addr             = 0x57ff74,
  63                 .app_load_addr                  = 0x1234,
  64                 .board_ext_data_addr            = 0x542330,
  65                 .reserved_ram_size              = 512,
  66                 .refclk_hz                      = 26000000,
  67                 .uarttx_pin                     = 8,
  68                 .testscript_addr                = 0x57ef74,
  69
  70                 .fw = {
  71                         .dir            = AR6003_HW_2_1_1_FW_DIR,
  72                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
  73                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
  74                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  75                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
  76                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
  77                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
  78                 },
  79
  80                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  81                 .fw_default_board       = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  82         },
  83         {
  84                 .id                             = AR6004_HW_1_0_VERSION,
  85                 .name                           = "ar6004 hw 1.0",
  86                 .dataset_patch_addr             = 0x57e884,
  87                 .app_load_addr                  = 0x1234,
  88                 .board_ext_data_addr            = 0x437000,
  89                 .reserved_ram_size              = 19456,
  90                 .board_addr                     = 0x433900,
  91                 .refclk_hz                      = 26000000,
  92                 .uarttx_pin                     = 11,
  93
  94                 .fw = {
  95                         .dir            = AR6004_HW_1_0_FW_DIR,
  96                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
  97                 },
  98
  99                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
 100                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
 101         },
 102         {
 103                 .id                             = AR6004_HW_1_1_VERSION,
 104                 .name                           = "ar6004 hw 1.1",
 105                 .dataset_patch_addr             = 0x57e884,
 106                 .app_load_addr                  = 0x1234,
 107                 .board_ext_data_addr            = 0x437000,
 108                 .reserved_ram_size              = 11264,
 109                 .board_addr                     = 0x43d400,
 110                 .refclk_hz                      = 40000000,
 111                 .uarttx_pin                     = 11,
 112
 113                 .fw = {
 114                         .dir            = AR6004_HW_1_1_FW_DIR,
 115                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
 116                 },
 117
 118                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
 119                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
 120         },
 121 };
 122
 123 /*
 124  * Include definitions here that can be used to tune the WLAN module
 125  * behavior. Different customers can tune the behavior as per their needs,
 126  * here.
 127  */
 128
 129 /*
 130  * This configuration item enable/disable keepalive support.
 131  * Keepalive support: In the absence of any data traffic to AP, null
 132  * frames will be sent to the AP at periodic interval, to keep the association
 133  * active. This configuration item defines the periodic interval.
 134  * Use value of zero to disable keepalive support
 135  * Default: 60 seconds
 136  */
 137 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
 138
 139 /*
 140  * This configuration item sets the value of disconnect timeout
 141  * Firmware delays sending the disconnec event to the host for this
 142  * timeout after is gets disconnected from the current AP.
 143  * If the firmware successly roams within the disconnect timeout
 144  * it sends a new connect event
 145  */
 146 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
 147
 148
 149 #define ATH6KL_DATA_OFFSET    64
 150 struct sk_buff *ath6kl_buf_alloc(int size)
 151 {
 152         struct sk_buff *skb;
 153         u16 reserved;
 154
 155         /* Add chacheline space at front and back of buffer */
 156         reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
 157                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
 158         skb = dev_alloc_skb(size + reserved);
 159
 160         if (skb)
 161                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
 162         return skb;
 163 }
 164
 165 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
 166 {
 167         vif->ssid_len = 0;
 168         memset(vif->ssid, 0, sizeof(vif->ssid));
 169
 170         vif->dot11_auth_mode = OPEN_AUTH;
 171         vif->auth_mode = NONE_AUTH;
 172         vif->prwise_crypto = NONE_CRYPT;
 173         vif->prwise_crypto_len = 0;
 174         vif->grp_crypto = NONE_CRYPT;
 175         vif->grp_crypto_len = 0;
 176         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 177         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
 178         memset(vif->bssid, 0, sizeof(vif->bssid));
 179         vif->bss_ch = 0;
 180 }
 181
 182 static int ath6kl_set_host_app_area(struct ath6kl *ar)
 183 {
 184         u32 address, data;
 185         struct host_app_area host_app_area;
 186
 187         /* Fetch the address of the host_app_area_s
 188          * instance in the host interest area */
 189         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
 190         address = TARG_VTOP(ar->target_type, address);
 191
 192         if (ath6kl_diag_read32(ar, address, &data))
 193                 return -EIO;
 194
 195         address = TARG_VTOP(ar->target_type, data);
 196         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
 197         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
 198                               sizeof(struct host_app_area)))
 199                 return -EIO;
 200
 201         return 0;
 202 }
 203
 204 static inline void set_ac2_ep_map(struct ath6kl *ar,
 205                                   u8 ac,
 206                                   enum htc_endpoint_id ep)
 207 {
 208         ar->ac2ep_map[ac] = ep;
 209         ar->ep2ac_map[ep] = ac;
 210 }
 211
 212 /* connect to a service */
 213 static int ath6kl_connectservice(struct ath6kl *ar,
 214                                  struct htc_service_connect_req  *con_req,
 215                                  char *desc)
 216 {
 217         int status;
 218         struct htc_service_connect_resp response;
 219
 220         memset(&response, 0, sizeof(response));
 221
 222         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
 223         if (status) {
 224                 ath6kl_err("failed to connect to %s service status:%d\n",
 225                            desc, status);
 226                 return status;
 227         }
 228
 229         switch (con_req->svc_id) {
 230         case WMI_CONTROL_SVC:
 231                 if (test_bit(WMI_ENABLED, &ar->flag))
 232                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
 233                 ar->ctrl_ep = response.endpoint;
 234                 break;
 235         case WMI_DATA_BE_SVC:
 236                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
 237                 break;
 238         case WMI_DATA_BK_SVC:
 239                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
 240                 break;
 241         case WMI_DATA_VI_SVC:
 242                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
 243                 break;
 244         case WMI_DATA_VO_SVC:
 245                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
 246                 break;
 247         default:
 248                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
 249                 return -EINVAL;
 250         }
 251
 252         return 0;
 253 }
 254
 255 static int ath6kl_init_service_ep(struct ath6kl *ar)
 256 {
 257         struct htc_service_connect_req connect;
 258
 259         memset(&connect, 0, sizeof(connect));
 260
 261         /* these fields are the same for all service endpoints */
 262         connect.ep_cb.rx = ath6kl_rx;
 263         connect.ep_cb.rx_refill = ath6kl_rx_refill;
 264         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
 265
 266         /*
 267          * Set the max queue depth so that our ath6kl_tx_queue_full handler
 268          * gets called.
 269         */
 270         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
 271         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
 272         if (!connect.ep_cb.rx_refill_thresh)
 273                 connect.ep_cb.rx_refill_thresh++;
 274
 275         /* connect to control service */
 276         connect.svc_id = WMI_CONTROL_SVC;
 277         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
 278                 return -EIO;
 279
 280         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
 281
 282         /*
 283          * Limit the HTC message size on the send path, although e can
 284          * receive A-MSDU frames of 4K, we will only send ethernet-sized
 285          * (802.3) frames on the send path.
 286          */
 287         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
 288
 289         /*
 290          * To reduce the amount of committed memory for larger A_MSDU
 291          * frames, use the recv-alloc threshold mechanism for larger
 292          * packets.
 293          */
 294         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
 295         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
 296
 297         /*
 298          * For the remaining data services set the connection flag to
 299          * reduce dribbling, if configured to do so.
 300          */
 301         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
 302         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
 303         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
 304
 305         connect.svc_id = WMI_DATA_BE_SVC;
 306
 307         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
 308                 return -EIO;
 309
 310         /* connect to back-ground map this to WMI LOW_PRI */
 311         connect.svc_id = WMI_DATA_BK_SVC;
 312         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
 313                 return -EIO;
 314
 315         /* connect to Video service, map this to to HI PRI */
 316         connect.svc_id = WMI_DATA_VI_SVC;
 317         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
 318                 return -EIO;
 319
 320         /*
 321          * Connect to VO service, this is currently not mapped to a WMI
 322          * priority stream due to historical reasons. WMI originally
 323          * defined 3 priorities over 3 mailboxes We can change this when
 324          * WMI is reworked so that priorities are not dependent on
 325          * mailboxes.
 326          */
 327         connect.svc_id = WMI_DATA_VO_SVC;
 328         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
 329                 return -EIO;
 330
 331         return 0;
 332 }
 333
 334 void ath6kl_init_control_info(struct ath6kl_vif *vif)
 335 {
 336         ath6kl_init_profile_info(vif);
 337         vif->def_txkey_index = 0;
 338         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 339         vif->ch_hint = 0;
 340 }
 341
 342 /*
 343  * Set HTC/Mbox operational parameters, this can only be called when the
 344  * target is in the BMI phase.
 345  */
 346 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
 347                                  u8 htc_ctrl_buf)
 348 {
 349         int status;
 350         u32 blk_size;
 351
 352         blk_size = ar->mbox_info.block_size;
 353
 354         if (htc_ctrl_buf)
 355                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
 356
 357         /* set the host interest area for the block size */
 358         status = ath6kl_bmi_write(ar,
 359                         ath6kl_get_hi_item_addr(ar,
 360                         HI_ITEM(hi_mbox_io_block_sz)),
 361                         (u8 *)&blk_size,
 362                         4);
 363         if (status) {
 364                 ath6kl_err("bmi_write_memory for IO block size failed\n");
 365                 goto out;
 366         }
 367
 368         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
 369                    blk_size,
 370                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
 371
 372         if (mbox_isr_yield_val) {
 373                 /* set the host interest area for the mbox ISR yield limit */
 374                 status = ath6kl_bmi_write(ar,
 375                                 ath6kl_get_hi_item_addr(ar,
 376                                 HI_ITEM(hi_mbox_isr_yield_limit)),
 377                                 (u8 *)&mbox_isr_yield_val,
 378                                 4);
 379                 if (status) {
 380                         ath6kl_err("bmi_write_memory for yield limit failed\n");
 381                         goto out;
 382                 }
 383         }
 384
 385 out:
 386         return status;
 387 }
 388
 389 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
 390 {
 391         int status = 0;
 392         int ret;
 393
 394         /*
 395          * Configure the device for rx dot11 header rules. "0,0" are the
 396          * default values. Required if checksum offload is needed. Set
 397          * RxMetaVersion to 2.
 398          */
 399         if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
 400                                                ar->rx_meta_ver, 0, 0)) {
 401                 ath6kl_err("unable to set the rx frame format\n");
 402                 status = -EIO;
 403         }
 404
 405         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
 406                 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
 407                      IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
 408                         ath6kl_err("unable to set power save fail event policy\n");
 409                         status = -EIO;
 410                 }
 411
 412         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
 413                 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
 414                      WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
 415                         ath6kl_err("unable to set barker preamble policy\n");
 416                         status = -EIO;
 417                 }
 418
 419         if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
 420                         WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
 421                 ath6kl_err("unable to set keep alive interval\n");
 422                 status = -EIO;
 423         }
 424
 425         if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
 426                         WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
 427                 ath6kl_err("unable to set disconnect timeout\n");
 428                 status = -EIO;
 429         }
 430
 431         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
 432                 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
 433                         ath6kl_err("unable to set txop bursting\n");
 434                         status = -EIO;
 435                 }
 436
 437         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 438                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
 439                                               P2P_FLAG_CAPABILITIES_REQ |
 440                                               P2P_FLAG_MACADDR_REQ |
 441                                               P2P_FLAG_HMODEL_REQ);
 442                 if (ret) {
 443                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
 444                                    "capabilities (%d) - assuming P2P not "
 445                                    "supported\n", ret);
 446                         ar->p2p = false;
 447                 }
 448         }
 449
 450         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 451                 /* Enable Probe Request reporting for P2P */
 452                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
 453                 if (ret) {
 454                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
 455                                    "Request reporting (%d)\n", ret);
 456                 }
 457         }
 458
 459         return status;
 460 }
 461
 462 int ath6kl_configure_target(struct ath6kl *ar)
 463 {
 464         u32 param, ram_reserved_size;
 465         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
 466         int i, status;
 467
 468         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
 469         if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
 470                              HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
 471                 ath6kl_err("bmi_write_memory for uart debug failed\n");
 472                 return -EIO;
 473         }
 474
 475         /*
 476          * Note: Even though the firmware interface type is
 477          * chosen as BSS_STA for all three interfaces, can
 478          * be configured to IBSS/AP as long as the fw submode
 479          * remains normal mode (0 - AP, STA and IBSS). But
 480          * due to an target assert in firmware only one interface is
 481          * configured for now.
 482          */
 483         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
 484
 485         for (i = 0; i < ar->vif_max; i++)
 486                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
 487
 488         /*
 489          * By default, submodes :
 490          *              vif[0] - AP/STA/IBSS
 491          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
 492          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
 493          */
 494
 495         for (i = 0; i < ar->max_norm_iface; i++)
 496                 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
 497                               (i * HI_OPTION_FW_SUBMODE_BITS);
 498
 499         for (i = ar->max_norm_iface; i < ar->vif_max; i++)
 500                 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 501                               (i * HI_OPTION_FW_SUBMODE_BITS);
 502
 503         if (ar->p2p && ar->vif_max == 1)
 504                 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
 505
 506         param = HTC_PROTOCOL_VERSION;
 507         if (ath6kl_bmi_write(ar,
 508                              ath6kl_get_hi_item_addr(ar,
 509                              HI_ITEM(hi_app_host_interest)),
 510                              (u8 *)&param, 4) != 0) {
 511                 ath6kl_err("bmi_write_memory for htc version failed\n");
 512                 return -EIO;
 513         }
 514
 515         /* set the firmware mode to STA/IBSS/AP */
 516         param = 0;
 517
 518         if (ath6kl_bmi_read(ar,
 519                             ath6kl_get_hi_item_addr(ar,
 520                             HI_ITEM(hi_option_flag)),
 521                             (u8 *)&param, 4) != 0) {
 522                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
 523                 return -EIO;
 524         }
 525
 526         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
 527         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
 528         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
 529
 530         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 531         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 532
 533         if (ath6kl_bmi_write(ar,
 534                              ath6kl_get_hi_item_addr(ar,
 535                              HI_ITEM(hi_option_flag)),
 536                              (u8 *)&param,
 537                              4) != 0) {
 538                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
 539                 return -EIO;
 540         }
 541
 542         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
 543
 544         /*
 545          * Hardcode the address use for the extended board data
 546          * Ideally this should be pre-allocate by the OS at boot time
 547          * But since it is a new feature and board data is loaded
 548          * at init time, we have to workaround this from host.
 549          * It is difficult to patch the firmware boot code,
 550          * but possible in theory.
 551          */
 552
 553         param = ar->hw.board_ext_data_addr;
 554         ram_reserved_size = ar->hw.reserved_ram_size;
 555
 556         if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
 557                                         HI_ITEM(hi_board_ext_data)),
 558                              (u8 *)&param, 4) != 0) {
 559                 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
 560                 return -EIO;
 561         }
 562
 563         if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
 564                                         HI_ITEM(hi_end_ram_reserve_sz)),
 565                              (u8 *)&ram_reserved_size, 4) != 0) {
 566                 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
 567                 return -EIO;
 568         }
 569
 570         /* set the block size for the target */
 571         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
 572                 /* use default number of control buffers */
 573                 return -EIO;
 574
 575         /* Configure GPIO AR600x UART */
 576         param = ar->hw.uarttx_pin;
 577         status = ath6kl_bmi_write(ar,
 578                                 ath6kl_get_hi_item_addr(ar,
 579                                 HI_ITEM(hi_dbg_uart_txpin)),
 580                                 (u8 *)&param, 4);
 581         if (status)
 582                 return status;
 583
 584         /* Configure target refclk_hz */
 585         param =  ar->hw.refclk_hz;
 586         status = ath6kl_bmi_write(ar,
 587                                 ath6kl_get_hi_item_addr(ar,
 588                                 HI_ITEM(hi_refclk_hz)),
 589                                 (u8 *)&param, 4);
 590         if (status)
 591                 return status;
 592
 593         return 0;
 594 }
 595
 596 /* firmware upload */
 597 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
 598                          u8 **fw, size_t *fw_len)
 599 {
 600         const struct firmware *fw_entry;
 601         int ret;
 602
 603         ret = request_firmware(&fw_entry, filename, ar->dev);
 604         if (ret)
 605                 return ret;
 606
 607         *fw_len = fw_entry->size;
 608         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
 609
 610         if (*fw == NULL)
 611                 ret = -ENOMEM;
 612
 613         release_firmware(fw_entry);
 614
 615         return ret;
 616 }
 617
 618 #ifdef CONFIG_OF
 619 /*
 620  * Check the device tree for a board-id and use it to construct
 621  * the pathname to the firmware file.  Used (for now) to find a
 622  * fallback to the "bdata.bin" file--typically a symlink to the
 623  * appropriate board-specific file.
 624  */
 625 static bool check_device_tree(struct ath6kl *ar)
 626 {
 627         static const char *board_id_prop = "atheros,board-id";
 628         struct device_node *node;
 629         char board_filename[64];
 630         const char *board_id;
 631         int ret;
 632
 633         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
 634                 board_id = of_get_property(node, board_id_prop, NULL);
 635                 if (board_id == NULL) {
 636                         ath6kl_warn("No \"%s\" property on %s node.\n",
 637                                     board_id_prop, node->name);
 638                         continue;
 639                 }
 640                 snprintf(board_filename, sizeof(board_filename),
 641                          "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
 642
 643                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
 644                                     &ar->fw_board_len);
 645                 if (ret) {
 646                         ath6kl_err("Failed to get DT board file %s: %d\n",
 647                                    board_filename, ret);
 648                         continue;
 649                 }
 650                 return true;
 651         }
 652         return false;
 653 }
 654 #else
 655 static bool check_device_tree(struct ath6kl *ar)
 656 {
 657         return false;
 658 }
 659 #endif /* CONFIG_OF */
 660
 661 static int ath6kl_fetch_board_file(struct ath6kl *ar)
 662 {
 663         const char *filename;
 664         int ret;
 665
 666         if (ar->fw_board != NULL)
 667                 return 0;
 668
 669         if (WARN_ON(ar->hw.fw_board == NULL))
 670                 return -EINVAL;
 671
 672         filename = ar->hw.fw_board;
 673
 674         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 675                             &ar->fw_board_len);
 676         if (ret == 0) {
 677                 /* managed to get proper board file */
 678                 return 0;
 679         }
 680
 681         if (check_device_tree(ar)) {
 682                 /* got board file from device tree */
 683                 return 0;
 684         }
 685
 686         /* there was no proper board file, try to use default instead */
 687         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
 688                     filename, ret);
 689
 690         filename = ar->hw.fw_default_board;
 691
 692         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 693                             &ar->fw_board_len);
 694         if (ret) {
 695                 ath6kl_err("Failed to get default board file %s: %d\n",
 696                            filename, ret);
 697                 return ret;
 698         }
 699
 700         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
 701         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
 702
 703         return 0;
 704 }
 705
 706 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
 707 {
 708         char filename[100];
 709         int ret;
 710
 711         if (ar->fw_otp != NULL)
 712                 return 0;
 713
 714         if (ar->hw.fw.otp == NULL) {
 715                 ath6kl_dbg(ATH6KL_DBG_BOOT,
 716                            "no OTP file configured for this hw\n");
 717                 return 0;
 718         }
 719
 720         snprintf(filename, sizeof(filename), "%s/%s",
 721                  ar->hw.fw.dir, ar->hw.fw.otp);
 722
 723         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
 724                             &ar->fw_otp_len);
 725         if (ret) {
 726                 ath6kl_err("Failed to get OTP file %s: %d\n",
 727                            filename, ret);
 728                 return ret;
 729         }
 730
 731         return 0;
 732 }
 733
 734 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
 735 {
 736         char filename[100];
 737         int ret;
 738
 739         if (ar->fw != NULL)
 740                 return 0;
 741
 742         if (testmode) {
 743                 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n",
 744                                 testmode);
 745                 if (testmode == 2) {
 746                         if (ar->hw.fw.utf == NULL) {
 747                                 ath6kl_warn("testmode 2 not supported\n");
 748                                 return -EOPNOTSUPP;
 749                         }
 750
 751                         snprintf(filename, sizeof(filename), "%s/%s",
 752                                 ar->hw.fw.dir, ar->hw.fw.utf);
 753                 } else {
 754                         if (ar->hw.fw.tcmd == NULL) {
 755                                 ath6kl_warn("testmode 1 not supported\n");
 756                                 return -EOPNOTSUPP;
 757                         }
 758
 759                         snprintf(filename, sizeof(filename), "%s/%s",
 760                                 ar->hw.fw.dir, ar->hw.fw.tcmd);
 761                 }
 762                 set_bit(TESTMODE, &ar->flag);
 763
 764                 goto get_fw;
 765         }
 766
 767         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
 768         if (WARN_ON(ar->hw.fw.fw == NULL))
 769                 return -EINVAL;
 770
 771         snprintf(filename, sizeof(filename), "%s/%s",
 772                  ar->hw.fw.dir, ar->hw.fw.fw);
 773
 774 get_fw:
 775         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 776         if (ret) {
 777                 ath6kl_err("Failed to get firmware file %s: %d\n",
 778                            filename, ret);
 779                 return ret;
 780         }
 781
 782         return 0;
 783 }
 784
 785 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
 786 {
 787         char filename[100];
 788         int ret;
 789
 790         if (ar->fw_patch != NULL)
 791                 return 0;
 792
 793         if (ar->hw.fw.patch == NULL)
 794                 return 0;
 795
 796         snprintf(filename, sizeof(filename), "%s/%s",
 797                  ar->hw.fw.dir, ar->hw.fw.patch);
 798
 799         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
 800                             &ar->fw_patch_len);
 801         if (ret) {
 802                 ath6kl_err("Failed to get patch file %s: %d\n",
 803                            filename, ret);
 804                 return ret;
 805         }
 806
 807         return 0;
 808 }
 809
 810 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
 811 {
 812         char filename[100];
 813         int ret;
 814
 815         if (testmode != 2)
 816                 return 0;
 817
 818         if (ar->fw_testscript != NULL)
 819                 return 0;
 820
 821         if (ar->hw.fw.testscript == NULL)
 822                 return 0;
 823
 824         snprintf(filename, sizeof(filename), "%s/%s",
 825                 ar->hw.fw.dir, ar->hw.fw.testscript);
 826
 827         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
 828                                 &ar->fw_testscript_len);
 829         if (ret) {
 830                 ath6kl_err("Failed to get testscript file %s: %d\n",
 831                         filename, ret);
 832                 return ret;
 833         }
 834
 835         return 0;
 836 }
 837
 838 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
 839 {
 840         int ret;
 841
 842         ret = ath6kl_fetch_otp_file(ar);
 843         if (ret)
 844                 return ret;
 845
 846         ret = ath6kl_fetch_fw_file(ar);
 847         if (ret)
 848                 return ret;
 849
 850         ret = ath6kl_fetch_patch_file(ar);
 851         if (ret)
 852                 return ret;
 853
 854         ret = ath6kl_fetch_testscript_file(ar);
 855         if (ret)
 856                 return ret;
 857
 858         return 0;
 859 }
 860
 861 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
 862 {
 863         size_t magic_len, len, ie_len;
 864         const struct firmware *fw;
 865         struct ath6kl_fw_ie *hdr;
 866         char filename[100];
 867         const u8 *data;
 868         int ret, ie_id, i, index, bit;
 869         __le32 *val;
 870
 871         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
 872
 873         ret = request_firmware(&fw, filename, ar->dev);
 874         if (ret)
 875                 return ret;
 876
 877         data = fw->data;
 878         len = fw->size;
 879
 880         /* magic also includes the null byte, check that as well */
 881         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
 882
 883         if (len < magic_len) {
 884                 ret = -EINVAL;
 885                 goto out;
 886         }
 887
 888         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
 889                 ret = -EINVAL;
 890                 goto out;
 891         }
 892
 893         len -= magic_len;
 894         data += magic_len;
 895
 896         /* loop elements */
 897         while (len > sizeof(struct ath6kl_fw_ie)) {
 898                 /* hdr is unaligned! */
 899                 hdr = (struct ath6kl_fw_ie *) data;
 900
 901                 ie_id = le32_to_cpup(&hdr->id);
 902                 ie_len = le32_to_cpup(&hdr->len);
 903
 904                 len -= sizeof(*hdr);
 905                 data += sizeof(*hdr);
 906
 907                 if (len < ie_len) {
 908                         ret = -EINVAL;
 909                         goto out;
 910                 }
 911
 912                 switch (ie_id) {
 913                 case ATH6KL_FW_IE_OTP_IMAGE:
 914                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
 915                                 ie_len);
 916
 917                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
 918
 919                         if (ar->fw_otp == NULL) {
 920                                 ret = -ENOMEM;
 921                                 goto out;
 922                         }
 923
 924                         ar->fw_otp_len = ie_len;
 925                         break;
 926                 case ATH6KL_FW_IE_FW_IMAGE:
 927                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
 928                                 ie_len);
 929
 930                         ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
 931
 932                         if (ar->fw == NULL) {
 933                                 ret = -ENOMEM;
 934                                 goto out;
 935                         }
 936
 937                         ar->fw_len = ie_len;
 938                         break;
 939                 case ATH6KL_FW_IE_PATCH_IMAGE:
 940                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
 941                                 ie_len);
 942
 943                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
 944
 945                         if (ar->fw_patch == NULL) {
 946                                 ret = -ENOMEM;
 947                                 goto out;
 948                         }
 949
 950                         ar->fw_patch_len = ie_len;
 951                         break;
 952                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
 953                         val = (__le32 *) data;
 954                         ar->hw.reserved_ram_size = le32_to_cpup(val);
 955
 956                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 957                                    "found reserved ram size ie 0x%d\n",
 958                                    ar->hw.reserved_ram_size);
 959                         break;
 960                 case ATH6KL_FW_IE_CAPABILITIES:
 961                         if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
 962                                 break;
 963
 964                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 965                                    "found firmware capabilities ie (%zd B)\n",
 966                                    ie_len);
 967
 968                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
 969                                 index = i / 8;
 970                                 bit = i % 8;
 971
 972                                 if (data[index] & (1 << bit))
 973                                         __set_bit(i, ar->fw_capabilities);
 974                         }
 975
 976                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
 977                                         ar->fw_capabilities,
 978                                         sizeof(ar->fw_capabilities));
 979                         break;
 980                 case ATH6KL_FW_IE_PATCH_ADDR:
 981                         if (ie_len != sizeof(*val))
 982                                 break;
 983
 984                         val = (__le32 *) data;
 985                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
 986
 987                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 988                                    "found patch address ie 0x%x\n",
 989                                    ar->hw.dataset_patch_addr);
 990                         break;
 991                 case ATH6KL_FW_IE_BOARD_ADDR:
 992                         if (ie_len != sizeof(*val))
 993                                 break;
 994
 995                         val = (__le32 *) data;
 996                         ar->hw.board_addr = le32_to_cpup(val);
 997
 998                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 999                                    "found board address ie 0x%x\n",
1000                                    ar->hw.board_addr);
1001                         break;
1002                 case ATH6KL_FW_IE_VIF_MAX:
1003                         if (ie_len != sizeof(*val))
1004                                 break;
1005
1006                         val = (__le32 *) data;
1007                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1008                                             ATH6KL_VIF_MAX);
1009
1010                         if (ar->vif_max > 1 && !ar->p2p)
1011                                 ar->max_norm_iface = 2;
1012
1013                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1014                                    "found vif max ie %d\n", ar->vif_max);
1015                         break;
1016                 default:
1017                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1018                                    le32_to_cpup(&hdr->id));
1019                         break;
1020                 }
1021
1022                 len -= ie_len;
1023                 data += ie_len;
1024         };
1025
1026         ret = 0;
1027 out:
1028         release_firmware(fw);
1029
1030         return ret;
1031 }
1032
1033 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1034 {
1035         int ret;
1036
1037         ret = ath6kl_fetch_board_file(ar);
1038         if (ret)
1039                 return ret;
1040
1041         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1042         if (ret == 0) {
1043                 ar->fw_api = 3;
1044                 goto out;
1045         }
1046
1047         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1048         if (ret == 0) {
1049                 ar->fw_api = 2;
1050                 goto out;
1051         }
1052
1053         ret = ath6kl_fetch_fw_api1(ar);
1054         if (ret)
1055                 return ret;
1056
1057         ar->fw_api = 1;
1058
1059 out:
1060         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1061
1062         return 0;
1063 }
1064
1065 static int ath6kl_upload_board_file(struct ath6kl *ar)
1066 {
1067         u32 board_address, board_ext_address, param;
1068         u32 board_data_size, board_ext_data_size;
1069         int ret;
1070
1071         if (WARN_ON(ar->fw_board == NULL))
1072                 return -ENOENT;
1073
1074         /*
1075          * Determine where in Target RAM to write Board Data.
1076          * For AR6004, host determine Target RAM address for
1077          * writing board data.
1078          */
1079         if (ar->hw.board_addr != 0) {
1080                 board_address = ar->hw.board_addr;
1081                 ath6kl_bmi_write(ar,
1082                                 ath6kl_get_hi_item_addr(ar,
1083                                 HI_ITEM(hi_board_data)),
1084                                 (u8 *) &board_address, 4);
1085         } else {
1086                 ath6kl_bmi_read(ar,
1087                                 ath6kl_get_hi_item_addr(ar,
1088                                 HI_ITEM(hi_board_data)),
1089                                 (u8 *) &board_address, 4);
1090         }
1091
1092         /* determine where in target ram to write extended board data */
1093         ath6kl_bmi_read(ar,
1094                         ath6kl_get_hi_item_addr(ar,
1095                         HI_ITEM(hi_board_ext_data)),
1096                         (u8 *) &board_ext_address, 4);
1097
1098         if (ar->target_type == TARGET_TYPE_AR6003 &&
1099             board_ext_address == 0) {
1100                 ath6kl_err("Failed to get board file target address.\n");
1101                 return -EINVAL;
1102         }
1103
1104         switch (ar->target_type) {
1105         case TARGET_TYPE_AR6003:
1106                 board_data_size = AR6003_BOARD_DATA_SZ;
1107                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1108                 break;
1109         case TARGET_TYPE_AR6004:
1110                 board_data_size = AR6004_BOARD_DATA_SZ;
1111                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1112                 break;
1113         default:
1114                 WARN_ON(1);
1115                 return -EINVAL;
1116                 break;
1117         }
1118
1119         if (board_ext_address &&
1120             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1121
1122                 /* write extended board data */
1123                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1124                            "writing extended board data to 0x%x (%d B)\n",
1125                            board_ext_address, board_ext_data_size);
1126
1127                 ret = ath6kl_bmi_write(ar, board_ext_address,
1128                                        ar->fw_board + board_data_size,
1129                                        board_ext_data_size);
1130                 if (ret) {
1131                         ath6kl_err("Failed to write extended board data: %d\n",
1132                                    ret);
1133                         return ret;
1134                 }
1135
1136                 /* record that extended board data is initialized */
1137                 param = (board_ext_data_size << 16) | 1;
1138
1139                 ath6kl_bmi_write(ar,
1140                                  ath6kl_get_hi_item_addr(ar,
1141                                  HI_ITEM(hi_board_ext_data_config)),
1142                                  (unsigned char *) &param, 4);
1143         }
1144
1145         if (ar->fw_board_len < board_data_size) {
1146                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1147                 ret = -EINVAL;
1148                 return ret;
1149         }
1150
1151         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1152                    board_address, board_data_size);
1153
1154         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1155                                board_data_size);
1156
1157         if (ret) {
1158                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1159                 return ret;
1160         }
1161
1162         /* record the fact that Board Data IS initialized */
1163         param = 1;
1164         ath6kl_bmi_write(ar,
1165                          ath6kl_get_hi_item_addr(ar,
1166                          HI_ITEM(hi_board_data_initialized)),
1167                          (u8 *)&param, 4);
1168
1169         return ret;
1170 }
1171
1172 static int ath6kl_upload_otp(struct ath6kl *ar)
1173 {
1174         u32 address, param;
1175         bool from_hw = false;
1176         int ret;
1177
1178         if (ar->fw_otp == NULL)
1179                 return 0;
1180
1181         address = ar->hw.app_load_addr;
1182
1183         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1184                    ar->fw_otp_len);
1185
1186         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1187                                        ar->fw_otp_len);
1188         if (ret) {
1189                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1190                 return ret;
1191         }
1192
1193         /* read firmware start address */
1194         ret = ath6kl_bmi_read(ar,
1195                               ath6kl_get_hi_item_addr(ar,
1196                                                       HI_ITEM(hi_app_start)),
1197                               (u8 *) &address, sizeof(address));
1198
1199         if (ret) {
1200                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1201                 return ret;
1202         }
1203
1204         if (ar->hw.app_start_override_addr == 0) {
1205                 ar->hw.app_start_override_addr = address;
1206                 from_hw = true;
1207         }
1208
1209         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1210                    from_hw ? " (from hw)" : "",
1211                    ar->hw.app_start_override_addr);
1212
1213         /* execute the OTP code */
1214         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1215                    ar->hw.app_start_override_addr);
1216         param = 0;
1217         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1218
1219         return ret;
1220 }
1221
1222 static int ath6kl_upload_firmware(struct ath6kl *ar)
1223 {
1224         u32 address;
1225         int ret;
1226
1227         if (WARN_ON(ar->fw == NULL))
1228                 return 0;
1229
1230         address = ar->hw.app_load_addr;
1231
1232         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1233                    address, ar->fw_len);
1234
1235         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1236
1237         if (ret) {
1238                 ath6kl_err("Failed to write firmware: %d\n", ret);
1239                 return ret;
1240         }
1241
1242         /*
1243          * Set starting address for firmware
1244          * Don't need to setup app_start override addr on AR6004
1245          */
1246         if (ar->target_type != TARGET_TYPE_AR6004) {
1247                 address = ar->hw.app_start_override_addr;
1248                 ath6kl_bmi_set_app_start(ar, address);
1249         }
1250         return ret;
1251 }
1252
1253 static int ath6kl_upload_patch(struct ath6kl *ar)
1254 {
1255         u32 address, param;
1256         int ret;
1257
1258         if (ar->fw_patch == NULL)
1259                 return 0;
1260
1261         address = ar->hw.dataset_patch_addr;
1262
1263         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1264                    address, ar->fw_patch_len);
1265
1266         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1267         if (ret) {
1268                 ath6kl_err("Failed to write patch file: %d\n", ret);
1269                 return ret;
1270         }
1271
1272         param = address;
1273         ath6kl_bmi_write(ar,
1274                          ath6kl_get_hi_item_addr(ar,
1275                          HI_ITEM(hi_dset_list_head)),
1276                          (unsigned char *) &param, 4);
1277
1278         return 0;
1279 }
1280
1281 static int ath6kl_upload_testscript(struct ath6kl *ar)
1282 {
1283         u32 address, param;
1284         int ret;
1285
1286         if (testmode != 2)
1287                 return 0;
1288
1289         if (ar->fw_testscript == NULL)
1290                 return 0;
1291
1292         address = ar->hw.testscript_addr;
1293
1294         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1295                 address, ar->fw_testscript_len);
1296
1297         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1298                 ar->fw_testscript_len);
1299         if (ret) {
1300                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1301                 return ret;
1302         }
1303
1304         param = address;
1305         ath6kl_bmi_write(ar,
1306                         ath6kl_get_hi_item_addr(ar,
1307                         HI_ITEM(hi_ota_testscript)),
1308                         (unsigned char *) &param, 4);
1309
1310         param = 4096;
1311         ath6kl_bmi_write(ar,
1312                         ath6kl_get_hi_item_addr(ar,
1313                         HI_ITEM(hi_end_ram_reserve_sz)),
1314                         (unsigned char *) &param, 4);
1315
1316         param = 1;
1317         ath6kl_bmi_write(ar,
1318                         ath6kl_get_hi_item_addr(ar,
1319                         HI_ITEM(hi_test_apps_related)),
1320                         (unsigned char *) &param, 4);
1321
1322         return 0;
1323 }
1324
1325 static int ath6kl_init_upload(struct ath6kl *ar)
1326 {
1327         u32 param, options, sleep, address;
1328         int status = 0;
1329
1330         if (ar->target_type != TARGET_TYPE_AR6003 &&
1331                 ar->target_type != TARGET_TYPE_AR6004)
1332                 return -EINVAL;
1333
1334         /* temporarily disable system sleep */
1335         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1336         status = ath6kl_bmi_reg_read(ar, address, &param);
1337         if (status)
1338                 return status;
1339
1340         options = param;
1341
1342         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1343         status = ath6kl_bmi_reg_write(ar, address, param);
1344         if (status)
1345                 return status;
1346
1347         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1348         status = ath6kl_bmi_reg_read(ar, address, &param);
1349         if (status)
1350                 return status;
1351
1352         sleep = param;
1353
1354         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1355         status = ath6kl_bmi_reg_write(ar, address, param);
1356         if (status)
1357                 return status;
1358
1359         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1360                    options, sleep);
1361
1362         /* program analog PLL register */
1363         /* no need to control 40/44MHz clock on AR6004 */
1364         if (ar->target_type != TARGET_TYPE_AR6004) {
1365                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1366                                               0xF9104001);
1367
1368                 if (status)
1369                         return status;
1370
1371                 /* Run at 80/88MHz by default */
1372                 param = SM(CPU_CLOCK_STANDARD, 1);
1373
1374                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1375                 status = ath6kl_bmi_reg_write(ar, address, param);
1376                 if (status)
1377                         return status;
1378         }
1379
1380         param = 0;
1381         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1382         param = SM(LPO_CAL_ENABLE, 1);
1383         status = ath6kl_bmi_reg_write(ar, address, param);
1384         if (status)
1385                 return status;
1386
1387         /* WAR to avoid SDIO CRC err */
1388         if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
1389                 ath6kl_err("temporary war to avoid sdio crc error\n");
1390
1391                 param = 0x20;
1392
1393                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1394                 status = ath6kl_bmi_reg_write(ar, address, param);
1395                 if (status)
1396                         return status;
1397
1398                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1399                 status = ath6kl_bmi_reg_write(ar, address, param);
1400                 if (status)
1401                         return status;
1402
1403                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1404                 status = ath6kl_bmi_reg_write(ar, address, param);
1405                 if (status)
1406                         return status;
1407
1408                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1409                 status = ath6kl_bmi_reg_write(ar, address, param);
1410                 if (status)
1411                         return status;
1412         }
1413
1414         /* write EEPROM data to Target RAM */
1415         status = ath6kl_upload_board_file(ar);
1416         if (status)
1417                 return status;
1418
1419         /* transfer One time Programmable data */
1420         status = ath6kl_upload_otp(ar);
1421         if (status)
1422                 return status;
1423
1424         /* Download Target firmware */
1425         status = ath6kl_upload_firmware(ar);
1426         if (status)
1427                 return status;
1428
1429         status = ath6kl_upload_patch(ar);
1430         if (status)
1431                 return status;
1432
1433         /* Download the test script */
1434         status = ath6kl_upload_testscript(ar);
1435         if (status)
1436                 return status;
1437
1438         /* Restore system sleep */
1439         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1440         status = ath6kl_bmi_reg_write(ar, address, sleep);
1441         if (status)
1442                 return status;
1443
1444         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1445         param = options | 0x20;
1446         status = ath6kl_bmi_reg_write(ar, address, param);
1447         if (status)
1448                 return status;
1449
1450         return status;
1451 }
1452
1453 int ath6kl_init_hw_params(struct ath6kl *ar)
1454 {
1455         const struct ath6kl_hw *hw;
1456         int i;
1457
1458         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1459                 hw = &hw_list[i];
1460
1461                 if (hw->id == ar->version.target_ver)
1462                         break;
1463         }
1464
1465         if (i == ARRAY_SIZE(hw_list)) {
1466                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1467                            ar->version.target_ver);
1468                 return -EINVAL;
1469         }
1470
1471         ar->hw = *hw;
1472
1473         ath6kl_dbg(ATH6KL_DBG_BOOT,
1474                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1475                    ar->version.target_ver, ar->target_type,
1476                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1477         ath6kl_dbg(ATH6KL_DBG_BOOT,
1478                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1479                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1480                    ar->hw.reserved_ram_size);
1481         ath6kl_dbg(ATH6KL_DBG_BOOT,
1482                    "refclk_hz %d uarttx_pin %d",
1483                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1484
1485         return 0;
1486 }
1487
1488 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1489 {
1490         switch (type) {
1491         case ATH6KL_HIF_TYPE_SDIO:
1492                 return "sdio";
1493         case ATH6KL_HIF_TYPE_USB:
1494                 return "usb";
1495         }
1496
1497         return NULL;
1498 }
1499
1500 int ath6kl_init_hw_start(struct ath6kl *ar)
1501 {
1502         long timeleft;
1503         int ret, i;
1504
1505         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1506
1507         ret = ath6kl_hif_power_on(ar);
1508         if (ret)
1509                 return ret;
1510
1511         ret = ath6kl_configure_target(ar);
1512         if (ret)
1513                 goto err_power_off;
1514
1515         ret = ath6kl_init_upload(ar);
1516         if (ret)
1517                 goto err_power_off;
1518
1519         /* Do we need to finish the BMI phase */
1520         /* FIXME: return error from ath6kl_bmi_done() */
1521         if (ath6kl_bmi_done(ar)) {
1522                 ret = -EIO;
1523                 goto err_power_off;
1524         }
1525
1526         /*
1527          * The reason we have to wait for the target here is that the
1528          * driver layer has to init BMI in order to set the host block
1529          * size.
1530          */
1531         if (ath6kl_htc_wait_target(ar->htc_target)) {
1532                 ret = -EIO;
1533                 goto err_power_off;
1534         }
1535
1536         if (ath6kl_init_service_ep(ar)) {
1537                 ret = -EIO;
1538                 goto err_cleanup_scatter;
1539         }
1540
1541         /* setup credit distribution */
1542         ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1543
1544         /* start HTC */
1545         ret = ath6kl_htc_start(ar->htc_target);
1546         if (ret) {
1547                 /* FIXME: call this */
1548                 ath6kl_cookie_cleanup(ar);
1549                 goto err_cleanup_scatter;
1550         }
1551
1552         /* Wait for Wmi event to be ready */
1553         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1554                                                     test_bit(WMI_READY,
1555                                                              &ar->flag),
1556                                                     WMI_TIMEOUT);
1557
1558         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1559
1560
1561         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1562                 ath6kl_info("%s %s fw %s api %d%s\n",
1563                             ar->hw.name,
1564                             ath6kl_init_get_hif_name(ar->hif_type),
1565                             ar->wiphy->fw_version,
1566                             ar->fw_api,
1567                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1568         }
1569
1570         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1571                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1572                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1573                 ret = -EIO;
1574                 goto err_htc_stop;
1575         }
1576
1577         if (!timeleft || signal_pending(current)) {
1578                 ath6kl_err("wmi is not ready or wait was interrupted\n");
1579                 ret = -EIO;
1580                 goto err_htc_stop;
1581         }
1582
1583         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1584
1585         /* communicate the wmi protocol verision to the target */
1586         /* FIXME: return error */
1587         if ((ath6kl_set_host_app_area(ar)) != 0)
1588                 ath6kl_err("unable to set the host app area\n");
1589
1590         for (i = 0; i < ar->vif_max; i++) {
1591                 ret = ath6kl_target_config_wlan_params(ar, i);
1592                 if (ret)
1593                         goto err_htc_stop;
1594         }
1595
1596         ar->state = ATH6KL_STATE_ON;
1597
1598         return 0;
1599
1600 err_htc_stop:
1601         ath6kl_htc_stop(ar->htc_target);
1602 err_cleanup_scatter:
1603         ath6kl_hif_cleanup_scatter(ar);
1604 err_power_off:
1605         ath6kl_hif_power_off(ar);
1606
1607         return ret;
1608 }
1609
1610 int ath6kl_init_hw_stop(struct ath6kl *ar)
1611 {
1612         int ret;
1613
1614         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1615
1616         ath6kl_htc_stop(ar->htc_target);
1617
1618         ath6kl_hif_stop(ar);
1619
1620         ath6kl_bmi_reset(ar);
1621
1622         ret = ath6kl_hif_power_off(ar);
1623         if (ret)
1624                 ath6kl_warn("failed to power off hif: %d\n", ret);
1625
1626         ar->state = ATH6KL_STATE_OFF;
1627
1628         return 0;
1629 }
1630
1631 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
1632 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
1633 {
1634         static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1635         bool discon_issued;
1636
1637         netif_stop_queue(vif->ndev);
1638
1639         clear_bit(WLAN_ENABLED, &vif->flags);
1640
1641         if (wmi_ready) {
1642                 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1643                                 test_bit(CONNECT_PEND, &vif->flags);
1644                 ath6kl_disconnect(vif);
1645                 del_timer(&vif->disconnect_timer);
1646
1647                 if (discon_issued)
1648                         ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1649                                                 (vif->nw_type & AP_NETWORK) ?
1650                                                 bcast_mac : vif->bssid,
1651                                                 0, NULL, 0);
1652         }
1653
1654         if (vif->scan_req) {
1655                 cfg80211_scan_done(vif->scan_req, true);
1656                 vif->scan_req = NULL;
1657         }
1658 }
1659
1660 void ath6kl_stop_txrx(struct ath6kl *ar)
1661 {
1662         struct ath6kl_vif *vif, *tmp_vif;
1663
1664         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1665
1666         if (down_interruptible(&ar->sem)) {
1667                 ath6kl_err("down_interruptible failed\n");
1668                 return;
1669         }
1670
1671         spin_lock_bh(&ar->list_lock);
1672         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1673                 list_del(&vif->list);
1674                 spin_unlock_bh(&ar->list_lock);
1675                 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1676                 rtnl_lock();
1677                 ath6kl_cfg80211_vif_cleanup(vif);
1678                 rtnl_unlock();
1679                 spin_lock_bh(&ar->list_lock);
1680         }
1681         spin_unlock_bh(&ar->list_lock);
1682
1683         clear_bit(WMI_READY, &ar->flag);
1684
1685         /*
1686          * After wmi_shudown all WMI events will be dropped. We
1687          * need to cleanup the buffers allocated in AP mode and
1688          * give disconnect notification to stack, which usually
1689          * happens in the disconnect_event. Simulate the disconnect
1690          * event by calling the function directly. Sometimes
1691          * disconnect_event will be received when the debug logs
1692          * are collected.
1693          */
1694         ath6kl_wmi_shutdown(ar->wmi);
1695
1696         clear_bit(WMI_ENABLED, &ar->flag);
1697         if (ar->htc_target) {
1698                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1699                 ath6kl_htc_stop(ar->htc_target);
1700         }
1701
1702         /*
1703          * Try to reset the device if we can. The driver may have been
1704          * configure NOT to reset the target during a debug session.
1705          */
1706         ath6kl_dbg(ATH6KL_DBG_TRC,
1707                         "attempting to reset target on instance destroy\n");
1708         ath6kl_reset_device(ar, ar->target_type, true, true);
1709
1710         clear_bit(WLAN_ENABLED, &ar->flag);
1711 }
1712 EXPORT_SYMBOL(ath6kl_stop_txrx);