drivers/net/wireless/ath/ath6kl/init.c

   1
   2 /*
   3  * Copyright (c) 2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  */
  18
  19 #include <linux/moduleparam.h>
  20 #include <linux/errno.h>
  21 #include <linux/export.h>
  22 #include <linux/of.h>
  23 #include <linux/mmc/sdio_func.h>
  24
  25 #include "core.h"
  26 #include "cfg80211.h"
  27 #include "target.h"
  28 #include "debug.h"
  29 #include "hif-ops.h"
  30
  31 static const struct ath6kl_hw hw_list[] = {
  32         {
  33                 .id                             = AR6003_HW_2_0_VERSION,
  34                 .name                           = "ar6003 hw 2.0",
  35                 .dataset_patch_addr             = 0x57e884,
  36                 .app_load_addr                  = 0x543180,
  37                 .board_ext_data_addr            = 0x57e500,
  38                 .reserved_ram_size              = 6912,
  39                 .refclk_hz                      = 26000000,
  40                 .uarttx_pin                     = 8,
  41
  42                 /* hw2.0 needs override address hardcoded */
  43                 .app_start_override_addr        = 0x944C00,
  44
  45                 .fw = {
  46                         .dir            = AR6003_HW_2_0_FW_DIR,
  47                         .otp            = AR6003_HW_2_0_OTP_FILE,
  48                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
  49                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  50                         .patch          = AR6003_HW_2_0_PATCH_FILE,
  51                 },
  52
  53                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
  54                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  55         },
  56         {
  57                 .id                             = AR6003_HW_2_1_1_VERSION,
  58                 .name                           = "ar6003 hw 2.1.1",
  59                 .dataset_patch_addr             = 0x57ff74,
  60                 .app_load_addr                  = 0x1234,
  61                 .board_ext_data_addr            = 0x542330,
  62                 .reserved_ram_size              = 512,
  63                 .refclk_hz                      = 26000000,
  64                 .uarttx_pin                     = 8,
  65                 .testscript_addr                = 0x57ef74,
  66
  67                 .fw = {
  68                         .dir            = AR6003_HW_2_1_1_FW_DIR,
  69                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
  70                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
  71                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  72                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
  73                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
  74                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
  75                 },
  76
  77                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  78                 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  79         },
  80         {
  81                 .id                             = AR6004_HW_1_0_VERSION,
  82                 .name                           = "ar6004 hw 1.0",
  83                 .dataset_patch_addr             = 0x57e884,
  84                 .app_load_addr                  = 0x1234,
  85                 .board_ext_data_addr            = 0x437000,
  86                 .reserved_ram_size              = 19456,
  87                 .board_addr                     = 0x433900,
  88                 .refclk_hz                      = 26000000,
  89                 .uarttx_pin                     = 11,
  90
  91                 .fw = {
  92                         .dir            = AR6004_HW_1_0_FW_DIR,
  93                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
  94                 },
  95
  96                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
  97                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
  98         },
  99         {
 100                 .id                             = AR6004_HW_1_1_VERSION,
 101                 .name                           = "ar6004 hw 1.1",
 102                 .dataset_patch_addr             = 0x57e884,
 103                 .app_load_addr                  = 0x1234,
 104                 .board_ext_data_addr            = 0x437000,
 105                 .reserved_ram_size              = 11264,
 106                 .board_addr                     = 0x43d400,
 107                 .refclk_hz                      = 40000000,
 108                 .uarttx_pin                     = 11,
 109
 110                 .fw = {
 111                         .dir            = AR6004_HW_1_1_FW_DIR,
 112                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
 113                 },
 114
 115                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
 116                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
 117         },
 118 };
 119
 120 /*
 121  * Include definitions here that can be used to tune the WLAN module
 122  * behavior. Different customers can tune the behavior as per their needs,
 123  * here.
 124  */
 125
 126 /*
 127  * This configuration item enable/disable keepalive support.
 128  * Keepalive support: In the absence of any data traffic to AP, null
 129  * frames will be sent to the AP at periodic interval, to keep the association
 130  * active. This configuration item defines the periodic interval.
 131  * Use value of zero to disable keepalive support
 132  * Default: 60 seconds
 133  */
 134 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
 135
 136 /*
 137  * This configuration item sets the value of disconnect timeout
 138  * Firmware delays sending the disconnec event to the host for this
 139  * timeout after is gets disconnected from the current AP.
 140  * If the firmware successly roams within the disconnect timeout
 141  * it sends a new connect event
 142  */
 143 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
 144
 145
 146 #define ATH6KL_DATA_OFFSET    64
 147 struct sk_buff *ath6kl_buf_alloc(int size)
 148 {
 149         struct sk_buff *skb;
 150         u16 reserved;
 151
 152         /* Add chacheline space at front and back of buffer */
 153         reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
 154                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
 155         skb = dev_alloc_skb(size + reserved);
 156
 157         if (skb)
 158                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
 159         return skb;
 160 }
 161
 162 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
 163 {
 164         vif->ssid_len = 0;
 165         memset(vif->ssid, 0, sizeof(vif->ssid));
 166
 167         vif->dot11_auth_mode = OPEN_AUTH;
 168         vif->auth_mode = NONE_AUTH;
 169         vif->prwise_crypto = NONE_CRYPT;
 170         vif->prwise_crypto_len = 0;
 171         vif->grp_crypto = NONE_CRYPT;
 172         vif->grp_crypto_len = 0;
 173         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 174         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
 175         memset(vif->bssid, 0, sizeof(vif->bssid));
 176         vif->bss_ch = 0;
 177 }
 178
 179 static int ath6kl_set_host_app_area(struct ath6kl *ar)
 180 {
 181         u32 address, data;
 182         struct host_app_area host_app_area;
 183
 184         /* Fetch the address of the host_app_area_s
 185          * instance in the host interest area */
 186         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
 187         address = TARG_VTOP(ar->target_type, address);
 188
 189         if (ath6kl_diag_read32(ar, address, &data))
 190                 return -EIO;
 191
 192         address = TARG_VTOP(ar->target_type, data);
 193         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
 194         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
 195                               sizeof(struct host_app_area)))
 196                 return -EIO;
 197
 198         return 0;
 199 }
 200
 201 static inline void set_ac2_ep_map(struct ath6kl *ar,
 202                                   u8 ac,
 203                                   enum htc_endpoint_id ep)
 204 {
 205         ar->ac2ep_map[ac] = ep;
 206         ar->ep2ac_map[ep] = ac;
 207 }
 208
 209 /* connect to a service */
 210 static int ath6kl_connectservice(struct ath6kl *ar,
 211                                  struct htc_service_connect_req  *con_req,
 212                                  char *desc)
 213 {
 214         int status;
 215         struct htc_service_connect_resp response;
 216
 217         memset(&response, 0, sizeof(response));
 218
 219         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
 220         if (status) {
 221                 ath6kl_err("failed to connect to %s service status:%d\n",
 222                            desc, status);
 223                 return status;
 224         }
 225
 226         switch (con_req->svc_id) {
 227         case WMI_CONTROL_SVC:
 228                 if (test_bit(WMI_ENABLED, &ar->flag))
 229                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
 230                 ar->ctrl_ep = response.endpoint;
 231                 break;
 232         case WMI_DATA_BE_SVC:
 233                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
 234                 break;
 235         case WMI_DATA_BK_SVC:
 236                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
 237                 break;
 238         case WMI_DATA_VI_SVC:
 239                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
 240                 break;
 241         case WMI_DATA_VO_SVC:
 242                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
 243                 break;
 244         default:
 245                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
 246                 return -EINVAL;
 247         }
 248
 249         return 0;
 250 }
 251
 252 static int ath6kl_init_service_ep(struct ath6kl *ar)
 253 {
 254         struct htc_service_connect_req connect;
 255
 256         memset(&connect, 0, sizeof(connect));
 257
 258         /* these fields are the same for all service endpoints */
 259         connect.ep_cb.rx = ath6kl_rx;
 260         connect.ep_cb.rx_refill = ath6kl_rx_refill;
 261         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
 262
 263         /*
 264          * Set the max queue depth so that our ath6kl_tx_queue_full handler
 265          * gets called.
 266         */
 267         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
 268         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
 269         if (!connect.ep_cb.rx_refill_thresh)
 270                 connect.ep_cb.rx_refill_thresh++;
 271
 272         /* connect to control service */
 273         connect.svc_id = WMI_CONTROL_SVC;
 274         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
 275                 return -EIO;
 276
 277         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
 278
 279         /*
 280          * Limit the HTC message size on the send path, although e can
 281          * receive A-MSDU frames of 4K, we will only send ethernet-sized
 282          * (802.3) frames on the send path.
 283          */
 284         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
 285
 286         /*
 287          * To reduce the amount of committed memory for larger A_MSDU
 288          * frames, use the recv-alloc threshold mechanism for larger
 289          * packets.
 290          */
 291         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
 292         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
 293
 294         /*
 295          * For the remaining data services set the connection flag to
 296          * reduce dribbling, if configured to do so.
 297          */
 298         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
 299         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
 300         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
 301
 302         connect.svc_id = WMI_DATA_BE_SVC;
 303
 304         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
 305                 return -EIO;
 306
 307         /* connect to back-ground map this to WMI LOW_PRI */
 308         connect.svc_id = WMI_DATA_BK_SVC;
 309         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
 310                 return -EIO;
 311
 312         /* connect to Video service, map this to to HI PRI */
 313         connect.svc_id = WMI_DATA_VI_SVC;
 314         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
 315                 return -EIO;
 316
 317         /*
 318          * Connect to VO service, this is currently not mapped to a WMI
 319          * priority stream due to historical reasons. WMI originally
 320          * defined 3 priorities over 3 mailboxes We can change this when
 321          * WMI is reworked so that priorities are not dependent on
 322          * mailboxes.
 323          */
 324         connect.svc_id = WMI_DATA_VO_SVC;
 325         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
 326                 return -EIO;
 327
 328         return 0;
 329 }
 330
 331 void ath6kl_init_control_info(struct ath6kl_vif *vif)
 332 {
 333         ath6kl_init_profile_info(vif);
 334         vif->def_txkey_index = 0;
 335         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 336         vif->ch_hint = 0;
 337 }
 338
 339 /*
 340  * Set HTC/Mbox operational parameters, this can only be called when the
 341  * target is in the BMI phase.
 342  */
 343 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
 344                                  u8 htc_ctrl_buf)
 345 {
 346         int status;
 347         u32 blk_size;
 348
 349         blk_size = ar->mbox_info.block_size;
 350
 351         if (htc_ctrl_buf)
 352                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
 353
 354         /* set the host interest area for the block size */
 355         status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
 356         if (status) {
 357                 ath6kl_err("bmi_write_memory for IO block size failed\n");
 358                 goto out;
 359         }
 360
 361         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
 362                    blk_size,
 363                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
 364
 365         if (mbox_isr_yield_val) {
 366                 /* set the host interest area for the mbox ISR yield limit */
 367                 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
 368                                                mbox_isr_yield_val);
 369                 if (status) {
 370                         ath6kl_err("bmi_write_memory for yield limit failed\n");
 371                         goto out;
 372                 }
 373         }
 374
 375 out:
 376         return status;
 377 }
 378
 379 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
 380 {
 381         int ret;
 382
 383         /*
 384          * Configure the device for rx dot11 header rules. "0,0" are the
 385          * default values. Required if checksum offload is needed. Set
 386          * RxMetaVersion to 2.
 387          */
 388         ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
 389                                                  ar->rx_meta_ver, 0, 0);
 390         if (ret) {
 391                 ath6kl_err("unable to set the rx frame format: %d\n", ret);
 392                 return ret;
 393         }
 394
 395         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
 396                 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
 397                                               IGNORE_PS_FAIL_DURING_SCAN);
 398                 if (ret) {
 399                         ath6kl_err("unable to set power save fail event policy: %d\n",
 400                                    ret);
 401                         return ret;
 402                 }
 403         }
 404
 405         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
 406                 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
 407                                                    WMI_FOLLOW_BARKER_IN_ERP);
 408                 if (ret) {
 409                         ath6kl_err("unable to set barker preamble policy: %d\n",
 410                                    ret);
 411                         return ret;
 412                 }
 413         }
 414
 415         ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
 416                                            WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
 417         if (ret) {
 418                 ath6kl_err("unable to set keep alive interval: %d\n", ret);
 419                 return ret;
 420         }
 421
 422         ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
 423                                          WLAN_CONFIG_DISCONNECT_TIMEOUT);
 424         if (ret) {
 425                 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
 426                 return ret;
 427         }
 428
 429         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
 430                 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
 431                 if (ret) {
 432                         ath6kl_err("unable to set txop bursting: %d\n", ret);
 433                         return ret;
 434                 }
 435         }
 436
 437         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 438                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
 439                                               P2P_FLAG_CAPABILITIES_REQ |
 440                                               P2P_FLAG_MACADDR_REQ |
 441                                               P2P_FLAG_HMODEL_REQ);
 442                 if (ret) {
 443                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
 444                                    "capabilities (%d) - assuming P2P not "
 445                                    "supported\n", ret);
 446                         ar->p2p = false;
 447                 }
 448         }
 449
 450         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 451                 /* Enable Probe Request reporting for P2P */
 452                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
 453                 if (ret) {
 454                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
 455                                    "Request reporting (%d)\n", ret);
 456                 }
 457         }
 458
 459         return ret;
 460 }
 461
 462 int ath6kl_configure_target(struct ath6kl *ar)
 463 {
 464         u32 param, ram_reserved_size;
 465         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
 466         int i, status;
 467
 468         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
 469         if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
 470                 ath6kl_err("bmi_write_memory for uart debug failed\n");
 471                 return -EIO;
 472         }
 473
 474         /*
 475          * Note: Even though the firmware interface type is
 476          * chosen as BSS_STA for all three interfaces, can
 477          * be configured to IBSS/AP as long as the fw submode
 478          * remains normal mode (0 - AP, STA and IBSS). But
 479          * due to an target assert in firmware only one interface is
 480          * configured for now.
 481          */
 482         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
 483
 484         for (i = 0; i < ar->vif_max; i++)
 485                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
 486
 487         /*
 488          * By default, submodes :
 489          *              vif[0] - AP/STA/IBSS
 490          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
 491          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
 492          */
 493
 494         for (i = 0; i < ar->max_norm_iface; i++)
 495                 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
 496                               (i * HI_OPTION_FW_SUBMODE_BITS);
 497
 498         for (i = ar->max_norm_iface; i < ar->vif_max; i++)
 499                 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 500                               (i * HI_OPTION_FW_SUBMODE_BITS);
 501
 502         if (ar->p2p && ar->vif_max == 1)
 503                 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
 504
 505         if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
 506                                   HTC_PROTOCOL_VERSION) != 0) {
 507                 ath6kl_err("bmi_write_memory for htc version failed\n");
 508                 return -EIO;
 509         }
 510
 511         /* set the firmware mode to STA/IBSS/AP */
 512         param = 0;
 513
 514         if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
 515                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
 516                 return -EIO;
 517         }
 518
 519         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
 520         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
 521         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
 522
 523         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 524         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 525
 526         if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
 527                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
 528                 return -EIO;
 529         }
 530
 531         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
 532
 533         /*
 534          * Hardcode the address use for the extended board data
 535          * Ideally this should be pre-allocate by the OS at boot time
 536          * But since it is a new feature and board data is loaded
 537          * at init time, we have to workaround this from host.
 538          * It is difficult to patch the firmware boot code,
 539          * but possible in theory.
 540          */
 541
 542         if (ar->target_type == TARGET_TYPE_AR6003) {
 543                 param = ar->hw.board_ext_data_addr;
 544                 ram_reserved_size = ar->hw.reserved_ram_size;
 545
 546                 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
 547                         ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
 548                         return -EIO;
 549                 }
 550
 551                 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
 552                                           ram_reserved_size) != 0) {
 553                         ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
 554                         return -EIO;
 555                 }
 556         }
 557
 558         /* set the block size for the target */
 559         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
 560                 /* use default number of control buffers */
 561                 return -EIO;
 562
 563         /* Configure GPIO AR600x UART */
 564         status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
 565                                        ar->hw.uarttx_pin);
 566         if (status)
 567                 return status;
 568
 569         /* Configure target refclk_hz */
 570         status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
 571         if (status)
 572                 return status;
 573
 574         return 0;
 575 }
 576
 577 /* firmware upload */
 578 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
 579                          u8 **fw, size_t *fw_len)
 580 {
 581         const struct firmware *fw_entry;
 582         int ret;
 583
 584         ret = request_firmware(&fw_entry, filename, ar->dev);
 585         if (ret)
 586                 return ret;
 587
 588         *fw_len = fw_entry->size;
 589         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
 590
 591         if (*fw == NULL)
 592                 ret = -ENOMEM;
 593
 594         release_firmware(fw_entry);
 595
 596         return ret;
 597 }
 598
 599 #ifdef CONFIG_OF
 600 /*
 601  * Check the device tree for a board-id and use it to construct
 602  * the pathname to the firmware file.  Used (for now) to find a
 603  * fallback to the "bdata.bin" file--typically a symlink to the
 604  * appropriate board-specific file.
 605  */
 606 static bool check_device_tree(struct ath6kl *ar)
 607 {
 608         static const char *board_id_prop = "atheros,board-id";
 609         struct device_node *node;
 610         char board_filename[64];
 611         const char *board_id;
 612         int ret;
 613
 614         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
 615                 board_id = of_get_property(node, board_id_prop, NULL);
 616                 if (board_id == NULL) {
 617                         ath6kl_warn("No \"%s\" property on %s node.\n",
 618                                     board_id_prop, node->name);
 619                         continue;
 620                 }
 621                 snprintf(board_filename, sizeof(board_filename),
 622                          "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
 623
 624                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
 625                                     &ar->fw_board_len);
 626                 if (ret) {
 627                         ath6kl_err("Failed to get DT board file %s: %d\n",
 628                                    board_filename, ret);
 629                         continue;
 630                 }
 631                 return true;
 632         }
 633         return false;
 634 }
 635 #else
 636 static bool check_device_tree(struct ath6kl *ar)
 637 {
 638         return false;
 639 }
 640 #endif /* CONFIG_OF */
 641
 642 static int ath6kl_fetch_board_file(struct ath6kl *ar)
 643 {
 644         const char *filename;
 645         int ret;
 646
 647         if (ar->fw_board != NULL)
 648                 return 0;
 649
 650         if (WARN_ON(ar->hw.fw_board == NULL))
 651                 return -EINVAL;
 652
 653         filename = ar->hw.fw_board;
 654
 655         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 656                             &ar->fw_board_len);
 657         if (ret == 0) {
 658                 /* managed to get proper board file */
 659                 return 0;
 660         }
 661
 662         if (check_device_tree(ar)) {
 663                 /* got board file from device tree */
 664                 return 0;
 665         }
 666
 667         /* there was no proper board file, try to use default instead */
 668         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
 669                     filename, ret);
 670
 671         filename = ar->hw.fw_default_board;
 672
 673         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 674                             &ar->fw_board_len);
 675         if (ret) {
 676                 ath6kl_err("Failed to get default board file %s: %d\n",
 677                            filename, ret);
 678                 return ret;
 679         }
 680
 681         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
 682         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
 683
 684         return 0;
 685 }
 686
 687 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
 688 {
 689         char filename[100];
 690         int ret;
 691
 692         if (ar->fw_otp != NULL)
 693                 return 0;
 694
 695         if (ar->hw.fw.otp == NULL) {
 696                 ath6kl_dbg(ATH6KL_DBG_BOOT,
 697                            "no OTP file configured for this hw\n");
 698                 return 0;
 699         }
 700
 701         snprintf(filename, sizeof(filename), "%s/%s",
 702                  ar->hw.fw.dir, ar->hw.fw.otp);
 703
 704         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
 705                             &ar->fw_otp_len);
 706         if (ret) {
 707                 ath6kl_err("Failed to get OTP file %s: %d\n",
 708                            filename, ret);
 709                 return ret;
 710         }
 711
 712         return 0;
 713 }
 714
 715 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
 716 {
 717         char filename[100];
 718         int ret;
 719
 720         if (ar->testmode == 0)
 721                 return 0;
 722
 723         ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
 724
 725         if (ar->testmode == 2) {
 726                 if (ar->hw.fw.utf == NULL) {
 727                         ath6kl_warn("testmode 2 not supported\n");
 728                         return -EOPNOTSUPP;
 729                 }
 730
 731                 snprintf(filename, sizeof(filename), "%s/%s",
 732                          ar->hw.fw.dir, ar->hw.fw.utf);
 733         } else {
 734                 if (ar->hw.fw.tcmd == NULL) {
 735                         ath6kl_warn("testmode 1 not supported\n");
 736                         return -EOPNOTSUPP;
 737                 }
 738
 739                 snprintf(filename, sizeof(filename), "%s/%s",
 740                          ar->hw.fw.dir, ar->hw.fw.tcmd);
 741         }
 742
 743         set_bit(TESTMODE, &ar->flag);
 744
 745         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 746         if (ret) {
 747                 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
 748                            ar->testmode, filename, ret);
 749                 return ret;
 750         }
 751
 752         return 0;
 753 }
 754
 755 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
 756 {
 757         char filename[100];
 758         int ret;
 759
 760         if (ar->fw != NULL)
 761                 return 0;
 762
 763         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
 764         if (WARN_ON(ar->hw.fw.fw == NULL))
 765                 return -EINVAL;
 766
 767         snprintf(filename, sizeof(filename), "%s/%s",
 768                  ar->hw.fw.dir, ar->hw.fw.fw);
 769
 770         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 771         if (ret) {
 772                 ath6kl_err("Failed to get firmware file %s: %d\n",
 773                            filename, ret);
 774                 return ret;
 775         }
 776
 777         return 0;
 778 }
 779
 780 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
 781 {
 782         char filename[100];
 783         int ret;
 784
 785         if (ar->fw_patch != NULL)
 786                 return 0;
 787
 788         if (ar->hw.fw.patch == NULL)
 789                 return 0;
 790
 791         snprintf(filename, sizeof(filename), "%s/%s",
 792                  ar->hw.fw.dir, ar->hw.fw.patch);
 793
 794         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
 795                             &ar->fw_patch_len);
 796         if (ret) {
 797                 ath6kl_err("Failed to get patch file %s: %d\n",
 798                            filename, ret);
 799                 return ret;
 800         }
 801
 802         return 0;
 803 }
 804
 805 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
 806 {
 807         char filename[100];
 808         int ret;
 809
 810         if (ar->testmode != 2)
 811                 return 0;
 812
 813         if (ar->fw_testscript != NULL)
 814                 return 0;
 815
 816         if (ar->hw.fw.testscript == NULL)
 817                 return 0;
 818
 819         snprintf(filename, sizeof(filename), "%s/%s",
 820                  ar->hw.fw.dir, ar->hw.fw.testscript);
 821
 822         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
 823                                 &ar->fw_testscript_len);
 824         if (ret) {
 825                 ath6kl_err("Failed to get testscript file %s: %d\n",
 826                            filename, ret);
 827                 return ret;
 828         }
 829
 830         return 0;
 831 }
 832
 833 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
 834 {
 835         int ret;
 836
 837         ret = ath6kl_fetch_otp_file(ar);
 838         if (ret)
 839                 return ret;
 840
 841         ret = ath6kl_fetch_fw_file(ar);
 842         if (ret)
 843                 return ret;
 844
 845         ret = ath6kl_fetch_patch_file(ar);
 846         if (ret)
 847                 return ret;
 848
 849         ret = ath6kl_fetch_testscript_file(ar);
 850         if (ret)
 851                 return ret;
 852
 853         return 0;
 854 }
 855
 856 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
 857 {
 858         size_t magic_len, len, ie_len;
 859         const struct firmware *fw;
 860         struct ath6kl_fw_ie *hdr;
 861         char filename[100];
 862         const u8 *data;
 863         int ret, ie_id, i, index, bit;
 864         __le32 *val;
 865
 866         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
 867
 868         ret = request_firmware(&fw, filename, ar->dev);
 869         if (ret)
 870                 return ret;
 871
 872         data = fw->data;
 873         len = fw->size;
 874
 875         /* magic also includes the null byte, check that as well */
 876         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
 877
 878         if (len < magic_len) {
 879                 ret = -EINVAL;
 880                 goto out;
 881         }
 882
 883         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
 884                 ret = -EINVAL;
 885                 goto out;
 886         }
 887
 888         len -= magic_len;
 889         data += magic_len;
 890
 891         /* loop elements */
 892         while (len > sizeof(struct ath6kl_fw_ie)) {
 893                 /* hdr is unaligned! */
 894                 hdr = (struct ath6kl_fw_ie *) data;
 895
 896                 ie_id = le32_to_cpup(&hdr->id);
 897                 ie_len = le32_to_cpup(&hdr->len);
 898
 899                 len -= sizeof(*hdr);
 900                 data += sizeof(*hdr);
 901
 902                 if (len < ie_len) {
 903                         ret = -EINVAL;
 904                         goto out;
 905                 }
 906
 907                 switch (ie_id) {
 908                 case ATH6KL_FW_IE_OTP_IMAGE:
 909                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
 910                                    ie_len);
 911
 912                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
 913
 914                         if (ar->fw_otp == NULL) {
 915                                 ret = -ENOMEM;
 916                                 goto out;
 917                         }
 918
 919                         ar->fw_otp_len = ie_len;
 920                         break;
 921                 case ATH6KL_FW_IE_FW_IMAGE:
 922                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
 923                                    ie_len);
 924
 925                         /* in testmode we already might have a fw file */
 926                         if (ar->fw != NULL)
 927                                 break;
 928
 929                         ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
 930
 931                         if (ar->fw == NULL) {
 932                                 ret = -ENOMEM;
 933                                 goto out;
 934                         }
 935
 936                         ar->fw_len = ie_len;
 937                         break;
 938                 case ATH6KL_FW_IE_PATCH_IMAGE:
 939                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
 940                                    ie_len);
 941
 942                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
 943
 944                         if (ar->fw_patch == NULL) {
 945                                 ret = -ENOMEM;
 946                                 goto out;
 947                         }
 948
 949                         ar->fw_patch_len = ie_len;
 950                         break;
 951                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
 952                         val = (__le32 *) data;
 953                         ar->hw.reserved_ram_size = le32_to_cpup(val);
 954
 955                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 956                                    "found reserved ram size ie 0x%d\n",
 957                                    ar->hw.reserved_ram_size);
 958                         break;
 959                 case ATH6KL_FW_IE_CAPABILITIES:
 960                         if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
 961                                 break;
 962
 963                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 964                                    "found firmware capabilities ie (%zd B)\n",
 965                                    ie_len);
 966
 967                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
 968                                 index = i / 8;
 969                                 bit = i % 8;
 970
 971                                 if (data[index] & (1 << bit))
 972                                         __set_bit(i, ar->fw_capabilities);
 973                         }
 974
 975                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
 976                                         ar->fw_capabilities,
 977                                         sizeof(ar->fw_capabilities));
 978                         break;
 979                 case ATH6KL_FW_IE_PATCH_ADDR:
 980                         if (ie_len != sizeof(*val))
 981                                 break;
 982
 983                         val = (__le32 *) data;
 984                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
 985
 986                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 987                                    "found patch address ie 0x%x\n",
 988                                    ar->hw.dataset_patch_addr);
 989                         break;
 990                 case ATH6KL_FW_IE_BOARD_ADDR:
 991                         if (ie_len != sizeof(*val))
 992                                 break;
 993
 994                         val = (__le32 *) data;
 995                         ar->hw.board_addr = le32_to_cpup(val);
 996
 997                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 998                                    "found board address ie 0x%x\n",
 999                                    ar->hw.board_addr);
1000                         break;
1001                 case ATH6KL_FW_IE_VIF_MAX:
1002                         if (ie_len != sizeof(*val))
1003                                 break;
1004
1005                         val = (__le32 *) data;
1006                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1007                                             ATH6KL_VIF_MAX);
1008
1009                         if (ar->vif_max > 1 && !ar->p2p)
1010                                 ar->max_norm_iface = 2;
1011
1012                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1013                                    "found vif max ie %d\n", ar->vif_max);
1014                         break;
1015                 default:
1016                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1017                                    le32_to_cpup(&hdr->id));
1018                         break;
1019                 }
1020
1021                 len -= ie_len;
1022                 data += ie_len;
1023         };
1024
1025         ret = 0;
1026 out:
1027         release_firmware(fw);
1028
1029         return ret;
1030 }
1031
1032 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1033 {
1034         int ret;
1035
1036         ret = ath6kl_fetch_board_file(ar);
1037         if (ret)
1038                 return ret;
1039
1040         ret = ath6kl_fetch_testmode_file(ar);
1041         if (ret)
1042                 return ret;
1043
1044         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1045         if (ret == 0) {
1046                 ar->fw_api = 3;
1047                 goto out;
1048         }
1049
1050         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1051         if (ret == 0) {
1052                 ar->fw_api = 2;
1053                 goto out;
1054         }
1055
1056         ret = ath6kl_fetch_fw_api1(ar);
1057         if (ret)
1058                 return ret;
1059
1060         ar->fw_api = 1;
1061
1062 out:
1063         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1064
1065         return 0;
1066 }
1067
1068 static int ath6kl_upload_board_file(struct ath6kl *ar)
1069 {
1070         u32 board_address, board_ext_address, param;
1071         u32 board_data_size, board_ext_data_size;
1072         int ret;
1073
1074         if (WARN_ON(ar->fw_board == NULL))
1075                 return -ENOENT;
1076
1077         /*
1078          * Determine where in Target RAM to write Board Data.
1079          * For AR6004, host determine Target RAM address for
1080          * writing board data.
1081          */
1082         if (ar->hw.board_addr != 0) {
1083                 board_address = ar->hw.board_addr;
1084                 ath6kl_bmi_write_hi32(ar, hi_board_data,
1085                                       board_address);
1086         } else {
1087                 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1088         }
1089
1090         /* determine where in target ram to write extended board data */
1091         ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1092
1093         if (ar->target_type == TARGET_TYPE_AR6003 &&
1094             board_ext_address == 0) {
1095                 ath6kl_err("Failed to get board file target address.\n");
1096                 return -EINVAL;
1097         }
1098
1099         switch (ar->target_type) {
1100         case TARGET_TYPE_AR6003:
1101                 board_data_size = AR6003_BOARD_DATA_SZ;
1102                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1103                 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1104                         board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1105                 break;
1106         case TARGET_TYPE_AR6004:
1107                 board_data_size = AR6004_BOARD_DATA_SZ;
1108                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1109                 break;
1110         default:
1111                 WARN_ON(1);
1112                 return -EINVAL;
1113                 break;
1114         }
1115
1116         if (board_ext_address &&
1117             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1118
1119                 /* write extended board data */
1120                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1121                            "writing extended board data to 0x%x (%d B)\n",
1122                            board_ext_address, board_ext_data_size);
1123
1124                 ret = ath6kl_bmi_write(ar, board_ext_address,
1125                                        ar->fw_board + board_data_size,
1126                                        board_ext_data_size);
1127                 if (ret) {
1128                         ath6kl_err("Failed to write extended board data: %d\n",
1129                                    ret);
1130                         return ret;
1131                 }
1132
1133                 /* record that extended board data is initialized */
1134                 param = (board_ext_data_size << 16) | 1;
1135
1136                 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1137         }
1138
1139         if (ar->fw_board_len < board_data_size) {
1140                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1141                 ret = -EINVAL;
1142                 return ret;
1143         }
1144
1145         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1146                    board_address, board_data_size);
1147
1148         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1149                                board_data_size);
1150
1151         if (ret) {
1152                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1153                 return ret;
1154         }
1155
1156         /* record the fact that Board Data IS initialized */
1157         ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1158
1159         return ret;
1160 }
1161
1162 static int ath6kl_upload_otp(struct ath6kl *ar)
1163 {
1164         u32 address, param;
1165         bool from_hw = false;
1166         int ret;
1167
1168         if (ar->fw_otp == NULL)
1169                 return 0;
1170
1171         address = ar->hw.app_load_addr;
1172
1173         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1174                    ar->fw_otp_len);
1175
1176         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1177                                        ar->fw_otp_len);
1178         if (ret) {
1179                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1180                 return ret;
1181         }
1182
1183         /* read firmware start address */
1184         ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1185
1186         if (ret) {
1187                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1188                 return ret;
1189         }
1190
1191         if (ar->hw.app_start_override_addr == 0) {
1192                 ar->hw.app_start_override_addr = address;
1193                 from_hw = true;
1194         }
1195
1196         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1197                    from_hw ? " (from hw)" : "",
1198                    ar->hw.app_start_override_addr);
1199
1200         /* execute the OTP code */
1201         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1202                    ar->hw.app_start_override_addr);
1203         param = 0;
1204         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1205
1206         return ret;
1207 }
1208
1209 static int ath6kl_upload_firmware(struct ath6kl *ar)
1210 {
1211         u32 address;
1212         int ret;
1213
1214         if (WARN_ON(ar->fw == NULL))
1215                 return 0;
1216
1217         address = ar->hw.app_load_addr;
1218
1219         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1220                    address, ar->fw_len);
1221
1222         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1223
1224         if (ret) {
1225                 ath6kl_err("Failed to write firmware: %d\n", ret);
1226                 return ret;
1227         }
1228
1229         /*
1230          * Set starting address for firmware
1231          * Don't need to setup app_start override addr on AR6004
1232          */
1233         if (ar->target_type != TARGET_TYPE_AR6004) {
1234                 address = ar->hw.app_start_override_addr;
1235                 ath6kl_bmi_set_app_start(ar, address);
1236         }
1237         return ret;
1238 }
1239
1240 static int ath6kl_upload_patch(struct ath6kl *ar)
1241 {
1242         u32 address;
1243         int ret;
1244
1245         if (ar->fw_patch == NULL)
1246                 return 0;
1247
1248         address = ar->hw.dataset_patch_addr;
1249
1250         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1251                    address, ar->fw_patch_len);
1252
1253         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1254         if (ret) {
1255                 ath6kl_err("Failed to write patch file: %d\n", ret);
1256                 return ret;
1257         }
1258
1259         ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1260
1261         return 0;
1262 }
1263
1264 static int ath6kl_upload_testscript(struct ath6kl *ar)
1265 {
1266         u32 address;
1267         int ret;
1268
1269         if (ar->testmode != 2)
1270                 return 0;
1271
1272         if (ar->fw_testscript == NULL)
1273                 return 0;
1274
1275         address = ar->hw.testscript_addr;
1276
1277         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1278                    address, ar->fw_testscript_len);
1279
1280         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1281                 ar->fw_testscript_len);
1282         if (ret) {
1283                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1284                 return ret;
1285         }
1286
1287         ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1288         ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1289         ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1290
1291         return 0;
1292 }
1293
1294 static int ath6kl_init_upload(struct ath6kl *ar)
1295 {
1296         u32 param, options, sleep, address;
1297         int status = 0;
1298
1299         if (ar->target_type != TARGET_TYPE_AR6003 &&
1300             ar->target_type != TARGET_TYPE_AR6004)
1301                 return -EINVAL;
1302
1303         /* temporarily disable system sleep */
1304         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1305         status = ath6kl_bmi_reg_read(ar, address, &param);
1306         if (status)
1307                 return status;
1308
1309         options = param;
1310
1311         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1312         status = ath6kl_bmi_reg_write(ar, address, param);
1313         if (status)
1314                 return status;
1315
1316         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1317         status = ath6kl_bmi_reg_read(ar, address, &param);
1318         if (status)
1319                 return status;
1320
1321         sleep = param;
1322
1323         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1324         status = ath6kl_bmi_reg_write(ar, address, param);
1325         if (status)
1326                 return status;
1327
1328         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1329                    options, sleep);
1330
1331         /* program analog PLL register */
1332         /* no need to control 40/44MHz clock on AR6004 */
1333         if (ar->target_type != TARGET_TYPE_AR6004) {
1334                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1335                                               0xF9104001);
1336
1337                 if (status)
1338                         return status;
1339
1340                 /* Run at 80/88MHz by default */
1341                 param = SM(CPU_CLOCK_STANDARD, 1);
1342
1343                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1344                 status = ath6kl_bmi_reg_write(ar, address, param);
1345                 if (status)
1346                         return status;
1347         }
1348
1349         param = 0;
1350         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1351         param = SM(LPO_CAL_ENABLE, 1);
1352         status = ath6kl_bmi_reg_write(ar, address, param);
1353         if (status)
1354                 return status;
1355
1356         /* WAR to avoid SDIO CRC err */
1357         if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1358             ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
1359                 ath6kl_err("temporary war to avoid sdio crc error\n");
1360
1361                 param = 0x20;
1362
1363                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1364                 status = ath6kl_bmi_reg_write(ar, address, param);
1365                 if (status)
1366                         return status;
1367
1368                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1369                 status = ath6kl_bmi_reg_write(ar, address, param);
1370                 if (status)
1371                         return status;
1372
1373                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1374                 status = ath6kl_bmi_reg_write(ar, address, param);
1375                 if (status)
1376                         return status;
1377
1378                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1379                 status = ath6kl_bmi_reg_write(ar, address, param);
1380                 if (status)
1381                         return status;
1382         }
1383
1384         /* write EEPROM data to Target RAM */
1385         status = ath6kl_upload_board_file(ar);
1386         if (status)
1387                 return status;
1388
1389         /* transfer One time Programmable data */
1390         status = ath6kl_upload_otp(ar);
1391         if (status)
1392                 return status;
1393
1394         /* Download Target firmware */
1395         status = ath6kl_upload_firmware(ar);
1396         if (status)
1397                 return status;
1398
1399         status = ath6kl_upload_patch(ar);
1400         if (status)
1401                 return status;
1402
1403         /* Download the test script */
1404         status = ath6kl_upload_testscript(ar);
1405         if (status)
1406                 return status;
1407
1408         /* Restore system sleep */
1409         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1410         status = ath6kl_bmi_reg_write(ar, address, sleep);
1411         if (status)
1412                 return status;
1413
1414         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1415         param = options | 0x20;
1416         status = ath6kl_bmi_reg_write(ar, address, param);
1417         if (status)
1418                 return status;
1419
1420         return status;
1421 }
1422
1423 int ath6kl_init_hw_params(struct ath6kl *ar)
1424 {
1425         const struct ath6kl_hw *uninitialized_var(hw);
1426         int i;
1427
1428         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1429                 hw = &hw_list[i];
1430
1431                 if (hw->id == ar->version.target_ver)
1432                         break;
1433         }
1434
1435         if (i == ARRAY_SIZE(hw_list)) {
1436                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1437                            ar->version.target_ver);
1438                 return -EINVAL;
1439         }
1440
1441         ar->hw = *hw;
1442
1443         ath6kl_dbg(ATH6KL_DBG_BOOT,
1444                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1445                    ar->version.target_ver, ar->target_type,
1446                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1447         ath6kl_dbg(ATH6KL_DBG_BOOT,
1448                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1449                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1450                    ar->hw.reserved_ram_size);
1451         ath6kl_dbg(ATH6KL_DBG_BOOT,
1452                    "refclk_hz %d uarttx_pin %d",
1453                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1454
1455         return 0;
1456 }
1457
1458 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1459 {
1460         switch (type) {
1461         case ATH6KL_HIF_TYPE_SDIO:
1462                 return "sdio";
1463         case ATH6KL_HIF_TYPE_USB:
1464                 return "usb";
1465         }
1466
1467         return NULL;
1468 }
1469
1470 int ath6kl_init_hw_start(struct ath6kl *ar)
1471 {
1472         long timeleft;
1473         int ret, i;
1474
1475         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1476
1477         ret = ath6kl_hif_power_on(ar);
1478         if (ret)
1479                 return ret;
1480
1481         ret = ath6kl_configure_target(ar);
1482         if (ret)
1483                 goto err_power_off;
1484
1485         ret = ath6kl_init_upload(ar);
1486         if (ret)
1487                 goto err_power_off;
1488
1489         /* Do we need to finish the BMI phase */
1490         /* FIXME: return error from ath6kl_bmi_done() */
1491         if (ath6kl_bmi_done(ar)) {
1492                 ret = -EIO;
1493                 goto err_power_off;
1494         }
1495
1496         /*
1497          * The reason we have to wait for the target here is that the
1498          * driver layer has to init BMI in order to set the host block
1499          * size.
1500          */
1501         if (ath6kl_htc_wait_target(ar->htc_target)) {
1502                 ret = -EIO;
1503                 goto err_power_off;
1504         }
1505
1506         if (ath6kl_init_service_ep(ar)) {
1507                 ret = -EIO;
1508                 goto err_cleanup_scatter;
1509         }
1510
1511         /* setup credit distribution */
1512         ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1513
1514         /* start HTC */
1515         ret = ath6kl_htc_start(ar->htc_target);
1516         if (ret) {
1517                 /* FIXME: call this */
1518                 ath6kl_cookie_cleanup(ar);
1519                 goto err_cleanup_scatter;
1520         }
1521
1522         /* Wait for Wmi event to be ready */
1523         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1524                                                     test_bit(WMI_READY,
1525                                                              &ar->flag),
1526                                                     WMI_TIMEOUT);
1527
1528         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1529
1530
1531         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1532                 ath6kl_info("%s %s fw %s api %d%s\n",
1533                             ar->hw.name,
1534                             ath6kl_init_get_hif_name(ar->hif_type),
1535                             ar->wiphy->fw_version,
1536                             ar->fw_api,
1537                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1538         }
1539
1540         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1541                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1542                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1543                 ret = -EIO;
1544                 goto err_htc_stop;
1545         }
1546
1547         if (!timeleft || signal_pending(current)) {
1548                 ath6kl_err("wmi is not ready or wait was interrupted\n");
1549                 ret = -EIO;
1550                 goto err_htc_stop;
1551         }
1552
1553         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1554
1555         /* communicate the wmi protocol verision to the target */
1556         /* FIXME: return error */
1557         if ((ath6kl_set_host_app_area(ar)) != 0)
1558                 ath6kl_err("unable to set the host app area\n");
1559
1560         for (i = 0; i < ar->vif_max; i++) {
1561                 ret = ath6kl_target_config_wlan_params(ar, i);
1562                 if (ret)
1563                         goto err_htc_stop;
1564         }
1565
1566         ar->state = ATH6KL_STATE_ON;
1567
1568         return 0;
1569
1570 err_htc_stop:
1571         ath6kl_htc_stop(ar->htc_target);
1572 err_cleanup_scatter:
1573         ath6kl_hif_cleanup_scatter(ar);
1574 err_power_off:
1575         ath6kl_hif_power_off(ar);
1576
1577         return ret;
1578 }
1579
1580 int ath6kl_init_hw_stop(struct ath6kl *ar)
1581 {
1582         int ret;
1583
1584         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1585
1586         ath6kl_htc_stop(ar->htc_target);
1587
1588         ath6kl_hif_stop(ar);
1589
1590         ath6kl_bmi_reset(ar);
1591
1592         ret = ath6kl_hif_power_off(ar);
1593         if (ret)
1594                 ath6kl_warn("failed to power off hif: %d\n", ret);
1595
1596         ar->state = ATH6KL_STATE_OFF;
1597
1598         return 0;
1599 }
1600
1601 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
1602 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
1603 {
1604         static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1605         bool discon_issued;
1606
1607         netif_stop_queue(vif->ndev);
1608
1609         clear_bit(WLAN_ENABLED, &vif->flags);
1610
1611         if (wmi_ready) {
1612                 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1613                                 test_bit(CONNECT_PEND, &vif->flags);
1614                 ath6kl_disconnect(vif);
1615                 del_timer(&vif->disconnect_timer);
1616
1617                 if (discon_issued)
1618                         ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1619                                                 (vif->nw_type & AP_NETWORK) ?
1620                                                 bcast_mac : vif->bssid,
1621                                                 0, NULL, 0);
1622         }
1623
1624         if (vif->scan_req) {
1625                 cfg80211_scan_done(vif->scan_req, true);
1626                 vif->scan_req = NULL;
1627         }
1628 }
1629
1630 void ath6kl_stop_txrx(struct ath6kl *ar)
1631 {
1632         struct ath6kl_vif *vif, *tmp_vif;
1633         int i;
1634
1635         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1636
1637         if (down_interruptible(&ar->sem)) {
1638                 ath6kl_err("down_interruptible failed\n");
1639                 return;
1640         }
1641
1642         for (i = 0; i < AP_MAX_NUM_STA; i++)
1643                 aggr_reset_state(ar->sta_list[i].aggr_conn);
1644
1645         spin_lock_bh(&ar->list_lock);
1646         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1647                 list_del(&vif->list);
1648                 spin_unlock_bh(&ar->list_lock);
1649                 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1650                 rtnl_lock();
1651                 ath6kl_cfg80211_vif_cleanup(vif);
1652                 rtnl_unlock();
1653                 spin_lock_bh(&ar->list_lock);
1654         }
1655         spin_unlock_bh(&ar->list_lock);
1656
1657         clear_bit(WMI_READY, &ar->flag);
1658
1659         /*
1660          * After wmi_shudown all WMI events will be dropped. We
1661          * need to cleanup the buffers allocated in AP mode and
1662          * give disconnect notification to stack, which usually
1663          * happens in the disconnect_event. Simulate the disconnect
1664          * event by calling the function directly. Sometimes
1665          * disconnect_event will be received when the debug logs
1666          * are collected.
1667          */
1668         ath6kl_wmi_shutdown(ar->wmi);
1669
1670         clear_bit(WMI_ENABLED, &ar->flag);
1671         if (ar->htc_target) {
1672                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1673                 ath6kl_htc_stop(ar->htc_target);
1674         }
1675
1676         /*
1677          * Try to reset the device if we can. The driver may have been
1678          * configure NOT to reset the target during a debug session.
1679          */
1680         ath6kl_dbg(ATH6KL_DBG_TRC,
1681                    "attempting to reset target on instance destroy\n");
1682         ath6kl_reset_device(ar, ar->target_type, true, true);
1683
1684         clear_bit(WLAN_ENABLED, &ar->flag);
1685
1686         up(&ar->sem);
1687 }
1688 EXPORT_SYMBOL(ath6kl_stop_txrx);