ath6kl: alignment should match open parenthesis
[cascardo/linux.git] / drivers / net / wireless / ath / ath6kl / init.c
1
2 /*
3  * Copyright (c) 2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5  *
6  * Permission to use, copy, modify, and/or distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18
19 #include <linux/moduleparam.h>
20 #include <linux/errno.h>
21 #include <linux/export.h>
22 #include <linux/of.h>
23 #include <linux/mmc/sdio_func.h>
24
25 #include "core.h"
26 #include "cfg80211.h"
27 #include "target.h"
28 #include "debug.h"
29 #include "hif-ops.h"
30
31 static const struct ath6kl_hw hw_list[] = {
32         {
33                 .id                             = AR6003_HW_2_0_VERSION,
34                 .name                           = "ar6003 hw 2.0",
35                 .dataset_patch_addr             = 0x57e884,
36                 .app_load_addr                  = 0x543180,
37                 .board_ext_data_addr            = 0x57e500,
38                 .reserved_ram_size              = 6912,
39                 .refclk_hz                      = 26000000,
40                 .uarttx_pin                     = 8,
41
42                 /* hw2.0 needs override address hardcoded */
43                 .app_start_override_addr        = 0x944C00,
44
45                 .fw = {
46                         .dir            = AR6003_HW_2_0_FW_DIR,
47                         .otp            = AR6003_HW_2_0_OTP_FILE,
48                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
49                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
50                         .patch          = AR6003_HW_2_0_PATCH_FILE,
51                 },
52
53                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
54                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
55         },
56         {
57                 .id                             = AR6003_HW_2_1_1_VERSION,
58                 .name                           = "ar6003 hw 2.1.1",
59                 .dataset_patch_addr             = 0x57ff74,
60                 .app_load_addr                  = 0x1234,
61                 .board_ext_data_addr            = 0x542330,
62                 .reserved_ram_size              = 512,
63                 .refclk_hz                      = 26000000,
64                 .uarttx_pin                     = 8,
65                 .testscript_addr                = 0x57ef74,
66
67                 .fw = {
68                         .dir            = AR6003_HW_2_1_1_FW_DIR,
69                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
70                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
71                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
72                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
73                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
74                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
75                 },
76
77                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
78                 .fw_default_board       = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
79         },
80         {
81                 .id                             = AR6004_HW_1_0_VERSION,
82                 .name                           = "ar6004 hw 1.0",
83                 .dataset_patch_addr             = 0x57e884,
84                 .app_load_addr                  = 0x1234,
85                 .board_ext_data_addr            = 0x437000,
86                 .reserved_ram_size              = 19456,
87                 .board_addr                     = 0x433900,
88                 .refclk_hz                      = 26000000,
89                 .uarttx_pin                     = 11,
90
91                 .fw = {
92                         .dir            = AR6004_HW_1_0_FW_DIR,
93                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
94                 },
95
96                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
97                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
98         },
99         {
100                 .id                             = AR6004_HW_1_1_VERSION,
101                 .name                           = "ar6004 hw 1.1",
102                 .dataset_patch_addr             = 0x57e884,
103                 .app_load_addr                  = 0x1234,
104                 .board_ext_data_addr            = 0x437000,
105                 .reserved_ram_size              = 11264,
106                 .board_addr                     = 0x43d400,
107                 .refclk_hz                      = 40000000,
108                 .uarttx_pin                     = 11,
109
110                 .fw = {
111                         .dir            = AR6004_HW_1_1_FW_DIR,
112                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
113                 },
114
115                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
116                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
117         },
118 };
119
120 /*
121  * Include definitions here that can be used to tune the WLAN module
122  * behavior. Different customers can tune the behavior as per their needs,
123  * here.
124  */
125
126 /*
127  * This configuration item enable/disable keepalive support.
128  * Keepalive support: In the absence of any data traffic to AP, null
129  * frames will be sent to the AP at periodic interval, to keep the association
130  * active. This configuration item defines the periodic interval.
131  * Use value of zero to disable keepalive support
132  * Default: 60 seconds
133  */
134 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
135
136 /*
137  * This configuration item sets the value of disconnect timeout
138  * Firmware delays sending the disconnec event to the host for this
139  * timeout after is gets disconnected from the current AP.
140  * If the firmware successly roams within the disconnect timeout
141  * it sends a new connect event
142  */
143 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
144
145
146 #define ATH6KL_DATA_OFFSET    64
147 struct sk_buff *ath6kl_buf_alloc(int size)
148 {
149         struct sk_buff *skb;
150         u16 reserved;
151
152         /* Add chacheline space at front and back of buffer */
153         reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
154                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
155         skb = dev_alloc_skb(size + reserved);
156
157         if (skb)
158                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
159         return skb;
160 }
161
162 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
163 {
164         vif->ssid_len = 0;
165         memset(vif->ssid, 0, sizeof(vif->ssid));
166
167         vif->dot11_auth_mode = OPEN_AUTH;
168         vif->auth_mode = NONE_AUTH;
169         vif->prwise_crypto = NONE_CRYPT;
170         vif->prwise_crypto_len = 0;
171         vif->grp_crypto = NONE_CRYPT;
172         vif->grp_crypto_len = 0;
173         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
174         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
175         memset(vif->bssid, 0, sizeof(vif->bssid));
176         vif->bss_ch = 0;
177 }
178
179 static int ath6kl_set_host_app_area(struct ath6kl *ar)
180 {
181         u32 address, data;
182         struct host_app_area host_app_area;
183
184         /* Fetch the address of the host_app_area_s
185          * instance in the host interest area */
186         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
187         address = TARG_VTOP(ar->target_type, address);
188
189         if (ath6kl_diag_read32(ar, address, &data))
190                 return -EIO;
191
192         address = TARG_VTOP(ar->target_type, data);
193         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
194         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
195                               sizeof(struct host_app_area)))
196                 return -EIO;
197
198         return 0;
199 }
200
201 static inline void set_ac2_ep_map(struct ath6kl *ar,
202                                   u8 ac,
203                                   enum htc_endpoint_id ep)
204 {
205         ar->ac2ep_map[ac] = ep;
206         ar->ep2ac_map[ep] = ac;
207 }
208
209 /* connect to a service */
210 static int ath6kl_connectservice(struct ath6kl *ar,
211                                  struct htc_service_connect_req  *con_req,
212                                  char *desc)
213 {
214         int status;
215         struct htc_service_connect_resp response;
216
217         memset(&response, 0, sizeof(response));
218
219         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
220         if (status) {
221                 ath6kl_err("failed to connect to %s service status:%d\n",
222                            desc, status);
223                 return status;
224         }
225
226         switch (con_req->svc_id) {
227         case WMI_CONTROL_SVC:
228                 if (test_bit(WMI_ENABLED, &ar->flag))
229                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
230                 ar->ctrl_ep = response.endpoint;
231                 break;
232         case WMI_DATA_BE_SVC:
233                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
234                 break;
235         case WMI_DATA_BK_SVC:
236                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
237                 break;
238         case WMI_DATA_VI_SVC:
239                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
240                 break;
241         case WMI_DATA_VO_SVC:
242                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
243                 break;
244         default:
245                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
246                 return -EINVAL;
247         }
248
249         return 0;
250 }
251
252 static int ath6kl_init_service_ep(struct ath6kl *ar)
253 {
254         struct htc_service_connect_req connect;
255
256         memset(&connect, 0, sizeof(connect));
257
258         /* these fields are the same for all service endpoints */
259         connect.ep_cb.rx = ath6kl_rx;
260         connect.ep_cb.rx_refill = ath6kl_rx_refill;
261         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
262
263         /*
264          * Set the max queue depth so that our ath6kl_tx_queue_full handler
265          * gets called.
266         */
267         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
268         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
269         if (!connect.ep_cb.rx_refill_thresh)
270                 connect.ep_cb.rx_refill_thresh++;
271
272         /* connect to control service */
273         connect.svc_id = WMI_CONTROL_SVC;
274         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
275                 return -EIO;
276
277         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
278
279         /*
280          * Limit the HTC message size on the send path, although e can
281          * receive A-MSDU frames of 4K, we will only send ethernet-sized
282          * (802.3) frames on the send path.
283          */
284         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
285
286         /*
287          * To reduce the amount of committed memory for larger A_MSDU
288          * frames, use the recv-alloc threshold mechanism for larger
289          * packets.
290          */
291         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
292         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
293
294         /*
295          * For the remaining data services set the connection flag to
296          * reduce dribbling, if configured to do so.
297          */
298         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
299         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
300         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
301
302         connect.svc_id = WMI_DATA_BE_SVC;
303
304         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
305                 return -EIO;
306
307         /* connect to back-ground map this to WMI LOW_PRI */
308         connect.svc_id = WMI_DATA_BK_SVC;
309         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
310                 return -EIO;
311
312         /* connect to Video service, map this to to HI PRI */
313         connect.svc_id = WMI_DATA_VI_SVC;
314         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
315                 return -EIO;
316
317         /*
318          * Connect to VO service, this is currently not mapped to a WMI
319          * priority stream due to historical reasons. WMI originally
320          * defined 3 priorities over 3 mailboxes We can change this when
321          * WMI is reworked so that priorities are not dependent on
322          * mailboxes.
323          */
324         connect.svc_id = WMI_DATA_VO_SVC;
325         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
326                 return -EIO;
327
328         return 0;
329 }
330
331 void ath6kl_init_control_info(struct ath6kl_vif *vif)
332 {
333         ath6kl_init_profile_info(vif);
334         vif->def_txkey_index = 0;
335         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
336         vif->ch_hint = 0;
337 }
338
339 /*
340  * Set HTC/Mbox operational parameters, this can only be called when the
341  * target is in the BMI phase.
342  */
343 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
344                                  u8 htc_ctrl_buf)
345 {
346         int status;
347         u32 blk_size;
348
349         blk_size = ar->mbox_info.block_size;
350
351         if (htc_ctrl_buf)
352                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
353
354         /* set the host interest area for the block size */
355         status = ath6kl_bmi_write(ar,
356                         ath6kl_get_hi_item_addr(ar,
357                         HI_ITEM(hi_mbox_io_block_sz)),
358                         (u8 *)&blk_size,
359                         4);
360         if (status) {
361                 ath6kl_err("bmi_write_memory for IO block size failed\n");
362                 goto out;
363         }
364
365         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
366                    blk_size,
367                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
368
369         if (mbox_isr_yield_val) {
370                 /* set the host interest area for the mbox ISR yield limit */
371                 status = ath6kl_bmi_write(ar,
372                                 ath6kl_get_hi_item_addr(ar,
373                                 HI_ITEM(hi_mbox_isr_yield_limit)),
374                                 (u8 *)&mbox_isr_yield_val,
375                                 4);
376                 if (status) {
377                         ath6kl_err("bmi_write_memory for yield limit failed\n");
378                         goto out;
379                 }
380         }
381
382 out:
383         return status;
384 }
385
386 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
387 {
388         int status = 0;
389         int ret;
390
391         /*
392          * Configure the device for rx dot11 header rules. "0,0" are the
393          * default values. Required if checksum offload is needed. Set
394          * RxMetaVersion to 2.
395          */
396         if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
397                                                ar->rx_meta_ver, 0, 0)) {
398                 ath6kl_err("unable to set the rx frame format\n");
399                 status = -EIO;
400         }
401
402         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
403                 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
404                      IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
405                         ath6kl_err("unable to set power save fail event policy\n");
406                         status = -EIO;
407                 }
408
409         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
410                 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
411                      WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
412                         ath6kl_err("unable to set barker preamble policy\n");
413                         status = -EIO;
414                 }
415
416         if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
417                                          WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
418                 ath6kl_err("unable to set keep alive interval\n");
419                 status = -EIO;
420         }
421
422         if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
423                                        WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
424                 ath6kl_err("unable to set disconnect timeout\n");
425                 status = -EIO;
426         }
427
428         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
429                 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
430                         ath6kl_err("unable to set txop bursting\n");
431                         status = -EIO;
432                 }
433
434         if (ar->p2p && (ar->vif_max == 1 || idx)) {
435                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
436                                               P2P_FLAG_CAPABILITIES_REQ |
437                                               P2P_FLAG_MACADDR_REQ |
438                                               P2P_FLAG_HMODEL_REQ);
439                 if (ret) {
440                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
441                                    "capabilities (%d) - assuming P2P not "
442                                    "supported\n", ret);
443                         ar->p2p = false;
444                 }
445         }
446
447         if (ar->p2p && (ar->vif_max == 1 || idx)) {
448                 /* Enable Probe Request reporting for P2P */
449                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
450                 if (ret) {
451                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
452                                    "Request reporting (%d)\n", ret);
453                 }
454         }
455
456         return status;
457 }
458
459 int ath6kl_configure_target(struct ath6kl *ar)
460 {
461         u32 param, ram_reserved_size;
462         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
463         int i, status;
464
465         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
466         if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
467                              HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
468                 ath6kl_err("bmi_write_memory for uart debug failed\n");
469                 return -EIO;
470         }
471
472         /*
473          * Note: Even though the firmware interface type is
474          * chosen as BSS_STA for all three interfaces, can
475          * be configured to IBSS/AP as long as the fw submode
476          * remains normal mode (0 - AP, STA and IBSS). But
477          * due to an target assert in firmware only one interface is
478          * configured for now.
479          */
480         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
481
482         for (i = 0; i < ar->vif_max; i++)
483                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
484
485         /*
486          * By default, submodes :
487          *              vif[0] - AP/STA/IBSS
488          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
489          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
490          */
491
492         for (i = 0; i < ar->max_norm_iface; i++)
493                 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
494                               (i * HI_OPTION_FW_SUBMODE_BITS);
495
496         for (i = ar->max_norm_iface; i < ar->vif_max; i++)
497                 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
498                               (i * HI_OPTION_FW_SUBMODE_BITS);
499
500         if (ar->p2p && ar->vif_max == 1)
501                 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
502
503         param = HTC_PROTOCOL_VERSION;
504         if (ath6kl_bmi_write(ar,
505                              ath6kl_get_hi_item_addr(ar,
506                              HI_ITEM(hi_app_host_interest)),
507                              (u8 *)&param, 4) != 0) {
508                 ath6kl_err("bmi_write_memory for htc version failed\n");
509                 return -EIO;
510         }
511
512         /* set the firmware mode to STA/IBSS/AP */
513         param = 0;
514
515         if (ath6kl_bmi_read(ar,
516                             ath6kl_get_hi_item_addr(ar,
517                             HI_ITEM(hi_option_flag)),
518                             (u8 *)&param, 4) != 0) {
519                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
520                 return -EIO;
521         }
522
523         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
524         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
525         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
526
527         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
528         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
529
530         if (ath6kl_bmi_write(ar,
531                              ath6kl_get_hi_item_addr(ar,
532                              HI_ITEM(hi_option_flag)),
533                              (u8 *)&param,
534                              4) != 0) {
535                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
536                 return -EIO;
537         }
538
539         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
540
541         /*
542          * Hardcode the address use for the extended board data
543          * Ideally this should be pre-allocate by the OS at boot time
544          * But since it is a new feature and board data is loaded
545          * at init time, we have to workaround this from host.
546          * It is difficult to patch the firmware boot code,
547          * but possible in theory.
548          */
549
550         param = ar->hw.board_ext_data_addr;
551         ram_reserved_size = ar->hw.reserved_ram_size;
552
553         if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
554                                         HI_ITEM(hi_board_ext_data)),
555                              (u8 *)&param, 4) != 0) {
556                 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
557                 return -EIO;
558         }
559
560         if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
561                                         HI_ITEM(hi_end_ram_reserve_sz)),
562                              (u8 *)&ram_reserved_size, 4) != 0) {
563                 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
564                 return -EIO;
565         }
566
567         /* set the block size for the target */
568         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
569                 /* use default number of control buffers */
570                 return -EIO;
571
572         /* Configure GPIO AR600x UART */
573         param = ar->hw.uarttx_pin;
574         status = ath6kl_bmi_write(ar,
575                                 ath6kl_get_hi_item_addr(ar,
576                                 HI_ITEM(hi_dbg_uart_txpin)),
577                                 (u8 *)&param, 4);
578         if (status)
579                 return status;
580
581         /* Configure target refclk_hz */
582         param =  ar->hw.refclk_hz;
583         status = ath6kl_bmi_write(ar,
584                                 ath6kl_get_hi_item_addr(ar,
585                                 HI_ITEM(hi_refclk_hz)),
586                                 (u8 *)&param, 4);
587         if (status)
588                 return status;
589
590         return 0;
591 }
592
593 /* firmware upload */
594 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
595                          u8 **fw, size_t *fw_len)
596 {
597         const struct firmware *fw_entry;
598         int ret;
599
600         ret = request_firmware(&fw_entry, filename, ar->dev);
601         if (ret)
602                 return ret;
603
604         *fw_len = fw_entry->size;
605         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
606
607         if (*fw == NULL)
608                 ret = -ENOMEM;
609
610         release_firmware(fw_entry);
611
612         return ret;
613 }
614
615 #ifdef CONFIG_OF
616 /*
617  * Check the device tree for a board-id and use it to construct
618  * the pathname to the firmware file.  Used (for now) to find a
619  * fallback to the "bdata.bin" file--typically a symlink to the
620  * appropriate board-specific file.
621  */
622 static bool check_device_tree(struct ath6kl *ar)
623 {
624         static const char *board_id_prop = "atheros,board-id";
625         struct device_node *node;
626         char board_filename[64];
627         const char *board_id;
628         int ret;
629
630         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
631                 board_id = of_get_property(node, board_id_prop, NULL);
632                 if (board_id == NULL) {
633                         ath6kl_warn("No \"%s\" property on %s node.\n",
634                                     board_id_prop, node->name);
635                         continue;
636                 }
637                 snprintf(board_filename, sizeof(board_filename),
638                          "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
639
640                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
641                                     &ar->fw_board_len);
642                 if (ret) {
643                         ath6kl_err("Failed to get DT board file %s: %d\n",
644                                    board_filename, ret);
645                         continue;
646                 }
647                 return true;
648         }
649         return false;
650 }
651 #else
652 static bool check_device_tree(struct ath6kl *ar)
653 {
654         return false;
655 }
656 #endif /* CONFIG_OF */
657
658 static int ath6kl_fetch_board_file(struct ath6kl *ar)
659 {
660         const char *filename;
661         int ret;
662
663         if (ar->fw_board != NULL)
664                 return 0;
665
666         if (WARN_ON(ar->hw.fw_board == NULL))
667                 return -EINVAL;
668
669         filename = ar->hw.fw_board;
670
671         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
672                             &ar->fw_board_len);
673         if (ret == 0) {
674                 /* managed to get proper board file */
675                 return 0;
676         }
677
678         if (check_device_tree(ar)) {
679                 /* got board file from device tree */
680                 return 0;
681         }
682
683         /* there was no proper board file, try to use default instead */
684         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
685                     filename, ret);
686
687         filename = ar->hw.fw_default_board;
688
689         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
690                             &ar->fw_board_len);
691         if (ret) {
692                 ath6kl_err("Failed to get default board file %s: %d\n",
693                            filename, ret);
694                 return ret;
695         }
696
697         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
698         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
699
700         return 0;
701 }
702
703 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
704 {
705         char filename[100];
706         int ret;
707
708         if (ar->fw_otp != NULL)
709                 return 0;
710
711         if (ar->hw.fw.otp == NULL) {
712                 ath6kl_dbg(ATH6KL_DBG_BOOT,
713                            "no OTP file configured for this hw\n");
714                 return 0;
715         }
716
717         snprintf(filename, sizeof(filename), "%s/%s",
718                  ar->hw.fw.dir, ar->hw.fw.otp);
719
720         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
721                             &ar->fw_otp_len);
722         if (ret) {
723                 ath6kl_err("Failed to get OTP file %s: %d\n",
724                            filename, ret);
725                 return ret;
726         }
727
728         return 0;
729 }
730
731 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
732 {
733         char filename[100];
734         int ret;
735
736         if (ar->testmode == 0)
737                 return 0;
738
739         ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
740
741         if (ar->testmode == 2) {
742                 if (ar->hw.fw.utf == NULL) {
743                         ath6kl_warn("testmode 2 not supported\n");
744                         return -EOPNOTSUPP;
745                 }
746
747                 snprintf(filename, sizeof(filename), "%s/%s",
748                          ar->hw.fw.dir, ar->hw.fw.utf);
749         } else {
750                 if (ar->hw.fw.tcmd == NULL) {
751                         ath6kl_warn("testmode 1 not supported\n");
752                         return -EOPNOTSUPP;
753                 }
754
755                 snprintf(filename, sizeof(filename), "%s/%s",
756                          ar->hw.fw.dir, ar->hw.fw.tcmd);
757         }
758
759         set_bit(TESTMODE, &ar->flag);
760
761         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
762         if (ret) {
763                 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
764                            ar->testmode, filename, ret);
765                 return ret;
766         }
767
768         return 0;
769 }
770
771 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
772 {
773         char filename[100];
774         int ret;
775
776         if (ar->fw != NULL)
777                 return 0;
778
779         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
780         if (WARN_ON(ar->hw.fw.fw == NULL))
781                 return -EINVAL;
782
783         snprintf(filename, sizeof(filename), "%s/%s",
784                  ar->hw.fw.dir, ar->hw.fw.fw);
785
786         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
787         if (ret) {
788                 ath6kl_err("Failed to get firmware file %s: %d\n",
789                            filename, ret);
790                 return ret;
791         }
792
793         return 0;
794 }
795
796 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
797 {
798         char filename[100];
799         int ret;
800
801         if (ar->fw_patch != NULL)
802                 return 0;
803
804         if (ar->hw.fw.patch == NULL)
805                 return 0;
806
807         snprintf(filename, sizeof(filename), "%s/%s",
808                  ar->hw.fw.dir, ar->hw.fw.patch);
809
810         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
811                             &ar->fw_patch_len);
812         if (ret) {
813                 ath6kl_err("Failed to get patch file %s: %d\n",
814                            filename, ret);
815                 return ret;
816         }
817
818         return 0;
819 }
820
821 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
822 {
823         char filename[100];
824         int ret;
825
826         if (ar->testmode != 2)
827                 return 0;
828
829         if (ar->fw_testscript != NULL)
830                 return 0;
831
832         if (ar->hw.fw.testscript == NULL)
833                 return 0;
834
835         snprintf(filename, sizeof(filename), "%s/%s",
836                  ar->hw.fw.dir, ar->hw.fw.testscript);
837
838         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
839                                 &ar->fw_testscript_len);
840         if (ret) {
841                 ath6kl_err("Failed to get testscript file %s: %d\n",
842                            filename, ret);
843                 return ret;
844         }
845
846         return 0;
847 }
848
849 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
850 {
851         int ret;
852
853         ret = ath6kl_fetch_otp_file(ar);
854         if (ret)
855                 return ret;
856
857         ret = ath6kl_fetch_fw_file(ar);
858         if (ret)
859                 return ret;
860
861         ret = ath6kl_fetch_patch_file(ar);
862         if (ret)
863                 return ret;
864
865         ret = ath6kl_fetch_testscript_file(ar);
866         if (ret)
867                 return ret;
868
869         return 0;
870 }
871
872 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
873 {
874         size_t magic_len, len, ie_len;
875         const struct firmware *fw;
876         struct ath6kl_fw_ie *hdr;
877         char filename[100];
878         const u8 *data;
879         int ret, ie_id, i, index, bit;
880         __le32 *val;
881
882         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
883
884         ret = request_firmware(&fw, filename, ar->dev);
885         if (ret)
886                 return ret;
887
888         data = fw->data;
889         len = fw->size;
890
891         /* magic also includes the null byte, check that as well */
892         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
893
894         if (len < magic_len) {
895                 ret = -EINVAL;
896                 goto out;
897         }
898
899         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
900                 ret = -EINVAL;
901                 goto out;
902         }
903
904         len -= magic_len;
905         data += magic_len;
906
907         /* loop elements */
908         while (len > sizeof(struct ath6kl_fw_ie)) {
909                 /* hdr is unaligned! */
910                 hdr = (struct ath6kl_fw_ie *) data;
911
912                 ie_id = le32_to_cpup(&hdr->id);
913                 ie_len = le32_to_cpup(&hdr->len);
914
915                 len -= sizeof(*hdr);
916                 data += sizeof(*hdr);
917
918                 if (len < ie_len) {
919                         ret = -EINVAL;
920                         goto out;
921                 }
922
923                 switch (ie_id) {
924                 case ATH6KL_FW_IE_OTP_IMAGE:
925                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
926                                    ie_len);
927
928                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
929
930                         if (ar->fw_otp == NULL) {
931                                 ret = -ENOMEM;
932                                 goto out;
933                         }
934
935                         ar->fw_otp_len = ie_len;
936                         break;
937                 case ATH6KL_FW_IE_FW_IMAGE:
938                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
939                                    ie_len);
940
941                         /* in testmode we already might have a fw file */
942                         if (ar->fw != NULL)
943                                 break;
944
945                         ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
946
947                         if (ar->fw == NULL) {
948                                 ret = -ENOMEM;
949                                 goto out;
950                         }
951
952                         ar->fw_len = ie_len;
953                         break;
954                 case ATH6KL_FW_IE_PATCH_IMAGE:
955                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
956                                    ie_len);
957
958                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
959
960                         if (ar->fw_patch == NULL) {
961                                 ret = -ENOMEM;
962                                 goto out;
963                         }
964
965                         ar->fw_patch_len = ie_len;
966                         break;
967                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
968                         val = (__le32 *) data;
969                         ar->hw.reserved_ram_size = le32_to_cpup(val);
970
971                         ath6kl_dbg(ATH6KL_DBG_BOOT,
972                                    "found reserved ram size ie 0x%d\n",
973                                    ar->hw.reserved_ram_size);
974                         break;
975                 case ATH6KL_FW_IE_CAPABILITIES:
976                         if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
977                                 break;
978
979                         ath6kl_dbg(ATH6KL_DBG_BOOT,
980                                    "found firmware capabilities ie (%zd B)\n",
981                                    ie_len);
982
983                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
984                                 index = i / 8;
985                                 bit = i % 8;
986
987                                 if (data[index] & (1 << bit))
988                                         __set_bit(i, ar->fw_capabilities);
989                         }
990
991                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
992                                         ar->fw_capabilities,
993                                         sizeof(ar->fw_capabilities));
994                         break;
995                 case ATH6KL_FW_IE_PATCH_ADDR:
996                         if (ie_len != sizeof(*val))
997                                 break;
998
999                         val = (__le32 *) data;
1000                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
1001
1002                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1003                                    "found patch address ie 0x%x\n",
1004                                    ar->hw.dataset_patch_addr);
1005                         break;
1006                 case ATH6KL_FW_IE_BOARD_ADDR:
1007                         if (ie_len != sizeof(*val))
1008                                 break;
1009
1010                         val = (__le32 *) data;
1011                         ar->hw.board_addr = le32_to_cpup(val);
1012
1013                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1014                                    "found board address ie 0x%x\n",
1015                                    ar->hw.board_addr);
1016                         break;
1017                 case ATH6KL_FW_IE_VIF_MAX:
1018                         if (ie_len != sizeof(*val))
1019                                 break;
1020
1021                         val = (__le32 *) data;
1022                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1023                                             ATH6KL_VIF_MAX);
1024
1025                         if (ar->vif_max > 1 && !ar->p2p)
1026                                 ar->max_norm_iface = 2;
1027
1028                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1029                                    "found vif max ie %d\n", ar->vif_max);
1030                         break;
1031                 default:
1032                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1033                                    le32_to_cpup(&hdr->id));
1034                         break;
1035                 }
1036
1037                 len -= ie_len;
1038                 data += ie_len;
1039         };
1040
1041         ret = 0;
1042 out:
1043         release_firmware(fw);
1044
1045         return ret;
1046 }
1047
1048 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1049 {
1050         int ret;
1051
1052         ret = ath6kl_fetch_board_file(ar);
1053         if (ret)
1054                 return ret;
1055
1056         ret = ath6kl_fetch_testmode_file(ar);
1057         if (ret)
1058                 return ret;
1059
1060         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1061         if (ret == 0) {
1062                 ar->fw_api = 3;
1063                 goto out;
1064         }
1065
1066         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1067         if (ret == 0) {
1068                 ar->fw_api = 2;
1069                 goto out;
1070         }
1071
1072         ret = ath6kl_fetch_fw_api1(ar);
1073         if (ret)
1074                 return ret;
1075
1076         ar->fw_api = 1;
1077
1078 out:
1079         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1080
1081         return 0;
1082 }
1083
1084 static int ath6kl_upload_board_file(struct ath6kl *ar)
1085 {
1086         u32 board_address, board_ext_address, param;
1087         u32 board_data_size, board_ext_data_size;
1088         int ret;
1089
1090         if (WARN_ON(ar->fw_board == NULL))
1091                 return -ENOENT;
1092
1093         /*
1094          * Determine where in Target RAM to write Board Data.
1095          * For AR6004, host determine Target RAM address for
1096          * writing board data.
1097          */
1098         if (ar->hw.board_addr != 0) {
1099                 board_address = ar->hw.board_addr;
1100                 ath6kl_bmi_write(ar,
1101                                 ath6kl_get_hi_item_addr(ar,
1102                                 HI_ITEM(hi_board_data)),
1103                                 (u8 *) &board_address, 4);
1104         } else {
1105                 ath6kl_bmi_read(ar,
1106                                 ath6kl_get_hi_item_addr(ar,
1107                                 HI_ITEM(hi_board_data)),
1108                                 (u8 *) &board_address, 4);
1109         }
1110
1111         /* determine where in target ram to write extended board data */
1112         ath6kl_bmi_read(ar,
1113                         ath6kl_get_hi_item_addr(ar,
1114                         HI_ITEM(hi_board_ext_data)),
1115                         (u8 *) &board_ext_address, 4);
1116
1117         if (ar->target_type == TARGET_TYPE_AR6003 &&
1118             board_ext_address == 0) {
1119                 ath6kl_err("Failed to get board file target address.\n");
1120                 return -EINVAL;
1121         }
1122
1123         switch (ar->target_type) {
1124         case TARGET_TYPE_AR6003:
1125                 board_data_size = AR6003_BOARD_DATA_SZ;
1126                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1127                 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1128                         board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1129                 break;
1130         case TARGET_TYPE_AR6004:
1131                 board_data_size = AR6004_BOARD_DATA_SZ;
1132                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1133                 break;
1134         default:
1135                 WARN_ON(1);
1136                 return -EINVAL;
1137                 break;
1138         }
1139
1140         if (board_ext_address &&
1141             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1142
1143                 /* write extended board data */
1144                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1145                            "writing extended board data to 0x%x (%d B)\n",
1146                            board_ext_address, board_ext_data_size);
1147
1148                 ret = ath6kl_bmi_write(ar, board_ext_address,
1149                                        ar->fw_board + board_data_size,
1150                                        board_ext_data_size);
1151                 if (ret) {
1152                         ath6kl_err("Failed to write extended board data: %d\n",
1153                                    ret);
1154                         return ret;
1155                 }
1156
1157                 /* record that extended board data is initialized */
1158                 param = (board_ext_data_size << 16) | 1;
1159
1160                 ath6kl_bmi_write(ar,
1161                                  ath6kl_get_hi_item_addr(ar,
1162                                  HI_ITEM(hi_board_ext_data_config)),
1163                                  (unsigned char *) &param, 4);
1164         }
1165
1166         if (ar->fw_board_len < board_data_size) {
1167                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1168                 ret = -EINVAL;
1169                 return ret;
1170         }
1171
1172         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1173                    board_address, board_data_size);
1174
1175         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1176                                board_data_size);
1177
1178         if (ret) {
1179                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1180                 return ret;
1181         }
1182
1183         /* record the fact that Board Data IS initialized */
1184         param = 1;
1185         ath6kl_bmi_write(ar,
1186                          ath6kl_get_hi_item_addr(ar,
1187                          HI_ITEM(hi_board_data_initialized)),
1188                          (u8 *)&param, 4);
1189
1190         return ret;
1191 }
1192
1193 static int ath6kl_upload_otp(struct ath6kl *ar)
1194 {
1195         u32 address, param;
1196         bool from_hw = false;
1197         int ret;
1198
1199         if (ar->fw_otp == NULL)
1200                 return 0;
1201
1202         address = ar->hw.app_load_addr;
1203
1204         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1205                    ar->fw_otp_len);
1206
1207         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1208                                        ar->fw_otp_len);
1209         if (ret) {
1210                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1211                 return ret;
1212         }
1213
1214         /* read firmware start address */
1215         ret = ath6kl_bmi_read(ar,
1216                               ath6kl_get_hi_item_addr(ar,
1217                                                       HI_ITEM(hi_app_start)),
1218                               (u8 *) &address, sizeof(address));
1219
1220         if (ret) {
1221                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1222                 return ret;
1223         }
1224
1225         if (ar->hw.app_start_override_addr == 0) {
1226                 ar->hw.app_start_override_addr = address;
1227                 from_hw = true;
1228         }
1229
1230         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1231                    from_hw ? " (from hw)" : "",
1232                    ar->hw.app_start_override_addr);
1233
1234         /* execute the OTP code */
1235         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1236                    ar->hw.app_start_override_addr);
1237         param = 0;
1238         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1239
1240         return ret;
1241 }
1242
1243 static int ath6kl_upload_firmware(struct ath6kl *ar)
1244 {
1245         u32 address;
1246         int ret;
1247
1248         if (WARN_ON(ar->fw == NULL))
1249                 return 0;
1250
1251         address = ar->hw.app_load_addr;
1252
1253         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1254                    address, ar->fw_len);
1255
1256         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1257
1258         if (ret) {
1259                 ath6kl_err("Failed to write firmware: %d\n", ret);
1260                 return ret;
1261         }
1262
1263         /*
1264          * Set starting address for firmware
1265          * Don't need to setup app_start override addr on AR6004
1266          */
1267         if (ar->target_type != TARGET_TYPE_AR6004) {
1268                 address = ar->hw.app_start_override_addr;
1269                 ath6kl_bmi_set_app_start(ar, address);
1270         }
1271         return ret;
1272 }
1273
1274 static int ath6kl_upload_patch(struct ath6kl *ar)
1275 {
1276         u32 address, param;
1277         int ret;
1278
1279         if (ar->fw_patch == NULL)
1280                 return 0;
1281
1282         address = ar->hw.dataset_patch_addr;
1283
1284         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1285                    address, ar->fw_patch_len);
1286
1287         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1288         if (ret) {
1289                 ath6kl_err("Failed to write patch file: %d\n", ret);
1290                 return ret;
1291         }
1292
1293         param = address;
1294         ath6kl_bmi_write(ar,
1295                          ath6kl_get_hi_item_addr(ar,
1296                          HI_ITEM(hi_dset_list_head)),
1297                          (unsigned char *) &param, 4);
1298
1299         return 0;
1300 }
1301
1302 static int ath6kl_upload_testscript(struct ath6kl *ar)
1303 {
1304         u32 address, param;
1305         int ret;
1306
1307         if (ar->testmode != 2)
1308                 return 0;
1309
1310         if (ar->fw_testscript == NULL)
1311                 return 0;
1312
1313         address = ar->hw.testscript_addr;
1314
1315         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1316                    address, ar->fw_testscript_len);
1317
1318         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1319                 ar->fw_testscript_len);
1320         if (ret) {
1321                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1322                 return ret;
1323         }
1324
1325         param = address;
1326         ath6kl_bmi_write(ar,
1327                         ath6kl_get_hi_item_addr(ar,
1328                         HI_ITEM(hi_ota_testscript)),
1329                         (unsigned char *) &param, 4);
1330
1331         param = 4096;
1332         ath6kl_bmi_write(ar,
1333                         ath6kl_get_hi_item_addr(ar,
1334                         HI_ITEM(hi_end_ram_reserve_sz)),
1335                         (unsigned char *) &param, 4);
1336
1337         param = 1;
1338         ath6kl_bmi_write(ar,
1339                         ath6kl_get_hi_item_addr(ar,
1340                         HI_ITEM(hi_test_apps_related)),
1341                         (unsigned char *) &param, 4);
1342
1343         return 0;
1344 }
1345
1346 static int ath6kl_init_upload(struct ath6kl *ar)
1347 {
1348         u32 param, options, sleep, address;
1349         int status = 0;
1350
1351         if (ar->target_type != TARGET_TYPE_AR6003 &&
1352             ar->target_type != TARGET_TYPE_AR6004)
1353                 return -EINVAL;
1354
1355         /* temporarily disable system sleep */
1356         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1357         status = ath6kl_bmi_reg_read(ar, address, &param);
1358         if (status)
1359                 return status;
1360
1361         options = param;
1362
1363         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1364         status = ath6kl_bmi_reg_write(ar, address, param);
1365         if (status)
1366                 return status;
1367
1368         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1369         status = ath6kl_bmi_reg_read(ar, address, &param);
1370         if (status)
1371                 return status;
1372
1373         sleep = param;
1374
1375         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1376         status = ath6kl_bmi_reg_write(ar, address, param);
1377         if (status)
1378                 return status;
1379
1380         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1381                    options, sleep);
1382
1383         /* program analog PLL register */
1384         /* no need to control 40/44MHz clock on AR6004 */
1385         if (ar->target_type != TARGET_TYPE_AR6004) {
1386                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1387                                               0xF9104001);
1388
1389                 if (status)
1390                         return status;
1391
1392                 /* Run at 80/88MHz by default */
1393                 param = SM(CPU_CLOCK_STANDARD, 1);
1394
1395                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1396                 status = ath6kl_bmi_reg_write(ar, address, param);
1397                 if (status)
1398                         return status;
1399         }
1400
1401         param = 0;
1402         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1403         param = SM(LPO_CAL_ENABLE, 1);
1404         status = ath6kl_bmi_reg_write(ar, address, param);
1405         if (status)
1406                 return status;
1407
1408         /* WAR to avoid SDIO CRC err */
1409         if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1410             ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
1411                 ath6kl_err("temporary war to avoid sdio crc error\n");
1412
1413                 param = 0x20;
1414
1415                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1416                 status = ath6kl_bmi_reg_write(ar, address, param);
1417                 if (status)
1418                         return status;
1419
1420                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1421                 status = ath6kl_bmi_reg_write(ar, address, param);
1422                 if (status)
1423                         return status;
1424
1425                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1426                 status = ath6kl_bmi_reg_write(ar, address, param);
1427                 if (status)
1428                         return status;
1429
1430                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1431                 status = ath6kl_bmi_reg_write(ar, address, param);
1432                 if (status)
1433                         return status;
1434         }
1435
1436         /* write EEPROM data to Target RAM */
1437         status = ath6kl_upload_board_file(ar);
1438         if (status)
1439                 return status;
1440
1441         /* transfer One time Programmable data */
1442         status = ath6kl_upload_otp(ar);
1443         if (status)
1444                 return status;
1445
1446         /* Download Target firmware */
1447         status = ath6kl_upload_firmware(ar);
1448         if (status)
1449                 return status;
1450
1451         status = ath6kl_upload_patch(ar);
1452         if (status)
1453                 return status;
1454
1455         /* Download the test script */
1456         status = ath6kl_upload_testscript(ar);
1457         if (status)
1458                 return status;
1459
1460         /* Restore system sleep */
1461         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1462         status = ath6kl_bmi_reg_write(ar, address, sleep);
1463         if (status)
1464                 return status;
1465
1466         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1467         param = options | 0x20;
1468         status = ath6kl_bmi_reg_write(ar, address, param);
1469         if (status)
1470                 return status;
1471
1472         return status;
1473 }
1474
1475 int ath6kl_init_hw_params(struct ath6kl *ar)
1476 {
1477         const struct ath6kl_hw *uninitialized_var(hw);
1478         int i;
1479
1480         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1481                 hw = &hw_list[i];
1482
1483                 if (hw->id == ar->version.target_ver)
1484                         break;
1485         }
1486
1487         if (i == ARRAY_SIZE(hw_list)) {
1488                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1489                            ar->version.target_ver);
1490                 return -EINVAL;
1491         }
1492
1493         ar->hw = *hw;
1494
1495         ath6kl_dbg(ATH6KL_DBG_BOOT,
1496                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1497                    ar->version.target_ver, ar->target_type,
1498                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1499         ath6kl_dbg(ATH6KL_DBG_BOOT,
1500                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1501                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1502                    ar->hw.reserved_ram_size);
1503         ath6kl_dbg(ATH6KL_DBG_BOOT,
1504                    "refclk_hz %d uarttx_pin %d",
1505                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1506
1507         return 0;
1508 }
1509
1510 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1511 {
1512         switch (type) {
1513         case ATH6KL_HIF_TYPE_SDIO:
1514                 return "sdio";
1515         case ATH6KL_HIF_TYPE_USB:
1516                 return "usb";
1517         }
1518
1519         return NULL;
1520 }
1521
1522 int ath6kl_init_hw_start(struct ath6kl *ar)
1523 {
1524         long timeleft;
1525         int ret, i;
1526
1527         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1528
1529         ret = ath6kl_hif_power_on(ar);
1530         if (ret)
1531                 return ret;
1532
1533         ret = ath6kl_configure_target(ar);
1534         if (ret)
1535                 goto err_power_off;
1536
1537         ret = ath6kl_init_upload(ar);
1538         if (ret)
1539                 goto err_power_off;
1540
1541         /* Do we need to finish the BMI phase */
1542         /* FIXME: return error from ath6kl_bmi_done() */
1543         if (ath6kl_bmi_done(ar)) {
1544                 ret = -EIO;
1545                 goto err_power_off;
1546         }
1547
1548         /*
1549          * The reason we have to wait for the target here is that the
1550          * driver layer has to init BMI in order to set the host block
1551          * size.
1552          */
1553         if (ath6kl_htc_wait_target(ar->htc_target)) {
1554                 ret = -EIO;
1555                 goto err_power_off;
1556         }
1557
1558         if (ath6kl_init_service_ep(ar)) {
1559                 ret = -EIO;
1560                 goto err_cleanup_scatter;
1561         }
1562
1563         /* setup credit distribution */
1564         ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1565
1566         /* start HTC */
1567         ret = ath6kl_htc_start(ar->htc_target);
1568         if (ret) {
1569                 /* FIXME: call this */
1570                 ath6kl_cookie_cleanup(ar);
1571                 goto err_cleanup_scatter;
1572         }
1573
1574         /* Wait for Wmi event to be ready */
1575         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1576                                                     test_bit(WMI_READY,
1577                                                              &ar->flag),
1578                                                     WMI_TIMEOUT);
1579
1580         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1581
1582
1583         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1584                 ath6kl_info("%s %s fw %s api %d%s\n",
1585                             ar->hw.name,
1586                             ath6kl_init_get_hif_name(ar->hif_type),
1587                             ar->wiphy->fw_version,
1588                             ar->fw_api,
1589                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1590         }
1591
1592         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1593                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1594                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1595                 ret = -EIO;
1596                 goto err_htc_stop;
1597         }
1598
1599         if (!timeleft || signal_pending(current)) {
1600                 ath6kl_err("wmi is not ready or wait was interrupted\n");
1601                 ret = -EIO;
1602                 goto err_htc_stop;
1603         }
1604
1605         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1606
1607         /* communicate the wmi protocol verision to the target */
1608         /* FIXME: return error */
1609         if ((ath6kl_set_host_app_area(ar)) != 0)
1610                 ath6kl_err("unable to set the host app area\n");
1611
1612         for (i = 0; i < ar->vif_max; i++) {
1613                 ret = ath6kl_target_config_wlan_params(ar, i);
1614                 if (ret)
1615                         goto err_htc_stop;
1616         }
1617
1618         ar->state = ATH6KL_STATE_ON;
1619
1620         return 0;
1621
1622 err_htc_stop:
1623         ath6kl_htc_stop(ar->htc_target);
1624 err_cleanup_scatter:
1625         ath6kl_hif_cleanup_scatter(ar);
1626 err_power_off:
1627         ath6kl_hif_power_off(ar);
1628
1629         return ret;
1630 }
1631
1632 int ath6kl_init_hw_stop(struct ath6kl *ar)
1633 {
1634         int ret;
1635
1636         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1637
1638         ath6kl_htc_stop(ar->htc_target);
1639
1640         ath6kl_hif_stop(ar);
1641
1642         ath6kl_bmi_reset(ar);
1643
1644         ret = ath6kl_hif_power_off(ar);
1645         if (ret)
1646                 ath6kl_warn("failed to power off hif: %d\n", ret);
1647
1648         ar->state = ATH6KL_STATE_OFF;
1649
1650         return 0;
1651 }
1652
1653 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
1654 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
1655 {
1656         static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1657         bool discon_issued;
1658
1659         netif_stop_queue(vif->ndev);
1660
1661         clear_bit(WLAN_ENABLED, &vif->flags);
1662
1663         if (wmi_ready) {
1664                 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1665                                 test_bit(CONNECT_PEND, &vif->flags);
1666                 ath6kl_disconnect(vif);
1667                 del_timer(&vif->disconnect_timer);
1668
1669                 if (discon_issued)
1670                         ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1671                                                 (vif->nw_type & AP_NETWORK) ?
1672                                                 bcast_mac : vif->bssid,
1673                                                 0, NULL, 0);
1674         }
1675
1676         if (vif->scan_req) {
1677                 cfg80211_scan_done(vif->scan_req, true);
1678                 vif->scan_req = NULL;
1679         }
1680 }
1681
1682 void ath6kl_stop_txrx(struct ath6kl *ar)
1683 {
1684         struct ath6kl_vif *vif, *tmp_vif;
1685         int i;
1686
1687         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1688
1689         if (down_interruptible(&ar->sem)) {
1690                 ath6kl_err("down_interruptible failed\n");
1691                 return;
1692         }
1693
1694         for (i = 0; i < AP_MAX_NUM_STA; i++)
1695                 aggr_reset_state(ar->sta_list[i].aggr_conn);
1696
1697         spin_lock_bh(&ar->list_lock);
1698         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1699                 list_del(&vif->list);
1700                 spin_unlock_bh(&ar->list_lock);
1701                 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1702                 rtnl_lock();
1703                 ath6kl_cfg80211_vif_cleanup(vif);
1704                 rtnl_unlock();
1705                 spin_lock_bh(&ar->list_lock);
1706         }
1707         spin_unlock_bh(&ar->list_lock);
1708
1709         clear_bit(WMI_READY, &ar->flag);
1710
1711         /*
1712          * After wmi_shudown all WMI events will be dropped. We
1713          * need to cleanup the buffers allocated in AP mode and
1714          * give disconnect notification to stack, which usually
1715          * happens in the disconnect_event. Simulate the disconnect
1716          * event by calling the function directly. Sometimes
1717          * disconnect_event will be received when the debug logs
1718          * are collected.
1719          */
1720         ath6kl_wmi_shutdown(ar->wmi);
1721
1722         clear_bit(WMI_ENABLED, &ar->flag);
1723         if (ar->htc_target) {
1724                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1725                 ath6kl_htc_stop(ar->htc_target);
1726         }
1727
1728         /*
1729          * Try to reset the device if we can. The driver may have been
1730          * configure NOT to reset the target during a debug session.
1731          */
1732         ath6kl_dbg(ATH6KL_DBG_TRC,
1733                    "attempting to reset target on instance destroy\n");
1734         ath6kl_reset_device(ar, ar->target_type, true, true);
1735
1736         clear_bit(WLAN_ENABLED, &ar->flag);
1737
1738         up(&ar->sem);
1739 }
1740 EXPORT_SYMBOL(ath6kl_stop_txrx);