3 * Copyright (c) 2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
35 static const struct ath6kl_hw hw_list[] = {
37 .id = AR6003_HW_2_0_VERSION,
38 .name = "ar6003 hw 2.0",
39 .dataset_patch_addr = 0x57e884,
40 .app_load_addr = 0x543180,
41 .board_ext_data_addr = 0x57e500,
42 .reserved_ram_size = 6912,
43 .refclk_hz = 26000000,
45 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
47 /* hw2.0 needs override address hardcoded */
48 .app_start_override_addr = 0x944C00,
51 .dir = AR6003_HW_2_0_FW_DIR,
52 .otp = AR6003_HW_2_0_OTP_FILE,
53 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
54 .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55 .patch = AR6003_HW_2_0_PATCH_FILE,
58 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
59 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
62 .id = AR6003_HW_2_1_1_VERSION,
63 .name = "ar6003 hw 2.1.1",
64 .dataset_patch_addr = 0x57ff74,
65 .app_load_addr = 0x1234,
66 .board_ext_data_addr = 0x542330,
67 .reserved_ram_size = 512,
68 .refclk_hz = 26000000,
70 .testscript_addr = 0x57ef74,
71 .flags = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
74 .dir = AR6003_HW_2_1_1_FW_DIR,
75 .otp = AR6003_HW_2_1_1_OTP_FILE,
76 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
77 .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78 .patch = AR6003_HW_2_1_1_PATCH_FILE,
79 .utf = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80 .testscript = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
83 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
87 .id = AR6004_HW_1_0_VERSION,
88 .name = "ar6004 hw 1.0",
89 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 19456,
93 .board_addr = 0x433900,
94 .refclk_hz = 26000000,
99 .dir = AR6004_HW_1_0_FW_DIR,
100 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
103 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
104 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
107 .id = AR6004_HW_1_1_VERSION,
108 .name = "ar6004 hw 1.1",
109 .dataset_patch_addr = 0x57e884,
110 .app_load_addr = 0x1234,
111 .board_ext_data_addr = 0x437000,
112 .reserved_ram_size = 11264,
113 .board_addr = 0x43d400,
114 .refclk_hz = 40000000,
118 .dir = AR6004_HW_1_1_FW_DIR,
119 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
122 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
123 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
126 .id = AR6004_HW_1_2_VERSION,
127 .name = "ar6004 hw 1.2",
128 .dataset_patch_addr = 0x436ecc,
129 .app_load_addr = 0x1234,
130 .board_ext_data_addr = 0x437000,
131 .reserved_ram_size = 9216,
132 .board_addr = 0x435c00,
133 .refclk_hz = 40000000,
138 .dir = AR6004_HW_1_2_FW_DIR,
139 .fw = AR6004_HW_1_2_FIRMWARE_FILE,
141 .fw_board = AR6004_HW_1_2_BOARD_DATA_FILE,
142 .fw_default_board = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
145 .id = AR6004_HW_1_3_VERSION,
146 .name = "ar6004 hw 1.3",
147 .dataset_patch_addr = 0x437860,
148 .app_load_addr = 0x1234,
149 .board_ext_data_addr = 0x437000,
150 .reserved_ram_size = 7168,
151 .board_addr = 0x436400,
152 .refclk_hz = 40000000,
157 .dir = AR6004_HW_1_3_FW_DIR,
158 .fw = AR6004_HW_1_3_FIRMWARE_FILE,
161 .fw_board = AR6004_HW_1_3_BOARD_DATA_FILE,
162 .fw_default_board = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
167 * Include definitions here that can be used to tune the WLAN module
168 * behavior. Different customers can tune the behavior as per their needs,
173 * This configuration item enable/disable keepalive support.
174 * Keepalive support: In the absence of any data traffic to AP, null
175 * frames will be sent to the AP at periodic interval, to keep the association
176 * active. This configuration item defines the periodic interval.
177 * Use value of zero to disable keepalive support
178 * Default: 60 seconds
180 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
183 * This configuration item sets the value of disconnect timeout
184 * Firmware delays sending the disconnec event to the host for this
185 * timeout after is gets disconnected from the current AP.
186 * If the firmware successly roams within the disconnect timeout
187 * it sends a new connect event
189 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
192 #define ATH6KL_DATA_OFFSET 64
193 struct sk_buff *ath6kl_buf_alloc(int size)
198 /* Add chacheline space at front and back of buffer */
199 reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
200 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
201 skb = dev_alloc_skb(size + reserved);
204 skb_reserve(skb, reserved - L1_CACHE_BYTES);
208 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
211 memset(vif->ssid, 0, sizeof(vif->ssid));
213 vif->dot11_auth_mode = OPEN_AUTH;
214 vif->auth_mode = NONE_AUTH;
215 vif->prwise_crypto = NONE_CRYPT;
216 vif->prwise_crypto_len = 0;
217 vif->grp_crypto = NONE_CRYPT;
218 vif->grp_crypto_len = 0;
219 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
220 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
221 memset(vif->bssid, 0, sizeof(vif->bssid));
225 static int ath6kl_set_host_app_area(struct ath6kl *ar)
228 struct host_app_area host_app_area;
230 /* Fetch the address of the host_app_area_s
231 * instance in the host interest area */
232 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
233 address = TARG_VTOP(ar->target_type, address);
235 if (ath6kl_diag_read32(ar, address, &data))
238 address = TARG_VTOP(ar->target_type, data);
239 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
240 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
241 sizeof(struct host_app_area)))
247 static inline void set_ac2_ep_map(struct ath6kl *ar,
249 enum htc_endpoint_id ep)
251 ar->ac2ep_map[ac] = ep;
252 ar->ep2ac_map[ep] = ac;
255 /* connect to a service */
256 static int ath6kl_connectservice(struct ath6kl *ar,
257 struct htc_service_connect_req *con_req,
261 struct htc_service_connect_resp response;
263 memset(&response, 0, sizeof(response));
265 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
267 ath6kl_err("failed to connect to %s service status:%d\n",
272 switch (con_req->svc_id) {
273 case WMI_CONTROL_SVC:
274 if (test_bit(WMI_ENABLED, &ar->flag))
275 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
276 ar->ctrl_ep = response.endpoint;
278 case WMI_DATA_BE_SVC:
279 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
281 case WMI_DATA_BK_SVC:
282 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
284 case WMI_DATA_VI_SVC:
285 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
287 case WMI_DATA_VO_SVC:
288 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
291 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
298 static int ath6kl_init_service_ep(struct ath6kl *ar)
300 struct htc_service_connect_req connect;
302 memset(&connect, 0, sizeof(connect));
304 /* these fields are the same for all service endpoints */
305 connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
306 connect.ep_cb.rx = ath6kl_rx;
307 connect.ep_cb.rx_refill = ath6kl_rx_refill;
308 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
311 * Set the max queue depth so that our ath6kl_tx_queue_full handler
314 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
315 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
316 if (!connect.ep_cb.rx_refill_thresh)
317 connect.ep_cb.rx_refill_thresh++;
319 /* connect to control service */
320 connect.svc_id = WMI_CONTROL_SVC;
321 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
324 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
327 * Limit the HTC message size on the send path, although e can
328 * receive A-MSDU frames of 4K, we will only send ethernet-sized
329 * (802.3) frames on the send path.
331 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
334 * To reduce the amount of committed memory for larger A_MSDU
335 * frames, use the recv-alloc threshold mechanism for larger
338 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
339 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
342 * For the remaining data services set the connection flag to
343 * reduce dribbling, if configured to do so.
345 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
346 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
347 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
349 connect.svc_id = WMI_DATA_BE_SVC;
351 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
354 /* connect to back-ground map this to WMI LOW_PRI */
355 connect.svc_id = WMI_DATA_BK_SVC;
356 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
359 /* connect to Video service, map this to HI PRI */
360 connect.svc_id = WMI_DATA_VI_SVC;
361 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
365 * Connect to VO service, this is currently not mapped to a WMI
366 * priority stream due to historical reasons. WMI originally
367 * defined 3 priorities over 3 mailboxes We can change this when
368 * WMI is reworked so that priorities are not dependent on
371 connect.svc_id = WMI_DATA_VO_SVC;
372 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
378 void ath6kl_init_control_info(struct ath6kl_vif *vif)
380 ath6kl_init_profile_info(vif);
381 vif->def_txkey_index = 0;
382 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
387 * Set HTC/Mbox operational parameters, this can only be called when the
388 * target is in the BMI phase.
390 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
396 blk_size = ar->mbox_info.block_size;
399 blk_size |= ((u32)htc_ctrl_buf) << 16;
401 /* set the host interest area for the block size */
402 status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
404 ath6kl_err("bmi_write_memory for IO block size failed\n");
408 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
410 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
412 if (mbox_isr_yield_val) {
413 /* set the host interest area for the mbox ISR yield limit */
414 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
417 ath6kl_err("bmi_write_memory for yield limit failed\n");
426 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
431 * Configure the device for rx dot11 header rules. "0,0" are the
432 * default values. Required if checksum offload is needed. Set
433 * RxMetaVersion to 2.
435 ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
436 ar->rx_meta_ver, 0, 0);
438 ath6kl_err("unable to set the rx frame format: %d\n", ret);
442 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
443 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
444 IGNORE_PS_FAIL_DURING_SCAN);
446 ath6kl_err("unable to set power save fail event policy: %d\n",
452 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
453 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
454 WMI_FOLLOW_BARKER_IN_ERP);
456 ath6kl_err("unable to set barker preamble policy: %d\n",
462 ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
463 WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
465 ath6kl_err("unable to set keep alive interval: %d\n", ret);
469 ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
470 WLAN_CONFIG_DISCONNECT_TIMEOUT);
472 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
476 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
477 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
479 ath6kl_err("unable to set txop bursting: %d\n", ret);
484 if (ar->p2p && (ar->vif_max == 1 || idx)) {
485 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
486 P2P_FLAG_CAPABILITIES_REQ |
487 P2P_FLAG_MACADDR_REQ |
488 P2P_FLAG_HMODEL_REQ);
490 ath6kl_dbg(ATH6KL_DBG_TRC,
491 "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
497 if (ar->p2p && (ar->vif_max == 1 || idx)) {
498 /* Enable Probe Request reporting for P2P */
499 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
501 ath6kl_dbg(ATH6KL_DBG_TRC,
502 "failed to enable Probe Request reporting (%d)\n",
510 int ath6kl_configure_target(struct ath6kl *ar)
512 u32 param, ram_reserved_size;
513 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
516 param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
517 if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
518 ath6kl_err("bmi_write_memory for uart debug failed\n");
523 * Note: Even though the firmware interface type is
524 * chosen as BSS_STA for all three interfaces, can
525 * be configured to IBSS/AP as long as the fw submode
526 * remains normal mode (0 - AP, STA and IBSS). But
527 * due to an target assert in firmware only one interface is
528 * configured for now.
530 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
532 for (i = 0; i < ar->vif_max; i++)
533 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
536 * Submodes when fw does not support dynamic interface
538 * vif[0] - AP/STA/IBSS
539 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
540 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
541 * Otherwise, All the interface are initialized to p2p dev.
544 if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
545 ar->fw_capabilities)) {
546 for (i = 0; i < ar->vif_max; i++)
547 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
548 (i * HI_OPTION_FW_SUBMODE_BITS);
550 for (i = 0; i < ar->max_norm_iface; i++)
551 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
552 (i * HI_OPTION_FW_SUBMODE_BITS);
554 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
555 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
556 (i * HI_OPTION_FW_SUBMODE_BITS);
558 if (ar->p2p && ar->vif_max == 1)
559 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
562 if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
563 HTC_PROTOCOL_VERSION) != 0) {
564 ath6kl_err("bmi_write_memory for htc version failed\n");
568 /* set the firmware mode to STA/IBSS/AP */
571 if (ath6kl_bmi_read_hi32(ar, hi_option_flag, ¶m) != 0) {
572 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
576 param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
577 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
578 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
580 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
581 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
583 if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
584 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
588 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
591 * Hardcode the address use for the extended board data
592 * Ideally this should be pre-allocate by the OS at boot time
593 * But since it is a new feature and board data is loaded
594 * at init time, we have to workaround this from host.
595 * It is difficult to patch the firmware boot code,
596 * but possible in theory.
599 if (ar->target_type == TARGET_TYPE_AR6003) {
600 param = ar->hw.board_ext_data_addr;
601 ram_reserved_size = ar->hw.reserved_ram_size;
603 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
604 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
608 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
609 ram_reserved_size) != 0) {
610 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
615 /* set the block size for the target */
616 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
617 /* use default number of control buffers */
620 /* Configure GPIO AR600x UART */
621 status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
626 /* Configure target refclk_hz */
627 if (ar->hw.refclk_hz != 0) {
628 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,
637 /* firmware upload */
638 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
639 u8 **fw, size_t *fw_len)
641 const struct firmware *fw_entry;
644 ret = request_firmware(&fw_entry, filename, ar->dev);
648 *fw_len = fw_entry->size;
649 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
654 release_firmware(fw_entry);
661 * Check the device tree for a board-id and use it to construct
662 * the pathname to the firmware file. Used (for now) to find a
663 * fallback to the "bdata.bin" file--typically a symlink to the
664 * appropriate board-specific file.
666 static bool check_device_tree(struct ath6kl *ar)
668 static const char *board_id_prop = "atheros,board-id";
669 struct device_node *node;
670 char board_filename[64];
671 const char *board_id;
674 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
675 board_id = of_get_property(node, board_id_prop, NULL);
676 if (board_id == NULL) {
677 ath6kl_warn("No \"%s\" property on %s node.\n",
678 board_id_prop, node->name);
681 snprintf(board_filename, sizeof(board_filename),
682 "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
684 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
687 ath6kl_err("Failed to get DT board file %s: %d\n",
688 board_filename, ret);
696 static bool check_device_tree(struct ath6kl *ar)
700 #endif /* CONFIG_OF */
702 static int ath6kl_fetch_board_file(struct ath6kl *ar)
704 const char *filename;
707 if (ar->fw_board != NULL)
710 if (WARN_ON(ar->hw.fw_board == NULL))
713 filename = ar->hw.fw_board;
715 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
718 /* managed to get proper board file */
722 if (check_device_tree(ar)) {
723 /* got board file from device tree */
727 /* there was no proper board file, try to use default instead */
728 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
731 filename = ar->hw.fw_default_board;
733 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
736 ath6kl_err("Failed to get default board file %s: %d\n",
741 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
742 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
747 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
752 if (ar->fw_otp != NULL)
755 if (ar->hw.fw.otp == NULL) {
756 ath6kl_dbg(ATH6KL_DBG_BOOT,
757 "no OTP file configured for this hw\n");
761 snprintf(filename, sizeof(filename), "%s/%s",
762 ar->hw.fw.dir, ar->hw.fw.otp);
764 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
767 ath6kl_err("Failed to get OTP file %s: %d\n",
775 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
780 if (ar->testmode == 0)
783 ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
785 if (ar->testmode == 2) {
786 if (ar->hw.fw.utf == NULL) {
787 ath6kl_warn("testmode 2 not supported\n");
791 snprintf(filename, sizeof(filename), "%s/%s",
792 ar->hw.fw.dir, ar->hw.fw.utf);
794 if (ar->hw.fw.tcmd == NULL) {
795 ath6kl_warn("testmode 1 not supported\n");
799 snprintf(filename, sizeof(filename), "%s/%s",
800 ar->hw.fw.dir, ar->hw.fw.tcmd);
803 set_bit(TESTMODE, &ar->flag);
805 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
807 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
808 ar->testmode, filename, ret);
815 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
823 /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
824 if (WARN_ON(ar->hw.fw.fw == NULL))
827 snprintf(filename, sizeof(filename), "%s/%s",
828 ar->hw.fw.dir, ar->hw.fw.fw);
830 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
832 ath6kl_err("Failed to get firmware file %s: %d\n",
840 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
845 if (ar->fw_patch != NULL)
848 if (ar->hw.fw.patch == NULL)
851 snprintf(filename, sizeof(filename), "%s/%s",
852 ar->hw.fw.dir, ar->hw.fw.patch);
854 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
857 ath6kl_err("Failed to get patch file %s: %d\n",
865 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
870 if (ar->testmode != 2)
873 if (ar->fw_testscript != NULL)
876 if (ar->hw.fw.testscript == NULL)
879 snprintf(filename, sizeof(filename), "%s/%s",
880 ar->hw.fw.dir, ar->hw.fw.testscript);
882 ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
883 &ar->fw_testscript_len);
885 ath6kl_err("Failed to get testscript file %s: %d\n",
893 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
897 ret = ath6kl_fetch_otp_file(ar);
901 ret = ath6kl_fetch_fw_file(ar);
905 ret = ath6kl_fetch_patch_file(ar);
909 ret = ath6kl_fetch_testscript_file(ar);
916 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
918 size_t magic_len, len, ie_len;
919 const struct firmware *fw;
920 struct ath6kl_fw_ie *hdr;
923 int ret, ie_id, i, index, bit;
926 snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
928 ret = request_firmware(&fw, filename, ar->dev);
935 /* magic also includes the null byte, check that as well */
936 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
938 if (len < magic_len) {
943 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
952 while (len > sizeof(struct ath6kl_fw_ie)) {
953 /* hdr is unaligned! */
954 hdr = (struct ath6kl_fw_ie *) data;
956 ie_id = le32_to_cpup(&hdr->id);
957 ie_len = le32_to_cpup(&hdr->len);
960 data += sizeof(*hdr);
968 case ATH6KL_FW_IE_FW_VERSION:
969 strlcpy(ar->wiphy->fw_version, data,
970 sizeof(ar->wiphy->fw_version));
972 ath6kl_dbg(ATH6KL_DBG_BOOT,
973 "found fw version %s\n",
974 ar->wiphy->fw_version);
976 case ATH6KL_FW_IE_OTP_IMAGE:
977 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
980 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
982 if (ar->fw_otp == NULL) {
987 ar->fw_otp_len = ie_len;
989 case ATH6KL_FW_IE_FW_IMAGE:
990 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
993 /* in testmode we already might have a fw file */
997 ar->fw = vmalloc(ie_len);
999 if (ar->fw == NULL) {
1004 memcpy(ar->fw, data, ie_len);
1005 ar->fw_len = ie_len;
1007 case ATH6KL_FW_IE_PATCH_IMAGE:
1008 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1011 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1013 if (ar->fw_patch == NULL) {
1018 ar->fw_patch_len = ie_len;
1020 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1021 val = (__le32 *) data;
1022 ar->hw.reserved_ram_size = le32_to_cpup(val);
1024 ath6kl_dbg(ATH6KL_DBG_BOOT,
1025 "found reserved ram size ie 0x%d\n",
1026 ar->hw.reserved_ram_size);
1028 case ATH6KL_FW_IE_CAPABILITIES:
1029 ath6kl_dbg(ATH6KL_DBG_BOOT,
1030 "found firmware capabilities ie (%zd B)\n",
1033 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1037 if (index == ie_len)
1040 if (data[index] & (1 << bit))
1041 __set_bit(i, ar->fw_capabilities);
1044 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1045 ar->fw_capabilities,
1046 sizeof(ar->fw_capabilities));
1048 case ATH6KL_FW_IE_PATCH_ADDR:
1049 if (ie_len != sizeof(*val))
1052 val = (__le32 *) data;
1053 ar->hw.dataset_patch_addr = le32_to_cpup(val);
1055 ath6kl_dbg(ATH6KL_DBG_BOOT,
1056 "found patch address ie 0x%x\n",
1057 ar->hw.dataset_patch_addr);
1059 case ATH6KL_FW_IE_BOARD_ADDR:
1060 if (ie_len != sizeof(*val))
1063 val = (__le32 *) data;
1064 ar->hw.board_addr = le32_to_cpup(val);
1066 ath6kl_dbg(ATH6KL_DBG_BOOT,
1067 "found board address ie 0x%x\n",
1070 case ATH6KL_FW_IE_VIF_MAX:
1071 if (ie_len != sizeof(*val))
1074 val = (__le32 *) data;
1075 ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1078 if (ar->vif_max > 1 && !ar->p2p)
1079 ar->max_norm_iface = 2;
1081 ath6kl_dbg(ATH6KL_DBG_BOOT,
1082 "found vif max ie %d\n", ar->vif_max);
1085 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1086 le32_to_cpup(&hdr->id));
1096 release_firmware(fw);
1101 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1105 ret = ath6kl_fetch_board_file(ar);
1109 ret = ath6kl_fetch_testmode_file(ar);
1113 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1119 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1125 ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1131 ret = ath6kl_fetch_fw_api1(ar);
1138 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1143 static int ath6kl_upload_board_file(struct ath6kl *ar)
1145 u32 board_address, board_ext_address, param;
1146 u32 board_data_size, board_ext_data_size;
1149 if (WARN_ON(ar->fw_board == NULL))
1153 * Determine where in Target RAM to write Board Data.
1154 * For AR6004, host determine Target RAM address for
1155 * writing board data.
1157 if (ar->hw.board_addr != 0) {
1158 board_address = ar->hw.board_addr;
1159 ath6kl_bmi_write_hi32(ar, hi_board_data,
1162 ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1164 ath6kl_err("Failed to get board file target address.\n");
1169 /* determine where in target ram to write extended board data */
1170 ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1172 ath6kl_err("Failed to get extended board file target address.\n");
1176 if (ar->target_type == TARGET_TYPE_AR6003 &&
1177 board_ext_address == 0) {
1178 ath6kl_err("Failed to get board file target address.\n");
1182 switch (ar->target_type) {
1183 case TARGET_TYPE_AR6003:
1184 board_data_size = AR6003_BOARD_DATA_SZ;
1185 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1186 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1187 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1189 case TARGET_TYPE_AR6004:
1190 board_data_size = AR6004_BOARD_DATA_SZ;
1191 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1199 if (board_ext_address &&
1200 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1201 /* write extended board data */
1202 ath6kl_dbg(ATH6KL_DBG_BOOT,
1203 "writing extended board data to 0x%x (%d B)\n",
1204 board_ext_address, board_ext_data_size);
1206 ret = ath6kl_bmi_write(ar, board_ext_address,
1207 ar->fw_board + board_data_size,
1208 board_ext_data_size);
1210 ath6kl_err("Failed to write extended board data: %d\n",
1215 /* record that extended board data is initialized */
1216 param = (board_ext_data_size << 16) | 1;
1218 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1221 if (ar->fw_board_len < board_data_size) {
1222 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1227 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1228 board_address, board_data_size);
1230 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1234 ath6kl_err("Board file bmi write failed: %d\n", ret);
1238 /* record the fact that Board Data IS initialized */
1239 ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1244 static int ath6kl_upload_otp(struct ath6kl *ar)
1247 bool from_hw = false;
1250 if (ar->fw_otp == NULL)
1253 address = ar->hw.app_load_addr;
1255 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1258 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1261 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1265 /* read firmware start address */
1266 ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1269 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1273 if (ar->hw.app_start_override_addr == 0) {
1274 ar->hw.app_start_override_addr = address;
1278 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1279 from_hw ? " (from hw)" : "",
1280 ar->hw.app_start_override_addr);
1282 /* execute the OTP code */
1283 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1284 ar->hw.app_start_override_addr);
1286 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m);
1291 static int ath6kl_upload_firmware(struct ath6kl *ar)
1296 if (WARN_ON(ar->fw == NULL))
1299 address = ar->hw.app_load_addr;
1301 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1302 address, ar->fw_len);
1304 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1307 ath6kl_err("Failed to write firmware: %d\n", ret);
1312 * Set starting address for firmware
1313 * Don't need to setup app_start override addr on AR6004
1315 if (ar->target_type != TARGET_TYPE_AR6004) {
1316 address = ar->hw.app_start_override_addr;
1317 ath6kl_bmi_set_app_start(ar, address);
1322 static int ath6kl_upload_patch(struct ath6kl *ar)
1327 if (ar->fw_patch == NULL)
1330 address = ar->hw.dataset_patch_addr;
1332 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1333 address, ar->fw_patch_len);
1335 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1337 ath6kl_err("Failed to write patch file: %d\n", ret);
1341 ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1346 static int ath6kl_upload_testscript(struct ath6kl *ar)
1351 if (ar->testmode != 2)
1354 if (ar->fw_testscript == NULL)
1357 address = ar->hw.testscript_addr;
1359 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1360 address, ar->fw_testscript_len);
1362 ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1363 ar->fw_testscript_len);
1365 ath6kl_err("Failed to write testscript file: %d\n", ret);
1369 ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1370 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1371 ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1376 static int ath6kl_init_upload(struct ath6kl *ar)
1378 u32 param, options, sleep, address;
1381 if (ar->target_type != TARGET_TYPE_AR6003 &&
1382 ar->target_type != TARGET_TYPE_AR6004)
1385 /* temporarily disable system sleep */
1386 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1387 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1393 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1394 status = ath6kl_bmi_reg_write(ar, address, param);
1398 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1399 status = ath6kl_bmi_reg_read(ar, address, ¶m);
1405 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1406 status = ath6kl_bmi_reg_write(ar, address, param);
1410 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1413 /* program analog PLL register */
1414 /* no need to control 40/44MHz clock on AR6004 */
1415 if (ar->target_type != TARGET_TYPE_AR6004) {
1416 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1422 /* Run at 80/88MHz by default */
1423 param = SM(CPU_CLOCK_STANDARD, 1);
1425 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1426 status = ath6kl_bmi_reg_write(ar, address, param);
1432 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1433 param = SM(LPO_CAL_ENABLE, 1);
1434 status = ath6kl_bmi_reg_write(ar, address, param);
1438 /* WAR to avoid SDIO CRC err */
1439 if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1440 ath6kl_err("temporary war to avoid sdio crc error\n");
1443 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1444 status = ath6kl_bmi_reg_write(ar, address, param);
1450 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1451 status = ath6kl_bmi_reg_write(ar, address, param);
1455 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1456 status = ath6kl_bmi_reg_write(ar, address, param);
1460 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1461 status = ath6kl_bmi_reg_write(ar, address, param);
1465 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1466 status = ath6kl_bmi_reg_write(ar, address, param);
1471 /* write EEPROM data to Target RAM */
1472 status = ath6kl_upload_board_file(ar);
1476 /* transfer One time Programmable data */
1477 status = ath6kl_upload_otp(ar);
1481 /* Download Target firmware */
1482 status = ath6kl_upload_firmware(ar);
1486 status = ath6kl_upload_patch(ar);
1490 /* Download the test script */
1491 status = ath6kl_upload_testscript(ar);
1495 /* Restore system sleep */
1496 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1497 status = ath6kl_bmi_reg_write(ar, address, sleep);
1501 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1502 param = options | 0x20;
1503 status = ath6kl_bmi_reg_write(ar, address, param);
1510 int ath6kl_init_hw_params(struct ath6kl *ar)
1512 const struct ath6kl_hw *uninitialized_var(hw);
1515 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1518 if (hw->id == ar->version.target_ver)
1522 if (i == ARRAY_SIZE(hw_list)) {
1523 ath6kl_err("Unsupported hardware version: 0x%x\n",
1524 ar->version.target_ver);
1530 ath6kl_dbg(ATH6KL_DBG_BOOT,
1531 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1532 ar->version.target_ver, ar->target_type,
1533 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1534 ath6kl_dbg(ATH6KL_DBG_BOOT,
1535 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1536 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1537 ar->hw.reserved_ram_size);
1538 ath6kl_dbg(ATH6KL_DBG_BOOT,
1539 "refclk_hz %d uarttx_pin %d",
1540 ar->hw.refclk_hz, ar->hw.uarttx_pin);
1545 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1548 case ATH6KL_HIF_TYPE_SDIO:
1550 case ATH6KL_HIF_TYPE_USB:
1558 static const struct fw_capa_str_map {
1562 { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1563 { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1564 { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1565 { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1566 { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1567 { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1568 { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1569 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1570 { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1571 { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1572 { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1573 { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1574 { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1575 { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1576 { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" },
1577 { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" },
1578 { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" },
1581 static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1585 for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1586 if (fw_capa_map[i].id == id)
1587 return fw_capa_map[i].name;
1593 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1595 u8 *data = (u8 *) ar->fw_capabilities;
1596 size_t trunc_len, len = 0;
1598 char *trunc = "...";
1600 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1604 if (index >= sizeof(ar->fw_capabilities) * 4)
1607 if (buf_len - len < 4) {
1608 ath6kl_warn("firmware capability buffer too small!\n");
1610 /* add "..." to the end of string */
1611 trunc_len = strlen(trunc) + 1;
1612 strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1617 if (data[index] & (1 << bit)) {
1618 len += scnprintf(buf + len, buf_len - len, "%s,",
1619 ath6kl_init_get_fw_capa_name(i));
1623 /* overwrite the last comma */
1630 static int ath6kl_init_hw_reset(struct ath6kl *ar)
1632 ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device");
1634 return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS,
1635 cpu_to_le32(RESET_CONTROL_COLD_RST));
1638 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1644 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1646 ret = ath6kl_hif_power_on(ar);
1650 ret = ath6kl_configure_target(ar);
1654 ret = ath6kl_init_upload(ar);
1658 /* Do we need to finish the BMI phase */
1659 ret = ath6kl_bmi_done(ar);
1664 * The reason we have to wait for the target here is that the
1665 * driver layer has to init BMI in order to set the host block
1668 ret = ath6kl_htc_wait_target(ar->htc_target);
1670 if (ret == -ETIMEDOUT) {
1672 * Most likely USB target is in odd state after reboot and
1673 * needs a reset. A cold reset makes the whole device
1674 * disappear from USB bus and initialisation starts from
1677 ath6kl_warn("htc wait target timed out, resetting device\n");
1678 ath6kl_init_hw_reset(ar);
1681 ath6kl_err("htc wait target failed: %d\n", ret);
1685 ret = ath6kl_init_service_ep(ar);
1687 ath6kl_err("Endpoint service initilisation failed: %d\n", ret);
1688 goto err_cleanup_scatter;
1691 /* setup credit distribution */
1692 ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1695 ret = ath6kl_htc_start(ar->htc_target);
1697 /* FIXME: call this */
1698 ath6kl_cookie_cleanup(ar);
1699 goto err_cleanup_scatter;
1702 /* Wait for Wmi event to be ready */
1703 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1707 if (timeleft <= 0) {
1708 clear_bit(WMI_READY, &ar->flag);
1709 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n",
1715 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1717 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1718 ath6kl_info("%s %s fw %s api %d%s\n",
1720 ath6kl_init_get_hif_name(ar->hif_type),
1721 ar->wiphy->fw_version,
1723 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1724 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1725 ath6kl_info("firmware supports: %s\n", buf);
1728 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1729 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1730 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1735 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1737 /* communicate the wmi protocol verision to the target */
1738 /* FIXME: return error */
1739 if ((ath6kl_set_host_app_area(ar)) != 0)
1740 ath6kl_err("unable to set the host app area\n");
1742 for (i = 0; i < ar->vif_max; i++) {
1743 ret = ath6kl_target_config_wlan_params(ar, i);
1751 ath6kl_htc_stop(ar->htc_target);
1752 err_cleanup_scatter:
1753 ath6kl_hif_cleanup_scatter(ar);
1755 ath6kl_hif_power_off(ar);
1760 int ath6kl_init_hw_start(struct ath6kl *ar)
1764 err = __ath6kl_init_hw_start(ar);
1767 ar->state = ATH6KL_STATE_ON;
1771 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1775 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1777 ath6kl_htc_stop(ar->htc_target);
1779 ath6kl_hif_stop(ar);
1781 ath6kl_bmi_reset(ar);
1783 ret = ath6kl_hif_power_off(ar);
1785 ath6kl_warn("failed to power off hif: %d\n", ret);
1790 int ath6kl_init_hw_stop(struct ath6kl *ar)
1794 err = __ath6kl_init_hw_stop(ar);
1797 ar->state = ATH6KL_STATE_OFF;
1801 void ath6kl_init_hw_restart(struct ath6kl *ar)
1803 clear_bit(WMI_READY, &ar->flag);
1805 ath6kl_cfg80211_stop_all(ar);
1807 if (__ath6kl_init_hw_stop(ar)) {
1808 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1812 if (__ath6kl_init_hw_start(ar)) {
1813 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1818 void ath6kl_stop_txrx(struct ath6kl *ar)
1820 struct ath6kl_vif *vif, *tmp_vif;
1823 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1825 if (down_interruptible(&ar->sem)) {
1826 ath6kl_err("down_interruptible failed\n");
1830 for (i = 0; i < AP_MAX_NUM_STA; i++)
1831 aggr_reset_state(ar->sta_list[i].aggr_conn);
1833 spin_lock_bh(&ar->list_lock);
1834 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1835 list_del(&vif->list);
1836 spin_unlock_bh(&ar->list_lock);
1837 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1839 ath6kl_cfg80211_vif_cleanup(vif);
1841 spin_lock_bh(&ar->list_lock);
1843 spin_unlock_bh(&ar->list_lock);
1845 clear_bit(WMI_READY, &ar->flag);
1847 if (ar->fw_recovery.enable)
1848 del_timer_sync(&ar->fw_recovery.hb_timer);
1851 * After wmi_shudown all WMI events will be dropped. We
1852 * need to cleanup the buffers allocated in AP mode and
1853 * give disconnect notification to stack, which usually
1854 * happens in the disconnect_event. Simulate the disconnect
1855 * event by calling the function directly. Sometimes
1856 * disconnect_event will be received when the debug logs
1859 ath6kl_wmi_shutdown(ar->wmi);
1861 clear_bit(WMI_ENABLED, &ar->flag);
1862 if (ar->htc_target) {
1863 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1864 ath6kl_htc_stop(ar->htc_target);
1868 * Try to reset the device if we can. The driver may have been
1869 * configure NOT to reset the target during a debug session.
1871 ath6kl_init_hw_reset(ar);
1875 EXPORT_SYMBOL(ath6kl_stop_txrx);