drivers/net/wireless/ath/ath6kl/init.c

   1
   2 /*
   3  * Copyright (c) 2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  */
  18
  19 #include <linux/moduleparam.h>
  20 #include <linux/errno.h>
  21 #include <linux/export.h>
  22 #include <linux/of.h>
  23 #include <linux/mmc/sdio_func.h>
  24
  25 #include "core.h"
  26 #include "cfg80211.h"
  27 #include "target.h"
  28 #include "debug.h"
  29 #include "hif-ops.h"
  30
  31 static const struct ath6kl_hw hw_list[] = {
  32         {
  33                 .id                             = AR6003_HW_2_0_VERSION,
  34                 .name                           = "ar6003 hw 2.0",
  35                 .dataset_patch_addr             = 0x57e884,
  36                 .app_load_addr                  = 0x543180,
  37                 .board_ext_data_addr            = 0x57e500,
  38                 .reserved_ram_size              = 6912,
  39                 .refclk_hz                      = 26000000,
  40                 .uarttx_pin                     = 8,
  41
  42                 /* hw2.0 needs override address hardcoded */
  43                 .app_start_override_addr        = 0x944C00,
  44
  45                 .fw = {
  46                         .dir            = AR6003_HW_2_0_FW_DIR,
  47                         .otp            = AR6003_HW_2_0_OTP_FILE,
  48                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
  49                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  50                         .patch          = AR6003_HW_2_0_PATCH_FILE,
  51                 },
  52
  53                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
  54                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  55         },
  56         {
  57                 .id                             = AR6003_HW_2_1_1_VERSION,
  58                 .name                           = "ar6003 hw 2.1.1",
  59                 .dataset_patch_addr             = 0x57ff74,
  60                 .app_load_addr                  = 0x1234,
  61                 .board_ext_data_addr            = 0x542330,
  62                 .reserved_ram_size              = 512,
  63                 .refclk_hz                      = 26000000,
  64                 .uarttx_pin                     = 8,
  65                 .testscript_addr                = 0x57ef74,
  66
  67                 .fw = {
  68                         .dir            = AR6003_HW_2_1_1_FW_DIR,
  69                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
  70                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
  71                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  72                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
  73                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
  74                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
  75                 },
  76
  77                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  78                 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  79         },
  80         {
  81                 .id                             = AR6004_HW_1_0_VERSION,
  82                 .name                           = "ar6004 hw 1.0",
  83                 .dataset_patch_addr             = 0x57e884,
  84                 .app_load_addr                  = 0x1234,
  85                 .board_ext_data_addr            = 0x437000,
  86                 .reserved_ram_size              = 19456,
  87                 .board_addr                     = 0x433900,
  88                 .refclk_hz                      = 26000000,
  89                 .uarttx_pin                     = 11,
  90
  91                 .fw = {
  92                         .dir            = AR6004_HW_1_0_FW_DIR,
  93                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
  94                 },
  95
  96                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
  97                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
  98         },
  99         {
 100                 .id                             = AR6004_HW_1_1_VERSION,
 101                 .name                           = "ar6004 hw 1.1",
 102                 .dataset_patch_addr             = 0x57e884,
 103                 .app_load_addr                  = 0x1234,
 104                 .board_ext_data_addr            = 0x437000,
 105                 .reserved_ram_size              = 11264,
 106                 .board_addr                     = 0x43d400,
 107                 .refclk_hz                      = 40000000,
 108                 .uarttx_pin                     = 11,
 109
 110                 .fw = {
 111                         .dir            = AR6004_HW_1_1_FW_DIR,
 112                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
 113                 },
 114
 115                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
 116                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
 117         },
 118 };
 119
 120 /*
 121  * Include definitions here that can be used to tune the WLAN module
 122  * behavior. Different customers can tune the behavior as per their needs,
 123  * here.
 124  */
 125
 126 /*
 127  * This configuration item enable/disable keepalive support.
 128  * Keepalive support: In the absence of any data traffic to AP, null
 129  * frames will be sent to the AP at periodic interval, to keep the association
 130  * active. This configuration item defines the periodic interval.
 131  * Use value of zero to disable keepalive support
 132  * Default: 60 seconds
 133  */
 134 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
 135
 136 /*
 137  * This configuration item sets the value of disconnect timeout
 138  * Firmware delays sending the disconnec event to the host for this
 139  * timeout after is gets disconnected from the current AP.
 140  * If the firmware successly roams within the disconnect timeout
 141  * it sends a new connect event
 142  */
 143 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
 144
 145
 146 #define ATH6KL_DATA_OFFSET    64
 147 struct sk_buff *ath6kl_buf_alloc(int size)
 148 {
 149         struct sk_buff *skb;
 150         u16 reserved;
 151
 152         /* Add chacheline space at front and back of buffer */
 153         reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
 154                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
 155         skb = dev_alloc_skb(size + reserved);
 156
 157         if (skb)
 158                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
 159         return skb;
 160 }
 161
 162 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
 163 {
 164         vif->ssid_len = 0;
 165         memset(vif->ssid, 0, sizeof(vif->ssid));
 166
 167         vif->dot11_auth_mode = OPEN_AUTH;
 168         vif->auth_mode = NONE_AUTH;
 169         vif->prwise_crypto = NONE_CRYPT;
 170         vif->prwise_crypto_len = 0;
 171         vif->grp_crypto = NONE_CRYPT;
 172         vif->grp_crypto_len = 0;
 173         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 174         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
 175         memset(vif->bssid, 0, sizeof(vif->bssid));
 176         vif->bss_ch = 0;
 177 }
 178
 179 static int ath6kl_set_host_app_area(struct ath6kl *ar)
 180 {
 181         u32 address, data;
 182         struct host_app_area host_app_area;
 183
 184         /* Fetch the address of the host_app_area_s
 185          * instance in the host interest area */
 186         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
 187         address = TARG_VTOP(ar->target_type, address);
 188
 189         if (ath6kl_diag_read32(ar, address, &data))
 190                 return -EIO;
 191
 192         address = TARG_VTOP(ar->target_type, data);
 193         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
 194         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
 195                               sizeof(struct host_app_area)))
 196                 return -EIO;
 197
 198         return 0;
 199 }
 200
 201 static inline void set_ac2_ep_map(struct ath6kl *ar,
 202                                   u8 ac,
 203                                   enum htc_endpoint_id ep)
 204 {
 205         ar->ac2ep_map[ac] = ep;
 206         ar->ep2ac_map[ep] = ac;
 207 }
 208
 209 /* connect to a service */
 210 static int ath6kl_connectservice(struct ath6kl *ar,
 211                                  struct htc_service_connect_req  *con_req,
 212                                  char *desc)
 213 {
 214         int status;
 215         struct htc_service_connect_resp response;
 216
 217         memset(&response, 0, sizeof(response));
 218
 219         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
 220         if (status) {
 221                 ath6kl_err("failed to connect to %s service status:%d\n",
 222                            desc, status);
 223                 return status;
 224         }
 225
 226         switch (con_req->svc_id) {
 227         case WMI_CONTROL_SVC:
 228                 if (test_bit(WMI_ENABLED, &ar->flag))
 229                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
 230                 ar->ctrl_ep = response.endpoint;
 231                 break;
 232         case WMI_DATA_BE_SVC:
 233                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
 234                 break;
 235         case WMI_DATA_BK_SVC:
 236                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
 237                 break;
 238         case WMI_DATA_VI_SVC:
 239                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
 240                 break;
 241         case WMI_DATA_VO_SVC:
 242                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
 243                 break;
 244         default:
 245                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
 246                 return -EINVAL;
 247         }
 248
 249         return 0;
 250 }
 251
 252 static int ath6kl_init_service_ep(struct ath6kl *ar)
 253 {
 254         struct htc_service_connect_req connect;
 255
 256         memset(&connect, 0, sizeof(connect));
 257
 258         /* these fields are the same for all service endpoints */
 259         connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
 260         connect.ep_cb.rx = ath6kl_rx;
 261         connect.ep_cb.rx_refill = ath6kl_rx_refill;
 262         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
 263
 264         /*
 265          * Set the max queue depth so that our ath6kl_tx_queue_full handler
 266          * gets called.
 267         */
 268         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
 269         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
 270         if (!connect.ep_cb.rx_refill_thresh)
 271                 connect.ep_cb.rx_refill_thresh++;
 272
 273         /* connect to control service */
 274         connect.svc_id = WMI_CONTROL_SVC;
 275         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
 276                 return -EIO;
 277
 278         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
 279
 280         /*
 281          * Limit the HTC message size on the send path, although e can
 282          * receive A-MSDU frames of 4K, we will only send ethernet-sized
 283          * (802.3) frames on the send path.
 284          */
 285         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
 286
 287         /*
 288          * To reduce the amount of committed memory for larger A_MSDU
 289          * frames, use the recv-alloc threshold mechanism for larger
 290          * packets.
 291          */
 292         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
 293         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
 294
 295         /*
 296          * For the remaining data services set the connection flag to
 297          * reduce dribbling, if configured to do so.
 298          */
 299         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
 300         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
 301         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
 302
 303         connect.svc_id = WMI_DATA_BE_SVC;
 304
 305         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
 306                 return -EIO;
 307
 308         /* connect to back-ground map this to WMI LOW_PRI */
 309         connect.svc_id = WMI_DATA_BK_SVC;
 310         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
 311                 return -EIO;
 312
 313         /* connect to Video service, map this to to HI PRI */
 314         connect.svc_id = WMI_DATA_VI_SVC;
 315         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
 316                 return -EIO;
 317
 318         /*
 319          * Connect to VO service, this is currently not mapped to a WMI
 320          * priority stream due to historical reasons. WMI originally
 321          * defined 3 priorities over 3 mailboxes We can change this when
 322          * WMI is reworked so that priorities are not dependent on
 323          * mailboxes.
 324          */
 325         connect.svc_id = WMI_DATA_VO_SVC;
 326         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
 327                 return -EIO;
 328
 329         return 0;
 330 }
 331
 332 void ath6kl_init_control_info(struct ath6kl_vif *vif)
 333 {
 334         ath6kl_init_profile_info(vif);
 335         vif->def_txkey_index = 0;
 336         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 337         vif->ch_hint = 0;
 338 }
 339
 340 /*
 341  * Set HTC/Mbox operational parameters, this can only be called when the
 342  * target is in the BMI phase.
 343  */
 344 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
 345                                  u8 htc_ctrl_buf)
 346 {
 347         int status;
 348         u32 blk_size;
 349
 350         blk_size = ar->mbox_info.block_size;
 351
 352         if (htc_ctrl_buf)
 353                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
 354
 355         /* set the host interest area for the block size */
 356         status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
 357         if (status) {
 358                 ath6kl_err("bmi_write_memory for IO block size failed\n");
 359                 goto out;
 360         }
 361
 362         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
 363                    blk_size,
 364                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
 365
 366         if (mbox_isr_yield_val) {
 367                 /* set the host interest area for the mbox ISR yield limit */
 368                 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
 369                                                mbox_isr_yield_val);
 370                 if (status) {
 371                         ath6kl_err("bmi_write_memory for yield limit failed\n");
 372                         goto out;
 373                 }
 374         }
 375
 376 out:
 377         return status;
 378 }
 379
 380 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
 381 {
 382         int ret;
 383
 384         /*
 385          * Configure the device for rx dot11 header rules. "0,0" are the
 386          * default values. Required if checksum offload is needed. Set
 387          * RxMetaVersion to 2.
 388          */
 389         ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
 390                                                  ar->rx_meta_ver, 0, 0);
 391         if (ret) {
 392                 ath6kl_err("unable to set the rx frame format: %d\n", ret);
 393                 return ret;
 394         }
 395
 396         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
 397                 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
 398                                               IGNORE_PS_FAIL_DURING_SCAN);
 399                 if (ret) {
 400                         ath6kl_err("unable to set power save fail event policy: %d\n",
 401                                    ret);
 402                         return ret;
 403                 }
 404         }
 405
 406         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
 407                 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
 408                                                    WMI_FOLLOW_BARKER_IN_ERP);
 409                 if (ret) {
 410                         ath6kl_err("unable to set barker preamble policy: %d\n",
 411                                    ret);
 412                         return ret;
 413                 }
 414         }
 415
 416         ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
 417                                            WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
 418         if (ret) {
 419                 ath6kl_err("unable to set keep alive interval: %d\n", ret);
 420                 return ret;
 421         }
 422
 423         ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
 424                                          WLAN_CONFIG_DISCONNECT_TIMEOUT);
 425         if (ret) {
 426                 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
 427                 return ret;
 428         }
 429
 430         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
 431                 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
 432                 if (ret) {
 433                         ath6kl_err("unable to set txop bursting: %d\n", ret);
 434                         return ret;
 435                 }
 436         }
 437
 438         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 439                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
 440                                               P2P_FLAG_CAPABILITIES_REQ |
 441                                               P2P_FLAG_MACADDR_REQ |
 442                                               P2P_FLAG_HMODEL_REQ);
 443                 if (ret) {
 444                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
 445                                    "capabilities (%d) - assuming P2P not "
 446                                    "supported\n", ret);
 447                         ar->p2p = false;
 448                 }
 449         }
 450
 451         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 452                 /* Enable Probe Request reporting for P2P */
 453                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
 454                 if (ret) {
 455                         ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
 456                                    "Request reporting (%d)\n", ret);
 457                 }
 458         }
 459
 460         return ret;
 461 }
 462
 463 int ath6kl_configure_target(struct ath6kl *ar)
 464 {
 465         u32 param, ram_reserved_size;
 466         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
 467         int i, status;
 468
 469         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
 470         if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
 471                 ath6kl_err("bmi_write_memory for uart debug failed\n");
 472                 return -EIO;
 473         }
 474
 475         /*
 476          * Note: Even though the firmware interface type is
 477          * chosen as BSS_STA for all three interfaces, can
 478          * be configured to IBSS/AP as long as the fw submode
 479          * remains normal mode (0 - AP, STA and IBSS). But
 480          * due to an target assert in firmware only one interface is
 481          * configured for now.
 482          */
 483         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
 484
 485         for (i = 0; i < ar->vif_max; i++)
 486                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
 487
 488         /*
 489          * By default, submodes :
 490          *              vif[0] - AP/STA/IBSS
 491          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
 492          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
 493          */
 494
 495         for (i = 0; i < ar->max_norm_iface; i++)
 496                 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
 497                               (i * HI_OPTION_FW_SUBMODE_BITS);
 498
 499         for (i = ar->max_norm_iface; i < ar->vif_max; i++)
 500                 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 501                               (i * HI_OPTION_FW_SUBMODE_BITS);
 502
 503         if (ar->p2p && ar->vif_max == 1)
 504                 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
 505
 506         if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
 507                                   HTC_PROTOCOL_VERSION) != 0) {
 508                 ath6kl_err("bmi_write_memory for htc version failed\n");
 509                 return -EIO;
 510         }
 511
 512         /* set the firmware mode to STA/IBSS/AP */
 513         param = 0;
 514
 515         if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
 516                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
 517                 return -EIO;
 518         }
 519
 520         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
 521         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
 522         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
 523
 524         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 525         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 526
 527         if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
 528                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
 529                 return -EIO;
 530         }
 531
 532         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
 533
 534         /*
 535          * Hardcode the address use for the extended board data
 536          * Ideally this should be pre-allocate by the OS at boot time
 537          * But since it is a new feature and board data is loaded
 538          * at init time, we have to workaround this from host.
 539          * It is difficult to patch the firmware boot code,
 540          * but possible in theory.
 541          */
 542
 543         if (ar->target_type == TARGET_TYPE_AR6003) {
 544                 param = ar->hw.board_ext_data_addr;
 545                 ram_reserved_size = ar->hw.reserved_ram_size;
 546
 547                 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
 548                         ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
 549                         return -EIO;
 550                 }
 551
 552                 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
 553                                           ram_reserved_size) != 0) {
 554                         ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
 555                         return -EIO;
 556                 }
 557         }
 558
 559         /* set the block size for the target */
 560         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
 561                 /* use default number of control buffers */
 562                 return -EIO;
 563
 564         /* Configure GPIO AR600x UART */
 565         status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
 566                                        ar->hw.uarttx_pin);
 567         if (status)
 568                 return status;
 569
 570         /* Configure target refclk_hz */
 571         status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
 572         if (status)
 573                 return status;
 574
 575         return 0;
 576 }
 577
 578 /* firmware upload */
 579 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
 580                          u8 **fw, size_t *fw_len)
 581 {
 582         const struct firmware *fw_entry;
 583         int ret;
 584
 585         ret = request_firmware(&fw_entry, filename, ar->dev);
 586         if (ret)
 587                 return ret;
 588
 589         *fw_len = fw_entry->size;
 590         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
 591
 592         if (*fw == NULL)
 593                 ret = -ENOMEM;
 594
 595         release_firmware(fw_entry);
 596
 597         return ret;
 598 }
 599
 600 #ifdef CONFIG_OF
 601 /*
 602  * Check the device tree for a board-id and use it to construct
 603  * the pathname to the firmware file.  Used (for now) to find a
 604  * fallback to the "bdata.bin" file--typically a symlink to the
 605  * appropriate board-specific file.
 606  */
 607 static bool check_device_tree(struct ath6kl *ar)
 608 {
 609         static const char *board_id_prop = "atheros,board-id";
 610         struct device_node *node;
 611         char board_filename[64];
 612         const char *board_id;
 613         int ret;
 614
 615         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
 616                 board_id = of_get_property(node, board_id_prop, NULL);
 617                 if (board_id == NULL) {
 618                         ath6kl_warn("No \"%s\" property on %s node.\n",
 619                                     board_id_prop, node->name);
 620                         continue;
 621                 }
 622                 snprintf(board_filename, sizeof(board_filename),
 623                          "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
 624
 625                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
 626                                     &ar->fw_board_len);
 627                 if (ret) {
 628                         ath6kl_err("Failed to get DT board file %s: %d\n",
 629                                    board_filename, ret);
 630                         continue;
 631                 }
 632                 return true;
 633         }
 634         return false;
 635 }
 636 #else
 637 static bool check_device_tree(struct ath6kl *ar)
 638 {
 639         return false;
 640 }
 641 #endif /* CONFIG_OF */
 642
 643 static int ath6kl_fetch_board_file(struct ath6kl *ar)
 644 {
 645         const char *filename;
 646         int ret;
 647
 648         if (ar->fw_board != NULL)
 649                 return 0;
 650
 651         if (WARN_ON(ar->hw.fw_board == NULL))
 652                 return -EINVAL;
 653
 654         filename = ar->hw.fw_board;
 655
 656         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 657                             &ar->fw_board_len);
 658         if (ret == 0) {
 659                 /* managed to get proper board file */
 660                 return 0;
 661         }
 662
 663         if (check_device_tree(ar)) {
 664                 /* got board file from device tree */
 665                 return 0;
 666         }
 667
 668         /* there was no proper board file, try to use default instead */
 669         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
 670                     filename, ret);
 671
 672         filename = ar->hw.fw_default_board;
 673
 674         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 675                             &ar->fw_board_len);
 676         if (ret) {
 677                 ath6kl_err("Failed to get default board file %s: %d\n",
 678                            filename, ret);
 679                 return ret;
 680         }
 681
 682         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
 683         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
 684
 685         return 0;
 686 }
 687
 688 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
 689 {
 690         char filename[100];
 691         int ret;
 692
 693         if (ar->fw_otp != NULL)
 694                 return 0;
 695
 696         if (ar->hw.fw.otp == NULL) {
 697                 ath6kl_dbg(ATH6KL_DBG_BOOT,
 698                            "no OTP file configured for this hw\n");
 699                 return 0;
 700         }
 701
 702         snprintf(filename, sizeof(filename), "%s/%s",
 703                  ar->hw.fw.dir, ar->hw.fw.otp);
 704
 705         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
 706                             &ar->fw_otp_len);
 707         if (ret) {
 708                 ath6kl_err("Failed to get OTP file %s: %d\n",
 709                            filename, ret);
 710                 return ret;
 711         }
 712
 713         return 0;
 714 }
 715
 716 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
 717 {
 718         char filename[100];
 719         int ret;
 720
 721         if (ar->testmode == 0)
 722                 return 0;
 723
 724         ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
 725
 726         if (ar->testmode == 2) {
 727                 if (ar->hw.fw.utf == NULL) {
 728                         ath6kl_warn("testmode 2 not supported\n");
 729                         return -EOPNOTSUPP;
 730                 }
 731
 732                 snprintf(filename, sizeof(filename), "%s/%s",
 733                          ar->hw.fw.dir, ar->hw.fw.utf);
 734         } else {
 735                 if (ar->hw.fw.tcmd == NULL) {
 736                         ath6kl_warn("testmode 1 not supported\n");
 737                         return -EOPNOTSUPP;
 738                 }
 739
 740                 snprintf(filename, sizeof(filename), "%s/%s",
 741                          ar->hw.fw.dir, ar->hw.fw.tcmd);
 742         }
 743
 744         set_bit(TESTMODE, &ar->flag);
 745
 746         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 747         if (ret) {
 748                 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
 749                            ar->testmode, filename, ret);
 750                 return ret;
 751         }
 752
 753         return 0;
 754 }
 755
 756 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
 757 {
 758         char filename[100];
 759         int ret;
 760
 761         if (ar->fw != NULL)
 762                 return 0;
 763
 764         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
 765         if (WARN_ON(ar->hw.fw.fw == NULL))
 766                 return -EINVAL;
 767
 768         snprintf(filename, sizeof(filename), "%s/%s",
 769                  ar->hw.fw.dir, ar->hw.fw.fw);
 770
 771         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 772         if (ret) {
 773                 ath6kl_err("Failed to get firmware file %s: %d\n",
 774                            filename, ret);
 775                 return ret;
 776         }
 777
 778         return 0;
 779 }
 780
 781 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
 782 {
 783         char filename[100];
 784         int ret;
 785
 786         if (ar->fw_patch != NULL)
 787                 return 0;
 788
 789         if (ar->hw.fw.patch == NULL)
 790                 return 0;
 791
 792         snprintf(filename, sizeof(filename), "%s/%s",
 793                  ar->hw.fw.dir, ar->hw.fw.patch);
 794
 795         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
 796                             &ar->fw_patch_len);
 797         if (ret) {
 798                 ath6kl_err("Failed to get patch file %s: %d\n",
 799                            filename, ret);
 800                 return ret;
 801         }
 802
 803         return 0;
 804 }
 805
 806 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
 807 {
 808         char filename[100];
 809         int ret;
 810
 811         if (ar->testmode != 2)
 812                 return 0;
 813
 814         if (ar->fw_testscript != NULL)
 815                 return 0;
 816
 817         if (ar->hw.fw.testscript == NULL)
 818                 return 0;
 819
 820         snprintf(filename, sizeof(filename), "%s/%s",
 821                  ar->hw.fw.dir, ar->hw.fw.testscript);
 822
 823         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
 824                                 &ar->fw_testscript_len);
 825         if (ret) {
 826                 ath6kl_err("Failed to get testscript file %s: %d\n",
 827                            filename, ret);
 828                 return ret;
 829         }
 830
 831         return 0;
 832 }
 833
 834 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
 835 {
 836         int ret;
 837
 838         ret = ath6kl_fetch_otp_file(ar);
 839         if (ret)
 840                 return ret;
 841
 842         ret = ath6kl_fetch_fw_file(ar);
 843         if (ret)
 844                 return ret;
 845
 846         ret = ath6kl_fetch_patch_file(ar);
 847         if (ret)
 848                 return ret;
 849
 850         ret = ath6kl_fetch_testscript_file(ar);
 851         if (ret)
 852                 return ret;
 853
 854         return 0;
 855 }
 856
 857 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
 858 {
 859         size_t magic_len, len, ie_len;
 860         const struct firmware *fw;
 861         struct ath6kl_fw_ie *hdr;
 862         char filename[100];
 863         const u8 *data;
 864         int ret, ie_id, i, index, bit;
 865         __le32 *val;
 866
 867         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
 868
 869         ret = request_firmware(&fw, filename, ar->dev);
 870         if (ret)
 871                 return ret;
 872
 873         data = fw->data;
 874         len = fw->size;
 875
 876         /* magic also includes the null byte, check that as well */
 877         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
 878
 879         if (len < magic_len) {
 880                 ret = -EINVAL;
 881                 goto out;
 882         }
 883
 884         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
 885                 ret = -EINVAL;
 886                 goto out;
 887         }
 888
 889         len -= magic_len;
 890         data += magic_len;
 891
 892         /* loop elements */
 893         while (len > sizeof(struct ath6kl_fw_ie)) {
 894                 /* hdr is unaligned! */
 895                 hdr = (struct ath6kl_fw_ie *) data;
 896
 897                 ie_id = le32_to_cpup(&hdr->id);
 898                 ie_len = le32_to_cpup(&hdr->len);
 899
 900                 len -= sizeof(*hdr);
 901                 data += sizeof(*hdr);
 902
 903                 if (len < ie_len) {
 904                         ret = -EINVAL;
 905                         goto out;
 906                 }
 907
 908                 switch (ie_id) {
 909                 case ATH6KL_FW_IE_OTP_IMAGE:
 910                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
 911                                    ie_len);
 912
 913                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
 914
 915                         if (ar->fw_otp == NULL) {
 916                                 ret = -ENOMEM;
 917                                 goto out;
 918                         }
 919
 920                         ar->fw_otp_len = ie_len;
 921                         break;
 922                 case ATH6KL_FW_IE_FW_IMAGE:
 923                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
 924                                    ie_len);
 925
 926                         /* in testmode we already might have a fw file */
 927                         if (ar->fw != NULL)
 928                                 break;
 929
 930                         ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
 931
 932                         if (ar->fw == NULL) {
 933                                 ret = -ENOMEM;
 934                                 goto out;
 935                         }
 936
 937                         ar->fw_len = ie_len;
 938                         break;
 939                 case ATH6KL_FW_IE_PATCH_IMAGE:
 940                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
 941                                    ie_len);
 942
 943                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
 944
 945                         if (ar->fw_patch == NULL) {
 946                                 ret = -ENOMEM;
 947                                 goto out;
 948                         }
 949
 950                         ar->fw_patch_len = ie_len;
 951                         break;
 952                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
 953                         val = (__le32 *) data;
 954                         ar->hw.reserved_ram_size = le32_to_cpup(val);
 955
 956                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 957                                    "found reserved ram size ie 0x%d\n",
 958                                    ar->hw.reserved_ram_size);
 959                         break;
 960                 case ATH6KL_FW_IE_CAPABILITIES:
 961                         if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
 962                                 break;
 963
 964                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 965                                    "found firmware capabilities ie (%zd B)\n",
 966                                    ie_len);
 967
 968                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
 969                                 index = i / 8;
 970                                 bit = i % 8;
 971
 972                                 if (data[index] & (1 << bit))
 973                                         __set_bit(i, ar->fw_capabilities);
 974                         }
 975
 976                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
 977                                         ar->fw_capabilities,
 978                                         sizeof(ar->fw_capabilities));
 979                         break;
 980                 case ATH6KL_FW_IE_PATCH_ADDR:
 981                         if (ie_len != sizeof(*val))
 982                                 break;
 983
 984                         val = (__le32 *) data;
 985                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
 986
 987                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 988                                    "found patch address ie 0x%x\n",
 989                                    ar->hw.dataset_patch_addr);
 990                         break;
 991                 case ATH6KL_FW_IE_BOARD_ADDR:
 992                         if (ie_len != sizeof(*val))
 993                                 break;
 994
 995                         val = (__le32 *) data;
 996                         ar->hw.board_addr = le32_to_cpup(val);
 997
 998                         ath6kl_dbg(ATH6KL_DBG_BOOT,
 999                                    "found board address ie 0x%x\n",
1000                                    ar->hw.board_addr);
1001                         break;
1002                 case ATH6KL_FW_IE_VIF_MAX:
1003                         if (ie_len != sizeof(*val))
1004                                 break;
1005
1006                         val = (__le32 *) data;
1007                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1008                                             ATH6KL_VIF_MAX);
1009
1010                         if (ar->vif_max > 1 && !ar->p2p)
1011                                 ar->max_norm_iface = 2;
1012
1013                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1014                                    "found vif max ie %d\n", ar->vif_max);
1015                         break;
1016                 default:
1017                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1018                                    le32_to_cpup(&hdr->id));
1019                         break;
1020                 }
1021
1022                 len -= ie_len;
1023                 data += ie_len;
1024         };
1025
1026         ret = 0;
1027 out:
1028         release_firmware(fw);
1029
1030         return ret;
1031 }
1032
1033 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1034 {
1035         int ret;
1036
1037         ret = ath6kl_fetch_board_file(ar);
1038         if (ret)
1039                 return ret;
1040
1041         ret = ath6kl_fetch_testmode_file(ar);
1042         if (ret)
1043                 return ret;
1044
1045         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1046         if (ret == 0) {
1047                 ar->fw_api = 3;
1048                 goto out;
1049         }
1050
1051         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1052         if (ret == 0) {
1053                 ar->fw_api = 2;
1054                 goto out;
1055         }
1056
1057         ret = ath6kl_fetch_fw_api1(ar);
1058         if (ret)
1059                 return ret;
1060
1061         ar->fw_api = 1;
1062
1063 out:
1064         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1065
1066         return 0;
1067 }
1068
1069 static int ath6kl_upload_board_file(struct ath6kl *ar)
1070 {
1071         u32 board_address, board_ext_address, param;
1072         u32 board_data_size, board_ext_data_size;
1073         int ret;
1074
1075         if (WARN_ON(ar->fw_board == NULL))
1076                 return -ENOENT;
1077
1078         /*
1079          * Determine where in Target RAM to write Board Data.
1080          * For AR6004, host determine Target RAM address for
1081          * writing board data.
1082          */
1083         if (ar->hw.board_addr != 0) {
1084                 board_address = ar->hw.board_addr;
1085                 ath6kl_bmi_write_hi32(ar, hi_board_data,
1086                                       board_address);
1087         } else {
1088                 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1089         }
1090
1091         /* determine where in target ram to write extended board data */
1092         ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1093
1094         if (ar->target_type == TARGET_TYPE_AR6003 &&
1095             board_ext_address == 0) {
1096                 ath6kl_err("Failed to get board file target address.\n");
1097                 return -EINVAL;
1098         }
1099
1100         switch (ar->target_type) {
1101         case TARGET_TYPE_AR6003:
1102                 board_data_size = AR6003_BOARD_DATA_SZ;
1103                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1104                 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1105                         board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1106                 break;
1107         case TARGET_TYPE_AR6004:
1108                 board_data_size = AR6004_BOARD_DATA_SZ;
1109                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1110                 break;
1111         default:
1112                 WARN_ON(1);
1113                 return -EINVAL;
1114                 break;
1115         }
1116
1117         if (board_ext_address &&
1118             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1119
1120                 /* write extended board data */
1121                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1122                            "writing extended board data to 0x%x (%d B)\n",
1123                            board_ext_address, board_ext_data_size);
1124
1125                 ret = ath6kl_bmi_write(ar, board_ext_address,
1126                                        ar->fw_board + board_data_size,
1127                                        board_ext_data_size);
1128                 if (ret) {
1129                         ath6kl_err("Failed to write extended board data: %d\n",
1130                                    ret);
1131                         return ret;
1132                 }
1133
1134                 /* record that extended board data is initialized */
1135                 param = (board_ext_data_size << 16) | 1;
1136
1137                 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1138         }
1139
1140         if (ar->fw_board_len < board_data_size) {
1141                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1142                 ret = -EINVAL;
1143                 return ret;
1144         }
1145
1146         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1147                    board_address, board_data_size);
1148
1149         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1150                                board_data_size);
1151
1152         if (ret) {
1153                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1154                 return ret;
1155         }
1156
1157         /* record the fact that Board Data IS initialized */
1158         ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1159
1160         return ret;
1161 }
1162
1163 static int ath6kl_upload_otp(struct ath6kl *ar)
1164 {
1165         u32 address, param;
1166         bool from_hw = false;
1167         int ret;
1168
1169         if (ar->fw_otp == NULL)
1170                 return 0;
1171
1172         address = ar->hw.app_load_addr;
1173
1174         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1175                    ar->fw_otp_len);
1176
1177         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1178                                        ar->fw_otp_len);
1179         if (ret) {
1180                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1181                 return ret;
1182         }
1183
1184         /* read firmware start address */
1185         ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1186
1187         if (ret) {
1188                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1189                 return ret;
1190         }
1191
1192         if (ar->hw.app_start_override_addr == 0) {
1193                 ar->hw.app_start_override_addr = address;
1194                 from_hw = true;
1195         }
1196
1197         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1198                    from_hw ? " (from hw)" : "",
1199                    ar->hw.app_start_override_addr);
1200
1201         /* execute the OTP code */
1202         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1203                    ar->hw.app_start_override_addr);
1204         param = 0;
1205         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1206
1207         return ret;
1208 }
1209
1210 static int ath6kl_upload_firmware(struct ath6kl *ar)
1211 {
1212         u32 address;
1213         int ret;
1214
1215         if (WARN_ON(ar->fw == NULL))
1216                 return 0;
1217
1218         address = ar->hw.app_load_addr;
1219
1220         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1221                    address, ar->fw_len);
1222
1223         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1224
1225         if (ret) {
1226                 ath6kl_err("Failed to write firmware: %d\n", ret);
1227                 return ret;
1228         }
1229
1230         /*
1231          * Set starting address for firmware
1232          * Don't need to setup app_start override addr on AR6004
1233          */
1234         if (ar->target_type != TARGET_TYPE_AR6004) {
1235                 address = ar->hw.app_start_override_addr;
1236                 ath6kl_bmi_set_app_start(ar, address);
1237         }
1238         return ret;
1239 }
1240
1241 static int ath6kl_upload_patch(struct ath6kl *ar)
1242 {
1243         u32 address;
1244         int ret;
1245
1246         if (ar->fw_patch == NULL)
1247                 return 0;
1248
1249         address = ar->hw.dataset_patch_addr;
1250
1251         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1252                    address, ar->fw_patch_len);
1253
1254         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1255         if (ret) {
1256                 ath6kl_err("Failed to write patch file: %d\n", ret);
1257                 return ret;
1258         }
1259
1260         ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1261
1262         return 0;
1263 }
1264
1265 static int ath6kl_upload_testscript(struct ath6kl *ar)
1266 {
1267         u32 address;
1268         int ret;
1269
1270         if (ar->testmode != 2)
1271                 return 0;
1272
1273         if (ar->fw_testscript == NULL)
1274                 return 0;
1275
1276         address = ar->hw.testscript_addr;
1277
1278         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1279                    address, ar->fw_testscript_len);
1280
1281         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1282                 ar->fw_testscript_len);
1283         if (ret) {
1284                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1285                 return ret;
1286         }
1287
1288         ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1289         ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1290         ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1291
1292         return 0;
1293 }
1294
1295 static int ath6kl_init_upload(struct ath6kl *ar)
1296 {
1297         u32 param, options, sleep, address;
1298         int status = 0;
1299
1300         if (ar->target_type != TARGET_TYPE_AR6003 &&
1301             ar->target_type != TARGET_TYPE_AR6004)
1302                 return -EINVAL;
1303
1304         /* temporarily disable system sleep */
1305         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1306         status = ath6kl_bmi_reg_read(ar, address, &param);
1307         if (status)
1308                 return status;
1309
1310         options = param;
1311
1312         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1313         status = ath6kl_bmi_reg_write(ar, address, param);
1314         if (status)
1315                 return status;
1316
1317         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1318         status = ath6kl_bmi_reg_read(ar, address, &param);
1319         if (status)
1320                 return status;
1321
1322         sleep = param;
1323
1324         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1325         status = ath6kl_bmi_reg_write(ar, address, param);
1326         if (status)
1327                 return status;
1328
1329         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1330                    options, sleep);
1331
1332         /* program analog PLL register */
1333         /* no need to control 40/44MHz clock on AR6004 */
1334         if (ar->target_type != TARGET_TYPE_AR6004) {
1335                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1336                                               0xF9104001);
1337
1338                 if (status)
1339                         return status;
1340
1341                 /* Run at 80/88MHz by default */
1342                 param = SM(CPU_CLOCK_STANDARD, 1);
1343
1344                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1345                 status = ath6kl_bmi_reg_write(ar, address, param);
1346                 if (status)
1347                         return status;
1348         }
1349
1350         param = 0;
1351         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1352         param = SM(LPO_CAL_ENABLE, 1);
1353         status = ath6kl_bmi_reg_write(ar, address, param);
1354         if (status)
1355                 return status;
1356
1357         /* WAR to avoid SDIO CRC err */
1358         if (ar->version.target_ver == AR6003_HW_2_0_VERSION ||
1359             ar->version.target_ver == AR6003_HW_2_1_1_VERSION) {
1360                 ath6kl_err("temporary war to avoid sdio crc error\n");
1361
1362                 param = 0x20;
1363
1364                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1365                 status = ath6kl_bmi_reg_write(ar, address, param);
1366                 if (status)
1367                         return status;
1368
1369                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1370                 status = ath6kl_bmi_reg_write(ar, address, param);
1371                 if (status)
1372                         return status;
1373
1374                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1375                 status = ath6kl_bmi_reg_write(ar, address, param);
1376                 if (status)
1377                         return status;
1378
1379                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1380                 status = ath6kl_bmi_reg_write(ar, address, param);
1381                 if (status)
1382                         return status;
1383         }
1384
1385         /* write EEPROM data to Target RAM */
1386         status = ath6kl_upload_board_file(ar);
1387         if (status)
1388                 return status;
1389
1390         /* transfer One time Programmable data */
1391         status = ath6kl_upload_otp(ar);
1392         if (status)
1393                 return status;
1394
1395         /* Download Target firmware */
1396         status = ath6kl_upload_firmware(ar);
1397         if (status)
1398                 return status;
1399
1400         status = ath6kl_upload_patch(ar);
1401         if (status)
1402                 return status;
1403
1404         /* Download the test script */
1405         status = ath6kl_upload_testscript(ar);
1406         if (status)
1407                 return status;
1408
1409         /* Restore system sleep */
1410         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1411         status = ath6kl_bmi_reg_write(ar, address, sleep);
1412         if (status)
1413                 return status;
1414
1415         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1416         param = options | 0x20;
1417         status = ath6kl_bmi_reg_write(ar, address, param);
1418         if (status)
1419                 return status;
1420
1421         return status;
1422 }
1423
1424 int ath6kl_init_hw_params(struct ath6kl *ar)
1425 {
1426         const struct ath6kl_hw *uninitialized_var(hw);
1427         int i;
1428
1429         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1430                 hw = &hw_list[i];
1431
1432                 if (hw->id == ar->version.target_ver)
1433                         break;
1434         }
1435
1436         if (i == ARRAY_SIZE(hw_list)) {
1437                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1438                            ar->version.target_ver);
1439                 return -EINVAL;
1440         }
1441
1442         ar->hw = *hw;
1443
1444         ath6kl_dbg(ATH6KL_DBG_BOOT,
1445                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1446                    ar->version.target_ver, ar->target_type,
1447                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1448         ath6kl_dbg(ATH6KL_DBG_BOOT,
1449                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1450                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1451                    ar->hw.reserved_ram_size);
1452         ath6kl_dbg(ATH6KL_DBG_BOOT,
1453                    "refclk_hz %d uarttx_pin %d",
1454                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1455
1456         return 0;
1457 }
1458
1459 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1460 {
1461         switch (type) {
1462         case ATH6KL_HIF_TYPE_SDIO:
1463                 return "sdio";
1464         case ATH6KL_HIF_TYPE_USB:
1465                 return "usb";
1466         }
1467
1468         return NULL;
1469 }
1470
1471 int ath6kl_init_hw_start(struct ath6kl *ar)
1472 {
1473         long timeleft;
1474         int ret, i;
1475
1476         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1477
1478         ret = ath6kl_hif_power_on(ar);
1479         if (ret)
1480                 return ret;
1481
1482         ret = ath6kl_configure_target(ar);
1483         if (ret)
1484                 goto err_power_off;
1485
1486         ret = ath6kl_init_upload(ar);
1487         if (ret)
1488                 goto err_power_off;
1489
1490         /* Do we need to finish the BMI phase */
1491         /* FIXME: return error from ath6kl_bmi_done() */
1492         if (ath6kl_bmi_done(ar)) {
1493                 ret = -EIO;
1494                 goto err_power_off;
1495         }
1496
1497         /*
1498          * The reason we have to wait for the target here is that the
1499          * driver layer has to init BMI in order to set the host block
1500          * size.
1501          */
1502         if (ath6kl_htc_wait_target(ar->htc_target)) {
1503                 ret = -EIO;
1504                 goto err_power_off;
1505         }
1506
1507         if (ath6kl_init_service_ep(ar)) {
1508                 ret = -EIO;
1509                 goto err_cleanup_scatter;
1510         }
1511
1512         /* setup credit distribution */
1513         ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1514
1515         /* start HTC */
1516         ret = ath6kl_htc_start(ar->htc_target);
1517         if (ret) {
1518                 /* FIXME: call this */
1519                 ath6kl_cookie_cleanup(ar);
1520                 goto err_cleanup_scatter;
1521         }
1522
1523         /* Wait for Wmi event to be ready */
1524         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1525                                                     test_bit(WMI_READY,
1526                                                              &ar->flag),
1527                                                     WMI_TIMEOUT);
1528
1529         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1530
1531
1532         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1533                 ath6kl_info("%s %s fw %s api %d%s\n",
1534                             ar->hw.name,
1535                             ath6kl_init_get_hif_name(ar->hif_type),
1536                             ar->wiphy->fw_version,
1537                             ar->fw_api,
1538                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1539         }
1540
1541         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1542                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1543                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1544                 ret = -EIO;
1545                 goto err_htc_stop;
1546         }
1547
1548         if (!timeleft || signal_pending(current)) {
1549                 ath6kl_err("wmi is not ready or wait was interrupted\n");
1550                 ret = -EIO;
1551                 goto err_htc_stop;
1552         }
1553
1554         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1555
1556         /* communicate the wmi protocol verision to the target */
1557         /* FIXME: return error */
1558         if ((ath6kl_set_host_app_area(ar)) != 0)
1559                 ath6kl_err("unable to set the host app area\n");
1560
1561         for (i = 0; i < ar->vif_max; i++) {
1562                 ret = ath6kl_target_config_wlan_params(ar, i);
1563                 if (ret)
1564                         goto err_htc_stop;
1565         }
1566
1567         ar->state = ATH6KL_STATE_ON;
1568
1569         return 0;
1570
1571 err_htc_stop:
1572         ath6kl_htc_stop(ar->htc_target);
1573 err_cleanup_scatter:
1574         ath6kl_hif_cleanup_scatter(ar);
1575 err_power_off:
1576         ath6kl_hif_power_off(ar);
1577
1578         return ret;
1579 }
1580
1581 int ath6kl_init_hw_stop(struct ath6kl *ar)
1582 {
1583         int ret;
1584
1585         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1586
1587         ath6kl_htc_stop(ar->htc_target);
1588
1589         ath6kl_hif_stop(ar);
1590
1591         ath6kl_bmi_reset(ar);
1592
1593         ret = ath6kl_hif_power_off(ar);
1594         if (ret)
1595                 ath6kl_warn("failed to power off hif: %d\n", ret);
1596
1597         ar->state = ATH6KL_STATE_OFF;
1598
1599         return 0;
1600 }
1601
1602 /* FIXME: move this to cfg80211.c and rename to ath6kl_cfg80211_vif_stop() */
1603 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
1604 {
1605         static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1606         bool discon_issued;
1607
1608         netif_stop_queue(vif->ndev);
1609
1610         clear_bit(WLAN_ENABLED, &vif->flags);
1611
1612         if (wmi_ready) {
1613                 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1614                                 test_bit(CONNECT_PEND, &vif->flags);
1615                 ath6kl_disconnect(vif);
1616                 del_timer(&vif->disconnect_timer);
1617
1618                 if (discon_issued)
1619                         ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1620                                                 (vif->nw_type & AP_NETWORK) ?
1621                                                 bcast_mac : vif->bssid,
1622                                                 0, NULL, 0);
1623         }
1624
1625         if (vif->scan_req) {
1626                 cfg80211_scan_done(vif->scan_req, true);
1627                 vif->scan_req = NULL;
1628         }
1629 }
1630
1631 void ath6kl_stop_txrx(struct ath6kl *ar)
1632 {
1633         struct ath6kl_vif *vif, *tmp_vif;
1634         int i;
1635
1636         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1637
1638         if (down_interruptible(&ar->sem)) {
1639                 ath6kl_err("down_interruptible failed\n");
1640                 return;
1641         }
1642
1643         for (i = 0; i < AP_MAX_NUM_STA; i++)
1644                 aggr_reset_state(ar->sta_list[i].aggr_conn);
1645
1646         spin_lock_bh(&ar->list_lock);
1647         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1648                 list_del(&vif->list);
1649                 spin_unlock_bh(&ar->list_lock);
1650                 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
1651                 rtnl_lock();
1652                 ath6kl_cfg80211_vif_cleanup(vif);
1653                 rtnl_unlock();
1654                 spin_lock_bh(&ar->list_lock);
1655         }
1656         spin_unlock_bh(&ar->list_lock);
1657
1658         clear_bit(WMI_READY, &ar->flag);
1659
1660         /*
1661          * After wmi_shudown all WMI events will be dropped. We
1662          * need to cleanup the buffers allocated in AP mode and
1663          * give disconnect notification to stack, which usually
1664          * happens in the disconnect_event. Simulate the disconnect
1665          * event by calling the function directly. Sometimes
1666          * disconnect_event will be received when the debug logs
1667          * are collected.
1668          */
1669         ath6kl_wmi_shutdown(ar->wmi);
1670
1671         clear_bit(WMI_ENABLED, &ar->flag);
1672         if (ar->htc_target) {
1673                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1674                 ath6kl_htc_stop(ar->htc_target);
1675         }
1676
1677         /*
1678          * Try to reset the device if we can. The driver may have been
1679          * configure NOT to reset the target during a debug session.
1680          */
1681         ath6kl_dbg(ATH6KL_DBG_TRC,
1682                    "attempting to reset target on instance destroy\n");
1683         ath6kl_reset_device(ar, ar->target_type, true, true);
1684
1685         clear_bit(WLAN_ENABLED, &ar->flag);
1686
1687         up(&ar->sem);
1688 }
1689 EXPORT_SYMBOL(ath6kl_stop_txrx);