d5ef211f261c2c19e6e8deeef985dc2b83130794
[cascardo/linux.git] / drivers / net / wireless / ath / ath6kl / init.c
1
2 /*
3  * Copyright (c) 2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5  *
6  * Permission to use, copy, modify, and/or distribute this software for any
7  * purpose with or without fee is hereby granted, provided that the above
8  * copyright notice and this permission notice appear in all copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17  */
18
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21 #include <linux/moduleparam.h>
22 #include <linux/errno.h>
23 #include <linux/export.h>
24 #include <linux/of.h>
25 #include <linux/mmc/sdio_func.h>
26 #include <linux/vmalloc.h>
27
28 #include "core.h"
29 #include "cfg80211.h"
30 #include "target.h"
31 #include "debug.h"
32 #include "hif-ops.h"
33 #include "htc-ops.h"
34
35 static const struct ath6kl_hw hw_list[] = {
36         {
37                 .id                             = AR6003_HW_2_0_VERSION,
38                 .name                           = "ar6003 hw 2.0",
39                 .dataset_patch_addr             = 0x57e884,
40                 .app_load_addr                  = 0x543180,
41                 .board_ext_data_addr            = 0x57e500,
42                 .reserved_ram_size              = 6912,
43                 .refclk_hz                      = 26000000,
44                 .uarttx_pin                     = 8,
45                 .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
46
47                 /* hw2.0 needs override address hardcoded */
48                 .app_start_override_addr        = 0x944C00,
49
50                 .fw = {
51                         .dir            = AR6003_HW_2_0_FW_DIR,
52                         .otp            = AR6003_HW_2_0_OTP_FILE,
53                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
54                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
55                         .patch          = AR6003_HW_2_0_PATCH_FILE,
56                 },
57
58                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
59                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
60         },
61         {
62                 .id                             = AR6003_HW_2_1_1_VERSION,
63                 .name                           = "ar6003 hw 2.1.1",
64                 .dataset_patch_addr             = 0x57ff74,
65                 .app_load_addr                  = 0x1234,
66                 .board_ext_data_addr            = 0x542330,
67                 .reserved_ram_size              = 512,
68                 .refclk_hz                      = 26000000,
69                 .uarttx_pin                     = 8,
70                 .testscript_addr                = 0x57ef74,
71                 .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
72
73                 .fw = {
74                         .dir            = AR6003_HW_2_1_1_FW_DIR,
75                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
76                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
77                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
78                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
79                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
80                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
81                 },
82
83                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
84                 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
85         },
86         {
87                 .id                             = AR6004_HW_1_0_VERSION,
88                 .name                           = "ar6004 hw 1.0",
89                 .dataset_patch_addr             = 0x57e884,
90                 .app_load_addr                  = 0x1234,
91                 .board_ext_data_addr            = 0x437000,
92                 .reserved_ram_size              = 19456,
93                 .board_addr                     = 0x433900,
94                 .refclk_hz                      = 26000000,
95                 .uarttx_pin                     = 11,
96                 .flags                          = ATH6KL_HW_64BIT_RATES |
97                                                   ATH6KL_HW_AP_INACTIVITY_MINS,
98
99                 .fw = {
100                         .dir            = AR6004_HW_1_0_FW_DIR,
101                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
102                 },
103
104                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
105                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
106         },
107         {
108                 .id                             = AR6004_HW_1_1_VERSION,
109                 .name                           = "ar6004 hw 1.1",
110                 .dataset_patch_addr             = 0x57e884,
111                 .app_load_addr                  = 0x1234,
112                 .board_ext_data_addr            = 0x437000,
113                 .reserved_ram_size              = 11264,
114                 .board_addr                     = 0x43d400,
115                 .refclk_hz                      = 40000000,
116                 .uarttx_pin                     = 11,
117                 .flags                          = ATH6KL_HW_64BIT_RATES |
118                                                   ATH6KL_HW_AP_INACTIVITY_MINS,
119                 .fw = {
120                         .dir            = AR6004_HW_1_1_FW_DIR,
121                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
122                 },
123
124                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
125                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
126         },
127         {
128                 .id                             = AR6004_HW_1_2_VERSION,
129                 .name                           = "ar6004 hw 1.2",
130                 .dataset_patch_addr             = 0x436ecc,
131                 .app_load_addr                  = 0x1234,
132                 .board_ext_data_addr            = 0x437000,
133                 .reserved_ram_size              = 9216,
134                 .board_addr                     = 0x435c00,
135                 .refclk_hz                      = 40000000,
136                 .uarttx_pin                     = 11,
137                 .flags                          = ATH6KL_HW_64BIT_RATES |
138                                                   ATH6KL_HW_AP_INACTIVITY_MINS,
139
140                 .fw = {
141                         .dir            = AR6004_HW_1_2_FW_DIR,
142                         .fw             = AR6004_HW_1_2_FIRMWARE_FILE,
143                 },
144                 .fw_board               = AR6004_HW_1_2_BOARD_DATA_FILE,
145                 .fw_default_board       = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
146         },
147         {
148                 .id                             = AR6004_HW_1_3_VERSION,
149                 .name                           = "ar6004 hw 1.3",
150                 .dataset_patch_addr             = 0x437860,
151                 .app_load_addr                  = 0x1234,
152                 .board_ext_data_addr            = 0x437000,
153                 .reserved_ram_size              = 7168,
154                 .board_addr                     = 0x436400,
155                 .refclk_hz                      = 40000000,
156                 .uarttx_pin                     = 11,
157                 .flags                          = ATH6KL_HW_64BIT_RATES |
158                                                   ATH6KL_HW_AP_INACTIVITY_MINS |
159                                                   ATH6KL_HW_MAP_LP_ENDPOINT,
160
161                 .fw = {
162                         .dir            = AR6004_HW_1_3_FW_DIR,
163                         .fw             = AR6004_HW_1_3_FIRMWARE_FILE,
164                 },
165
166                 .fw_board               = AR6004_HW_1_3_BOARD_DATA_FILE,
167                 .fw_default_board       = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
168         },
169 };
170
171 /*
172  * Include definitions here that can be used to tune the WLAN module
173  * behavior. Different customers can tune the behavior as per their needs,
174  * here.
175  */
176
177 /*
178  * This configuration item enable/disable keepalive support.
179  * Keepalive support: In the absence of any data traffic to AP, null
180  * frames will be sent to the AP at periodic interval, to keep the association
181  * active. This configuration item defines the periodic interval.
182  * Use value of zero to disable keepalive support
183  * Default: 60 seconds
184  */
185 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
186
187 /*
188  * This configuration item sets the value of disconnect timeout
189  * Firmware delays sending the disconnec event to the host for this
190  * timeout after is gets disconnected from the current AP.
191  * If the firmware successly roams within the disconnect timeout
192  * it sends a new connect event
193  */
194 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
195
196
197 #define ATH6KL_DATA_OFFSET    64
198 struct sk_buff *ath6kl_buf_alloc(int size)
199 {
200         struct sk_buff *skb;
201         u16 reserved;
202
203         /* Add chacheline space at front and back of buffer */
204         reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
205                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
206         skb = dev_alloc_skb(size + reserved);
207
208         if (skb)
209                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
210         return skb;
211 }
212
213 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
214 {
215         vif->ssid_len = 0;
216         memset(vif->ssid, 0, sizeof(vif->ssid));
217
218         vif->dot11_auth_mode = OPEN_AUTH;
219         vif->auth_mode = NONE_AUTH;
220         vif->prwise_crypto = NONE_CRYPT;
221         vif->prwise_crypto_len = 0;
222         vif->grp_crypto = NONE_CRYPT;
223         vif->grp_crypto_len = 0;
224         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
225         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
226         memset(vif->bssid, 0, sizeof(vif->bssid));
227         vif->bss_ch = 0;
228 }
229
230 static int ath6kl_set_host_app_area(struct ath6kl *ar)
231 {
232         u32 address, data;
233         struct host_app_area host_app_area;
234
235         /* Fetch the address of the host_app_area_s
236          * instance in the host interest area */
237         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
238         address = TARG_VTOP(ar->target_type, address);
239
240         if (ath6kl_diag_read32(ar, address, &data))
241                 return -EIO;
242
243         address = TARG_VTOP(ar->target_type, data);
244         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
245         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
246                               sizeof(struct host_app_area)))
247                 return -EIO;
248
249         return 0;
250 }
251
252 static inline void set_ac2_ep_map(struct ath6kl *ar,
253                                   u8 ac,
254                                   enum htc_endpoint_id ep)
255 {
256         ar->ac2ep_map[ac] = ep;
257         ar->ep2ac_map[ep] = ac;
258 }
259
260 /* connect to a service */
261 static int ath6kl_connectservice(struct ath6kl *ar,
262                                  struct htc_service_connect_req  *con_req,
263                                  char *desc)
264 {
265         int status;
266         struct htc_service_connect_resp response;
267
268         memset(&response, 0, sizeof(response));
269
270         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
271         if (status) {
272                 ath6kl_err("failed to connect to %s service status:%d\n",
273                            desc, status);
274                 return status;
275         }
276
277         switch (con_req->svc_id) {
278         case WMI_CONTROL_SVC:
279                 if (test_bit(WMI_ENABLED, &ar->flag))
280                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
281                 ar->ctrl_ep = response.endpoint;
282                 break;
283         case WMI_DATA_BE_SVC:
284                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
285                 break;
286         case WMI_DATA_BK_SVC:
287                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
288                 break;
289         case WMI_DATA_VI_SVC:
290                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
291                 break;
292         case WMI_DATA_VO_SVC:
293                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
294                 break;
295         default:
296                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
297                 return -EINVAL;
298         }
299
300         return 0;
301 }
302
303 static int ath6kl_init_service_ep(struct ath6kl *ar)
304 {
305         struct htc_service_connect_req connect;
306
307         memset(&connect, 0, sizeof(connect));
308
309         /* these fields are the same for all service endpoints */
310         connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
311         connect.ep_cb.rx = ath6kl_rx;
312         connect.ep_cb.rx_refill = ath6kl_rx_refill;
313         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
314
315         /*
316          * Set the max queue depth so that our ath6kl_tx_queue_full handler
317          * gets called.
318         */
319         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
320         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
321         if (!connect.ep_cb.rx_refill_thresh)
322                 connect.ep_cb.rx_refill_thresh++;
323
324         /* connect to control service */
325         connect.svc_id = WMI_CONTROL_SVC;
326         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
327                 return -EIO;
328
329         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
330
331         /*
332          * Limit the HTC message size on the send path, although e can
333          * receive A-MSDU frames of 4K, we will only send ethernet-sized
334          * (802.3) frames on the send path.
335          */
336         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
337
338         /*
339          * To reduce the amount of committed memory for larger A_MSDU
340          * frames, use the recv-alloc threshold mechanism for larger
341          * packets.
342          */
343         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
344         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
345
346         /*
347          * For the remaining data services set the connection flag to
348          * reduce dribbling, if configured to do so.
349          */
350         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
351         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
352         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
353
354         connect.svc_id = WMI_DATA_BE_SVC;
355
356         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
357                 return -EIO;
358
359         /* connect to back-ground map this to WMI LOW_PRI */
360         connect.svc_id = WMI_DATA_BK_SVC;
361         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
362                 return -EIO;
363
364         /* connect to Video service, map this to HI PRI */
365         connect.svc_id = WMI_DATA_VI_SVC;
366         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
367                 return -EIO;
368
369         /*
370          * Connect to VO service, this is currently not mapped to a WMI
371          * priority stream due to historical reasons. WMI originally
372          * defined 3 priorities over 3 mailboxes We can change this when
373          * WMI is reworked so that priorities are not dependent on
374          * mailboxes.
375          */
376         connect.svc_id = WMI_DATA_VO_SVC;
377         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
378                 return -EIO;
379
380         return 0;
381 }
382
383 void ath6kl_init_control_info(struct ath6kl_vif *vif)
384 {
385         ath6kl_init_profile_info(vif);
386         vif->def_txkey_index = 0;
387         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
388         vif->ch_hint = 0;
389 }
390
391 /*
392  * Set HTC/Mbox operational parameters, this can only be called when the
393  * target is in the BMI phase.
394  */
395 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
396                                  u8 htc_ctrl_buf)
397 {
398         int status;
399         u32 blk_size;
400
401         blk_size = ar->mbox_info.block_size;
402
403         if (htc_ctrl_buf)
404                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
405
406         /* set the host interest area for the block size */
407         status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
408         if (status) {
409                 ath6kl_err("bmi_write_memory for IO block size failed\n");
410                 goto out;
411         }
412
413         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
414                    blk_size,
415                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
416
417         if (mbox_isr_yield_val) {
418                 /* set the host interest area for the mbox ISR yield limit */
419                 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
420                                                mbox_isr_yield_val);
421                 if (status) {
422                         ath6kl_err("bmi_write_memory for yield limit failed\n");
423                         goto out;
424                 }
425         }
426
427 out:
428         return status;
429 }
430
431 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
432 {
433         int ret;
434
435         /*
436          * Configure the device for rx dot11 header rules. "0,0" are the
437          * default values. Required if checksum offload is needed. Set
438          * RxMetaVersion to 2.
439          */
440         ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
441                                                  ar->rx_meta_ver, 0, 0);
442         if (ret) {
443                 ath6kl_err("unable to set the rx frame format: %d\n", ret);
444                 return ret;
445         }
446
447         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
448                 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
449                                               IGNORE_PS_FAIL_DURING_SCAN);
450                 if (ret) {
451                         ath6kl_err("unable to set power save fail event policy: %d\n",
452                                    ret);
453                         return ret;
454                 }
455         }
456
457         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
458                 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
459                                                    WMI_FOLLOW_BARKER_IN_ERP);
460                 if (ret) {
461                         ath6kl_err("unable to set barker preamble policy: %d\n",
462                                    ret);
463                         return ret;
464                 }
465         }
466
467         ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
468                                            WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
469         if (ret) {
470                 ath6kl_err("unable to set keep alive interval: %d\n", ret);
471                 return ret;
472         }
473
474         ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
475                                          WLAN_CONFIG_DISCONNECT_TIMEOUT);
476         if (ret) {
477                 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
478                 return ret;
479         }
480
481         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
482                 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
483                 if (ret) {
484                         ath6kl_err("unable to set txop bursting: %d\n", ret);
485                         return ret;
486                 }
487         }
488
489         if (ar->p2p && (ar->vif_max == 1 || idx)) {
490                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
491                                               P2P_FLAG_CAPABILITIES_REQ |
492                                               P2P_FLAG_MACADDR_REQ |
493                                               P2P_FLAG_HMODEL_REQ);
494                 if (ret) {
495                         ath6kl_dbg(ATH6KL_DBG_TRC,
496                                    "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
497                                    ret);
498                         ar->p2p = false;
499                 }
500         }
501
502         if (ar->p2p && (ar->vif_max == 1 || idx)) {
503                 /* Enable Probe Request reporting for P2P */
504                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
505                 if (ret) {
506                         ath6kl_dbg(ATH6KL_DBG_TRC,
507                                    "failed to enable Probe Request reporting (%d)\n",
508                                    ret);
509                 }
510         }
511
512         return ret;
513 }
514
515 int ath6kl_configure_target(struct ath6kl *ar)
516 {
517         u32 param, ram_reserved_size;
518         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
519         int i, status;
520
521         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
522         if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
523                 ath6kl_err("bmi_write_memory for uart debug failed\n");
524                 return -EIO;
525         }
526
527         /*
528          * Note: Even though the firmware interface type is
529          * chosen as BSS_STA for all three interfaces, can
530          * be configured to IBSS/AP as long as the fw submode
531          * remains normal mode (0 - AP, STA and IBSS). But
532          * due to an target assert in firmware only one interface is
533          * configured for now.
534          */
535         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
536
537         for (i = 0; i < ar->vif_max; i++)
538                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
539
540         /*
541          * Submodes when fw does not support dynamic interface
542          * switching:
543          *              vif[0] - AP/STA/IBSS
544          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
545          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
546          * Otherwise, All the interface are initialized to p2p dev.
547          */
548
549         if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
550                      ar->fw_capabilities)) {
551                 for (i = 0; i < ar->vif_max; i++)
552                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
553                                 (i * HI_OPTION_FW_SUBMODE_BITS);
554         } else {
555                 for (i = 0; i < ar->max_norm_iface; i++)
556                         fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
557                                 (i * HI_OPTION_FW_SUBMODE_BITS);
558
559                 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
560                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
561                                 (i * HI_OPTION_FW_SUBMODE_BITS);
562
563                 if (ar->p2p && ar->vif_max == 1)
564                         fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
565         }
566
567         if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
568                                   HTC_PROTOCOL_VERSION) != 0) {
569                 ath6kl_err("bmi_write_memory for htc version failed\n");
570                 return -EIO;
571         }
572
573         /* set the firmware mode to STA/IBSS/AP */
574         param = 0;
575
576         if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
577                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
578                 return -EIO;
579         }
580
581         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
582         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
583         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
584
585         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
586         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
587
588         if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
589                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
590                 return -EIO;
591         }
592
593         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
594
595         /*
596          * Hardcode the address use for the extended board data
597          * Ideally this should be pre-allocate by the OS at boot time
598          * But since it is a new feature and board data is loaded
599          * at init time, we have to workaround this from host.
600          * It is difficult to patch the firmware boot code,
601          * but possible in theory.
602          */
603
604         if (ar->target_type == TARGET_TYPE_AR6003) {
605                 param = ar->hw.board_ext_data_addr;
606                 ram_reserved_size = ar->hw.reserved_ram_size;
607
608                 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
609                         ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
610                         return -EIO;
611                 }
612
613                 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
614                                           ram_reserved_size) != 0) {
615                         ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
616                         return -EIO;
617                 }
618         }
619
620         /* set the block size for the target */
621         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
622                 /* use default number of control buffers */
623                 return -EIO;
624
625         /* Configure GPIO AR600x UART */
626         status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
627                                        ar->hw.uarttx_pin);
628         if (status)
629                 return status;
630
631         /* Configure target refclk_hz */
632         status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz, ar->hw.refclk_hz);
633         if (status)
634                 return status;
635
636         return 0;
637 }
638
639 /* firmware upload */
640 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
641                          u8 **fw, size_t *fw_len)
642 {
643         const struct firmware *fw_entry;
644         int ret;
645
646         ret = request_firmware(&fw_entry, filename, ar->dev);
647         if (ret)
648                 return ret;
649
650         *fw_len = fw_entry->size;
651         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
652
653         if (*fw == NULL)
654                 ret = -ENOMEM;
655
656         release_firmware(fw_entry);
657
658         return ret;
659 }
660
661 #ifdef CONFIG_OF
662 /*
663  * Check the device tree for a board-id and use it to construct
664  * the pathname to the firmware file.  Used (for now) to find a
665  * fallback to the "bdata.bin" file--typically a symlink to the
666  * appropriate board-specific file.
667  */
668 static bool check_device_tree(struct ath6kl *ar)
669 {
670         static const char *board_id_prop = "atheros,board-id";
671         struct device_node *node;
672         char board_filename[64];
673         const char *board_id;
674         int ret;
675
676         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
677                 board_id = of_get_property(node, board_id_prop, NULL);
678                 if (board_id == NULL) {
679                         ath6kl_warn("No \"%s\" property on %s node.\n",
680                                     board_id_prop, node->name);
681                         continue;
682                 }
683                 snprintf(board_filename, sizeof(board_filename),
684                          "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
685
686                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
687                                     &ar->fw_board_len);
688                 if (ret) {
689                         ath6kl_err("Failed to get DT board file %s: %d\n",
690                                    board_filename, ret);
691                         continue;
692                 }
693                 return true;
694         }
695         return false;
696 }
697 #else
698 static bool check_device_tree(struct ath6kl *ar)
699 {
700         return false;
701 }
702 #endif /* CONFIG_OF */
703
704 static int ath6kl_fetch_board_file(struct ath6kl *ar)
705 {
706         const char *filename;
707         int ret;
708
709         if (ar->fw_board != NULL)
710                 return 0;
711
712         if (WARN_ON(ar->hw.fw_board == NULL))
713                 return -EINVAL;
714
715         filename = ar->hw.fw_board;
716
717         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
718                             &ar->fw_board_len);
719         if (ret == 0) {
720                 /* managed to get proper board file */
721                 return 0;
722         }
723
724         if (check_device_tree(ar)) {
725                 /* got board file from device tree */
726                 return 0;
727         }
728
729         /* there was no proper board file, try to use default instead */
730         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
731                     filename, ret);
732
733         filename = ar->hw.fw_default_board;
734
735         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
736                             &ar->fw_board_len);
737         if (ret) {
738                 ath6kl_err("Failed to get default board file %s: %d\n",
739                            filename, ret);
740                 return ret;
741         }
742
743         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
744         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
745
746         return 0;
747 }
748
749 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
750 {
751         char filename[100];
752         int ret;
753
754         if (ar->fw_otp != NULL)
755                 return 0;
756
757         if (ar->hw.fw.otp == NULL) {
758                 ath6kl_dbg(ATH6KL_DBG_BOOT,
759                            "no OTP file configured for this hw\n");
760                 return 0;
761         }
762
763         snprintf(filename, sizeof(filename), "%s/%s",
764                  ar->hw.fw.dir, ar->hw.fw.otp);
765
766         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
767                             &ar->fw_otp_len);
768         if (ret) {
769                 ath6kl_err("Failed to get OTP file %s: %d\n",
770                            filename, ret);
771                 return ret;
772         }
773
774         return 0;
775 }
776
777 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
778 {
779         char filename[100];
780         int ret;
781
782         if (ar->testmode == 0)
783                 return 0;
784
785         ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
786
787         if (ar->testmode == 2) {
788                 if (ar->hw.fw.utf == NULL) {
789                         ath6kl_warn("testmode 2 not supported\n");
790                         return -EOPNOTSUPP;
791                 }
792
793                 snprintf(filename, sizeof(filename), "%s/%s",
794                          ar->hw.fw.dir, ar->hw.fw.utf);
795         } else {
796                 if (ar->hw.fw.tcmd == NULL) {
797                         ath6kl_warn("testmode 1 not supported\n");
798                         return -EOPNOTSUPP;
799                 }
800
801                 snprintf(filename, sizeof(filename), "%s/%s",
802                          ar->hw.fw.dir, ar->hw.fw.tcmd);
803         }
804
805         set_bit(TESTMODE, &ar->flag);
806
807         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
808         if (ret) {
809                 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
810                            ar->testmode, filename, ret);
811                 return ret;
812         }
813
814         return 0;
815 }
816
817 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
818 {
819         char filename[100];
820         int ret;
821
822         if (ar->fw != NULL)
823                 return 0;
824
825         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
826         if (WARN_ON(ar->hw.fw.fw == NULL))
827                 return -EINVAL;
828
829         snprintf(filename, sizeof(filename), "%s/%s",
830                  ar->hw.fw.dir, ar->hw.fw.fw);
831
832         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
833         if (ret) {
834                 ath6kl_err("Failed to get firmware file %s: %d\n",
835                            filename, ret);
836                 return ret;
837         }
838
839         return 0;
840 }
841
842 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
843 {
844         char filename[100];
845         int ret;
846
847         if (ar->fw_patch != NULL)
848                 return 0;
849
850         if (ar->hw.fw.patch == NULL)
851                 return 0;
852
853         snprintf(filename, sizeof(filename), "%s/%s",
854                  ar->hw.fw.dir, ar->hw.fw.patch);
855
856         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
857                             &ar->fw_patch_len);
858         if (ret) {
859                 ath6kl_err("Failed to get patch file %s: %d\n",
860                            filename, ret);
861                 return ret;
862         }
863
864         return 0;
865 }
866
867 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
868 {
869         char filename[100];
870         int ret;
871
872         if (ar->testmode != 2)
873                 return 0;
874
875         if (ar->fw_testscript != NULL)
876                 return 0;
877
878         if (ar->hw.fw.testscript == NULL)
879                 return 0;
880
881         snprintf(filename, sizeof(filename), "%s/%s",
882                  ar->hw.fw.dir, ar->hw.fw.testscript);
883
884         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
885                                 &ar->fw_testscript_len);
886         if (ret) {
887                 ath6kl_err("Failed to get testscript file %s: %d\n",
888                            filename, ret);
889                 return ret;
890         }
891
892         return 0;
893 }
894
895 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
896 {
897         int ret;
898
899         ret = ath6kl_fetch_otp_file(ar);
900         if (ret)
901                 return ret;
902
903         ret = ath6kl_fetch_fw_file(ar);
904         if (ret)
905                 return ret;
906
907         ret = ath6kl_fetch_patch_file(ar);
908         if (ret)
909                 return ret;
910
911         ret = ath6kl_fetch_testscript_file(ar);
912         if (ret)
913                 return ret;
914
915         return 0;
916 }
917
918 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
919 {
920         size_t magic_len, len, ie_len;
921         const struct firmware *fw;
922         struct ath6kl_fw_ie *hdr;
923         char filename[100];
924         const u8 *data;
925         int ret, ie_id, i, index, bit;
926         __le32 *val;
927
928         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
929
930         ret = request_firmware(&fw, filename, ar->dev);
931         if (ret)
932                 return ret;
933
934         data = fw->data;
935         len = fw->size;
936
937         /* magic also includes the null byte, check that as well */
938         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
939
940         if (len < magic_len) {
941                 ret = -EINVAL;
942                 goto out;
943         }
944
945         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
946                 ret = -EINVAL;
947                 goto out;
948         }
949
950         len -= magic_len;
951         data += magic_len;
952
953         /* loop elements */
954         while (len > sizeof(struct ath6kl_fw_ie)) {
955                 /* hdr is unaligned! */
956                 hdr = (struct ath6kl_fw_ie *) data;
957
958                 ie_id = le32_to_cpup(&hdr->id);
959                 ie_len = le32_to_cpup(&hdr->len);
960
961                 len -= sizeof(*hdr);
962                 data += sizeof(*hdr);
963
964                 if (len < ie_len) {
965                         ret = -EINVAL;
966                         goto out;
967                 }
968
969                 switch (ie_id) {
970                 case ATH6KL_FW_IE_FW_VERSION:
971                         strlcpy(ar->wiphy->fw_version, data,
972                                 sizeof(ar->wiphy->fw_version));
973
974                         ath6kl_dbg(ATH6KL_DBG_BOOT,
975                                    "found fw version %s\n",
976                                     ar->wiphy->fw_version);
977                         break;
978                 case ATH6KL_FW_IE_OTP_IMAGE:
979                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
980                                    ie_len);
981
982                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
983
984                         if (ar->fw_otp == NULL) {
985                                 ret = -ENOMEM;
986                                 goto out;
987                         }
988
989                         ar->fw_otp_len = ie_len;
990                         break;
991                 case ATH6KL_FW_IE_FW_IMAGE:
992                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
993                                    ie_len);
994
995                         /* in testmode we already might have a fw file */
996                         if (ar->fw != NULL)
997                                 break;
998
999                         ar->fw = vmalloc(ie_len);
1000
1001                         if (ar->fw == NULL) {
1002                                 ret = -ENOMEM;
1003                                 goto out;
1004                         }
1005
1006                         memcpy(ar->fw, data, ie_len);
1007                         ar->fw_len = ie_len;
1008                         break;
1009                 case ATH6KL_FW_IE_PATCH_IMAGE:
1010                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1011                                    ie_len);
1012
1013                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1014
1015                         if (ar->fw_patch == NULL) {
1016                                 ret = -ENOMEM;
1017                                 goto out;
1018                         }
1019
1020                         ar->fw_patch_len = ie_len;
1021                         break;
1022                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1023                         val = (__le32 *) data;
1024                         ar->hw.reserved_ram_size = le32_to_cpup(val);
1025
1026                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1027                                    "found reserved ram size ie 0x%d\n",
1028                                    ar->hw.reserved_ram_size);
1029                         break;
1030                 case ATH6KL_FW_IE_CAPABILITIES:
1031                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1032                                    "found firmware capabilities ie (%zd B)\n",
1033                                    ie_len);
1034
1035                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1036                                 index = i / 8;
1037                                 bit = i % 8;
1038
1039                                 if (index == ie_len)
1040                                         break;
1041
1042                                 if (data[index] & (1 << bit))
1043                                         __set_bit(i, ar->fw_capabilities);
1044                         }
1045
1046                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1047                                         ar->fw_capabilities,
1048                                         sizeof(ar->fw_capabilities));
1049                         break;
1050                 case ATH6KL_FW_IE_PATCH_ADDR:
1051                         if (ie_len != sizeof(*val))
1052                                 break;
1053
1054                         val = (__le32 *) data;
1055                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
1056
1057                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1058                                    "found patch address ie 0x%x\n",
1059                                    ar->hw.dataset_patch_addr);
1060                         break;
1061                 case ATH6KL_FW_IE_BOARD_ADDR:
1062                         if (ie_len != sizeof(*val))
1063                                 break;
1064
1065                         val = (__le32 *) data;
1066                         ar->hw.board_addr = le32_to_cpup(val);
1067
1068                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1069                                    "found board address ie 0x%x\n",
1070                                    ar->hw.board_addr);
1071                         break;
1072                 case ATH6KL_FW_IE_VIF_MAX:
1073                         if (ie_len != sizeof(*val))
1074                                 break;
1075
1076                         val = (__le32 *) data;
1077                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1078                                             ATH6KL_VIF_MAX);
1079
1080                         if (ar->vif_max > 1 && !ar->p2p)
1081                                 ar->max_norm_iface = 2;
1082
1083                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1084                                    "found vif max ie %d\n", ar->vif_max);
1085                         break;
1086                 default:
1087                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1088                                    le32_to_cpup(&hdr->id));
1089                         break;
1090                 }
1091
1092                 len -= ie_len;
1093                 data += ie_len;
1094         };
1095
1096         ret = 0;
1097 out:
1098         release_firmware(fw);
1099
1100         return ret;
1101 }
1102
1103 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1104 {
1105         int ret;
1106
1107         ret = ath6kl_fetch_board_file(ar);
1108         if (ret)
1109                 return ret;
1110
1111         ret = ath6kl_fetch_testmode_file(ar);
1112         if (ret)
1113                 return ret;
1114
1115         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1116         if (ret == 0) {
1117                 ar->fw_api = 4;
1118                 goto out;
1119         }
1120
1121         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1122         if (ret == 0) {
1123                 ar->fw_api = 3;
1124                 goto out;
1125         }
1126
1127         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1128         if (ret == 0) {
1129                 ar->fw_api = 2;
1130                 goto out;
1131         }
1132
1133         ret = ath6kl_fetch_fw_api1(ar);
1134         if (ret)
1135                 return ret;
1136
1137         ar->fw_api = 1;
1138
1139 out:
1140         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1141
1142         return 0;
1143 }
1144
1145 static int ath6kl_upload_board_file(struct ath6kl *ar)
1146 {
1147         u32 board_address, board_ext_address, param;
1148         u32 board_data_size, board_ext_data_size;
1149         int ret;
1150
1151         if (WARN_ON(ar->fw_board == NULL))
1152                 return -ENOENT;
1153
1154         /*
1155          * Determine where in Target RAM to write Board Data.
1156          * For AR6004, host determine Target RAM address for
1157          * writing board data.
1158          */
1159         if (ar->hw.board_addr != 0) {
1160                 board_address = ar->hw.board_addr;
1161                 ath6kl_bmi_write_hi32(ar, hi_board_data,
1162                                       board_address);
1163         } else {
1164                 ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1165         }
1166
1167         /* determine where in target ram to write extended board data */
1168         ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1169
1170         if (ar->target_type == TARGET_TYPE_AR6003 &&
1171             board_ext_address == 0) {
1172                 ath6kl_err("Failed to get board file target address.\n");
1173                 return -EINVAL;
1174         }
1175
1176         switch (ar->target_type) {
1177         case TARGET_TYPE_AR6003:
1178                 board_data_size = AR6003_BOARD_DATA_SZ;
1179                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1180                 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1181                         board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1182                 break;
1183         case TARGET_TYPE_AR6004:
1184                 board_data_size = AR6004_BOARD_DATA_SZ;
1185                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1186                 break;
1187         default:
1188                 WARN_ON(1);
1189                 return -EINVAL;
1190                 break;
1191         }
1192
1193         if (board_ext_address &&
1194             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1195                 /* write extended board data */
1196                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1197                            "writing extended board data to 0x%x (%d B)\n",
1198                            board_ext_address, board_ext_data_size);
1199
1200                 ret = ath6kl_bmi_write(ar, board_ext_address,
1201                                        ar->fw_board + board_data_size,
1202                                        board_ext_data_size);
1203                 if (ret) {
1204                         ath6kl_err("Failed to write extended board data: %d\n",
1205                                    ret);
1206                         return ret;
1207                 }
1208
1209                 /* record that extended board data is initialized */
1210                 param = (board_ext_data_size << 16) | 1;
1211
1212                 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1213         }
1214
1215         if (ar->fw_board_len < board_data_size) {
1216                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1217                 ret = -EINVAL;
1218                 return ret;
1219         }
1220
1221         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1222                    board_address, board_data_size);
1223
1224         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1225                                board_data_size);
1226
1227         if (ret) {
1228                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1229                 return ret;
1230         }
1231
1232         /* record the fact that Board Data IS initialized */
1233         ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, 1);
1234
1235         return ret;
1236 }
1237
1238 static int ath6kl_upload_otp(struct ath6kl *ar)
1239 {
1240         u32 address, param;
1241         bool from_hw = false;
1242         int ret;
1243
1244         if (ar->fw_otp == NULL)
1245                 return 0;
1246
1247         address = ar->hw.app_load_addr;
1248
1249         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1250                    ar->fw_otp_len);
1251
1252         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1253                                        ar->fw_otp_len);
1254         if (ret) {
1255                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1256                 return ret;
1257         }
1258
1259         /* read firmware start address */
1260         ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1261
1262         if (ret) {
1263                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1264                 return ret;
1265         }
1266
1267         if (ar->hw.app_start_override_addr == 0) {
1268                 ar->hw.app_start_override_addr = address;
1269                 from_hw = true;
1270         }
1271
1272         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1273                    from_hw ? " (from hw)" : "",
1274                    ar->hw.app_start_override_addr);
1275
1276         /* execute the OTP code */
1277         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1278                    ar->hw.app_start_override_addr);
1279         param = 0;
1280         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1281
1282         return ret;
1283 }
1284
1285 static int ath6kl_upload_firmware(struct ath6kl *ar)
1286 {
1287         u32 address;
1288         int ret;
1289
1290         if (WARN_ON(ar->fw == NULL))
1291                 return 0;
1292
1293         address = ar->hw.app_load_addr;
1294
1295         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1296                    address, ar->fw_len);
1297
1298         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1299
1300         if (ret) {
1301                 ath6kl_err("Failed to write firmware: %d\n", ret);
1302                 return ret;
1303         }
1304
1305         /*
1306          * Set starting address for firmware
1307          * Don't need to setup app_start override addr on AR6004
1308          */
1309         if (ar->target_type != TARGET_TYPE_AR6004) {
1310                 address = ar->hw.app_start_override_addr;
1311                 ath6kl_bmi_set_app_start(ar, address);
1312         }
1313         return ret;
1314 }
1315
1316 static int ath6kl_upload_patch(struct ath6kl *ar)
1317 {
1318         u32 address;
1319         int ret;
1320
1321         if (ar->fw_patch == NULL)
1322                 return 0;
1323
1324         address = ar->hw.dataset_patch_addr;
1325
1326         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1327                    address, ar->fw_patch_len);
1328
1329         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1330         if (ret) {
1331                 ath6kl_err("Failed to write patch file: %d\n", ret);
1332                 return ret;
1333         }
1334
1335         ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1336
1337         return 0;
1338 }
1339
1340 static int ath6kl_upload_testscript(struct ath6kl *ar)
1341 {
1342         u32 address;
1343         int ret;
1344
1345         if (ar->testmode != 2)
1346                 return 0;
1347
1348         if (ar->fw_testscript == NULL)
1349                 return 0;
1350
1351         address = ar->hw.testscript_addr;
1352
1353         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1354                    address, ar->fw_testscript_len);
1355
1356         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1357                 ar->fw_testscript_len);
1358         if (ret) {
1359                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1360                 return ret;
1361         }
1362
1363         ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1364         ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1365         ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1366
1367         return 0;
1368 }
1369
1370 static int ath6kl_init_upload(struct ath6kl *ar)
1371 {
1372         u32 param, options, sleep, address;
1373         int status = 0;
1374
1375         if (ar->target_type != TARGET_TYPE_AR6003 &&
1376             ar->target_type != TARGET_TYPE_AR6004)
1377                 return -EINVAL;
1378
1379         /* temporarily disable system sleep */
1380         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1381         status = ath6kl_bmi_reg_read(ar, address, &param);
1382         if (status)
1383                 return status;
1384
1385         options = param;
1386
1387         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1388         status = ath6kl_bmi_reg_write(ar, address, param);
1389         if (status)
1390                 return status;
1391
1392         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1393         status = ath6kl_bmi_reg_read(ar, address, &param);
1394         if (status)
1395                 return status;
1396
1397         sleep = param;
1398
1399         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1400         status = ath6kl_bmi_reg_write(ar, address, param);
1401         if (status)
1402                 return status;
1403
1404         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1405                    options, sleep);
1406
1407         /* program analog PLL register */
1408         /* no need to control 40/44MHz clock on AR6004 */
1409         if (ar->target_type != TARGET_TYPE_AR6004) {
1410                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1411                                               0xF9104001);
1412
1413                 if (status)
1414                         return status;
1415
1416                 /* Run at 80/88MHz by default */
1417                 param = SM(CPU_CLOCK_STANDARD, 1);
1418
1419                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1420                 status = ath6kl_bmi_reg_write(ar, address, param);
1421                 if (status)
1422                         return status;
1423         }
1424
1425         param = 0;
1426         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1427         param = SM(LPO_CAL_ENABLE, 1);
1428         status = ath6kl_bmi_reg_write(ar, address, param);
1429         if (status)
1430                 return status;
1431
1432         /* WAR to avoid SDIO CRC err */
1433         if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1434                 ath6kl_err("temporary war to avoid sdio crc error\n");
1435
1436                 param = 0x28;
1437                 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1438                 status = ath6kl_bmi_reg_write(ar, address, param);
1439                 if (status)
1440                         return status;
1441
1442                 param = 0x20;
1443
1444                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1445                 status = ath6kl_bmi_reg_write(ar, address, param);
1446                 if (status)
1447                         return status;
1448
1449                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1450                 status = ath6kl_bmi_reg_write(ar, address, param);
1451                 if (status)
1452                         return status;
1453
1454                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1455                 status = ath6kl_bmi_reg_write(ar, address, param);
1456                 if (status)
1457                         return status;
1458
1459                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1460                 status = ath6kl_bmi_reg_write(ar, address, param);
1461                 if (status)
1462                         return status;
1463         }
1464
1465         /* write EEPROM data to Target RAM */
1466         status = ath6kl_upload_board_file(ar);
1467         if (status)
1468                 return status;
1469
1470         /* transfer One time Programmable data */
1471         status = ath6kl_upload_otp(ar);
1472         if (status)
1473                 return status;
1474
1475         /* Download Target firmware */
1476         status = ath6kl_upload_firmware(ar);
1477         if (status)
1478                 return status;
1479
1480         status = ath6kl_upload_patch(ar);
1481         if (status)
1482                 return status;
1483
1484         /* Download the test script */
1485         status = ath6kl_upload_testscript(ar);
1486         if (status)
1487                 return status;
1488
1489         /* Restore system sleep */
1490         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1491         status = ath6kl_bmi_reg_write(ar, address, sleep);
1492         if (status)
1493                 return status;
1494
1495         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1496         param = options | 0x20;
1497         status = ath6kl_bmi_reg_write(ar, address, param);
1498         if (status)
1499                 return status;
1500
1501         return status;
1502 }
1503
1504 int ath6kl_init_hw_params(struct ath6kl *ar)
1505 {
1506         const struct ath6kl_hw *uninitialized_var(hw);
1507         int i;
1508
1509         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1510                 hw = &hw_list[i];
1511
1512                 if (hw->id == ar->version.target_ver)
1513                         break;
1514         }
1515
1516         if (i == ARRAY_SIZE(hw_list)) {
1517                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1518                            ar->version.target_ver);
1519                 return -EINVAL;
1520         }
1521
1522         ar->hw = *hw;
1523
1524         ath6kl_dbg(ATH6KL_DBG_BOOT,
1525                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1526                    ar->version.target_ver, ar->target_type,
1527                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1528         ath6kl_dbg(ATH6KL_DBG_BOOT,
1529                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1530                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1531                    ar->hw.reserved_ram_size);
1532         ath6kl_dbg(ATH6KL_DBG_BOOT,
1533                    "refclk_hz %d uarttx_pin %d",
1534                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1535
1536         return 0;
1537 }
1538
1539 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1540 {
1541         switch (type) {
1542         case ATH6KL_HIF_TYPE_SDIO:
1543                 return "sdio";
1544         case ATH6KL_HIF_TYPE_USB:
1545                 return "usb";
1546         }
1547
1548         return NULL;
1549 }
1550
1551
1552 static const struct fw_capa_str_map {
1553         int id;
1554         const char *name;
1555 } fw_capa_map[] = {
1556         { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1557         { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1558         { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1559         { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1560         { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1561         { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1562         { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1563         { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1564         { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1565         { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1566         { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1567         { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1568         { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1569         { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1570 };
1571
1572 static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1573 {
1574         int i;
1575
1576         for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1577                 if (fw_capa_map[i].id == id)
1578                         return fw_capa_map[i].name;
1579         }
1580
1581         return "<unknown>";
1582 }
1583
1584 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1585 {
1586         u8 *data = (u8 *) ar->fw_capabilities;
1587         size_t trunc_len, len = 0;
1588         int i, index, bit;
1589         char *trunc = "...";
1590
1591         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1592                 index = i / 8;
1593                 bit = i % 8;
1594
1595                 if (index >= sizeof(ar->fw_capabilities) * 4)
1596                         break;
1597
1598                 if (buf_len - len < 4) {
1599                         ath6kl_warn("firmware capability buffer too small!\n");
1600
1601                         /* add "..." to the end of string */
1602                         trunc_len = strlen(trunc) + 1;
1603                         strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1604
1605                         return;
1606                 }
1607
1608                 if (data[index] & (1 << bit)) {
1609                         len += scnprintf(buf + len, buf_len - len, "%s,",
1610                                             ath6kl_init_get_fw_capa_name(i));
1611                 }
1612         }
1613
1614         /* overwrite the last comma */
1615         if (len > 0)
1616                 len--;
1617
1618         buf[len] = '\0';
1619 }
1620
1621 static int ath6kl_init_hw_reset(struct ath6kl *ar)
1622 {
1623         ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device");
1624
1625         return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS,
1626                                    cpu_to_le32(RESET_CONTROL_COLD_RST));
1627 }
1628
1629 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1630 {
1631         long timeleft;
1632         int ret, i;
1633         char buf[200];
1634
1635         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1636
1637         ret = ath6kl_hif_power_on(ar);
1638         if (ret)
1639                 return ret;
1640
1641         ret = ath6kl_configure_target(ar);
1642         if (ret)
1643                 goto err_power_off;
1644
1645         ret = ath6kl_init_upload(ar);
1646         if (ret)
1647                 goto err_power_off;
1648
1649         /* Do we need to finish the BMI phase */
1650         ret = ath6kl_bmi_done(ar);
1651         if (ret)
1652                 goto err_power_off;
1653
1654         /*
1655          * The reason we have to wait for the target here is that the
1656          * driver layer has to init BMI in order to set the host block
1657          * size.
1658          */
1659         ret = ath6kl_htc_wait_target(ar->htc_target);
1660
1661         if (ret == -ETIMEDOUT) {
1662                 /*
1663                  * Most likely USB target is in odd state after reboot and
1664                  * needs a reset. A cold reset makes the whole device
1665                  * disappear from USB bus and initialisation starts from
1666                  * beginning.
1667                  */
1668                 ath6kl_warn("htc wait target timed out, resetting device\n");
1669                 ath6kl_init_hw_reset(ar);
1670                 goto err_power_off;
1671         } else if (ret) {
1672                 ath6kl_err("htc wait target failed: %d\n", ret);
1673                 goto err_power_off;
1674         }
1675
1676         ret = ath6kl_init_service_ep(ar);
1677         if (ret) {
1678                 ath6kl_err("Endpoint service initilisation failed: %d\n", ret);
1679                 goto err_cleanup_scatter;
1680         }
1681
1682         /* setup credit distribution */
1683         ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1684
1685         /* start HTC */
1686         ret = ath6kl_htc_start(ar->htc_target);
1687         if (ret) {
1688                 /* FIXME: call this */
1689                 ath6kl_cookie_cleanup(ar);
1690                 goto err_cleanup_scatter;
1691         }
1692
1693         /* Wait for Wmi event to be ready */
1694         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1695                                                     test_bit(WMI_READY,
1696                                                              &ar->flag),
1697                                                     WMI_TIMEOUT);
1698         if (timeleft <= 0) {
1699                 clear_bit(WMI_READY, &ar->flag);
1700                 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n",
1701                            timeleft);
1702                 ret = -EIO;
1703                 goto err_htc_stop;
1704         }
1705
1706         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1707
1708         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1709                 ath6kl_info("%s %s fw %s api %d%s\n",
1710                             ar->hw.name,
1711                             ath6kl_init_get_hif_name(ar->hif_type),
1712                             ar->wiphy->fw_version,
1713                             ar->fw_api,
1714                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1715                 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1716                 ath6kl_info("firmware supports: %s\n", buf);
1717         }
1718
1719         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1720                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1721                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1722                 ret = -EIO;
1723                 goto err_htc_stop;
1724         }
1725
1726         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1727
1728         /* communicate the wmi protocol verision to the target */
1729         /* FIXME: return error */
1730         if ((ath6kl_set_host_app_area(ar)) != 0)
1731                 ath6kl_err("unable to set the host app area\n");
1732
1733         for (i = 0; i < ar->vif_max; i++) {
1734                 ret = ath6kl_target_config_wlan_params(ar, i);
1735                 if (ret)
1736                         goto err_htc_stop;
1737         }
1738
1739         return 0;
1740
1741 err_htc_stop:
1742         ath6kl_htc_stop(ar->htc_target);
1743 err_cleanup_scatter:
1744         ath6kl_hif_cleanup_scatter(ar);
1745 err_power_off:
1746         ath6kl_hif_power_off(ar);
1747
1748         return ret;
1749 }
1750
1751 int ath6kl_init_hw_start(struct ath6kl *ar)
1752 {
1753         int err;
1754
1755         err = __ath6kl_init_hw_start(ar);
1756         if (err)
1757                 return err;
1758         ar->state = ATH6KL_STATE_ON;
1759         return 0;
1760 }
1761
1762 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1763 {
1764         int ret;
1765
1766         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1767
1768         ath6kl_htc_stop(ar->htc_target);
1769
1770         ath6kl_hif_stop(ar);
1771
1772         ath6kl_bmi_reset(ar);
1773
1774         ret = ath6kl_hif_power_off(ar);
1775         if (ret)
1776                 ath6kl_warn("failed to power off hif: %d\n", ret);
1777
1778         return 0;
1779 }
1780
1781 int ath6kl_init_hw_stop(struct ath6kl *ar)
1782 {
1783         int err;
1784
1785         err = __ath6kl_init_hw_stop(ar);
1786         if (err)
1787                 return err;
1788         ar->state = ATH6KL_STATE_OFF;
1789         return 0;
1790 }
1791
1792 void ath6kl_init_hw_restart(struct ath6kl *ar)
1793 {
1794         clear_bit(WMI_READY, &ar->flag);
1795
1796         ath6kl_cfg80211_stop_all(ar);
1797
1798         if (__ath6kl_init_hw_stop(ar)) {
1799                 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1800                 return;
1801         }
1802
1803         if (__ath6kl_init_hw_start(ar)) {
1804                 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1805                 return;
1806         }
1807 }
1808
1809 void ath6kl_stop_txrx(struct ath6kl *ar)
1810 {
1811         struct ath6kl_vif *vif, *tmp_vif;
1812         int i;
1813
1814         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1815
1816         if (down_interruptible(&ar->sem)) {
1817                 ath6kl_err("down_interruptible failed\n");
1818                 return;
1819         }
1820
1821         for (i = 0; i < AP_MAX_NUM_STA; i++)
1822                 aggr_reset_state(ar->sta_list[i].aggr_conn);
1823
1824         spin_lock_bh(&ar->list_lock);
1825         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1826                 list_del(&vif->list);
1827                 spin_unlock_bh(&ar->list_lock);
1828                 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1829                 rtnl_lock();
1830                 ath6kl_cfg80211_vif_cleanup(vif);
1831                 rtnl_unlock();
1832                 spin_lock_bh(&ar->list_lock);
1833         }
1834         spin_unlock_bh(&ar->list_lock);
1835
1836         clear_bit(WMI_READY, &ar->flag);
1837
1838         if (ar->fw_recovery.enable)
1839                 del_timer_sync(&ar->fw_recovery.hb_timer);
1840
1841         /*
1842          * After wmi_shudown all WMI events will be dropped. We
1843          * need to cleanup the buffers allocated in AP mode and
1844          * give disconnect notification to stack, which usually
1845          * happens in the disconnect_event. Simulate the disconnect
1846          * event by calling the function directly. Sometimes
1847          * disconnect_event will be received when the debug logs
1848          * are collected.
1849          */
1850         ath6kl_wmi_shutdown(ar->wmi);
1851
1852         clear_bit(WMI_ENABLED, &ar->flag);
1853         if (ar->htc_target) {
1854                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1855                 ath6kl_htc_stop(ar->htc_target);
1856         }
1857
1858         /*
1859          * Try to reset the device if we can. The driver may have been
1860          * configure NOT to reset the target during a debug session.
1861          */
1862         ath6kl_init_hw_reset(ar);
1863
1864         up(&ar->sem);
1865 }
1866 EXPORT_SYMBOL(ath6kl_stop_txrx);