drivers/net/wireless/ath/ath6kl/init.c

   1
   2 /*
   3  * Copyright (c) 2011 Atheros Communications Inc.
   4  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  */
  18
  19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20
  21 #include <linux/moduleparam.h>
  22 #include <linux/errno.h>
  23 #include <linux/export.h>
  24 #include <linux/of.h>
  25 #include <linux/mmc/sdio_func.h>
  26 #include <linux/vmalloc.h>
  27
  28 #include "core.h"
  29 #include "cfg80211.h"
  30 #include "target.h"
  31 #include "debug.h"
  32 #include "hif-ops.h"
  33 #include "htc-ops.h"
  34
  35 static const struct ath6kl_hw hw_list[] = {
  36         {
  37                 .id                             = AR6003_HW_2_0_VERSION,
  38                 .name                           = "ar6003 hw 2.0",
  39                 .dataset_patch_addr             = 0x57e884,
  40                 .app_load_addr                  = 0x543180,
  41                 .board_ext_data_addr            = 0x57e500,
  42                 .reserved_ram_size              = 6912,
  43                 .refclk_hz                      = 26000000,
  44                 .uarttx_pin                     = 8,
  45                 .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
  46
  47                 /* hw2.0 needs override address hardcoded */
  48                 .app_start_override_addr        = 0x944C00,
  49
  50                 .fw = {
  51                         .dir            = AR6003_HW_2_0_FW_DIR,
  52                         .otp            = AR6003_HW_2_0_OTP_FILE,
  53                         .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
  54                         .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  55                         .patch          = AR6003_HW_2_0_PATCH_FILE,
  56                 },
  57
  58                 .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
  59                 .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  60         },
  61         {
  62                 .id                             = AR6003_HW_2_1_1_VERSION,
  63                 .name                           = "ar6003 hw 2.1.1",
  64                 .dataset_patch_addr             = 0x57ff74,
  65                 .app_load_addr                  = 0x1234,
  66                 .board_ext_data_addr            = 0x542330,
  67                 .reserved_ram_size              = 512,
  68                 .refclk_hz                      = 26000000,
  69                 .uarttx_pin                     = 8,
  70                 .testscript_addr                = 0x57ef74,
  71                 .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
  72
  73                 .fw = {
  74                         .dir            = AR6003_HW_2_1_1_FW_DIR,
  75                         .otp            = AR6003_HW_2_1_1_OTP_FILE,
  76                         .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
  77                         .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  78                         .patch          = AR6003_HW_2_1_1_PATCH_FILE,
  79                         .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
  80                         .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
  81                 },
  82
  83                 .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  84                 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  85         },
  86         {
  87                 .id                             = AR6004_HW_1_0_VERSION,
  88                 .name                           = "ar6004 hw 1.0",
  89                 .dataset_patch_addr             = 0x57e884,
  90                 .app_load_addr                  = 0x1234,
  91                 .board_ext_data_addr            = 0x437000,
  92                 .reserved_ram_size              = 19456,
  93                 .board_addr                     = 0x433900,
  94                 .refclk_hz                      = 26000000,
  95                 .uarttx_pin                     = 11,
  96                 .flags                          = 0,
  97
  98                 .fw = {
  99                         .dir            = AR6004_HW_1_0_FW_DIR,
 100                         .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
 101                 },
 102
 103                 .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
 104                 .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
 105         },
 106         {
 107                 .id                             = AR6004_HW_1_1_VERSION,
 108                 .name                           = "ar6004 hw 1.1",
 109                 .dataset_patch_addr             = 0x57e884,
 110                 .app_load_addr                  = 0x1234,
 111                 .board_ext_data_addr            = 0x437000,
 112                 .reserved_ram_size              = 11264,
 113                 .board_addr                     = 0x43d400,
 114                 .refclk_hz                      = 40000000,
 115                 .uarttx_pin                     = 11,
 116                 .flags                          = 0,
 117                 .fw = {
 118                         .dir            = AR6004_HW_1_1_FW_DIR,
 119                         .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
 120                 },
 121
 122                 .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
 123                 .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
 124         },
 125         {
 126                 .id                             = AR6004_HW_1_2_VERSION,
 127                 .name                           = "ar6004 hw 1.2",
 128                 .dataset_patch_addr             = 0x436ecc,
 129                 .app_load_addr                  = 0x1234,
 130                 .board_ext_data_addr            = 0x437000,
 131                 .reserved_ram_size              = 9216,
 132                 .board_addr                     = 0x435c00,
 133                 .refclk_hz                      = 40000000,
 134                 .uarttx_pin                     = 11,
 135                 .flags                          = 0,
 136
 137                 .fw = {
 138                         .dir            = AR6004_HW_1_2_FW_DIR,
 139                         .fw             = AR6004_HW_1_2_FIRMWARE_FILE,
 140                 },
 141                 .fw_board               = AR6004_HW_1_2_BOARD_DATA_FILE,
 142                 .fw_default_board       = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
 143         },
 144         {
 145                 .id                             = AR6004_HW_1_3_VERSION,
 146                 .name                           = "ar6004 hw 1.3",
 147                 .dataset_patch_addr             = 0x437860,
 148                 .app_load_addr                  = 0x1234,
 149                 .board_ext_data_addr            = 0x437000,
 150                 .reserved_ram_size              = 7168,
 151                 .board_addr                     = 0x436400,
 152                 .refclk_hz                      = 0,
 153                 .uarttx_pin                     = 11,
 154                 .flags                          = 0,
 155
 156                 .fw = {
 157                         .dir            = AR6004_HW_1_3_FW_DIR,
 158                         .fw             = AR6004_HW_1_3_FIRMWARE_FILE,
 159                         .tcmd           = AR6004_HW_1_3_TCMD_FIRMWARE_FILE,
 160                         .utf            = AR6004_HW_1_3_UTF_FIRMWARE_FILE,
 161                         .testscript     = AR6004_HW_1_3_TESTSCRIPT_FILE,
 162                 },
 163
 164                 .fw_board               = AR6004_HW_1_3_BOARD_DATA_FILE,
 165                 .fw_default_board       = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
 166         },
 167         {
 168                 .id                             = AR6004_HW_3_0_VERSION,
 169                 .name                           = "ar6004 hw 3.0",
 170                 .dataset_patch_addr             = 0,
 171                 .app_load_addr                  = 0x1234,
 172                 .board_ext_data_addr            = 0,
 173                 .reserved_ram_size              = 7168,
 174                 .board_addr                     = 0x436400,
 175                 .testscript_addr                = 0,
 176                 .flags                          = 0,
 177
 178                 .fw = {
 179                         .dir            = AR6004_HW_3_0_FW_DIR,
 180                         .fw             = AR6004_HW_3_0_FIRMWARE_FILE,
 181                         .tcmd           = AR6004_HW_3_0_TCMD_FIRMWARE_FILE,
 182                         .utf            = AR6004_HW_3_0_UTF_FIRMWARE_FILE,
 183                         .testscript     = AR6004_HW_3_0_TESTSCRIPT_FILE,
 184                 },
 185
 186                 .fw_board               = AR6004_HW_3_0_BOARD_DATA_FILE,
 187                 .fw_default_board       = AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE,
 188         },
 189 };
 190
 191 /*
 192  * Include definitions here that can be used to tune the WLAN module
 193  * behavior. Different customers can tune the behavior as per their needs,
 194  * here.
 195  */
 196
 197 /*
 198  * This configuration item enable/disable keepalive support.
 199  * Keepalive support: In the absence of any data traffic to AP, null
 200  * frames will be sent to the AP at periodic interval, to keep the association
 201  * active. This configuration item defines the periodic interval.
 202  * Use value of zero to disable keepalive support
 203  * Default: 60 seconds
 204  */
 205 #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
 206
 207 /*
 208  * This configuration item sets the value of disconnect timeout
 209  * Firmware delays sending the disconnec event to the host for this
 210  * timeout after is gets disconnected from the current AP.
 211  * If the firmware successly roams within the disconnect timeout
 212  * it sends a new connect event
 213  */
 214 #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
 215
 216
 217 #define ATH6KL_DATA_OFFSET    64
 218 struct sk_buff *ath6kl_buf_alloc(int size)
 219 {
 220         struct sk_buff *skb;
 221         u16 reserved;
 222
 223         /* Add chacheline space at front and back of buffer */
 224         reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
 225                    sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
 226         skb = dev_alloc_skb(size + reserved);
 227
 228         if (skb)
 229                 skb_reserve(skb, reserved - L1_CACHE_BYTES);
 230         return skb;
 231 }
 232
 233 void ath6kl_init_profile_info(struct ath6kl_vif *vif)
 234 {
 235         vif->ssid_len = 0;
 236         memset(vif->ssid, 0, sizeof(vif->ssid));
 237
 238         vif->dot11_auth_mode = OPEN_AUTH;
 239         vif->auth_mode = NONE_AUTH;
 240         vif->prwise_crypto = NONE_CRYPT;
 241         vif->prwise_crypto_len = 0;
 242         vif->grp_crypto = NONE_CRYPT;
 243         vif->grp_crypto_len = 0;
 244         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 245         memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
 246         memset(vif->bssid, 0, sizeof(vif->bssid));
 247         vif->bss_ch = 0;
 248 }
 249
 250 static int ath6kl_set_host_app_area(struct ath6kl *ar)
 251 {
 252         u32 address, data;
 253         struct host_app_area host_app_area;
 254
 255         /* Fetch the address of the host_app_area_s
 256          * instance in the host interest area */
 257         address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
 258         address = TARG_VTOP(ar->target_type, address);
 259
 260         if (ath6kl_diag_read32(ar, address, &data))
 261                 return -EIO;
 262
 263         address = TARG_VTOP(ar->target_type, data);
 264         host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
 265         if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
 266                               sizeof(struct host_app_area)))
 267                 return -EIO;
 268
 269         return 0;
 270 }
 271
 272 static inline void set_ac2_ep_map(struct ath6kl *ar,
 273                                   u8 ac,
 274                                   enum htc_endpoint_id ep)
 275 {
 276         ar->ac2ep_map[ac] = ep;
 277         ar->ep2ac_map[ep] = ac;
 278 }
 279
 280 /* connect to a service */
 281 static int ath6kl_connectservice(struct ath6kl *ar,
 282                                  struct htc_service_connect_req  *con_req,
 283                                  char *desc)
 284 {
 285         int status;
 286         struct htc_service_connect_resp response;
 287
 288         memset(&response, 0, sizeof(response));
 289
 290         status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
 291         if (status) {
 292                 ath6kl_err("failed to connect to %s service status:%d\n",
 293                            desc, status);
 294                 return status;
 295         }
 296
 297         switch (con_req->svc_id) {
 298         case WMI_CONTROL_SVC:
 299                 if (test_bit(WMI_ENABLED, &ar->flag))
 300                         ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
 301                 ar->ctrl_ep = response.endpoint;
 302                 break;
 303         case WMI_DATA_BE_SVC:
 304                 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
 305                 break;
 306         case WMI_DATA_BK_SVC:
 307                 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
 308                 break;
 309         case WMI_DATA_VI_SVC:
 310                 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
 311                 break;
 312         case WMI_DATA_VO_SVC:
 313                 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
 314                 break;
 315         default:
 316                 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
 317                 return -EINVAL;
 318         }
 319
 320         return 0;
 321 }
 322
 323 static int ath6kl_init_service_ep(struct ath6kl *ar)
 324 {
 325         struct htc_service_connect_req connect;
 326
 327         memset(&connect, 0, sizeof(connect));
 328
 329         /* these fields are the same for all service endpoints */
 330         connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
 331         connect.ep_cb.rx = ath6kl_rx;
 332         connect.ep_cb.rx_refill = ath6kl_rx_refill;
 333         connect.ep_cb.tx_full = ath6kl_tx_queue_full;
 334
 335         /*
 336          * Set the max queue depth so that our ath6kl_tx_queue_full handler
 337          * gets called.
 338         */
 339         connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
 340         connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
 341         if (!connect.ep_cb.rx_refill_thresh)
 342                 connect.ep_cb.rx_refill_thresh++;
 343
 344         /* connect to control service */
 345         connect.svc_id = WMI_CONTROL_SVC;
 346         if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
 347                 return -EIO;
 348
 349         connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
 350
 351         /*
 352          * Limit the HTC message size on the send path, although e can
 353          * receive A-MSDU frames of 4K, we will only send ethernet-sized
 354          * (802.3) frames on the send path.
 355          */
 356         connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
 357
 358         /*
 359          * To reduce the amount of committed memory for larger A_MSDU
 360          * frames, use the recv-alloc threshold mechanism for larger
 361          * packets.
 362          */
 363         connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
 364         connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
 365
 366         /*
 367          * For the remaining data services set the connection flag to
 368          * reduce dribbling, if configured to do so.
 369          */
 370         connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
 371         connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
 372         connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
 373
 374         connect.svc_id = WMI_DATA_BE_SVC;
 375
 376         if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
 377                 return -EIO;
 378
 379         /* connect to back-ground map this to WMI LOW_PRI */
 380         connect.svc_id = WMI_DATA_BK_SVC;
 381         if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
 382                 return -EIO;
 383
 384         /* connect to Video service, map this to HI PRI */
 385         connect.svc_id = WMI_DATA_VI_SVC;
 386         if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
 387                 return -EIO;
 388
 389         /*
 390          * Connect to VO service, this is currently not mapped to a WMI
 391          * priority stream due to historical reasons. WMI originally
 392          * defined 3 priorities over 3 mailboxes We can change this when
 393          * WMI is reworked so that priorities are not dependent on
 394          * mailboxes.
 395          */
 396         connect.svc_id = WMI_DATA_VO_SVC;
 397         if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
 398                 return -EIO;
 399
 400         return 0;
 401 }
 402
 403 void ath6kl_init_control_info(struct ath6kl_vif *vif)
 404 {
 405         ath6kl_init_profile_info(vif);
 406         vif->def_txkey_index = 0;
 407         memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 408         vif->ch_hint = 0;
 409 }
 410
 411 /*
 412  * Set HTC/Mbox operational parameters, this can only be called when the
 413  * target is in the BMI phase.
 414  */
 415 static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
 416                                  u8 htc_ctrl_buf)
 417 {
 418         int status;
 419         u32 blk_size;
 420
 421         blk_size = ar->mbox_info.block_size;
 422
 423         if (htc_ctrl_buf)
 424                 blk_size |=  ((u32)htc_ctrl_buf) << 16;
 425
 426         /* set the host interest area for the block size */
 427         status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
 428         if (status) {
 429                 ath6kl_err("bmi_write_memory for IO block size failed\n");
 430                 goto out;
 431         }
 432
 433         ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
 434                    blk_size,
 435                    ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
 436
 437         if (mbox_isr_yield_val) {
 438                 /* set the host interest area for the mbox ISR yield limit */
 439                 status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
 440                                                mbox_isr_yield_val);
 441                 if (status) {
 442                         ath6kl_err("bmi_write_memory for yield limit failed\n");
 443                         goto out;
 444                 }
 445         }
 446
 447 out:
 448         return status;
 449 }
 450
 451 static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
 452 {
 453         int ret;
 454
 455         /*
 456          * Configure the device for rx dot11 header rules. "0,0" are the
 457          * default values. Required if checksum offload is needed. Set
 458          * RxMetaVersion to 2.
 459          */
 460         ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
 461                                                  ar->rx_meta_ver, 0, 0);
 462         if (ret) {
 463                 ath6kl_err("unable to set the rx frame format: %d\n", ret);
 464                 return ret;
 465         }
 466
 467         if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
 468                 ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
 469                                               IGNORE_PS_FAIL_DURING_SCAN);
 470                 if (ret) {
 471                         ath6kl_err("unable to set power save fail event policy: %d\n",
 472                                    ret);
 473                         return ret;
 474                 }
 475         }
 476
 477         if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
 478                 ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
 479                                                    WMI_FOLLOW_BARKER_IN_ERP);
 480                 if (ret) {
 481                         ath6kl_err("unable to set barker preamble policy: %d\n",
 482                                    ret);
 483                         return ret;
 484                 }
 485         }
 486
 487         ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
 488                                            WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
 489         if (ret) {
 490                 ath6kl_err("unable to set keep alive interval: %d\n", ret);
 491                 return ret;
 492         }
 493
 494         ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
 495                                          WLAN_CONFIG_DISCONNECT_TIMEOUT);
 496         if (ret) {
 497                 ath6kl_err("unable to set disconnect timeout: %d\n", ret);
 498                 return ret;
 499         }
 500
 501         if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
 502                 ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
 503                 if (ret) {
 504                         ath6kl_err("unable to set txop bursting: %d\n", ret);
 505                         return ret;
 506                 }
 507         }
 508
 509         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 510                 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
 511                                               P2P_FLAG_CAPABILITIES_REQ |
 512                                               P2P_FLAG_MACADDR_REQ |
 513                                               P2P_FLAG_HMODEL_REQ);
 514                 if (ret) {
 515                         ath6kl_dbg(ATH6KL_DBG_TRC,
 516                                    "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
 517                                    ret);
 518                         ar->p2p = false;
 519                 }
 520         }
 521
 522         if (ar->p2p && (ar->vif_max == 1 || idx)) {
 523                 /* Enable Probe Request reporting for P2P */
 524                 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
 525                 if (ret) {
 526                         ath6kl_dbg(ATH6KL_DBG_TRC,
 527                                    "failed to enable Probe Request reporting (%d)\n",
 528                                    ret);
 529                 }
 530         }
 531
 532         return ret;
 533 }
 534
 535 int ath6kl_configure_target(struct ath6kl *ar)
 536 {
 537         u32 param, ram_reserved_size;
 538         u8 fw_iftype, fw_mode = 0, fw_submode = 0;
 539         int i, status;
 540
 541         param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
 542         if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
 543                 ath6kl_err("bmi_write_memory for uart debug failed\n");
 544                 return -EIO;
 545         }
 546
 547         /*
 548          * Note: Even though the firmware interface type is
 549          * chosen as BSS_STA for all three interfaces, can
 550          * be configured to IBSS/AP as long as the fw submode
 551          * remains normal mode (0 - AP, STA and IBSS). But
 552          * due to an target assert in firmware only one interface is
 553          * configured for now.
 554          */
 555         fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
 556
 557         for (i = 0; i < ar->vif_max; i++)
 558                 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
 559
 560         /*
 561          * Submodes when fw does not support dynamic interface
 562          * switching:
 563          *              vif[0] - AP/STA/IBSS
 564          *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
 565          *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
 566          * Otherwise, All the interface are initialized to p2p dev.
 567          */
 568
 569         if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
 570                      ar->fw_capabilities)) {
 571                 for (i = 0; i < ar->vif_max; i++)
 572                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 573                                 (i * HI_OPTION_FW_SUBMODE_BITS);
 574         } else {
 575                 for (i = 0; i < ar->max_norm_iface; i++)
 576                         fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
 577                                 (i * HI_OPTION_FW_SUBMODE_BITS);
 578
 579                 for (i = ar->max_norm_iface; i < ar->vif_max; i++)
 580                         fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 581                                 (i * HI_OPTION_FW_SUBMODE_BITS);
 582
 583                 if (ar->p2p && ar->vif_max == 1)
 584                         fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
 585         }
 586
 587         if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
 588                                   HTC_PROTOCOL_VERSION) != 0) {
 589                 ath6kl_err("bmi_write_memory for htc version failed\n");
 590                 return -EIO;
 591         }
 592
 593         /* set the firmware mode to STA/IBSS/AP */
 594         param = 0;
 595
 596         if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
 597                 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
 598                 return -EIO;
 599         }
 600
 601         param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
 602         param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
 603         param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
 604
 605         param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 606         param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 607
 608         if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
 609                 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
 610                 return -EIO;
 611         }
 612
 613         ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
 614
 615         /*
 616          * Hardcode the address use for the extended board data
 617          * Ideally this should be pre-allocate by the OS at boot time
 618          * But since it is a new feature and board data is loaded
 619          * at init time, we have to workaround this from host.
 620          * It is difficult to patch the firmware boot code,
 621          * but possible in theory.
 622          */
 623
 624         if ((ar->target_type == TARGET_TYPE_AR6003) ||
 625             (ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
 626             (ar->version.target_ver == AR6004_HW_3_0_VERSION)) {
 627                 param = ar->hw.board_ext_data_addr;
 628                 ram_reserved_size = ar->hw.reserved_ram_size;
 629
 630                 if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
 631                         ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
 632                         return -EIO;
 633                 }
 634
 635                 if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
 636                                           ram_reserved_size) != 0) {
 637                         ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
 638                         return -EIO;
 639                 }
 640         }
 641
 642         /* set the block size for the target */
 643         if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
 644                 /* use default number of control buffers */
 645                 return -EIO;
 646
 647         /* Configure GPIO AR600x UART */
 648         status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
 649                                        ar->hw.uarttx_pin);
 650         if (status)
 651                 return status;
 652
 653         /* Configure target refclk_hz */
 654         if (ar->hw.refclk_hz != 0) {
 655                 status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,
 656                                                ar->hw.refclk_hz);
 657                 if (status)
 658                         return status;
 659         }
 660
 661         return 0;
 662 }
 663
 664 /* firmware upload */
 665 static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
 666                          u8 **fw, size_t *fw_len)
 667 {
 668         const struct firmware *fw_entry;
 669         int ret;
 670
 671         ret = request_firmware(&fw_entry, filename, ar->dev);
 672         if (ret)
 673                 return ret;
 674
 675         *fw_len = fw_entry->size;
 676         *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
 677
 678         if (*fw == NULL)
 679                 ret = -ENOMEM;
 680
 681         release_firmware(fw_entry);
 682
 683         return ret;
 684 }
 685
 686 #ifdef CONFIG_OF
 687 /*
 688  * Check the device tree for a board-id and use it to construct
 689  * the pathname to the firmware file.  Used (for now) to find a
 690  * fallback to the "bdata.bin" file--typically a symlink to the
 691  * appropriate board-specific file.
 692  */
 693 static bool check_device_tree(struct ath6kl *ar)
 694 {
 695         static const char *board_id_prop = "atheros,board-id";
 696         struct device_node *node;
 697         char board_filename[64];
 698         const char *board_id;
 699         int ret;
 700
 701         for_each_compatible_node(node, NULL, "atheros,ath6kl") {
 702                 board_id = of_get_property(node, board_id_prop, NULL);
 703                 if (board_id == NULL) {
 704                         ath6kl_warn("No \"%s\" property on %s node.\n",
 705                                     board_id_prop, node->name);
 706                         continue;
 707                 }
 708                 snprintf(board_filename, sizeof(board_filename),
 709                          "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
 710
 711                 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
 712                                     &ar->fw_board_len);
 713                 if (ret) {
 714                         ath6kl_err("Failed to get DT board file %s: %d\n",
 715                                    board_filename, ret);
 716                         continue;
 717                 }
 718                 of_node_put(node);
 719                 return true;
 720         }
 721         return false;
 722 }
 723 #else
 724 static bool check_device_tree(struct ath6kl *ar)
 725 {
 726         return false;
 727 }
 728 #endif /* CONFIG_OF */
 729
 730 static int ath6kl_fetch_board_file(struct ath6kl *ar)
 731 {
 732         const char *filename;
 733         int ret;
 734
 735         if (ar->fw_board != NULL)
 736                 return 0;
 737
 738         if (WARN_ON(ar->hw.fw_board == NULL))
 739                 return -EINVAL;
 740
 741         filename = ar->hw.fw_board;
 742
 743         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 744                             &ar->fw_board_len);
 745         if (ret == 0) {
 746                 /* managed to get proper board file */
 747                 return 0;
 748         }
 749
 750         if (check_device_tree(ar)) {
 751                 /* got board file from device tree */
 752                 return 0;
 753         }
 754
 755         /* there was no proper board file, try to use default instead */
 756         ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
 757                     filename, ret);
 758
 759         filename = ar->hw.fw_default_board;
 760
 761         ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 762                             &ar->fw_board_len);
 763         if (ret) {
 764                 ath6kl_err("Failed to get default board file %s: %d\n",
 765                            filename, ret);
 766                 return ret;
 767         }
 768
 769         ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
 770         ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
 771
 772         return 0;
 773 }
 774
 775 static int ath6kl_fetch_otp_file(struct ath6kl *ar)
 776 {
 777         char filename[100];
 778         int ret;
 779
 780         if (ar->fw_otp != NULL)
 781                 return 0;
 782
 783         if (ar->hw.fw.otp == NULL) {
 784                 ath6kl_dbg(ATH6KL_DBG_BOOT,
 785                            "no OTP file configured for this hw\n");
 786                 return 0;
 787         }
 788
 789         snprintf(filename, sizeof(filename), "%s/%s",
 790                  ar->hw.fw.dir, ar->hw.fw.otp);
 791
 792         ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
 793                             &ar->fw_otp_len);
 794         if (ret) {
 795                 ath6kl_err("Failed to get OTP file %s: %d\n",
 796                            filename, ret);
 797                 return ret;
 798         }
 799
 800         return 0;
 801 }
 802
 803 static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
 804 {
 805         char filename[100];
 806         int ret;
 807
 808         if (ar->testmode == 0)
 809                 return 0;
 810
 811         ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
 812
 813         if (ar->testmode == 2) {
 814                 if (ar->hw.fw.utf == NULL) {
 815                         ath6kl_warn("testmode 2 not supported\n");
 816                         return -EOPNOTSUPP;
 817                 }
 818
 819                 snprintf(filename, sizeof(filename), "%s/%s",
 820                          ar->hw.fw.dir, ar->hw.fw.utf);
 821         } else {
 822                 if (ar->hw.fw.tcmd == NULL) {
 823                         ath6kl_warn("testmode 1 not supported\n");
 824                         return -EOPNOTSUPP;
 825                 }
 826
 827                 snprintf(filename, sizeof(filename), "%s/%s",
 828                          ar->hw.fw.dir, ar->hw.fw.tcmd);
 829         }
 830
 831         set_bit(TESTMODE, &ar->flag);
 832
 833         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 834         if (ret) {
 835                 ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
 836                            ar->testmode, filename, ret);
 837                 return ret;
 838         }
 839
 840         return 0;
 841 }
 842
 843 static int ath6kl_fetch_fw_file(struct ath6kl *ar)
 844 {
 845         char filename[100];
 846         int ret;
 847
 848         if (ar->fw != NULL)
 849                 return 0;
 850
 851         /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
 852         if (WARN_ON(ar->hw.fw.fw == NULL))
 853                 return -EINVAL;
 854
 855         snprintf(filename, sizeof(filename), "%s/%s",
 856                  ar->hw.fw.dir, ar->hw.fw.fw);
 857
 858         ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 859         if (ret) {
 860                 ath6kl_err("Failed to get firmware file %s: %d\n",
 861                            filename, ret);
 862                 return ret;
 863         }
 864
 865         return 0;
 866 }
 867
 868 static int ath6kl_fetch_patch_file(struct ath6kl *ar)
 869 {
 870         char filename[100];
 871         int ret;
 872
 873         if (ar->fw_patch != NULL)
 874                 return 0;
 875
 876         if (ar->hw.fw.patch == NULL)
 877                 return 0;
 878
 879         snprintf(filename, sizeof(filename), "%s/%s",
 880                  ar->hw.fw.dir, ar->hw.fw.patch);
 881
 882         ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
 883                             &ar->fw_patch_len);
 884         if (ret) {
 885                 ath6kl_err("Failed to get patch file %s: %d\n",
 886                            filename, ret);
 887                 return ret;
 888         }
 889
 890         return 0;
 891 }
 892
 893 static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
 894 {
 895         char filename[100];
 896         int ret;
 897
 898         if (ar->testmode != 2)
 899                 return 0;
 900
 901         if (ar->fw_testscript != NULL)
 902                 return 0;
 903
 904         if (ar->hw.fw.testscript == NULL)
 905                 return 0;
 906
 907         snprintf(filename, sizeof(filename), "%s/%s",
 908                  ar->hw.fw.dir, ar->hw.fw.testscript);
 909
 910         ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
 911                                 &ar->fw_testscript_len);
 912         if (ret) {
 913                 ath6kl_err("Failed to get testscript file %s: %d\n",
 914                            filename, ret);
 915                 return ret;
 916         }
 917
 918         return 0;
 919 }
 920
 921 static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
 922 {
 923         int ret;
 924
 925         ret = ath6kl_fetch_otp_file(ar);
 926         if (ret)
 927                 return ret;
 928
 929         ret = ath6kl_fetch_fw_file(ar);
 930         if (ret)
 931                 return ret;
 932
 933         ret = ath6kl_fetch_patch_file(ar);
 934         if (ret)
 935                 return ret;
 936
 937         ret = ath6kl_fetch_testscript_file(ar);
 938         if (ret)
 939                 return ret;
 940
 941         return 0;
 942 }
 943
 944 static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
 945 {
 946         size_t magic_len, len, ie_len;
 947         const struct firmware *fw;
 948         struct ath6kl_fw_ie *hdr;
 949         char filename[100];
 950         const u8 *data;
 951         int ret, ie_id, i, index, bit;
 952         __le32 *val;
 953
 954         snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
 955
 956         ret = request_firmware(&fw, filename, ar->dev);
 957         if (ret) {
 958                 ath6kl_err("Failed request firmware, rv: %d\n", ret);
 959                 return ret;
 960         }
 961
 962         data = fw->data;
 963         len = fw->size;
 964
 965         /* magic also includes the null byte, check that as well */
 966         magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
 967
 968         if (len < magic_len) {
 969                 ath6kl_err("Magic length is invalid, len: %zd  magic_len: %zd\n",
 970                            len, magic_len);
 971                 ret = -EINVAL;
 972                 goto out;
 973         }
 974
 975         if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
 976                 ath6kl_err("Magic is invalid, magic_len: %zd\n",
 977                            magic_len);
 978                 ret = -EINVAL;
 979                 goto out;
 980         }
 981
 982         len -= magic_len;
 983         data += magic_len;
 984
 985         /* loop elements */
 986         while (len > sizeof(struct ath6kl_fw_ie)) {
 987                 /* hdr is unaligned! */
 988                 hdr = (struct ath6kl_fw_ie *) data;
 989
 990                 ie_id = le32_to_cpup(&hdr->id);
 991                 ie_len = le32_to_cpup(&hdr->len);
 992
 993                 len -= sizeof(*hdr);
 994                 data += sizeof(*hdr);
 995
 996                 ath6kl_dbg(ATH6KL_DBG_BOOT, "ie-id: %d  len: %zd (0x%zx)\n",
 997                            ie_id, ie_len, ie_len);
 998
 999                 if (len < ie_len) {
1000                         ath6kl_err("IE len is invalid, len: %zd  ie_len: %zd  ie-id: %d\n",
1001                                    len, ie_len, ie_id);
1002                         ret = -EINVAL;
1003                         goto out;
1004                 }
1005
1006                 switch (ie_id) {
1007                 case ATH6KL_FW_IE_FW_VERSION:
1008                         strlcpy(ar->wiphy->fw_version, data,
1009                                 min(sizeof(ar->wiphy->fw_version), ie_len+1));
1010
1011                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1012                                    "found fw version %s\n",
1013                                     ar->wiphy->fw_version);
1014                         break;
1015                 case ATH6KL_FW_IE_OTP_IMAGE:
1016                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
1017                                    ie_len);
1018
1019                         ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
1020
1021                         if (ar->fw_otp == NULL) {
1022                                 ath6kl_err("fw_otp cannot be allocated\n");
1023                                 ret = -ENOMEM;
1024                                 goto out;
1025                         }
1026
1027                         ar->fw_otp_len = ie_len;
1028                         break;
1029                 case ATH6KL_FW_IE_FW_IMAGE:
1030                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
1031                                    ie_len);
1032
1033                         /* in testmode we already might have a fw file */
1034                         if (ar->fw != NULL)
1035                                 break;
1036
1037                         ar->fw = vmalloc(ie_len);
1038
1039                         if (ar->fw == NULL) {
1040                                 ath6kl_err("fw storage cannot be allocated, len: %zd\n", ie_len);
1041                                 ret = -ENOMEM;
1042                                 goto out;
1043                         }
1044
1045                         memcpy(ar->fw, data, ie_len);
1046                         ar->fw_len = ie_len;
1047                         break;
1048                 case ATH6KL_FW_IE_PATCH_IMAGE:
1049                         ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1050                                    ie_len);
1051
1052                         ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1053
1054                         if (ar->fw_patch == NULL) {
1055                                 ath6kl_err("fw_patch storage cannot be allocated, len: %zd\n", ie_len);
1056                                 ret = -ENOMEM;
1057                                 goto out;
1058                         }
1059
1060                         ar->fw_patch_len = ie_len;
1061                         break;
1062                 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1063                         val = (__le32 *) data;
1064                         ar->hw.reserved_ram_size = le32_to_cpup(val);
1065
1066                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1067                                    "found reserved ram size ie %d\n",
1068                                    ar->hw.reserved_ram_size);
1069                         break;
1070                 case ATH6KL_FW_IE_CAPABILITIES:
1071                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1072                                    "found firmware capabilities ie (%zd B)\n",
1073                                    ie_len);
1074
1075                         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1076                                 index = i / 8;
1077                                 bit = i % 8;
1078
1079                                 if (index == ie_len)
1080                                         break;
1081
1082                                 if (data[index] & (1 << bit))
1083                                         __set_bit(i, ar->fw_capabilities);
1084                         }
1085
1086                         ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1087                                         ar->fw_capabilities,
1088                                         sizeof(ar->fw_capabilities));
1089                         break;
1090                 case ATH6KL_FW_IE_PATCH_ADDR:
1091                         if (ie_len != sizeof(*val))
1092                                 break;
1093
1094                         val = (__le32 *) data;
1095                         ar->hw.dataset_patch_addr = le32_to_cpup(val);
1096
1097                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1098                                    "found patch address ie 0x%x\n",
1099                                    ar->hw.dataset_patch_addr);
1100                         break;
1101                 case ATH6KL_FW_IE_BOARD_ADDR:
1102                         if (ie_len != sizeof(*val))
1103                                 break;
1104
1105                         val = (__le32 *) data;
1106                         ar->hw.board_addr = le32_to_cpup(val);
1107
1108                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1109                                    "found board address ie 0x%x\n",
1110                                    ar->hw.board_addr);
1111                         break;
1112                 case ATH6KL_FW_IE_VIF_MAX:
1113                         if (ie_len != sizeof(*val))
1114                                 break;
1115
1116                         val = (__le32 *) data;
1117                         ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1118                                             ATH6KL_VIF_MAX);
1119
1120                         if (ar->vif_max > 1 && !ar->p2p)
1121                                 ar->max_norm_iface = 2;
1122
1123                         ath6kl_dbg(ATH6KL_DBG_BOOT,
1124                                    "found vif max ie %d\n", ar->vif_max);
1125                         break;
1126                 default:
1127                         ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1128                                    le32_to_cpup(&hdr->id));
1129                         break;
1130                 }
1131
1132                 len -= ie_len;
1133                 data += ie_len;
1134         };
1135
1136         ret = 0;
1137 out:
1138         release_firmware(fw);
1139
1140         return ret;
1141 }
1142
1143 int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1144 {
1145         int ret;
1146
1147         ret = ath6kl_fetch_board_file(ar);
1148         if (ret)
1149                 return ret;
1150
1151         ret = ath6kl_fetch_testmode_file(ar);
1152         if (ret)
1153                 return ret;
1154
1155         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API5_FILE);
1156         if (ret == 0) {
1157                 ar->fw_api = 5;
1158                 goto out;
1159         }
1160
1161         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1162         if (ret == 0) {
1163                 ar->fw_api = 4;
1164                 goto out;
1165         }
1166
1167         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1168         if (ret == 0) {
1169                 ar->fw_api = 3;
1170                 goto out;
1171         }
1172
1173         ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1174         if (ret == 0) {
1175                 ar->fw_api = 2;
1176                 goto out;
1177         }
1178
1179         ret = ath6kl_fetch_fw_api1(ar);
1180         if (ret)
1181                 return ret;
1182
1183         ar->fw_api = 1;
1184
1185 out:
1186         ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1187
1188         return 0;
1189 }
1190
1191 static int ath6kl_upload_board_file(struct ath6kl *ar)
1192 {
1193         u32 board_address, board_ext_address, param;
1194         u32 board_data_size, board_ext_data_size;
1195         int ret;
1196
1197         if (WARN_ON(ar->fw_board == NULL))
1198                 return -ENOENT;
1199
1200         /*
1201          * Determine where in Target RAM to write Board Data.
1202          * For AR6004, host determine Target RAM address for
1203          * writing board data.
1204          */
1205         if (ar->hw.board_addr != 0) {
1206                 board_address = ar->hw.board_addr;
1207                 ath6kl_bmi_write_hi32(ar, hi_board_data,
1208                                       board_address);
1209         } else {
1210                 ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1211                 if (ret) {
1212                         ath6kl_err("Failed to get board file target address.\n");
1213                         return ret;
1214                 }
1215         }
1216
1217         /* determine where in target ram to write extended board data */
1218         ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1219         if (ret) {
1220                 ath6kl_err("Failed to get extended board file target address.\n");
1221                 return ret;
1222         }
1223
1224         if (ar->target_type == TARGET_TYPE_AR6003 &&
1225             board_ext_address == 0) {
1226                 ath6kl_err("Failed to get board file target address.\n");
1227                 return -EINVAL;
1228         }
1229
1230         switch (ar->target_type) {
1231         case TARGET_TYPE_AR6003:
1232                 board_data_size = AR6003_BOARD_DATA_SZ;
1233                 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1234                 if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1235                         board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1236                 break;
1237         case TARGET_TYPE_AR6004:
1238                 board_data_size = AR6004_BOARD_DATA_SZ;
1239                 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1240                 break;
1241         default:
1242                 WARN_ON(1);
1243                 return -EINVAL;
1244         }
1245
1246         if (board_ext_address &&
1247             ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1248                 /* write extended board data */
1249                 ath6kl_dbg(ATH6KL_DBG_BOOT,
1250                            "writing extended board data to 0x%x (%d B)\n",
1251                            board_ext_address, board_ext_data_size);
1252
1253                 ret = ath6kl_bmi_write(ar, board_ext_address,
1254                                        ar->fw_board + board_data_size,
1255                                        board_ext_data_size);
1256                 if (ret) {
1257                         ath6kl_err("Failed to write extended board data: %d\n",
1258                                    ret);
1259                         return ret;
1260                 }
1261
1262                 /* record that extended board data is initialized */
1263                 param = (board_ext_data_size << 16) | 1;
1264
1265                 ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1266         }
1267
1268         if (ar->fw_board_len < board_data_size) {
1269                 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1270                 ret = -EINVAL;
1271                 return ret;
1272         }
1273
1274         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1275                    board_address, board_data_size);
1276
1277         ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1278                                board_data_size);
1279
1280         if (ret) {
1281                 ath6kl_err("Board file bmi write failed: %d\n", ret);
1282                 return ret;
1283         }
1284
1285         /* record the fact that Board Data IS initialized */
1286         if ((ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
1287             (ar->version.target_ver == AR6004_HW_3_0_VERSION))
1288                 param = board_data_size;
1289         else
1290                 param = 1;
1291
1292         ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, param);
1293
1294         return ret;
1295 }
1296
1297 static int ath6kl_upload_otp(struct ath6kl *ar)
1298 {
1299         u32 address, param;
1300         bool from_hw = false;
1301         int ret;
1302
1303         if (ar->fw_otp == NULL)
1304                 return 0;
1305
1306         address = ar->hw.app_load_addr;
1307
1308         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1309                    ar->fw_otp_len);
1310
1311         ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1312                                        ar->fw_otp_len);
1313         if (ret) {
1314                 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1315                 return ret;
1316         }
1317
1318         /* read firmware start address */
1319         ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1320
1321         if (ret) {
1322                 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1323                 return ret;
1324         }
1325
1326         if (ar->hw.app_start_override_addr == 0) {
1327                 ar->hw.app_start_override_addr = address;
1328                 from_hw = true;
1329         }
1330
1331         ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1332                    from_hw ? " (from hw)" : "",
1333                    ar->hw.app_start_override_addr);
1334
1335         /* execute the OTP code */
1336         ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1337                    ar->hw.app_start_override_addr);
1338         param = 0;
1339         ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1340
1341         return ret;
1342 }
1343
1344 static int ath6kl_upload_firmware(struct ath6kl *ar)
1345 {
1346         u32 address;
1347         int ret;
1348
1349         if (WARN_ON(ar->fw == NULL))
1350                 return 0;
1351
1352         address = ar->hw.app_load_addr;
1353
1354         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1355                    address, ar->fw_len);
1356
1357         ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1358
1359         if (ret) {
1360                 ath6kl_err("Failed to write firmware: %d\n", ret);
1361                 return ret;
1362         }
1363
1364         /*
1365          * Set starting address for firmware
1366          * Don't need to setup app_start override addr on AR6004
1367          */
1368         if (ar->target_type != TARGET_TYPE_AR6004) {
1369                 address = ar->hw.app_start_override_addr;
1370                 ath6kl_bmi_set_app_start(ar, address);
1371         }
1372         return ret;
1373 }
1374
1375 static int ath6kl_upload_patch(struct ath6kl *ar)
1376 {
1377         u32 address;
1378         int ret;
1379
1380         if (ar->fw_patch == NULL)
1381                 return 0;
1382
1383         address = ar->hw.dataset_patch_addr;
1384
1385         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1386                    address, ar->fw_patch_len);
1387
1388         ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1389         if (ret) {
1390                 ath6kl_err("Failed to write patch file: %d\n", ret);
1391                 return ret;
1392         }
1393
1394         ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1395
1396         return 0;
1397 }
1398
1399 static int ath6kl_upload_testscript(struct ath6kl *ar)
1400 {
1401         u32 address;
1402         int ret;
1403
1404         if (ar->testmode != 2)
1405                 return 0;
1406
1407         if (ar->fw_testscript == NULL)
1408                 return 0;
1409
1410         address = ar->hw.testscript_addr;
1411
1412         ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1413                    address, ar->fw_testscript_len);
1414
1415         ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1416                 ar->fw_testscript_len);
1417         if (ret) {
1418                 ath6kl_err("Failed to write testscript file: %d\n", ret);
1419                 return ret;
1420         }
1421
1422         ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1423
1424         if ((ar->version.target_ver != AR6004_HW_1_3_VERSION) &&
1425             (ar->version.target_ver != AR6004_HW_3_0_VERSION))
1426                 ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1427
1428         ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1429
1430         return 0;
1431 }
1432
1433 static int ath6kl_init_upload(struct ath6kl *ar)
1434 {
1435         u32 param, options, sleep, address;
1436         int status = 0;
1437
1438         if (ar->target_type != TARGET_TYPE_AR6003 &&
1439             ar->target_type != TARGET_TYPE_AR6004)
1440                 return -EINVAL;
1441
1442         /* temporarily disable system sleep */
1443         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1444         status = ath6kl_bmi_reg_read(ar, address, &param);
1445         if (status)
1446                 return status;
1447
1448         options = param;
1449
1450         param |= ATH6KL_OPTION_SLEEP_DISABLE;
1451         status = ath6kl_bmi_reg_write(ar, address, param);
1452         if (status)
1453                 return status;
1454
1455         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1456         status = ath6kl_bmi_reg_read(ar, address, &param);
1457         if (status)
1458                 return status;
1459
1460         sleep = param;
1461
1462         param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1463         status = ath6kl_bmi_reg_write(ar, address, param);
1464         if (status)
1465                 return status;
1466
1467         ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1468                    options, sleep);
1469
1470         /* program analog PLL register */
1471         /* no need to control 40/44MHz clock on AR6004 */
1472         if (ar->target_type != TARGET_TYPE_AR6004) {
1473                 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1474                                               0xF9104001);
1475
1476                 if (status)
1477                         return status;
1478
1479                 /* Run at 80/88MHz by default */
1480                 param = SM(CPU_CLOCK_STANDARD, 1);
1481
1482                 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1483                 status = ath6kl_bmi_reg_write(ar, address, param);
1484                 if (status)
1485                         return status;
1486         }
1487
1488         param = 0;
1489         address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1490         param = SM(LPO_CAL_ENABLE, 1);
1491         status = ath6kl_bmi_reg_write(ar, address, param);
1492         if (status)
1493                 return status;
1494
1495         /* WAR to avoid SDIO CRC err */
1496         if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1497                 ath6kl_err("temporary war to avoid sdio crc error\n");
1498
1499                 param = 0x28;
1500                 address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1501                 status = ath6kl_bmi_reg_write(ar, address, param);
1502                 if (status)
1503                         return status;
1504
1505                 param = 0x20;
1506
1507                 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1508                 status = ath6kl_bmi_reg_write(ar, address, param);
1509                 if (status)
1510                         return status;
1511
1512                 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1513                 status = ath6kl_bmi_reg_write(ar, address, param);
1514                 if (status)
1515                         return status;
1516
1517                 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1518                 status = ath6kl_bmi_reg_write(ar, address, param);
1519                 if (status)
1520                         return status;
1521
1522                 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1523                 status = ath6kl_bmi_reg_write(ar, address, param);
1524                 if (status)
1525                         return status;
1526         }
1527
1528         /* write EEPROM data to Target RAM */
1529         status = ath6kl_upload_board_file(ar);
1530         if (status)
1531                 return status;
1532
1533         /* transfer One time Programmable data */
1534         status = ath6kl_upload_otp(ar);
1535         if (status)
1536                 return status;
1537
1538         /* Download Target firmware */
1539         status = ath6kl_upload_firmware(ar);
1540         if (status)
1541                 return status;
1542
1543         status = ath6kl_upload_patch(ar);
1544         if (status)
1545                 return status;
1546
1547         /* Download the test script */
1548         status = ath6kl_upload_testscript(ar);
1549         if (status)
1550                 return status;
1551
1552         /* Restore system sleep */
1553         address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1554         status = ath6kl_bmi_reg_write(ar, address, sleep);
1555         if (status)
1556                 return status;
1557
1558         address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1559         param = options | 0x20;
1560         status = ath6kl_bmi_reg_write(ar, address, param);
1561         if (status)
1562                 return status;
1563
1564         return status;
1565 }
1566
1567 int ath6kl_init_hw_params(struct ath6kl *ar)
1568 {
1569         const struct ath6kl_hw *uninitialized_var(hw);
1570         int i;
1571
1572         for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1573                 hw = &hw_list[i];
1574
1575                 if (hw->id == ar->version.target_ver)
1576                         break;
1577         }
1578
1579         if (i == ARRAY_SIZE(hw_list)) {
1580                 ath6kl_err("Unsupported hardware version: 0x%x\n",
1581                            ar->version.target_ver);
1582                 return -EINVAL;
1583         }
1584
1585         ar->hw = *hw;
1586
1587         ath6kl_dbg(ATH6KL_DBG_BOOT,
1588                    "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1589                    ar->version.target_ver, ar->target_type,
1590                    ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1591         ath6kl_dbg(ATH6KL_DBG_BOOT,
1592                    "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1593                    ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1594                    ar->hw.reserved_ram_size);
1595         ath6kl_dbg(ATH6KL_DBG_BOOT,
1596                    "refclk_hz %d uarttx_pin %d",
1597                    ar->hw.refclk_hz, ar->hw.uarttx_pin);
1598
1599         return 0;
1600 }
1601
1602 static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1603 {
1604         switch (type) {
1605         case ATH6KL_HIF_TYPE_SDIO:
1606                 return "sdio";
1607         case ATH6KL_HIF_TYPE_USB:
1608                 return "usb";
1609         }
1610
1611         return NULL;
1612 }
1613
1614
1615 static const struct fw_capa_str_map {
1616         int id;
1617         const char *name;
1618 } fw_capa_map[] = {
1619         { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1620         { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1621         { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1622         { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1623         { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1624         { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1625         { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1626         { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1627         { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1628         { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1629         { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1630         { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1631         { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1632         { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1633         { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" },
1634         { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" },
1635         { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" },
1636         { ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, "ratetable-mcs15" },
1637         { ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, "no-ip-checksum" },
1638 };
1639
1640 static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1641 {
1642         int i;
1643
1644         for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1645                 if (fw_capa_map[i].id == id)
1646                         return fw_capa_map[i].name;
1647         }
1648
1649         return "<unknown>";
1650 }
1651
1652 static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1653 {
1654         u8 *data = (u8 *) ar->fw_capabilities;
1655         size_t trunc_len, len = 0;
1656         int i, index, bit;
1657         char *trunc = "...";
1658
1659         for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1660                 index = i / 8;
1661                 bit = i % 8;
1662
1663                 if (index >= sizeof(ar->fw_capabilities) * 4)
1664                         break;
1665
1666                 if (buf_len - len < 4) {
1667                         ath6kl_warn("firmware capability buffer too small!\n");
1668
1669                         /* add "..." to the end of string */
1670                         trunc_len = strlen(trunc) + 1;
1671                         strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1672
1673                         return;
1674                 }
1675
1676                 if (data[index] & (1 << bit)) {
1677                         len += scnprintf(buf + len, buf_len - len, "%s,",
1678                                             ath6kl_init_get_fw_capa_name(i));
1679                 }
1680         }
1681
1682         /* overwrite the last comma */
1683         if (len > 0)
1684                 len--;
1685
1686         buf[len] = '\0';
1687 }
1688
1689 static int ath6kl_init_hw_reset(struct ath6kl *ar)
1690 {
1691         ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device");
1692
1693         return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS,
1694                                    cpu_to_le32(RESET_CONTROL_COLD_RST));
1695 }
1696
1697 static int __ath6kl_init_hw_start(struct ath6kl *ar)
1698 {
1699         long timeleft;
1700         int ret, i;
1701         char buf[200];
1702
1703         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1704
1705         ret = ath6kl_hif_power_on(ar);
1706         if (ret)
1707                 return ret;
1708
1709         ret = ath6kl_configure_target(ar);
1710         if (ret)
1711                 goto err_power_off;
1712
1713         ret = ath6kl_init_upload(ar);
1714         if (ret)
1715                 goto err_power_off;
1716
1717         /* Do we need to finish the BMI phase */
1718         ret = ath6kl_bmi_done(ar);
1719         if (ret)
1720                 goto err_power_off;
1721
1722         /*
1723          * The reason we have to wait for the target here is that the
1724          * driver layer has to init BMI in order to set the host block
1725          * size.
1726          */
1727         ret = ath6kl_htc_wait_target(ar->htc_target);
1728
1729         if (ret == -ETIMEDOUT) {
1730                 /*
1731                  * Most likely USB target is in odd state after reboot and
1732                  * needs a reset. A cold reset makes the whole device
1733                  * disappear from USB bus and initialisation starts from
1734                  * beginning.
1735                  */
1736                 ath6kl_warn("htc wait target timed out, resetting device\n");
1737                 ath6kl_init_hw_reset(ar);
1738                 goto err_power_off;
1739         } else if (ret) {
1740                 ath6kl_err("htc wait target failed: %d\n", ret);
1741                 goto err_power_off;
1742         }
1743
1744         ret = ath6kl_init_service_ep(ar);
1745         if (ret) {
1746                 ath6kl_err("Endpoint service initilisation failed: %d\n", ret);
1747                 goto err_cleanup_scatter;
1748         }
1749
1750         /* setup credit distribution */
1751         ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1752
1753         /* start HTC */
1754         ret = ath6kl_htc_start(ar->htc_target);
1755         if (ret) {
1756                 /* FIXME: call this */
1757                 ath6kl_cookie_cleanup(ar);
1758                 goto err_cleanup_scatter;
1759         }
1760
1761         /* Wait for Wmi event to be ready */
1762         timeleft = wait_event_interruptible_timeout(ar->event_wq,
1763                                                     test_bit(WMI_READY,
1764                                                              &ar->flag),
1765                                                     WMI_TIMEOUT);
1766         if (timeleft <= 0) {
1767                 clear_bit(WMI_READY, &ar->flag);
1768                 ath6kl_err("wmi is not ready or wait was interrupted: %ld\n",
1769                            timeleft);
1770                 ret = -EIO;
1771                 goto err_htc_stop;
1772         }
1773
1774         ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1775
1776         if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1777                 ath6kl_info("%s %s fw %s api %d%s\n",
1778                             ar->hw.name,
1779                             ath6kl_init_get_hif_name(ar->hif_type),
1780                             ar->wiphy->fw_version,
1781                             ar->fw_api,
1782                             test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1783                 ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1784                 ath6kl_info("firmware supports: %s\n", buf);
1785         }
1786
1787         if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1788                 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1789                            ATH6KL_ABI_VERSION, ar->version.abi_ver);
1790                 ret = -EIO;
1791                 goto err_htc_stop;
1792         }
1793
1794         ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1795
1796         /* communicate the wmi protocol verision to the target */
1797         /* FIXME: return error */
1798         if ((ath6kl_set_host_app_area(ar)) != 0)
1799                 ath6kl_err("unable to set the host app area\n");
1800
1801         for (i = 0; i < ar->vif_max; i++) {
1802                 ret = ath6kl_target_config_wlan_params(ar, i);
1803                 if (ret)
1804                         goto err_htc_stop;
1805         }
1806
1807         return 0;
1808
1809 err_htc_stop:
1810         ath6kl_htc_stop(ar->htc_target);
1811 err_cleanup_scatter:
1812         ath6kl_hif_cleanup_scatter(ar);
1813 err_power_off:
1814         ath6kl_hif_power_off(ar);
1815
1816         return ret;
1817 }
1818
1819 int ath6kl_init_hw_start(struct ath6kl *ar)
1820 {
1821         int err;
1822
1823         err = __ath6kl_init_hw_start(ar);
1824         if (err)
1825                 return err;
1826         ar->state = ATH6KL_STATE_ON;
1827         return 0;
1828 }
1829
1830 static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1831 {
1832         int ret;
1833
1834         ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1835
1836         ath6kl_htc_stop(ar->htc_target);
1837
1838         ath6kl_hif_stop(ar);
1839
1840         ath6kl_bmi_reset(ar);
1841
1842         ret = ath6kl_hif_power_off(ar);
1843         if (ret)
1844                 ath6kl_warn("failed to power off hif: %d\n", ret);
1845
1846         return 0;
1847 }
1848
1849 int ath6kl_init_hw_stop(struct ath6kl *ar)
1850 {
1851         int err;
1852
1853         err = __ath6kl_init_hw_stop(ar);
1854         if (err)
1855                 return err;
1856         ar->state = ATH6KL_STATE_OFF;
1857         return 0;
1858 }
1859
1860 void ath6kl_init_hw_restart(struct ath6kl *ar)
1861 {
1862         clear_bit(WMI_READY, &ar->flag);
1863
1864         ath6kl_cfg80211_stop_all(ar);
1865
1866         if (__ath6kl_init_hw_stop(ar)) {
1867                 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1868                 return;
1869         }
1870
1871         if (__ath6kl_init_hw_start(ar)) {
1872                 ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1873                 return;
1874         }
1875 }
1876
1877 void ath6kl_stop_txrx(struct ath6kl *ar)
1878 {
1879         struct ath6kl_vif *vif, *tmp_vif;
1880         int i;
1881
1882         set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1883
1884         if (down_interruptible(&ar->sem)) {
1885                 ath6kl_err("down_interruptible failed\n");
1886                 return;
1887         }
1888
1889         for (i = 0; i < AP_MAX_NUM_STA; i++)
1890                 aggr_reset_state(ar->sta_list[i].aggr_conn);
1891
1892         spin_lock_bh(&ar->list_lock);
1893         list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1894                 list_del(&vif->list);
1895                 spin_unlock_bh(&ar->list_lock);
1896                 ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1897                 rtnl_lock();
1898                 ath6kl_cfg80211_vif_cleanup(vif);
1899                 rtnl_unlock();
1900                 spin_lock_bh(&ar->list_lock);
1901         }
1902         spin_unlock_bh(&ar->list_lock);
1903
1904         clear_bit(WMI_READY, &ar->flag);
1905
1906         if (ar->fw_recovery.enable)
1907                 del_timer_sync(&ar->fw_recovery.hb_timer);
1908
1909         /*
1910          * After wmi_shudown all WMI events will be dropped. We
1911          * need to cleanup the buffers allocated in AP mode and
1912          * give disconnect notification to stack, which usually
1913          * happens in the disconnect_event. Simulate the disconnect
1914          * event by calling the function directly. Sometimes
1915          * disconnect_event will be received when the debug logs
1916          * are collected.
1917          */
1918         ath6kl_wmi_shutdown(ar->wmi);
1919
1920         clear_bit(WMI_ENABLED, &ar->flag);
1921         if (ar->htc_target) {
1922                 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1923                 ath6kl_htc_stop(ar->htc_target);
1924         }
1925
1926         /*
1927          * Try to reset the device if we can. The driver may have been
1928          * configure NOT to reset the target during a debug session.
1929          */
1930         ath6kl_init_hw_reset(ar);
1931
1932         up(&ar->sem);
1933 }
1934 EXPORT_SYMBOL(ath6kl_stop_txrx);