drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct list_head *list;
  74
  75                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(list))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->tx_complete_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207         ath_start_ani(sc);
 208 }
 209
 210 static bool ath_prepare_reset(struct ath_softc *sc)
 211 {
 212         struct ath_hw *ah = sc->sc_ah;
 213         bool ret = true;
 214
 215         ieee80211_stop_queues(sc->hw);
 216         ath_stop_ani(sc);
 217         ath9k_hw_disable_interrupts(ah);
 218
 219         if (AR_SREV_9300_20_OR_LATER(ah)) {
 220                 ret &= ath_stoprecv(sc);
 221                 ret &= ath_drain_all_txq(sc);
 222         } else {
 223                 ret &= ath_drain_all_txq(sc);
 224                 ret &= ath_stoprecv(sc);
 225         }
 226
 227         return ret;
 228 }
 229
 230 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 231 {
 232         struct ath_hw *ah = sc->sc_ah;
 233         struct ath_common *common = ath9k_hw_common(ah);
 234         unsigned long flags;
 235
 236         ath9k_calculate_summary_state(sc, sc->cur_chan);
 237         ath_startrecv(sc);
 238         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 239                                sc->cur_chan->txpower,
 240                                &sc->cur_chan->cur_txpower);
 241         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 242
 243         if (!sc->cur_chan->offchannel && start) {
 244                 /* restore per chanctx TSF timer */
 245                 if (sc->cur_chan->tsf_val) {
 246                         u32 offset;
 247
 248                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 249                                                          NULL);
 250                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 251                 }
 252
 253
 254                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 255                         goto work;
 256
 257                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 258                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 259                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 260                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 261                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 262                 } else {
 263                         ath9k_set_beacon(sc);
 264                 }
 265         work:
 266                 ath_restart_work(sc);
 267                 ath_txq_schedule_all(sc);
 268         }
 269
 270         sc->gtt_cnt = 0;
 271
 272         ath9k_hw_set_interrupts(ah);
 273         ath9k_hw_enable_interrupts(ah);
 274         ieee80211_wake_queues(sc->hw);
 275         ath9k_p2p_ps_timer(sc);
 276
 277         return true;
 278 }
 279
 280 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 281 {
 282         struct ath_hw *ah = sc->sc_ah;
 283         struct ath_common *common = ath9k_hw_common(ah);
 284         struct ath9k_hw_cal_data *caldata = NULL;
 285         bool fastcc = true;
 286         int r;
 287
 288         __ath_cancel_work(sc);
 289
 290         disable_irq(sc->irq);
 291         tasklet_disable(&sc->intr_tq);
 292         tasklet_disable(&sc->bcon_tasklet);
 293         spin_lock_bh(&sc->sc_pcu_lock);
 294
 295         if (!sc->cur_chan->offchannel) {
 296                 fastcc = false;
 297                 caldata = &sc->cur_chan->caldata;
 298         }
 299
 300         if (!hchan) {
 301                 fastcc = false;
 302                 hchan = ah->curchan;
 303         }
 304
 305         if (!ath_prepare_reset(sc))
 306                 fastcc = false;
 307
 308         if (ath9k_is_chanctx_enabled())
 309                 fastcc = false;
 310
 311         spin_lock_bh(&sc->chan_lock);
 312         sc->cur_chandef = sc->cur_chan->chandef;
 313         spin_unlock_bh(&sc->chan_lock);
 314
 315         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 316                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 317
 318         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 319         if (r) {
 320                 ath_err(common,
 321                         "Unable to reset channel, reset status %d\n", r);
 322
 323                 ath9k_hw_enable_interrupts(ah);
 324                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 325
 326                 goto out;
 327         }
 328
 329         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 330             sc->cur_chan->offchannel)
 331                 ath9k_mci_set_txpower(sc, true, false);
 332
 333         if (!ath_complete_reset(sc, true))
 334                 r = -EIO;
 335
 336 out:
 337         enable_irq(sc->irq);
 338         spin_unlock_bh(&sc->sc_pcu_lock);
 339         tasklet_enable(&sc->bcon_tasklet);
 340         tasklet_enable(&sc->intr_tq);
 341
 342         return r;
 343 }
 344
 345 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 346                             struct ieee80211_vif *vif)
 347 {
 348         struct ath_node *an;
 349         an = (struct ath_node *)sta->drv_priv;
 350
 351         an->sc = sc;
 352         an->sta = sta;
 353         an->vif = vif;
 354         memset(&an->key_idx, 0, sizeof(an->key_idx));
 355
 356         ath_tx_node_init(sc, an);
 357
 358         ath_dynack_node_init(sc->sc_ah, an);
 359 }
 360
 361 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 362 {
 363         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 364         ath_tx_node_cleanup(sc, an);
 365
 366         ath_dynack_node_deinit(sc->sc_ah, an);
 367 }
 368
 369 void ath9k_tasklet(unsigned long data)
 370 {
 371         struct ath_softc *sc = (struct ath_softc *)data;
 372         struct ath_hw *ah = sc->sc_ah;
 373         struct ath_common *common = ath9k_hw_common(ah);
 374         enum ath_reset_type type;
 375         unsigned long flags;
 376         u32 status = sc->intrstatus;
 377         u32 rxmask;
 378
 379         ath9k_ps_wakeup(sc);
 380         spin_lock(&sc->sc_pcu_lock);
 381
 382         if (status & ATH9K_INT_FATAL) {
 383                 type = RESET_TYPE_FATAL_INT;
 384                 ath9k_queue_reset(sc, type);
 385
 386                 /*
 387                  * Increment the ref. counter here so that
 388                  * interrupts are enabled in the reset routine.
 389                  */
 390                 atomic_inc(&ah->intr_ref_cnt);
 391                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 392                 goto out;
 393         }
 394
 395         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 396             (status & ATH9K_INT_BB_WATCHDOG)) {
 397                 spin_lock(&common->cc_lock);
 398                 ath_hw_cycle_counters_update(common);
 399                 ar9003_hw_bb_watchdog_dbg_info(ah);
 400                 spin_unlock(&common->cc_lock);
 401
 402                 if (ar9003_hw_bb_watchdog_check(ah)) {
 403                         type = RESET_TYPE_BB_WATCHDOG;
 404                         ath9k_queue_reset(sc, type);
 405
 406                         /*
 407                          * Increment the ref. counter here so that
 408                          * interrupts are enabled in the reset routine.
 409                          */
 410                         atomic_inc(&ah->intr_ref_cnt);
 411                         ath_dbg(common, RESET,
 412                                 "BB_WATCHDOG: Skipping interrupts\n");
 413                         goto out;
 414                 }
 415         }
 416
 417         if (status & ATH9K_INT_GTT) {
 418                 sc->gtt_cnt++;
 419
 420                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 421                         type = RESET_TYPE_TX_GTT;
 422                         ath9k_queue_reset(sc, type);
 423                         atomic_inc(&ah->intr_ref_cnt);
 424                         ath_dbg(common, RESET,
 425                                 "GTT: Skipping interrupts\n");
 426                         goto out;
 427                 }
 428         }
 429
 430         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 431         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 432                 /*
 433                  * TSF sync does not look correct; remain awake to sync with
 434                  * the next Beacon.
 435                  */
 436                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 437                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 438         }
 439         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 440
 441         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 442                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 443                           ATH9K_INT_RXORN);
 444         else
 445                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 446
 447         if (status & rxmask) {
 448                 /* Check for high priority Rx first */
 449                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 450                     (status & ATH9K_INT_RXHP))
 451                         ath_rx_tasklet(sc, 0, true);
 452
 453                 ath_rx_tasklet(sc, 0, false);
 454         }
 455
 456         if (status & ATH9K_INT_TX) {
 457                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 458                         /*
 459                          * For EDMA chips, TX completion is enabled for the
 460                          * beacon queue, so if a beacon has been transmitted
 461                          * successfully after a GTT interrupt, the GTT counter
 462                          * gets reset to zero here.
 463                          */
 464                         sc->gtt_cnt = 0;
 465
 466                         ath_tx_edma_tasklet(sc);
 467                 } else {
 468                         ath_tx_tasklet(sc);
 469                 }
 470
 471                 wake_up(&sc->tx_wait);
 472         }
 473
 474         if (status & ATH9K_INT_GENTIMER)
 475                 ath_gen_timer_isr(sc->sc_ah);
 476
 477         ath9k_btcoex_handle_interrupt(sc, status);
 478
 479         /* re-enable hardware interrupt */
 480         ath9k_hw_enable_interrupts(ah);
 481 out:
 482         spin_unlock(&sc->sc_pcu_lock);
 483         ath9k_ps_restore(sc);
 484 }
 485
 486 irqreturn_t ath_isr(int irq, void *dev)
 487 {
 488 #define SCHED_INTR (                            \
 489                 ATH9K_INT_FATAL |               \
 490                 ATH9K_INT_BB_WATCHDOG |         \
 491                 ATH9K_INT_RXORN |               \
 492                 ATH9K_INT_RXEOL |               \
 493                 ATH9K_INT_RX |                  \
 494                 ATH9K_INT_RXLP |                \
 495                 ATH9K_INT_RXHP |                \
 496                 ATH9K_INT_TX |                  \
 497                 ATH9K_INT_BMISS |               \
 498                 ATH9K_INT_CST |                 \
 499                 ATH9K_INT_GTT |                 \
 500                 ATH9K_INT_TSFOOR |              \
 501                 ATH9K_INT_GENTIMER |            \
 502                 ATH9K_INT_MCI)
 503
 504         struct ath_softc *sc = dev;
 505         struct ath_hw *ah = sc->sc_ah;
 506         struct ath_common *common = ath9k_hw_common(ah);
 507         enum ath9k_int status;
 508         u32 sync_cause = 0;
 509         bool sched = false;
 510
 511         /*
 512          * The hardware is not ready/present, don't
 513          * touch anything. Note this can happen early
 514          * on if the IRQ is shared.
 515          */
 516         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 517                 return IRQ_NONE;
 518
 519         /* shared irq, not for us */
 520         if (!ath9k_hw_intrpend(ah))
 521                 return IRQ_NONE;
 522
 523         /*
 524          * Figure out the reason(s) for the interrupt.  Note
 525          * that the hal returns a pseudo-ISR that may include
 526          * bits we haven't explicitly enabled so we mask the
 527          * value to insure we only process bits we requested.
 528          */
 529         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 530         ath9k_debug_sync_cause(sc, sync_cause);
 531         status &= ah->imask;    /* discard unasked-for bits */
 532
 533         if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 534                 return IRQ_HANDLED;
 535
 536         /*
 537          * If there are no status bits set, then this interrupt was not
 538          * for me (should have been caught above).
 539          */
 540         if (!status)
 541                 return IRQ_NONE;
 542
 543         /* Cache the status */
 544         sc->intrstatus = status;
 545
 546         if (status & SCHED_INTR)
 547                 sched = true;
 548
 549         /*
 550          * If a FATAL interrupt is received, we have to reset the chip
 551          * immediately.
 552          */
 553         if (status & ATH9K_INT_FATAL)
 554                 goto chip_reset;
 555
 556         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 557             (status & ATH9K_INT_BB_WATCHDOG))
 558                 goto chip_reset;
 559
 560         if (status & ATH9K_INT_SWBA)
 561                 tasklet_schedule(&sc->bcon_tasklet);
 562
 563         if (status & ATH9K_INT_TXURN)
 564                 ath9k_hw_updatetxtriglevel(ah, true);
 565
 566         if (status & ATH9K_INT_RXEOL) {
 567                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 568                 ath9k_hw_set_interrupts(ah);
 569         }
 570
 571         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 572                 if (status & ATH9K_INT_TIM_TIMER) {
 573                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 574                                 goto chip_reset;
 575                         /* Clear RxAbort bit so that we can
 576                          * receive frames */
 577                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 578                         spin_lock(&sc->sc_pm_lock);
 579                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 580                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 581                         spin_unlock(&sc->sc_pm_lock);
 582                 }
 583
 584 chip_reset:
 585
 586         ath_debug_stat_interrupt(sc, status);
 587
 588         if (sched) {
 589                 /* turn off every interrupt */
 590                 ath9k_hw_disable_interrupts(ah);
 591                 tasklet_schedule(&sc->intr_tq);
 592         }
 593
 594         return IRQ_HANDLED;
 595
 596 #undef SCHED_INTR
 597 }
 598
 599 /*
 600  * This function is called when a HW reset cannot be deferred
 601  * and has to be immediate.
 602  */
 603 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 604 {
 605         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 606         int r;
 607
 608         ath9k_hw_kill_interrupts(sc->sc_ah);
 609         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 610
 611         ath9k_ps_wakeup(sc);
 612         r = ath_reset_internal(sc, hchan);
 613         ath9k_ps_restore(sc);
 614
 615         return r;
 616 }
 617
 618 /*
 619  * When a HW reset can be deferred, it is added to the
 620  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 621  * queueing.
 622  */
 623 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 624 {
 625         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 626 #ifdef CONFIG_ATH9K_DEBUGFS
 627         RESET_STAT_INC(sc, type);
 628 #endif
 629         ath9k_hw_kill_interrupts(sc->sc_ah);
 630         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 631         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 632 }
 633
 634 void ath_reset_work(struct work_struct *work)
 635 {
 636         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 637
 638         ath9k_ps_wakeup(sc);
 639         ath_reset_internal(sc, NULL);
 640         ath9k_ps_restore(sc);
 641 }
 642
 643 /**********************/
 644 /* mac80211 callbacks */
 645 /**********************/
 646
 647 static int ath9k_start(struct ieee80211_hw *hw)
 648 {
 649         struct ath_softc *sc = hw->priv;
 650         struct ath_hw *ah = sc->sc_ah;
 651         struct ath_common *common = ath9k_hw_common(ah);
 652         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 653         struct ath_chanctx *ctx = sc->cur_chan;
 654         struct ath9k_channel *init_channel;
 655         int r;
 656
 657         ath_dbg(common, CONFIG,
 658                 "Starting driver with initial channel: %d MHz\n",
 659                 curchan->center_freq);
 660
 661         ath9k_ps_wakeup(sc);
 662         mutex_lock(&sc->mutex);
 663
 664         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 665         sc->cur_chandef = hw->conf.chandef;
 666
 667         /* Reset SERDES registers */
 668         ath9k_hw_configpcipowersave(ah, false);
 669
 670         /*
 671          * The basic interface to setting the hardware in a good
 672          * state is ``reset''.  On return the hardware is known to
 673          * be powered up and with interrupts disabled.  This must
 674          * be followed by initialization of the appropriate bits
 675          * and then setup of the interrupt mask.
 676          */
 677         spin_lock_bh(&sc->sc_pcu_lock);
 678
 679         atomic_set(&ah->intr_ref_cnt, -1);
 680
 681         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 682         if (r) {
 683                 ath_err(common,
 684                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 685                         r, curchan->center_freq);
 686                 ah->reset_power_on = false;
 687         }
 688
 689         /* Setup our intr mask. */
 690         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 691                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 692                     ATH9K_INT_GLOBAL;
 693
 694         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 695                 ah->imask |= ATH9K_INT_RXHP |
 696                              ATH9K_INT_RXLP;
 697         else
 698                 ah->imask |= ATH9K_INT_RX;
 699
 700         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 701                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 702
 703         /*
 704          * Enable GTT interrupts only for AR9003/AR9004 chips
 705          * for now.
 706          */
 707         if (AR_SREV_9300_20_OR_LATER(ah))
 708                 ah->imask |= ATH9K_INT_GTT;
 709
 710         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 711                 ah->imask |= ATH9K_INT_CST;
 712
 713         ath_mci_enable(sc);
 714
 715         clear_bit(ATH_OP_INVALID, &common->op_flags);
 716         sc->sc_ah->is_monitoring = false;
 717
 718         if (!ath_complete_reset(sc, false))
 719                 ah->reset_power_on = false;
 720
 721         if (ah->led_pin >= 0)
 722                 ath9k_hw_set_gpio(ah, ah->led_pin,
 723                                   (ah->config.led_active_high) ? 1 : 0);
 724
 725         /*
 726          * Reset key cache to sane defaults (all entries cleared) instead of
 727          * semi-random values after suspend/resume.
 728          */
 729         ath9k_cmn_init_crypto(sc->sc_ah);
 730
 731         ath9k_hw_reset_tsf(ah);
 732
 733         spin_unlock_bh(&sc->sc_pcu_lock);
 734
 735         mutex_unlock(&sc->mutex);
 736
 737         ath9k_ps_restore(sc);
 738
 739         ath9k_rng_start(sc);
 740
 741         return 0;
 742 }
 743
 744 static void ath9k_tx(struct ieee80211_hw *hw,
 745                      struct ieee80211_tx_control *control,
 746                      struct sk_buff *skb)
 747 {
 748         struct ath_softc *sc = hw->priv;
 749         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 750         struct ath_tx_control txctl;
 751         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 752         unsigned long flags;
 753
 754         if (sc->ps_enabled) {
 755                 /*
 756                  * mac80211 does not set PM field for normal data frames, so we
 757                  * need to update that based on the current PS mode.
 758                  */
 759                 if (ieee80211_is_data(hdr->frame_control) &&
 760                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 761                     !ieee80211_has_pm(hdr->frame_control)) {
 762                         ath_dbg(common, PS,
 763                                 "Add PM=1 for a TX frame while in PS mode\n");
 764                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 765                 }
 766         }
 767
 768         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 769                 /*
 770                  * We are using PS-Poll and mac80211 can request TX while in
 771                  * power save mode. Need to wake up hardware for the TX to be
 772                  * completed and if needed, also for RX of buffered frames.
 773                  */
 774                 ath9k_ps_wakeup(sc);
 775                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 776                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 777                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 778                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 779                         ath_dbg(common, PS,
 780                                 "Sending PS-Poll to pick a buffered frame\n");
 781                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 782                 } else {
 783                         ath_dbg(common, PS, "Wake up to complete TX\n");
 784                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 785                 }
 786                 /*
 787                  * The actual restore operation will happen only after
 788                  * the ps_flags bit is cleared. We are just dropping
 789                  * the ps_usecount here.
 790                  */
 791                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 792                 ath9k_ps_restore(sc);
 793         }
 794
 795         /*
 796          * Cannot tx while the hardware is in full sleep, it first needs a full
 797          * chip reset to recover from that
 798          */
 799         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 800                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 801                 goto exit;
 802         }
 803
 804         memset(&txctl, 0, sizeof(struct ath_tx_control));
 805         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 806         txctl.sta = control->sta;
 807
 808         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 809
 810         if (ath_tx_start(hw, skb, &txctl) != 0) {
 811                 ath_dbg(common, XMIT, "TX failed\n");
 812                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 813                 goto exit;
 814         }
 815
 816         return;
 817 exit:
 818         ieee80211_free_txskb(hw, skb);
 819 }
 820
 821 static void ath9k_stop(struct ieee80211_hw *hw)
 822 {
 823         struct ath_softc *sc = hw->priv;
 824         struct ath_hw *ah = sc->sc_ah;
 825         struct ath_common *common = ath9k_hw_common(ah);
 826         bool prev_idle;
 827
 828         ath9k_deinit_channel_context(sc);
 829
 830         ath9k_rng_stop(sc);
 831
 832         mutex_lock(&sc->mutex);
 833
 834         ath_cancel_work(sc);
 835
 836         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 837                 ath_dbg(common, ANY, "Device not present\n");
 838                 mutex_unlock(&sc->mutex);
 839                 return;
 840         }
 841
 842         /* Ensure HW is awake when we try to shut it down. */
 843         ath9k_ps_wakeup(sc);
 844
 845         spin_lock_bh(&sc->sc_pcu_lock);
 846
 847         /* prevent tasklets to enable interrupts once we disable them */
 848         ah->imask &= ~ATH9K_INT_GLOBAL;
 849
 850         /* make sure h/w will not generate any interrupt
 851          * before setting the invalid flag. */
 852         ath9k_hw_disable_interrupts(ah);
 853
 854         spin_unlock_bh(&sc->sc_pcu_lock);
 855
 856         /* we can now sync irq and kill any running tasklets, since we already
 857          * disabled interrupts and not holding a spin lock */
 858         synchronize_irq(sc->irq);
 859         tasklet_kill(&sc->intr_tq);
 860         tasklet_kill(&sc->bcon_tasklet);
 861
 862         prev_idle = sc->ps_idle;
 863         sc->ps_idle = true;
 864
 865         spin_lock_bh(&sc->sc_pcu_lock);
 866
 867         if (ah->led_pin >= 0)
 868                 ath9k_hw_set_gpio(ah, ah->led_pin,
 869                                   (ah->config.led_active_high) ? 0 : 1);
 870
 871         ath_prepare_reset(sc);
 872
 873         if (sc->rx.frag) {
 874                 dev_kfree_skb_any(sc->rx.frag);
 875                 sc->rx.frag = NULL;
 876         }
 877
 878         if (!ah->curchan)
 879                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 880                                                     &sc->cur_chan->chandef);
 881
 882         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 883
 884         set_bit(ATH_OP_INVALID, &common->op_flags);
 885
 886         ath9k_hw_phy_disable(ah);
 887
 888         ath9k_hw_configpcipowersave(ah, true);
 889
 890         spin_unlock_bh(&sc->sc_pcu_lock);
 891
 892         ath9k_ps_restore(sc);
 893
 894         sc->ps_idle = prev_idle;
 895
 896         mutex_unlock(&sc->mutex);
 897
 898         ath_dbg(common, CONFIG, "Driver halt\n");
 899 }
 900
 901 static bool ath9k_uses_beacons(int type)
 902 {
 903         switch (type) {
 904         case NL80211_IFTYPE_AP:
 905         case NL80211_IFTYPE_ADHOC:
 906         case NL80211_IFTYPE_MESH_POINT:
 907                 return true;
 908         default:
 909                 return false;
 910         }
 911 }
 912
 913 static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
 914                                       struct ieee80211_vif *vif)
 915 {
 916         /* Use the first (configured) interface, but prefering AP interfaces. */
 917         if (!iter_data->primary_beacon_vif) {
 918                 iter_data->primary_beacon_vif = vif;
 919         } else {
 920                 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
 921                     vif->type == NL80211_IFTYPE_AP)
 922                 iter_data->primary_beacon_vif = vif;
 923         }
 924
 925         iter_data->beacons = true;
 926         iter_data->nbcnvifs += 1;
 927 }
 928
 929 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 930                            u8 *mac, struct ieee80211_vif *vif)
 931 {
 932         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 933         int i;
 934
 935         if (iter_data->has_hw_macaddr) {
 936                 for (i = 0; i < ETH_ALEN; i++)
 937                         iter_data->mask[i] &=
 938                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 939         } else {
 940                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 941                 iter_data->has_hw_macaddr = true;
 942         }
 943
 944         if (!vif->bss_conf.use_short_slot)
 945                 iter_data->slottime = 20;
 946
 947         switch (vif->type) {
 948         case NL80211_IFTYPE_AP:
 949                 iter_data->naps++;
 950                 if (vif->bss_conf.enable_beacon)
 951                         ath9k_vif_iter_set_beacon(iter_data, vif);
 952                 break;
 953         case NL80211_IFTYPE_STATION:
 954                 iter_data->nstations++;
 955                 if (avp->assoc && !iter_data->primary_sta)
 956                         iter_data->primary_sta = vif;
 957                 break;
 958         case NL80211_IFTYPE_OCB:
 959                 iter_data->nocbs++;
 960                 break;
 961         case NL80211_IFTYPE_ADHOC:
 962                 iter_data->nadhocs++;
 963                 if (vif->bss_conf.enable_beacon)
 964                         ath9k_vif_iter_set_beacon(iter_data, vif);
 965                 break;
 966         case NL80211_IFTYPE_MESH_POINT:
 967                 iter_data->nmeshes++;
 968                 if (vif->bss_conf.enable_beacon)
 969                         ath9k_vif_iter_set_beacon(iter_data, vif);
 970                 break;
 971         case NL80211_IFTYPE_WDS:
 972                 iter_data->nwds++;
 973                 break;
 974         default:
 975                 break;
 976         }
 977 }
 978
 979 static void ath9k_update_bssid_mask(struct ath_softc *sc,
 980                                     struct ath_chanctx *ctx,
 981                                     struct ath9k_vif_iter_data *iter_data)
 982 {
 983         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 984         struct ath_vif *avp;
 985         int i;
 986
 987         if (!ath9k_is_chanctx_enabled())
 988                 return;
 989
 990         list_for_each_entry(avp, &ctx->vifs, list) {
 991                 if (ctx->nvifs_assigned != 1)
 992                         continue;
 993
 994                 if (!iter_data->has_hw_macaddr)
 995                         continue;
 996
 997                 ether_addr_copy(common->curbssid, avp->bssid);
 998
 999                 /* perm_addr will be used as the p2p device address. */
1000                 for (i = 0; i < ETH_ALEN; i++)
1001                         iter_data->mask[i] &=
1002                                 ~(iter_data->hw_macaddr[i] ^
1003                                   sc->hw->wiphy->perm_addr[i]);
1004         }
1005 }
1006
1007 /* Called with sc->mutex held. */
1008 void ath9k_calculate_iter_data(struct ath_softc *sc,
1009                                struct ath_chanctx *ctx,
1010                                struct ath9k_vif_iter_data *iter_data)
1011 {
1012         struct ath_vif *avp;
1013
1014         /*
1015          * The hardware will use primary station addr together with the
1016          * BSSID mask when matching addresses.
1017          */
1018         memset(iter_data, 0, sizeof(*iter_data));
1019         eth_broadcast_addr(iter_data->mask);
1020         iter_data->slottime = 9;
1021
1022         list_for_each_entry(avp, &ctx->vifs, list)
1023                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1024
1025         ath9k_update_bssid_mask(sc, ctx, iter_data);
1026 }
1027
1028 static void ath9k_set_assoc_state(struct ath_softc *sc,
1029                                   struct ieee80211_vif *vif, bool changed)
1030 {
1031         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1032         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1033         unsigned long flags;
1034
1035         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1036
1037         ether_addr_copy(common->curbssid, avp->bssid);
1038         common->curaid = avp->aid;
1039         ath9k_hw_write_associd(sc->sc_ah);
1040
1041         if (changed) {
1042                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1043                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1044
1045                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1046                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1047                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1048         }
1049
1050         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1051                 ath9k_mci_update_wlan_channels(sc, false);
1052
1053         ath_dbg(common, CONFIG,
1054                 "Primary Station interface: %pM, BSSID: %pM\n",
1055                 vif->addr, common->curbssid);
1056 }
1057
1058 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1059 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1060 {
1061         struct ath_hw *ah = sc->sc_ah;
1062         struct ath_common *common = ath9k_hw_common(ah);
1063         struct ieee80211_vif *vif = NULL;
1064
1065         ath9k_ps_wakeup(sc);
1066
1067         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1068                 vif = sc->offchannel.scan_vif;
1069         else
1070                 vif = sc->offchannel.roc_vif;
1071
1072         if (WARN_ON(!vif))
1073                 goto exit;
1074
1075         eth_zero_addr(common->curbssid);
1076         eth_broadcast_addr(common->bssidmask);
1077         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1078         common->curaid = 0;
1079         ah->opmode = vif->type;
1080         ah->imask &= ~ATH9K_INT_SWBA;
1081         ah->imask &= ~ATH9K_INT_TSFOOR;
1082         ah->slottime = 9;
1083
1084         ath_hw_setbssidmask(common);
1085         ath9k_hw_setopmode(ah);
1086         ath9k_hw_write_associd(sc->sc_ah);
1087         ath9k_hw_set_interrupts(ah);
1088         ath9k_hw_init_global_settings(ah);
1089
1090 exit:
1091         ath9k_ps_restore(sc);
1092 }
1093 #endif
1094
1095 /* Called with sc->mutex held. */
1096 void ath9k_calculate_summary_state(struct ath_softc *sc,
1097                                    struct ath_chanctx *ctx)
1098 {
1099         struct ath_hw *ah = sc->sc_ah;
1100         struct ath_common *common = ath9k_hw_common(ah);
1101         struct ath9k_vif_iter_data iter_data;
1102
1103         ath_chanctx_check_active(sc, ctx);
1104
1105         if (ctx != sc->cur_chan)
1106                 return;
1107
1108 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1109         if (ctx == &sc->offchannel.chan)
1110                 return ath9k_set_offchannel_state(sc);
1111 #endif
1112
1113         ath9k_ps_wakeup(sc);
1114         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1115
1116         if (iter_data.has_hw_macaddr)
1117                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1118
1119         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1120         ath_hw_setbssidmask(common);
1121
1122         if (iter_data.naps > 0) {
1123                 ath9k_hw_set_tsfadjust(ah, true);
1124                 ah->opmode = NL80211_IFTYPE_AP;
1125         } else {
1126                 ath9k_hw_set_tsfadjust(ah, false);
1127                 if (iter_data.beacons)
1128                         ath9k_beacon_ensure_primary_slot(sc);
1129
1130                 if (iter_data.nmeshes)
1131                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1132                 else if (iter_data.nocbs)
1133                         ah->opmode = NL80211_IFTYPE_OCB;
1134                 else if (iter_data.nwds)
1135                         ah->opmode = NL80211_IFTYPE_AP;
1136                 else if (iter_data.nadhocs)
1137                         ah->opmode = NL80211_IFTYPE_ADHOC;
1138                 else
1139                         ah->opmode = NL80211_IFTYPE_STATION;
1140         }
1141
1142         ath9k_hw_setopmode(ah);
1143
1144         ctx->switch_after_beacon = false;
1145         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1146                 ah->imask |= ATH9K_INT_TSFOOR;
1147         else {
1148                 ah->imask &= ~ATH9K_INT_TSFOOR;
1149                 if (iter_data.naps == 1 && iter_data.beacons)
1150                         ctx->switch_after_beacon = true;
1151         }
1152
1153         if (ah->opmode == NL80211_IFTYPE_STATION) {
1154                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1155
1156                 if (iter_data.primary_sta) {
1157                         iter_data.beacons = true;
1158                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1159                                               changed);
1160                         ctx->primary_sta = iter_data.primary_sta;
1161                 } else {
1162                         ctx->primary_sta = NULL;
1163                         eth_zero_addr(common->curbssid);
1164                         common->curaid = 0;
1165                         ath9k_hw_write_associd(sc->sc_ah);
1166                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1167                                 ath9k_mci_update_wlan_channels(sc, true);
1168                 }
1169         }
1170         sc->nbcnvifs = iter_data.nbcnvifs;
1171         ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1172                             iter_data.beacons);
1173         ath9k_hw_set_interrupts(ah);
1174
1175         if (ah->slottime != iter_data.slottime) {
1176                 ah->slottime = iter_data.slottime;
1177                 ath9k_hw_init_global_settings(ah);
1178         }
1179
1180         if (iter_data.primary_sta)
1181                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1182         else
1183                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1184
1185         ath_dbg(common, CONFIG,
1186                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1187                 common->macaddr, common->curbssid, common->bssidmask);
1188
1189         ath9k_ps_restore(sc);
1190 }
1191
1192 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1193 {
1194         int *power = (int *)data;
1195
1196         if (*power < vif->bss_conf.txpower)
1197                 *power = vif->bss_conf.txpower;
1198 }
1199
1200 /* Called with sc->mutex held. */
1201 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1202 {
1203         int power;
1204         struct ath_hw *ah = sc->sc_ah;
1205         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1206
1207         ath9k_ps_wakeup(sc);
1208         if (ah->tpc_enabled) {
1209                 power = (vif) ? vif->bss_conf.txpower : -1;
1210                 ieee80211_iterate_active_interfaces_atomic(
1211                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1212                                 ath9k_tpc_vif_iter, &power);
1213                 if (power == -1)
1214                         power = sc->hw->conf.power_level;
1215         } else {
1216                 power = sc->hw->conf.power_level;
1217         }
1218         sc->cur_chan->txpower = 2 * power;
1219         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1220         sc->cur_chan->cur_txpower = reg->max_power_level;
1221         ath9k_ps_restore(sc);
1222 }
1223
1224 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1225                                    struct ieee80211_vif *vif)
1226 {
1227         int i;
1228
1229         if (!ath9k_is_chanctx_enabled())
1230                 return;
1231
1232         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1233                 vif->hw_queue[i] = i;
1234
1235         if (vif->type == NL80211_IFTYPE_AP ||
1236             vif->type == NL80211_IFTYPE_MESH_POINT)
1237                 vif->cab_queue = hw->queues - 2;
1238         else
1239                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1240 }
1241
1242 static int ath9k_add_interface(struct ieee80211_hw *hw,
1243                                struct ieee80211_vif *vif)
1244 {
1245         struct ath_softc *sc = hw->priv;
1246         struct ath_hw *ah = sc->sc_ah;
1247         struct ath_common *common = ath9k_hw_common(ah);
1248         struct ath_vif *avp = (void *)vif->drv_priv;
1249         struct ath_node *an = &avp->mcast_node;
1250
1251         mutex_lock(&sc->mutex);
1252
1253         if (config_enabled(CONFIG_ATH9K_TX99)) {
1254                 if (sc->cur_chan->nvifs >= 1) {
1255                         mutex_unlock(&sc->mutex);
1256                         return -EOPNOTSUPP;
1257                 }
1258                 sc->tx99_vif = vif;
1259         }
1260
1261         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1262         sc->cur_chan->nvifs++;
1263
1264         if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1265                 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1266
1267         if (ath9k_uses_beacons(vif->type))
1268                 ath9k_beacon_assign_slot(sc, vif);
1269
1270         avp->vif = vif;
1271         if (!ath9k_is_chanctx_enabled()) {
1272                 avp->chanctx = sc->cur_chan;
1273                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1274         }
1275
1276         ath9k_calculate_summary_state(sc, avp->chanctx);
1277
1278         ath9k_assign_hw_queues(hw, vif);
1279
1280         ath9k_set_txpower(sc, vif);
1281
1282         an->sc = sc;
1283         an->sta = NULL;
1284         an->vif = vif;
1285         an->no_ps_filter = true;
1286         ath_tx_node_init(sc, an);
1287
1288         mutex_unlock(&sc->mutex);
1289         return 0;
1290 }
1291
1292 static int ath9k_change_interface(struct ieee80211_hw *hw,
1293                                   struct ieee80211_vif *vif,
1294                                   enum nl80211_iftype new_type,
1295                                   bool p2p)
1296 {
1297         struct ath_softc *sc = hw->priv;
1298         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1299         struct ath_vif *avp = (void *)vif->drv_priv;
1300
1301         mutex_lock(&sc->mutex);
1302
1303         if (config_enabled(CONFIG_ATH9K_TX99)) {
1304                 mutex_unlock(&sc->mutex);
1305                 return -EOPNOTSUPP;
1306         }
1307
1308         ath_dbg(common, CONFIG, "Change Interface\n");
1309
1310         if (ath9k_uses_beacons(vif->type))
1311                 ath9k_beacon_remove_slot(sc, vif);
1312
1313         vif->type = new_type;
1314         vif->p2p = p2p;
1315
1316         if (ath9k_uses_beacons(vif->type))
1317                 ath9k_beacon_assign_slot(sc, vif);
1318
1319         ath9k_assign_hw_queues(hw, vif);
1320         ath9k_calculate_summary_state(sc, avp->chanctx);
1321
1322         ath9k_set_txpower(sc, vif);
1323
1324         mutex_unlock(&sc->mutex);
1325         return 0;
1326 }
1327
1328 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1329                                    struct ieee80211_vif *vif)
1330 {
1331         struct ath_softc *sc = hw->priv;
1332         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1333         struct ath_vif *avp = (void *)vif->drv_priv;
1334
1335         ath_dbg(common, CONFIG, "Detach Interface\n");
1336
1337         mutex_lock(&sc->mutex);
1338
1339         ath9k_p2p_remove_vif(sc, vif);
1340
1341         sc->cur_chan->nvifs--;
1342         sc->tx99_vif = NULL;
1343         if (!ath9k_is_chanctx_enabled())
1344                 list_del(&avp->list);
1345
1346         if (ath9k_uses_beacons(vif->type))
1347                 ath9k_beacon_remove_slot(sc, vif);
1348
1349         ath_tx_node_cleanup(sc, &avp->mcast_node);
1350
1351         ath9k_calculate_summary_state(sc, avp->chanctx);
1352
1353         ath9k_set_txpower(sc, NULL);
1354
1355         mutex_unlock(&sc->mutex);
1356 }
1357
1358 static void ath9k_enable_ps(struct ath_softc *sc)
1359 {
1360         struct ath_hw *ah = sc->sc_ah;
1361         struct ath_common *common = ath9k_hw_common(ah);
1362
1363         if (config_enabled(CONFIG_ATH9K_TX99))
1364                 return;
1365
1366         sc->ps_enabled = true;
1367         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1368                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1369                         ah->imask |= ATH9K_INT_TIM_TIMER;
1370                         ath9k_hw_set_interrupts(ah);
1371                 }
1372                 ath9k_hw_setrxabort(ah, 1);
1373         }
1374         ath_dbg(common, PS, "PowerSave enabled\n");
1375 }
1376
1377 static void ath9k_disable_ps(struct ath_softc *sc)
1378 {
1379         struct ath_hw *ah = sc->sc_ah;
1380         struct ath_common *common = ath9k_hw_common(ah);
1381
1382         if (config_enabled(CONFIG_ATH9K_TX99))
1383                 return;
1384
1385         sc->ps_enabled = false;
1386         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1387         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1388                 ath9k_hw_setrxabort(ah, 0);
1389                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1390                                   PS_WAIT_FOR_CAB |
1391                                   PS_WAIT_FOR_PSPOLL_DATA |
1392                                   PS_WAIT_FOR_TX_ACK);
1393                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1394                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1395                         ath9k_hw_set_interrupts(ah);
1396                 }
1397         }
1398         ath_dbg(common, PS, "PowerSave disabled\n");
1399 }
1400
1401 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1402 {
1403         struct ath_softc *sc = hw->priv;
1404         struct ath_hw *ah = sc->sc_ah;
1405         struct ath_common *common = ath9k_hw_common(ah);
1406         struct ieee80211_conf *conf = &hw->conf;
1407         struct ath_chanctx *ctx = sc->cur_chan;
1408
1409         ath9k_ps_wakeup(sc);
1410         mutex_lock(&sc->mutex);
1411
1412         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1413                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1414                 if (sc->ps_idle) {
1415                         ath_cancel_work(sc);
1416                         ath9k_stop_btcoex(sc);
1417                 } else {
1418                         ath9k_start_btcoex(sc);
1419                         /*
1420                          * The chip needs a reset to properly wake up from
1421                          * full sleep
1422                          */
1423                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1424                 }
1425         }
1426
1427         /*
1428          * We just prepare to enable PS. We have to wait until our AP has
1429          * ACK'd our null data frame to disable RX otherwise we'll ignore
1430          * those ACKs and end up retransmitting the same null data frames.
1431          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1432          */
1433         if (changed & IEEE80211_CONF_CHANGE_PS) {
1434                 unsigned long flags;
1435                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1436                 if (conf->flags & IEEE80211_CONF_PS)
1437                         ath9k_enable_ps(sc);
1438                 else
1439                         ath9k_disable_ps(sc);
1440                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1441         }
1442
1443         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1444                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1445                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1446                         sc->sc_ah->is_monitoring = true;
1447                 } else {
1448                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1449                         sc->sc_ah->is_monitoring = false;
1450                 }
1451         }
1452
1453         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1454                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1455                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1456         }
1457
1458         mutex_unlock(&sc->mutex);
1459         ath9k_ps_restore(sc);
1460
1461         return 0;
1462 }
1463
1464 #define SUPPORTED_FILTERS                       \
1465         (FIF_ALLMULTI |                         \
1466         FIF_CONTROL |                           \
1467         FIF_PSPOLL |                            \
1468         FIF_OTHER_BSS |                         \
1469         FIF_BCN_PRBRESP_PROMISC |               \
1470         FIF_PROBE_REQ |                         \
1471         FIF_FCSFAIL)
1472
1473 /* FIXME: sc->sc_full_reset ? */
1474 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1475                                    unsigned int changed_flags,
1476                                    unsigned int *total_flags,
1477                                    u64 multicast)
1478 {
1479         struct ath_softc *sc = hw->priv;
1480         struct ath_chanctx *ctx;
1481         u32 rfilt;
1482
1483         changed_flags &= SUPPORTED_FILTERS;
1484         *total_flags &= SUPPORTED_FILTERS;
1485
1486         spin_lock_bh(&sc->chan_lock);
1487         ath_for_each_chanctx(sc, ctx)
1488                 ctx->rxfilter = *total_flags;
1489 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1490         sc->offchannel.chan.rxfilter = *total_flags;
1491 #endif
1492         spin_unlock_bh(&sc->chan_lock);
1493
1494         ath9k_ps_wakeup(sc);
1495         rfilt = ath_calcrxfilter(sc);
1496         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1497         ath9k_ps_restore(sc);
1498
1499         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1500                 rfilt);
1501 }
1502
1503 static int ath9k_sta_add(struct ieee80211_hw *hw,
1504                          struct ieee80211_vif *vif,
1505                          struct ieee80211_sta *sta)
1506 {
1507         struct ath_softc *sc = hw->priv;
1508         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1509         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1510         struct ieee80211_key_conf ps_key = { };
1511         int key;
1512
1513         ath_node_attach(sc, sta, vif);
1514
1515         if (vif->type != NL80211_IFTYPE_AP &&
1516             vif->type != NL80211_IFTYPE_AP_VLAN)
1517                 return 0;
1518
1519         key = ath_key_config(common, vif, sta, &ps_key);
1520         if (key > 0) {
1521                 an->ps_key = key;
1522                 an->key_idx[0] = key;
1523         }
1524
1525         return 0;
1526 }
1527
1528 static void ath9k_del_ps_key(struct ath_softc *sc,
1529                              struct ieee80211_vif *vif,
1530                              struct ieee80211_sta *sta)
1531 {
1532         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1533         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1534         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1535
1536         if (!an->ps_key)
1537             return;
1538
1539         ath_key_delete(common, &ps_key);
1540         an->ps_key = 0;
1541         an->key_idx[0] = 0;
1542 }
1543
1544 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1545                             struct ieee80211_vif *vif,
1546                             struct ieee80211_sta *sta)
1547 {
1548         struct ath_softc *sc = hw->priv;
1549
1550         ath9k_del_ps_key(sc, vif, sta);
1551         ath_node_detach(sc, sta);
1552
1553         return 0;
1554 }
1555
1556 static int ath9k_sta_state(struct ieee80211_hw *hw,
1557                            struct ieee80211_vif *vif,
1558                            struct ieee80211_sta *sta,
1559                            enum ieee80211_sta_state old_state,
1560                            enum ieee80211_sta_state new_state)
1561 {
1562         struct ath_softc *sc = hw->priv;
1563         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1564         int ret = 0;
1565
1566         if (old_state == IEEE80211_STA_AUTH &&
1567             new_state == IEEE80211_STA_ASSOC) {
1568                 ret = ath9k_sta_add(hw, vif, sta);
1569                 ath_dbg(common, CONFIG,
1570                         "Add station: %pM\n", sta->addr);
1571         } else if (old_state == IEEE80211_STA_ASSOC &&
1572                    new_state == IEEE80211_STA_AUTH) {
1573                 ret = ath9k_sta_remove(hw, vif, sta);
1574                 ath_dbg(common, CONFIG,
1575                         "Remove station: %pM\n", sta->addr);
1576         }
1577
1578         if (ath9k_is_chanctx_enabled()) {
1579                 if (vif->type == NL80211_IFTYPE_STATION) {
1580                         if (old_state == IEEE80211_STA_ASSOC &&
1581                             new_state == IEEE80211_STA_AUTHORIZED)
1582                                 ath_chanctx_event(sc, vif,
1583                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1584                 }
1585         }
1586
1587         return ret;
1588 }
1589
1590 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1591                                     struct ath_node *an,
1592                                     bool set)
1593 {
1594         int i;
1595
1596         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1597                 if (!an->key_idx[i])
1598                         continue;
1599                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1600         }
1601 }
1602
1603 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1604                          struct ieee80211_vif *vif,
1605                          enum sta_notify_cmd cmd,
1606                          struct ieee80211_sta *sta)
1607 {
1608         struct ath_softc *sc = hw->priv;
1609         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1610
1611         switch (cmd) {
1612         case STA_NOTIFY_SLEEP:
1613                 an->sleeping = true;
1614                 ath_tx_aggr_sleep(sta, sc, an);
1615                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1616                 break;
1617         case STA_NOTIFY_AWAKE:
1618                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1619                 an->sleeping = false;
1620                 ath_tx_aggr_wakeup(sc, an);
1621                 break;
1622         }
1623 }
1624
1625 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1626                          struct ieee80211_vif *vif, u16 queue,
1627                          const struct ieee80211_tx_queue_params *params)
1628 {
1629         struct ath_softc *sc = hw->priv;
1630         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1631         struct ath_txq *txq;
1632         struct ath9k_tx_queue_info qi;
1633         int ret = 0;
1634
1635         if (queue >= IEEE80211_NUM_ACS)
1636                 return 0;
1637
1638         txq = sc->tx.txq_map[queue];
1639
1640         ath9k_ps_wakeup(sc);
1641         mutex_lock(&sc->mutex);
1642
1643         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1644
1645         qi.tqi_aifs = params->aifs;
1646         qi.tqi_cwmin = params->cw_min;
1647         qi.tqi_cwmax = params->cw_max;
1648         qi.tqi_burstTime = params->txop * 32;
1649
1650         ath_dbg(common, CONFIG,
1651                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1652                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1653                 params->cw_max, params->txop);
1654
1655         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1656         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1657         if (ret)
1658                 ath_err(common, "TXQ Update failed\n");
1659
1660         mutex_unlock(&sc->mutex);
1661         ath9k_ps_restore(sc);
1662
1663         return ret;
1664 }
1665
1666 static int ath9k_set_key(struct ieee80211_hw *hw,
1667                          enum set_key_cmd cmd,
1668                          struct ieee80211_vif *vif,
1669                          struct ieee80211_sta *sta,
1670                          struct ieee80211_key_conf *key)
1671 {
1672         struct ath_softc *sc = hw->priv;
1673         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1674         struct ath_node *an = NULL;
1675         int ret = 0, i;
1676
1677         if (ath9k_modparam_nohwcrypt)
1678                 return -ENOSPC;
1679
1680         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1681              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1682             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1683              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1684             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1685                 /*
1686                  * For now, disable hw crypto for the RSN IBSS group keys. This
1687                  * could be optimized in the future to use a modified key cache
1688                  * design to support per-STA RX GTK, but until that gets
1689                  * implemented, use of software crypto for group addressed
1690                  * frames is a acceptable to allow RSN IBSS to be used.
1691                  */
1692                 return -EOPNOTSUPP;
1693         }
1694
1695         mutex_lock(&sc->mutex);
1696         ath9k_ps_wakeup(sc);
1697         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1698         if (sta)
1699                 an = (struct ath_node *)sta->drv_priv;
1700
1701         switch (cmd) {
1702         case SET_KEY:
1703                 if (sta)
1704                         ath9k_del_ps_key(sc, vif, sta);
1705
1706                 key->hw_key_idx = 0;
1707                 ret = ath_key_config(common, vif, sta, key);
1708                 if (ret >= 0) {
1709                         key->hw_key_idx = ret;
1710                         /* push IV and Michael MIC generation to stack */
1711                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1712                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1713                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1714                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1715                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1716                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1717                         ret = 0;
1718                 }
1719                 if (an && key->hw_key_idx) {
1720                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1721                                 if (an->key_idx[i])
1722                                         continue;
1723                                 an->key_idx[i] = key->hw_key_idx;
1724                                 break;
1725                         }
1726                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1727                 }
1728                 break;
1729         case DISABLE_KEY:
1730                 ath_key_delete(common, key);
1731                 if (an) {
1732                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1733                                 if (an->key_idx[i] != key->hw_key_idx)
1734                                         continue;
1735                                 an->key_idx[i] = 0;
1736                                 break;
1737                         }
1738                 }
1739                 key->hw_key_idx = 0;
1740                 break;
1741         default:
1742                 ret = -EINVAL;
1743         }
1744
1745         ath9k_ps_restore(sc);
1746         mutex_unlock(&sc->mutex);
1747
1748         return ret;
1749 }
1750
1751 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1752                                    struct ieee80211_vif *vif,
1753                                    struct ieee80211_bss_conf *bss_conf,
1754                                    u32 changed)
1755 {
1756 #define CHECK_ANI                               \
1757         (BSS_CHANGED_ASSOC |                    \
1758          BSS_CHANGED_IBSS |                     \
1759          BSS_CHANGED_BEACON_ENABLED)
1760
1761         struct ath_softc *sc = hw->priv;
1762         struct ath_hw *ah = sc->sc_ah;
1763         struct ath_common *common = ath9k_hw_common(ah);
1764         struct ath_vif *avp = (void *)vif->drv_priv;
1765         int slottime;
1766
1767         ath9k_ps_wakeup(sc);
1768         mutex_lock(&sc->mutex);
1769
1770         if (changed & BSS_CHANGED_ASSOC) {
1771                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1772                         bss_conf->bssid, bss_conf->assoc);
1773
1774                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1775                 avp->aid = bss_conf->aid;
1776                 avp->assoc = bss_conf->assoc;
1777
1778                 ath9k_calculate_summary_state(sc, avp->chanctx);
1779         }
1780
1781         if ((changed & BSS_CHANGED_IBSS) ||
1782               (changed & BSS_CHANGED_OCB)) {
1783                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1784                 common->curaid = bss_conf->aid;
1785                 ath9k_hw_write_associd(sc->sc_ah);
1786         }
1787
1788         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1789             (changed & BSS_CHANGED_BEACON_INT) ||
1790             (changed & BSS_CHANGED_BEACON_INFO)) {
1791                 ath9k_calculate_summary_state(sc, avp->chanctx);
1792         }
1793
1794         if ((avp->chanctx == sc->cur_chan) &&
1795             (changed & BSS_CHANGED_ERP_SLOT)) {
1796                 if (bss_conf->use_short_slot)
1797                         slottime = 9;
1798                 else
1799                         slottime = 20;
1800
1801                 if (vif->type == NL80211_IFTYPE_AP) {
1802                         /*
1803                          * Defer update, so that connected stations can adjust
1804                          * their settings at the same time.
1805                          * See beacon.c for more details
1806                          */
1807                         sc->beacon.slottime = slottime;
1808                         sc->beacon.updateslot = UPDATE;
1809                 } else {
1810                         ah->slottime = slottime;
1811                         ath9k_hw_init_global_settings(ah);
1812                 }
1813         }
1814
1815         if (changed & BSS_CHANGED_P2P_PS)
1816                 ath9k_p2p_bss_info_changed(sc, vif);
1817
1818         if (changed & CHECK_ANI)
1819                 ath_check_ani(sc);
1820
1821         if (changed & BSS_CHANGED_TXPOWER) {
1822                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1823                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1824                 ath9k_set_txpower(sc, vif);
1825         }
1826
1827         mutex_unlock(&sc->mutex);
1828         ath9k_ps_restore(sc);
1829
1830 #undef CHECK_ANI
1831 }
1832
1833 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1834 {
1835         struct ath_softc *sc = hw->priv;
1836         struct ath_vif *avp = (void *)vif->drv_priv;
1837         u64 tsf;
1838
1839         mutex_lock(&sc->mutex);
1840         ath9k_ps_wakeup(sc);
1841         /* Get current TSF either from HW or kernel time. */
1842         if (sc->cur_chan == avp->chanctx) {
1843                 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1844         } else {
1845                 tsf = sc->cur_chan->tsf_val +
1846                       ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1847         }
1848         tsf += le64_to_cpu(avp->tsf_adjust);
1849         ath9k_ps_restore(sc);
1850         mutex_unlock(&sc->mutex);
1851
1852         return tsf;
1853 }
1854
1855 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1856                           struct ieee80211_vif *vif,
1857                           u64 tsf)
1858 {
1859         struct ath_softc *sc = hw->priv;
1860         struct ath_vif *avp = (void *)vif->drv_priv;
1861
1862         mutex_lock(&sc->mutex);
1863         ath9k_ps_wakeup(sc);
1864         tsf -= le64_to_cpu(avp->tsf_adjust);
1865         getrawmonotonic(&avp->chanctx->tsf_ts);
1866         if (sc->cur_chan == avp->chanctx)
1867                 ath9k_hw_settsf64(sc->sc_ah, tsf);
1868         avp->chanctx->tsf_val = tsf;
1869         ath9k_ps_restore(sc);
1870         mutex_unlock(&sc->mutex);
1871 }
1872
1873 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1874 {
1875         struct ath_softc *sc = hw->priv;
1876         struct ath_vif *avp = (void *)vif->drv_priv;
1877
1878         mutex_lock(&sc->mutex);
1879
1880         ath9k_ps_wakeup(sc);
1881         getrawmonotonic(&avp->chanctx->tsf_ts);
1882         if (sc->cur_chan == avp->chanctx)
1883                 ath9k_hw_reset_tsf(sc->sc_ah);
1884         avp->chanctx->tsf_val = 0;
1885         ath9k_ps_restore(sc);
1886
1887         mutex_unlock(&sc->mutex);
1888 }
1889
1890 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1891                               struct ieee80211_vif *vif,
1892                               struct ieee80211_ampdu_params *params)
1893 {
1894         struct ath_softc *sc = hw->priv;
1895         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1896         bool flush = false;
1897         int ret = 0;
1898         struct ieee80211_sta *sta = params->sta;
1899         enum ieee80211_ampdu_mlme_action action = params->action;
1900         u16 tid = params->tid;
1901         u16 *ssn = &params->ssn;
1902
1903         mutex_lock(&sc->mutex);
1904
1905         switch (action) {
1906         case IEEE80211_AMPDU_RX_START:
1907                 break;
1908         case IEEE80211_AMPDU_RX_STOP:
1909                 break;
1910         case IEEE80211_AMPDU_TX_START:
1911                 if (ath9k_is_chanctx_enabled()) {
1912                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1913                                 ret = -EBUSY;
1914                                 break;
1915                         }
1916                 }
1917                 ath9k_ps_wakeup(sc);
1918                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1919                 if (!ret)
1920                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1921                 ath9k_ps_restore(sc);
1922                 break;
1923         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1924         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1925                 flush = true;
1926         case IEEE80211_AMPDU_TX_STOP_CONT:
1927                 ath9k_ps_wakeup(sc);
1928                 ath_tx_aggr_stop(sc, sta, tid);
1929                 if (!flush)
1930                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1931                 ath9k_ps_restore(sc);
1932                 break;
1933         case IEEE80211_AMPDU_TX_OPERATIONAL:
1934                 ath9k_ps_wakeup(sc);
1935                 ath_tx_aggr_resume(sc, sta, tid);
1936                 ath9k_ps_restore(sc);
1937                 break;
1938         default:
1939                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1940         }
1941
1942         mutex_unlock(&sc->mutex);
1943
1944         return ret;
1945 }
1946
1947 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1948                              struct survey_info *survey)
1949 {
1950         struct ath_softc *sc = hw->priv;
1951         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1952         struct ieee80211_supported_band *sband;
1953         struct ieee80211_channel *chan;
1954         int pos;
1955
1956         if (config_enabled(CONFIG_ATH9K_TX99))
1957                 return -EOPNOTSUPP;
1958
1959         spin_lock_bh(&common->cc_lock);
1960         if (idx == 0)
1961                 ath_update_survey_stats(sc);
1962
1963         sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
1964         if (sband && idx >= sband->n_channels) {
1965                 idx -= sband->n_channels;
1966                 sband = NULL;
1967         }
1968
1969         if (!sband)
1970                 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
1971
1972         if (!sband || idx >= sband->n_channels) {
1973                 spin_unlock_bh(&common->cc_lock);
1974                 return -ENOENT;
1975         }
1976
1977         chan = &sband->channels[idx];
1978         pos = chan->hw_value;
1979         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1980         survey->channel = chan;
1981         spin_unlock_bh(&common->cc_lock);
1982
1983         return 0;
1984 }
1985
1986 static void ath9k_enable_dynack(struct ath_softc *sc)
1987 {
1988 #ifdef CONFIG_ATH9K_DYNACK
1989         u32 rfilt;
1990         struct ath_hw *ah = sc->sc_ah;
1991
1992         ath_dynack_reset(ah);
1993
1994         ah->dynack.enabled = true;
1995         rfilt = ath_calcrxfilter(sc);
1996         ath9k_hw_setrxfilter(ah, rfilt);
1997 #endif
1998 }
1999
2000 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2001                                      s16 coverage_class)
2002 {
2003         struct ath_softc *sc = hw->priv;
2004         struct ath_hw *ah = sc->sc_ah;
2005
2006         if (config_enabled(CONFIG_ATH9K_TX99))
2007                 return;
2008
2009         mutex_lock(&sc->mutex);
2010
2011         if (coverage_class >= 0) {
2012                 ah->coverage_class = coverage_class;
2013                 if (ah->dynack.enabled) {
2014                         u32 rfilt;
2015
2016                         ah->dynack.enabled = false;
2017                         rfilt = ath_calcrxfilter(sc);
2018                         ath9k_hw_setrxfilter(ah, rfilt);
2019                 }
2020                 ath9k_ps_wakeup(sc);
2021                 ath9k_hw_init_global_settings(ah);
2022                 ath9k_ps_restore(sc);
2023         } else if (!ah->dynack.enabled) {
2024                 ath9k_enable_dynack(sc);
2025         }
2026
2027         mutex_unlock(&sc->mutex);
2028 }
2029
2030 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2031                                  bool sw_pending)
2032 {
2033         int i, npend = 0;
2034
2035         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2036                 if (!ATH_TXQ_SETUP(sc, i))
2037                         continue;
2038
2039                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2040                                                  sw_pending);
2041                 if (npend)
2042                         break;
2043         }
2044
2045         return !!npend;
2046 }
2047
2048 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2049                         u32 queues, bool drop)
2050 {
2051         struct ath_softc *sc = hw->priv;
2052         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2053
2054         if (ath9k_is_chanctx_enabled()) {
2055                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2056                         goto flush;
2057
2058                 /*
2059                  * If MCC is active, extend the flush timeout
2060                  * and wait for the HW/SW queues to become
2061                  * empty. This needs to be done outside the
2062                  * sc->mutex lock to allow the channel scheduler
2063                  * to switch channel contexts.
2064                  *
2065                  * The vif queues have been stopped in mac80211,
2066                  * so there won't be any incoming frames.
2067                  */
2068                 __ath9k_flush(hw, queues, drop, true, true);
2069                 return;
2070         }
2071 flush:
2072         mutex_lock(&sc->mutex);
2073         __ath9k_flush(hw, queues, drop, true, false);
2074         mutex_unlock(&sc->mutex);
2075 }
2076
2077 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2078                    bool sw_pending, bool timeout_override)
2079 {
2080         struct ath_softc *sc = hw->priv;
2081         struct ath_hw *ah = sc->sc_ah;
2082         struct ath_common *common = ath9k_hw_common(ah);
2083         int timeout;
2084         bool drain_txq;
2085
2086         cancel_delayed_work_sync(&sc->tx_complete_work);
2087
2088         if (ah->ah_flags & AH_UNPLUGGED) {
2089                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2090                 return;
2091         }
2092
2093         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2094                 ath_dbg(common, ANY, "Device not present\n");
2095                 return;
2096         }
2097
2098         spin_lock_bh(&sc->chan_lock);
2099         if (timeout_override)
2100                 timeout = HZ / 5;
2101         else
2102                 timeout = sc->cur_chan->flush_timeout;
2103         spin_unlock_bh(&sc->chan_lock);
2104
2105         ath_dbg(common, CHAN_CTX,
2106                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2107
2108         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2109                                timeout) > 0)
2110                 drop = false;
2111
2112         if (drop) {
2113                 ath9k_ps_wakeup(sc);
2114                 spin_lock_bh(&sc->sc_pcu_lock);
2115                 drain_txq = ath_drain_all_txq(sc);
2116                 spin_unlock_bh(&sc->sc_pcu_lock);
2117
2118                 if (!drain_txq)
2119                         ath_reset(sc, NULL);
2120
2121                 ath9k_ps_restore(sc);
2122         }
2123
2124         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2125 }
2126
2127 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2128 {
2129         struct ath_softc *sc = hw->priv;
2130
2131         return ath9k_has_tx_pending(sc, true);
2132 }
2133
2134 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2135 {
2136         struct ath_softc *sc = hw->priv;
2137         struct ath_hw *ah = sc->sc_ah;
2138         struct ieee80211_vif *vif;
2139         struct ath_vif *avp;
2140         struct ath_buf *bf;
2141         struct ath_tx_status ts;
2142         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2143         int status;
2144
2145         vif = sc->beacon.bslot[0];
2146         if (!vif)
2147                 return 0;
2148
2149         if (!vif->bss_conf.enable_beacon)
2150                 return 0;
2151
2152         avp = (void *)vif->drv_priv;
2153
2154         if (!sc->beacon.tx_processed && !edma) {
2155                 tasklet_disable(&sc->bcon_tasklet);
2156
2157                 bf = avp->av_bcbuf;
2158                 if (!bf || !bf->bf_mpdu)
2159                         goto skip;
2160
2161                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2162                 if (status == -EINPROGRESS)
2163                         goto skip;
2164
2165                 sc->beacon.tx_processed = true;
2166                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2167
2168 skip:
2169                 tasklet_enable(&sc->bcon_tasklet);
2170         }
2171
2172         return sc->beacon.tx_last;
2173 }
2174
2175 static int ath9k_get_stats(struct ieee80211_hw *hw,
2176                            struct ieee80211_low_level_stats *stats)
2177 {
2178         struct ath_softc *sc = hw->priv;
2179         struct ath_hw *ah = sc->sc_ah;
2180         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2181
2182         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2183         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2184         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2185         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2186         return 0;
2187 }
2188
2189 static u32 fill_chainmask(u32 cap, u32 new)
2190 {
2191         u32 filled = 0;
2192         int i;
2193
2194         for (i = 0; cap && new; i++, cap >>= 1) {
2195                 if (!(cap & BIT(0)))
2196                         continue;
2197
2198                 if (new & BIT(0))
2199                         filled |= BIT(i);
2200
2201                 new >>= 1;
2202         }
2203
2204         return filled;
2205 }
2206
2207 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2208 {
2209         if (AR_SREV_9300_20_OR_LATER(ah))
2210                 return true;
2211
2212         switch (val & 0x7) {
2213         case 0x1:
2214         case 0x3:
2215         case 0x7:
2216                 return true;
2217         case 0x2:
2218                 return (ah->caps.rx_chainmask == 1);
2219         default:
2220                 return false;
2221         }
2222 }
2223
2224 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2225 {
2226         struct ath_softc *sc = hw->priv;
2227         struct ath_hw *ah = sc->sc_ah;
2228
2229         if (ah->caps.rx_chainmask != 1)
2230                 rx_ant |= tx_ant;
2231
2232         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2233                 return -EINVAL;
2234
2235         sc->ant_rx = rx_ant;
2236         sc->ant_tx = tx_ant;
2237
2238         if (ah->caps.rx_chainmask == 1)
2239                 return 0;
2240
2241         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2242         if (AR_SREV_9100(ah))
2243                 ah->rxchainmask = 0x7;
2244         else
2245                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2246
2247         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2248         ath9k_cmn_reload_chainmask(ah);
2249
2250         return 0;
2251 }
2252
2253 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2254 {
2255         struct ath_softc *sc = hw->priv;
2256
2257         *tx_ant = sc->ant_tx;
2258         *rx_ant = sc->ant_rx;
2259         return 0;
2260 }
2261
2262 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2263                                 struct ieee80211_vif *vif,
2264                                 const u8 *mac_addr)
2265 {
2266         struct ath_softc *sc = hw->priv;
2267         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2268         set_bit(ATH_OP_SCANNING, &common->op_flags);
2269 }
2270
2271 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2272                                    struct ieee80211_vif *vif)
2273 {
2274         struct ath_softc *sc = hw->priv;
2275         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2276         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2277 }
2278
2279 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2280
2281 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2282 {
2283         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2284
2285         if (sc->offchannel.roc_vif) {
2286                 ath_dbg(common, CHAN_CTX,
2287                         "%s: Aborting RoC\n", __func__);
2288
2289                 del_timer_sync(&sc->offchannel.timer);
2290                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2291                         ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2292         }
2293
2294         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2295                 ath_dbg(common, CHAN_CTX,
2296                         "%s: Aborting HW scan\n", __func__);
2297
2298                 del_timer_sync(&sc->offchannel.timer);
2299                 ath_scan_complete(sc, true);
2300         }
2301 }
2302
2303 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2304                          struct ieee80211_scan_request *hw_req)
2305 {
2306         struct cfg80211_scan_request *req = &hw_req->req;
2307         struct ath_softc *sc = hw->priv;
2308         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2309         int ret = 0;
2310
2311         mutex_lock(&sc->mutex);
2312
2313         if (WARN_ON(sc->offchannel.scan_req)) {
2314                 ret = -EBUSY;
2315                 goto out;
2316         }
2317
2318         ath9k_ps_wakeup(sc);
2319         set_bit(ATH_OP_SCANNING, &common->op_flags);
2320         sc->offchannel.scan_vif = vif;
2321         sc->offchannel.scan_req = req;
2322         sc->offchannel.scan_idx = 0;
2323
2324         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2325                 vif->addr);
2326
2327         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2328                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2329                 ath_offchannel_next(sc);
2330         }
2331
2332 out:
2333         mutex_unlock(&sc->mutex);
2334
2335         return ret;
2336 }
2337
2338 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2339                                  struct ieee80211_vif *vif)
2340 {
2341         struct ath_softc *sc = hw->priv;
2342         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2343
2344         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2345
2346         mutex_lock(&sc->mutex);
2347         del_timer_sync(&sc->offchannel.timer);
2348         ath_scan_complete(sc, true);
2349         mutex_unlock(&sc->mutex);
2350 }
2351
2352 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2353                                    struct ieee80211_vif *vif,
2354                                    struct ieee80211_channel *chan, int duration,
2355                                    enum ieee80211_roc_type type)
2356 {
2357         struct ath_softc *sc = hw->priv;
2358         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2359         int ret = 0;
2360
2361         mutex_lock(&sc->mutex);
2362
2363         if (WARN_ON(sc->offchannel.roc_vif)) {
2364                 ret = -EBUSY;
2365                 goto out;
2366         }
2367
2368         ath9k_ps_wakeup(sc);
2369         sc->offchannel.roc_vif = vif;
2370         sc->offchannel.roc_chan = chan;
2371         sc->offchannel.roc_duration = duration;
2372
2373         ath_dbg(common, CHAN_CTX,
2374                 "RoC request on vif: %pM, type: %d duration: %d\n",
2375                 vif->addr, type, duration);
2376
2377         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2378                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2379                 ath_offchannel_next(sc);
2380         }
2381
2382 out:
2383         mutex_unlock(&sc->mutex);
2384
2385         return ret;
2386 }
2387
2388 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2389 {
2390         struct ath_softc *sc = hw->priv;
2391         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2392
2393         mutex_lock(&sc->mutex);
2394
2395         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2396         del_timer_sync(&sc->offchannel.timer);
2397
2398         if (sc->offchannel.roc_vif) {
2399                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2400                         ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2401         }
2402
2403         mutex_unlock(&sc->mutex);
2404
2405         return 0;
2406 }
2407
2408 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2409                              struct ieee80211_chanctx_conf *conf)
2410 {
2411         struct ath_softc *sc = hw->priv;
2412         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2413         struct ath_chanctx *ctx, **ptr;
2414         int pos;
2415
2416         mutex_lock(&sc->mutex);
2417
2418         ath_for_each_chanctx(sc, ctx) {
2419                 if (ctx->assigned)
2420                         continue;
2421
2422                 ptr = (void *) conf->drv_priv;
2423                 *ptr = ctx;
2424                 ctx->assigned = true;
2425                 pos = ctx - &sc->chanctx[0];
2426                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2427
2428                 ath_dbg(common, CHAN_CTX,
2429                         "Add channel context: %d MHz\n",
2430                         conf->def.chan->center_freq);
2431
2432                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2433
2434                 mutex_unlock(&sc->mutex);
2435                 return 0;
2436         }
2437
2438         mutex_unlock(&sc->mutex);
2439         return -ENOSPC;
2440 }
2441
2442
2443 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2444                                  struct ieee80211_chanctx_conf *conf)
2445 {
2446         struct ath_softc *sc = hw->priv;
2447         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2448         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2449
2450         mutex_lock(&sc->mutex);
2451
2452         ath_dbg(common, CHAN_CTX,
2453                 "Remove channel context: %d MHz\n",
2454                 conf->def.chan->center_freq);
2455
2456         ctx->assigned = false;
2457         ctx->hw_queue_base = 0;
2458         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2459
2460         mutex_unlock(&sc->mutex);
2461 }
2462
2463 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2464                                  struct ieee80211_chanctx_conf *conf,
2465                                  u32 changed)
2466 {
2467         struct ath_softc *sc = hw->priv;
2468         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2469         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2470
2471         mutex_lock(&sc->mutex);
2472         ath_dbg(common, CHAN_CTX,
2473                 "Change channel context: %d MHz\n",
2474                 conf->def.chan->center_freq);
2475         ath_chanctx_set_channel(sc, ctx, &conf->def);
2476         mutex_unlock(&sc->mutex);
2477 }
2478
2479 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2480                                     struct ieee80211_vif *vif,
2481                                     struct ieee80211_chanctx_conf *conf)
2482 {
2483         struct ath_softc *sc = hw->priv;
2484         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2485         struct ath_vif *avp = (void *)vif->drv_priv;
2486         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2487         int i;
2488
2489         ath9k_cancel_pending_offchannel(sc);
2490
2491         mutex_lock(&sc->mutex);
2492
2493         ath_dbg(common, CHAN_CTX,
2494                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2495                 vif->addr, vif->type, vif->p2p,
2496                 conf->def.chan->center_freq);
2497
2498         avp->chanctx = ctx;
2499         ctx->nvifs_assigned++;
2500         list_add_tail(&avp->list, &ctx->vifs);
2501         ath9k_calculate_summary_state(sc, ctx);
2502         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2503                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2504
2505         mutex_unlock(&sc->mutex);
2506
2507         return 0;
2508 }
2509
2510 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2511                                        struct ieee80211_vif *vif,
2512                                        struct ieee80211_chanctx_conf *conf)
2513 {
2514         struct ath_softc *sc = hw->priv;
2515         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2516         struct ath_vif *avp = (void *)vif->drv_priv;
2517         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2518         int ac;
2519
2520         ath9k_cancel_pending_offchannel(sc);
2521
2522         mutex_lock(&sc->mutex);
2523
2524         ath_dbg(common, CHAN_CTX,
2525                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2526                 vif->addr, vif->type, vif->p2p,
2527                 conf->def.chan->center_freq);
2528
2529         avp->chanctx = NULL;
2530         ctx->nvifs_assigned--;
2531         list_del(&avp->list);
2532         ath9k_calculate_summary_state(sc, ctx);
2533         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2534                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2535
2536         mutex_unlock(&sc->mutex);
2537 }
2538
2539 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2540                                  struct ieee80211_vif *vif)
2541 {
2542         struct ath_softc *sc = hw->priv;
2543         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2544         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2545         struct ath_beacon_config *cur_conf;
2546         struct ath_chanctx *go_ctx;
2547         unsigned long timeout;
2548         bool changed = false;
2549         u32 beacon_int;
2550
2551         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2552                 return;
2553
2554         if (!avp->chanctx)
2555                 return;
2556
2557         mutex_lock(&sc->mutex);
2558
2559         spin_lock_bh(&sc->chan_lock);
2560         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2561                 changed = true;
2562         spin_unlock_bh(&sc->chan_lock);
2563
2564         if (!changed)
2565                 goto out;
2566
2567         ath9k_cancel_pending_offchannel(sc);
2568
2569         go_ctx = ath_is_go_chanctx_present(sc);
2570
2571         if (go_ctx) {
2572                 /*
2573                  * Wait till the GO interface gets a chance
2574                  * to send out an NoA.
2575                  */
2576                 spin_lock_bh(&sc->chan_lock);
2577                 sc->sched.mgd_prepare_tx = true;
2578                 cur_conf = &go_ctx->beacon;
2579                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2580                 spin_unlock_bh(&sc->chan_lock);
2581
2582                 timeout = usecs_to_jiffies(beacon_int * 2);
2583                 init_completion(&sc->go_beacon);
2584
2585                 mutex_unlock(&sc->mutex);
2586
2587                 if (wait_for_completion_timeout(&sc->go_beacon,
2588                                                 timeout) == 0) {
2589                         ath_dbg(common, CHAN_CTX,
2590                                 "Failed to send new NoA\n");
2591
2592                         spin_lock_bh(&sc->chan_lock);
2593                         sc->sched.mgd_prepare_tx = false;
2594                         spin_unlock_bh(&sc->chan_lock);
2595                 }
2596
2597                 mutex_lock(&sc->mutex);
2598         }
2599
2600         ath_dbg(common, CHAN_CTX,
2601                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2602                 __func__, vif->addr);
2603
2604         spin_lock_bh(&sc->chan_lock);
2605         sc->next_chan = avp->chanctx;
2606         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2607         spin_unlock_bh(&sc->chan_lock);
2608
2609         ath_chanctx_set_next(sc, true);
2610 out:
2611         mutex_unlock(&sc->mutex);
2612 }
2613
2614 void ath9k_fill_chanctx_ops(void)
2615 {
2616         if (!ath9k_is_chanctx_enabled())
2617                 return;
2618
2619         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2620         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2621         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2622         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2623         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2624         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2625         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2626         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2627         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2628         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2629 }
2630
2631 #endif
2632
2633 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2634                              int *dbm)
2635 {
2636         struct ath_softc *sc = hw->priv;
2637         struct ath_vif *avp = (void *)vif->drv_priv;
2638
2639         mutex_lock(&sc->mutex);
2640         if (avp->chanctx)
2641                 *dbm = avp->chanctx->cur_txpower;
2642         else
2643                 *dbm = sc->cur_chan->cur_txpower;
2644         mutex_unlock(&sc->mutex);
2645
2646         *dbm /= 2;
2647
2648         return 0;
2649 }
2650
2651 struct ieee80211_ops ath9k_ops = {
2652         .tx                 = ath9k_tx,
2653         .start              = ath9k_start,
2654         .stop               = ath9k_stop,
2655         .add_interface      = ath9k_add_interface,
2656         .change_interface   = ath9k_change_interface,
2657         .remove_interface   = ath9k_remove_interface,
2658         .config             = ath9k_config,
2659         .configure_filter   = ath9k_configure_filter,
2660         .sta_state          = ath9k_sta_state,
2661         .sta_notify         = ath9k_sta_notify,
2662         .conf_tx            = ath9k_conf_tx,
2663         .bss_info_changed   = ath9k_bss_info_changed,
2664         .set_key            = ath9k_set_key,
2665         .get_tsf            = ath9k_get_tsf,
2666         .set_tsf            = ath9k_set_tsf,
2667         .reset_tsf          = ath9k_reset_tsf,
2668         .ampdu_action       = ath9k_ampdu_action,
2669         .get_survey         = ath9k_get_survey,
2670         .rfkill_poll        = ath9k_rfkill_poll_state,
2671         .set_coverage_class = ath9k_set_coverage_class,
2672         .flush              = ath9k_flush,
2673         .tx_frames_pending  = ath9k_tx_frames_pending,
2674         .tx_last_beacon     = ath9k_tx_last_beacon,
2675         .release_buffered_frames = ath9k_release_buffered_frames,
2676         .get_stats          = ath9k_get_stats,
2677         .set_antenna        = ath9k_set_antenna,
2678         .get_antenna        = ath9k_get_antenna,
2679
2680 #ifdef CONFIG_ATH9K_WOW
2681         .suspend            = ath9k_suspend,
2682         .resume             = ath9k_resume,
2683         .set_wakeup         = ath9k_set_wakeup,
2684 #endif
2685
2686 #ifdef CONFIG_ATH9K_DEBUGFS
2687         .get_et_sset_count  = ath9k_get_et_sset_count,
2688         .get_et_stats       = ath9k_get_et_stats,
2689         .get_et_strings     = ath9k_get_et_strings,
2690 #endif
2691
2692 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2693         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2694 #endif
2695         .sw_scan_start      = ath9k_sw_scan_start,
2696         .sw_scan_complete   = ath9k_sw_scan_complete,
2697         .get_txpower        = ath9k_get_txpower,
2698 };