drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth) {
  64                 pending = true;
  65                 goto out;
  66         }
  67
  68         if (txq->mac80211_qnum >= 0) {
  69                 struct list_head *list;
  70
  71                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  72                 if (!list_empty(list))
  73                         pending = true;
  74         }
  75 out:
  76         spin_unlock_bh(&txq->axq_lock);
  77         return pending;
  78 }
  79
  80 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath_ps_full_sleep(unsigned long data)
  93 {
  94         struct ath_softc *sc = (struct ath_softc *) data;
  95         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  96         bool reset;
  97
  98         spin_lock(&common->cc_lock);
  99         ath_hw_cycle_counters_update(common);
 100         spin_unlock(&common->cc_lock);
 101
 102         ath9k_hw_setrxabort(sc->sc_ah, 1);
 103         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 104
 105         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 106 }
 107
 108 void ath9k_ps_wakeup(struct ath_softc *sc)
 109 {
 110         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 111         unsigned long flags;
 112         enum ath9k_power_mode power_mode;
 113
 114         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 115         if (++sc->ps_usecount != 1)
 116                 goto unlock;
 117
 118         del_timer_sync(&sc->sleep_timer);
 119         power_mode = sc->sc_ah->power_mode;
 120         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 121
 122         /*
 123          * While the hardware is asleep, the cycle counters contain no
 124          * useful data. Better clear them now so that they don't mess up
 125          * survey data results.
 126          */
 127         if (power_mode != ATH9K_PM_AWAKE) {
 128                 spin_lock(&common->cc_lock);
 129                 ath_hw_cycle_counters_update(common);
 130                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 131                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 132                 spin_unlock(&common->cc_lock);
 133         }
 134
 135  unlock:
 136         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 137 }
 138
 139 void ath9k_ps_restore(struct ath_softc *sc)
 140 {
 141         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 142         enum ath9k_power_mode mode;
 143         unsigned long flags;
 144
 145         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 146         if (--sc->ps_usecount != 0)
 147                 goto unlock;
 148
 149         if (sc->ps_idle) {
 150                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 151                 goto unlock;
 152         }
 153
 154         if (sc->ps_enabled &&
 155                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 156                                      PS_WAIT_FOR_CAB |
 157                                      PS_WAIT_FOR_PSPOLL_DATA |
 158                                      PS_WAIT_FOR_TX_ACK |
 159                                      PS_WAIT_FOR_ANI))) {
 160                 mode = ATH9K_PM_NETWORK_SLEEP;
 161                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 162                         ath9k_btcoex_stop_gen_timer(sc);
 163         } else {
 164                 goto unlock;
 165         }
 166
 167         spin_lock(&common->cc_lock);
 168         ath_hw_cycle_counters_update(common);
 169         spin_unlock(&common->cc_lock);
 170
 171         ath9k_hw_setpower(sc->sc_ah, mode);
 172
 173  unlock:
 174         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 175 }
 176
 177 static void __ath_cancel_work(struct ath_softc *sc)
 178 {
 179         cancel_work_sync(&sc->paprd_work);
 180         cancel_delayed_work_sync(&sc->tx_complete_work);
 181         cancel_delayed_work_sync(&sc->hw_pll_work);
 182
 183 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 184         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 185                 cancel_work_sync(&sc->mci_work);
 186 #endif
 187 }
 188
 189 void ath_cancel_work(struct ath_softc *sc)
 190 {
 191         __ath_cancel_work(sc);
 192         cancel_work_sync(&sc->hw_reset_work);
 193 }
 194
 195 void ath_restart_work(struct ath_softc *sc)
 196 {
 197         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 198
 199         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 200                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 201                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 202
 203         ath_start_ani(sc);
 204 }
 205
 206 static bool ath_prepare_reset(struct ath_softc *sc)
 207 {
 208         struct ath_hw *ah = sc->sc_ah;
 209         bool ret = true;
 210
 211         ieee80211_stop_queues(sc->hw);
 212         ath_stop_ani(sc);
 213         ath9k_hw_disable_interrupts(ah);
 214
 215         if (!ath_drain_all_txq(sc))
 216                 ret = false;
 217
 218         if (!ath_stoprecv(sc))
 219                 ret = false;
 220
 221         return ret;
 222 }
 223
 224 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 225 {
 226         struct ath_hw *ah = sc->sc_ah;
 227         struct ath_common *common = ath9k_hw_common(ah);
 228         unsigned long flags;
 229
 230         ath9k_calculate_summary_state(sc, sc->cur_chan);
 231         ath_startrecv(sc);
 232         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 233                                sc->cur_chan->txpower, &sc->curtxpow);
 234         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 235
 236         if (!sc->cur_chan->offchannel && start) {
 237                 /* restore per chanctx TSF timer */
 238                 if (sc->cur_chan->tsf_val) {
 239                         u32 offset;
 240
 241                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 242                                                          NULL);
 243                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 244                 }
 245
 246
 247                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 248                         goto work;
 249
 250                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 251                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 252                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 253                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 254                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 255                 } else {
 256                         ath9k_set_beacon(sc);
 257                 }
 258         work:
 259                 ath_restart_work(sc);
 260                 ath_txq_schedule_all(sc);
 261         }
 262
 263         sc->gtt_cnt = 0;
 264
 265         ath9k_hw_set_interrupts(ah);
 266         ath9k_hw_enable_interrupts(ah);
 267         ieee80211_wake_queues(sc->hw);
 268         ath9k_p2p_ps_timer(sc);
 269
 270         return true;
 271 }
 272
 273 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 274 {
 275         struct ath_hw *ah = sc->sc_ah;
 276         struct ath_common *common = ath9k_hw_common(ah);
 277         struct ath9k_hw_cal_data *caldata = NULL;
 278         bool fastcc = true;
 279         int r;
 280
 281         __ath_cancel_work(sc);
 282
 283         tasklet_disable(&sc->intr_tq);
 284         tasklet_disable(&sc->bcon_tasklet);
 285         spin_lock_bh(&sc->sc_pcu_lock);
 286
 287         if (!sc->cur_chan->offchannel) {
 288                 fastcc = false;
 289                 caldata = &sc->cur_chan->caldata;
 290         }
 291
 292         if (!hchan) {
 293                 fastcc = false;
 294                 hchan = ah->curchan;
 295         }
 296
 297         if (!ath_prepare_reset(sc))
 298                 fastcc = false;
 299
 300         if (ath9k_is_chanctx_enabled())
 301                 fastcc = false;
 302
 303         spin_lock_bh(&sc->chan_lock);
 304         sc->cur_chandef = sc->cur_chan->chandef;
 305         spin_unlock_bh(&sc->chan_lock);
 306
 307         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 308                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 309
 310         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 311         if (r) {
 312                 ath_err(common,
 313                         "Unable to reset channel, reset status %d\n", r);
 314
 315                 ath9k_hw_enable_interrupts(ah);
 316                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 317
 318                 goto out;
 319         }
 320
 321         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 322             sc->cur_chan->offchannel)
 323                 ath9k_mci_set_txpower(sc, true, false);
 324
 325         if (!ath_complete_reset(sc, true))
 326                 r = -EIO;
 327
 328 out:
 329         spin_unlock_bh(&sc->sc_pcu_lock);
 330         tasklet_enable(&sc->bcon_tasklet);
 331         tasklet_enable(&sc->intr_tq);
 332
 333         return r;
 334 }
 335
 336 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 337                             struct ieee80211_vif *vif)
 338 {
 339         struct ath_node *an;
 340         an = (struct ath_node *)sta->drv_priv;
 341
 342         an->sc = sc;
 343         an->sta = sta;
 344         an->vif = vif;
 345         memset(&an->key_idx, 0, sizeof(an->key_idx));
 346
 347         ath_tx_node_init(sc, an);
 348
 349         ath_dynack_node_init(sc->sc_ah, an);
 350 }
 351
 352 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 353 {
 354         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 355         ath_tx_node_cleanup(sc, an);
 356
 357         ath_dynack_node_deinit(sc->sc_ah, an);
 358 }
 359
 360 void ath9k_tasklet(unsigned long data)
 361 {
 362         struct ath_softc *sc = (struct ath_softc *)data;
 363         struct ath_hw *ah = sc->sc_ah;
 364         struct ath_common *common = ath9k_hw_common(ah);
 365         enum ath_reset_type type;
 366         unsigned long flags;
 367         u32 status = sc->intrstatus;
 368         u32 rxmask;
 369
 370         ath9k_ps_wakeup(sc);
 371         spin_lock(&sc->sc_pcu_lock);
 372
 373         if (status & ATH9K_INT_FATAL) {
 374                 type = RESET_TYPE_FATAL_INT;
 375                 ath9k_queue_reset(sc, type);
 376
 377                 /*
 378                  * Increment the ref. counter here so that
 379                  * interrupts are enabled in the reset routine.
 380                  */
 381                 atomic_inc(&ah->intr_ref_cnt);
 382                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 383                 goto out;
 384         }
 385
 386         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 387             (status & ATH9K_INT_BB_WATCHDOG)) {
 388                 spin_lock(&common->cc_lock);
 389                 ath_hw_cycle_counters_update(common);
 390                 ar9003_hw_bb_watchdog_dbg_info(ah);
 391                 spin_unlock(&common->cc_lock);
 392
 393                 if (ar9003_hw_bb_watchdog_check(ah)) {
 394                         type = RESET_TYPE_BB_WATCHDOG;
 395                         ath9k_queue_reset(sc, type);
 396
 397                         /*
 398                          * Increment the ref. counter here so that
 399                          * interrupts are enabled in the reset routine.
 400                          */
 401                         atomic_inc(&ah->intr_ref_cnt);
 402                         ath_dbg(common, RESET,
 403                                 "BB_WATCHDOG: Skipping interrupts\n");
 404                         goto out;
 405                 }
 406         }
 407
 408         if (status & ATH9K_INT_GTT) {
 409                 sc->gtt_cnt++;
 410
 411                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 412                         type = RESET_TYPE_TX_GTT;
 413                         ath9k_queue_reset(sc, type);
 414                         atomic_inc(&ah->intr_ref_cnt);
 415                         ath_dbg(common, RESET,
 416                                 "GTT: Skipping interrupts\n");
 417                         goto out;
 418                 }
 419         }
 420
 421         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 422         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 423                 /*
 424                  * TSF sync does not look correct; remain awake to sync with
 425                  * the next Beacon.
 426                  */
 427                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 428                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 429         }
 430         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 431
 432         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 433                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 434                           ATH9K_INT_RXORN);
 435         else
 436                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 437
 438         if (status & rxmask) {
 439                 /* Check for high priority Rx first */
 440                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 441                     (status & ATH9K_INT_RXHP))
 442                         ath_rx_tasklet(sc, 0, true);
 443
 444                 ath_rx_tasklet(sc, 0, false);
 445         }
 446
 447         if (status & ATH9K_INT_TX) {
 448                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 449                         /*
 450                          * For EDMA chips, TX completion is enabled for the
 451                          * beacon queue, so if a beacon has been transmitted
 452                          * successfully after a GTT interrupt, the GTT counter
 453                          * gets reset to zero here.
 454                          */
 455                         sc->gtt_cnt = 0;
 456
 457                         ath_tx_edma_tasklet(sc);
 458                 } else {
 459                         ath_tx_tasklet(sc);
 460                 }
 461
 462                 wake_up(&sc->tx_wait);
 463         }
 464
 465         if (status & ATH9K_INT_GENTIMER)
 466                 ath_gen_timer_isr(sc->sc_ah);
 467
 468         ath9k_btcoex_handle_interrupt(sc, status);
 469
 470         /* re-enable hardware interrupt */
 471         ath9k_hw_enable_interrupts(ah);
 472 out:
 473         spin_unlock(&sc->sc_pcu_lock);
 474         ath9k_ps_restore(sc);
 475 }
 476
 477 irqreturn_t ath_isr(int irq, void *dev)
 478 {
 479 #define SCHED_INTR (                            \
 480                 ATH9K_INT_FATAL |               \
 481                 ATH9K_INT_BB_WATCHDOG |         \
 482                 ATH9K_INT_RXORN |               \
 483                 ATH9K_INT_RXEOL |               \
 484                 ATH9K_INT_RX |                  \
 485                 ATH9K_INT_RXLP |                \
 486                 ATH9K_INT_RXHP |                \
 487                 ATH9K_INT_TX |                  \
 488                 ATH9K_INT_BMISS |               \
 489                 ATH9K_INT_CST |                 \
 490                 ATH9K_INT_GTT |                 \
 491                 ATH9K_INT_TSFOOR |              \
 492                 ATH9K_INT_GENTIMER |            \
 493                 ATH9K_INT_MCI)
 494
 495         struct ath_softc *sc = dev;
 496         struct ath_hw *ah = sc->sc_ah;
 497         struct ath_common *common = ath9k_hw_common(ah);
 498         enum ath9k_int status;
 499         u32 sync_cause = 0;
 500         bool sched = false;
 501
 502         /*
 503          * The hardware is not ready/present, don't
 504          * touch anything. Note this can happen early
 505          * on if the IRQ is shared.
 506          */
 507         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 508                 return IRQ_NONE;
 509
 510         /* shared irq, not for us */
 511
 512         if (!ath9k_hw_intrpend(ah))
 513                 return IRQ_NONE;
 514
 515         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 516                 ath9k_hw_kill_interrupts(ah);
 517                 return IRQ_HANDLED;
 518         }
 519
 520         /*
 521          * Figure out the reason(s) for the interrupt.  Note
 522          * that the hal returns a pseudo-ISR that may include
 523          * bits we haven't explicitly enabled so we mask the
 524          * value to insure we only process bits we requested.
 525          */
 526         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 527         ath9k_debug_sync_cause(sc, sync_cause);
 528         status &= ah->imask;    /* discard unasked-for bits */
 529
 530         /*
 531          * If there are no status bits set, then this interrupt was not
 532          * for me (should have been caught above).
 533          */
 534         if (!status)
 535                 return IRQ_NONE;
 536
 537         /* Cache the status */
 538         sc->intrstatus = status;
 539
 540         if (status & SCHED_INTR)
 541                 sched = true;
 542
 543         /*
 544          * If a FATAL or RXORN interrupt is received, we have to reset the
 545          * chip immediately.
 546          */
 547         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 548             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 549                 goto chip_reset;
 550
 551         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 552             (status & ATH9K_INT_BB_WATCHDOG))
 553                 goto chip_reset;
 554
 555 #ifdef CONFIG_ATH9K_WOW
 556         if (status & ATH9K_INT_BMISS) {
 557                 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
 558                         atomic_inc(&sc->wow_got_bmiss_intr);
 559                         atomic_dec(&sc->wow_sleep_proc_intr);
 560                 }
 561         }
 562 #endif
 563
 564         if (status & ATH9K_INT_SWBA)
 565                 tasklet_schedule(&sc->bcon_tasklet);
 566
 567         if (status & ATH9K_INT_TXURN)
 568                 ath9k_hw_updatetxtriglevel(ah, true);
 569
 570         if (status & ATH9K_INT_RXEOL) {
 571                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 572                 ath9k_hw_set_interrupts(ah);
 573         }
 574
 575         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 576                 if (status & ATH9K_INT_TIM_TIMER) {
 577                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 578                                 goto chip_reset;
 579                         /* Clear RxAbort bit so that we can
 580                          * receive frames */
 581                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 582                         spin_lock(&sc->sc_pm_lock);
 583                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 584                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 585                         spin_unlock(&sc->sc_pm_lock);
 586                 }
 587
 588 chip_reset:
 589
 590         ath_debug_stat_interrupt(sc, status);
 591
 592         if (sched) {
 593                 /* turn off every interrupt */
 594                 ath9k_hw_disable_interrupts(ah);
 595                 tasklet_schedule(&sc->intr_tq);
 596         }
 597
 598         return IRQ_HANDLED;
 599
 600 #undef SCHED_INTR
 601 }
 602
 603 /*
 604  * This function is called when a HW reset cannot be deferred
 605  * and has to be immediate.
 606  */
 607 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 608 {
 609         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 610         int r;
 611
 612         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 613
 614         ath9k_ps_wakeup(sc);
 615         r = ath_reset_internal(sc, hchan);
 616         ath9k_ps_restore(sc);
 617
 618         return r;
 619 }
 620
 621 /*
 622  * When a HW reset can be deferred, it is added to the
 623  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 624  * queueing.
 625  */
 626 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 627 {
 628         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 629 #ifdef CONFIG_ATH9K_DEBUGFS
 630         RESET_STAT_INC(sc, type);
 631 #endif
 632         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 633         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 634 }
 635
 636 void ath_reset_work(struct work_struct *work)
 637 {
 638         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 639
 640         ath9k_ps_wakeup(sc);
 641         ath_reset_internal(sc, NULL);
 642         ath9k_ps_restore(sc);
 643 }
 644
 645 /**********************/
 646 /* mac80211 callbacks */
 647 /**********************/
 648
 649 static int ath9k_start(struct ieee80211_hw *hw)
 650 {
 651         struct ath_softc *sc = hw->priv;
 652         struct ath_hw *ah = sc->sc_ah;
 653         struct ath_common *common = ath9k_hw_common(ah);
 654         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 655         struct ath_chanctx *ctx = sc->cur_chan;
 656         struct ath9k_channel *init_channel;
 657         int r;
 658
 659         ath_dbg(common, CONFIG,
 660                 "Starting driver with initial channel: %d MHz\n",
 661                 curchan->center_freq);
 662
 663         ath9k_ps_wakeup(sc);
 664         mutex_lock(&sc->mutex);
 665
 666         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 667         sc->cur_chandef = hw->conf.chandef;
 668
 669         /* Reset SERDES registers */
 670         ath9k_hw_configpcipowersave(ah, false);
 671
 672         /*
 673          * The basic interface to setting the hardware in a good
 674          * state is ``reset''.  On return the hardware is known to
 675          * be powered up and with interrupts disabled.  This must
 676          * be followed by initialization of the appropriate bits
 677          * and then setup of the interrupt mask.
 678          */
 679         spin_lock_bh(&sc->sc_pcu_lock);
 680
 681         atomic_set(&ah->intr_ref_cnt, -1);
 682
 683         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 684         if (r) {
 685                 ath_err(common,
 686                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 687                         r, curchan->center_freq);
 688                 ah->reset_power_on = false;
 689         }
 690
 691         /* Setup our intr mask. */
 692         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 693                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 694                     ATH9K_INT_GLOBAL;
 695
 696         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 697                 ah->imask |= ATH9K_INT_RXHP |
 698                              ATH9K_INT_RXLP;
 699         else
 700                 ah->imask |= ATH9K_INT_RX;
 701
 702         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 703                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 704
 705         /*
 706          * Enable GTT interrupts only for AR9003/AR9004 chips
 707          * for now.
 708          */
 709         if (AR_SREV_9300_20_OR_LATER(ah))
 710                 ah->imask |= ATH9K_INT_GTT;
 711
 712         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 713                 ah->imask |= ATH9K_INT_CST;
 714
 715         ath_mci_enable(sc);
 716
 717         clear_bit(ATH_OP_INVALID, &common->op_flags);
 718         sc->sc_ah->is_monitoring = false;
 719
 720         if (!ath_complete_reset(sc, false))
 721                 ah->reset_power_on = false;
 722
 723         if (ah->led_pin >= 0) {
 724                 ath9k_hw_cfg_output(ah, ah->led_pin,
 725                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 726                 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 727         }
 728
 729         /*
 730          * Reset key cache to sane defaults (all entries cleared) instead of
 731          * semi-random values after suspend/resume.
 732          */
 733         ath9k_cmn_init_crypto(sc->sc_ah);
 734
 735         ath9k_hw_reset_tsf(ah);
 736
 737         spin_unlock_bh(&sc->sc_pcu_lock);
 738
 739         mutex_unlock(&sc->mutex);
 740
 741         ath9k_ps_restore(sc);
 742
 743         return 0;
 744 }
 745
 746 static void ath9k_tx(struct ieee80211_hw *hw,
 747                      struct ieee80211_tx_control *control,
 748                      struct sk_buff *skb)
 749 {
 750         struct ath_softc *sc = hw->priv;
 751         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 752         struct ath_tx_control txctl;
 753         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 754         unsigned long flags;
 755
 756         if (sc->ps_enabled) {
 757                 /*
 758                  * mac80211 does not set PM field for normal data frames, so we
 759                  * need to update that based on the current PS mode.
 760                  */
 761                 if (ieee80211_is_data(hdr->frame_control) &&
 762                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 763                     !ieee80211_has_pm(hdr->frame_control)) {
 764                         ath_dbg(common, PS,
 765                                 "Add PM=1 for a TX frame while in PS mode\n");
 766                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 767                 }
 768         }
 769
 770         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 771                 /*
 772                  * We are using PS-Poll and mac80211 can request TX while in
 773                  * power save mode. Need to wake up hardware for the TX to be
 774                  * completed and if needed, also for RX of buffered frames.
 775                  */
 776                 ath9k_ps_wakeup(sc);
 777                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 778                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 779                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 780                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 781                         ath_dbg(common, PS,
 782                                 "Sending PS-Poll to pick a buffered frame\n");
 783                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 784                 } else {
 785                         ath_dbg(common, PS, "Wake up to complete TX\n");
 786                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 787                 }
 788                 /*
 789                  * The actual restore operation will happen only after
 790                  * the ps_flags bit is cleared. We are just dropping
 791                  * the ps_usecount here.
 792                  */
 793                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 794                 ath9k_ps_restore(sc);
 795         }
 796
 797         /*
 798          * Cannot tx while the hardware is in full sleep, it first needs a full
 799          * chip reset to recover from that
 800          */
 801         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 802                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 803                 goto exit;
 804         }
 805
 806         memset(&txctl, 0, sizeof(struct ath_tx_control));
 807         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 808         txctl.sta = control->sta;
 809
 810         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 811
 812         if (ath_tx_start(hw, skb, &txctl) != 0) {
 813                 ath_dbg(common, XMIT, "TX failed\n");
 814                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 815                 goto exit;
 816         }
 817
 818         return;
 819 exit:
 820         ieee80211_free_txskb(hw, skb);
 821 }
 822
 823 static void ath9k_stop(struct ieee80211_hw *hw)
 824 {
 825         struct ath_softc *sc = hw->priv;
 826         struct ath_hw *ah = sc->sc_ah;
 827         struct ath_common *common = ath9k_hw_common(ah);
 828         bool prev_idle;
 829
 830         ath9k_deinit_channel_context(sc);
 831
 832         mutex_lock(&sc->mutex);
 833
 834         ath_cancel_work(sc);
 835
 836         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 837                 ath_dbg(common, ANY, "Device not present\n");
 838                 mutex_unlock(&sc->mutex);
 839                 return;
 840         }
 841
 842         /* Ensure HW is awake when we try to shut it down. */
 843         ath9k_ps_wakeup(sc);
 844
 845         spin_lock_bh(&sc->sc_pcu_lock);
 846
 847         /* prevent tasklets to enable interrupts once we disable them */
 848         ah->imask &= ~ATH9K_INT_GLOBAL;
 849
 850         /* make sure h/w will not generate any interrupt
 851          * before setting the invalid flag. */
 852         ath9k_hw_disable_interrupts(ah);
 853
 854         spin_unlock_bh(&sc->sc_pcu_lock);
 855
 856         /* we can now sync irq and kill any running tasklets, since we already
 857          * disabled interrupts and not holding a spin lock */
 858         synchronize_irq(sc->irq);
 859         tasklet_kill(&sc->intr_tq);
 860         tasklet_kill(&sc->bcon_tasklet);
 861
 862         prev_idle = sc->ps_idle;
 863         sc->ps_idle = true;
 864
 865         spin_lock_bh(&sc->sc_pcu_lock);
 866
 867         if (ah->led_pin >= 0) {
 868                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 869                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 870         }
 871
 872         ath_prepare_reset(sc);
 873
 874         if (sc->rx.frag) {
 875                 dev_kfree_skb_any(sc->rx.frag);
 876                 sc->rx.frag = NULL;
 877         }
 878
 879         if (!ah->curchan)
 880                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 881                                                     &sc->cur_chan->chandef);
 882
 883         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 884         ath9k_hw_phy_disable(ah);
 885
 886         ath9k_hw_configpcipowersave(ah, true);
 887
 888         spin_unlock_bh(&sc->sc_pcu_lock);
 889
 890         ath9k_ps_restore(sc);
 891
 892         set_bit(ATH_OP_INVALID, &common->op_flags);
 893         sc->ps_idle = prev_idle;
 894
 895         mutex_unlock(&sc->mutex);
 896
 897         ath_dbg(common, CONFIG, "Driver halt\n");
 898 }
 899
 900 static bool ath9k_uses_beacons(int type)
 901 {
 902         switch (type) {
 903         case NL80211_IFTYPE_AP:
 904         case NL80211_IFTYPE_ADHOC:
 905         case NL80211_IFTYPE_MESH_POINT:
 906                 return true;
 907         default:
 908                 return false;
 909         }
 910 }
 911
 912 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 913                            u8 *mac, struct ieee80211_vif *vif)
 914 {
 915         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 916         int i;
 917
 918         if (iter_data->has_hw_macaddr) {
 919                 for (i = 0; i < ETH_ALEN; i++)
 920                         iter_data->mask[i] &=
 921                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 922         } else {
 923                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 924                 iter_data->has_hw_macaddr = true;
 925         }
 926
 927         if (!vif->bss_conf.use_short_slot)
 928                 iter_data->slottime = ATH9K_SLOT_TIME_20;
 929
 930         switch (vif->type) {
 931         case NL80211_IFTYPE_AP:
 932                 iter_data->naps++;
 933                 break;
 934         case NL80211_IFTYPE_STATION:
 935                 iter_data->nstations++;
 936                 if (avp->assoc && !iter_data->primary_sta)
 937                         iter_data->primary_sta = vif;
 938                 break;
 939         case NL80211_IFTYPE_ADHOC:
 940                 iter_data->nadhocs++;
 941                 if (vif->bss_conf.enable_beacon)
 942                         iter_data->beacons = true;
 943                 break;
 944         case NL80211_IFTYPE_MESH_POINT:
 945                 iter_data->nmeshes++;
 946                 if (vif->bss_conf.enable_beacon)
 947                         iter_data->beacons = true;
 948                 break;
 949         case NL80211_IFTYPE_WDS:
 950                 iter_data->nwds++;
 951                 break;
 952         default:
 953                 break;
 954         }
 955 }
 956
 957 static void ath9k_update_bssid_mask(struct ath_softc *sc,
 958                                     struct ath_chanctx *ctx,
 959                                     struct ath9k_vif_iter_data *iter_data)
 960 {
 961         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 962         struct ath_vif *avp;
 963         int i;
 964
 965         if (!ath9k_is_chanctx_enabled())
 966                 return;
 967
 968         list_for_each_entry(avp, &ctx->vifs, list) {
 969                 if (ctx->nvifs_assigned != 1)
 970                         continue;
 971
 972                 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
 973                         continue;
 974
 975                 ether_addr_copy(common->curbssid, avp->bssid);
 976
 977                 /* perm_addr will be used as the p2p device address. */
 978                 for (i = 0; i < ETH_ALEN; i++)
 979                         iter_data->mask[i] &=
 980                                 ~(iter_data->hw_macaddr[i] ^
 981                                   sc->hw->wiphy->perm_addr[i]);
 982         }
 983 }
 984
 985 /* Called with sc->mutex held. */
 986 void ath9k_calculate_iter_data(struct ath_softc *sc,
 987                                struct ath_chanctx *ctx,
 988                                struct ath9k_vif_iter_data *iter_data)
 989 {
 990         struct ath_vif *avp;
 991
 992         /*
 993          * Pick the MAC address of the first interface as the new hardware
 994          * MAC address. The hardware will use it together with the BSSID mask
 995          * when matching addresses.
 996          */
 997         memset(iter_data, 0, sizeof(*iter_data));
 998         memset(&iter_data->mask, 0xff, ETH_ALEN);
 999         iter_data->slottime = ATH9K_SLOT_TIME_9;
1000
1001         list_for_each_entry(avp, &ctx->vifs, list)
1002                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1003
1004         ath9k_update_bssid_mask(sc, ctx, iter_data);
1005 }
1006
1007 static void ath9k_set_assoc_state(struct ath_softc *sc,
1008                                   struct ieee80211_vif *vif, bool changed)
1009 {
1010         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1011         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1012         unsigned long flags;
1013
1014         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1015
1016         ether_addr_copy(common->curbssid, avp->bssid);
1017         common->curaid = avp->aid;
1018         ath9k_hw_write_associd(sc->sc_ah);
1019
1020         if (changed) {
1021                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1022                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1023
1024                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1025                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1026                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1027         }
1028
1029         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1030                 ath9k_mci_update_wlan_channels(sc, false);
1031
1032         ath_dbg(common, CONFIG,
1033                 "Primary Station interface: %pM, BSSID: %pM\n",
1034                 vif->addr, common->curbssid);
1035 }
1036
1037 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1038 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1039 {
1040         struct ath_hw *ah = sc->sc_ah;
1041         struct ath_common *common = ath9k_hw_common(ah);
1042         struct ieee80211_vif *vif = NULL;
1043
1044         ath9k_ps_wakeup(sc);
1045
1046         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1047                 vif = sc->offchannel.scan_vif;
1048         else
1049                 vif = sc->offchannel.roc_vif;
1050
1051         if (WARN_ON(!vif))
1052                 goto exit;
1053
1054         eth_zero_addr(common->curbssid);
1055         eth_broadcast_addr(common->bssidmask);
1056         ether_addr_copy(common->macaddr, vif->addr);
1057         common->curaid = 0;
1058         ah->opmode = vif->type;
1059         ah->imask &= ~ATH9K_INT_SWBA;
1060         ah->imask &= ~ATH9K_INT_TSFOOR;
1061         ah->slottime = ATH9K_SLOT_TIME_9;
1062
1063         ath_hw_setbssidmask(common);
1064         ath9k_hw_setopmode(ah);
1065         ath9k_hw_write_associd(sc->sc_ah);
1066         ath9k_hw_set_interrupts(ah);
1067         ath9k_hw_init_global_settings(ah);
1068
1069 exit:
1070         ath9k_ps_restore(sc);
1071 }
1072 #endif
1073
1074 /* Called with sc->mutex held. */
1075 void ath9k_calculate_summary_state(struct ath_softc *sc,
1076                                    struct ath_chanctx *ctx)
1077 {
1078         struct ath_hw *ah = sc->sc_ah;
1079         struct ath_common *common = ath9k_hw_common(ah);
1080         struct ath9k_vif_iter_data iter_data;
1081         struct ath_beacon_config *cur_conf;
1082
1083         ath_chanctx_check_active(sc, ctx);
1084
1085         if (ctx != sc->cur_chan)
1086                 return;
1087
1088 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1089         if (ctx == &sc->offchannel.chan)
1090                 return ath9k_set_offchannel_state(sc);
1091 #endif
1092
1093         ath9k_ps_wakeup(sc);
1094         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1095
1096         if (iter_data.has_hw_macaddr)
1097                 ether_addr_copy(common->macaddr, iter_data.hw_macaddr);
1098
1099         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1100         ath_hw_setbssidmask(common);
1101
1102         if (iter_data.naps > 0) {
1103                 cur_conf = &ctx->beacon;
1104                 ath9k_hw_set_tsfadjust(ah, true);
1105                 ah->opmode = NL80211_IFTYPE_AP;
1106                 if (cur_conf->enable_beacon)
1107                         iter_data.beacons = true;
1108         } else {
1109                 ath9k_hw_set_tsfadjust(ah, false);
1110
1111                 if (iter_data.nmeshes)
1112                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1113                 else if (iter_data.nwds)
1114                         ah->opmode = NL80211_IFTYPE_AP;
1115                 else if (iter_data.nadhocs)
1116                         ah->opmode = NL80211_IFTYPE_ADHOC;
1117                 else
1118                         ah->opmode = NL80211_IFTYPE_STATION;
1119         }
1120
1121         ath9k_hw_setopmode(ah);
1122
1123         ctx->switch_after_beacon = false;
1124         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1125                 ah->imask |= ATH9K_INT_TSFOOR;
1126         else {
1127                 ah->imask &= ~ATH9K_INT_TSFOOR;
1128                 if (iter_data.naps == 1 && iter_data.beacons)
1129                         ctx->switch_after_beacon = true;
1130         }
1131
1132         ah->imask &= ~ATH9K_INT_SWBA;
1133         if (ah->opmode == NL80211_IFTYPE_STATION) {
1134                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1135
1136                 if (iter_data.primary_sta) {
1137                         iter_data.beacons = true;
1138                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1139                                               changed);
1140                         ctx->primary_sta = iter_data.primary_sta;
1141                 } else {
1142                         ctx->primary_sta = NULL;
1143                         memset(common->curbssid, 0, ETH_ALEN);
1144                         common->curaid = 0;
1145                         ath9k_hw_write_associd(sc->sc_ah);
1146                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1147                                 ath9k_mci_update_wlan_channels(sc, true);
1148                 }
1149         } else if (iter_data.beacons) {
1150                 ah->imask |= ATH9K_INT_SWBA;
1151         }
1152         ath9k_hw_set_interrupts(ah);
1153
1154         if (iter_data.beacons)
1155                 set_bit(ATH_OP_BEACONS, &common->op_flags);
1156         else
1157                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1158
1159         if (ah->slottime != iter_data.slottime) {
1160                 ah->slottime = iter_data.slottime;
1161                 ath9k_hw_init_global_settings(ah);
1162         }
1163
1164         if (iter_data.primary_sta)
1165                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1166         else
1167                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1168
1169         ath_dbg(common, CONFIG,
1170                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1171                 common->macaddr, common->curbssid, common->bssidmask);
1172
1173         ath9k_ps_restore(sc);
1174 }
1175
1176 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1177                                    struct ieee80211_vif *vif)
1178 {
1179         int i;
1180
1181         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1182                 vif->hw_queue[i] = i;
1183
1184         if (vif->type == NL80211_IFTYPE_AP)
1185                 vif->cab_queue = hw->queues - 2;
1186         else
1187                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1188 }
1189
1190 static int ath9k_add_interface(struct ieee80211_hw *hw,
1191                                struct ieee80211_vif *vif)
1192 {
1193         struct ath_softc *sc = hw->priv;
1194         struct ath_hw *ah = sc->sc_ah;
1195         struct ath_common *common = ath9k_hw_common(ah);
1196         struct ath_vif *avp = (void *)vif->drv_priv;
1197         struct ath_node *an = &avp->mcast_node;
1198
1199         mutex_lock(&sc->mutex);
1200
1201         if (config_enabled(CONFIG_ATH9K_TX99)) {
1202                 if (sc->cur_chan->nvifs >= 1) {
1203                         mutex_unlock(&sc->mutex);
1204                         return -EOPNOTSUPP;
1205                 }
1206                 sc->tx99_vif = vif;
1207         }
1208
1209         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1210         sc->cur_chan->nvifs++;
1211
1212         if (ath9k_uses_beacons(vif->type))
1213                 ath9k_beacon_assign_slot(sc, vif);
1214
1215         avp->vif = vif;
1216         if (!ath9k_is_chanctx_enabled()) {
1217                 avp->chanctx = sc->cur_chan;
1218                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1219         }
1220
1221         ath9k_assign_hw_queues(hw, vif);
1222
1223         an->sc = sc;
1224         an->sta = NULL;
1225         an->vif = vif;
1226         an->no_ps_filter = true;
1227         ath_tx_node_init(sc, an);
1228
1229         mutex_unlock(&sc->mutex);
1230         return 0;
1231 }
1232
1233 static int ath9k_change_interface(struct ieee80211_hw *hw,
1234                                   struct ieee80211_vif *vif,
1235                                   enum nl80211_iftype new_type,
1236                                   bool p2p)
1237 {
1238         struct ath_softc *sc = hw->priv;
1239         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1240         struct ath_vif *avp = (void *)vif->drv_priv;
1241
1242         mutex_lock(&sc->mutex);
1243
1244         if (config_enabled(CONFIG_ATH9K_TX99)) {
1245                 mutex_unlock(&sc->mutex);
1246                 return -EOPNOTSUPP;
1247         }
1248
1249         ath_dbg(common, CONFIG, "Change Interface\n");
1250
1251         if (ath9k_uses_beacons(vif->type))
1252                 ath9k_beacon_remove_slot(sc, vif);
1253
1254         vif->type = new_type;
1255         vif->p2p = p2p;
1256
1257         if (ath9k_uses_beacons(vif->type))
1258                 ath9k_beacon_assign_slot(sc, vif);
1259
1260         ath9k_assign_hw_queues(hw, vif);
1261         ath9k_calculate_summary_state(sc, avp->chanctx);
1262
1263         mutex_unlock(&sc->mutex);
1264         return 0;
1265 }
1266
1267 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1268                                    struct ieee80211_vif *vif)
1269 {
1270         struct ath_softc *sc = hw->priv;
1271         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1272         struct ath_vif *avp = (void *)vif->drv_priv;
1273
1274         ath_dbg(common, CONFIG, "Detach Interface\n");
1275
1276         mutex_lock(&sc->mutex);
1277
1278         ath9k_p2p_remove_vif(sc, vif);
1279
1280         sc->cur_chan->nvifs--;
1281         sc->tx99_vif = NULL;
1282         if (!ath9k_is_chanctx_enabled())
1283                 list_del(&avp->list);
1284
1285         if (ath9k_uses_beacons(vif->type))
1286                 ath9k_beacon_remove_slot(sc, vif);
1287
1288         ath_tx_node_cleanup(sc, &avp->mcast_node);
1289
1290         mutex_unlock(&sc->mutex);
1291 }
1292
1293 static void ath9k_enable_ps(struct ath_softc *sc)
1294 {
1295         struct ath_hw *ah = sc->sc_ah;
1296         struct ath_common *common = ath9k_hw_common(ah);
1297
1298         if (config_enabled(CONFIG_ATH9K_TX99))
1299                 return;
1300
1301         sc->ps_enabled = true;
1302         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1303                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1304                         ah->imask |= ATH9K_INT_TIM_TIMER;
1305                         ath9k_hw_set_interrupts(ah);
1306                 }
1307                 ath9k_hw_setrxabort(ah, 1);
1308         }
1309         ath_dbg(common, PS, "PowerSave enabled\n");
1310 }
1311
1312 static void ath9k_disable_ps(struct ath_softc *sc)
1313 {
1314         struct ath_hw *ah = sc->sc_ah;
1315         struct ath_common *common = ath9k_hw_common(ah);
1316
1317         if (config_enabled(CONFIG_ATH9K_TX99))
1318                 return;
1319
1320         sc->ps_enabled = false;
1321         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1322         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1323                 ath9k_hw_setrxabort(ah, 0);
1324                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1325                                   PS_WAIT_FOR_CAB |
1326                                   PS_WAIT_FOR_PSPOLL_DATA |
1327                                   PS_WAIT_FOR_TX_ACK);
1328                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1329                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1330                         ath9k_hw_set_interrupts(ah);
1331                 }
1332         }
1333         ath_dbg(common, PS, "PowerSave disabled\n");
1334 }
1335
1336 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1337 {
1338         struct ath_softc *sc = hw->priv;
1339         struct ath_hw *ah = sc->sc_ah;
1340         struct ath_common *common = ath9k_hw_common(ah);
1341         u32 rxfilter;
1342
1343         if (config_enabled(CONFIG_ATH9K_TX99))
1344                 return;
1345
1346         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1347                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1348                 return;
1349         }
1350
1351         ath9k_ps_wakeup(sc);
1352         rxfilter = ath9k_hw_getrxfilter(ah);
1353         ath9k_hw_setrxfilter(ah, rxfilter |
1354                                  ATH9K_RX_FILTER_PHYRADAR |
1355                                  ATH9K_RX_FILTER_PHYERR);
1356
1357         /* TODO: usually this should not be neccesary, but for some reason
1358          * (or in some mode?) the trigger must be called after the
1359          * configuration, otherwise the register will have its values reset
1360          * (on my ar9220 to value 0x01002310)
1361          */
1362         ath9k_spectral_scan_config(hw, sc->spectral_mode);
1363         ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1364         ath9k_ps_restore(sc);
1365 }
1366
1367 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1368                                enum spectral_mode spectral_mode)
1369 {
1370         struct ath_softc *sc = hw->priv;
1371         struct ath_hw *ah = sc->sc_ah;
1372         struct ath_common *common = ath9k_hw_common(ah);
1373
1374         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1375                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1376                 return -1;
1377         }
1378
1379         switch (spectral_mode) {
1380         case SPECTRAL_DISABLED:
1381                 sc->spec_config.enabled = 0;
1382                 break;
1383         case SPECTRAL_BACKGROUND:
1384                 /* send endless samples.
1385                  * TODO: is this really useful for "background"?
1386                  */
1387                 sc->spec_config.endless = 1;
1388                 sc->spec_config.enabled = 1;
1389                 break;
1390         case SPECTRAL_CHANSCAN:
1391         case SPECTRAL_MANUAL:
1392                 sc->spec_config.endless = 0;
1393                 sc->spec_config.enabled = 1;
1394                 break;
1395         default:
1396                 return -1;
1397         }
1398
1399         ath9k_ps_wakeup(sc);
1400         ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1401         ath9k_ps_restore(sc);
1402
1403         sc->spectral_mode = spectral_mode;
1404
1405         return 0;
1406 }
1407
1408 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1409 {
1410         struct ath_softc *sc = hw->priv;
1411         struct ath_hw *ah = sc->sc_ah;
1412         struct ath_common *common = ath9k_hw_common(ah);
1413         struct ieee80211_conf *conf = &hw->conf;
1414         struct ath_chanctx *ctx = sc->cur_chan;
1415
1416         ath9k_ps_wakeup(sc);
1417         mutex_lock(&sc->mutex);
1418
1419         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1420                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1421                 if (sc->ps_idle) {
1422                         ath_cancel_work(sc);
1423                         ath9k_stop_btcoex(sc);
1424                 } else {
1425                         ath9k_start_btcoex(sc);
1426                         /*
1427                          * The chip needs a reset to properly wake up from
1428                          * full sleep
1429                          */
1430                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1431                 }
1432         }
1433
1434         /*
1435          * We just prepare to enable PS. We have to wait until our AP has
1436          * ACK'd our null data frame to disable RX otherwise we'll ignore
1437          * those ACKs and end up retransmitting the same null data frames.
1438          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1439          */
1440         if (changed & IEEE80211_CONF_CHANGE_PS) {
1441                 unsigned long flags;
1442                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1443                 if (conf->flags & IEEE80211_CONF_PS)
1444                         ath9k_enable_ps(sc);
1445                 else
1446                         ath9k_disable_ps(sc);
1447                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1448         }
1449
1450         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1451                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1452                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1453                         sc->sc_ah->is_monitoring = true;
1454                 } else {
1455                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1456                         sc->sc_ah->is_monitoring = false;
1457                 }
1458         }
1459
1460         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1461                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1462                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1463         }
1464
1465         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1466                 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1467                 sc->cur_chan->txpower = 2 * conf->power_level;
1468                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1469                                        sc->cur_chan->txpower, &sc->curtxpow);
1470         }
1471
1472         mutex_unlock(&sc->mutex);
1473         ath9k_ps_restore(sc);
1474
1475         return 0;
1476 }
1477
1478 #define SUPPORTED_FILTERS                       \
1479         (FIF_PROMISC_IN_BSS |                   \
1480         FIF_ALLMULTI |                          \
1481         FIF_CONTROL |                           \
1482         FIF_PSPOLL |                            \
1483         FIF_OTHER_BSS |                         \
1484         FIF_BCN_PRBRESP_PROMISC |               \
1485         FIF_PROBE_REQ |                         \
1486         FIF_FCSFAIL)
1487
1488 /* FIXME: sc->sc_full_reset ? */
1489 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1490                                    unsigned int changed_flags,
1491                                    unsigned int *total_flags,
1492                                    u64 multicast)
1493 {
1494         struct ath_softc *sc = hw->priv;
1495         u32 rfilt;
1496
1497         changed_flags &= SUPPORTED_FILTERS;
1498         *total_flags &= SUPPORTED_FILTERS;
1499
1500         spin_lock_bh(&sc->chan_lock);
1501         sc->cur_chan->rxfilter = *total_flags;
1502         spin_unlock_bh(&sc->chan_lock);
1503
1504         ath9k_ps_wakeup(sc);
1505         rfilt = ath_calcrxfilter(sc);
1506         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1507         ath9k_ps_restore(sc);
1508
1509         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1510                 rfilt);
1511 }
1512
1513 static int ath9k_sta_add(struct ieee80211_hw *hw,
1514                          struct ieee80211_vif *vif,
1515                          struct ieee80211_sta *sta)
1516 {
1517         struct ath_softc *sc = hw->priv;
1518         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1519         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1520         struct ieee80211_key_conf ps_key = { };
1521         int key;
1522
1523         ath_node_attach(sc, sta, vif);
1524
1525         if (vif->type != NL80211_IFTYPE_AP &&
1526             vif->type != NL80211_IFTYPE_AP_VLAN)
1527                 return 0;
1528
1529         key = ath_key_config(common, vif, sta, &ps_key);
1530         if (key > 0) {
1531                 an->ps_key = key;
1532                 an->key_idx[0] = key;
1533         }
1534
1535         return 0;
1536 }
1537
1538 static void ath9k_del_ps_key(struct ath_softc *sc,
1539                              struct ieee80211_vif *vif,
1540                              struct ieee80211_sta *sta)
1541 {
1542         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1543         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1544         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1545
1546         if (!an->ps_key)
1547             return;
1548
1549         ath_key_delete(common, &ps_key);
1550         an->ps_key = 0;
1551         an->key_idx[0] = 0;
1552 }
1553
1554 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1555                             struct ieee80211_vif *vif,
1556                             struct ieee80211_sta *sta)
1557 {
1558         struct ath_softc *sc = hw->priv;
1559
1560         ath9k_del_ps_key(sc, vif, sta);
1561         ath_node_detach(sc, sta);
1562
1563         return 0;
1564 }
1565
1566 static int ath9k_sta_state(struct ieee80211_hw *hw,
1567                            struct ieee80211_vif *vif,
1568                            struct ieee80211_sta *sta,
1569                            enum ieee80211_sta_state old_state,
1570                            enum ieee80211_sta_state new_state)
1571 {
1572         struct ath_softc *sc = hw->priv;
1573         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1574         int ret = 0;
1575
1576         if (old_state == IEEE80211_STA_AUTH &&
1577             new_state == IEEE80211_STA_ASSOC) {
1578                 ret = ath9k_sta_add(hw, vif, sta);
1579                 ath_dbg(common, CONFIG,
1580                         "Add station: %pM\n", sta->addr);
1581         } else if (old_state == IEEE80211_STA_ASSOC &&
1582                    new_state == IEEE80211_STA_AUTH) {
1583                 ret = ath9k_sta_remove(hw, vif, sta);
1584                 ath_dbg(common, CONFIG,
1585                         "Remove station: %pM\n", sta->addr);
1586         }
1587
1588         if (ath9k_is_chanctx_enabled()) {
1589                 if (old_state == IEEE80211_STA_ASSOC &&
1590                     new_state == IEEE80211_STA_AUTHORIZED)
1591                         ath_chanctx_event(sc, vif,
1592                                           ATH_CHANCTX_EVENT_AUTHORIZED);
1593         }
1594
1595         return ret;
1596 }
1597
1598 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1599                                     struct ath_node *an,
1600                                     bool set)
1601 {
1602         int i;
1603
1604         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1605                 if (!an->key_idx[i])
1606                         continue;
1607                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1608         }
1609 }
1610
1611 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1612                          struct ieee80211_vif *vif,
1613                          enum sta_notify_cmd cmd,
1614                          struct ieee80211_sta *sta)
1615 {
1616         struct ath_softc *sc = hw->priv;
1617         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1618
1619         switch (cmd) {
1620         case STA_NOTIFY_SLEEP:
1621                 an->sleeping = true;
1622                 ath_tx_aggr_sleep(sta, sc, an);
1623                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1624                 break;
1625         case STA_NOTIFY_AWAKE:
1626                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1627                 an->sleeping = false;
1628                 ath_tx_aggr_wakeup(sc, an);
1629                 break;
1630         }
1631 }
1632
1633 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1634                          struct ieee80211_vif *vif, u16 queue,
1635                          const struct ieee80211_tx_queue_params *params)
1636 {
1637         struct ath_softc *sc = hw->priv;
1638         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1639         struct ath_txq *txq;
1640         struct ath9k_tx_queue_info qi;
1641         int ret = 0;
1642
1643         if (queue >= IEEE80211_NUM_ACS)
1644                 return 0;
1645
1646         txq = sc->tx.txq_map[queue];
1647
1648         ath9k_ps_wakeup(sc);
1649         mutex_lock(&sc->mutex);
1650
1651         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1652
1653         qi.tqi_aifs = params->aifs;
1654         qi.tqi_cwmin = params->cw_min;
1655         qi.tqi_cwmax = params->cw_max;
1656         qi.tqi_burstTime = params->txop * 32;
1657
1658         ath_dbg(common, CONFIG,
1659                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1660                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1661                 params->cw_max, params->txop);
1662
1663         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1664         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1665         if (ret)
1666                 ath_err(common, "TXQ Update failed\n");
1667
1668         mutex_unlock(&sc->mutex);
1669         ath9k_ps_restore(sc);
1670
1671         return ret;
1672 }
1673
1674 static int ath9k_set_key(struct ieee80211_hw *hw,
1675                          enum set_key_cmd cmd,
1676                          struct ieee80211_vif *vif,
1677                          struct ieee80211_sta *sta,
1678                          struct ieee80211_key_conf *key)
1679 {
1680         struct ath_softc *sc = hw->priv;
1681         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1682         struct ath_node *an = NULL;
1683         int ret = 0, i;
1684
1685         if (ath9k_modparam_nohwcrypt)
1686                 return -ENOSPC;
1687
1688         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1689              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1690             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1691              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1692             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1693                 /*
1694                  * For now, disable hw crypto for the RSN IBSS group keys. This
1695                  * could be optimized in the future to use a modified key cache
1696                  * design to support per-STA RX GTK, but until that gets
1697                  * implemented, use of software crypto for group addressed
1698                  * frames is a acceptable to allow RSN IBSS to be used.
1699                  */
1700                 return -EOPNOTSUPP;
1701         }
1702
1703         mutex_lock(&sc->mutex);
1704         ath9k_ps_wakeup(sc);
1705         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1706         if (sta)
1707                 an = (struct ath_node *)sta->drv_priv;
1708
1709         switch (cmd) {
1710         case SET_KEY:
1711                 if (sta)
1712                         ath9k_del_ps_key(sc, vif, sta);
1713
1714                 key->hw_key_idx = 0;
1715                 ret = ath_key_config(common, vif, sta, key);
1716                 if (ret >= 0) {
1717                         key->hw_key_idx = ret;
1718                         /* push IV and Michael MIC generation to stack */
1719                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1720                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1721                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1722                         if (sc->sc_ah->sw_mgmt_crypto &&
1723                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1724                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1725                         ret = 0;
1726                 }
1727                 if (an && key->hw_key_idx) {
1728                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1729                                 if (an->key_idx[i])
1730                                         continue;
1731                                 an->key_idx[i] = key->hw_key_idx;
1732                                 break;
1733                         }
1734                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1735                 }
1736                 break;
1737         case DISABLE_KEY:
1738                 ath_key_delete(common, key);
1739                 if (an) {
1740                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1741                                 if (an->key_idx[i] != key->hw_key_idx)
1742                                         continue;
1743                                 an->key_idx[i] = 0;
1744                                 break;
1745                         }
1746                 }
1747                 key->hw_key_idx = 0;
1748                 break;
1749         default:
1750                 ret = -EINVAL;
1751         }
1752
1753         ath9k_ps_restore(sc);
1754         mutex_unlock(&sc->mutex);
1755
1756         return ret;
1757 }
1758
1759 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1760                                    struct ieee80211_vif *vif,
1761                                    struct ieee80211_bss_conf *bss_conf,
1762                                    u32 changed)
1763 {
1764 #define CHECK_ANI                               \
1765         (BSS_CHANGED_ASSOC |                    \
1766          BSS_CHANGED_IBSS |                     \
1767          BSS_CHANGED_BEACON_ENABLED)
1768
1769         struct ath_softc *sc = hw->priv;
1770         struct ath_hw *ah = sc->sc_ah;
1771         struct ath_common *common = ath9k_hw_common(ah);
1772         struct ath_vif *avp = (void *)vif->drv_priv;
1773         int slottime;
1774
1775         ath9k_ps_wakeup(sc);
1776         mutex_lock(&sc->mutex);
1777
1778         if (changed & BSS_CHANGED_ASSOC) {
1779                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1780                         bss_conf->bssid, bss_conf->assoc);
1781
1782                 ether_addr_copy(avp->bssid, bss_conf->bssid);
1783                 avp->aid = bss_conf->aid;
1784                 avp->assoc = bss_conf->assoc;
1785
1786                 ath9k_calculate_summary_state(sc, avp->chanctx);
1787         }
1788
1789         if (changed & BSS_CHANGED_IBSS) {
1790                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1791                 common->curaid = bss_conf->aid;
1792                 ath9k_hw_write_associd(sc->sc_ah);
1793         }
1794
1795         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1796             (changed & BSS_CHANGED_BEACON_INT) ||
1797             (changed & BSS_CHANGED_BEACON_INFO)) {
1798                 ath9k_beacon_config(sc, vif, changed);
1799                 if (changed & BSS_CHANGED_BEACON_ENABLED)
1800                         ath9k_calculate_summary_state(sc, avp->chanctx);
1801         }
1802
1803         if ((avp->chanctx == sc->cur_chan) &&
1804             (changed & BSS_CHANGED_ERP_SLOT)) {
1805                 if (bss_conf->use_short_slot)
1806                         slottime = 9;
1807                 else
1808                         slottime = 20;
1809                 if (vif->type == NL80211_IFTYPE_AP) {
1810                         /*
1811                          * Defer update, so that connected stations can adjust
1812                          * their settings at the same time.
1813                          * See beacon.c for more details
1814                          */
1815                         sc->beacon.slottime = slottime;
1816                         sc->beacon.updateslot = UPDATE;
1817                 } else {
1818                         ah->slottime = slottime;
1819                         ath9k_hw_init_global_settings(ah);
1820                 }
1821         }
1822
1823         if (changed & BSS_CHANGED_P2P_PS)
1824                 ath9k_p2p_bss_info_changed(sc, vif);
1825
1826         if (changed & CHECK_ANI)
1827                 ath_check_ani(sc);
1828
1829         mutex_unlock(&sc->mutex);
1830         ath9k_ps_restore(sc);
1831
1832 #undef CHECK_ANI
1833 }
1834
1835 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1836 {
1837         struct ath_softc *sc = hw->priv;
1838         u64 tsf;
1839
1840         mutex_lock(&sc->mutex);
1841         ath9k_ps_wakeup(sc);
1842         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1843         ath9k_ps_restore(sc);
1844         mutex_unlock(&sc->mutex);
1845
1846         return tsf;
1847 }
1848
1849 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1850                           struct ieee80211_vif *vif,
1851                           u64 tsf)
1852 {
1853         struct ath_softc *sc = hw->priv;
1854
1855         mutex_lock(&sc->mutex);
1856         ath9k_ps_wakeup(sc);
1857         ath9k_hw_settsf64(sc->sc_ah, tsf);
1858         ath9k_ps_restore(sc);
1859         mutex_unlock(&sc->mutex);
1860 }
1861
1862 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1863 {
1864         struct ath_softc *sc = hw->priv;
1865
1866         mutex_lock(&sc->mutex);
1867
1868         ath9k_ps_wakeup(sc);
1869         ath9k_hw_reset_tsf(sc->sc_ah);
1870         ath9k_ps_restore(sc);
1871
1872         mutex_unlock(&sc->mutex);
1873 }
1874
1875 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1876                               struct ieee80211_vif *vif,
1877                               enum ieee80211_ampdu_mlme_action action,
1878                               struct ieee80211_sta *sta,
1879                               u16 tid, u16 *ssn, u8 buf_size)
1880 {
1881         struct ath_softc *sc = hw->priv;
1882         bool flush = false;
1883         int ret = 0;
1884
1885         mutex_lock(&sc->mutex);
1886
1887         switch (action) {
1888         case IEEE80211_AMPDU_RX_START:
1889                 break;
1890         case IEEE80211_AMPDU_RX_STOP:
1891                 break;
1892         case IEEE80211_AMPDU_TX_START:
1893                 ath9k_ps_wakeup(sc);
1894                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1895                 if (!ret)
1896                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1897                 ath9k_ps_restore(sc);
1898                 break;
1899         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1900         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1901                 flush = true;
1902         case IEEE80211_AMPDU_TX_STOP_CONT:
1903                 ath9k_ps_wakeup(sc);
1904                 ath_tx_aggr_stop(sc, sta, tid);
1905                 if (!flush)
1906                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1907                 ath9k_ps_restore(sc);
1908                 break;
1909         case IEEE80211_AMPDU_TX_OPERATIONAL:
1910                 ath9k_ps_wakeup(sc);
1911                 ath_tx_aggr_resume(sc, sta, tid);
1912                 ath9k_ps_restore(sc);
1913                 break;
1914         default:
1915                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1916         }
1917
1918         mutex_unlock(&sc->mutex);
1919
1920         return ret;
1921 }
1922
1923 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1924                              struct survey_info *survey)
1925 {
1926         struct ath_softc *sc = hw->priv;
1927         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1928         struct ieee80211_supported_band *sband;
1929         struct ieee80211_channel *chan;
1930         int pos;
1931
1932         if (config_enabled(CONFIG_ATH9K_TX99))
1933                 return -EOPNOTSUPP;
1934
1935         spin_lock_bh(&common->cc_lock);
1936         if (idx == 0)
1937                 ath_update_survey_stats(sc);
1938
1939         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1940         if (sband && idx >= sband->n_channels) {
1941                 idx -= sband->n_channels;
1942                 sband = NULL;
1943         }
1944
1945         if (!sband)
1946                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1947
1948         if (!sband || idx >= sband->n_channels) {
1949                 spin_unlock_bh(&common->cc_lock);
1950                 return -ENOENT;
1951         }
1952
1953         chan = &sband->channels[idx];
1954         pos = chan->hw_value;
1955         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1956         survey->channel = chan;
1957         spin_unlock_bh(&common->cc_lock);
1958
1959         return 0;
1960 }
1961
1962 static void ath9k_enable_dynack(struct ath_softc *sc)
1963 {
1964 #ifdef CONFIG_ATH9K_DYNACK
1965         u32 rfilt;
1966         struct ath_hw *ah = sc->sc_ah;
1967
1968         ath_dynack_reset(ah);
1969
1970         ah->dynack.enabled = true;
1971         rfilt = ath_calcrxfilter(sc);
1972         ath9k_hw_setrxfilter(ah, rfilt);
1973 #endif
1974 }
1975
1976 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1977                                      s16 coverage_class)
1978 {
1979         struct ath_softc *sc = hw->priv;
1980         struct ath_hw *ah = sc->sc_ah;
1981
1982         if (config_enabled(CONFIG_ATH9K_TX99))
1983                 return;
1984
1985         mutex_lock(&sc->mutex);
1986
1987         if (coverage_class >= 0) {
1988                 ah->coverage_class = coverage_class;
1989                 if (ah->dynack.enabled) {
1990                         u32 rfilt;
1991
1992                         ah->dynack.enabled = false;
1993                         rfilt = ath_calcrxfilter(sc);
1994                         ath9k_hw_setrxfilter(ah, rfilt);
1995                 }
1996                 ath9k_ps_wakeup(sc);
1997                 ath9k_hw_init_global_settings(ah);
1998                 ath9k_ps_restore(sc);
1999         } else if (!ah->dynack.enabled) {
2000                 ath9k_enable_dynack(sc);
2001         }
2002
2003         mutex_unlock(&sc->mutex);
2004 }
2005
2006 static bool ath9k_has_tx_pending(struct ath_softc *sc)
2007 {
2008         int i, npend = 0;
2009
2010         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2011                 if (!ATH_TXQ_SETUP(sc, i))
2012                         continue;
2013
2014                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2015                 if (npend)
2016                         break;
2017         }
2018
2019         return !!npend;
2020 }
2021
2022 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2023                         u32 queues, bool drop)
2024 {
2025         struct ath_softc *sc = hw->priv;
2026
2027         mutex_lock(&sc->mutex);
2028         __ath9k_flush(hw, queues, drop);
2029         mutex_unlock(&sc->mutex);
2030 }
2031
2032 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
2033 {
2034         struct ath_softc *sc = hw->priv;
2035         struct ath_hw *ah = sc->sc_ah;
2036         struct ath_common *common = ath9k_hw_common(ah);
2037         int timeout;
2038         bool drain_txq;
2039
2040         cancel_delayed_work_sync(&sc->tx_complete_work);
2041
2042         if (ah->ah_flags & AH_UNPLUGGED) {
2043                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2044                 return;
2045         }
2046
2047         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2048                 ath_dbg(common, ANY, "Device not present\n");
2049                 return;
2050         }
2051
2052         spin_lock_bh(&sc->chan_lock);
2053         timeout = sc->cur_chan->flush_timeout;
2054         spin_unlock_bh(&sc->chan_lock);
2055
2056         ath_dbg(common, CHAN_CTX,
2057                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2058
2059         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
2060                                timeout) > 0)
2061                 drop = false;
2062
2063         if (drop) {
2064                 ath9k_ps_wakeup(sc);
2065                 spin_lock_bh(&sc->sc_pcu_lock);
2066                 drain_txq = ath_drain_all_txq(sc);
2067                 spin_unlock_bh(&sc->sc_pcu_lock);
2068
2069                 if (!drain_txq)
2070                         ath_reset(sc, NULL);
2071
2072                 ath9k_ps_restore(sc);
2073         }
2074
2075         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2076 }
2077
2078 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2079 {
2080         struct ath_softc *sc = hw->priv;
2081
2082         return ath9k_has_tx_pending(sc);
2083 }
2084
2085 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2086 {
2087         struct ath_softc *sc = hw->priv;
2088         struct ath_hw *ah = sc->sc_ah;
2089         struct ieee80211_vif *vif;
2090         struct ath_vif *avp;
2091         struct ath_buf *bf;
2092         struct ath_tx_status ts;
2093         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2094         int status;
2095
2096         vif = sc->beacon.bslot[0];
2097         if (!vif)
2098                 return 0;
2099
2100         if (!vif->bss_conf.enable_beacon)
2101                 return 0;
2102
2103         avp = (void *)vif->drv_priv;
2104
2105         if (!sc->beacon.tx_processed && !edma) {
2106                 tasklet_disable(&sc->bcon_tasklet);
2107
2108                 bf = avp->av_bcbuf;
2109                 if (!bf || !bf->bf_mpdu)
2110                         goto skip;
2111
2112                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2113                 if (status == -EINPROGRESS)
2114                         goto skip;
2115
2116                 sc->beacon.tx_processed = true;
2117                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2118
2119 skip:
2120                 tasklet_enable(&sc->bcon_tasklet);
2121         }
2122
2123         return sc->beacon.tx_last;
2124 }
2125
2126 static int ath9k_get_stats(struct ieee80211_hw *hw,
2127                            struct ieee80211_low_level_stats *stats)
2128 {
2129         struct ath_softc *sc = hw->priv;
2130         struct ath_hw *ah = sc->sc_ah;
2131         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2132
2133         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2134         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2135         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2136         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2137         return 0;
2138 }
2139
2140 static u32 fill_chainmask(u32 cap, u32 new)
2141 {
2142         u32 filled = 0;
2143         int i;
2144
2145         for (i = 0; cap && new; i++, cap >>= 1) {
2146                 if (!(cap & BIT(0)))
2147                         continue;
2148
2149                 if (new & BIT(0))
2150                         filled |= BIT(i);
2151
2152                 new >>= 1;
2153         }
2154
2155         return filled;
2156 }
2157
2158 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2159 {
2160         if (AR_SREV_9300_20_OR_LATER(ah))
2161                 return true;
2162
2163         switch (val & 0x7) {
2164         case 0x1:
2165         case 0x3:
2166         case 0x7:
2167                 return true;
2168         case 0x2:
2169                 return (ah->caps.rx_chainmask == 1);
2170         default:
2171                 return false;
2172         }
2173 }
2174
2175 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2176 {
2177         struct ath_softc *sc = hw->priv;
2178         struct ath_hw *ah = sc->sc_ah;
2179
2180         if (ah->caps.rx_chainmask != 1)
2181                 rx_ant |= tx_ant;
2182
2183         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2184                 return -EINVAL;
2185
2186         sc->ant_rx = rx_ant;
2187         sc->ant_tx = tx_ant;
2188
2189         if (ah->caps.rx_chainmask == 1)
2190                 return 0;
2191
2192         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2193         if (AR_SREV_9100(ah))
2194                 ah->rxchainmask = 0x7;
2195         else
2196                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2197
2198         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2199         ath9k_cmn_reload_chainmask(ah);
2200
2201         return 0;
2202 }
2203
2204 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2205 {
2206         struct ath_softc *sc = hw->priv;
2207
2208         *tx_ant = sc->ant_tx;
2209         *rx_ant = sc->ant_rx;
2210         return 0;
2211 }
2212
2213 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2214 {
2215         struct ath_softc *sc = hw->priv;
2216         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2217         set_bit(ATH_OP_SCANNING, &common->op_flags);
2218 }
2219
2220 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2221 {
2222         struct ath_softc *sc = hw->priv;
2223         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2224         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2225 }
2226
2227 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2228
2229 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2230                          struct ieee80211_scan_request *hw_req)
2231 {
2232         struct cfg80211_scan_request *req = &hw_req->req;
2233         struct ath_softc *sc = hw->priv;
2234         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2235         int ret = 0;
2236
2237         mutex_lock(&sc->mutex);
2238
2239         if (WARN_ON(sc->offchannel.scan_req)) {
2240                 ret = -EBUSY;
2241                 goto out;
2242         }
2243
2244         ath9k_ps_wakeup(sc);
2245         set_bit(ATH_OP_SCANNING, &common->op_flags);
2246         sc->offchannel.scan_vif = vif;
2247         sc->offchannel.scan_req = req;
2248         sc->offchannel.scan_idx = 0;
2249
2250         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2251                 vif->addr);
2252
2253         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2254                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2255                 ath_offchannel_next(sc);
2256         }
2257
2258 out:
2259         mutex_unlock(&sc->mutex);
2260
2261         return ret;
2262 }
2263
2264 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2265                                  struct ieee80211_vif *vif)
2266 {
2267         struct ath_softc *sc = hw->priv;
2268         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2269
2270         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2271
2272         mutex_lock(&sc->mutex);
2273         del_timer_sync(&sc->offchannel.timer);
2274         ath_scan_complete(sc, true);
2275         mutex_unlock(&sc->mutex);
2276 }
2277
2278 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2279                                    struct ieee80211_vif *vif,
2280                                    struct ieee80211_channel *chan, int duration,
2281                                    enum ieee80211_roc_type type)
2282 {
2283         struct ath_softc *sc = hw->priv;
2284         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2285         int ret = 0;
2286
2287         mutex_lock(&sc->mutex);
2288
2289         if (WARN_ON(sc->offchannel.roc_vif)) {
2290                 ret = -EBUSY;
2291                 goto out;
2292         }
2293
2294         ath9k_ps_wakeup(sc);
2295         sc->offchannel.roc_vif = vif;
2296         sc->offchannel.roc_chan = chan;
2297         sc->offchannel.roc_duration = duration;
2298
2299         ath_dbg(common, CHAN_CTX,
2300                 "RoC request on vif: %pM, type: %d duration: %d\n",
2301                 vif->addr, type, duration);
2302
2303         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2304                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2305                 ath_offchannel_next(sc);
2306         }
2307
2308 out:
2309         mutex_unlock(&sc->mutex);
2310
2311         return ret;
2312 }
2313
2314 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2315 {
2316         struct ath_softc *sc = hw->priv;
2317         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2318
2319         mutex_lock(&sc->mutex);
2320
2321         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2322         del_timer_sync(&sc->offchannel.timer);
2323
2324         if (sc->offchannel.roc_vif) {
2325                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2326                         ath_roc_complete(sc, true);
2327         }
2328
2329         mutex_unlock(&sc->mutex);
2330
2331         return 0;
2332 }
2333
2334 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2335                              struct ieee80211_chanctx_conf *conf)
2336 {
2337         struct ath_softc *sc = hw->priv;
2338         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2339         struct ath_chanctx *ctx, **ptr;
2340         int pos;
2341
2342         mutex_lock(&sc->mutex);
2343
2344         ath_for_each_chanctx(sc, ctx) {
2345                 if (ctx->assigned)
2346                         continue;
2347
2348                 ptr = (void *) conf->drv_priv;
2349                 *ptr = ctx;
2350                 ctx->assigned = true;
2351                 pos = ctx - &sc->chanctx[0];
2352                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2353
2354                 ath_dbg(common, CHAN_CTX,
2355                         "Add channel context: %d MHz\n",
2356                         conf->def.chan->center_freq);
2357
2358                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2359                 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_ASSIGN);
2360
2361                 mutex_unlock(&sc->mutex);
2362                 return 0;
2363         }
2364
2365         mutex_unlock(&sc->mutex);
2366         return -ENOSPC;
2367 }
2368
2369
2370 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2371                                  struct ieee80211_chanctx_conf *conf)
2372 {
2373         struct ath_softc *sc = hw->priv;
2374         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2375         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2376
2377         mutex_lock(&sc->mutex);
2378
2379         ath_dbg(common, CHAN_CTX,
2380                 "Remove channel context: %d MHz\n",
2381                 conf->def.chan->center_freq);
2382
2383         ctx->assigned = false;
2384         ctx->hw_queue_base = 0;
2385         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2386
2387         mutex_unlock(&sc->mutex);
2388 }
2389
2390 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2391                                  struct ieee80211_chanctx_conf *conf,
2392                                  u32 changed)
2393 {
2394         struct ath_softc *sc = hw->priv;
2395         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2396         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2397
2398         mutex_lock(&sc->mutex);
2399         ath_dbg(common, CHAN_CTX,
2400                 "Change channel context: %d MHz\n",
2401                 conf->def.chan->center_freq);
2402         ath_chanctx_set_channel(sc, ctx, &conf->def);
2403         mutex_unlock(&sc->mutex);
2404 }
2405
2406 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2407                                     struct ieee80211_vif *vif,
2408                                     struct ieee80211_chanctx_conf *conf)
2409 {
2410         struct ath_softc *sc = hw->priv;
2411         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2412         struct ath_vif *avp = (void *)vif->drv_priv;
2413         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2414         int i;
2415
2416         mutex_lock(&sc->mutex);
2417
2418         ath_dbg(common, CHAN_CTX,
2419                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2420                 vif->addr, vif->type, vif->p2p,
2421                 conf->def.chan->center_freq);
2422
2423         avp->chanctx = ctx;
2424         ctx->nvifs_assigned++;
2425         list_add_tail(&avp->list, &ctx->vifs);
2426         ath9k_calculate_summary_state(sc, ctx);
2427         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2428                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2429
2430         mutex_unlock(&sc->mutex);
2431
2432         return 0;
2433 }
2434
2435 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2436                                        struct ieee80211_vif *vif,
2437                                        struct ieee80211_chanctx_conf *conf)
2438 {
2439         struct ath_softc *sc = hw->priv;
2440         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2441         struct ath_vif *avp = (void *)vif->drv_priv;
2442         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2443         int ac;
2444
2445         mutex_lock(&sc->mutex);
2446
2447         ath_dbg(common, CHAN_CTX,
2448                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2449                 vif->addr, vif->type, vif->p2p,
2450                 conf->def.chan->center_freq);
2451
2452         avp->chanctx = NULL;
2453         ctx->nvifs_assigned--;
2454         list_del(&avp->list);
2455         ath9k_calculate_summary_state(sc, ctx);
2456         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2457                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2458
2459         mutex_unlock(&sc->mutex);
2460 }
2461
2462 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2463                                  struct ieee80211_vif *vif)
2464 {
2465         struct ath_softc *sc = hw->priv;
2466         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2467         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2468         bool changed = false;
2469
2470         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2471                 return;
2472
2473         if (!avp->chanctx)
2474                 return;
2475
2476         mutex_lock(&sc->mutex);
2477
2478         spin_lock_bh(&sc->chan_lock);
2479         if (sc->next_chan || (sc->cur_chan != avp->chanctx)) {
2480                 sc->next_chan = avp->chanctx;
2481                 changed = true;
2482         }
2483         ath_dbg(common, CHAN_CTX,
2484                 "%s: Set chanctx state to FORCE_ACTIVE, changed: %d\n",
2485                 __func__, changed);
2486         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2487         spin_unlock_bh(&sc->chan_lock);
2488
2489         if (changed)
2490                 ath_chanctx_set_next(sc, true);
2491
2492         mutex_unlock(&sc->mutex);
2493 }
2494
2495 void ath9k_fill_chanctx_ops(void)
2496 {
2497         if (!ath9k_is_chanctx_enabled())
2498                 return;
2499
2500         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2501         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2502         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2503         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2504         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2505         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2506         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2507         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2508         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2509         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2510 }
2511
2512 #endif
2513
2514 struct ieee80211_ops ath9k_ops = {
2515         .tx                 = ath9k_tx,
2516         .start              = ath9k_start,
2517         .stop               = ath9k_stop,
2518         .add_interface      = ath9k_add_interface,
2519         .change_interface   = ath9k_change_interface,
2520         .remove_interface   = ath9k_remove_interface,
2521         .config             = ath9k_config,
2522         .configure_filter   = ath9k_configure_filter,
2523         .sta_state          = ath9k_sta_state,
2524         .sta_notify         = ath9k_sta_notify,
2525         .conf_tx            = ath9k_conf_tx,
2526         .bss_info_changed   = ath9k_bss_info_changed,
2527         .set_key            = ath9k_set_key,
2528         .get_tsf            = ath9k_get_tsf,
2529         .set_tsf            = ath9k_set_tsf,
2530         .reset_tsf          = ath9k_reset_tsf,
2531         .ampdu_action       = ath9k_ampdu_action,
2532         .get_survey         = ath9k_get_survey,
2533         .rfkill_poll        = ath9k_rfkill_poll_state,
2534         .set_coverage_class = ath9k_set_coverage_class,
2535         .flush              = ath9k_flush,
2536         .tx_frames_pending  = ath9k_tx_frames_pending,
2537         .tx_last_beacon     = ath9k_tx_last_beacon,
2538         .release_buffered_frames = ath9k_release_buffered_frames,
2539         .get_stats          = ath9k_get_stats,
2540         .set_antenna        = ath9k_set_antenna,
2541         .get_antenna        = ath9k_get_antenna,
2542
2543 #ifdef CONFIG_ATH9K_WOW
2544         .suspend            = ath9k_suspend,
2545         .resume             = ath9k_resume,
2546         .set_wakeup         = ath9k_set_wakeup,
2547 #endif
2548
2549 #ifdef CONFIG_ATH9K_DEBUGFS
2550         .get_et_sset_count  = ath9k_get_et_sset_count,
2551         .get_et_stats       = ath9k_get_et_stats,
2552         .get_et_strings     = ath9k_get_et_strings,
2553 #endif
2554
2555 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2556         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2557 #endif
2558         .sw_scan_start      = ath9k_sw_scan_start,
2559         .sw_scan_complete   = ath9k_sw_scan_complete,
2560 };