2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
66 if (txq->mac80211_qnum >= 0) {
67 struct list_head *list;
69 list = &sc->cur_chan->acq[txq->mac80211_qnum];
70 if (!list_empty(list))
73 spin_unlock_bh(&txq->axq_lock);
77 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
82 spin_lock_irqsave(&sc->sc_pm_lock, flags);
83 ret = ath9k_hw_setpower(sc->sc_ah, mode);
84 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
89 void ath_ps_full_sleep(unsigned long data)
91 struct ath_softc *sc = (struct ath_softc *) data;
92 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 spin_lock(&common->cc_lock);
96 ath_hw_cycle_counters_update(common);
97 spin_unlock(&common->cc_lock);
99 ath9k_hw_setrxabort(sc->sc_ah, 1);
100 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
102 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
105 void ath9k_ps_wakeup(struct ath_softc *sc)
107 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
109 enum ath9k_power_mode power_mode;
111 spin_lock_irqsave(&sc->sc_pm_lock, flags);
112 if (++sc->ps_usecount != 1)
115 del_timer_sync(&sc->sleep_timer);
116 power_mode = sc->sc_ah->power_mode;
117 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
120 * While the hardware is asleep, the cycle counters contain no
121 * useful data. Better clear them now so that they don't mess up
122 * survey data results.
124 if (power_mode != ATH9K_PM_AWAKE) {
125 spin_lock(&common->cc_lock);
126 ath_hw_cycle_counters_update(common);
127 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
128 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
129 spin_unlock(&common->cc_lock);
133 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136 void ath9k_ps_restore(struct ath_softc *sc)
138 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
139 enum ath9k_power_mode mode;
142 spin_lock_irqsave(&sc->sc_pm_lock, flags);
143 if (--sc->ps_usecount != 0)
147 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
151 if (sc->ps_enabled &&
152 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
154 PS_WAIT_FOR_PSPOLL_DATA |
157 mode = ATH9K_PM_NETWORK_SLEEP;
158 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
159 ath9k_btcoex_stop_gen_timer(sc);
164 spin_lock(&common->cc_lock);
165 ath_hw_cycle_counters_update(common);
166 spin_unlock(&common->cc_lock);
168 ath9k_hw_setpower(sc->sc_ah, mode);
171 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
174 static void __ath_cancel_work(struct ath_softc *sc)
176 cancel_work_sync(&sc->paprd_work);
177 cancel_delayed_work_sync(&sc->tx_complete_work);
178 cancel_delayed_work_sync(&sc->hw_pll_work);
180 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
181 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
182 cancel_work_sync(&sc->mci_work);
186 void ath_cancel_work(struct ath_softc *sc)
188 __ath_cancel_work(sc);
189 cancel_work_sync(&sc->hw_reset_work);
192 void ath_restart_work(struct ath_softc *sc)
194 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
196 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
197 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
198 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
203 static bool ath_prepare_reset(struct ath_softc *sc)
205 struct ath_hw *ah = sc->sc_ah;
208 ieee80211_stop_queues(sc->hw);
210 ath9k_hw_disable_interrupts(ah);
212 if (!ath_drain_all_txq(sc))
215 if (!ath_stoprecv(sc))
221 static bool ath_complete_reset(struct ath_softc *sc, bool start)
223 struct ath_hw *ah = sc->sc_ah;
224 struct ath_common *common = ath9k_hw_common(ah);
227 if (ath_startrecv(sc) != 0) {
228 ath_err(common, "Unable to restart recv logic\n");
232 ath9k_cmn_update_txpow(ah, sc->curtxpow,
233 sc->cur_chan->txpower, &sc->curtxpow);
235 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
236 ath9k_calculate_summary_state(sc, sc->cur_chan);
238 if (!sc->cur_chan->offchannel && start) {
239 /* restore per chanctx TSF timer */
240 if (sc->cur_chan->tsf_val) {
243 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
245 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
249 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
252 if (ah->opmode == NL80211_IFTYPE_STATION &&
253 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
254 spin_lock_irqsave(&sc->sc_pm_lock, flags);
255 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
256 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
258 ath9k_set_beacon(sc);
261 ath_restart_work(sc);
262 ath_txq_schedule_all(sc);
267 ath9k_hw_set_interrupts(ah);
268 ath9k_hw_enable_interrupts(ah);
270 if (!ath9k_is_chanctx_enabled())
271 ieee80211_wake_queues(sc->hw);
273 ath9k_chanctx_wake_queues(sc);
275 ath9k_p2p_ps_timer(sc);
280 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
282 struct ath_hw *ah = sc->sc_ah;
283 struct ath_common *common = ath9k_hw_common(ah);
284 struct ath9k_hw_cal_data *caldata = NULL;
288 __ath_cancel_work(sc);
290 tasklet_disable(&sc->intr_tq);
291 spin_lock_bh(&sc->sc_pcu_lock);
293 if (!sc->cur_chan->offchannel) {
295 caldata = &sc->cur_chan->caldata;
303 if (!ath_prepare_reset(sc))
306 spin_lock_bh(&sc->chan_lock);
307 sc->cur_chandef = sc->cur_chan->chandef;
308 spin_unlock_bh(&sc->chan_lock);
310 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
311 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
313 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
316 "Unable to reset channel, reset status %d\n", r);
318 ath9k_hw_enable_interrupts(ah);
319 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
324 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
325 sc->cur_chan->offchannel)
326 ath9k_mci_set_txpower(sc, true, false);
328 if (!ath_complete_reset(sc, true))
332 spin_unlock_bh(&sc->sc_pcu_lock);
333 tasklet_enable(&sc->intr_tq);
338 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
339 struct ieee80211_vif *vif)
342 an = (struct ath_node *)sta->drv_priv;
347 memset(&an->key_idx, 0, sizeof(an->key_idx));
349 ath_tx_node_init(sc, an);
352 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
354 struct ath_node *an = (struct ath_node *)sta->drv_priv;
355 ath_tx_node_cleanup(sc, an);
358 void ath9k_tasklet(unsigned long data)
360 struct ath_softc *sc = (struct ath_softc *)data;
361 struct ath_hw *ah = sc->sc_ah;
362 struct ath_common *common = ath9k_hw_common(ah);
363 enum ath_reset_type type;
365 u32 status = sc->intrstatus;
369 spin_lock(&sc->sc_pcu_lock);
371 if (status & ATH9K_INT_FATAL) {
372 type = RESET_TYPE_FATAL_INT;
373 ath9k_queue_reset(sc, type);
376 * Increment the ref. counter here so that
377 * interrupts are enabled in the reset routine.
379 atomic_inc(&ah->intr_ref_cnt);
380 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
384 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
385 (status & ATH9K_INT_BB_WATCHDOG)) {
386 spin_lock(&common->cc_lock);
387 ath_hw_cycle_counters_update(common);
388 ar9003_hw_bb_watchdog_dbg_info(ah);
389 spin_unlock(&common->cc_lock);
391 if (ar9003_hw_bb_watchdog_check(ah)) {
392 type = RESET_TYPE_BB_WATCHDOG;
393 ath9k_queue_reset(sc, type);
396 * Increment the ref. counter here so that
397 * interrupts are enabled in the reset routine.
399 atomic_inc(&ah->intr_ref_cnt);
400 ath_dbg(common, RESET,
401 "BB_WATCHDOG: Skipping interrupts\n");
406 if (status & ATH9K_INT_GTT) {
409 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
410 type = RESET_TYPE_TX_GTT;
411 ath9k_queue_reset(sc, type);
412 atomic_inc(&ah->intr_ref_cnt);
413 ath_dbg(common, RESET,
414 "GTT: Skipping interrupts\n");
419 spin_lock_irqsave(&sc->sc_pm_lock, flags);
420 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
422 * TSF sync does not look correct; remain awake to sync with
425 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
426 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
428 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
430 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
431 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
434 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
436 if (status & rxmask) {
437 /* Check for high priority Rx first */
438 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
439 (status & ATH9K_INT_RXHP))
440 ath_rx_tasklet(sc, 0, true);
442 ath_rx_tasklet(sc, 0, false);
445 if (status & ATH9K_INT_TX) {
446 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
448 * For EDMA chips, TX completion is enabled for the
449 * beacon queue, so if a beacon has been transmitted
450 * successfully after a GTT interrupt, the GTT counter
451 * gets reset to zero here.
455 ath_tx_edma_tasklet(sc);
460 wake_up(&sc->tx_wait);
463 if (status & ATH9K_INT_GENTIMER)
464 ath_gen_timer_isr(sc->sc_ah);
466 ath9k_btcoex_handle_interrupt(sc, status);
468 /* re-enable hardware interrupt */
469 ath9k_hw_enable_interrupts(ah);
471 spin_unlock(&sc->sc_pcu_lock);
472 ath9k_ps_restore(sc);
475 irqreturn_t ath_isr(int irq, void *dev)
477 #define SCHED_INTR ( \
479 ATH9K_INT_BB_WATCHDOG | \
490 ATH9K_INT_GENTIMER | \
493 struct ath_softc *sc = dev;
494 struct ath_hw *ah = sc->sc_ah;
495 struct ath_common *common = ath9k_hw_common(ah);
496 enum ath9k_int status;
501 * The hardware is not ready/present, don't
502 * touch anything. Note this can happen early
503 * on if the IRQ is shared.
505 if (test_bit(ATH_OP_INVALID, &common->op_flags))
508 /* shared irq, not for us */
510 if (!ath9k_hw_intrpend(ah))
513 if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
514 ath9k_hw_kill_interrupts(ah);
519 * Figure out the reason(s) for the interrupt. Note
520 * that the hal returns a pseudo-ISR that may include
521 * bits we haven't explicitly enabled so we mask the
522 * value to insure we only process bits we requested.
524 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
525 ath9k_debug_sync_cause(sc, sync_cause);
526 status &= ah->imask; /* discard unasked-for bits */
529 * If there are no status bits set, then this interrupt was not
530 * for me (should have been caught above).
535 /* Cache the status */
536 sc->intrstatus = status;
538 if (status & SCHED_INTR)
542 * If a FATAL or RXORN interrupt is received, we have to reset the
545 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
546 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
549 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
550 (status & ATH9K_INT_BB_WATCHDOG))
553 #ifdef CONFIG_ATH9K_WOW
554 if (status & ATH9K_INT_BMISS) {
555 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
556 atomic_inc(&sc->wow_got_bmiss_intr);
557 atomic_dec(&sc->wow_sleep_proc_intr);
562 if (status & ATH9K_INT_SWBA)
563 tasklet_schedule(&sc->bcon_tasklet);
565 if (status & ATH9K_INT_TXURN)
566 ath9k_hw_updatetxtriglevel(ah, true);
568 if (status & ATH9K_INT_RXEOL) {
569 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
570 ath9k_hw_set_interrupts(ah);
573 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
574 if (status & ATH9K_INT_TIM_TIMER) {
575 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
577 /* Clear RxAbort bit so that we can
579 ath9k_setpower(sc, ATH9K_PM_AWAKE);
580 spin_lock(&sc->sc_pm_lock);
581 ath9k_hw_setrxabort(sc->sc_ah, 0);
582 sc->ps_flags |= PS_WAIT_FOR_BEACON;
583 spin_unlock(&sc->sc_pm_lock);
588 ath_debug_stat_interrupt(sc, status);
591 /* turn off every interrupt */
592 ath9k_hw_disable_interrupts(ah);
593 tasklet_schedule(&sc->intr_tq);
601 int ath_reset(struct ath_softc *sc)
606 r = ath_reset_internal(sc, NULL);
607 ath9k_ps_restore(sc);
612 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
614 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
615 #ifdef CONFIG_ATH9K_DEBUGFS
616 RESET_STAT_INC(sc, type);
618 set_bit(ATH_OP_HW_RESET, &common->op_flags);
619 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
622 void ath_reset_work(struct work_struct *work)
624 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
629 /**********************/
630 /* mac80211 callbacks */
631 /**********************/
633 static int ath9k_start(struct ieee80211_hw *hw)
635 struct ath_softc *sc = hw->priv;
636 struct ath_hw *ah = sc->sc_ah;
637 struct ath_common *common = ath9k_hw_common(ah);
638 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
639 struct ath_chanctx *ctx = sc->cur_chan;
640 struct ath9k_channel *init_channel;
643 ath_dbg(common, CONFIG,
644 "Starting driver with initial channel: %d MHz\n",
645 curchan->center_freq);
648 mutex_lock(&sc->mutex);
650 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
651 sc->cur_chandef = hw->conf.chandef;
653 /* Reset SERDES registers */
654 ath9k_hw_configpcipowersave(ah, false);
657 * The basic interface to setting the hardware in a good
658 * state is ``reset''. On return the hardware is known to
659 * be powered up and with interrupts disabled. This must
660 * be followed by initialization of the appropriate bits
661 * and then setup of the interrupt mask.
663 spin_lock_bh(&sc->sc_pcu_lock);
665 atomic_set(&ah->intr_ref_cnt, -1);
667 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
670 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
671 r, curchan->center_freq);
672 ah->reset_power_on = false;
675 /* Setup our intr mask. */
676 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
677 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
680 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
681 ah->imask |= ATH9K_INT_RXHP |
684 ah->imask |= ATH9K_INT_RX;
686 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
687 ah->imask |= ATH9K_INT_BB_WATCHDOG;
690 * Enable GTT interrupts only for AR9003/AR9004 chips
693 if (AR_SREV_9300_20_OR_LATER(ah))
694 ah->imask |= ATH9K_INT_GTT;
696 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
697 ah->imask |= ATH9K_INT_CST;
701 clear_bit(ATH_OP_INVALID, &common->op_flags);
702 sc->sc_ah->is_monitoring = false;
704 if (!ath_complete_reset(sc, false))
705 ah->reset_power_on = false;
707 if (ah->led_pin >= 0) {
708 ath9k_hw_cfg_output(ah, ah->led_pin,
709 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
710 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
714 * Reset key cache to sane defaults (all entries cleared) instead of
715 * semi-random values after suspend/resume.
717 ath9k_cmn_init_crypto(sc->sc_ah);
719 ath9k_hw_reset_tsf(ah);
721 spin_unlock_bh(&sc->sc_pcu_lock);
723 mutex_unlock(&sc->mutex);
725 ath9k_ps_restore(sc);
730 static void ath9k_tx(struct ieee80211_hw *hw,
731 struct ieee80211_tx_control *control,
734 struct ath_softc *sc = hw->priv;
735 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
736 struct ath_tx_control txctl;
737 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
740 if (sc->ps_enabled) {
742 * mac80211 does not set PM field for normal data frames, so we
743 * need to update that based on the current PS mode.
745 if (ieee80211_is_data(hdr->frame_control) &&
746 !ieee80211_is_nullfunc(hdr->frame_control) &&
747 !ieee80211_has_pm(hdr->frame_control)) {
749 "Add PM=1 for a TX frame while in PS mode\n");
750 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
754 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
756 * We are using PS-Poll and mac80211 can request TX while in
757 * power save mode. Need to wake up hardware for the TX to be
758 * completed and if needed, also for RX of buffered frames.
761 spin_lock_irqsave(&sc->sc_pm_lock, flags);
762 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
763 ath9k_hw_setrxabort(sc->sc_ah, 0);
764 if (ieee80211_is_pspoll(hdr->frame_control)) {
766 "Sending PS-Poll to pick a buffered frame\n");
767 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
769 ath_dbg(common, PS, "Wake up to complete TX\n");
770 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
773 * The actual restore operation will happen only after
774 * the ps_flags bit is cleared. We are just dropping
775 * the ps_usecount here.
777 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
778 ath9k_ps_restore(sc);
782 * Cannot tx while the hardware is in full sleep, it first needs a full
783 * chip reset to recover from that
785 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
786 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
790 memset(&txctl, 0, sizeof(struct ath_tx_control));
791 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
792 txctl.sta = control->sta;
794 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
796 if (ath_tx_start(hw, skb, &txctl) != 0) {
797 ath_dbg(common, XMIT, "TX failed\n");
798 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
804 ieee80211_free_txskb(hw, skb);
807 static void ath9k_stop(struct ieee80211_hw *hw)
809 struct ath_softc *sc = hw->priv;
810 struct ath_hw *ah = sc->sc_ah;
811 struct ath_common *common = ath9k_hw_common(ah);
814 ath9k_deinit_channel_context(sc);
816 mutex_lock(&sc->mutex);
820 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
821 ath_dbg(common, ANY, "Device not present\n");
822 mutex_unlock(&sc->mutex);
826 /* Ensure HW is awake when we try to shut it down. */
829 spin_lock_bh(&sc->sc_pcu_lock);
831 /* prevent tasklets to enable interrupts once we disable them */
832 ah->imask &= ~ATH9K_INT_GLOBAL;
834 /* make sure h/w will not generate any interrupt
835 * before setting the invalid flag. */
836 ath9k_hw_disable_interrupts(ah);
838 spin_unlock_bh(&sc->sc_pcu_lock);
840 /* we can now sync irq and kill any running tasklets, since we already
841 * disabled interrupts and not holding a spin lock */
842 synchronize_irq(sc->irq);
843 tasklet_kill(&sc->intr_tq);
844 tasklet_kill(&sc->bcon_tasklet);
846 prev_idle = sc->ps_idle;
849 spin_lock_bh(&sc->sc_pcu_lock);
851 if (ah->led_pin >= 0) {
852 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
853 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
856 ath_prepare_reset(sc);
859 dev_kfree_skb_any(sc->rx.frag);
864 ah->curchan = ath9k_cmn_get_channel(hw, ah,
865 &sc->cur_chan->chandef);
867 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
868 ath9k_hw_phy_disable(ah);
870 ath9k_hw_configpcipowersave(ah, true);
872 spin_unlock_bh(&sc->sc_pcu_lock);
874 ath9k_ps_restore(sc);
876 set_bit(ATH_OP_INVALID, &common->op_flags);
877 sc->ps_idle = prev_idle;
879 mutex_unlock(&sc->mutex);
881 ath_dbg(common, CONFIG, "Driver halt\n");
884 static bool ath9k_uses_beacons(int type)
887 case NL80211_IFTYPE_AP:
888 case NL80211_IFTYPE_ADHOC:
889 case NL80211_IFTYPE_MESH_POINT:
896 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
897 u8 *mac, struct ieee80211_vif *vif)
901 if (iter_data->has_hw_macaddr) {
902 for (i = 0; i < ETH_ALEN; i++)
903 iter_data->mask[i] &=
904 ~(iter_data->hw_macaddr[i] ^ mac[i]);
906 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
907 iter_data->has_hw_macaddr = true;
910 if (!vif->bss_conf.use_short_slot)
911 iter_data->slottime = ATH9K_SLOT_TIME_20;
914 case NL80211_IFTYPE_AP:
916 if (vif->bss_conf.enable_beacon)
917 iter_data->beacons = true;
919 case NL80211_IFTYPE_STATION:
920 iter_data->nstations++;
921 if (vif->bss_conf.assoc && !iter_data->primary_sta)
922 iter_data->primary_sta = vif;
924 case NL80211_IFTYPE_ADHOC:
925 iter_data->nadhocs++;
926 if (vif->bss_conf.enable_beacon)
927 iter_data->beacons = true;
929 case NL80211_IFTYPE_MESH_POINT:
930 iter_data->nmeshes++;
931 if (vif->bss_conf.enable_beacon)
932 iter_data->beacons = true;
934 case NL80211_IFTYPE_WDS:
942 /* Called with sc->mutex held. */
943 void ath9k_calculate_iter_data(struct ath_softc *sc,
944 struct ath_chanctx *ctx,
945 struct ath9k_vif_iter_data *iter_data)
950 * Pick the MAC address of the first interface as the new hardware
951 * MAC address. The hardware will use it together with the BSSID mask
952 * when matching addresses.
954 memset(iter_data, 0, sizeof(*iter_data));
955 memset(&iter_data->mask, 0xff, ETH_ALEN);
956 iter_data->slottime = ATH9K_SLOT_TIME_9;
958 list_for_each_entry(avp, &ctx->vifs, list)
959 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
961 if (ctx == &sc->offchannel.chan) {
962 struct ieee80211_vif *vif;
964 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
965 vif = sc->offchannel.scan_vif;
967 vif = sc->offchannel.roc_vif;
970 ath9k_vif_iter(iter_data, vif->addr, vif);
971 iter_data->beacons = false;
975 static void ath9k_set_assoc_state(struct ath_softc *sc,
976 struct ieee80211_vif *vif, bool changed)
978 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
979 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
982 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
983 /* Set the AID, BSSID and do beacon-sync only when
984 * the HW opmode is STATION.
986 * But the primary bit is set above in any case.
988 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
991 ether_addr_copy(common->curbssid, bss_conf->bssid);
992 common->curaid = bss_conf->aid;
993 ath9k_hw_write_associd(sc->sc_ah);
996 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
997 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
999 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1000 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1001 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1004 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1005 ath9k_mci_update_wlan_channels(sc, false);
1007 ath_dbg(common, CONFIG,
1008 "Primary Station interface: %pM, BSSID: %pM\n",
1009 vif->addr, common->curbssid);
1012 /* Called with sc->mutex held. */
1013 void ath9k_calculate_summary_state(struct ath_softc *sc,
1014 struct ath_chanctx *ctx)
1016 struct ath_hw *ah = sc->sc_ah;
1017 struct ath_common *common = ath9k_hw_common(ah);
1018 struct ath9k_vif_iter_data iter_data;
1020 ath_chanctx_check_active(sc, ctx);
1022 if (ctx != sc->cur_chan)
1025 ath9k_ps_wakeup(sc);
1026 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1028 if (iter_data.has_hw_macaddr)
1029 ether_addr_copy(common->macaddr, iter_data.hw_macaddr);
1031 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1032 ath_hw_setbssidmask(common);
1034 if (iter_data.naps > 0) {
1035 ath9k_hw_set_tsfadjust(ah, true);
1036 ah->opmode = NL80211_IFTYPE_AP;
1038 ath9k_hw_set_tsfadjust(ah, false);
1040 if (iter_data.nmeshes)
1041 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1042 else if (iter_data.nwds)
1043 ah->opmode = NL80211_IFTYPE_AP;
1044 else if (iter_data.nadhocs)
1045 ah->opmode = NL80211_IFTYPE_ADHOC;
1047 ah->opmode = NL80211_IFTYPE_STATION;
1050 ath9k_hw_setopmode(ah);
1052 ctx->switch_after_beacon = false;
1053 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1054 ah->imask |= ATH9K_INT_TSFOOR;
1056 ah->imask &= ~ATH9K_INT_TSFOOR;
1057 if (iter_data.naps == 1 && iter_data.beacons)
1058 ctx->switch_after_beacon = true;
1061 ah->imask &= ~ATH9K_INT_SWBA;
1062 if (ah->opmode == NL80211_IFTYPE_STATION) {
1063 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1065 iter_data.beacons = true;
1066 if (iter_data.primary_sta) {
1067 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1069 if (!ctx->primary_sta ||
1070 !ctx->primary_sta->bss_conf.assoc)
1071 ctx->primary_sta = iter_data.primary_sta;
1073 ctx->primary_sta = NULL;
1074 memset(common->curbssid, 0, ETH_ALEN);
1076 ath9k_hw_write_associd(sc->sc_ah);
1077 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1078 ath9k_mci_update_wlan_channels(sc, true);
1080 } else if (iter_data.beacons) {
1081 ah->imask |= ATH9K_INT_SWBA;
1083 ath9k_hw_set_interrupts(ah);
1085 if (iter_data.beacons)
1086 set_bit(ATH_OP_BEACONS, &common->op_flags);
1088 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1090 if (ah->slottime != iter_data.slottime) {
1091 ah->slottime = iter_data.slottime;
1092 ath9k_hw_init_global_settings(ah);
1095 if (iter_data.primary_sta)
1096 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1098 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1100 ctx->primary_sta = iter_data.primary_sta;
1102 ath9k_ps_restore(sc);
1105 static int ath9k_add_interface(struct ieee80211_hw *hw,
1106 struct ieee80211_vif *vif)
1108 struct ath_softc *sc = hw->priv;
1109 struct ath_hw *ah = sc->sc_ah;
1110 struct ath_common *common = ath9k_hw_common(ah);
1111 struct ath_vif *avp = (void *)vif->drv_priv;
1112 struct ath_node *an = &avp->mcast_node;
1115 mutex_lock(&sc->mutex);
1117 if (config_enabled(CONFIG_ATH9K_TX99)) {
1118 if (sc->nvifs >= 1) {
1119 mutex_unlock(&sc->mutex);
1125 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1128 if (ath9k_uses_beacons(vif->type))
1129 ath9k_beacon_assign_slot(sc, vif);
1132 if (!ath9k_is_chanctx_enabled()) {
1133 avp->chanctx = sc->cur_chan;
1134 list_add_tail(&avp->list, &avp->chanctx->vifs);
1136 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1137 vif->hw_queue[i] = i;
1138 if (vif->type == NL80211_IFTYPE_AP)
1139 vif->cab_queue = hw->queues - 2;
1141 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1146 an->no_ps_filter = true;
1147 ath_tx_node_init(sc, an);
1149 mutex_unlock(&sc->mutex);
1153 static int ath9k_change_interface(struct ieee80211_hw *hw,
1154 struct ieee80211_vif *vif,
1155 enum nl80211_iftype new_type,
1158 struct ath_softc *sc = hw->priv;
1159 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1160 struct ath_vif *avp = (void *)vif->drv_priv;
1163 mutex_lock(&sc->mutex);
1165 if (config_enabled(CONFIG_ATH9K_TX99)) {
1166 mutex_unlock(&sc->mutex);
1170 ath_dbg(common, CONFIG, "Change Interface\n");
1172 if (ath9k_uses_beacons(vif->type))
1173 ath9k_beacon_remove_slot(sc, vif);
1175 vif->type = new_type;
1178 if (ath9k_uses_beacons(vif->type))
1179 ath9k_beacon_assign_slot(sc, vif);
1181 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1182 vif->hw_queue[i] = i;
1184 if (vif->type == NL80211_IFTYPE_AP)
1185 vif->cab_queue = hw->queues - 2;
1187 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1189 ath9k_calculate_summary_state(sc, avp->chanctx);
1191 mutex_unlock(&sc->mutex);
1195 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1196 struct ieee80211_vif *vif)
1198 struct ath_softc *sc = hw->priv;
1199 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1200 struct ath_vif *avp = (void *)vif->drv_priv;
1202 ath_dbg(common, CONFIG, "Detach Interface\n");
1204 mutex_lock(&sc->mutex);
1206 ath9k_p2p_remove_vif(sc, vif);
1209 sc->tx99_vif = NULL;
1210 if (!ath9k_is_chanctx_enabled())
1211 list_del(&avp->list);
1213 if (ath9k_uses_beacons(vif->type))
1214 ath9k_beacon_remove_slot(sc, vif);
1216 ath_tx_node_cleanup(sc, &avp->mcast_node);
1218 mutex_unlock(&sc->mutex);
1221 static void ath9k_enable_ps(struct ath_softc *sc)
1223 struct ath_hw *ah = sc->sc_ah;
1224 struct ath_common *common = ath9k_hw_common(ah);
1226 if (config_enabled(CONFIG_ATH9K_TX99))
1229 sc->ps_enabled = true;
1230 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1231 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1232 ah->imask |= ATH9K_INT_TIM_TIMER;
1233 ath9k_hw_set_interrupts(ah);
1235 ath9k_hw_setrxabort(ah, 1);
1237 ath_dbg(common, PS, "PowerSave enabled\n");
1240 static void ath9k_disable_ps(struct ath_softc *sc)
1242 struct ath_hw *ah = sc->sc_ah;
1243 struct ath_common *common = ath9k_hw_common(ah);
1245 if (config_enabled(CONFIG_ATH9K_TX99))
1248 sc->ps_enabled = false;
1249 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1250 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1251 ath9k_hw_setrxabort(ah, 0);
1252 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1254 PS_WAIT_FOR_PSPOLL_DATA |
1255 PS_WAIT_FOR_TX_ACK);
1256 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1257 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1258 ath9k_hw_set_interrupts(ah);
1261 ath_dbg(common, PS, "PowerSave disabled\n");
1264 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1266 struct ath_softc *sc = hw->priv;
1267 struct ath_hw *ah = sc->sc_ah;
1268 struct ath_common *common = ath9k_hw_common(ah);
1271 if (config_enabled(CONFIG_ATH9K_TX99))
1274 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1275 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1279 ath9k_ps_wakeup(sc);
1280 rxfilter = ath9k_hw_getrxfilter(ah);
1281 ath9k_hw_setrxfilter(ah, rxfilter |
1282 ATH9K_RX_FILTER_PHYRADAR |
1283 ATH9K_RX_FILTER_PHYERR);
1285 /* TODO: usually this should not be neccesary, but for some reason
1286 * (or in some mode?) the trigger must be called after the
1287 * configuration, otherwise the register will have its values reset
1288 * (on my ar9220 to value 0x01002310)
1290 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1291 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1292 ath9k_ps_restore(sc);
1295 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1296 enum spectral_mode spectral_mode)
1298 struct ath_softc *sc = hw->priv;
1299 struct ath_hw *ah = sc->sc_ah;
1300 struct ath_common *common = ath9k_hw_common(ah);
1302 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1303 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1307 switch (spectral_mode) {
1308 case SPECTRAL_DISABLED:
1309 sc->spec_config.enabled = 0;
1311 case SPECTRAL_BACKGROUND:
1312 /* send endless samples.
1313 * TODO: is this really useful for "background"?
1315 sc->spec_config.endless = 1;
1316 sc->spec_config.enabled = 1;
1318 case SPECTRAL_CHANSCAN:
1319 case SPECTRAL_MANUAL:
1320 sc->spec_config.endless = 0;
1321 sc->spec_config.enabled = 1;
1327 ath9k_ps_wakeup(sc);
1328 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1329 ath9k_ps_restore(sc);
1331 sc->spectral_mode = spectral_mode;
1336 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1338 struct ath_softc *sc = hw->priv;
1339 struct ath_hw *ah = sc->sc_ah;
1340 struct ath_common *common = ath9k_hw_common(ah);
1341 struct ieee80211_conf *conf = &hw->conf;
1342 struct ath_chanctx *ctx = sc->cur_chan;
1344 ath9k_ps_wakeup(sc);
1345 mutex_lock(&sc->mutex);
1347 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1348 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1350 ath_cancel_work(sc);
1351 ath9k_stop_btcoex(sc);
1353 ath9k_start_btcoex(sc);
1355 * The chip needs a reset to properly wake up from
1358 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1363 * We just prepare to enable PS. We have to wait until our AP has
1364 * ACK'd our null data frame to disable RX otherwise we'll ignore
1365 * those ACKs and end up retransmitting the same null data frames.
1366 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1368 if (changed & IEEE80211_CONF_CHANGE_PS) {
1369 unsigned long flags;
1370 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1371 if (conf->flags & IEEE80211_CONF_PS)
1372 ath9k_enable_ps(sc);
1374 ath9k_disable_ps(sc);
1375 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1378 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1379 if (conf->flags & IEEE80211_CONF_MONITOR) {
1380 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1381 sc->sc_ah->is_monitoring = true;
1383 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1384 sc->sc_ah->is_monitoring = false;
1388 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1389 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1390 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1393 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1394 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1395 sc->cur_chan->txpower = 2 * conf->power_level;
1396 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1397 sc->cur_chan->txpower, &sc->curtxpow);
1400 mutex_unlock(&sc->mutex);
1401 ath9k_ps_restore(sc);
1406 #define SUPPORTED_FILTERS \
1407 (FIF_PROMISC_IN_BSS | \
1412 FIF_BCN_PRBRESP_PROMISC | \
1416 /* FIXME: sc->sc_full_reset ? */
1417 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1418 unsigned int changed_flags,
1419 unsigned int *total_flags,
1422 struct ath_softc *sc = hw->priv;
1425 changed_flags &= SUPPORTED_FILTERS;
1426 *total_flags &= SUPPORTED_FILTERS;
1428 sc->rx.rxfilter = *total_flags;
1429 ath9k_ps_wakeup(sc);
1430 rfilt = ath_calcrxfilter(sc);
1431 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1432 ath9k_ps_restore(sc);
1434 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1438 static int ath9k_sta_add(struct ieee80211_hw *hw,
1439 struct ieee80211_vif *vif,
1440 struct ieee80211_sta *sta)
1442 struct ath_softc *sc = hw->priv;
1443 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1444 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1445 struct ieee80211_key_conf ps_key = { };
1448 ath_node_attach(sc, sta, vif);
1450 if (vif->type != NL80211_IFTYPE_AP &&
1451 vif->type != NL80211_IFTYPE_AP_VLAN)
1454 key = ath_key_config(common, vif, sta, &ps_key);
1457 an->key_idx[0] = key;
1463 static void ath9k_del_ps_key(struct ath_softc *sc,
1464 struct ieee80211_vif *vif,
1465 struct ieee80211_sta *sta)
1467 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1468 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1469 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1474 ath_key_delete(common, &ps_key);
1479 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1480 struct ieee80211_vif *vif,
1481 struct ieee80211_sta *sta)
1483 struct ath_softc *sc = hw->priv;
1485 ath9k_del_ps_key(sc, vif, sta);
1486 ath_node_detach(sc, sta);
1491 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1492 struct ath_node *an,
1497 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1498 if (!an->key_idx[i])
1500 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1504 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1505 struct ieee80211_vif *vif,
1506 enum sta_notify_cmd cmd,
1507 struct ieee80211_sta *sta)
1509 struct ath_softc *sc = hw->priv;
1510 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1513 case STA_NOTIFY_SLEEP:
1514 an->sleeping = true;
1515 ath_tx_aggr_sleep(sta, sc, an);
1516 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1518 case STA_NOTIFY_AWAKE:
1519 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1520 an->sleeping = false;
1521 ath_tx_aggr_wakeup(sc, an);
1526 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1527 struct ieee80211_vif *vif, u16 queue,
1528 const struct ieee80211_tx_queue_params *params)
1530 struct ath_softc *sc = hw->priv;
1531 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1532 struct ath_txq *txq;
1533 struct ath9k_tx_queue_info qi;
1536 if (queue >= IEEE80211_NUM_ACS)
1539 txq = sc->tx.txq_map[queue];
1541 ath9k_ps_wakeup(sc);
1542 mutex_lock(&sc->mutex);
1544 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1546 qi.tqi_aifs = params->aifs;
1547 qi.tqi_cwmin = params->cw_min;
1548 qi.tqi_cwmax = params->cw_max;
1549 qi.tqi_burstTime = params->txop * 32;
1551 ath_dbg(common, CONFIG,
1552 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1553 queue, txq->axq_qnum, params->aifs, params->cw_min,
1554 params->cw_max, params->txop);
1556 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1557 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1559 ath_err(common, "TXQ Update failed\n");
1561 mutex_unlock(&sc->mutex);
1562 ath9k_ps_restore(sc);
1567 static int ath9k_set_key(struct ieee80211_hw *hw,
1568 enum set_key_cmd cmd,
1569 struct ieee80211_vif *vif,
1570 struct ieee80211_sta *sta,
1571 struct ieee80211_key_conf *key)
1573 struct ath_softc *sc = hw->priv;
1574 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1575 struct ath_node *an = NULL;
1578 if (ath9k_modparam_nohwcrypt)
1581 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1582 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1583 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1584 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1585 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1587 * For now, disable hw crypto for the RSN IBSS group keys. This
1588 * could be optimized in the future to use a modified key cache
1589 * design to support per-STA RX GTK, but until that gets
1590 * implemented, use of software crypto for group addressed
1591 * frames is a acceptable to allow RSN IBSS to be used.
1596 mutex_lock(&sc->mutex);
1597 ath9k_ps_wakeup(sc);
1598 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1600 an = (struct ath_node *)sta->drv_priv;
1605 ath9k_del_ps_key(sc, vif, sta);
1607 key->hw_key_idx = 0;
1608 ret = ath_key_config(common, vif, sta, key);
1610 key->hw_key_idx = ret;
1611 /* push IV and Michael MIC generation to stack */
1612 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1613 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1614 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1615 if (sc->sc_ah->sw_mgmt_crypto &&
1616 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1617 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1620 if (an && key->hw_key_idx) {
1621 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1624 an->key_idx[i] = key->hw_key_idx;
1627 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1631 ath_key_delete(common, key);
1633 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1634 if (an->key_idx[i] != key->hw_key_idx)
1640 key->hw_key_idx = 0;
1646 ath9k_ps_restore(sc);
1647 mutex_unlock(&sc->mutex);
1652 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1653 struct ieee80211_vif *vif,
1654 struct ieee80211_bss_conf *bss_conf,
1658 (BSS_CHANGED_ASSOC | \
1659 BSS_CHANGED_IBSS | \
1660 BSS_CHANGED_BEACON_ENABLED)
1662 struct ath_softc *sc = hw->priv;
1663 struct ath_hw *ah = sc->sc_ah;
1664 struct ath_common *common = ath9k_hw_common(ah);
1665 struct ath_vif *avp = (void *)vif->drv_priv;
1668 ath9k_ps_wakeup(sc);
1669 mutex_lock(&sc->mutex);
1671 if (changed & BSS_CHANGED_ASSOC) {
1672 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1673 bss_conf->bssid, bss_conf->assoc);
1675 ath9k_calculate_summary_state(sc, avp->chanctx);
1677 if (ath9k_is_chanctx_enabled()) {
1678 if (bss_conf->assoc)
1679 ath_chanctx_event(sc, vif,
1680 ATH_CHANCTX_EVENT_ASSOC);
1684 if (changed & BSS_CHANGED_IBSS) {
1685 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1686 common->curaid = bss_conf->aid;
1687 ath9k_hw_write_associd(sc->sc_ah);
1690 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1691 (changed & BSS_CHANGED_BEACON_INT) ||
1692 (changed & BSS_CHANGED_BEACON_INFO)) {
1693 if (changed & BSS_CHANGED_BEACON_ENABLED)
1694 ath9k_calculate_summary_state(sc, avp->chanctx);
1695 ath9k_beacon_config(sc, vif, changed);
1698 if ((avp->chanctx == sc->cur_chan) &&
1699 (changed & BSS_CHANGED_ERP_SLOT)) {
1700 if (bss_conf->use_short_slot)
1704 if (vif->type == NL80211_IFTYPE_AP) {
1706 * Defer update, so that connected stations can adjust
1707 * their settings at the same time.
1708 * See beacon.c for more details
1710 sc->beacon.slottime = slottime;
1711 sc->beacon.updateslot = UPDATE;
1713 ah->slottime = slottime;
1714 ath9k_hw_init_global_settings(ah);
1718 if (changed & BSS_CHANGED_P2P_PS)
1719 ath9k_p2p_bss_info_changed(sc, vif);
1721 if (changed & CHECK_ANI)
1724 mutex_unlock(&sc->mutex);
1725 ath9k_ps_restore(sc);
1730 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1732 struct ath_softc *sc = hw->priv;
1735 mutex_lock(&sc->mutex);
1736 ath9k_ps_wakeup(sc);
1737 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1738 ath9k_ps_restore(sc);
1739 mutex_unlock(&sc->mutex);
1744 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1745 struct ieee80211_vif *vif,
1748 struct ath_softc *sc = hw->priv;
1750 mutex_lock(&sc->mutex);
1751 ath9k_ps_wakeup(sc);
1752 ath9k_hw_settsf64(sc->sc_ah, tsf);
1753 ath9k_ps_restore(sc);
1754 mutex_unlock(&sc->mutex);
1757 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1759 struct ath_softc *sc = hw->priv;
1761 mutex_lock(&sc->mutex);
1763 ath9k_ps_wakeup(sc);
1764 ath9k_hw_reset_tsf(sc->sc_ah);
1765 ath9k_ps_restore(sc);
1767 mutex_unlock(&sc->mutex);
1770 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1771 struct ieee80211_vif *vif,
1772 enum ieee80211_ampdu_mlme_action action,
1773 struct ieee80211_sta *sta,
1774 u16 tid, u16 *ssn, u8 buf_size)
1776 struct ath_softc *sc = hw->priv;
1780 mutex_lock(&sc->mutex);
1783 case IEEE80211_AMPDU_RX_START:
1785 case IEEE80211_AMPDU_RX_STOP:
1787 case IEEE80211_AMPDU_TX_START:
1788 ath9k_ps_wakeup(sc);
1789 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1791 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1792 ath9k_ps_restore(sc);
1794 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1795 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1797 case IEEE80211_AMPDU_TX_STOP_CONT:
1798 ath9k_ps_wakeup(sc);
1799 ath_tx_aggr_stop(sc, sta, tid);
1801 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1802 ath9k_ps_restore(sc);
1804 case IEEE80211_AMPDU_TX_OPERATIONAL:
1805 ath9k_ps_wakeup(sc);
1806 ath_tx_aggr_resume(sc, sta, tid);
1807 ath9k_ps_restore(sc);
1810 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1813 mutex_unlock(&sc->mutex);
1818 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1819 struct survey_info *survey)
1821 struct ath_softc *sc = hw->priv;
1822 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1823 struct ieee80211_supported_band *sband;
1824 struct ieee80211_channel *chan;
1827 if (config_enabled(CONFIG_ATH9K_TX99))
1830 spin_lock_bh(&common->cc_lock);
1832 ath_update_survey_stats(sc);
1834 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1835 if (sband && idx >= sband->n_channels) {
1836 idx -= sband->n_channels;
1841 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1843 if (!sband || idx >= sband->n_channels) {
1844 spin_unlock_bh(&common->cc_lock);
1848 chan = &sband->channels[idx];
1849 pos = chan->hw_value;
1850 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1851 survey->channel = chan;
1852 spin_unlock_bh(&common->cc_lock);
1857 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1859 struct ath_softc *sc = hw->priv;
1860 struct ath_hw *ah = sc->sc_ah;
1862 if (config_enabled(CONFIG_ATH9K_TX99))
1865 mutex_lock(&sc->mutex);
1866 ah->coverage_class = coverage_class;
1868 ath9k_ps_wakeup(sc);
1869 ath9k_hw_init_global_settings(ah);
1870 ath9k_ps_restore(sc);
1872 mutex_unlock(&sc->mutex);
1875 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1879 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1880 if (!ATH_TXQ_SETUP(sc, i))
1883 if (!sc->tx.txq[i].axq_depth)
1886 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1894 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1895 u32 queues, bool drop)
1897 struct ath_softc *sc = hw->priv;
1899 mutex_lock(&sc->mutex);
1900 __ath9k_flush(hw, queues, drop);
1901 mutex_unlock(&sc->mutex);
1904 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1906 struct ath_softc *sc = hw->priv;
1907 struct ath_hw *ah = sc->sc_ah;
1908 struct ath_common *common = ath9k_hw_common(ah);
1909 int timeout = HZ / 5; /* 200 ms */
1913 cancel_delayed_work_sync(&sc->tx_complete_work);
1915 if (ah->ah_flags & AH_UNPLUGGED) {
1916 ath_dbg(common, ANY, "Device has been unplugged!\n");
1920 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
1921 ath_dbg(common, ANY, "Device not present\n");
1925 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
1930 ath9k_ps_wakeup(sc);
1931 spin_lock_bh(&sc->sc_pcu_lock);
1932 drain_txq = ath_drain_all_txq(sc);
1933 spin_unlock_bh(&sc->sc_pcu_lock);
1938 ath9k_ps_restore(sc);
1939 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
1940 ieee80211_wake_queue(sc->hw,
1941 sc->cur_chan->hw_queue_base + i);
1945 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1948 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1950 struct ath_softc *sc = hw->priv;
1953 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1954 if (!ATH_TXQ_SETUP(sc, i))
1957 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1963 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1965 struct ath_softc *sc = hw->priv;
1966 struct ath_hw *ah = sc->sc_ah;
1967 struct ieee80211_vif *vif;
1968 struct ath_vif *avp;
1970 struct ath_tx_status ts;
1971 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1974 vif = sc->beacon.bslot[0];
1978 if (!vif->bss_conf.enable_beacon)
1981 avp = (void *)vif->drv_priv;
1983 if (!sc->beacon.tx_processed && !edma) {
1984 tasklet_disable(&sc->bcon_tasklet);
1987 if (!bf || !bf->bf_mpdu)
1990 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1991 if (status == -EINPROGRESS)
1994 sc->beacon.tx_processed = true;
1995 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1998 tasklet_enable(&sc->bcon_tasklet);
2001 return sc->beacon.tx_last;
2004 static int ath9k_get_stats(struct ieee80211_hw *hw,
2005 struct ieee80211_low_level_stats *stats)
2007 struct ath_softc *sc = hw->priv;
2008 struct ath_hw *ah = sc->sc_ah;
2009 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2011 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2012 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2013 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2014 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2018 static u32 fill_chainmask(u32 cap, u32 new)
2023 for (i = 0; cap && new; i++, cap >>= 1) {
2024 if (!(cap & BIT(0)))
2036 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2038 if (AR_SREV_9300_20_OR_LATER(ah))
2041 switch (val & 0x7) {
2047 return (ah->caps.rx_chainmask == 1);
2053 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2055 struct ath_softc *sc = hw->priv;
2056 struct ath_hw *ah = sc->sc_ah;
2058 if (ah->caps.rx_chainmask != 1)
2061 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2064 sc->ant_rx = rx_ant;
2065 sc->ant_tx = tx_ant;
2067 if (ah->caps.rx_chainmask == 1)
2070 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2071 if (AR_SREV_9100(ah))
2072 ah->rxchainmask = 0x7;
2074 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2076 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2077 ath9k_cmn_reload_chainmask(ah);
2082 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2084 struct ath_softc *sc = hw->priv;
2086 *tx_ant = sc->ant_tx;
2087 *rx_ant = sc->ant_rx;
2091 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2093 struct ath_softc *sc = hw->priv;
2094 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2095 set_bit(ATH_OP_SCANNING, &common->op_flags);
2098 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2100 struct ath_softc *sc = hw->priv;
2101 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2102 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2105 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2107 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2108 struct ieee80211_scan_request *hw_req)
2110 struct cfg80211_scan_request *req = &hw_req->req;
2111 struct ath_softc *sc = hw->priv;
2112 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2115 mutex_lock(&sc->mutex);
2117 if (WARN_ON(sc->offchannel.scan_req)) {
2122 ath9k_ps_wakeup(sc);
2123 set_bit(ATH_OP_SCANNING, &common->op_flags);
2124 sc->offchannel.scan_vif = vif;
2125 sc->offchannel.scan_req = req;
2126 sc->offchannel.scan_idx = 0;
2128 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2131 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2132 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2133 ath_offchannel_next(sc);
2137 mutex_unlock(&sc->mutex);
2142 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2143 struct ieee80211_vif *vif)
2145 struct ath_softc *sc = hw->priv;
2146 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2148 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2150 mutex_lock(&sc->mutex);
2151 del_timer_sync(&sc->offchannel.timer);
2152 ath_scan_complete(sc, true);
2153 mutex_unlock(&sc->mutex);
2156 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2157 struct ieee80211_vif *vif,
2158 struct ieee80211_channel *chan, int duration,
2159 enum ieee80211_roc_type type)
2161 struct ath_softc *sc = hw->priv;
2162 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2165 mutex_lock(&sc->mutex);
2167 if (WARN_ON(sc->offchannel.roc_vif)) {
2172 ath9k_ps_wakeup(sc);
2173 sc->offchannel.roc_vif = vif;
2174 sc->offchannel.roc_chan = chan;
2175 sc->offchannel.roc_duration = duration;
2177 ath_dbg(common, CHAN_CTX,
2178 "RoC request on vif: %pM, type: %d duration: %d\n",
2179 vif->addr, type, duration);
2181 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2182 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2183 ath_offchannel_next(sc);
2187 mutex_unlock(&sc->mutex);
2192 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2194 struct ath_softc *sc = hw->priv;
2195 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2197 mutex_lock(&sc->mutex);
2199 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2200 del_timer_sync(&sc->offchannel.timer);
2202 if (sc->offchannel.roc_vif) {
2203 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2204 ath_roc_complete(sc, true);
2207 mutex_unlock(&sc->mutex);
2212 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2213 struct ieee80211_chanctx_conf *conf)
2215 struct ath_softc *sc = hw->priv;
2216 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2217 struct ath_chanctx *ctx, **ptr;
2220 mutex_lock(&sc->mutex);
2222 ath_for_each_chanctx(sc, ctx) {
2226 ptr = (void *) conf->drv_priv;
2228 ctx->assigned = true;
2229 pos = ctx - &sc->chanctx[0];
2230 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2232 ath_dbg(common, CHAN_CTX,
2233 "Add channel context: %d MHz\n",
2234 conf->def.chan->center_freq);
2236 ath_chanctx_set_channel(sc, ctx, &conf->def);
2237 mutex_unlock(&sc->mutex);
2241 mutex_unlock(&sc->mutex);
2246 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2247 struct ieee80211_chanctx_conf *conf)
2249 struct ath_softc *sc = hw->priv;
2250 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2251 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2253 mutex_lock(&sc->mutex);
2255 ath_dbg(common, CHAN_CTX,
2256 "Remove channel context: %d MHz\n",
2257 conf->def.chan->center_freq);
2259 ctx->assigned = false;
2260 ctx->hw_queue_base = -1;
2261 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2263 mutex_unlock(&sc->mutex);
2266 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2267 struct ieee80211_chanctx_conf *conf,
2270 struct ath_softc *sc = hw->priv;
2271 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2272 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2274 mutex_lock(&sc->mutex);
2275 ath_dbg(common, CHAN_CTX,
2276 "Change channel context: %d MHz\n",
2277 conf->def.chan->center_freq);
2278 ath_chanctx_set_channel(sc, ctx, &conf->def);
2279 mutex_unlock(&sc->mutex);
2282 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2283 struct ieee80211_vif *vif,
2284 struct ieee80211_chanctx_conf *conf)
2286 struct ath_softc *sc = hw->priv;
2287 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2288 struct ath_vif *avp = (void *)vif->drv_priv;
2289 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2292 mutex_lock(&sc->mutex);
2294 ath_dbg(common, CHAN_CTX,
2295 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2296 vif->addr, vif->type, vif->p2p,
2297 conf->def.chan->center_freq);
2300 list_add_tail(&avp->list, &ctx->vifs);
2301 ath9k_calculate_summary_state(sc, ctx);
2302 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2303 vif->hw_queue[i] = ctx->hw_queue_base + i;
2305 mutex_unlock(&sc->mutex);
2310 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2311 struct ieee80211_vif *vif,
2312 struct ieee80211_chanctx_conf *conf)
2314 struct ath_softc *sc = hw->priv;
2315 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2316 struct ath_vif *avp = (void *)vif->drv_priv;
2317 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2320 mutex_lock(&sc->mutex);
2322 ath_dbg(common, CHAN_CTX,
2323 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2324 vif->addr, vif->type, vif->p2p,
2325 conf->def.chan->center_freq);
2327 avp->chanctx = NULL;
2328 list_del(&avp->list);
2329 ath9k_calculate_summary_state(sc, ctx);
2330 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2331 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2333 mutex_unlock(&sc->mutex);
2336 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2337 struct ieee80211_vif *vif)
2339 struct ath_softc *sc = hw->priv;
2340 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2341 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2342 bool changed = false;
2344 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2350 mutex_lock(&sc->mutex);
2352 spin_lock_bh(&sc->chan_lock);
2353 if (sc->next_chan || (sc->cur_chan != avp->chanctx)) {
2354 sc->next_chan = avp->chanctx;
2357 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2358 spin_unlock_bh(&sc->chan_lock);
2361 ath_chanctx_set_next(sc, true);
2363 mutex_unlock(&sc->mutex);
2366 void ath9k_fill_chanctx_ops(void)
2368 if (!ath9k_is_chanctx_enabled())
2371 ath9k_ops.hw_scan = ath9k_hw_scan;
2372 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2373 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2374 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2375 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2376 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2377 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2378 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2379 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2380 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2385 struct ieee80211_ops ath9k_ops = {
2387 .start = ath9k_start,
2389 .add_interface = ath9k_add_interface,
2390 .change_interface = ath9k_change_interface,
2391 .remove_interface = ath9k_remove_interface,
2392 .config = ath9k_config,
2393 .configure_filter = ath9k_configure_filter,
2394 .sta_add = ath9k_sta_add,
2395 .sta_remove = ath9k_sta_remove,
2396 .sta_notify = ath9k_sta_notify,
2397 .conf_tx = ath9k_conf_tx,
2398 .bss_info_changed = ath9k_bss_info_changed,
2399 .set_key = ath9k_set_key,
2400 .get_tsf = ath9k_get_tsf,
2401 .set_tsf = ath9k_set_tsf,
2402 .reset_tsf = ath9k_reset_tsf,
2403 .ampdu_action = ath9k_ampdu_action,
2404 .get_survey = ath9k_get_survey,
2405 .rfkill_poll = ath9k_rfkill_poll_state,
2406 .set_coverage_class = ath9k_set_coverage_class,
2407 .flush = ath9k_flush,
2408 .tx_frames_pending = ath9k_tx_frames_pending,
2409 .tx_last_beacon = ath9k_tx_last_beacon,
2410 .release_buffered_frames = ath9k_release_buffered_frames,
2411 .get_stats = ath9k_get_stats,
2412 .set_antenna = ath9k_set_antenna,
2413 .get_antenna = ath9k_get_antenna,
2415 #ifdef CONFIG_ATH9K_WOW
2416 .suspend = ath9k_suspend,
2417 .resume = ath9k_resume,
2418 .set_wakeup = ath9k_set_wakeup,
2421 #ifdef CONFIG_ATH9K_DEBUGFS
2422 .get_et_sset_count = ath9k_get_et_sset_count,
2423 .get_et_stats = ath9k_get_et_stats,
2424 .get_et_strings = ath9k_get_et_strings,
2427 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2428 .sta_add_debugfs = ath9k_sta_add_debugfs,
2430 .sw_scan_start = ath9k_sw_scan_start,
2431 .sw_scan_complete = ath9k_sw_scan_complete,