drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct list_head *list;
  74
  75                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(list))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->tx_complete_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207         ath_start_ani(sc);
 208 }
 209
 210 static bool ath_prepare_reset(struct ath_softc *sc)
 211 {
 212         struct ath_hw *ah = sc->sc_ah;
 213         bool ret = true;
 214
 215         ieee80211_stop_queues(sc->hw);
 216         ath_stop_ani(sc);
 217         ath9k_hw_disable_interrupts(ah);
 218
 219         if (!ath_drain_all_txq(sc))
 220                 ret = false;
 221
 222         if (!ath_stoprecv(sc))
 223                 ret = false;
 224
 225         return ret;
 226 }
 227
 228 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 229 {
 230         struct ath_hw *ah = sc->sc_ah;
 231         struct ath_common *common = ath9k_hw_common(ah);
 232         unsigned long flags;
 233
 234         ath9k_calculate_summary_state(sc, sc->cur_chan);
 235         ath_startrecv(sc);
 236         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 237                                sc->cur_chan->txpower,
 238                                &sc->cur_chan->cur_txpower);
 239         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 240
 241         if (!sc->cur_chan->offchannel && start) {
 242                 /* restore per chanctx TSF timer */
 243                 if (sc->cur_chan->tsf_val) {
 244                         u32 offset;
 245
 246                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 247                                                          NULL);
 248                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 249                 }
 250
 251
 252                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 253                         goto work;
 254
 255                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 256                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 257                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 258                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 259                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 260                 } else {
 261                         ath9k_set_beacon(sc);
 262                 }
 263         work:
 264                 ath_restart_work(sc);
 265                 ath_txq_schedule_all(sc);
 266         }
 267
 268         sc->gtt_cnt = 0;
 269
 270         ath9k_hw_set_interrupts(ah);
 271         ath9k_hw_enable_interrupts(ah);
 272         ieee80211_wake_queues(sc->hw);
 273         ath9k_p2p_ps_timer(sc);
 274
 275         return true;
 276 }
 277
 278 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 279 {
 280         struct ath_hw *ah = sc->sc_ah;
 281         struct ath_common *common = ath9k_hw_common(ah);
 282         struct ath9k_hw_cal_data *caldata = NULL;
 283         bool fastcc = true;
 284         int r;
 285
 286         __ath_cancel_work(sc);
 287
 288         tasklet_disable(&sc->intr_tq);
 289         tasklet_disable(&sc->bcon_tasklet);
 290         spin_lock_bh(&sc->sc_pcu_lock);
 291
 292         if (!sc->cur_chan->offchannel) {
 293                 fastcc = false;
 294                 caldata = &sc->cur_chan->caldata;
 295         }
 296
 297         if (!hchan) {
 298                 fastcc = false;
 299                 hchan = ah->curchan;
 300         }
 301
 302         if (!ath_prepare_reset(sc))
 303                 fastcc = false;
 304
 305         if (ath9k_is_chanctx_enabled())
 306                 fastcc = false;
 307
 308         spin_lock_bh(&sc->chan_lock);
 309         sc->cur_chandef = sc->cur_chan->chandef;
 310         spin_unlock_bh(&sc->chan_lock);
 311
 312         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 313                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 314
 315         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 316         if (r) {
 317                 ath_err(common,
 318                         "Unable to reset channel, reset status %d\n", r);
 319
 320                 ath9k_hw_enable_interrupts(ah);
 321                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 322
 323                 goto out;
 324         }
 325
 326         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 327             sc->cur_chan->offchannel)
 328                 ath9k_mci_set_txpower(sc, true, false);
 329
 330         if (!ath_complete_reset(sc, true))
 331                 r = -EIO;
 332
 333 out:
 334         spin_unlock_bh(&sc->sc_pcu_lock);
 335         tasklet_enable(&sc->bcon_tasklet);
 336         tasklet_enable(&sc->intr_tq);
 337
 338         return r;
 339 }
 340
 341 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 342                             struct ieee80211_vif *vif)
 343 {
 344         struct ath_node *an;
 345         an = (struct ath_node *)sta->drv_priv;
 346
 347         an->sc = sc;
 348         an->sta = sta;
 349         an->vif = vif;
 350         memset(&an->key_idx, 0, sizeof(an->key_idx));
 351
 352         ath_tx_node_init(sc, an);
 353
 354         ath_dynack_node_init(sc->sc_ah, an);
 355 }
 356
 357 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 358 {
 359         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 360         ath_tx_node_cleanup(sc, an);
 361
 362         ath_dynack_node_deinit(sc->sc_ah, an);
 363 }
 364
 365 void ath9k_tasklet(unsigned long data)
 366 {
 367         struct ath_softc *sc = (struct ath_softc *)data;
 368         struct ath_hw *ah = sc->sc_ah;
 369         struct ath_common *common = ath9k_hw_common(ah);
 370         enum ath_reset_type type;
 371         unsigned long flags;
 372         u32 status = sc->intrstatus;
 373         u32 rxmask;
 374
 375         ath9k_ps_wakeup(sc);
 376         spin_lock(&sc->sc_pcu_lock);
 377
 378         if (status & ATH9K_INT_FATAL) {
 379                 type = RESET_TYPE_FATAL_INT;
 380                 ath9k_queue_reset(sc, type);
 381
 382                 /*
 383                  * Increment the ref. counter here so that
 384                  * interrupts are enabled in the reset routine.
 385                  */
 386                 atomic_inc(&ah->intr_ref_cnt);
 387                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 388                 goto out;
 389         }
 390
 391         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 392             (status & ATH9K_INT_BB_WATCHDOG)) {
 393                 spin_lock(&common->cc_lock);
 394                 ath_hw_cycle_counters_update(common);
 395                 ar9003_hw_bb_watchdog_dbg_info(ah);
 396                 spin_unlock(&common->cc_lock);
 397
 398                 if (ar9003_hw_bb_watchdog_check(ah)) {
 399                         type = RESET_TYPE_BB_WATCHDOG;
 400                         ath9k_queue_reset(sc, type);
 401
 402                         /*
 403                          * Increment the ref. counter here so that
 404                          * interrupts are enabled in the reset routine.
 405                          */
 406                         atomic_inc(&ah->intr_ref_cnt);
 407                         ath_dbg(common, RESET,
 408                                 "BB_WATCHDOG: Skipping interrupts\n");
 409                         goto out;
 410                 }
 411         }
 412
 413         if (status & ATH9K_INT_GTT) {
 414                 sc->gtt_cnt++;
 415
 416                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 417                         type = RESET_TYPE_TX_GTT;
 418                         ath9k_queue_reset(sc, type);
 419                         atomic_inc(&ah->intr_ref_cnt);
 420                         ath_dbg(common, RESET,
 421                                 "GTT: Skipping interrupts\n");
 422                         goto out;
 423                 }
 424         }
 425
 426         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 427         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 428                 /*
 429                  * TSF sync does not look correct; remain awake to sync with
 430                  * the next Beacon.
 431                  */
 432                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 433                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 434         }
 435         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 436
 437         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 438                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 439                           ATH9K_INT_RXORN);
 440         else
 441                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 442
 443         if (status & rxmask) {
 444                 /* Check for high priority Rx first */
 445                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 446                     (status & ATH9K_INT_RXHP))
 447                         ath_rx_tasklet(sc, 0, true);
 448
 449                 ath_rx_tasklet(sc, 0, false);
 450         }
 451
 452         if (status & ATH9K_INT_TX) {
 453                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 454                         /*
 455                          * For EDMA chips, TX completion is enabled for the
 456                          * beacon queue, so if a beacon has been transmitted
 457                          * successfully after a GTT interrupt, the GTT counter
 458                          * gets reset to zero here.
 459                          */
 460                         sc->gtt_cnt = 0;
 461
 462                         ath_tx_edma_tasklet(sc);
 463                 } else {
 464                         ath_tx_tasklet(sc);
 465                 }
 466
 467                 wake_up(&sc->tx_wait);
 468         }
 469
 470         if (status & ATH9K_INT_GENTIMER)
 471                 ath_gen_timer_isr(sc->sc_ah);
 472
 473         ath9k_btcoex_handle_interrupt(sc, status);
 474
 475         /* re-enable hardware interrupt */
 476         ath9k_hw_enable_interrupts(ah);
 477 out:
 478         spin_unlock(&sc->sc_pcu_lock);
 479         ath9k_ps_restore(sc);
 480 }
 481
 482 irqreturn_t ath_isr(int irq, void *dev)
 483 {
 484 #define SCHED_INTR (                            \
 485                 ATH9K_INT_FATAL |               \
 486                 ATH9K_INT_BB_WATCHDOG |         \
 487                 ATH9K_INT_RXORN |               \
 488                 ATH9K_INT_RXEOL |               \
 489                 ATH9K_INT_RX |                  \
 490                 ATH9K_INT_RXLP |                \
 491                 ATH9K_INT_RXHP |                \
 492                 ATH9K_INT_TX |                  \
 493                 ATH9K_INT_BMISS |               \
 494                 ATH9K_INT_CST |                 \
 495                 ATH9K_INT_GTT |                 \
 496                 ATH9K_INT_TSFOOR |              \
 497                 ATH9K_INT_GENTIMER |            \
 498                 ATH9K_INT_MCI)
 499
 500         struct ath_softc *sc = dev;
 501         struct ath_hw *ah = sc->sc_ah;
 502         struct ath_common *common = ath9k_hw_common(ah);
 503         enum ath9k_int status;
 504         u32 sync_cause = 0;
 505         bool sched = false;
 506
 507         /*
 508          * The hardware is not ready/present, don't
 509          * touch anything. Note this can happen early
 510          * on if the IRQ is shared.
 511          */
 512         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 513                 return IRQ_NONE;
 514
 515         /* shared irq, not for us */
 516
 517         if (!ath9k_hw_intrpend(ah))
 518                 return IRQ_NONE;
 519
 520         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 521                 ath9k_hw_kill_interrupts(ah);
 522                 return IRQ_HANDLED;
 523         }
 524
 525         /*
 526          * Figure out the reason(s) for the interrupt.  Note
 527          * that the hal returns a pseudo-ISR that may include
 528          * bits we haven't explicitly enabled so we mask the
 529          * value to insure we only process bits we requested.
 530          */
 531         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 532         ath9k_debug_sync_cause(sc, sync_cause);
 533         status &= ah->imask;    /* discard unasked-for bits */
 534
 535         /*
 536          * If there are no status bits set, then this interrupt was not
 537          * for me (should have been caught above).
 538          */
 539         if (!status)
 540                 return IRQ_NONE;
 541
 542         /* Cache the status */
 543         sc->intrstatus = status;
 544
 545         if (status & SCHED_INTR)
 546                 sched = true;
 547
 548         /*
 549          * If a FATAL interrupt is received, we have to reset the chip
 550          * immediately.
 551          */
 552         if (status & ATH9K_INT_FATAL)
 553                 goto chip_reset;
 554
 555         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 556             (status & ATH9K_INT_BB_WATCHDOG))
 557                 goto chip_reset;
 558
 559 #ifdef CONFIG_ATH9K_WOW
 560         if (status & ATH9K_INT_BMISS) {
 561                 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
 562                         atomic_inc(&sc->wow_got_bmiss_intr);
 563                         atomic_dec(&sc->wow_sleep_proc_intr);
 564                 }
 565         }
 566 #endif
 567
 568         if (status & ATH9K_INT_SWBA)
 569                 tasklet_schedule(&sc->bcon_tasklet);
 570
 571         if (status & ATH9K_INT_TXURN)
 572                 ath9k_hw_updatetxtriglevel(ah, true);
 573
 574         if (status & ATH9K_INT_RXEOL) {
 575                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 576                 ath9k_hw_set_interrupts(ah);
 577         }
 578
 579         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 580                 if (status & ATH9K_INT_TIM_TIMER) {
 581                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 582                                 goto chip_reset;
 583                         /* Clear RxAbort bit so that we can
 584                          * receive frames */
 585                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 586                         spin_lock(&sc->sc_pm_lock);
 587                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 588                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 589                         spin_unlock(&sc->sc_pm_lock);
 590                 }
 591
 592 chip_reset:
 593
 594         ath_debug_stat_interrupt(sc, status);
 595
 596         if (sched) {
 597                 /* turn off every interrupt */
 598                 ath9k_hw_disable_interrupts(ah);
 599                 tasklet_schedule(&sc->intr_tq);
 600         }
 601
 602         return IRQ_HANDLED;
 603
 604 #undef SCHED_INTR
 605 }
 606
 607 /*
 608  * This function is called when a HW reset cannot be deferred
 609  * and has to be immediate.
 610  */
 611 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 612 {
 613         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 614         int r;
 615
 616         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 617
 618         ath9k_ps_wakeup(sc);
 619         r = ath_reset_internal(sc, hchan);
 620         ath9k_ps_restore(sc);
 621
 622         return r;
 623 }
 624
 625 /*
 626  * When a HW reset can be deferred, it is added to the
 627  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 628  * queueing.
 629  */
 630 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 631 {
 632         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 633 #ifdef CONFIG_ATH9K_DEBUGFS
 634         RESET_STAT_INC(sc, type);
 635 #endif
 636         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 637         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 638 }
 639
 640 void ath_reset_work(struct work_struct *work)
 641 {
 642         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 643
 644         ath9k_ps_wakeup(sc);
 645         ath_reset_internal(sc, NULL);
 646         ath9k_ps_restore(sc);
 647 }
 648
 649 /**********************/
 650 /* mac80211 callbacks */
 651 /**********************/
 652
 653 static int ath9k_start(struct ieee80211_hw *hw)
 654 {
 655         struct ath_softc *sc = hw->priv;
 656         struct ath_hw *ah = sc->sc_ah;
 657         struct ath_common *common = ath9k_hw_common(ah);
 658         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 659         struct ath_chanctx *ctx = sc->cur_chan;
 660         struct ath9k_channel *init_channel;
 661         int r;
 662
 663         ath_dbg(common, CONFIG,
 664                 "Starting driver with initial channel: %d MHz\n",
 665                 curchan->center_freq);
 666
 667         ath9k_ps_wakeup(sc);
 668         mutex_lock(&sc->mutex);
 669
 670         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 671         sc->cur_chandef = hw->conf.chandef;
 672
 673         /* Reset SERDES registers */
 674         ath9k_hw_configpcipowersave(ah, false);
 675
 676         /*
 677          * The basic interface to setting the hardware in a good
 678          * state is ``reset''.  On return the hardware is known to
 679          * be powered up and with interrupts disabled.  This must
 680          * be followed by initialization of the appropriate bits
 681          * and then setup of the interrupt mask.
 682          */
 683         spin_lock_bh(&sc->sc_pcu_lock);
 684
 685         atomic_set(&ah->intr_ref_cnt, -1);
 686
 687         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 688         if (r) {
 689                 ath_err(common,
 690                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 691                         r, curchan->center_freq);
 692                 ah->reset_power_on = false;
 693         }
 694
 695         /* Setup our intr mask. */
 696         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 697                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 698                     ATH9K_INT_GLOBAL;
 699
 700         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 701                 ah->imask |= ATH9K_INT_RXHP |
 702                              ATH9K_INT_RXLP;
 703         else
 704                 ah->imask |= ATH9K_INT_RX;
 705
 706         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 707                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 708
 709         /*
 710          * Enable GTT interrupts only for AR9003/AR9004 chips
 711          * for now.
 712          */
 713         if (AR_SREV_9300_20_OR_LATER(ah))
 714                 ah->imask |= ATH9K_INT_GTT;
 715
 716         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 717                 ah->imask |= ATH9K_INT_CST;
 718
 719         ath_mci_enable(sc);
 720
 721         clear_bit(ATH_OP_INVALID, &common->op_flags);
 722         sc->sc_ah->is_monitoring = false;
 723
 724         if (!ath_complete_reset(sc, false))
 725                 ah->reset_power_on = false;
 726
 727         if (ah->led_pin >= 0) {
 728                 ath9k_hw_cfg_output(ah, ah->led_pin,
 729                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 730                 ath9k_hw_set_gpio(ah, ah->led_pin,
 731                                   (ah->config.led_active_high) ? 1 : 0);
 732         }
 733
 734         /*
 735          * Reset key cache to sane defaults (all entries cleared) instead of
 736          * semi-random values after suspend/resume.
 737          */
 738         ath9k_cmn_init_crypto(sc->sc_ah);
 739
 740         ath9k_hw_reset_tsf(ah);
 741
 742         spin_unlock_bh(&sc->sc_pcu_lock);
 743
 744         mutex_unlock(&sc->mutex);
 745
 746         ath9k_ps_restore(sc);
 747
 748         return 0;
 749 }
 750
 751 static void ath9k_tx(struct ieee80211_hw *hw,
 752                      struct ieee80211_tx_control *control,
 753                      struct sk_buff *skb)
 754 {
 755         struct ath_softc *sc = hw->priv;
 756         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 757         struct ath_tx_control txctl;
 758         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 759         unsigned long flags;
 760
 761         if (sc->ps_enabled) {
 762                 /*
 763                  * mac80211 does not set PM field for normal data frames, so we
 764                  * need to update that based on the current PS mode.
 765                  */
 766                 if (ieee80211_is_data(hdr->frame_control) &&
 767                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 768                     !ieee80211_has_pm(hdr->frame_control)) {
 769                         ath_dbg(common, PS,
 770                                 "Add PM=1 for a TX frame while in PS mode\n");
 771                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 772                 }
 773         }
 774
 775         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 776                 /*
 777                  * We are using PS-Poll and mac80211 can request TX while in
 778                  * power save mode. Need to wake up hardware for the TX to be
 779                  * completed and if needed, also for RX of buffered frames.
 780                  */
 781                 ath9k_ps_wakeup(sc);
 782                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 783                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 784                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 785                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 786                         ath_dbg(common, PS,
 787                                 "Sending PS-Poll to pick a buffered frame\n");
 788                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 789                 } else {
 790                         ath_dbg(common, PS, "Wake up to complete TX\n");
 791                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 792                 }
 793                 /*
 794                  * The actual restore operation will happen only after
 795                  * the ps_flags bit is cleared. We are just dropping
 796                  * the ps_usecount here.
 797                  */
 798                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 799                 ath9k_ps_restore(sc);
 800         }
 801
 802         /*
 803          * Cannot tx while the hardware is in full sleep, it first needs a full
 804          * chip reset to recover from that
 805          */
 806         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 807                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 808                 goto exit;
 809         }
 810
 811         memset(&txctl, 0, sizeof(struct ath_tx_control));
 812         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 813         txctl.sta = control->sta;
 814
 815         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 816
 817         if (ath_tx_start(hw, skb, &txctl) != 0) {
 818                 ath_dbg(common, XMIT, "TX failed\n");
 819                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 820                 goto exit;
 821         }
 822
 823         return;
 824 exit:
 825         ieee80211_free_txskb(hw, skb);
 826 }
 827
 828 static void ath9k_stop(struct ieee80211_hw *hw)
 829 {
 830         struct ath_softc *sc = hw->priv;
 831         struct ath_hw *ah = sc->sc_ah;
 832         struct ath_common *common = ath9k_hw_common(ah);
 833         bool prev_idle;
 834
 835         ath9k_deinit_channel_context(sc);
 836
 837         mutex_lock(&sc->mutex);
 838
 839         ath_cancel_work(sc);
 840
 841         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 842                 ath_dbg(common, ANY, "Device not present\n");
 843                 mutex_unlock(&sc->mutex);
 844                 return;
 845         }
 846
 847         /* Ensure HW is awake when we try to shut it down. */
 848         ath9k_ps_wakeup(sc);
 849
 850         spin_lock_bh(&sc->sc_pcu_lock);
 851
 852         /* prevent tasklets to enable interrupts once we disable them */
 853         ah->imask &= ~ATH9K_INT_GLOBAL;
 854
 855         /* make sure h/w will not generate any interrupt
 856          * before setting the invalid flag. */
 857         ath9k_hw_disable_interrupts(ah);
 858
 859         spin_unlock_bh(&sc->sc_pcu_lock);
 860
 861         /* we can now sync irq and kill any running tasklets, since we already
 862          * disabled interrupts and not holding a spin lock */
 863         synchronize_irq(sc->irq);
 864         tasklet_kill(&sc->intr_tq);
 865         tasklet_kill(&sc->bcon_tasklet);
 866
 867         prev_idle = sc->ps_idle;
 868         sc->ps_idle = true;
 869
 870         spin_lock_bh(&sc->sc_pcu_lock);
 871
 872         if (ah->led_pin >= 0) {
 873                 ath9k_hw_set_gpio(ah, ah->led_pin,
 874                                   (ah->config.led_active_high) ? 0 : 1);
 875                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 876         }
 877
 878         ath_prepare_reset(sc);
 879
 880         if (sc->rx.frag) {
 881                 dev_kfree_skb_any(sc->rx.frag);
 882                 sc->rx.frag = NULL;
 883         }
 884
 885         if (!ah->curchan)
 886                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 887                                                     &sc->cur_chan->chandef);
 888
 889         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 890         ath9k_hw_phy_disable(ah);
 891
 892         ath9k_hw_configpcipowersave(ah, true);
 893
 894         spin_unlock_bh(&sc->sc_pcu_lock);
 895
 896         ath9k_ps_restore(sc);
 897
 898         set_bit(ATH_OP_INVALID, &common->op_flags);
 899         sc->ps_idle = prev_idle;
 900
 901         mutex_unlock(&sc->mutex);
 902
 903         ath_dbg(common, CONFIG, "Driver halt\n");
 904 }
 905
 906 static bool ath9k_uses_beacons(int type)
 907 {
 908         switch (type) {
 909         case NL80211_IFTYPE_AP:
 910         case NL80211_IFTYPE_ADHOC:
 911         case NL80211_IFTYPE_MESH_POINT:
 912                 return true;
 913         default:
 914                 return false;
 915         }
 916 }
 917
 918 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 919                            u8 *mac, struct ieee80211_vif *vif)
 920 {
 921         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 922         int i;
 923
 924         if (iter_data->has_hw_macaddr) {
 925                 for (i = 0; i < ETH_ALEN; i++)
 926                         iter_data->mask[i] &=
 927                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 928         } else {
 929                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 930                 iter_data->has_hw_macaddr = true;
 931         }
 932
 933         if (!vif->bss_conf.use_short_slot)
 934                 iter_data->slottime = ATH9K_SLOT_TIME_20;
 935
 936         switch (vif->type) {
 937         case NL80211_IFTYPE_AP:
 938                 iter_data->naps++;
 939                 break;
 940         case NL80211_IFTYPE_STATION:
 941                 iter_data->nstations++;
 942                 if (avp->assoc && !iter_data->primary_sta)
 943                         iter_data->primary_sta = vif;
 944                 break;
 945         case NL80211_IFTYPE_ADHOC:
 946                 iter_data->nadhocs++;
 947                 if (vif->bss_conf.enable_beacon)
 948                         iter_data->beacons = true;
 949                 break;
 950         case NL80211_IFTYPE_MESH_POINT:
 951                 iter_data->nmeshes++;
 952                 if (vif->bss_conf.enable_beacon)
 953                         iter_data->beacons = true;
 954                 break;
 955         case NL80211_IFTYPE_WDS:
 956                 iter_data->nwds++;
 957                 break;
 958         default:
 959                 break;
 960         }
 961 }
 962
 963 static void ath9k_update_bssid_mask(struct ath_softc *sc,
 964                                     struct ath_chanctx *ctx,
 965                                     struct ath9k_vif_iter_data *iter_data)
 966 {
 967         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 968         struct ath_vif *avp;
 969         int i;
 970
 971         if (!ath9k_is_chanctx_enabled())
 972                 return;
 973
 974         list_for_each_entry(avp, &ctx->vifs, list) {
 975                 if (ctx->nvifs_assigned != 1)
 976                         continue;
 977
 978                 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
 979                         continue;
 980
 981                 ether_addr_copy(common->curbssid, avp->bssid);
 982
 983                 /* perm_addr will be used as the p2p device address. */
 984                 for (i = 0; i < ETH_ALEN; i++)
 985                         iter_data->mask[i] &=
 986                                 ~(iter_data->hw_macaddr[i] ^
 987                                   sc->hw->wiphy->perm_addr[i]);
 988         }
 989 }
 990
 991 /* Called with sc->mutex held. */
 992 void ath9k_calculate_iter_data(struct ath_softc *sc,
 993                                struct ath_chanctx *ctx,
 994                                struct ath9k_vif_iter_data *iter_data)
 995 {
 996         struct ath_vif *avp;
 997
 998         /*
 999          * The hardware will use primary station addr together with the
1000          * BSSID mask when matching addresses.
1001          */
1002         memset(iter_data, 0, sizeof(*iter_data));
1003         memset(&iter_data->mask, 0xff, ETH_ALEN);
1004         iter_data->slottime = ATH9K_SLOT_TIME_9;
1005
1006         list_for_each_entry(avp, &ctx->vifs, list)
1007                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1008
1009         ath9k_update_bssid_mask(sc, ctx, iter_data);
1010 }
1011
1012 static void ath9k_set_assoc_state(struct ath_softc *sc,
1013                                   struct ieee80211_vif *vif, bool changed)
1014 {
1015         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1016         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1017         unsigned long flags;
1018
1019         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1020
1021         ether_addr_copy(common->curbssid, avp->bssid);
1022         common->curaid = avp->aid;
1023         ath9k_hw_write_associd(sc->sc_ah);
1024
1025         if (changed) {
1026                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1027                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1028
1029                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1030                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1031                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1032         }
1033
1034         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1035                 ath9k_mci_update_wlan_channels(sc, false);
1036
1037         ath_dbg(common, CONFIG,
1038                 "Primary Station interface: %pM, BSSID: %pM\n",
1039                 vif->addr, common->curbssid);
1040 }
1041
1042 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1043 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1044 {
1045         struct ath_hw *ah = sc->sc_ah;
1046         struct ath_common *common = ath9k_hw_common(ah);
1047         struct ieee80211_vif *vif = NULL;
1048
1049         ath9k_ps_wakeup(sc);
1050
1051         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1052                 vif = sc->offchannel.scan_vif;
1053         else
1054                 vif = sc->offchannel.roc_vif;
1055
1056         if (WARN_ON(!vif))
1057                 goto exit;
1058
1059         eth_zero_addr(common->curbssid);
1060         eth_broadcast_addr(common->bssidmask);
1061         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1062         common->curaid = 0;
1063         ah->opmode = vif->type;
1064         ah->imask &= ~ATH9K_INT_SWBA;
1065         ah->imask &= ~ATH9K_INT_TSFOOR;
1066         ah->slottime = ATH9K_SLOT_TIME_9;
1067
1068         ath_hw_setbssidmask(common);
1069         ath9k_hw_setopmode(ah);
1070         ath9k_hw_write_associd(sc->sc_ah);
1071         ath9k_hw_set_interrupts(ah);
1072         ath9k_hw_init_global_settings(ah);
1073
1074 exit:
1075         ath9k_ps_restore(sc);
1076 }
1077 #endif
1078
1079 /* Called with sc->mutex held. */
1080 void ath9k_calculate_summary_state(struct ath_softc *sc,
1081                                    struct ath_chanctx *ctx)
1082 {
1083         struct ath_hw *ah = sc->sc_ah;
1084         struct ath_common *common = ath9k_hw_common(ah);
1085         struct ath9k_vif_iter_data iter_data;
1086         struct ath_beacon_config *cur_conf;
1087
1088         ath_chanctx_check_active(sc, ctx);
1089
1090         if (ctx != sc->cur_chan)
1091                 return;
1092
1093 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1094         if (ctx == &sc->offchannel.chan)
1095                 return ath9k_set_offchannel_state(sc);
1096 #endif
1097
1098         ath9k_ps_wakeup(sc);
1099         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1100
1101         if (iter_data.has_hw_macaddr)
1102                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1103
1104         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1105         ath_hw_setbssidmask(common);
1106
1107         if (iter_data.naps > 0) {
1108                 cur_conf = &ctx->beacon;
1109                 ath9k_hw_set_tsfadjust(ah, true);
1110                 ah->opmode = NL80211_IFTYPE_AP;
1111                 if (cur_conf->enable_beacon)
1112                         iter_data.beacons = true;
1113         } else {
1114                 ath9k_hw_set_tsfadjust(ah, false);
1115
1116                 if (iter_data.nmeshes)
1117                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1118                 else if (iter_data.nwds)
1119                         ah->opmode = NL80211_IFTYPE_AP;
1120                 else if (iter_data.nadhocs)
1121                         ah->opmode = NL80211_IFTYPE_ADHOC;
1122                 else
1123                         ah->opmode = NL80211_IFTYPE_STATION;
1124         }
1125
1126         ath9k_hw_setopmode(ah);
1127
1128         ctx->switch_after_beacon = false;
1129         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1130                 ah->imask |= ATH9K_INT_TSFOOR;
1131         else {
1132                 ah->imask &= ~ATH9K_INT_TSFOOR;
1133                 if (iter_data.naps == 1 && iter_data.beacons)
1134                         ctx->switch_after_beacon = true;
1135         }
1136
1137         ah->imask &= ~ATH9K_INT_SWBA;
1138         if (ah->opmode == NL80211_IFTYPE_STATION) {
1139                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1140
1141                 if (iter_data.primary_sta) {
1142                         iter_data.beacons = true;
1143                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1144                                               changed);
1145                         ctx->primary_sta = iter_data.primary_sta;
1146                 } else {
1147                         ctx->primary_sta = NULL;
1148                         memset(common->curbssid, 0, ETH_ALEN);
1149                         common->curaid = 0;
1150                         ath9k_hw_write_associd(sc->sc_ah);
1151                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1152                                 ath9k_mci_update_wlan_channels(sc, true);
1153                 }
1154         } else if (iter_data.beacons) {
1155                 ah->imask |= ATH9K_INT_SWBA;
1156         }
1157         ath9k_hw_set_interrupts(ah);
1158
1159         if (iter_data.beacons)
1160                 set_bit(ATH_OP_BEACONS, &common->op_flags);
1161         else
1162                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1163
1164         if (ah->slottime != iter_data.slottime) {
1165                 ah->slottime = iter_data.slottime;
1166                 ath9k_hw_init_global_settings(ah);
1167         }
1168
1169         if (iter_data.primary_sta)
1170                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1171         else
1172                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1173
1174         ath_dbg(common, CONFIG,
1175                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1176                 common->macaddr, common->curbssid, common->bssidmask);
1177
1178         ath9k_ps_restore(sc);
1179 }
1180
1181 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1182                                    struct ieee80211_vif *vif)
1183 {
1184         int i;
1185
1186         if (!ath9k_is_chanctx_enabled())
1187                 return;
1188
1189         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1190                 vif->hw_queue[i] = i;
1191
1192         if (vif->type == NL80211_IFTYPE_AP ||
1193             vif->type == NL80211_IFTYPE_MESH_POINT)
1194                 vif->cab_queue = hw->queues - 2;
1195         else
1196                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1197 }
1198
1199 static int ath9k_add_interface(struct ieee80211_hw *hw,
1200                                struct ieee80211_vif *vif)
1201 {
1202         struct ath_softc *sc = hw->priv;
1203         struct ath_hw *ah = sc->sc_ah;
1204         struct ath_common *common = ath9k_hw_common(ah);
1205         struct ath_vif *avp = (void *)vif->drv_priv;
1206         struct ath_node *an = &avp->mcast_node;
1207
1208         mutex_lock(&sc->mutex);
1209
1210         if (config_enabled(CONFIG_ATH9K_TX99)) {
1211                 if (sc->cur_chan->nvifs >= 1) {
1212                         mutex_unlock(&sc->mutex);
1213                         return -EOPNOTSUPP;
1214                 }
1215                 sc->tx99_vif = vif;
1216         }
1217
1218         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1219         sc->cur_chan->nvifs++;
1220
1221         if (ath9k_uses_beacons(vif->type))
1222                 ath9k_beacon_assign_slot(sc, vif);
1223
1224         avp->vif = vif;
1225         if (!ath9k_is_chanctx_enabled()) {
1226                 avp->chanctx = sc->cur_chan;
1227                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1228         }
1229
1230         ath9k_calculate_summary_state(sc, avp->chanctx);
1231
1232         ath9k_assign_hw_queues(hw, vif);
1233
1234         an->sc = sc;
1235         an->sta = NULL;
1236         an->vif = vif;
1237         an->no_ps_filter = true;
1238         ath_tx_node_init(sc, an);
1239
1240         mutex_unlock(&sc->mutex);
1241         return 0;
1242 }
1243
1244 static int ath9k_change_interface(struct ieee80211_hw *hw,
1245                                   struct ieee80211_vif *vif,
1246                                   enum nl80211_iftype new_type,
1247                                   bool p2p)
1248 {
1249         struct ath_softc *sc = hw->priv;
1250         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1251         struct ath_vif *avp = (void *)vif->drv_priv;
1252
1253         mutex_lock(&sc->mutex);
1254
1255         if (config_enabled(CONFIG_ATH9K_TX99)) {
1256                 mutex_unlock(&sc->mutex);
1257                 return -EOPNOTSUPP;
1258         }
1259
1260         ath_dbg(common, CONFIG, "Change Interface\n");
1261
1262         if (ath9k_uses_beacons(vif->type))
1263                 ath9k_beacon_remove_slot(sc, vif);
1264
1265         vif->type = new_type;
1266         vif->p2p = p2p;
1267
1268         if (ath9k_uses_beacons(vif->type))
1269                 ath9k_beacon_assign_slot(sc, vif);
1270
1271         ath9k_assign_hw_queues(hw, vif);
1272         ath9k_calculate_summary_state(sc, avp->chanctx);
1273
1274         mutex_unlock(&sc->mutex);
1275         return 0;
1276 }
1277
1278 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1279                                    struct ieee80211_vif *vif)
1280 {
1281         struct ath_softc *sc = hw->priv;
1282         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1283         struct ath_vif *avp = (void *)vif->drv_priv;
1284
1285         ath_dbg(common, CONFIG, "Detach Interface\n");
1286
1287         mutex_lock(&sc->mutex);
1288
1289         ath9k_p2p_remove_vif(sc, vif);
1290
1291         sc->cur_chan->nvifs--;
1292         sc->tx99_vif = NULL;
1293         if (!ath9k_is_chanctx_enabled())
1294                 list_del(&avp->list);
1295
1296         if (ath9k_uses_beacons(vif->type))
1297                 ath9k_beacon_remove_slot(sc, vif);
1298
1299         ath_tx_node_cleanup(sc, &avp->mcast_node);
1300
1301         ath9k_calculate_summary_state(sc, avp->chanctx);
1302
1303         mutex_unlock(&sc->mutex);
1304 }
1305
1306 static void ath9k_enable_ps(struct ath_softc *sc)
1307 {
1308         struct ath_hw *ah = sc->sc_ah;
1309         struct ath_common *common = ath9k_hw_common(ah);
1310
1311         if (config_enabled(CONFIG_ATH9K_TX99))
1312                 return;
1313
1314         sc->ps_enabled = true;
1315         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1316                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1317                         ah->imask |= ATH9K_INT_TIM_TIMER;
1318                         ath9k_hw_set_interrupts(ah);
1319                 }
1320                 ath9k_hw_setrxabort(ah, 1);
1321         }
1322         ath_dbg(common, PS, "PowerSave enabled\n");
1323 }
1324
1325 static void ath9k_disable_ps(struct ath_softc *sc)
1326 {
1327         struct ath_hw *ah = sc->sc_ah;
1328         struct ath_common *common = ath9k_hw_common(ah);
1329
1330         if (config_enabled(CONFIG_ATH9K_TX99))
1331                 return;
1332
1333         sc->ps_enabled = false;
1334         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1335         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1336                 ath9k_hw_setrxabort(ah, 0);
1337                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1338                                   PS_WAIT_FOR_CAB |
1339                                   PS_WAIT_FOR_PSPOLL_DATA |
1340                                   PS_WAIT_FOR_TX_ACK);
1341                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1342                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1343                         ath9k_hw_set_interrupts(ah);
1344                 }
1345         }
1346         ath_dbg(common, PS, "PowerSave disabled\n");
1347 }
1348
1349 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1350 {
1351         struct ath_softc *sc = hw->priv;
1352         struct ath_hw *ah = sc->sc_ah;
1353         struct ath_common *common = ath9k_hw_common(ah);
1354         struct ieee80211_conf *conf = &hw->conf;
1355         struct ath_chanctx *ctx = sc->cur_chan;
1356
1357         ath9k_ps_wakeup(sc);
1358         mutex_lock(&sc->mutex);
1359
1360         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1361                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1362                 if (sc->ps_idle) {
1363                         ath_cancel_work(sc);
1364                         ath9k_stop_btcoex(sc);
1365                 } else {
1366                         ath9k_start_btcoex(sc);
1367                         /*
1368                          * The chip needs a reset to properly wake up from
1369                          * full sleep
1370                          */
1371                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1372                 }
1373         }
1374
1375         /*
1376          * We just prepare to enable PS. We have to wait until our AP has
1377          * ACK'd our null data frame to disable RX otherwise we'll ignore
1378          * those ACKs and end up retransmitting the same null data frames.
1379          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1380          */
1381         if (changed & IEEE80211_CONF_CHANGE_PS) {
1382                 unsigned long flags;
1383                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1384                 if (conf->flags & IEEE80211_CONF_PS)
1385                         ath9k_enable_ps(sc);
1386                 else
1387                         ath9k_disable_ps(sc);
1388                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1389         }
1390
1391         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1392                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1393                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1394                         sc->sc_ah->is_monitoring = true;
1395                 } else {
1396                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1397                         sc->sc_ah->is_monitoring = false;
1398                 }
1399         }
1400
1401         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1402                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1403                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1404         }
1405
1406         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1407                 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1408                 sc->cur_chan->txpower = 2 * conf->power_level;
1409                 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
1410                                        sc->cur_chan->txpower,
1411                                        &sc->cur_chan->cur_txpower);
1412         }
1413
1414         mutex_unlock(&sc->mutex);
1415         ath9k_ps_restore(sc);
1416
1417         return 0;
1418 }
1419
1420 #define SUPPORTED_FILTERS                       \
1421         (FIF_PROMISC_IN_BSS |                   \
1422         FIF_ALLMULTI |                          \
1423         FIF_CONTROL |                           \
1424         FIF_PSPOLL |                            \
1425         FIF_OTHER_BSS |                         \
1426         FIF_BCN_PRBRESP_PROMISC |               \
1427         FIF_PROBE_REQ |                         \
1428         FIF_FCSFAIL)
1429
1430 /* FIXME: sc->sc_full_reset ? */
1431 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1432                                    unsigned int changed_flags,
1433                                    unsigned int *total_flags,
1434                                    u64 multicast)
1435 {
1436         struct ath_softc *sc = hw->priv;
1437         u32 rfilt;
1438
1439         changed_flags &= SUPPORTED_FILTERS;
1440         *total_flags &= SUPPORTED_FILTERS;
1441
1442         spin_lock_bh(&sc->chan_lock);
1443         sc->cur_chan->rxfilter = *total_flags;
1444         spin_unlock_bh(&sc->chan_lock);
1445
1446         ath9k_ps_wakeup(sc);
1447         rfilt = ath_calcrxfilter(sc);
1448         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1449         ath9k_ps_restore(sc);
1450
1451         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1452                 rfilt);
1453 }
1454
1455 static int ath9k_sta_add(struct ieee80211_hw *hw,
1456                          struct ieee80211_vif *vif,
1457                          struct ieee80211_sta *sta)
1458 {
1459         struct ath_softc *sc = hw->priv;
1460         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1461         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1462         struct ieee80211_key_conf ps_key = { };
1463         int key;
1464
1465         ath_node_attach(sc, sta, vif);
1466
1467         if (vif->type != NL80211_IFTYPE_AP &&
1468             vif->type != NL80211_IFTYPE_AP_VLAN)
1469                 return 0;
1470
1471         key = ath_key_config(common, vif, sta, &ps_key);
1472         if (key > 0) {
1473                 an->ps_key = key;
1474                 an->key_idx[0] = key;
1475         }
1476
1477         return 0;
1478 }
1479
1480 static void ath9k_del_ps_key(struct ath_softc *sc,
1481                              struct ieee80211_vif *vif,
1482                              struct ieee80211_sta *sta)
1483 {
1484         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1485         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1486         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1487
1488         if (!an->ps_key)
1489             return;
1490
1491         ath_key_delete(common, &ps_key);
1492         an->ps_key = 0;
1493         an->key_idx[0] = 0;
1494 }
1495
1496 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1497                             struct ieee80211_vif *vif,
1498                             struct ieee80211_sta *sta)
1499 {
1500         struct ath_softc *sc = hw->priv;
1501
1502         ath9k_del_ps_key(sc, vif, sta);
1503         ath_node_detach(sc, sta);
1504
1505         return 0;
1506 }
1507
1508 static int ath9k_sta_state(struct ieee80211_hw *hw,
1509                            struct ieee80211_vif *vif,
1510                            struct ieee80211_sta *sta,
1511                            enum ieee80211_sta_state old_state,
1512                            enum ieee80211_sta_state new_state)
1513 {
1514         struct ath_softc *sc = hw->priv;
1515         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1516         int ret = 0;
1517
1518         if (old_state == IEEE80211_STA_AUTH &&
1519             new_state == IEEE80211_STA_ASSOC) {
1520                 ret = ath9k_sta_add(hw, vif, sta);
1521                 ath_dbg(common, CONFIG,
1522                         "Add station: %pM\n", sta->addr);
1523         } else if (old_state == IEEE80211_STA_ASSOC &&
1524                    new_state == IEEE80211_STA_AUTH) {
1525                 ret = ath9k_sta_remove(hw, vif, sta);
1526                 ath_dbg(common, CONFIG,
1527                         "Remove station: %pM\n", sta->addr);
1528         }
1529
1530         if (ath9k_is_chanctx_enabled()) {
1531                 if (vif->type == NL80211_IFTYPE_STATION) {
1532                         if (old_state == IEEE80211_STA_ASSOC &&
1533                             new_state == IEEE80211_STA_AUTHORIZED)
1534                                 ath_chanctx_event(sc, vif,
1535                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1536                 }
1537         }
1538
1539         return ret;
1540 }
1541
1542 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1543                                     struct ath_node *an,
1544                                     bool set)
1545 {
1546         int i;
1547
1548         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1549                 if (!an->key_idx[i])
1550                         continue;
1551                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1552         }
1553 }
1554
1555 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1556                          struct ieee80211_vif *vif,
1557                          enum sta_notify_cmd cmd,
1558                          struct ieee80211_sta *sta)
1559 {
1560         struct ath_softc *sc = hw->priv;
1561         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1562
1563         switch (cmd) {
1564         case STA_NOTIFY_SLEEP:
1565                 an->sleeping = true;
1566                 ath_tx_aggr_sleep(sta, sc, an);
1567                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1568                 break;
1569         case STA_NOTIFY_AWAKE:
1570                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1571                 an->sleeping = false;
1572                 ath_tx_aggr_wakeup(sc, an);
1573                 break;
1574         }
1575 }
1576
1577 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1578                          struct ieee80211_vif *vif, u16 queue,
1579                          const struct ieee80211_tx_queue_params *params)
1580 {
1581         struct ath_softc *sc = hw->priv;
1582         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1583         struct ath_txq *txq;
1584         struct ath9k_tx_queue_info qi;
1585         int ret = 0;
1586
1587         if (queue >= IEEE80211_NUM_ACS)
1588                 return 0;
1589
1590         txq = sc->tx.txq_map[queue];
1591
1592         ath9k_ps_wakeup(sc);
1593         mutex_lock(&sc->mutex);
1594
1595         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1596
1597         qi.tqi_aifs = params->aifs;
1598         qi.tqi_cwmin = params->cw_min;
1599         qi.tqi_cwmax = params->cw_max;
1600         qi.tqi_burstTime = params->txop * 32;
1601
1602         ath_dbg(common, CONFIG,
1603                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1604                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1605                 params->cw_max, params->txop);
1606
1607         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1608         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1609         if (ret)
1610                 ath_err(common, "TXQ Update failed\n");
1611
1612         mutex_unlock(&sc->mutex);
1613         ath9k_ps_restore(sc);
1614
1615         return ret;
1616 }
1617
1618 static int ath9k_set_key(struct ieee80211_hw *hw,
1619                          enum set_key_cmd cmd,
1620                          struct ieee80211_vif *vif,
1621                          struct ieee80211_sta *sta,
1622                          struct ieee80211_key_conf *key)
1623 {
1624         struct ath_softc *sc = hw->priv;
1625         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1626         struct ath_node *an = NULL;
1627         int ret = 0, i;
1628
1629         if (ath9k_modparam_nohwcrypt)
1630                 return -ENOSPC;
1631
1632         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1633              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1634             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1635              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1636             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1637                 /*
1638                  * For now, disable hw crypto for the RSN IBSS group keys. This
1639                  * could be optimized in the future to use a modified key cache
1640                  * design to support per-STA RX GTK, but until that gets
1641                  * implemented, use of software crypto for group addressed
1642                  * frames is a acceptable to allow RSN IBSS to be used.
1643                  */
1644                 return -EOPNOTSUPP;
1645         }
1646
1647         mutex_lock(&sc->mutex);
1648         ath9k_ps_wakeup(sc);
1649         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1650         if (sta)
1651                 an = (struct ath_node *)sta->drv_priv;
1652
1653         switch (cmd) {
1654         case SET_KEY:
1655                 if (sta)
1656                         ath9k_del_ps_key(sc, vif, sta);
1657
1658                 key->hw_key_idx = 0;
1659                 ret = ath_key_config(common, vif, sta, key);
1660                 if (ret >= 0) {
1661                         key->hw_key_idx = ret;
1662                         /* push IV and Michael MIC generation to stack */
1663                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1664                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1665                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1666                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1667                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1668                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1669                         ret = 0;
1670                 }
1671                 if (an && key->hw_key_idx) {
1672                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1673                                 if (an->key_idx[i])
1674                                         continue;
1675                                 an->key_idx[i] = key->hw_key_idx;
1676                                 break;
1677                         }
1678                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1679                 }
1680                 break;
1681         case DISABLE_KEY:
1682                 ath_key_delete(common, key);
1683                 if (an) {
1684                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1685                                 if (an->key_idx[i] != key->hw_key_idx)
1686                                         continue;
1687                                 an->key_idx[i] = 0;
1688                                 break;
1689                         }
1690                 }
1691                 key->hw_key_idx = 0;
1692                 break;
1693         default:
1694                 ret = -EINVAL;
1695         }
1696
1697         ath9k_ps_restore(sc);
1698         mutex_unlock(&sc->mutex);
1699
1700         return ret;
1701 }
1702
1703 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1704                                    struct ieee80211_vif *vif,
1705                                    struct ieee80211_bss_conf *bss_conf,
1706                                    u32 changed)
1707 {
1708 #define CHECK_ANI                               \
1709         (BSS_CHANGED_ASSOC |                    \
1710          BSS_CHANGED_IBSS |                     \
1711          BSS_CHANGED_BEACON_ENABLED)
1712
1713         struct ath_softc *sc = hw->priv;
1714         struct ath_hw *ah = sc->sc_ah;
1715         struct ath_common *common = ath9k_hw_common(ah);
1716         struct ath_vif *avp = (void *)vif->drv_priv;
1717         int slottime;
1718
1719         ath9k_ps_wakeup(sc);
1720         mutex_lock(&sc->mutex);
1721
1722         if (changed & BSS_CHANGED_ASSOC) {
1723                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1724                         bss_conf->bssid, bss_conf->assoc);
1725
1726                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1727                 avp->aid = bss_conf->aid;
1728                 avp->assoc = bss_conf->assoc;
1729
1730                 ath9k_calculate_summary_state(sc, avp->chanctx);
1731         }
1732
1733         if (changed & BSS_CHANGED_IBSS) {
1734                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1735                 common->curaid = bss_conf->aid;
1736                 ath9k_hw_write_associd(sc->sc_ah);
1737         }
1738
1739         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1740             (changed & BSS_CHANGED_BEACON_INT) ||
1741             (changed & BSS_CHANGED_BEACON_INFO)) {
1742                 ath9k_beacon_config(sc, vif, changed);
1743                 if (changed & BSS_CHANGED_BEACON_ENABLED)
1744                         ath9k_calculate_summary_state(sc, avp->chanctx);
1745         }
1746
1747         if ((avp->chanctx == sc->cur_chan) &&
1748             (changed & BSS_CHANGED_ERP_SLOT)) {
1749                 if (bss_conf->use_short_slot)
1750                         slottime = 9;
1751                 else
1752                         slottime = 20;
1753                 if (vif->type == NL80211_IFTYPE_AP) {
1754                         /*
1755                          * Defer update, so that connected stations can adjust
1756                          * their settings at the same time.
1757                          * See beacon.c for more details
1758                          */
1759                         sc->beacon.slottime = slottime;
1760                         sc->beacon.updateslot = UPDATE;
1761                 } else {
1762                         ah->slottime = slottime;
1763                         ath9k_hw_init_global_settings(ah);
1764                 }
1765         }
1766
1767         if (changed & BSS_CHANGED_P2P_PS)
1768                 ath9k_p2p_bss_info_changed(sc, vif);
1769
1770         if (changed & CHECK_ANI)
1771                 ath_check_ani(sc);
1772
1773         mutex_unlock(&sc->mutex);
1774         ath9k_ps_restore(sc);
1775
1776 #undef CHECK_ANI
1777 }
1778
1779 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1780 {
1781         struct ath_softc *sc = hw->priv;
1782         u64 tsf;
1783
1784         mutex_lock(&sc->mutex);
1785         ath9k_ps_wakeup(sc);
1786         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1787         ath9k_ps_restore(sc);
1788         mutex_unlock(&sc->mutex);
1789
1790         return tsf;
1791 }
1792
1793 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1794                           struct ieee80211_vif *vif,
1795                           u64 tsf)
1796 {
1797         struct ath_softc *sc = hw->priv;
1798
1799         mutex_lock(&sc->mutex);
1800         ath9k_ps_wakeup(sc);
1801         ath9k_hw_settsf64(sc->sc_ah, tsf);
1802         ath9k_ps_restore(sc);
1803         mutex_unlock(&sc->mutex);
1804 }
1805
1806 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1807 {
1808         struct ath_softc *sc = hw->priv;
1809
1810         mutex_lock(&sc->mutex);
1811
1812         ath9k_ps_wakeup(sc);
1813         ath9k_hw_reset_tsf(sc->sc_ah);
1814         ath9k_ps_restore(sc);
1815
1816         mutex_unlock(&sc->mutex);
1817 }
1818
1819 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1820                               struct ieee80211_vif *vif,
1821                               enum ieee80211_ampdu_mlme_action action,
1822                               struct ieee80211_sta *sta,
1823                               u16 tid, u16 *ssn, u8 buf_size)
1824 {
1825         struct ath_softc *sc = hw->priv;
1826         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1827         bool flush = false;
1828         int ret = 0;
1829
1830         mutex_lock(&sc->mutex);
1831
1832         switch (action) {
1833         case IEEE80211_AMPDU_RX_START:
1834                 break;
1835         case IEEE80211_AMPDU_RX_STOP:
1836                 break;
1837         case IEEE80211_AMPDU_TX_START:
1838                 if (ath9k_is_chanctx_enabled()) {
1839                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1840                                 ret = -EBUSY;
1841                                 break;
1842                         }
1843                 }
1844                 ath9k_ps_wakeup(sc);
1845                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1846                 if (!ret)
1847                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1848                 ath9k_ps_restore(sc);
1849                 break;
1850         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1851         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1852                 flush = true;
1853         case IEEE80211_AMPDU_TX_STOP_CONT:
1854                 ath9k_ps_wakeup(sc);
1855                 ath_tx_aggr_stop(sc, sta, tid);
1856                 if (!flush)
1857                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1858                 ath9k_ps_restore(sc);
1859                 break;
1860         case IEEE80211_AMPDU_TX_OPERATIONAL:
1861                 ath9k_ps_wakeup(sc);
1862                 ath_tx_aggr_resume(sc, sta, tid);
1863                 ath9k_ps_restore(sc);
1864                 break;
1865         default:
1866                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1867         }
1868
1869         mutex_unlock(&sc->mutex);
1870
1871         return ret;
1872 }
1873
1874 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1875                              struct survey_info *survey)
1876 {
1877         struct ath_softc *sc = hw->priv;
1878         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1879         struct ieee80211_supported_band *sband;
1880         struct ieee80211_channel *chan;
1881         int pos;
1882
1883         if (config_enabled(CONFIG_ATH9K_TX99))
1884                 return -EOPNOTSUPP;
1885
1886         spin_lock_bh(&common->cc_lock);
1887         if (idx == 0)
1888                 ath_update_survey_stats(sc);
1889
1890         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1891         if (sband && idx >= sband->n_channels) {
1892                 idx -= sband->n_channels;
1893                 sband = NULL;
1894         }
1895
1896         if (!sband)
1897                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1898
1899         if (!sband || idx >= sband->n_channels) {
1900                 spin_unlock_bh(&common->cc_lock);
1901                 return -ENOENT;
1902         }
1903
1904         chan = &sband->channels[idx];
1905         pos = chan->hw_value;
1906         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1907         survey->channel = chan;
1908         spin_unlock_bh(&common->cc_lock);
1909
1910         return 0;
1911 }
1912
1913 static void ath9k_enable_dynack(struct ath_softc *sc)
1914 {
1915 #ifdef CONFIG_ATH9K_DYNACK
1916         u32 rfilt;
1917         struct ath_hw *ah = sc->sc_ah;
1918
1919         ath_dynack_reset(ah);
1920
1921         ah->dynack.enabled = true;
1922         rfilt = ath_calcrxfilter(sc);
1923         ath9k_hw_setrxfilter(ah, rfilt);
1924 #endif
1925 }
1926
1927 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1928                                      s16 coverage_class)
1929 {
1930         struct ath_softc *sc = hw->priv;
1931         struct ath_hw *ah = sc->sc_ah;
1932
1933         if (config_enabled(CONFIG_ATH9K_TX99))
1934                 return;
1935
1936         mutex_lock(&sc->mutex);
1937
1938         if (coverage_class >= 0) {
1939                 ah->coverage_class = coverage_class;
1940                 if (ah->dynack.enabled) {
1941                         u32 rfilt;
1942
1943                         ah->dynack.enabled = false;
1944                         rfilt = ath_calcrxfilter(sc);
1945                         ath9k_hw_setrxfilter(ah, rfilt);
1946                 }
1947                 ath9k_ps_wakeup(sc);
1948                 ath9k_hw_init_global_settings(ah);
1949                 ath9k_ps_restore(sc);
1950         } else if (!ah->dynack.enabled) {
1951                 ath9k_enable_dynack(sc);
1952         }
1953
1954         mutex_unlock(&sc->mutex);
1955 }
1956
1957 static bool ath9k_has_tx_pending(struct ath_softc *sc,
1958                                  bool sw_pending)
1959 {
1960         int i, npend = 0;
1961
1962         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1963                 if (!ATH_TXQ_SETUP(sc, i))
1964                         continue;
1965
1966                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
1967                                                  sw_pending);
1968                 if (npend)
1969                         break;
1970         }
1971
1972         return !!npend;
1973 }
1974
1975 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1976                         u32 queues, bool drop)
1977 {
1978         struct ath_softc *sc = hw->priv;
1979         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1980
1981         if (ath9k_is_chanctx_enabled()) {
1982                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
1983                         goto flush;
1984
1985                 /*
1986                  * If MCC is active, extend the flush timeout
1987                  * and wait for the HW/SW queues to become
1988                  * empty. This needs to be done outside the
1989                  * sc->mutex lock to allow the channel scheduler
1990                  * to switch channel contexts.
1991                  *
1992                  * The vif queues have been stopped in mac80211,
1993                  * so there won't be any incoming frames.
1994                  */
1995                 __ath9k_flush(hw, queues, drop, true, true);
1996                 return;
1997         }
1998 flush:
1999         mutex_lock(&sc->mutex);
2000         __ath9k_flush(hw, queues, drop, true, false);
2001         mutex_unlock(&sc->mutex);
2002 }
2003
2004 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2005                    bool sw_pending, bool timeout_override)
2006 {
2007         struct ath_softc *sc = hw->priv;
2008         struct ath_hw *ah = sc->sc_ah;
2009         struct ath_common *common = ath9k_hw_common(ah);
2010         int timeout;
2011         bool drain_txq;
2012
2013         cancel_delayed_work_sync(&sc->tx_complete_work);
2014
2015         if (ah->ah_flags & AH_UNPLUGGED) {
2016                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2017                 return;
2018         }
2019
2020         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2021                 ath_dbg(common, ANY, "Device not present\n");
2022                 return;
2023         }
2024
2025         spin_lock_bh(&sc->chan_lock);
2026         if (timeout_override)
2027                 timeout = HZ / 5;
2028         else
2029                 timeout = sc->cur_chan->flush_timeout;
2030         spin_unlock_bh(&sc->chan_lock);
2031
2032         ath_dbg(common, CHAN_CTX,
2033                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2034
2035         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2036                                timeout) > 0)
2037                 drop = false;
2038
2039         if (drop) {
2040                 ath9k_ps_wakeup(sc);
2041                 spin_lock_bh(&sc->sc_pcu_lock);
2042                 drain_txq = ath_drain_all_txq(sc);
2043                 spin_unlock_bh(&sc->sc_pcu_lock);
2044
2045                 if (!drain_txq)
2046                         ath_reset(sc, NULL);
2047
2048                 ath9k_ps_restore(sc);
2049         }
2050
2051         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2052 }
2053
2054 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2055 {
2056         struct ath_softc *sc = hw->priv;
2057
2058         return ath9k_has_tx_pending(sc, true);
2059 }
2060
2061 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2062 {
2063         struct ath_softc *sc = hw->priv;
2064         struct ath_hw *ah = sc->sc_ah;
2065         struct ieee80211_vif *vif;
2066         struct ath_vif *avp;
2067         struct ath_buf *bf;
2068         struct ath_tx_status ts;
2069         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2070         int status;
2071
2072         vif = sc->beacon.bslot[0];
2073         if (!vif)
2074                 return 0;
2075
2076         if (!vif->bss_conf.enable_beacon)
2077                 return 0;
2078
2079         avp = (void *)vif->drv_priv;
2080
2081         if (!sc->beacon.tx_processed && !edma) {
2082                 tasklet_disable(&sc->bcon_tasklet);
2083
2084                 bf = avp->av_bcbuf;
2085                 if (!bf || !bf->bf_mpdu)
2086                         goto skip;
2087
2088                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2089                 if (status == -EINPROGRESS)
2090                         goto skip;
2091
2092                 sc->beacon.tx_processed = true;
2093                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2094
2095 skip:
2096                 tasklet_enable(&sc->bcon_tasklet);
2097         }
2098
2099         return sc->beacon.tx_last;
2100 }
2101
2102 static int ath9k_get_stats(struct ieee80211_hw *hw,
2103                            struct ieee80211_low_level_stats *stats)
2104 {
2105         struct ath_softc *sc = hw->priv;
2106         struct ath_hw *ah = sc->sc_ah;
2107         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2108
2109         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2110         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2111         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2112         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2113         return 0;
2114 }
2115
2116 static u32 fill_chainmask(u32 cap, u32 new)
2117 {
2118         u32 filled = 0;
2119         int i;
2120
2121         for (i = 0; cap && new; i++, cap >>= 1) {
2122                 if (!(cap & BIT(0)))
2123                         continue;
2124
2125                 if (new & BIT(0))
2126                         filled |= BIT(i);
2127
2128                 new >>= 1;
2129         }
2130
2131         return filled;
2132 }
2133
2134 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2135 {
2136         if (AR_SREV_9300_20_OR_LATER(ah))
2137                 return true;
2138
2139         switch (val & 0x7) {
2140         case 0x1:
2141         case 0x3:
2142         case 0x7:
2143                 return true;
2144         case 0x2:
2145                 return (ah->caps.rx_chainmask == 1);
2146         default:
2147                 return false;
2148         }
2149 }
2150
2151 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2152 {
2153         struct ath_softc *sc = hw->priv;
2154         struct ath_hw *ah = sc->sc_ah;
2155
2156         if (ah->caps.rx_chainmask != 1)
2157                 rx_ant |= tx_ant;
2158
2159         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2160                 return -EINVAL;
2161
2162         sc->ant_rx = rx_ant;
2163         sc->ant_tx = tx_ant;
2164
2165         if (ah->caps.rx_chainmask == 1)
2166                 return 0;
2167
2168         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2169         if (AR_SREV_9100(ah))
2170                 ah->rxchainmask = 0x7;
2171         else
2172                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2173
2174         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2175         ath9k_cmn_reload_chainmask(ah);
2176
2177         return 0;
2178 }
2179
2180 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2181 {
2182         struct ath_softc *sc = hw->priv;
2183
2184         *tx_ant = sc->ant_tx;
2185         *rx_ant = sc->ant_rx;
2186         return 0;
2187 }
2188
2189 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2190                                 struct ieee80211_vif *vif,
2191                                 const u8 *mac_addr)
2192 {
2193         struct ath_softc *sc = hw->priv;
2194         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2195         set_bit(ATH_OP_SCANNING, &common->op_flags);
2196 }
2197
2198 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2199                                    struct ieee80211_vif *vif)
2200 {
2201         struct ath_softc *sc = hw->priv;
2202         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2203         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2204 }
2205
2206 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2207
2208 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2209 {
2210         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2211
2212         if (sc->offchannel.roc_vif) {
2213                 ath_dbg(common, CHAN_CTX,
2214                         "%s: Aborting RoC\n", __func__);
2215
2216                 del_timer_sync(&sc->offchannel.timer);
2217                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2218                         ath_roc_complete(sc, true);
2219         }
2220
2221         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2222                 ath_dbg(common, CHAN_CTX,
2223                         "%s: Aborting HW scan\n", __func__);
2224
2225                 del_timer_sync(&sc->offchannel.timer);
2226                 ath_scan_complete(sc, true);
2227         }
2228 }
2229
2230 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2231                          struct ieee80211_scan_request *hw_req)
2232 {
2233         struct cfg80211_scan_request *req = &hw_req->req;
2234         struct ath_softc *sc = hw->priv;
2235         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2236         int ret = 0;
2237
2238         mutex_lock(&sc->mutex);
2239
2240         if (WARN_ON(sc->offchannel.scan_req)) {
2241                 ret = -EBUSY;
2242                 goto out;
2243         }
2244
2245         ath9k_ps_wakeup(sc);
2246         set_bit(ATH_OP_SCANNING, &common->op_flags);
2247         sc->offchannel.scan_vif = vif;
2248         sc->offchannel.scan_req = req;
2249         sc->offchannel.scan_idx = 0;
2250
2251         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2252                 vif->addr);
2253
2254         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2255                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2256                 ath_offchannel_next(sc);
2257         }
2258
2259 out:
2260         mutex_unlock(&sc->mutex);
2261
2262         return ret;
2263 }
2264
2265 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2266                                  struct ieee80211_vif *vif)
2267 {
2268         struct ath_softc *sc = hw->priv;
2269         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2270
2271         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2272
2273         mutex_lock(&sc->mutex);
2274         del_timer_sync(&sc->offchannel.timer);
2275         ath_scan_complete(sc, true);
2276         mutex_unlock(&sc->mutex);
2277 }
2278
2279 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2280                                    struct ieee80211_vif *vif,
2281                                    struct ieee80211_channel *chan, int duration,
2282                                    enum ieee80211_roc_type type)
2283 {
2284         struct ath_softc *sc = hw->priv;
2285         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2286         int ret = 0;
2287
2288         mutex_lock(&sc->mutex);
2289
2290         if (WARN_ON(sc->offchannel.roc_vif)) {
2291                 ret = -EBUSY;
2292                 goto out;
2293         }
2294
2295         ath9k_ps_wakeup(sc);
2296         sc->offchannel.roc_vif = vif;
2297         sc->offchannel.roc_chan = chan;
2298         sc->offchannel.roc_duration = duration;
2299
2300         ath_dbg(common, CHAN_CTX,
2301                 "RoC request on vif: %pM, type: %d duration: %d\n",
2302                 vif->addr, type, duration);
2303
2304         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2305                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2306                 ath_offchannel_next(sc);
2307         }
2308
2309 out:
2310         mutex_unlock(&sc->mutex);
2311
2312         return ret;
2313 }
2314
2315 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2316 {
2317         struct ath_softc *sc = hw->priv;
2318         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2319
2320         mutex_lock(&sc->mutex);
2321
2322         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2323         del_timer_sync(&sc->offchannel.timer);
2324
2325         if (sc->offchannel.roc_vif) {
2326                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2327                         ath_roc_complete(sc, true);
2328         }
2329
2330         mutex_unlock(&sc->mutex);
2331
2332         return 0;
2333 }
2334
2335 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2336                              struct ieee80211_chanctx_conf *conf)
2337 {
2338         struct ath_softc *sc = hw->priv;
2339         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2340         struct ath_chanctx *ctx, **ptr;
2341         int pos;
2342
2343         mutex_lock(&sc->mutex);
2344
2345         ath_for_each_chanctx(sc, ctx) {
2346                 if (ctx->assigned)
2347                         continue;
2348
2349                 ptr = (void *) conf->drv_priv;
2350                 *ptr = ctx;
2351                 ctx->assigned = true;
2352                 pos = ctx - &sc->chanctx[0];
2353                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2354
2355                 ath_dbg(common, CHAN_CTX,
2356                         "Add channel context: %d MHz\n",
2357                         conf->def.chan->center_freq);
2358
2359                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2360
2361                 mutex_unlock(&sc->mutex);
2362                 return 0;
2363         }
2364
2365         mutex_unlock(&sc->mutex);
2366         return -ENOSPC;
2367 }
2368
2369
2370 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2371                                  struct ieee80211_chanctx_conf *conf)
2372 {
2373         struct ath_softc *sc = hw->priv;
2374         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2375         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2376
2377         mutex_lock(&sc->mutex);
2378
2379         ath_dbg(common, CHAN_CTX,
2380                 "Remove channel context: %d MHz\n",
2381                 conf->def.chan->center_freq);
2382
2383         ctx->assigned = false;
2384         ctx->hw_queue_base = 0;
2385         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2386
2387         mutex_unlock(&sc->mutex);
2388 }
2389
2390 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2391                                  struct ieee80211_chanctx_conf *conf,
2392                                  u32 changed)
2393 {
2394         struct ath_softc *sc = hw->priv;
2395         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2396         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2397
2398         mutex_lock(&sc->mutex);
2399         ath_dbg(common, CHAN_CTX,
2400                 "Change channel context: %d MHz\n",
2401                 conf->def.chan->center_freq);
2402         ath_chanctx_set_channel(sc, ctx, &conf->def);
2403         mutex_unlock(&sc->mutex);
2404 }
2405
2406 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2407                                     struct ieee80211_vif *vif,
2408                                     struct ieee80211_chanctx_conf *conf)
2409 {
2410         struct ath_softc *sc = hw->priv;
2411         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2412         struct ath_vif *avp = (void *)vif->drv_priv;
2413         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2414         int i;
2415
2416         ath9k_cancel_pending_offchannel(sc);
2417
2418         mutex_lock(&sc->mutex);
2419
2420         ath_dbg(common, CHAN_CTX,
2421                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2422                 vif->addr, vif->type, vif->p2p,
2423                 conf->def.chan->center_freq);
2424
2425         avp->chanctx = ctx;
2426         ctx->nvifs_assigned++;
2427         list_add_tail(&avp->list, &ctx->vifs);
2428         ath9k_calculate_summary_state(sc, ctx);
2429         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2430                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2431
2432         mutex_unlock(&sc->mutex);
2433
2434         return 0;
2435 }
2436
2437 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2438                                        struct ieee80211_vif *vif,
2439                                        struct ieee80211_chanctx_conf *conf)
2440 {
2441         struct ath_softc *sc = hw->priv;
2442         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2443         struct ath_vif *avp = (void *)vif->drv_priv;
2444         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2445         int ac;
2446
2447         ath9k_cancel_pending_offchannel(sc);
2448
2449         mutex_lock(&sc->mutex);
2450
2451         ath_dbg(common, CHAN_CTX,
2452                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2453                 vif->addr, vif->type, vif->p2p,
2454                 conf->def.chan->center_freq);
2455
2456         avp->chanctx = NULL;
2457         ctx->nvifs_assigned--;
2458         list_del(&avp->list);
2459         ath9k_calculate_summary_state(sc, ctx);
2460         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2461                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2462
2463         mutex_unlock(&sc->mutex);
2464 }
2465
2466 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2467                                  struct ieee80211_vif *vif)
2468 {
2469         struct ath_softc *sc = hw->priv;
2470         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2471         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2472         struct ath_beacon_config *cur_conf;
2473         struct ath_chanctx *go_ctx;
2474         unsigned long timeout;
2475         bool changed = false;
2476         u32 beacon_int;
2477
2478         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2479                 return;
2480
2481         if (!avp->chanctx)
2482                 return;
2483
2484         mutex_lock(&sc->mutex);
2485
2486         spin_lock_bh(&sc->chan_lock);
2487         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2488                 changed = true;
2489         spin_unlock_bh(&sc->chan_lock);
2490
2491         if (!changed)
2492                 goto out;
2493
2494         ath9k_cancel_pending_offchannel(sc);
2495
2496         go_ctx = ath_is_go_chanctx_present(sc);
2497
2498         if (go_ctx) {
2499                 /*
2500                  * Wait till the GO interface gets a chance
2501                  * to send out an NoA.
2502                  */
2503                 spin_lock_bh(&sc->chan_lock);
2504                 sc->sched.mgd_prepare_tx = true;
2505                 cur_conf = &go_ctx->beacon;
2506                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2507                 spin_unlock_bh(&sc->chan_lock);
2508
2509                 timeout = usecs_to_jiffies(beacon_int * 2);
2510                 init_completion(&sc->go_beacon);
2511
2512                 mutex_unlock(&sc->mutex);
2513
2514                 if (wait_for_completion_timeout(&sc->go_beacon,
2515                                                 timeout) == 0) {
2516                         ath_dbg(common, CHAN_CTX,
2517                                 "Failed to send new NoA\n");
2518
2519                         spin_lock_bh(&sc->chan_lock);
2520                         sc->sched.mgd_prepare_tx = false;
2521                         spin_unlock_bh(&sc->chan_lock);
2522                 }
2523
2524                 mutex_lock(&sc->mutex);
2525         }
2526
2527         ath_dbg(common, CHAN_CTX,
2528                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2529                 __func__, vif->addr);
2530
2531         spin_lock_bh(&sc->chan_lock);
2532         sc->next_chan = avp->chanctx;
2533         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2534         spin_unlock_bh(&sc->chan_lock);
2535
2536         ath_chanctx_set_next(sc, true);
2537 out:
2538         mutex_unlock(&sc->mutex);
2539 }
2540
2541 void ath9k_fill_chanctx_ops(void)
2542 {
2543         if (!ath9k_is_chanctx_enabled())
2544                 return;
2545
2546         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2547         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2548         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2549         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2550         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2551         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2552         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2553         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2554         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2555         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2556 }
2557
2558 #endif
2559
2560 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2561                              int *dbm)
2562 {
2563         struct ath_softc *sc = hw->priv;
2564         struct ath_vif *avp = (void *)vif->drv_priv;
2565
2566         mutex_lock(&sc->mutex);
2567         if (avp->chanctx)
2568                 *dbm = avp->chanctx->cur_txpower;
2569         else
2570                 *dbm = sc->cur_chan->cur_txpower;
2571         mutex_unlock(&sc->mutex);
2572
2573         *dbm /= 2;
2574
2575         return 0;
2576 }
2577
2578 struct ieee80211_ops ath9k_ops = {
2579         .tx                 = ath9k_tx,
2580         .start              = ath9k_start,
2581         .stop               = ath9k_stop,
2582         .add_interface      = ath9k_add_interface,
2583         .change_interface   = ath9k_change_interface,
2584         .remove_interface   = ath9k_remove_interface,
2585         .config             = ath9k_config,
2586         .configure_filter   = ath9k_configure_filter,
2587         .sta_state          = ath9k_sta_state,
2588         .sta_notify         = ath9k_sta_notify,
2589         .conf_tx            = ath9k_conf_tx,
2590         .bss_info_changed   = ath9k_bss_info_changed,
2591         .set_key            = ath9k_set_key,
2592         .get_tsf            = ath9k_get_tsf,
2593         .set_tsf            = ath9k_set_tsf,
2594         .reset_tsf          = ath9k_reset_tsf,
2595         .ampdu_action       = ath9k_ampdu_action,
2596         .get_survey         = ath9k_get_survey,
2597         .rfkill_poll        = ath9k_rfkill_poll_state,
2598         .set_coverage_class = ath9k_set_coverage_class,
2599         .flush              = ath9k_flush,
2600         .tx_frames_pending  = ath9k_tx_frames_pending,
2601         .tx_last_beacon     = ath9k_tx_last_beacon,
2602         .release_buffered_frames = ath9k_release_buffered_frames,
2603         .get_stats          = ath9k_get_stats,
2604         .set_antenna        = ath9k_set_antenna,
2605         .get_antenna        = ath9k_get_antenna,
2606
2607 #ifdef CONFIG_ATH9K_WOW
2608         .suspend            = ath9k_suspend,
2609         .resume             = ath9k_resume,
2610         .set_wakeup         = ath9k_set_wakeup,
2611 #endif
2612
2613 #ifdef CONFIG_ATH9K_DEBUGFS
2614         .get_et_sset_count  = ath9k_get_et_sset_count,
2615         .get_et_stats       = ath9k_get_et_stats,
2616         .get_et_strings     = ath9k_get_et_strings,
2617 #endif
2618
2619 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2620         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2621 #endif
2622         .sw_scan_start      = ath9k_sw_scan_start,
2623         .sw_scan_complete   = ath9k_sw_scan_complete,
2624         .get_txpower        = ath9k_get_txpower,
2625 };