drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct list_head *list;
  74
  75                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(list))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->tx_complete_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207         ath_start_ani(sc);
 208 }
 209
 210 static bool ath_prepare_reset(struct ath_softc *sc)
 211 {
 212         struct ath_hw *ah = sc->sc_ah;
 213         bool ret = true;
 214
 215         ieee80211_stop_queues(sc->hw);
 216         ath_stop_ani(sc);
 217         ath9k_hw_disable_interrupts(ah);
 218
 219         if (!ath_drain_all_txq(sc))
 220                 ret = false;
 221
 222         if (!ath_stoprecv(sc))
 223                 ret = false;
 224
 225         return ret;
 226 }
 227
 228 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 229 {
 230         struct ath_hw *ah = sc->sc_ah;
 231         struct ath_common *common = ath9k_hw_common(ah);
 232         unsigned long flags;
 233
 234         ath9k_calculate_summary_state(sc, sc->cur_chan);
 235         ath_startrecv(sc);
 236         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 237                                sc->cur_chan->txpower, &sc->curtxpow);
 238         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 239
 240         if (!sc->cur_chan->offchannel && start) {
 241                 /* restore per chanctx TSF timer */
 242                 if (sc->cur_chan->tsf_val) {
 243                         u32 offset;
 244
 245                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 246                                                          NULL);
 247                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 248                 }
 249
 250
 251                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 252                         goto work;
 253
 254                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 255                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 256                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 257                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 258                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 259                 } else {
 260                         ath9k_set_beacon(sc);
 261                 }
 262         work:
 263                 ath_restart_work(sc);
 264                 ath_txq_schedule_all(sc);
 265         }
 266
 267         sc->gtt_cnt = 0;
 268
 269         ath9k_hw_set_interrupts(ah);
 270         ath9k_hw_enable_interrupts(ah);
 271         ieee80211_wake_queues(sc->hw);
 272         ath9k_p2p_ps_timer(sc);
 273
 274         return true;
 275 }
 276
 277 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 278 {
 279         struct ath_hw *ah = sc->sc_ah;
 280         struct ath_common *common = ath9k_hw_common(ah);
 281         struct ath9k_hw_cal_data *caldata = NULL;
 282         bool fastcc = true;
 283         int r;
 284
 285         __ath_cancel_work(sc);
 286
 287         tasklet_disable(&sc->intr_tq);
 288         tasklet_disable(&sc->bcon_tasklet);
 289         spin_lock_bh(&sc->sc_pcu_lock);
 290
 291         if (!sc->cur_chan->offchannel) {
 292                 fastcc = false;
 293                 caldata = &sc->cur_chan->caldata;
 294         }
 295
 296         if (!hchan) {
 297                 fastcc = false;
 298                 hchan = ah->curchan;
 299         }
 300
 301         if (!ath_prepare_reset(sc))
 302                 fastcc = false;
 303
 304         if (ath9k_is_chanctx_enabled())
 305                 fastcc = false;
 306
 307         spin_lock_bh(&sc->chan_lock);
 308         sc->cur_chandef = sc->cur_chan->chandef;
 309         spin_unlock_bh(&sc->chan_lock);
 310
 311         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 312                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 313
 314         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 315         if (r) {
 316                 ath_err(common,
 317                         "Unable to reset channel, reset status %d\n", r);
 318
 319                 ath9k_hw_enable_interrupts(ah);
 320                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 321
 322                 goto out;
 323         }
 324
 325         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 326             sc->cur_chan->offchannel)
 327                 ath9k_mci_set_txpower(sc, true, false);
 328
 329         if (!ath_complete_reset(sc, true))
 330                 r = -EIO;
 331
 332 out:
 333         spin_unlock_bh(&sc->sc_pcu_lock);
 334         tasklet_enable(&sc->bcon_tasklet);
 335         tasklet_enable(&sc->intr_tq);
 336
 337         return r;
 338 }
 339
 340 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 341                             struct ieee80211_vif *vif)
 342 {
 343         struct ath_node *an;
 344         an = (struct ath_node *)sta->drv_priv;
 345
 346         an->sc = sc;
 347         an->sta = sta;
 348         an->vif = vif;
 349         memset(&an->key_idx, 0, sizeof(an->key_idx));
 350
 351         ath_tx_node_init(sc, an);
 352
 353         ath_dynack_node_init(sc->sc_ah, an);
 354 }
 355
 356 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 357 {
 358         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 359         ath_tx_node_cleanup(sc, an);
 360
 361         ath_dynack_node_deinit(sc->sc_ah, an);
 362 }
 363
 364 void ath9k_tasklet(unsigned long data)
 365 {
 366         struct ath_softc *sc = (struct ath_softc *)data;
 367         struct ath_hw *ah = sc->sc_ah;
 368         struct ath_common *common = ath9k_hw_common(ah);
 369         enum ath_reset_type type;
 370         unsigned long flags;
 371         u32 status = sc->intrstatus;
 372         u32 rxmask;
 373
 374         ath9k_ps_wakeup(sc);
 375         spin_lock(&sc->sc_pcu_lock);
 376
 377         if (status & ATH9K_INT_FATAL) {
 378                 type = RESET_TYPE_FATAL_INT;
 379                 ath9k_queue_reset(sc, type);
 380
 381                 /*
 382                  * Increment the ref. counter here so that
 383                  * interrupts are enabled in the reset routine.
 384                  */
 385                 atomic_inc(&ah->intr_ref_cnt);
 386                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 387                 goto out;
 388         }
 389
 390         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 391             (status & ATH9K_INT_BB_WATCHDOG)) {
 392                 spin_lock(&common->cc_lock);
 393                 ath_hw_cycle_counters_update(common);
 394                 ar9003_hw_bb_watchdog_dbg_info(ah);
 395                 spin_unlock(&common->cc_lock);
 396
 397                 if (ar9003_hw_bb_watchdog_check(ah)) {
 398                         type = RESET_TYPE_BB_WATCHDOG;
 399                         ath9k_queue_reset(sc, type);
 400
 401                         /*
 402                          * Increment the ref. counter here so that
 403                          * interrupts are enabled in the reset routine.
 404                          */
 405                         atomic_inc(&ah->intr_ref_cnt);
 406                         ath_dbg(common, RESET,
 407                                 "BB_WATCHDOG: Skipping interrupts\n");
 408                         goto out;
 409                 }
 410         }
 411
 412         if (status & ATH9K_INT_GTT) {
 413                 sc->gtt_cnt++;
 414
 415                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 416                         type = RESET_TYPE_TX_GTT;
 417                         ath9k_queue_reset(sc, type);
 418                         atomic_inc(&ah->intr_ref_cnt);
 419                         ath_dbg(common, RESET,
 420                                 "GTT: Skipping interrupts\n");
 421                         goto out;
 422                 }
 423         }
 424
 425         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 426         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 427                 /*
 428                  * TSF sync does not look correct; remain awake to sync with
 429                  * the next Beacon.
 430                  */
 431                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 432                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 433         }
 434         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 435
 436         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 437                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 438                           ATH9K_INT_RXORN);
 439         else
 440                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 441
 442         if (status & rxmask) {
 443                 /* Check for high priority Rx first */
 444                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 445                     (status & ATH9K_INT_RXHP))
 446                         ath_rx_tasklet(sc, 0, true);
 447
 448                 ath_rx_tasklet(sc, 0, false);
 449         }
 450
 451         if (status & ATH9K_INT_TX) {
 452                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 453                         /*
 454                          * For EDMA chips, TX completion is enabled for the
 455                          * beacon queue, so if a beacon has been transmitted
 456                          * successfully after a GTT interrupt, the GTT counter
 457                          * gets reset to zero here.
 458                          */
 459                         sc->gtt_cnt = 0;
 460
 461                         ath_tx_edma_tasklet(sc);
 462                 } else {
 463                         ath_tx_tasklet(sc);
 464                 }
 465
 466                 wake_up(&sc->tx_wait);
 467         }
 468
 469         if (status & ATH9K_INT_GENTIMER)
 470                 ath_gen_timer_isr(sc->sc_ah);
 471
 472         ath9k_btcoex_handle_interrupt(sc, status);
 473
 474         /* re-enable hardware interrupt */
 475         ath9k_hw_enable_interrupts(ah);
 476 out:
 477         spin_unlock(&sc->sc_pcu_lock);
 478         ath9k_ps_restore(sc);
 479 }
 480
 481 irqreturn_t ath_isr(int irq, void *dev)
 482 {
 483 #define SCHED_INTR (                            \
 484                 ATH9K_INT_FATAL |               \
 485                 ATH9K_INT_BB_WATCHDOG |         \
 486                 ATH9K_INT_RXORN |               \
 487                 ATH9K_INT_RXEOL |               \
 488                 ATH9K_INT_RX |                  \
 489                 ATH9K_INT_RXLP |                \
 490                 ATH9K_INT_RXHP |                \
 491                 ATH9K_INT_TX |                  \
 492                 ATH9K_INT_BMISS |               \
 493                 ATH9K_INT_CST |                 \
 494                 ATH9K_INT_GTT |                 \
 495                 ATH9K_INT_TSFOOR |              \
 496                 ATH9K_INT_GENTIMER |            \
 497                 ATH9K_INT_MCI)
 498
 499         struct ath_softc *sc = dev;
 500         struct ath_hw *ah = sc->sc_ah;
 501         struct ath_common *common = ath9k_hw_common(ah);
 502         enum ath9k_int status;
 503         u32 sync_cause = 0;
 504         bool sched = false;
 505
 506         /*
 507          * The hardware is not ready/present, don't
 508          * touch anything. Note this can happen early
 509          * on if the IRQ is shared.
 510          */
 511         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 512                 return IRQ_NONE;
 513
 514         /* shared irq, not for us */
 515
 516         if (!ath9k_hw_intrpend(ah))
 517                 return IRQ_NONE;
 518
 519         if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
 520                 ath9k_hw_kill_interrupts(ah);
 521                 return IRQ_HANDLED;
 522         }
 523
 524         /*
 525          * Figure out the reason(s) for the interrupt.  Note
 526          * that the hal returns a pseudo-ISR that may include
 527          * bits we haven't explicitly enabled so we mask the
 528          * value to insure we only process bits we requested.
 529          */
 530         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 531         ath9k_debug_sync_cause(sc, sync_cause);
 532         status &= ah->imask;    /* discard unasked-for bits */
 533
 534         /*
 535          * If there are no status bits set, then this interrupt was not
 536          * for me (should have been caught above).
 537          */
 538         if (!status)
 539                 return IRQ_NONE;
 540
 541         /* Cache the status */
 542         sc->intrstatus = status;
 543
 544         if (status & SCHED_INTR)
 545                 sched = true;
 546
 547         /*
 548          * If a FATAL or RXORN interrupt is received, we have to reset the
 549          * chip immediately.
 550          */
 551         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 552             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 553                 goto chip_reset;
 554
 555         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 556             (status & ATH9K_INT_BB_WATCHDOG))
 557                 goto chip_reset;
 558
 559 #ifdef CONFIG_ATH9K_WOW
 560         if (status & ATH9K_INT_BMISS) {
 561                 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
 562                         atomic_inc(&sc->wow_got_bmiss_intr);
 563                         atomic_dec(&sc->wow_sleep_proc_intr);
 564                 }
 565         }
 566 #endif
 567
 568         if (status & ATH9K_INT_SWBA)
 569                 tasklet_schedule(&sc->bcon_tasklet);
 570
 571         if (status & ATH9K_INT_TXURN)
 572                 ath9k_hw_updatetxtriglevel(ah, true);
 573
 574         if (status & ATH9K_INT_RXEOL) {
 575                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 576                 ath9k_hw_set_interrupts(ah);
 577         }
 578
 579         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 580                 if (status & ATH9K_INT_TIM_TIMER) {
 581                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 582                                 goto chip_reset;
 583                         /* Clear RxAbort bit so that we can
 584                          * receive frames */
 585                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 586                         spin_lock(&sc->sc_pm_lock);
 587                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 588                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 589                         spin_unlock(&sc->sc_pm_lock);
 590                 }
 591
 592 chip_reset:
 593
 594         ath_debug_stat_interrupt(sc, status);
 595
 596         if (sched) {
 597                 /* turn off every interrupt */
 598                 ath9k_hw_disable_interrupts(ah);
 599                 tasklet_schedule(&sc->intr_tq);
 600         }
 601
 602         return IRQ_HANDLED;
 603
 604 #undef SCHED_INTR
 605 }
 606
 607 /*
 608  * This function is called when a HW reset cannot be deferred
 609  * and has to be immediate.
 610  */
 611 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 612 {
 613         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 614         int r;
 615
 616         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 617
 618         ath9k_ps_wakeup(sc);
 619         r = ath_reset_internal(sc, hchan);
 620         ath9k_ps_restore(sc);
 621
 622         return r;
 623 }
 624
 625 /*
 626  * When a HW reset can be deferred, it is added to the
 627  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 628  * queueing.
 629  */
 630 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 631 {
 632         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 633 #ifdef CONFIG_ATH9K_DEBUGFS
 634         RESET_STAT_INC(sc, type);
 635 #endif
 636         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 637         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 638 }
 639
 640 void ath_reset_work(struct work_struct *work)
 641 {
 642         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 643
 644         ath9k_ps_wakeup(sc);
 645         ath_reset_internal(sc, NULL);
 646         ath9k_ps_restore(sc);
 647 }
 648
 649 /**********************/
 650 /* mac80211 callbacks */
 651 /**********************/
 652
 653 static int ath9k_start(struct ieee80211_hw *hw)
 654 {
 655         struct ath_softc *sc = hw->priv;
 656         struct ath_hw *ah = sc->sc_ah;
 657         struct ath_common *common = ath9k_hw_common(ah);
 658         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 659         struct ath_chanctx *ctx = sc->cur_chan;
 660         struct ath9k_channel *init_channel;
 661         int r;
 662
 663         ath_dbg(common, CONFIG,
 664                 "Starting driver with initial channel: %d MHz\n",
 665                 curchan->center_freq);
 666
 667         ath9k_ps_wakeup(sc);
 668         mutex_lock(&sc->mutex);
 669
 670         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 671         sc->cur_chandef = hw->conf.chandef;
 672
 673         /* Reset SERDES registers */
 674         ath9k_hw_configpcipowersave(ah, false);
 675
 676         /*
 677          * The basic interface to setting the hardware in a good
 678          * state is ``reset''.  On return the hardware is known to
 679          * be powered up and with interrupts disabled.  This must
 680          * be followed by initialization of the appropriate bits
 681          * and then setup of the interrupt mask.
 682          */
 683         spin_lock_bh(&sc->sc_pcu_lock);
 684
 685         atomic_set(&ah->intr_ref_cnt, -1);
 686
 687         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 688         if (r) {
 689                 ath_err(common,
 690                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 691                         r, curchan->center_freq);
 692                 ah->reset_power_on = false;
 693         }
 694
 695         /* Setup our intr mask. */
 696         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 697                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 698                     ATH9K_INT_GLOBAL;
 699
 700         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 701                 ah->imask |= ATH9K_INT_RXHP |
 702                              ATH9K_INT_RXLP;
 703         else
 704                 ah->imask |= ATH9K_INT_RX;
 705
 706         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 707                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 708
 709         /*
 710          * Enable GTT interrupts only for AR9003/AR9004 chips
 711          * for now.
 712          */
 713         if (AR_SREV_9300_20_OR_LATER(ah))
 714                 ah->imask |= ATH9K_INT_GTT;
 715
 716         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 717                 ah->imask |= ATH9K_INT_CST;
 718
 719         ath_mci_enable(sc);
 720
 721         clear_bit(ATH_OP_INVALID, &common->op_flags);
 722         sc->sc_ah->is_monitoring = false;
 723
 724         if (!ath_complete_reset(sc, false))
 725                 ah->reset_power_on = false;
 726
 727         if (ah->led_pin >= 0) {
 728                 ath9k_hw_cfg_output(ah, ah->led_pin,
 729                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 730                 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 731         }
 732
 733         /*
 734          * Reset key cache to sane defaults (all entries cleared) instead of
 735          * semi-random values after suspend/resume.
 736          */
 737         ath9k_cmn_init_crypto(sc->sc_ah);
 738
 739         ath9k_hw_reset_tsf(ah);
 740
 741         spin_unlock_bh(&sc->sc_pcu_lock);
 742
 743         mutex_unlock(&sc->mutex);
 744
 745         ath9k_ps_restore(sc);
 746
 747         return 0;
 748 }
 749
 750 static void ath9k_tx(struct ieee80211_hw *hw,
 751                      struct ieee80211_tx_control *control,
 752                      struct sk_buff *skb)
 753 {
 754         struct ath_softc *sc = hw->priv;
 755         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 756         struct ath_tx_control txctl;
 757         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 758         unsigned long flags;
 759
 760         if (sc->ps_enabled) {
 761                 /*
 762                  * mac80211 does not set PM field for normal data frames, so we
 763                  * need to update that based on the current PS mode.
 764                  */
 765                 if (ieee80211_is_data(hdr->frame_control) &&
 766                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 767                     !ieee80211_has_pm(hdr->frame_control)) {
 768                         ath_dbg(common, PS,
 769                                 "Add PM=1 for a TX frame while in PS mode\n");
 770                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 771                 }
 772         }
 773
 774         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 775                 /*
 776                  * We are using PS-Poll and mac80211 can request TX while in
 777                  * power save mode. Need to wake up hardware for the TX to be
 778                  * completed and if needed, also for RX of buffered frames.
 779                  */
 780                 ath9k_ps_wakeup(sc);
 781                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 782                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 783                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 784                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 785                         ath_dbg(common, PS,
 786                                 "Sending PS-Poll to pick a buffered frame\n");
 787                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 788                 } else {
 789                         ath_dbg(common, PS, "Wake up to complete TX\n");
 790                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 791                 }
 792                 /*
 793                  * The actual restore operation will happen only after
 794                  * the ps_flags bit is cleared. We are just dropping
 795                  * the ps_usecount here.
 796                  */
 797                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 798                 ath9k_ps_restore(sc);
 799         }
 800
 801         /*
 802          * Cannot tx while the hardware is in full sleep, it first needs a full
 803          * chip reset to recover from that
 804          */
 805         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 806                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 807                 goto exit;
 808         }
 809
 810         memset(&txctl, 0, sizeof(struct ath_tx_control));
 811         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 812         txctl.sta = control->sta;
 813
 814         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 815
 816         if (ath_tx_start(hw, skb, &txctl) != 0) {
 817                 ath_dbg(common, XMIT, "TX failed\n");
 818                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 819                 goto exit;
 820         }
 821
 822         return;
 823 exit:
 824         ieee80211_free_txskb(hw, skb);
 825 }
 826
 827 static void ath9k_stop(struct ieee80211_hw *hw)
 828 {
 829         struct ath_softc *sc = hw->priv;
 830         struct ath_hw *ah = sc->sc_ah;
 831         struct ath_common *common = ath9k_hw_common(ah);
 832         bool prev_idle;
 833
 834         ath9k_deinit_channel_context(sc);
 835
 836         mutex_lock(&sc->mutex);
 837
 838         ath_cancel_work(sc);
 839
 840         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 841                 ath_dbg(common, ANY, "Device not present\n");
 842                 mutex_unlock(&sc->mutex);
 843                 return;
 844         }
 845
 846         /* Ensure HW is awake when we try to shut it down. */
 847         ath9k_ps_wakeup(sc);
 848
 849         spin_lock_bh(&sc->sc_pcu_lock);
 850
 851         /* prevent tasklets to enable interrupts once we disable them */
 852         ah->imask &= ~ATH9K_INT_GLOBAL;
 853
 854         /* make sure h/w will not generate any interrupt
 855          * before setting the invalid flag. */
 856         ath9k_hw_disable_interrupts(ah);
 857
 858         spin_unlock_bh(&sc->sc_pcu_lock);
 859
 860         /* we can now sync irq and kill any running tasklets, since we already
 861          * disabled interrupts and not holding a spin lock */
 862         synchronize_irq(sc->irq);
 863         tasklet_kill(&sc->intr_tq);
 864         tasklet_kill(&sc->bcon_tasklet);
 865
 866         prev_idle = sc->ps_idle;
 867         sc->ps_idle = true;
 868
 869         spin_lock_bh(&sc->sc_pcu_lock);
 870
 871         if (ah->led_pin >= 0) {
 872                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 873                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 874         }
 875
 876         ath_prepare_reset(sc);
 877
 878         if (sc->rx.frag) {
 879                 dev_kfree_skb_any(sc->rx.frag);
 880                 sc->rx.frag = NULL;
 881         }
 882
 883         if (!ah->curchan)
 884                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 885                                                     &sc->cur_chan->chandef);
 886
 887         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 888         ath9k_hw_phy_disable(ah);
 889
 890         ath9k_hw_configpcipowersave(ah, true);
 891
 892         spin_unlock_bh(&sc->sc_pcu_lock);
 893
 894         ath9k_ps_restore(sc);
 895
 896         set_bit(ATH_OP_INVALID, &common->op_flags);
 897         sc->ps_idle = prev_idle;
 898
 899         mutex_unlock(&sc->mutex);
 900
 901         ath_dbg(common, CONFIG, "Driver halt\n");
 902 }
 903
 904 static bool ath9k_uses_beacons(int type)
 905 {
 906         switch (type) {
 907         case NL80211_IFTYPE_AP:
 908         case NL80211_IFTYPE_ADHOC:
 909         case NL80211_IFTYPE_MESH_POINT:
 910                 return true;
 911         default:
 912                 return false;
 913         }
 914 }
 915
 916 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 917                            u8 *mac, struct ieee80211_vif *vif)
 918 {
 919         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 920         int i;
 921
 922         if (iter_data->has_hw_macaddr) {
 923                 for (i = 0; i < ETH_ALEN; i++)
 924                         iter_data->mask[i] &=
 925                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 926         } else {
 927                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 928                 iter_data->has_hw_macaddr = true;
 929         }
 930
 931         if (!vif->bss_conf.use_short_slot)
 932                 iter_data->slottime = ATH9K_SLOT_TIME_20;
 933
 934         switch (vif->type) {
 935         case NL80211_IFTYPE_AP:
 936                 iter_data->naps++;
 937                 break;
 938         case NL80211_IFTYPE_STATION:
 939                 iter_data->nstations++;
 940                 if (avp->assoc && !iter_data->primary_sta)
 941                         iter_data->primary_sta = vif;
 942                 break;
 943         case NL80211_IFTYPE_ADHOC:
 944                 iter_data->nadhocs++;
 945                 if (vif->bss_conf.enable_beacon)
 946                         iter_data->beacons = true;
 947                 break;
 948         case NL80211_IFTYPE_MESH_POINT:
 949                 iter_data->nmeshes++;
 950                 if (vif->bss_conf.enable_beacon)
 951                         iter_data->beacons = true;
 952                 break;
 953         case NL80211_IFTYPE_WDS:
 954                 iter_data->nwds++;
 955                 break;
 956         default:
 957                 break;
 958         }
 959 }
 960
 961 static void ath9k_update_bssid_mask(struct ath_softc *sc,
 962                                     struct ath_chanctx *ctx,
 963                                     struct ath9k_vif_iter_data *iter_data)
 964 {
 965         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 966         struct ath_vif *avp;
 967         int i;
 968
 969         if (!ath9k_is_chanctx_enabled())
 970                 return;
 971
 972         list_for_each_entry(avp, &ctx->vifs, list) {
 973                 if (ctx->nvifs_assigned != 1)
 974                         continue;
 975
 976                 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
 977                         continue;
 978
 979                 ether_addr_copy(common->curbssid, avp->bssid);
 980
 981                 /* perm_addr will be used as the p2p device address. */
 982                 for (i = 0; i < ETH_ALEN; i++)
 983                         iter_data->mask[i] &=
 984                                 ~(iter_data->hw_macaddr[i] ^
 985                                   sc->hw->wiphy->perm_addr[i]);
 986         }
 987 }
 988
 989 /* Called with sc->mutex held. */
 990 void ath9k_calculate_iter_data(struct ath_softc *sc,
 991                                struct ath_chanctx *ctx,
 992                                struct ath9k_vif_iter_data *iter_data)
 993 {
 994         struct ath_vif *avp;
 995
 996         /*
 997          * Pick the MAC address of the first interface as the new hardware
 998          * MAC address. The hardware will use it together with the BSSID mask
 999          * when matching addresses.
1000          */
1001         memset(iter_data, 0, sizeof(*iter_data));
1002         memset(&iter_data->mask, 0xff, ETH_ALEN);
1003         iter_data->slottime = ATH9K_SLOT_TIME_9;
1004
1005         list_for_each_entry(avp, &ctx->vifs, list)
1006                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1007
1008         ath9k_update_bssid_mask(sc, ctx, iter_data);
1009 }
1010
1011 static void ath9k_set_assoc_state(struct ath_softc *sc,
1012                                   struct ieee80211_vif *vif, bool changed)
1013 {
1014         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1015         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1016         unsigned long flags;
1017
1018         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1019
1020         ether_addr_copy(common->curbssid, avp->bssid);
1021         common->curaid = avp->aid;
1022         ath9k_hw_write_associd(sc->sc_ah);
1023
1024         if (changed) {
1025                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1026                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1027
1028                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1029                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1030                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1031         }
1032
1033         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1034                 ath9k_mci_update_wlan_channels(sc, false);
1035
1036         ath_dbg(common, CONFIG,
1037                 "Primary Station interface: %pM, BSSID: %pM\n",
1038                 vif->addr, common->curbssid);
1039 }
1040
1041 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1042 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1043 {
1044         struct ath_hw *ah = sc->sc_ah;
1045         struct ath_common *common = ath9k_hw_common(ah);
1046         struct ieee80211_vif *vif = NULL;
1047
1048         ath9k_ps_wakeup(sc);
1049
1050         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1051                 vif = sc->offchannel.scan_vif;
1052         else
1053                 vif = sc->offchannel.roc_vif;
1054
1055         if (WARN_ON(!vif))
1056                 goto exit;
1057
1058         eth_zero_addr(common->curbssid);
1059         eth_broadcast_addr(common->bssidmask);
1060         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1061         common->curaid = 0;
1062         ah->opmode = vif->type;
1063         ah->imask &= ~ATH9K_INT_SWBA;
1064         ah->imask &= ~ATH9K_INT_TSFOOR;
1065         ah->slottime = ATH9K_SLOT_TIME_9;
1066
1067         ath_hw_setbssidmask(common);
1068         ath9k_hw_setopmode(ah);
1069         ath9k_hw_write_associd(sc->sc_ah);
1070         ath9k_hw_set_interrupts(ah);
1071         ath9k_hw_init_global_settings(ah);
1072
1073 exit:
1074         ath9k_ps_restore(sc);
1075 }
1076 #endif
1077
1078 /* Called with sc->mutex held. */
1079 void ath9k_calculate_summary_state(struct ath_softc *sc,
1080                                    struct ath_chanctx *ctx)
1081 {
1082         struct ath_hw *ah = sc->sc_ah;
1083         struct ath_common *common = ath9k_hw_common(ah);
1084         struct ath9k_vif_iter_data iter_data;
1085         struct ath_beacon_config *cur_conf;
1086
1087         ath_chanctx_check_active(sc, ctx);
1088
1089         if (ctx != sc->cur_chan)
1090                 return;
1091
1092 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1093         if (ctx == &sc->offchannel.chan)
1094                 return ath9k_set_offchannel_state(sc);
1095 #endif
1096
1097         ath9k_ps_wakeup(sc);
1098         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1099
1100         if (iter_data.has_hw_macaddr)
1101                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1102
1103         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1104         ath_hw_setbssidmask(common);
1105
1106         if (iter_data.naps > 0) {
1107                 cur_conf = &ctx->beacon;
1108                 ath9k_hw_set_tsfadjust(ah, true);
1109                 ah->opmode = NL80211_IFTYPE_AP;
1110                 if (cur_conf->enable_beacon)
1111                         iter_data.beacons = true;
1112         } else {
1113                 ath9k_hw_set_tsfadjust(ah, false);
1114
1115                 if (iter_data.nmeshes)
1116                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1117                 else if (iter_data.nwds)
1118                         ah->opmode = NL80211_IFTYPE_AP;
1119                 else if (iter_data.nadhocs)
1120                         ah->opmode = NL80211_IFTYPE_ADHOC;
1121                 else
1122                         ah->opmode = NL80211_IFTYPE_STATION;
1123         }
1124
1125         ath9k_hw_setopmode(ah);
1126
1127         ctx->switch_after_beacon = false;
1128         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1129                 ah->imask |= ATH9K_INT_TSFOOR;
1130         else {
1131                 ah->imask &= ~ATH9K_INT_TSFOOR;
1132                 if (iter_data.naps == 1 && iter_data.beacons)
1133                         ctx->switch_after_beacon = true;
1134         }
1135
1136         ah->imask &= ~ATH9K_INT_SWBA;
1137         if (ah->opmode == NL80211_IFTYPE_STATION) {
1138                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1139
1140                 if (iter_data.primary_sta) {
1141                         iter_data.beacons = true;
1142                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1143                                               changed);
1144                         ctx->primary_sta = iter_data.primary_sta;
1145                 } else {
1146                         ctx->primary_sta = NULL;
1147                         memset(common->curbssid, 0, ETH_ALEN);
1148                         common->curaid = 0;
1149                         ath9k_hw_write_associd(sc->sc_ah);
1150                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1151                                 ath9k_mci_update_wlan_channels(sc, true);
1152                 }
1153         } else if (iter_data.beacons) {
1154                 ah->imask |= ATH9K_INT_SWBA;
1155         }
1156         ath9k_hw_set_interrupts(ah);
1157
1158         if (iter_data.beacons)
1159                 set_bit(ATH_OP_BEACONS, &common->op_flags);
1160         else
1161                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1162
1163         if (ah->slottime != iter_data.slottime) {
1164                 ah->slottime = iter_data.slottime;
1165                 ath9k_hw_init_global_settings(ah);
1166         }
1167
1168         if (iter_data.primary_sta)
1169                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1170         else
1171                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1172
1173         ath_dbg(common, CONFIG,
1174                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1175                 common->macaddr, common->curbssid, common->bssidmask);
1176
1177         ath9k_ps_restore(sc);
1178 }
1179
1180 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1181                                    struct ieee80211_vif *vif)
1182 {
1183         int i;
1184
1185         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1186                 vif->hw_queue[i] = i;
1187
1188         if (vif->type == NL80211_IFTYPE_AP)
1189                 vif->cab_queue = hw->queues - 2;
1190         else
1191                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1192 }
1193
1194 static int ath9k_add_interface(struct ieee80211_hw *hw,
1195                                struct ieee80211_vif *vif)
1196 {
1197         struct ath_softc *sc = hw->priv;
1198         struct ath_hw *ah = sc->sc_ah;
1199         struct ath_common *common = ath9k_hw_common(ah);
1200         struct ath_vif *avp = (void *)vif->drv_priv;
1201         struct ath_node *an = &avp->mcast_node;
1202
1203         mutex_lock(&sc->mutex);
1204
1205         if (config_enabled(CONFIG_ATH9K_TX99)) {
1206                 if (sc->cur_chan->nvifs >= 1) {
1207                         mutex_unlock(&sc->mutex);
1208                         return -EOPNOTSUPP;
1209                 }
1210                 sc->tx99_vif = vif;
1211         }
1212
1213         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1214         sc->cur_chan->nvifs++;
1215
1216         if (ath9k_uses_beacons(vif->type))
1217                 ath9k_beacon_assign_slot(sc, vif);
1218
1219         avp->vif = vif;
1220         if (!ath9k_is_chanctx_enabled()) {
1221                 avp->chanctx = sc->cur_chan;
1222                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1223         }
1224
1225         ath9k_assign_hw_queues(hw, vif);
1226
1227         an->sc = sc;
1228         an->sta = NULL;
1229         an->vif = vif;
1230         an->no_ps_filter = true;
1231         ath_tx_node_init(sc, an);
1232
1233         mutex_unlock(&sc->mutex);
1234         return 0;
1235 }
1236
1237 static int ath9k_change_interface(struct ieee80211_hw *hw,
1238                                   struct ieee80211_vif *vif,
1239                                   enum nl80211_iftype new_type,
1240                                   bool p2p)
1241 {
1242         struct ath_softc *sc = hw->priv;
1243         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1244         struct ath_vif *avp = (void *)vif->drv_priv;
1245
1246         mutex_lock(&sc->mutex);
1247
1248         if (config_enabled(CONFIG_ATH9K_TX99)) {
1249                 mutex_unlock(&sc->mutex);
1250                 return -EOPNOTSUPP;
1251         }
1252
1253         ath_dbg(common, CONFIG, "Change Interface\n");
1254
1255         if (ath9k_uses_beacons(vif->type))
1256                 ath9k_beacon_remove_slot(sc, vif);
1257
1258         vif->type = new_type;
1259         vif->p2p = p2p;
1260
1261         if (ath9k_uses_beacons(vif->type))
1262                 ath9k_beacon_assign_slot(sc, vif);
1263
1264         ath9k_assign_hw_queues(hw, vif);
1265         ath9k_calculate_summary_state(sc, avp->chanctx);
1266
1267         mutex_unlock(&sc->mutex);
1268         return 0;
1269 }
1270
1271 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1272                                    struct ieee80211_vif *vif)
1273 {
1274         struct ath_softc *sc = hw->priv;
1275         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1276         struct ath_vif *avp = (void *)vif->drv_priv;
1277
1278         ath_dbg(common, CONFIG, "Detach Interface\n");
1279
1280         mutex_lock(&sc->mutex);
1281
1282         ath9k_p2p_remove_vif(sc, vif);
1283
1284         sc->cur_chan->nvifs--;
1285         sc->tx99_vif = NULL;
1286         if (!ath9k_is_chanctx_enabled())
1287                 list_del(&avp->list);
1288
1289         if (ath9k_uses_beacons(vif->type))
1290                 ath9k_beacon_remove_slot(sc, vif);
1291
1292         ath_tx_node_cleanup(sc, &avp->mcast_node);
1293
1294         mutex_unlock(&sc->mutex);
1295 }
1296
1297 static void ath9k_enable_ps(struct ath_softc *sc)
1298 {
1299         struct ath_hw *ah = sc->sc_ah;
1300         struct ath_common *common = ath9k_hw_common(ah);
1301
1302         if (config_enabled(CONFIG_ATH9K_TX99))
1303                 return;
1304
1305         sc->ps_enabled = true;
1306         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1307                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1308                         ah->imask |= ATH9K_INT_TIM_TIMER;
1309                         ath9k_hw_set_interrupts(ah);
1310                 }
1311                 ath9k_hw_setrxabort(ah, 1);
1312         }
1313         ath_dbg(common, PS, "PowerSave enabled\n");
1314 }
1315
1316 static void ath9k_disable_ps(struct ath_softc *sc)
1317 {
1318         struct ath_hw *ah = sc->sc_ah;
1319         struct ath_common *common = ath9k_hw_common(ah);
1320
1321         if (config_enabled(CONFIG_ATH9K_TX99))
1322                 return;
1323
1324         sc->ps_enabled = false;
1325         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1326         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1327                 ath9k_hw_setrxabort(ah, 0);
1328                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1329                                   PS_WAIT_FOR_CAB |
1330                                   PS_WAIT_FOR_PSPOLL_DATA |
1331                                   PS_WAIT_FOR_TX_ACK);
1332                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1333                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1334                         ath9k_hw_set_interrupts(ah);
1335                 }
1336         }
1337         ath_dbg(common, PS, "PowerSave disabled\n");
1338 }
1339
1340 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1341 {
1342         struct ath_softc *sc = hw->priv;
1343         struct ath_hw *ah = sc->sc_ah;
1344         struct ath_common *common = ath9k_hw_common(ah);
1345         u32 rxfilter;
1346
1347         if (config_enabled(CONFIG_ATH9K_TX99))
1348                 return;
1349
1350         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1351                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1352                 return;
1353         }
1354
1355         ath9k_ps_wakeup(sc);
1356         rxfilter = ath9k_hw_getrxfilter(ah);
1357         ath9k_hw_setrxfilter(ah, rxfilter |
1358                                  ATH9K_RX_FILTER_PHYRADAR |
1359                                  ATH9K_RX_FILTER_PHYERR);
1360
1361         /* TODO: usually this should not be neccesary, but for some reason
1362          * (or in some mode?) the trigger must be called after the
1363          * configuration, otherwise the register will have its values reset
1364          * (on my ar9220 to value 0x01002310)
1365          */
1366         ath9k_spectral_scan_config(hw, sc->spectral_mode);
1367         ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1368         ath9k_ps_restore(sc);
1369 }
1370
1371 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1372                                enum spectral_mode spectral_mode)
1373 {
1374         struct ath_softc *sc = hw->priv;
1375         struct ath_hw *ah = sc->sc_ah;
1376         struct ath_common *common = ath9k_hw_common(ah);
1377
1378         if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1379                 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1380                 return -1;
1381         }
1382
1383         switch (spectral_mode) {
1384         case SPECTRAL_DISABLED:
1385                 sc->spec_config.enabled = 0;
1386                 break;
1387         case SPECTRAL_BACKGROUND:
1388                 /* send endless samples.
1389                  * TODO: is this really useful for "background"?
1390                  */
1391                 sc->spec_config.endless = 1;
1392                 sc->spec_config.enabled = 1;
1393                 break;
1394         case SPECTRAL_CHANSCAN:
1395         case SPECTRAL_MANUAL:
1396                 sc->spec_config.endless = 0;
1397                 sc->spec_config.enabled = 1;
1398                 break;
1399         default:
1400                 return -1;
1401         }
1402
1403         ath9k_ps_wakeup(sc);
1404         ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1405         ath9k_ps_restore(sc);
1406
1407         sc->spectral_mode = spectral_mode;
1408
1409         return 0;
1410 }
1411
1412 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1413 {
1414         struct ath_softc *sc = hw->priv;
1415         struct ath_hw *ah = sc->sc_ah;
1416         struct ath_common *common = ath9k_hw_common(ah);
1417         struct ieee80211_conf *conf = &hw->conf;
1418         struct ath_chanctx *ctx = sc->cur_chan;
1419
1420         ath9k_ps_wakeup(sc);
1421         mutex_lock(&sc->mutex);
1422
1423         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1424                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1425                 if (sc->ps_idle) {
1426                         ath_cancel_work(sc);
1427                         ath9k_stop_btcoex(sc);
1428                 } else {
1429                         ath9k_start_btcoex(sc);
1430                         /*
1431                          * The chip needs a reset to properly wake up from
1432                          * full sleep
1433                          */
1434                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1435                 }
1436         }
1437
1438         /*
1439          * We just prepare to enable PS. We have to wait until our AP has
1440          * ACK'd our null data frame to disable RX otherwise we'll ignore
1441          * those ACKs and end up retransmitting the same null data frames.
1442          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1443          */
1444         if (changed & IEEE80211_CONF_CHANGE_PS) {
1445                 unsigned long flags;
1446                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1447                 if (conf->flags & IEEE80211_CONF_PS)
1448                         ath9k_enable_ps(sc);
1449                 else
1450                         ath9k_disable_ps(sc);
1451                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1452         }
1453
1454         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1455                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1456                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1457                         sc->sc_ah->is_monitoring = true;
1458                 } else {
1459                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1460                         sc->sc_ah->is_monitoring = false;
1461                 }
1462         }
1463
1464         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1465                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1466                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1467         }
1468
1469         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1470                 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1471                 sc->cur_chan->txpower = 2 * conf->power_level;
1472                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1473                                        sc->cur_chan->txpower, &sc->curtxpow);
1474         }
1475
1476         mutex_unlock(&sc->mutex);
1477         ath9k_ps_restore(sc);
1478
1479         return 0;
1480 }
1481
1482 #define SUPPORTED_FILTERS                       \
1483         (FIF_PROMISC_IN_BSS |                   \
1484         FIF_ALLMULTI |                          \
1485         FIF_CONTROL |                           \
1486         FIF_PSPOLL |                            \
1487         FIF_OTHER_BSS |                         \
1488         FIF_BCN_PRBRESP_PROMISC |               \
1489         FIF_PROBE_REQ |                         \
1490         FIF_FCSFAIL)
1491
1492 /* FIXME: sc->sc_full_reset ? */
1493 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1494                                    unsigned int changed_flags,
1495                                    unsigned int *total_flags,
1496                                    u64 multicast)
1497 {
1498         struct ath_softc *sc = hw->priv;
1499         u32 rfilt;
1500
1501         changed_flags &= SUPPORTED_FILTERS;
1502         *total_flags &= SUPPORTED_FILTERS;
1503
1504         spin_lock_bh(&sc->chan_lock);
1505         sc->cur_chan->rxfilter = *total_flags;
1506         spin_unlock_bh(&sc->chan_lock);
1507
1508         ath9k_ps_wakeup(sc);
1509         rfilt = ath_calcrxfilter(sc);
1510         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1511         ath9k_ps_restore(sc);
1512
1513         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1514                 rfilt);
1515 }
1516
1517 static int ath9k_sta_add(struct ieee80211_hw *hw,
1518                          struct ieee80211_vif *vif,
1519                          struct ieee80211_sta *sta)
1520 {
1521         struct ath_softc *sc = hw->priv;
1522         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1523         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1524         struct ieee80211_key_conf ps_key = { };
1525         int key;
1526
1527         ath_node_attach(sc, sta, vif);
1528
1529         if (vif->type != NL80211_IFTYPE_AP &&
1530             vif->type != NL80211_IFTYPE_AP_VLAN)
1531                 return 0;
1532
1533         key = ath_key_config(common, vif, sta, &ps_key);
1534         if (key > 0) {
1535                 an->ps_key = key;
1536                 an->key_idx[0] = key;
1537         }
1538
1539         return 0;
1540 }
1541
1542 static void ath9k_del_ps_key(struct ath_softc *sc,
1543                              struct ieee80211_vif *vif,
1544                              struct ieee80211_sta *sta)
1545 {
1546         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1547         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1548         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1549
1550         if (!an->ps_key)
1551             return;
1552
1553         ath_key_delete(common, &ps_key);
1554         an->ps_key = 0;
1555         an->key_idx[0] = 0;
1556 }
1557
1558 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1559                             struct ieee80211_vif *vif,
1560                             struct ieee80211_sta *sta)
1561 {
1562         struct ath_softc *sc = hw->priv;
1563
1564         ath9k_del_ps_key(sc, vif, sta);
1565         ath_node_detach(sc, sta);
1566
1567         return 0;
1568 }
1569
1570 static int ath9k_sta_state(struct ieee80211_hw *hw,
1571                            struct ieee80211_vif *vif,
1572                            struct ieee80211_sta *sta,
1573                            enum ieee80211_sta_state old_state,
1574                            enum ieee80211_sta_state new_state)
1575 {
1576         struct ath_softc *sc = hw->priv;
1577         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1578         int ret = 0;
1579
1580         if (old_state == IEEE80211_STA_AUTH &&
1581             new_state == IEEE80211_STA_ASSOC) {
1582                 ret = ath9k_sta_add(hw, vif, sta);
1583                 ath_dbg(common, CONFIG,
1584                         "Add station: %pM\n", sta->addr);
1585         } else if (old_state == IEEE80211_STA_ASSOC &&
1586                    new_state == IEEE80211_STA_AUTH) {
1587                 ret = ath9k_sta_remove(hw, vif, sta);
1588                 ath_dbg(common, CONFIG,
1589                         "Remove station: %pM\n", sta->addr);
1590         }
1591
1592         if (ath9k_is_chanctx_enabled()) {
1593                 if (vif->type == NL80211_IFTYPE_STATION) {
1594                         if (old_state == IEEE80211_STA_ASSOC &&
1595                             new_state == IEEE80211_STA_AUTHORIZED)
1596                                 ath_chanctx_event(sc, vif,
1597                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1598                 }
1599         }
1600
1601         return ret;
1602 }
1603
1604 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1605                                     struct ath_node *an,
1606                                     bool set)
1607 {
1608         int i;
1609
1610         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1611                 if (!an->key_idx[i])
1612                         continue;
1613                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1614         }
1615 }
1616
1617 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1618                          struct ieee80211_vif *vif,
1619                          enum sta_notify_cmd cmd,
1620                          struct ieee80211_sta *sta)
1621 {
1622         struct ath_softc *sc = hw->priv;
1623         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1624
1625         switch (cmd) {
1626         case STA_NOTIFY_SLEEP:
1627                 an->sleeping = true;
1628                 ath_tx_aggr_sleep(sta, sc, an);
1629                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1630                 break;
1631         case STA_NOTIFY_AWAKE:
1632                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1633                 an->sleeping = false;
1634                 ath_tx_aggr_wakeup(sc, an);
1635                 break;
1636         }
1637 }
1638
1639 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1640                          struct ieee80211_vif *vif, u16 queue,
1641                          const struct ieee80211_tx_queue_params *params)
1642 {
1643         struct ath_softc *sc = hw->priv;
1644         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1645         struct ath_txq *txq;
1646         struct ath9k_tx_queue_info qi;
1647         int ret = 0;
1648
1649         if (queue >= IEEE80211_NUM_ACS)
1650                 return 0;
1651
1652         txq = sc->tx.txq_map[queue];
1653
1654         ath9k_ps_wakeup(sc);
1655         mutex_lock(&sc->mutex);
1656
1657         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1658
1659         qi.tqi_aifs = params->aifs;
1660         qi.tqi_cwmin = params->cw_min;
1661         qi.tqi_cwmax = params->cw_max;
1662         qi.tqi_burstTime = params->txop * 32;
1663
1664         ath_dbg(common, CONFIG,
1665                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1666                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1667                 params->cw_max, params->txop);
1668
1669         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1670         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1671         if (ret)
1672                 ath_err(common, "TXQ Update failed\n");
1673
1674         mutex_unlock(&sc->mutex);
1675         ath9k_ps_restore(sc);
1676
1677         return ret;
1678 }
1679
1680 static int ath9k_set_key(struct ieee80211_hw *hw,
1681                          enum set_key_cmd cmd,
1682                          struct ieee80211_vif *vif,
1683                          struct ieee80211_sta *sta,
1684                          struct ieee80211_key_conf *key)
1685 {
1686         struct ath_softc *sc = hw->priv;
1687         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1688         struct ath_node *an = NULL;
1689         int ret = 0, i;
1690
1691         if (ath9k_modparam_nohwcrypt)
1692                 return -ENOSPC;
1693
1694         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1695              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1696             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1697              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1698             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1699                 /*
1700                  * For now, disable hw crypto for the RSN IBSS group keys. This
1701                  * could be optimized in the future to use a modified key cache
1702                  * design to support per-STA RX GTK, but until that gets
1703                  * implemented, use of software crypto for group addressed
1704                  * frames is a acceptable to allow RSN IBSS to be used.
1705                  */
1706                 return -EOPNOTSUPP;
1707         }
1708
1709         mutex_lock(&sc->mutex);
1710         ath9k_ps_wakeup(sc);
1711         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1712         if (sta)
1713                 an = (struct ath_node *)sta->drv_priv;
1714
1715         switch (cmd) {
1716         case SET_KEY:
1717                 if (sta)
1718                         ath9k_del_ps_key(sc, vif, sta);
1719
1720                 key->hw_key_idx = 0;
1721                 ret = ath_key_config(common, vif, sta, key);
1722                 if (ret >= 0) {
1723                         key->hw_key_idx = ret;
1724                         /* push IV and Michael MIC generation to stack */
1725                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1726                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1727                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1728                         if (sc->sc_ah->sw_mgmt_crypto &&
1729                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1730                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1731                         ret = 0;
1732                 }
1733                 if (an && key->hw_key_idx) {
1734                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1735                                 if (an->key_idx[i])
1736                                         continue;
1737                                 an->key_idx[i] = key->hw_key_idx;
1738                                 break;
1739                         }
1740                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1741                 }
1742                 break;
1743         case DISABLE_KEY:
1744                 ath_key_delete(common, key);
1745                 if (an) {
1746                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1747                                 if (an->key_idx[i] != key->hw_key_idx)
1748                                         continue;
1749                                 an->key_idx[i] = 0;
1750                                 break;
1751                         }
1752                 }
1753                 key->hw_key_idx = 0;
1754                 break;
1755         default:
1756                 ret = -EINVAL;
1757         }
1758
1759         ath9k_ps_restore(sc);
1760         mutex_unlock(&sc->mutex);
1761
1762         return ret;
1763 }
1764
1765 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1766                                    struct ieee80211_vif *vif,
1767                                    struct ieee80211_bss_conf *bss_conf,
1768                                    u32 changed)
1769 {
1770 #define CHECK_ANI                               \
1771         (BSS_CHANGED_ASSOC |                    \
1772          BSS_CHANGED_IBSS |                     \
1773          BSS_CHANGED_BEACON_ENABLED)
1774
1775         struct ath_softc *sc = hw->priv;
1776         struct ath_hw *ah = sc->sc_ah;
1777         struct ath_common *common = ath9k_hw_common(ah);
1778         struct ath_vif *avp = (void *)vif->drv_priv;
1779         int slottime;
1780
1781         ath9k_ps_wakeup(sc);
1782         mutex_lock(&sc->mutex);
1783
1784         if (changed & BSS_CHANGED_ASSOC) {
1785                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1786                         bss_conf->bssid, bss_conf->assoc);
1787
1788                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1789                 avp->aid = bss_conf->aid;
1790                 avp->assoc = bss_conf->assoc;
1791
1792                 ath9k_calculate_summary_state(sc, avp->chanctx);
1793         }
1794
1795         if (changed & BSS_CHANGED_IBSS) {
1796                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1797                 common->curaid = bss_conf->aid;
1798                 ath9k_hw_write_associd(sc->sc_ah);
1799         }
1800
1801         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1802             (changed & BSS_CHANGED_BEACON_INT) ||
1803             (changed & BSS_CHANGED_BEACON_INFO)) {
1804                 ath9k_beacon_config(sc, vif, changed);
1805                 if (changed & BSS_CHANGED_BEACON_ENABLED)
1806                         ath9k_calculate_summary_state(sc, avp->chanctx);
1807         }
1808
1809         if ((avp->chanctx == sc->cur_chan) &&
1810             (changed & BSS_CHANGED_ERP_SLOT)) {
1811                 if (bss_conf->use_short_slot)
1812                         slottime = 9;
1813                 else
1814                         slottime = 20;
1815                 if (vif->type == NL80211_IFTYPE_AP) {
1816                         /*
1817                          * Defer update, so that connected stations can adjust
1818                          * their settings at the same time.
1819                          * See beacon.c for more details
1820                          */
1821                         sc->beacon.slottime = slottime;
1822                         sc->beacon.updateslot = UPDATE;
1823                 } else {
1824                         ah->slottime = slottime;
1825                         ath9k_hw_init_global_settings(ah);
1826                 }
1827         }
1828
1829         if (changed & BSS_CHANGED_P2P_PS)
1830                 ath9k_p2p_bss_info_changed(sc, vif);
1831
1832         if (changed & CHECK_ANI)
1833                 ath_check_ani(sc);
1834
1835         mutex_unlock(&sc->mutex);
1836         ath9k_ps_restore(sc);
1837
1838 #undef CHECK_ANI
1839 }
1840
1841 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1842 {
1843         struct ath_softc *sc = hw->priv;
1844         u64 tsf;
1845
1846         mutex_lock(&sc->mutex);
1847         ath9k_ps_wakeup(sc);
1848         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1849         ath9k_ps_restore(sc);
1850         mutex_unlock(&sc->mutex);
1851
1852         return tsf;
1853 }
1854
1855 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1856                           struct ieee80211_vif *vif,
1857                           u64 tsf)
1858 {
1859         struct ath_softc *sc = hw->priv;
1860
1861         mutex_lock(&sc->mutex);
1862         ath9k_ps_wakeup(sc);
1863         ath9k_hw_settsf64(sc->sc_ah, tsf);
1864         ath9k_ps_restore(sc);
1865         mutex_unlock(&sc->mutex);
1866 }
1867
1868 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1869 {
1870         struct ath_softc *sc = hw->priv;
1871
1872         mutex_lock(&sc->mutex);
1873
1874         ath9k_ps_wakeup(sc);
1875         ath9k_hw_reset_tsf(sc->sc_ah);
1876         ath9k_ps_restore(sc);
1877
1878         mutex_unlock(&sc->mutex);
1879 }
1880
1881 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1882                               struct ieee80211_vif *vif,
1883                               enum ieee80211_ampdu_mlme_action action,
1884                               struct ieee80211_sta *sta,
1885                               u16 tid, u16 *ssn, u8 buf_size)
1886 {
1887         struct ath_softc *sc = hw->priv;
1888         bool flush = false;
1889         int ret = 0;
1890
1891         mutex_lock(&sc->mutex);
1892
1893         switch (action) {
1894         case IEEE80211_AMPDU_RX_START:
1895                 break;
1896         case IEEE80211_AMPDU_RX_STOP:
1897                 break;
1898         case IEEE80211_AMPDU_TX_START:
1899                 ath9k_ps_wakeup(sc);
1900                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1901                 if (!ret)
1902                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1903                 ath9k_ps_restore(sc);
1904                 break;
1905         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1906         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1907                 flush = true;
1908         case IEEE80211_AMPDU_TX_STOP_CONT:
1909                 ath9k_ps_wakeup(sc);
1910                 ath_tx_aggr_stop(sc, sta, tid);
1911                 if (!flush)
1912                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1913                 ath9k_ps_restore(sc);
1914                 break;
1915         case IEEE80211_AMPDU_TX_OPERATIONAL:
1916                 ath9k_ps_wakeup(sc);
1917                 ath_tx_aggr_resume(sc, sta, tid);
1918                 ath9k_ps_restore(sc);
1919                 break;
1920         default:
1921                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1922         }
1923
1924         mutex_unlock(&sc->mutex);
1925
1926         return ret;
1927 }
1928
1929 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1930                              struct survey_info *survey)
1931 {
1932         struct ath_softc *sc = hw->priv;
1933         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1934         struct ieee80211_supported_band *sband;
1935         struct ieee80211_channel *chan;
1936         int pos;
1937
1938         if (config_enabled(CONFIG_ATH9K_TX99))
1939                 return -EOPNOTSUPP;
1940
1941         spin_lock_bh(&common->cc_lock);
1942         if (idx == 0)
1943                 ath_update_survey_stats(sc);
1944
1945         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1946         if (sband && idx >= sband->n_channels) {
1947                 idx -= sband->n_channels;
1948                 sband = NULL;
1949         }
1950
1951         if (!sband)
1952                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1953
1954         if (!sband || idx >= sband->n_channels) {
1955                 spin_unlock_bh(&common->cc_lock);
1956                 return -ENOENT;
1957         }
1958
1959         chan = &sband->channels[idx];
1960         pos = chan->hw_value;
1961         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1962         survey->channel = chan;
1963         spin_unlock_bh(&common->cc_lock);
1964
1965         return 0;
1966 }
1967
1968 static void ath9k_enable_dynack(struct ath_softc *sc)
1969 {
1970 #ifdef CONFIG_ATH9K_DYNACK
1971         u32 rfilt;
1972         struct ath_hw *ah = sc->sc_ah;
1973
1974         ath_dynack_reset(ah);
1975
1976         ah->dynack.enabled = true;
1977         rfilt = ath_calcrxfilter(sc);
1978         ath9k_hw_setrxfilter(ah, rfilt);
1979 #endif
1980 }
1981
1982 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1983                                      s16 coverage_class)
1984 {
1985         struct ath_softc *sc = hw->priv;
1986         struct ath_hw *ah = sc->sc_ah;
1987
1988         if (config_enabled(CONFIG_ATH9K_TX99))
1989                 return;
1990
1991         mutex_lock(&sc->mutex);
1992
1993         if (coverage_class >= 0) {
1994                 ah->coverage_class = coverage_class;
1995                 if (ah->dynack.enabled) {
1996                         u32 rfilt;
1997
1998                         ah->dynack.enabled = false;
1999                         rfilt = ath_calcrxfilter(sc);
2000                         ath9k_hw_setrxfilter(ah, rfilt);
2001                 }
2002                 ath9k_ps_wakeup(sc);
2003                 ath9k_hw_init_global_settings(ah);
2004                 ath9k_ps_restore(sc);
2005         } else if (!ah->dynack.enabled) {
2006                 ath9k_enable_dynack(sc);
2007         }
2008
2009         mutex_unlock(&sc->mutex);
2010 }
2011
2012 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2013                                  bool sw_pending)
2014 {
2015         int i, npend = 0;
2016
2017         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2018                 if (!ATH_TXQ_SETUP(sc, i))
2019                         continue;
2020
2021                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2022                                                  sw_pending);
2023                 if (npend)
2024                         break;
2025         }
2026
2027         return !!npend;
2028 }
2029
2030 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2031                         u32 queues, bool drop)
2032 {
2033         struct ath_softc *sc = hw->priv;
2034
2035         mutex_lock(&sc->mutex);
2036         __ath9k_flush(hw, queues, drop, true);
2037         mutex_unlock(&sc->mutex);
2038 }
2039
2040 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2041                    bool sw_pending)
2042 {
2043         struct ath_softc *sc = hw->priv;
2044         struct ath_hw *ah = sc->sc_ah;
2045         struct ath_common *common = ath9k_hw_common(ah);
2046         int timeout;
2047         bool drain_txq;
2048
2049         cancel_delayed_work_sync(&sc->tx_complete_work);
2050
2051         if (ah->ah_flags & AH_UNPLUGGED) {
2052                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2053                 return;
2054         }
2055
2056         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2057                 ath_dbg(common, ANY, "Device not present\n");
2058                 return;
2059         }
2060
2061         spin_lock_bh(&sc->chan_lock);
2062         timeout = sc->cur_chan->flush_timeout;
2063         spin_unlock_bh(&sc->chan_lock);
2064
2065         ath_dbg(common, CHAN_CTX,
2066                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2067
2068         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2069                                timeout) > 0)
2070                 drop = false;
2071
2072         if (drop) {
2073                 ath9k_ps_wakeup(sc);
2074                 spin_lock_bh(&sc->sc_pcu_lock);
2075                 drain_txq = ath_drain_all_txq(sc);
2076                 spin_unlock_bh(&sc->sc_pcu_lock);
2077
2078                 if (!drain_txq)
2079                         ath_reset(sc, NULL);
2080
2081                 ath9k_ps_restore(sc);
2082         }
2083
2084         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2085 }
2086
2087 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2088 {
2089         struct ath_softc *sc = hw->priv;
2090
2091         return ath9k_has_tx_pending(sc, true);
2092 }
2093
2094 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2095 {
2096         struct ath_softc *sc = hw->priv;
2097         struct ath_hw *ah = sc->sc_ah;
2098         struct ieee80211_vif *vif;
2099         struct ath_vif *avp;
2100         struct ath_buf *bf;
2101         struct ath_tx_status ts;
2102         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2103         int status;
2104
2105         vif = sc->beacon.bslot[0];
2106         if (!vif)
2107                 return 0;
2108
2109         if (!vif->bss_conf.enable_beacon)
2110                 return 0;
2111
2112         avp = (void *)vif->drv_priv;
2113
2114         if (!sc->beacon.tx_processed && !edma) {
2115                 tasklet_disable(&sc->bcon_tasklet);
2116
2117                 bf = avp->av_bcbuf;
2118                 if (!bf || !bf->bf_mpdu)
2119                         goto skip;
2120
2121                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2122                 if (status == -EINPROGRESS)
2123                         goto skip;
2124
2125                 sc->beacon.tx_processed = true;
2126                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2127
2128 skip:
2129                 tasklet_enable(&sc->bcon_tasklet);
2130         }
2131
2132         return sc->beacon.tx_last;
2133 }
2134
2135 static int ath9k_get_stats(struct ieee80211_hw *hw,
2136                            struct ieee80211_low_level_stats *stats)
2137 {
2138         struct ath_softc *sc = hw->priv;
2139         struct ath_hw *ah = sc->sc_ah;
2140         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2141
2142         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2143         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2144         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2145         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2146         return 0;
2147 }
2148
2149 static u32 fill_chainmask(u32 cap, u32 new)
2150 {
2151         u32 filled = 0;
2152         int i;
2153
2154         for (i = 0; cap && new; i++, cap >>= 1) {
2155                 if (!(cap & BIT(0)))
2156                         continue;
2157
2158                 if (new & BIT(0))
2159                         filled |= BIT(i);
2160
2161                 new >>= 1;
2162         }
2163
2164         return filled;
2165 }
2166
2167 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2168 {
2169         if (AR_SREV_9300_20_OR_LATER(ah))
2170                 return true;
2171
2172         switch (val & 0x7) {
2173         case 0x1:
2174         case 0x3:
2175         case 0x7:
2176                 return true;
2177         case 0x2:
2178                 return (ah->caps.rx_chainmask == 1);
2179         default:
2180                 return false;
2181         }
2182 }
2183
2184 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2185 {
2186         struct ath_softc *sc = hw->priv;
2187         struct ath_hw *ah = sc->sc_ah;
2188
2189         if (ah->caps.rx_chainmask != 1)
2190                 rx_ant |= tx_ant;
2191
2192         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2193                 return -EINVAL;
2194
2195         sc->ant_rx = rx_ant;
2196         sc->ant_tx = tx_ant;
2197
2198         if (ah->caps.rx_chainmask == 1)
2199                 return 0;
2200
2201         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2202         if (AR_SREV_9100(ah))
2203                 ah->rxchainmask = 0x7;
2204         else
2205                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2206
2207         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2208         ath9k_cmn_reload_chainmask(ah);
2209
2210         return 0;
2211 }
2212
2213 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2214 {
2215         struct ath_softc *sc = hw->priv;
2216
2217         *tx_ant = sc->ant_tx;
2218         *rx_ant = sc->ant_rx;
2219         return 0;
2220 }
2221
2222 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2223 {
2224         struct ath_softc *sc = hw->priv;
2225         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2226         set_bit(ATH_OP_SCANNING, &common->op_flags);
2227 }
2228
2229 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2230 {
2231         struct ath_softc *sc = hw->priv;
2232         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2233         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2234 }
2235
2236 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2237
2238 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2239                          struct ieee80211_scan_request *hw_req)
2240 {
2241         struct cfg80211_scan_request *req = &hw_req->req;
2242         struct ath_softc *sc = hw->priv;
2243         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2244         int ret = 0;
2245
2246         mutex_lock(&sc->mutex);
2247
2248         if (WARN_ON(sc->offchannel.scan_req)) {
2249                 ret = -EBUSY;
2250                 goto out;
2251         }
2252
2253         ath9k_ps_wakeup(sc);
2254         set_bit(ATH_OP_SCANNING, &common->op_flags);
2255         sc->offchannel.scan_vif = vif;
2256         sc->offchannel.scan_req = req;
2257         sc->offchannel.scan_idx = 0;
2258
2259         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2260                 vif->addr);
2261
2262         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2263                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2264                 ath_offchannel_next(sc);
2265         }
2266
2267 out:
2268         mutex_unlock(&sc->mutex);
2269
2270         return ret;
2271 }
2272
2273 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2274                                  struct ieee80211_vif *vif)
2275 {
2276         struct ath_softc *sc = hw->priv;
2277         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2278
2279         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2280
2281         mutex_lock(&sc->mutex);
2282         del_timer_sync(&sc->offchannel.timer);
2283         ath_scan_complete(sc, true);
2284         mutex_unlock(&sc->mutex);
2285 }
2286
2287 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2288                                    struct ieee80211_vif *vif,
2289                                    struct ieee80211_channel *chan, int duration,
2290                                    enum ieee80211_roc_type type)
2291 {
2292         struct ath_softc *sc = hw->priv;
2293         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2294         int ret = 0;
2295
2296         mutex_lock(&sc->mutex);
2297
2298         if (WARN_ON(sc->offchannel.roc_vif)) {
2299                 ret = -EBUSY;
2300                 goto out;
2301         }
2302
2303         ath9k_ps_wakeup(sc);
2304         sc->offchannel.roc_vif = vif;
2305         sc->offchannel.roc_chan = chan;
2306         sc->offchannel.roc_duration = duration;
2307
2308         ath_dbg(common, CHAN_CTX,
2309                 "RoC request on vif: %pM, type: %d duration: %d\n",
2310                 vif->addr, type, duration);
2311
2312         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2313                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2314                 ath_offchannel_next(sc);
2315         }
2316
2317 out:
2318         mutex_unlock(&sc->mutex);
2319
2320         return ret;
2321 }
2322
2323 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2324 {
2325         struct ath_softc *sc = hw->priv;
2326         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2327
2328         mutex_lock(&sc->mutex);
2329
2330         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2331         del_timer_sync(&sc->offchannel.timer);
2332
2333         if (sc->offchannel.roc_vif) {
2334                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2335                         ath_roc_complete(sc, true);
2336         }
2337
2338         mutex_unlock(&sc->mutex);
2339
2340         return 0;
2341 }
2342
2343 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2344                              struct ieee80211_chanctx_conf *conf)
2345 {
2346         struct ath_softc *sc = hw->priv;
2347         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2348         struct ath_chanctx *ctx, **ptr;
2349         int pos;
2350
2351         mutex_lock(&sc->mutex);
2352
2353         ath_for_each_chanctx(sc, ctx) {
2354                 if (ctx->assigned)
2355                         continue;
2356
2357                 ptr = (void *) conf->drv_priv;
2358                 *ptr = ctx;
2359                 ctx->assigned = true;
2360                 pos = ctx - &sc->chanctx[0];
2361                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2362
2363                 ath_dbg(common, CHAN_CTX,
2364                         "Add channel context: %d MHz\n",
2365                         conf->def.chan->center_freq);
2366
2367                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2368                 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_ASSIGN);
2369
2370                 mutex_unlock(&sc->mutex);
2371                 return 0;
2372         }
2373
2374         mutex_unlock(&sc->mutex);
2375         return -ENOSPC;
2376 }
2377
2378
2379 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2380                                  struct ieee80211_chanctx_conf *conf)
2381 {
2382         struct ath_softc *sc = hw->priv;
2383         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2384         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2385
2386         mutex_lock(&sc->mutex);
2387
2388         ath_dbg(common, CHAN_CTX,
2389                 "Remove channel context: %d MHz\n",
2390                 conf->def.chan->center_freq);
2391
2392         ctx->assigned = false;
2393         ctx->hw_queue_base = 0;
2394         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2395
2396         mutex_unlock(&sc->mutex);
2397 }
2398
2399 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2400                                  struct ieee80211_chanctx_conf *conf,
2401                                  u32 changed)
2402 {
2403         struct ath_softc *sc = hw->priv;
2404         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2405         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2406
2407         mutex_lock(&sc->mutex);
2408         ath_dbg(common, CHAN_CTX,
2409                 "Change channel context: %d MHz\n",
2410                 conf->def.chan->center_freq);
2411         ath_chanctx_set_channel(sc, ctx, &conf->def);
2412         mutex_unlock(&sc->mutex);
2413 }
2414
2415 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2416                                     struct ieee80211_vif *vif,
2417                                     struct ieee80211_chanctx_conf *conf)
2418 {
2419         struct ath_softc *sc = hw->priv;
2420         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2421         struct ath_vif *avp = (void *)vif->drv_priv;
2422         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2423         int i;
2424
2425         mutex_lock(&sc->mutex);
2426
2427         ath_dbg(common, CHAN_CTX,
2428                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2429                 vif->addr, vif->type, vif->p2p,
2430                 conf->def.chan->center_freq);
2431
2432         avp->chanctx = ctx;
2433         ctx->nvifs_assigned++;
2434         list_add_tail(&avp->list, &ctx->vifs);
2435         ath9k_calculate_summary_state(sc, ctx);
2436         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2437                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2438
2439         mutex_unlock(&sc->mutex);
2440
2441         return 0;
2442 }
2443
2444 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2445                                        struct ieee80211_vif *vif,
2446                                        struct ieee80211_chanctx_conf *conf)
2447 {
2448         struct ath_softc *sc = hw->priv;
2449         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2450         struct ath_vif *avp = (void *)vif->drv_priv;
2451         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2452         int ac;
2453
2454         mutex_lock(&sc->mutex);
2455
2456         ath_dbg(common, CHAN_CTX,
2457                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2458                 vif->addr, vif->type, vif->p2p,
2459                 conf->def.chan->center_freq);
2460
2461         avp->chanctx = NULL;
2462         ctx->nvifs_assigned--;
2463         list_del(&avp->list);
2464         ath9k_calculate_summary_state(sc, ctx);
2465         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2466                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2467
2468         mutex_unlock(&sc->mutex);
2469 }
2470
2471 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2472                                  struct ieee80211_vif *vif)
2473 {
2474         struct ath_softc *sc = hw->priv;
2475         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2476         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2477         struct ath_beacon_config *cur_conf;
2478         struct ath_chanctx *go_ctx;
2479         unsigned long timeout;
2480         bool changed = false;
2481         u32 beacon_int;
2482
2483         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2484                 return;
2485
2486         if (!avp->chanctx)
2487                 return;
2488
2489         mutex_lock(&sc->mutex);
2490
2491         spin_lock_bh(&sc->chan_lock);
2492         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2493                 changed = true;
2494         spin_unlock_bh(&sc->chan_lock);
2495
2496         if (!changed)
2497                 goto out;
2498
2499         go_ctx = ath_is_go_chanctx_present(sc);
2500
2501         if (go_ctx) {
2502                 /*
2503                  * Wait till the GO interface gets a chance
2504                  * to send out an NoA.
2505                  */
2506                 spin_lock_bh(&sc->chan_lock);
2507                 sc->sched.mgd_prepare_tx = true;
2508                 cur_conf = &go_ctx->beacon;
2509                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2510                 spin_unlock_bh(&sc->chan_lock);
2511
2512                 timeout = usecs_to_jiffies(beacon_int);
2513                 init_completion(&sc->go_beacon);
2514
2515                 if (wait_for_completion_timeout(&sc->go_beacon,
2516                                                 timeout) == 0)
2517                         ath_dbg(common, CHAN_CTX,
2518                                 "Failed to send new NoA\n");
2519         }
2520
2521         ath_dbg(common, CHAN_CTX,
2522                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2523                 __func__, vif->addr);
2524
2525         spin_lock_bh(&sc->chan_lock);
2526         sc->next_chan = avp->chanctx;
2527         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2528         spin_unlock_bh(&sc->chan_lock);
2529
2530         ath_chanctx_set_next(sc, true);
2531 out:
2532         mutex_unlock(&sc->mutex);
2533 }
2534
2535 void ath9k_fill_chanctx_ops(void)
2536 {
2537         if (!ath9k_is_chanctx_enabled())
2538                 return;
2539
2540         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2541         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2542         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2543         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2544         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2545         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2546         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2547         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2548         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2549         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2550 }
2551
2552 #endif
2553
2554 struct ieee80211_ops ath9k_ops = {
2555         .tx                 = ath9k_tx,
2556         .start              = ath9k_start,
2557         .stop               = ath9k_stop,
2558         .add_interface      = ath9k_add_interface,
2559         .change_interface   = ath9k_change_interface,
2560         .remove_interface   = ath9k_remove_interface,
2561         .config             = ath9k_config,
2562         .configure_filter   = ath9k_configure_filter,
2563         .sta_state          = ath9k_sta_state,
2564         .sta_notify         = ath9k_sta_notify,
2565         .conf_tx            = ath9k_conf_tx,
2566         .bss_info_changed   = ath9k_bss_info_changed,
2567         .set_key            = ath9k_set_key,
2568         .get_tsf            = ath9k_get_tsf,
2569         .set_tsf            = ath9k_set_tsf,
2570         .reset_tsf          = ath9k_reset_tsf,
2571         .ampdu_action       = ath9k_ampdu_action,
2572         .get_survey         = ath9k_get_survey,
2573         .rfkill_poll        = ath9k_rfkill_poll_state,
2574         .set_coverage_class = ath9k_set_coverage_class,
2575         .flush              = ath9k_flush,
2576         .tx_frames_pending  = ath9k_tx_frames_pending,
2577         .tx_last_beacon     = ath9k_tx_last_beacon,
2578         .release_buffered_frames = ath9k_release_buffered_frames,
2579         .get_stats          = ath9k_get_stats,
2580         .set_antenna        = ath9k_set_antenna,
2581         .get_antenna        = ath9k_get_antenna,
2582
2583 #ifdef CONFIG_ATH9K_WOW
2584         .suspend            = ath9k_suspend,
2585         .resume             = ath9k_resume,
2586         .set_wakeup         = ath9k_set_wakeup,
2587 #endif
2588
2589 #ifdef CONFIG_ATH9K_DEBUGFS
2590         .get_et_sset_count  = ath9k_get_et_sset_count,
2591         .get_et_stats       = ath9k_get_et_stats,
2592         .get_et_strings     = ath9k_get_et_strings,
2593 #endif
2594
2595 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2596         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2597 #endif
2598         .sw_scan_start      = ath9k_sw_scan_start,
2599         .sw_scan_complete   = ath9k_sw_scan_complete,
2600 };