drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_func.h>
  27 #include <linux/mmc/card.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/firmware.h>
  30 #include <linux/module.h>
  31 #include <linux/bcma/bcma.h>
  32 #include <linux/debugfs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/platform_data/brcmfmac-sdio.h>
  35 #include <linux/moduleparam.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio_host.h"
  43 #include "sdio_chip.h"
  44 #include "nvram.h"
  45
  46 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  47
  48 #ifdef DEBUG
  49
  50 #define BRCMF_TRAP_INFO_SIZE    80
  51
  52 #define CBUF_LEN        (128)
  53
  54 /* Device console log buffer state */
  55 #define CONSOLE_BUFFER_MAX      2024
  56
  57 struct rte_log_le {
  58         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  59         __le32 buf_size;
  60         __le32 idx;
  61         char *_buf_compat;      /* Redundant pointer for backward compat. */
  62 };
  63
  64 struct rte_console {
  65         /* Virtual UART
  66          * When there is no UART (e.g. Quickturn),
  67          * the host should write a complete
  68          * input line directly into cbuf and then write
  69          * the length into vcons_in.
  70          * This may also be used when there is a real UART
  71          * (at risk of conflicting with
  72          * the real UART).  vcons_out is currently unused.
  73          */
  74         uint vcons_in;
  75         uint vcons_out;
  76
  77         /* Output (logging) buffer
  78          * Console output is written to a ring buffer log_buf at index log_idx.
  79          * The host may read the output when it sees log_idx advance.
  80          * Output will be lost if the output wraps around faster than the host
  81          * polls.
  82          */
  83         struct rte_log_le log_le;
  84
  85         /* Console input line buffer
  86          * Characters are read one at a time into cbuf
  87          * until <CR> is received, then
  88          * the buffer is processed as a command line.
  89          * Also used for virtual UART.
  90          */
  91         uint cbuf_idx;
  92         char cbuf[CBUF_LEN];
  93 };
  94
  95 #endif                          /* DEBUG */
  96 #include <chipcommon.h>
  97
  98 #include "dhd_bus.h"
  99 #include "dhd_dbg.h"
 100 #include "tracepoint.h"
 101
 102 #define TXQLEN          2048    /* bulk tx queue length */
 103 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 104 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 105 #define PRIOMASK        7
 106
 107 #define TXRETRIES       2       /* # of retries for tx frames */
 108
 109 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 110                                  one scheduling */
 111
 112 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 113                                  one scheduling */
 114
 115 #define BRCMF_DEFAULT_TXGLOM_SIZE       32  /* max tx frames in glom chain */
 116
 117 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 118
 119 #define MEMBLOCK        2048    /* Block size used for downloading
 120                                  of dongle image */
 121 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 122                                  biggest possible glom */
 123
 124 #define BRCMF_FIRSTREAD (1 << 6)
 125
 126
 127 /* SBSDIO_DEVICE_CTL */
 128
 129 /* 1: device will assert busy signal when receiving CMD53 */
 130 #define SBSDIO_DEVCTL_SETBUSY           0x01
 131 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 132 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 133 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 134 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 135 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 136  * sdio bus power cycle to clear (rev 9) */
 137 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 138 /* Force SD->SB reset mapping (rev 11) */
 139 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 140 /*   Determined by CoreControl bit */
 141 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 142 /*   Force backplane reset */
 143 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 144 /*   Force no backplane reset */
 145 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 146
 147 /* direct(mapped) cis space */
 148
 149 /* MAPPED common CIS address */
 150 #define SBSDIO_CIS_BASE_COMMON          0x1000
 151 /* maximum bytes in one CIS */
 152 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 153 /* cis offset addr is < 17 bits */
 154 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 155
 156 /* manfid tuple length, include tuple, link bytes */
 157 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 158
 159 /* intstatus */
 160 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 161 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 162 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 163 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 164 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 165 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 166 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 167 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 168 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 169 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 170 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 171 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 172 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 173 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 174 #define I_PC            (1 << 10)       /* descriptor error */
 175 #define I_PD            (1 << 11)       /* data error */
 176 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 177 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 178 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 179 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 180 #define I_RI            (1 << 16)       /* Receive Interrupt */
 181 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 182 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 183 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 184 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 185 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 186 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 187 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 188 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 189 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 190 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 191 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 192 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 193
 194 /* corecontrol */
 195 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 196 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 197 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 198 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 199 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 200 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 201
 202 /* SDA_FRAMECTRL */
 203 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 204 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 205 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 206 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 207
 208 /*
 209  * Software allocation of To SB Mailbox resources
 210  */
 211
 212 /* tosbmailbox bits corresponding to intstatus bits */
 213 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 214 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 215 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 216 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 217
 218 /* tosbmailboxdata */
 219 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 220
 221 /*
 222  * Software allocation of To Host Mailbox resources
 223  */
 224
 225 /* intstatus bits */
 226 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 227 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 228 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 229 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 230
 231 /* tohostmailboxdata */
 232 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 233 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 234 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 235 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 236
 237 #define HMB_DATA_FCDATA_MASK    0xff000000
 238 #define HMB_DATA_FCDATA_SHIFT   24
 239
 240 #define HMB_DATA_VERSION_MASK   0x00ff0000
 241 #define HMB_DATA_VERSION_SHIFT  16
 242
 243 /*
 244  * Software-defined protocol header
 245  */
 246
 247 /* Current protocol version */
 248 #define SDPCM_PROT_VERSION      4
 249
 250 /*
 251  * Shared structure between dongle and the host.
 252  * The structure contains pointers to trap or assert information.
 253  */
 254 #define SDPCM_SHARED_VERSION       0x0003
 255 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 256 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 257 #define SDPCM_SHARED_ASSERT        0x0200
 258 #define SDPCM_SHARED_TRAP          0x0400
 259
 260 /* Space for header read, limit for data packets */
 261 #define MAX_HDR_READ    (1 << 6)
 262 #define MAX_RX_DATASZ   2048
 263
 264 /* Bump up limit on waiting for HT to account for first startup;
 265  * if the image is doing a CRC calculation before programming the PMU
 266  * for HT availability, it could take a couple hundred ms more, so
 267  * max out at a 1 second (1000000us).
 268  */
 269 #undef PMU_MAX_TRANSITION_DLY
 270 #define PMU_MAX_TRANSITION_DLY 1000000
 271
 272 /* Value for ChipClockCSR during initial setup */
 273 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 274                                         SBSDIO_ALP_AVAIL_REQ)
 275
 276 /* Flags for SDH calls */
 277 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 278
 279 #define BRCMF_IDLE_IMMEDIATE    (-1)    /* Enter idle immediately */
 280 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 281                                          * when idle
 282                                          */
 283 #define BRCMF_IDLE_INTERVAL     1
 284
 285 #define KSO_WAIT_US 50
 286 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 287
 288 /*
 289  * Conversion of 802.1D priority to precedence level
 290  */
 291 static uint prio2prec(u32 prio)
 292 {
 293         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 294                (prio^2) : prio;
 295 }
 296
 297 #ifdef DEBUG
 298 /* Device console log buffer state */
 299 struct brcmf_console {
 300         uint count;             /* Poll interval msec counter */
 301         uint log_addr;          /* Log struct address (fixed) */
 302         struct rte_log_le log_le;       /* Log struct (host copy) */
 303         uint bufsize;           /* Size of log buffer */
 304         u8 *buf;                /* Log buffer (host copy) */
 305         uint last;              /* Last buffer read index */
 306 };
 307
 308 struct brcmf_trap_info {
 309         __le32          type;
 310         __le32          epc;
 311         __le32          cpsr;
 312         __le32          spsr;
 313         __le32          r0;     /* a1 */
 314         __le32          r1;     /* a2 */
 315         __le32          r2;     /* a3 */
 316         __le32          r3;     /* a4 */
 317         __le32          r4;     /* v1 */
 318         __le32          r5;     /* v2 */
 319         __le32          r6;     /* v3 */
 320         __le32          r7;     /* v4 */
 321         __le32          r8;     /* v5 */
 322         __le32          r9;     /* sb/v6 */
 323         __le32          r10;    /* sl/v7 */
 324         __le32          r11;    /* fp/v8 */
 325         __le32          r12;    /* ip */
 326         __le32          r13;    /* sp */
 327         __le32          r14;    /* lr */
 328         __le32          pc;     /* r15 */
 329 };
 330 #endif                          /* DEBUG */
 331
 332 struct sdpcm_shared {
 333         u32 flags;
 334         u32 trap_addr;
 335         u32 assert_exp_addr;
 336         u32 assert_file_addr;
 337         u32 assert_line;
 338         u32 console_addr;       /* Address of struct rte_console */
 339         u32 msgtrace_addr;
 340         u8 tag[32];
 341         u32 brpt_addr;
 342 };
 343
 344 struct sdpcm_shared_le {
 345         __le32 flags;
 346         __le32 trap_addr;
 347         __le32 assert_exp_addr;
 348         __le32 assert_file_addr;
 349         __le32 assert_line;
 350         __le32 console_addr;    /* Address of struct rte_console */
 351         __le32 msgtrace_addr;
 352         u8 tag[32];
 353         __le32 brpt_addr;
 354 };
 355
 356 /* dongle SDIO bus specific header info */
 357 struct brcmf_sdio_hdrinfo {
 358         u8 seq_num;
 359         u8 channel;
 360         u16 len;
 361         u16 len_left;
 362         u16 len_nxtfrm;
 363         u8 dat_offset;
 364         bool lastfrm;
 365         u16 tail_pad;
 366 };
 367
 368 /* misc chip info needed by some of the routines */
 369 /* Private data for SDIO bus interaction */
 370 struct brcmf_sdio {
 371         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 372         struct brcmf_chip *ci;  /* Chip info struct */
 373
 374         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 375
 376         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 377         atomic_t intstatus;     /* Intstatus bits (events) pending */
 378         atomic_t fcstate;       /* State of dongle flow-control */
 379
 380         uint blocksize;         /* Block size of SDIO transfers */
 381         uint roundup;           /* Max roundup limit */
 382
 383         struct pktq txq;        /* Queue length used for flow-control */
 384         u8 flowcontrol; /* per prio flow control bitmask */
 385         u8 tx_seq;              /* Transmit sequence number (next) */
 386         u8 tx_max;              /* Maximum transmit sequence allowed */
 387
 388         u8 *hdrbuf;             /* buffer for handling rx frame */
 389         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 390         u8 rx_seq;              /* Receive sequence number (expected) */
 391         struct brcmf_sdio_hdrinfo cur_read;
 392                                 /* info of current read frame */
 393         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 394         bool rxpending;         /* Data frame pending in dongle */
 395
 396         uint rxbound;           /* Rx frames to read before resched */
 397         uint txbound;           /* Tx frames to send before resched */
 398         uint txminmax;
 399
 400         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 401         struct sk_buff_head glom; /* Packet list for glommed superframe */
 402         uint glomerr;           /* Glom packet read errors */
 403
 404         u8 *rxbuf;              /* Buffer for receiving control packets */
 405         uint rxblen;            /* Allocated length of rxbuf */
 406         u8 *rxctl;              /* Aligned pointer into rxbuf */
 407         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 408         uint rxlen;             /* Length of valid data in buffer */
 409         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 410
 411         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 412
 413         bool intr;              /* Use interrupts */
 414         bool poll;              /* Use polling */
 415         atomic_t ipend;         /* Device interrupt is pending */
 416         uint spurious;          /* Count of spurious interrupts */
 417         uint pollrate;          /* Ticks between device polls */
 418         uint polltick;          /* Tick counter */
 419
 420 #ifdef DEBUG
 421         uint console_interval;
 422         struct brcmf_console console;   /* Console output polling support */
 423         uint console_addr;      /* Console address from shared struct */
 424 #endif                          /* DEBUG */
 425
 426         uint clkstate;          /* State of sd and backplane clock(s) */
 427         bool activity;          /* Activity flag for clock down */
 428         s32 idletime;           /* Control for activity timeout */
 429         s32 idlecount;  /* Activity timeout counter */
 430         s32 idleclock;  /* How to set bus driver when idle */
 431         bool rxflow_mode;       /* Rx flow control mode */
 432         bool rxflow;            /* Is rx flow control on */
 433         bool alp_only;          /* Don't use HT clock (ALP only) */
 434
 435         u8 *ctrl_frame_buf;
 436         u32 ctrl_frame_len;
 437         bool ctrl_frame_stat;
 438
 439         spinlock_t txqlock;
 440         wait_queue_head_t ctrl_wait;
 441         wait_queue_head_t dcmd_resp_wait;
 442
 443         struct timer_list timer;
 444         struct completion watchdog_wait;
 445         struct task_struct *watchdog_tsk;
 446         bool wd_timer_valid;
 447         uint save_ms;
 448
 449         struct workqueue_struct *brcmf_wq;
 450         struct work_struct datawork;
 451         atomic_t dpc_tskcnt;
 452
 453         bool txoff;             /* Transmit flow-controlled */
 454         struct brcmf_sdio_count sdcnt;
 455         bool sr_enabled; /* SaveRestore enabled */
 456         bool sleeping; /* SDIO bus sleeping */
 457
 458         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 459         bool txglom;            /* host tx glomming enable flag */
 460         u16 head_align;         /* buffer pointer alignment */
 461         u16 sgentry_align;      /* scatter-gather buffer alignment */
 462 };
 463
 464 /* clkstate */
 465 #define CLK_NONE        0
 466 #define CLK_SDONLY      1
 467 #define CLK_PENDING     2
 468 #define CLK_AVAIL       3
 469
 470 #ifdef DEBUG
 471 static int qcount[NUMPRIO];
 472 #endif                          /* DEBUG */
 473
 474 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 475
 476 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 477
 478 /* Retry count for register access failures */
 479 static const uint retry_limit = 2;
 480
 481 /* Limit on rounding up frames */
 482 static const uint max_roundup = 512;
 483
 484 #define ALIGNMENT  4
 485
 486 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
 487 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
 488 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
 489
 490 enum brcmf_sdio_frmtype {
 491         BRCMF_SDIO_FT_NORMAL,
 492         BRCMF_SDIO_FT_SUPER,
 493         BRCMF_SDIO_FT_SUB,
 494 };
 495
 496 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 497 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 498 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 499 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 500 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 501 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 502 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 503 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 504 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 505 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 506 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 507 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 508 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 509 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 510 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 511 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 512 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 513 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 514
 515 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 516 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 517 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 518 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 519 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 520 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 521 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 522 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 523 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 524 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 525 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 526 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 527 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 528 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 529 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 530 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 531 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 532 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 533
 534 struct brcmf_firmware_names {
 535         u32 chipid;
 536         u32 revmsk;
 537         const char *bin;
 538         const char *nv;
 539 };
 540
 541 enum brcmf_firmware_type {
 542         BRCMF_FIRMWARE_BIN,
 543         BRCMF_FIRMWARE_NVRAM
 544 };
 545
 546 #define BRCMF_FIRMWARE_NVRAM(name) \
 547         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 548
 549 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 550         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 551         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 552         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 553         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 554         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 555         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 556         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 557         { BCM43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 558         { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
 559 };
 560
 561
 562 static const struct firmware *brcmf_sdio_get_fw(struct brcmf_sdio *bus,
 563                                                   enum brcmf_firmware_type type)
 564 {
 565         const struct firmware *fw;
 566         const char *name;
 567         int err, i;
 568
 569         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 570                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 571                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 572                         switch (type) {
 573                         case BRCMF_FIRMWARE_BIN:
 574                                 name = brcmf_fwname_data[i].bin;
 575                                 break;
 576                         case BRCMF_FIRMWARE_NVRAM:
 577                                 name = brcmf_fwname_data[i].nv;
 578                                 break;
 579                         default:
 580                                 brcmf_err("invalid firmware type (%d)\n", type);
 581                                 return NULL;
 582                         }
 583                         goto found;
 584                 }
 585         }
 586         brcmf_err("Unknown chipid %d [%d]\n",
 587                   bus->ci->chip, bus->ci->chiprev);
 588         return NULL;
 589
 590 found:
 591         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 592         if ((err) || (!fw)) {
 593                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 594                 return NULL;
 595         }
 596
 597         return fw;
 598 }
 599
 600 static void pkt_align(struct sk_buff *p, int len, int align)
 601 {
 602         uint datalign;
 603         datalign = (unsigned long)(p->data);
 604         datalign = roundup(datalign, (align)) - datalign;
 605         if (datalign)
 606                 skb_pull(p, datalign);
 607         __skb_trim(p, len);
 608 }
 609
 610 /* To check if there's window offered */
 611 static bool data_ok(struct brcmf_sdio *bus)
 612 {
 613         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 614                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 615 }
 616
 617 /*
 618  * Reads a register in the SDIO hardware block. This block occupies a series of
 619  * adresses on the 32 bit backplane bus.
 620  */
 621 static int
 622 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 623 {
 624         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 625         int ret;
 626
 627         *regvar = brcmf_sdiod_regrl(bus->sdiodev,
 628                                     bus->ci->c_inf[idx].base + offset, &ret);
 629
 630         return ret;
 631 }
 632
 633 static int
 634 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 635 {
 636         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 637         int ret;
 638
 639         brcmf_sdiod_regwl(bus->sdiodev,
 640                           bus->ci->c_inf[idx].base + reg_offset,
 641                           regval, &ret);
 642
 643         return ret;
 644 }
 645
 646 static int
 647 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 648 {
 649         u8 wr_val = 0, rd_val, cmp_val, bmask;
 650         int err = 0;
 651         int try_cnt = 0;
 652
 653         brcmf_dbg(TRACE, "Enter\n");
 654
 655         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 656         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 657         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 658                           wr_val, &err);
 659         if (err) {
 660                 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
 661                 return err;
 662         }
 663
 664         if (on) {
 665                 /* device WAKEUP through KSO:
 666                  * write bit 0 & read back until
 667                  * both bits 0 (kso bit) & 1 (dev on status) are set
 668                  */
 669                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 670                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 671                 bmask = cmp_val;
 672                 usleep_range(2000, 3000);
 673         } else {
 674                 /* Put device to sleep, turn off KSO */
 675                 cmp_val = 0;
 676                 /* only check for bit0, bit1(dev on status) may not
 677                  * get cleared right away
 678                  */
 679                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 680         }
 681
 682         do {
 683                 /* reliable KSO bit set/clr:
 684                  * the sdiod sleep write access is synced to PMU 32khz clk
 685                  * just one write attempt may fail,
 686                  * read it back until it matches written value
 687                  */
 688                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 689                                            &err);
 690                 if (((rd_val & bmask) == cmp_val) && !err)
 691                         break;
 692                 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
 693                           try_cnt, MAX_KSO_ATTEMPTS, err);
 694                 udelay(KSO_WAIT_US);
 695                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 696                                   wr_val, &err);
 697         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 698
 699         return err;
 700 }
 701
 702 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 703
 704 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 705
 706 /* Turn backplane clock on or off */
 707 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 708 {
 709         int err;
 710         u8 clkctl, clkreq, devctl;
 711         unsigned long timeout;
 712
 713         brcmf_dbg(SDIO, "Enter\n");
 714
 715         clkctl = 0;
 716
 717         if (bus->sr_enabled) {
 718                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 719                 return 0;
 720         }
 721
 722         if (on) {
 723                 /* Request HT Avail */
 724                 clkreq =
 725                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 726
 727                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 728                                   clkreq, &err);
 729                 if (err) {
 730                         brcmf_err("HT Avail request error: %d\n", err);
 731                         return -EBADE;
 732                 }
 733
 734                 /* Check current status */
 735                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 736                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 737                 if (err) {
 738                         brcmf_err("HT Avail read error: %d\n", err);
 739                         return -EBADE;
 740                 }
 741
 742                 /* Go to pending and await interrupt if appropriate */
 743                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 744                         /* Allow only clock-available interrupt */
 745                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 746                                                    SBSDIO_DEVICE_CTL, &err);
 747                         if (err) {
 748                                 brcmf_err("Devctl error setting CA: %d\n",
 749                                           err);
 750                                 return -EBADE;
 751                         }
 752
 753                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 754                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 755                                           devctl, &err);
 756                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 757                         bus->clkstate = CLK_PENDING;
 758
 759                         return 0;
 760                 } else if (bus->clkstate == CLK_PENDING) {
 761                         /* Cancel CA-only interrupt filter */
 762                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 763                                                    SBSDIO_DEVICE_CTL, &err);
 764                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 765                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 766                                           devctl, &err);
 767                 }
 768
 769                 /* Otherwise, wait here (polling) for HT Avail */
 770                 timeout = jiffies +
 771                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 772                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 773                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 774                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 775                                                    &err);
 776                         if (time_after(jiffies, timeout))
 777                                 break;
 778                         else
 779                                 usleep_range(5000, 10000);
 780                 }
 781                 if (err) {
 782                         brcmf_err("HT Avail request error: %d\n", err);
 783                         return -EBADE;
 784                 }
 785                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 786                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 787                                   PMU_MAX_TRANSITION_DLY, clkctl);
 788                         return -EBADE;
 789                 }
 790
 791                 /* Mark clock available */
 792                 bus->clkstate = CLK_AVAIL;
 793                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 794
 795 #if defined(DEBUG)
 796                 if (!bus->alp_only) {
 797                         if (SBSDIO_ALPONLY(clkctl))
 798                                 brcmf_err("HT Clock should be on\n");
 799                 }
 800 #endif                          /* defined (DEBUG) */
 801
 802                 bus->activity = true;
 803         } else {
 804                 clkreq = 0;
 805
 806                 if (bus->clkstate == CLK_PENDING) {
 807                         /* Cancel CA-only interrupt filter */
 808                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 809                                                    SBSDIO_DEVICE_CTL, &err);
 810                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 811                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 812                                           devctl, &err);
 813                 }
 814
 815                 bus->clkstate = CLK_SDONLY;
 816                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 817                                   clkreq, &err);
 818                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 819                 if (err) {
 820                         brcmf_err("Failed access turning clock off: %d\n",
 821                                   err);
 822                         return -EBADE;
 823                 }
 824         }
 825         return 0;
 826 }
 827
 828 /* Change idle/active SD state */
 829 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 830 {
 831         brcmf_dbg(SDIO, "Enter\n");
 832
 833         if (on)
 834                 bus->clkstate = CLK_SDONLY;
 835         else
 836                 bus->clkstate = CLK_NONE;
 837
 838         return 0;
 839 }
 840
 841 /* Transition SD and backplane clock readiness */
 842 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 843 {
 844 #ifdef DEBUG
 845         uint oldstate = bus->clkstate;
 846 #endif                          /* DEBUG */
 847
 848         brcmf_dbg(SDIO, "Enter\n");
 849
 850         /* Early exit if we're already there */
 851         if (bus->clkstate == target) {
 852                 if (target == CLK_AVAIL) {
 853                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 854                         bus->activity = true;
 855                 }
 856                 return 0;
 857         }
 858
 859         switch (target) {
 860         case CLK_AVAIL:
 861                 /* Make sure SD clock is available */
 862                 if (bus->clkstate == CLK_NONE)
 863                         brcmf_sdio_sdclk(bus, true);
 864                 /* Now request HT Avail on the backplane */
 865                 brcmf_sdio_htclk(bus, true, pendok);
 866                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 867                 bus->activity = true;
 868                 break;
 869
 870         case CLK_SDONLY:
 871                 /* Remove HT request, or bring up SD clock */
 872                 if (bus->clkstate == CLK_NONE)
 873                         brcmf_sdio_sdclk(bus, true);
 874                 else if (bus->clkstate == CLK_AVAIL)
 875                         brcmf_sdio_htclk(bus, false, false);
 876                 else
 877                         brcmf_err("request for %d -> %d\n",
 878                                   bus->clkstate, target);
 879                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 880                 break;
 881
 882         case CLK_NONE:
 883                 /* Make sure to remove HT request */
 884                 if (bus->clkstate == CLK_AVAIL)
 885                         brcmf_sdio_htclk(bus, false, false);
 886                 /* Now remove the SD clock */
 887                 brcmf_sdio_sdclk(bus, false);
 888                 brcmf_sdio_wd_timer(bus, 0);
 889                 break;
 890         }
 891 #ifdef DEBUG
 892         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 893 #endif                          /* DEBUG */
 894
 895         return 0;
 896 }
 897
 898 static int
 899 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 900 {
 901         int err = 0;
 902         brcmf_dbg(TRACE, "Enter\n");
 903         brcmf_dbg(SDIO, "request %s currently %s\n",
 904                   (sleep ? "SLEEP" : "WAKE"),
 905                   (bus->sleeping ? "SLEEP" : "WAKE"));
 906
 907         /* If SR is enabled control bus state with KSO */
 908         if (bus->sr_enabled) {
 909                 /* Done if we're already in the requested state */
 910                 if (sleep == bus->sleeping)
 911                         goto end;
 912
 913                 /* Going to sleep */
 914                 if (sleep) {
 915                         /* Don't sleep if something is pending */
 916                         if (atomic_read(&bus->intstatus) ||
 917                             atomic_read(&bus->ipend) > 0 ||
 918                             (!atomic_read(&bus->fcstate) &&
 919                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 920                             data_ok(bus)))
 921                                  return -EBUSY;
 922                         err = brcmf_sdio_kso_control(bus, false);
 923                         /* disable watchdog */
 924                         if (!err)
 925                                 brcmf_sdio_wd_timer(bus, 0);
 926                 } else {
 927                         bus->idlecount = 0;
 928                         err = brcmf_sdio_kso_control(bus, true);
 929                 }
 930                 if (!err) {
 931                         /* Change state */
 932                         bus->sleeping = sleep;
 933                         brcmf_dbg(SDIO, "new state %s\n",
 934                                   (sleep ? "SLEEP" : "WAKE"));
 935                 } else {
 936                         brcmf_err("error while changing bus sleep state %d\n",
 937                                   err);
 938                         return err;
 939                 }
 940         }
 941
 942 end:
 943         /* control clocks */
 944         if (sleep) {
 945                 if (!bus->sr_enabled)
 946                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 947         } else {
 948                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 949         }
 950
 951         return err;
 952
 953 }
 954
 955 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
 956 {
 957         u32 intstatus = 0;
 958         u32 hmb_data;
 959         u8 fcbits;
 960         int ret;
 961
 962         brcmf_dbg(SDIO, "Enter\n");
 963
 964         /* Read mailbox data and ack that we did so */
 965         ret = r_sdreg32(bus, &hmb_data,
 966                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
 967
 968         if (ret == 0)
 969                 w_sdreg32(bus, SMB_INT_ACK,
 970                           offsetof(struct sdpcmd_regs, tosbmailbox));
 971         bus->sdcnt.f1regdata += 2;
 972
 973         /* Dongle recomposed rx frames, accept them again */
 974         if (hmb_data & HMB_DATA_NAKHANDLED) {
 975                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
 976                           bus->rx_seq);
 977                 if (!bus->rxskip)
 978                         brcmf_err("unexpected NAKHANDLED!\n");
 979
 980                 bus->rxskip = false;
 981                 intstatus |= I_HMB_FRAME_IND;
 982         }
 983
 984         /*
 985          * DEVREADY does not occur with gSPI.
 986          */
 987         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
 988                 bus->sdpcm_ver =
 989                     (hmb_data & HMB_DATA_VERSION_MASK) >>
 990                     HMB_DATA_VERSION_SHIFT;
 991                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
 992                         brcmf_err("Version mismatch, dongle reports %d, "
 993                                   "expecting %d\n",
 994                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
 995                 else
 996                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
 997                                   bus->sdpcm_ver);
 998         }
 999
1000         /*
1001          * Flow Control has been moved into the RX headers and this out of band
1002          * method isn't used any more.
1003          * remaining backward compatible with older dongles.
1004          */
1005         if (hmb_data & HMB_DATA_FC) {
1006                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1007                                                         HMB_DATA_FCDATA_SHIFT;
1008
1009                 if (fcbits & ~bus->flowcontrol)
1010                         bus->sdcnt.fc_xoff++;
1011
1012                 if (bus->flowcontrol & ~fcbits)
1013                         bus->sdcnt.fc_xon++;
1014
1015                 bus->sdcnt.fc_rcvd++;
1016                 bus->flowcontrol = fcbits;
1017         }
1018
1019         /* Shouldn't be any others */
1020         if (hmb_data & ~(HMB_DATA_DEVREADY |
1021                          HMB_DATA_NAKHANDLED |
1022                          HMB_DATA_FC |
1023                          HMB_DATA_FWREADY |
1024                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1025                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1026                           hmb_data);
1027
1028         return intstatus;
1029 }
1030
1031 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1032 {
1033         uint retries = 0;
1034         u16 lastrbc;
1035         u8 hi, lo;
1036         int err;
1037
1038         brcmf_err("%sterminate frame%s\n",
1039                   abort ? "abort command, " : "",
1040                   rtx ? ", send NAK" : "");
1041
1042         if (abort)
1043                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1044
1045         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1046                           SFC_RF_TERM, &err);
1047         bus->sdcnt.f1regdata++;
1048
1049         /* Wait until the packet has been flushed (device/FIFO stable) */
1050         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1051                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1052                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1053                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1054                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1055                 bus->sdcnt.f1regdata += 2;
1056
1057                 if ((hi == 0) && (lo == 0))
1058                         break;
1059
1060                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1061                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1062                                   lastrbc, (hi << 8) + lo);
1063                 }
1064                 lastrbc = (hi << 8) + lo;
1065         }
1066
1067         if (!retries)
1068                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1069         else
1070                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1071
1072         if (rtx) {
1073                 bus->sdcnt.rxrtx++;
1074                 err = w_sdreg32(bus, SMB_NAK,
1075                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1076
1077                 bus->sdcnt.f1regdata++;
1078                 if (err == 0)
1079                         bus->rxskip = true;
1080         }
1081
1082         /* Clear partial in any case */
1083         bus->cur_read.len = 0;
1084 }
1085
1086 /* return total length of buffer chain */
1087 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1088 {
1089         struct sk_buff *p;
1090         uint total;
1091
1092         total = 0;
1093         skb_queue_walk(&bus->glom, p)
1094                 total += p->len;
1095         return total;
1096 }
1097
1098 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1099 {
1100         struct sk_buff *cur, *next;
1101
1102         skb_queue_walk_safe(&bus->glom, cur, next) {
1103                 skb_unlink(cur, &bus->glom);
1104                 brcmu_pkt_buf_free_skb(cur);
1105         }
1106 }
1107
1108 /**
1109  * brcmfmac sdio bus specific header
1110  * This is the lowest layer header wrapped on the packets transmitted between
1111  * host and WiFi dongle which contains information needed for SDIO core and
1112  * firmware
1113  *
1114  * It consists of 3 parts: hardware header, hardware extension header and
1115  * software header
1116  * hardware header (frame tag) - 4 bytes
1117  * Byte 0~1: Frame length
1118  * Byte 2~3: Checksum, bit-wise inverse of frame length
1119  * hardware extension header - 8 bytes
1120  * Tx glom mode only, N/A for Rx or normal Tx
1121  * Byte 0~1: Packet length excluding hw frame tag
1122  * Byte 2: Reserved
1123  * Byte 3: Frame flags, bit 0: last frame indication
1124  * Byte 4~5: Reserved
1125  * Byte 6~7: Tail padding length
1126  * software header - 8 bytes
1127  * Byte 0: Rx/Tx sequence number
1128  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1129  * Byte 2: Length of next data frame, reserved for Tx
1130  * Byte 3: Data offset
1131  * Byte 4: Flow control bits, reserved for Tx
1132  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1133  * Byte 6~7: Reserved
1134  */
1135 #define SDPCM_HWHDR_LEN                 4
1136 #define SDPCM_HWEXT_LEN                 8
1137 #define SDPCM_SWHDR_LEN                 8
1138 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1139 /* software header */
1140 #define SDPCM_SEQ_MASK                  0x000000ff
1141 #define SDPCM_SEQ_WRAP                  256
1142 #define SDPCM_CHANNEL_MASK              0x00000f00
1143 #define SDPCM_CHANNEL_SHIFT             8
1144 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1145 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1146 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1147 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1148 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1149 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1150 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1151 #define SDPCM_NEXTLEN_SHIFT             16
1152 #define SDPCM_DOFFSET_MASK              0xff000000
1153 #define SDPCM_DOFFSET_SHIFT             24
1154 #define SDPCM_FCMASK_MASK               0x000000ff
1155 #define SDPCM_WINDOW_MASK               0x0000ff00
1156 #define SDPCM_WINDOW_SHIFT              8
1157
1158 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1159 {
1160         u32 hdrvalue;
1161         hdrvalue = *(u32 *)swheader;
1162         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1163 }
1164
1165 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1166                               struct brcmf_sdio_hdrinfo *rd,
1167                               enum brcmf_sdio_frmtype type)
1168 {
1169         u16 len, checksum;
1170         u8 rx_seq, fc, tx_seq_max;
1171         u32 swheader;
1172
1173         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1174
1175         /* hw header */
1176         len = get_unaligned_le16(header);
1177         checksum = get_unaligned_le16(header + sizeof(u16));
1178         /* All zero means no more to read */
1179         if (!(len | checksum)) {
1180                 bus->rxpending = false;
1181                 return -ENODATA;
1182         }
1183         if ((u16)(~(len ^ checksum))) {
1184                 brcmf_err("HW header checksum error\n");
1185                 bus->sdcnt.rx_badhdr++;
1186                 brcmf_sdio_rxfail(bus, false, false);
1187                 return -EIO;
1188         }
1189         if (len < SDPCM_HDRLEN) {
1190                 brcmf_err("HW header length error\n");
1191                 return -EPROTO;
1192         }
1193         if (type == BRCMF_SDIO_FT_SUPER &&
1194             (roundup(len, bus->blocksize) != rd->len)) {
1195                 brcmf_err("HW superframe header length error\n");
1196                 return -EPROTO;
1197         }
1198         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1199                 brcmf_err("HW subframe header length error\n");
1200                 return -EPROTO;
1201         }
1202         rd->len = len;
1203
1204         /* software header */
1205         header += SDPCM_HWHDR_LEN;
1206         swheader = le32_to_cpu(*(__le32 *)header);
1207         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1208                 brcmf_err("Glom descriptor found in superframe head\n");
1209                 rd->len = 0;
1210                 return -EINVAL;
1211         }
1212         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1213         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1214         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1215             type != BRCMF_SDIO_FT_SUPER) {
1216                 brcmf_err("HW header length too long\n");
1217                 bus->sdcnt.rx_toolong++;
1218                 brcmf_sdio_rxfail(bus, false, false);
1219                 rd->len = 0;
1220                 return -EPROTO;
1221         }
1222         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1223                 brcmf_err("Wrong channel for superframe\n");
1224                 rd->len = 0;
1225                 return -EINVAL;
1226         }
1227         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1228             rd->channel != SDPCM_EVENT_CHANNEL) {
1229                 brcmf_err("Wrong channel for subframe\n");
1230                 rd->len = 0;
1231                 return -EINVAL;
1232         }
1233         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1234         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1235                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1236                 bus->sdcnt.rx_badhdr++;
1237                 brcmf_sdio_rxfail(bus, false, false);
1238                 rd->len = 0;
1239                 return -ENXIO;
1240         }
1241         if (rd->seq_num != rx_seq) {
1242                 brcmf_err("seq %d: sequence number error, expect %d\n",
1243                           rx_seq, rd->seq_num);
1244                 bus->sdcnt.rx_badseq++;
1245                 rd->seq_num = rx_seq;
1246         }
1247         /* no need to check the reset for subframe */
1248         if (type == BRCMF_SDIO_FT_SUB)
1249                 return 0;
1250         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1251         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1252                 /* only warm for NON glom packet */
1253                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1254                         brcmf_err("seq %d: next length error\n", rx_seq);
1255                 rd->len_nxtfrm = 0;
1256         }
1257         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1258         fc = swheader & SDPCM_FCMASK_MASK;
1259         if (bus->flowcontrol != fc) {
1260                 if (~bus->flowcontrol & fc)
1261                         bus->sdcnt.fc_xoff++;
1262                 if (bus->flowcontrol & ~fc)
1263                         bus->sdcnt.fc_xon++;
1264                 bus->sdcnt.fc_rcvd++;
1265                 bus->flowcontrol = fc;
1266         }
1267         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1268         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1269                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1270                 tx_seq_max = bus->tx_seq + 2;
1271         }
1272         bus->tx_max = tx_seq_max;
1273
1274         return 0;
1275 }
1276
1277 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1278 {
1279         *(__le16 *)header = cpu_to_le16(frm_length);
1280         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1281 }
1282
1283 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1284                               struct brcmf_sdio_hdrinfo *hd_info)
1285 {
1286         u32 hdrval;
1287         u8 hdr_offset;
1288
1289         brcmf_sdio_update_hwhdr(header, hd_info->len);
1290         hdr_offset = SDPCM_HWHDR_LEN;
1291
1292         if (bus->txglom) {
1293                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1294                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1295                 hdrval = (u16)hd_info->tail_pad << 16;
1296                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1297                 hdr_offset += SDPCM_HWEXT_LEN;
1298         }
1299
1300         hdrval = hd_info->seq_num;
1301         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1302                   SDPCM_CHANNEL_MASK;
1303         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1304                   SDPCM_DOFFSET_MASK;
1305         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1306         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1307         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1308 }
1309
1310 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1311 {
1312         u16 dlen, totlen;
1313         u8 *dptr, num = 0;
1314         u16 sublen;
1315         struct sk_buff *pfirst, *pnext;
1316
1317         int errcode;
1318         u8 doff, sfdoff;
1319
1320         struct brcmf_sdio_hdrinfo rd_new;
1321
1322         /* If packets, issue read(s) and send up packet chain */
1323         /* Return sequence numbers consumed? */
1324
1325         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1326                   bus->glomd, skb_peek(&bus->glom));
1327
1328         /* If there's a descriptor, generate the packet chain */
1329         if (bus->glomd) {
1330                 pfirst = pnext = NULL;
1331                 dlen = (u16) (bus->glomd->len);
1332                 dptr = bus->glomd->data;
1333                 if (!dlen || (dlen & 1)) {
1334                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1335                                   dlen);
1336                         dlen = 0;
1337                 }
1338
1339                 for (totlen = num = 0; dlen; num++) {
1340                         /* Get (and move past) next length */
1341                         sublen = get_unaligned_le16(dptr);
1342                         dlen -= sizeof(u16);
1343                         dptr += sizeof(u16);
1344                         if ((sublen < SDPCM_HDRLEN) ||
1345                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1346                                 brcmf_err("descriptor len %d bad: %d\n",
1347                                           num, sublen);
1348                                 pnext = NULL;
1349                                 break;
1350                         }
1351                         if (sublen % bus->sgentry_align) {
1352                                 brcmf_err("sublen %d not multiple of %d\n",
1353                                           sublen, bus->sgentry_align);
1354                         }
1355                         totlen += sublen;
1356
1357                         /* For last frame, adjust read len so total
1358                                  is a block multiple */
1359                         if (!dlen) {
1360                                 sublen +=
1361                                     (roundup(totlen, bus->blocksize) - totlen);
1362                                 totlen = roundup(totlen, bus->blocksize);
1363                         }
1364
1365                         /* Allocate/chain packet for next subframe */
1366                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1367                         if (pnext == NULL) {
1368                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1369                                           num, sublen);
1370                                 break;
1371                         }
1372                         skb_queue_tail(&bus->glom, pnext);
1373
1374                         /* Adhere to start alignment requirements */
1375                         pkt_align(pnext, sublen, bus->sgentry_align);
1376                 }
1377
1378                 /* If all allocations succeeded, save packet chain
1379                          in bus structure */
1380                 if (pnext) {
1381                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1382                                   totlen, num);
1383                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1384                             totlen != bus->cur_read.len) {
1385                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1386                                           bus->cur_read.len, totlen, rxseq);
1387                         }
1388                         pfirst = pnext = NULL;
1389                 } else {
1390                         brcmf_sdio_free_glom(bus);
1391                         num = 0;
1392                 }
1393
1394                 /* Done with descriptor packet */
1395                 brcmu_pkt_buf_free_skb(bus->glomd);
1396                 bus->glomd = NULL;
1397                 bus->cur_read.len = 0;
1398         }
1399
1400         /* Ok -- either we just generated a packet chain,
1401                  or had one from before */
1402         if (!skb_queue_empty(&bus->glom)) {
1403                 if (BRCMF_GLOM_ON()) {
1404                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1405                         skb_queue_walk(&bus->glom, pnext) {
1406                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1407                                           pnext, (u8 *) (pnext->data),
1408                                           pnext->len, pnext->len);
1409                         }
1410                 }
1411
1412                 pfirst = skb_peek(&bus->glom);
1413                 dlen = (u16) brcmf_sdio_glom_len(bus);
1414
1415                 /* Do an SDIO read for the superframe.  Configurable iovar to
1416                  * read directly into the chained packet, or allocate a large
1417                  * packet and and copy into the chain.
1418                  */
1419                 sdio_claim_host(bus->sdiodev->func[1]);
1420                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1421                                                  &bus->glom, dlen);
1422                 sdio_release_host(bus->sdiodev->func[1]);
1423                 bus->sdcnt.f2rxdata++;
1424
1425                 /* On failure, kill the superframe, allow a couple retries */
1426                 if (errcode < 0) {
1427                         brcmf_err("glom read of %d bytes failed: %d\n",
1428                                   dlen, errcode);
1429
1430                         sdio_claim_host(bus->sdiodev->func[1]);
1431                         if (bus->glomerr++ < 3) {
1432                                 brcmf_sdio_rxfail(bus, true, true);
1433                         } else {
1434                                 bus->glomerr = 0;
1435                                 brcmf_sdio_rxfail(bus, true, false);
1436                                 bus->sdcnt.rxglomfail++;
1437                                 brcmf_sdio_free_glom(bus);
1438                         }
1439                         sdio_release_host(bus->sdiodev->func[1]);
1440                         return 0;
1441                 }
1442
1443                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1444                                    pfirst->data, min_t(int, pfirst->len, 48),
1445                                    "SUPERFRAME:\n");
1446
1447                 rd_new.seq_num = rxseq;
1448                 rd_new.len = dlen;
1449                 sdio_claim_host(bus->sdiodev->func[1]);
1450                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1451                                              BRCMF_SDIO_FT_SUPER);
1452                 sdio_release_host(bus->sdiodev->func[1]);
1453                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1454
1455                 /* Remove superframe header, remember offset */
1456                 skb_pull(pfirst, rd_new.dat_offset);
1457                 sfdoff = rd_new.dat_offset;
1458                 num = 0;
1459
1460                 /* Validate all the subframe headers */
1461                 skb_queue_walk(&bus->glom, pnext) {
1462                         /* leave when invalid subframe is found */
1463                         if (errcode)
1464                                 break;
1465
1466                         rd_new.len = pnext->len;
1467                         rd_new.seq_num = rxseq++;
1468                         sdio_claim_host(bus->sdiodev->func[1]);
1469                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1470                                                      BRCMF_SDIO_FT_SUB);
1471                         sdio_release_host(bus->sdiodev->func[1]);
1472                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1473                                            pnext->data, 32, "subframe:\n");
1474
1475                         num++;
1476                 }
1477
1478                 if (errcode) {
1479                         /* Terminate frame on error, request
1480                                  a couple retries */
1481                         sdio_claim_host(bus->sdiodev->func[1]);
1482                         if (bus->glomerr++ < 3) {
1483                                 /* Restore superframe header space */
1484                                 skb_push(pfirst, sfdoff);
1485                                 brcmf_sdio_rxfail(bus, true, true);
1486                         } else {
1487                                 bus->glomerr = 0;
1488                                 brcmf_sdio_rxfail(bus, true, false);
1489                                 bus->sdcnt.rxglomfail++;
1490                                 brcmf_sdio_free_glom(bus);
1491                         }
1492                         sdio_release_host(bus->sdiodev->func[1]);
1493                         bus->cur_read.len = 0;
1494                         return 0;
1495                 }
1496
1497                 /* Basic SD framing looks ok - process each packet (header) */
1498
1499                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1500                         dptr = (u8 *) (pfirst->data);
1501                         sublen = get_unaligned_le16(dptr);
1502                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1503
1504                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1505                                            dptr, pfirst->len,
1506                                            "Rx Subframe Data:\n");
1507
1508                         __skb_trim(pfirst, sublen);
1509                         skb_pull(pfirst, doff);
1510
1511                         if (pfirst->len == 0) {
1512                                 skb_unlink(pfirst, &bus->glom);
1513                                 brcmu_pkt_buf_free_skb(pfirst);
1514                                 continue;
1515                         }
1516
1517                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1518                                            pfirst->data,
1519                                            min_t(int, pfirst->len, 32),
1520                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1521                                            bus->glom.qlen, pfirst, pfirst->data,
1522                                            pfirst->len, pfirst->next,
1523                                            pfirst->prev);
1524                         skb_unlink(pfirst, &bus->glom);
1525                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1526                         bus->sdcnt.rxglompkts++;
1527                 }
1528
1529                 bus->sdcnt.rxglomframes++;
1530         }
1531         return num;
1532 }
1533
1534 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1535                                      bool *pending)
1536 {
1537         DECLARE_WAITQUEUE(wait, current);
1538         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1539
1540         /* Wait until control frame is available */
1541         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1542         set_current_state(TASK_INTERRUPTIBLE);
1543
1544         while (!(*condition) && (!signal_pending(current) && timeout))
1545                 timeout = schedule_timeout(timeout);
1546
1547         if (signal_pending(current))
1548                 *pending = true;
1549
1550         set_current_state(TASK_RUNNING);
1551         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1552
1553         return timeout;
1554 }
1555
1556 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1557 {
1558         if (waitqueue_active(&bus->dcmd_resp_wait))
1559                 wake_up_interruptible(&bus->dcmd_resp_wait);
1560
1561         return 0;
1562 }
1563 static void
1564 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1565 {
1566         uint rdlen, pad;
1567         u8 *buf = NULL, *rbuf;
1568         int sdret;
1569
1570         brcmf_dbg(TRACE, "Enter\n");
1571
1572         if (bus->rxblen)
1573                 buf = vzalloc(bus->rxblen);
1574         if (!buf)
1575                 goto done;
1576
1577         rbuf = bus->rxbuf;
1578         pad = ((unsigned long)rbuf % bus->head_align);
1579         if (pad)
1580                 rbuf += (bus->head_align - pad);
1581
1582         /* Copy the already-read portion over */
1583         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1584         if (len <= BRCMF_FIRSTREAD)
1585                 goto gotpkt;
1586
1587         /* Raise rdlen to next SDIO block to avoid tail command */
1588         rdlen = len - BRCMF_FIRSTREAD;
1589         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1590                 pad = bus->blocksize - (rdlen % bus->blocksize);
1591                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1592                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1593                         rdlen += pad;
1594         } else if (rdlen % bus->head_align) {
1595                 rdlen += bus->head_align - (rdlen % bus->head_align);
1596         }
1597
1598         /* Drop if the read is too big or it exceeds our maximum */
1599         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1600                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1601                           rdlen, bus->sdiodev->bus_if->maxctl);
1602                 brcmf_sdio_rxfail(bus, false, false);
1603                 goto done;
1604         }
1605
1606         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1607                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1608                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1609                 bus->sdcnt.rx_toolong++;
1610                 brcmf_sdio_rxfail(bus, false, false);
1611                 goto done;
1612         }
1613
1614         /* Read remain of frame body */
1615         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1616         bus->sdcnt.f2rxdata++;
1617
1618         /* Control frame failures need retransmission */
1619         if (sdret < 0) {
1620                 brcmf_err("read %d control bytes failed: %d\n",
1621                           rdlen, sdret);
1622                 bus->sdcnt.rxc_errors++;
1623                 brcmf_sdio_rxfail(bus, true, true);
1624                 goto done;
1625         } else
1626                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1627
1628 gotpkt:
1629
1630         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1631                            buf, len, "RxCtrl:\n");
1632
1633         /* Point to valid data and indicate its length */
1634         spin_lock_bh(&bus->rxctl_lock);
1635         if (bus->rxctl) {
1636                 brcmf_err("last control frame is being processed.\n");
1637                 spin_unlock_bh(&bus->rxctl_lock);
1638                 vfree(buf);
1639                 goto done;
1640         }
1641         bus->rxctl = buf + doff;
1642         bus->rxctl_orig = buf;
1643         bus->rxlen = len - doff;
1644         spin_unlock_bh(&bus->rxctl_lock);
1645
1646 done:
1647         /* Awake any waiters */
1648         brcmf_sdio_dcmd_resp_wake(bus);
1649 }
1650
1651 /* Pad read to blocksize for efficiency */
1652 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1653 {
1654         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1655                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1656                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1657                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1658                         *rdlen += *pad;
1659         } else if (*rdlen % bus->head_align) {
1660                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1661         }
1662 }
1663
1664 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1665 {
1666         struct sk_buff *pkt;            /* Packet for event or data frames */
1667         u16 pad;                /* Number of pad bytes to read */
1668         uint rxleft = 0;        /* Remaining number of frames allowed */
1669         int ret;                /* Return code from calls */
1670         uint rxcount = 0;       /* Total frames read */
1671         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1672         u8 head_read = 0;
1673
1674         brcmf_dbg(TRACE, "Enter\n");
1675
1676         /* Not finished unless we encounter no more frames indication */
1677         bus->rxpending = true;
1678
1679         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1680              !bus->rxskip && rxleft && brcmf_bus_ready(bus->sdiodev->bus_if);
1681              rd->seq_num++, rxleft--) {
1682
1683                 /* Handle glomming separately */
1684                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1685                         u8 cnt;
1686                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1687                                   bus->glomd, skb_peek(&bus->glom));
1688                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1689                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1690                         rd->seq_num += cnt - 1;
1691                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1692                         continue;
1693                 }
1694
1695                 rd->len_left = rd->len;
1696                 /* read header first for unknow frame length */
1697                 sdio_claim_host(bus->sdiodev->func[1]);
1698                 if (!rd->len) {
1699                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1700                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1701                         bus->sdcnt.f2rxhdrs++;
1702                         if (ret < 0) {
1703                                 brcmf_err("RXHEADER FAILED: %d\n",
1704                                           ret);
1705                                 bus->sdcnt.rx_hdrfail++;
1706                                 brcmf_sdio_rxfail(bus, true, true);
1707                                 sdio_release_host(bus->sdiodev->func[1]);
1708                                 continue;
1709                         }
1710
1711                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1712                                            bus->rxhdr, SDPCM_HDRLEN,
1713                                            "RxHdr:\n");
1714
1715                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1716                                                BRCMF_SDIO_FT_NORMAL)) {
1717                                 sdio_release_host(bus->sdiodev->func[1]);
1718                                 if (!bus->rxpending)
1719                                         break;
1720                                 else
1721                                         continue;
1722                         }
1723
1724                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1725                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1726                                                         rd->len,
1727                                                         rd->dat_offset);
1728                                 /* prepare the descriptor for the next read */
1729                                 rd->len = rd->len_nxtfrm << 4;
1730                                 rd->len_nxtfrm = 0;
1731                                 /* treat all packet as event if we don't know */
1732                                 rd->channel = SDPCM_EVENT_CHANNEL;
1733                                 sdio_release_host(bus->sdiodev->func[1]);
1734                                 continue;
1735                         }
1736                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1737                                        rd->len - BRCMF_FIRSTREAD : 0;
1738                         head_read = BRCMF_FIRSTREAD;
1739                 }
1740
1741                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1742
1743                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1744                                             bus->head_align);
1745                 if (!pkt) {
1746                         /* Give up on data, request rtx of events */
1747                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1748                         brcmf_sdio_rxfail(bus, false,
1749                                             RETRYCHAN(rd->channel));
1750                         sdio_release_host(bus->sdiodev->func[1]);
1751                         continue;
1752                 }
1753                 skb_pull(pkt, head_read);
1754                 pkt_align(pkt, rd->len_left, bus->head_align);
1755
1756                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1757                 bus->sdcnt.f2rxdata++;
1758                 sdio_release_host(bus->sdiodev->func[1]);
1759
1760                 if (ret < 0) {
1761                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1762                                   rd->len, rd->channel, ret);
1763                         brcmu_pkt_buf_free_skb(pkt);
1764                         sdio_claim_host(bus->sdiodev->func[1]);
1765                         brcmf_sdio_rxfail(bus, true,
1766                                             RETRYCHAN(rd->channel));
1767                         sdio_release_host(bus->sdiodev->func[1]);
1768                         continue;
1769                 }
1770
1771                 if (head_read) {
1772                         skb_push(pkt, head_read);
1773                         memcpy(pkt->data, bus->rxhdr, head_read);
1774                         head_read = 0;
1775                 } else {
1776                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1777                         rd_new.seq_num = rd->seq_num;
1778                         sdio_claim_host(bus->sdiodev->func[1]);
1779                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1780                                                BRCMF_SDIO_FT_NORMAL)) {
1781                                 rd->len = 0;
1782                                 brcmu_pkt_buf_free_skb(pkt);
1783                         }
1784                         bus->sdcnt.rx_readahead_cnt++;
1785                         if (rd->len != roundup(rd_new.len, 16)) {
1786                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1787                                           rd->len,
1788                                           roundup(rd_new.len, 16) >> 4);
1789                                 rd->len = 0;
1790                                 brcmf_sdio_rxfail(bus, true, true);
1791                                 sdio_release_host(bus->sdiodev->func[1]);
1792                                 brcmu_pkt_buf_free_skb(pkt);
1793                                 continue;
1794                         }
1795                         sdio_release_host(bus->sdiodev->func[1]);
1796                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1797                         rd->channel = rd_new.channel;
1798                         rd->dat_offset = rd_new.dat_offset;
1799
1800                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1801                                              BRCMF_DATA_ON()) &&
1802                                            BRCMF_HDRS_ON(),
1803                                            bus->rxhdr, SDPCM_HDRLEN,
1804                                            "RxHdr:\n");
1805
1806                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1807                                 brcmf_err("readahead on control packet %d?\n",
1808                                           rd_new.seq_num);
1809                                 /* Force retry w/normal header read */
1810                                 rd->len = 0;
1811                                 sdio_claim_host(bus->sdiodev->func[1]);
1812                                 brcmf_sdio_rxfail(bus, false, true);
1813                                 sdio_release_host(bus->sdiodev->func[1]);
1814                                 brcmu_pkt_buf_free_skb(pkt);
1815                                 continue;
1816                         }
1817                 }
1818
1819                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1820                                    pkt->data, rd->len, "Rx Data:\n");
1821
1822                 /* Save superframe descriptor and allocate packet frame */
1823                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1824                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1825                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1826                                           rd->len);
1827                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1828                                                    pkt->data, rd->len,
1829                                                    "Glom Data:\n");
1830                                 __skb_trim(pkt, rd->len);
1831                                 skb_pull(pkt, SDPCM_HDRLEN);
1832                                 bus->glomd = pkt;
1833                         } else {
1834                                 brcmf_err("%s: glom superframe w/o "
1835                                           "descriptor!\n", __func__);
1836                                 sdio_claim_host(bus->sdiodev->func[1]);
1837                                 brcmf_sdio_rxfail(bus, false, false);
1838                                 sdio_release_host(bus->sdiodev->func[1]);
1839                         }
1840                         /* prepare the descriptor for the next read */
1841                         rd->len = rd->len_nxtfrm << 4;
1842                         rd->len_nxtfrm = 0;
1843                         /* treat all packet as event if we don't know */
1844                         rd->channel = SDPCM_EVENT_CHANNEL;
1845                         continue;
1846                 }
1847
1848                 /* Fill in packet len and prio, deliver upward */
1849                 __skb_trim(pkt, rd->len);
1850                 skb_pull(pkt, rd->dat_offset);
1851
1852                 /* prepare the descriptor for the next read */
1853                 rd->len = rd->len_nxtfrm << 4;
1854                 rd->len_nxtfrm = 0;
1855                 /* treat all packet as event if we don't know */
1856                 rd->channel = SDPCM_EVENT_CHANNEL;
1857
1858                 if (pkt->len == 0) {
1859                         brcmu_pkt_buf_free_skb(pkt);
1860                         continue;
1861                 }
1862
1863                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1864         }
1865
1866         rxcount = maxframes - rxleft;
1867         /* Message if we hit the limit */
1868         if (!rxleft)
1869                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1870         else
1871                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1872         /* Back off rxseq if awaiting rtx, update rx_seq */
1873         if (bus->rxskip)
1874                 rd->seq_num--;
1875         bus->rx_seq = rd->seq_num;
1876
1877         return rxcount;
1878 }
1879
1880 static void
1881 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
1882 {
1883         if (waitqueue_active(&bus->ctrl_wait))
1884                 wake_up_interruptible(&bus->ctrl_wait);
1885         return;
1886 }
1887
1888 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1889 {
1890         u16 head_pad;
1891         u8 *dat_buf;
1892
1893         dat_buf = (u8 *)(pkt->data);
1894
1895         /* Check head padding */
1896         head_pad = ((unsigned long)dat_buf % bus->head_align);
1897         if (head_pad) {
1898                 if (skb_headroom(pkt) < head_pad) {
1899                         bus->sdiodev->bus_if->tx_realloc++;
1900                         head_pad = 0;
1901                         if (skb_cow(pkt, head_pad))
1902                                 return -ENOMEM;
1903                 }
1904                 skb_push(pkt, head_pad);
1905                 dat_buf = (u8 *)(pkt->data);
1906                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1907         }
1908         return head_pad;
1909 }
1910
1911 /**
1912  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1913  * bus layer usage.
1914  */
1915 /* flag marking a dummy skb added for DMA alignment requirement */
1916 #define ALIGN_SKB_FLAG          0x8000
1917 /* bit mask of data length chopped from the previous packet */
1918 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1919
1920 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1921                                     struct sk_buff_head *pktq,
1922                                     struct sk_buff *pkt, u16 total_len)
1923 {
1924         struct brcmf_sdio_dev *sdiodev;
1925         struct sk_buff *pkt_pad;
1926         u16 tail_pad, tail_chop, chain_pad;
1927         unsigned int blksize;
1928         bool lastfrm;
1929         int ntail, ret;
1930
1931         sdiodev = bus->sdiodev;
1932         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1933         /* sg entry alignment should be a divisor of block size */
1934         WARN_ON(blksize % bus->sgentry_align);
1935
1936         /* Check tail padding */
1937         lastfrm = skb_queue_is_last(pktq, pkt);
1938         tail_pad = 0;
1939         tail_chop = pkt->len % bus->sgentry_align;
1940         if (tail_chop)
1941                 tail_pad = bus->sgentry_align - tail_chop;
1942         chain_pad = (total_len + tail_pad) % blksize;
1943         if (lastfrm && chain_pad)
1944                 tail_pad += blksize - chain_pad;
1945         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1946                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
1947                                                 bus->head_align);
1948                 if (pkt_pad == NULL)
1949                         return -ENOMEM;
1950                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1951                 if (unlikely(ret < 0)) {
1952                         kfree_skb(pkt_pad);
1953                         return ret;
1954                 }
1955                 memcpy(pkt_pad->data,
1956                        pkt->data + pkt->len - tail_chop,
1957                        tail_chop);
1958                 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1959                 skb_trim(pkt, pkt->len - tail_chop);
1960                 skb_trim(pkt_pad, tail_pad + tail_chop);
1961                 __skb_queue_after(pktq, pkt, pkt_pad);
1962         } else {
1963                 ntail = pkt->data_len + tail_pad -
1964                         (pkt->end - pkt->tail);
1965                 if (skb_cloned(pkt) || ntail > 0)
1966                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1967                                 return -ENOMEM;
1968                 if (skb_linearize(pkt))
1969                         return -ENOMEM;
1970                 __skb_put(pkt, tail_pad);
1971         }
1972
1973         return tail_pad;
1974 }
1975
1976 /**
1977  * brcmf_sdio_txpkt_prep - packet preparation for transmit
1978  * @bus: brcmf_sdio structure pointer
1979  * @pktq: packet list pointer
1980  * @chan: virtual channel to transmit the packet
1981  *
1982  * Processes to be applied to the packet
1983  *      - Align data buffer pointer
1984  *      - Align data buffer length
1985  *      - Prepare header
1986  * Return: negative value if there is error
1987  */
1988 static int
1989 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1990                       uint chan)
1991 {
1992         u16 head_pad, total_len;
1993         struct sk_buff *pkt_next;
1994         u8 txseq;
1995         int ret;
1996         struct brcmf_sdio_hdrinfo hd_info = {0};
1997
1998         txseq = bus->tx_seq;
1999         total_len = 0;
2000         skb_queue_walk(pktq, pkt_next) {
2001                 /* alignment packet inserted in previous
2002                  * loop cycle can be skipped as it is
2003                  * already properly aligned and does not
2004                  * need an sdpcm header.
2005                  */
2006                 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2007                         continue;
2008
2009                 /* align packet data pointer */
2010                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2011                 if (ret < 0)
2012                         return ret;
2013                 head_pad = (u16)ret;
2014                 if (head_pad)
2015                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2016
2017                 total_len += pkt_next->len;
2018
2019                 hd_info.len = pkt_next->len;
2020                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2021                 if (bus->txglom && pktq->qlen > 1) {
2022                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2023                                                        pkt_next, total_len);
2024                         if (ret < 0)
2025                                 return ret;
2026                         hd_info.tail_pad = (u16)ret;
2027                         total_len += (u16)ret;
2028                 }
2029
2030                 hd_info.channel = chan;
2031                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2032                 hd_info.seq_num = txseq++;
2033
2034                 /* Now fill the header */
2035                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2036
2037                 if (BRCMF_BYTES_ON() &&
2038                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2039                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2040                         brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2041                                            "Tx Frame:\n");
2042                 else if (BRCMF_HDRS_ON())
2043                         brcmf_dbg_hex_dump(true, pkt_next,
2044                                            head_pad + bus->tx_hdrlen,
2045                                            "Tx Header:\n");
2046         }
2047         /* Hardware length tag of the first packet should be total
2048          * length of the chain (including padding)
2049          */
2050         if (bus->txglom)
2051                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2052         return 0;
2053 }
2054
2055 /**
2056  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2057  * @bus: brcmf_sdio structure pointer
2058  * @pktq: packet list pointer
2059  *
2060  * Processes to be applied to the packet
2061  *      - Remove head padding
2062  *      - Remove tail padding
2063  */
2064 static void
2065 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2066 {
2067         u8 *hdr;
2068         u32 dat_offset;
2069         u16 tail_pad;
2070         u32 dummy_flags, chop_len;
2071         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2072
2073         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2074                 dummy_flags = *(u32 *)(pkt_next->cb);
2075                 if (dummy_flags & ALIGN_SKB_FLAG) {
2076                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2077                         if (chop_len) {
2078                                 pkt_prev = pkt_next->prev;
2079                                 skb_put(pkt_prev, chop_len);
2080                         }
2081                         __skb_unlink(pkt_next, pktq);
2082                         brcmu_pkt_buf_free_skb(pkt_next);
2083                 } else {
2084                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2085                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2086                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2087                                      SDPCM_DOFFSET_SHIFT;
2088                         skb_pull(pkt_next, dat_offset);
2089                         if (bus->txglom) {
2090                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2091                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2092                         }
2093                 }
2094         }
2095 }
2096
2097 /* Writes a HW/SW header into the packet and sends it. */
2098 /* Assumes: (a) header space already there, (b) caller holds lock */
2099 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2100                             uint chan)
2101 {
2102         int ret;
2103         int i;
2104         struct sk_buff *pkt_next, *tmp;
2105
2106         brcmf_dbg(TRACE, "Enter\n");
2107
2108         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2109         if (ret)
2110                 goto done;
2111
2112         sdio_claim_host(bus->sdiodev->func[1]);
2113         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2114         bus->sdcnt.f2txdata++;
2115
2116         if (ret < 0) {
2117                 /* On failure, abort the command and terminate the frame */
2118                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2119                           ret);
2120                 bus->sdcnt.tx_sderrs++;
2121
2122                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2123                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2124                                   SFC_WF_TERM, NULL);
2125                 bus->sdcnt.f1regdata++;
2126
2127                 for (i = 0; i < 3; i++) {
2128                         u8 hi, lo;
2129                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2130                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2131                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2132                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2133                         bus->sdcnt.f1regdata += 2;
2134                         if ((hi == 0) && (lo == 0))
2135                                 break;
2136                 }
2137         }
2138         sdio_release_host(bus->sdiodev->func[1]);
2139
2140 done:
2141         brcmf_sdio_txpkt_postp(bus, pktq);
2142         if (ret == 0)
2143                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2144         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2145                 __skb_unlink(pkt_next, pktq);
2146                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2147         }
2148         return ret;
2149 }
2150
2151 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2152 {
2153         struct sk_buff *pkt;
2154         struct sk_buff_head pktq;
2155         u32 intstatus = 0;
2156         int ret = 0, prec_out, i;
2157         uint cnt = 0;
2158         u8 tx_prec_map, pkt_num;
2159
2160         brcmf_dbg(TRACE, "Enter\n");
2161
2162         tx_prec_map = ~bus->flowcontrol;
2163
2164         /* Send frames until the limit or some other event */
2165         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2166                 pkt_num = 1;
2167                 __skb_queue_head_init(&pktq);
2168                 if (bus->txglom)
2169                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2170                                         brcmf_sdio_txglomsz);
2171                 pkt_num = min_t(u32, pkt_num,
2172                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2173                 spin_lock_bh(&bus->txqlock);
2174                 for (i = 0; i < pkt_num; i++) {
2175                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2176                                               &prec_out);
2177                         if (pkt == NULL)
2178                                 break;
2179                         __skb_queue_tail(&pktq, pkt);
2180                 }
2181                 spin_unlock_bh(&bus->txqlock);
2182                 if (i == 0)
2183                         break;
2184
2185                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2186                 cnt += i;
2187
2188                 /* In poll mode, need to check for other events */
2189                 if (!bus->intr && cnt) {
2190                         /* Check device status, signal pending interrupt */
2191                         sdio_claim_host(bus->sdiodev->func[1]);
2192                         ret = r_sdreg32(bus, &intstatus,
2193                                         offsetof(struct sdpcmd_regs,
2194                                                  intstatus));
2195                         sdio_release_host(bus->sdiodev->func[1]);
2196                         bus->sdcnt.f2txdata++;
2197                         if (ret != 0)
2198                                 break;
2199                         if (intstatus & bus->hostintmask)
2200                                 atomic_set(&bus->ipend, 1);
2201                 }
2202         }
2203
2204         /* Deflow-control stack if needed */
2205         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2206             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2207                 bus->txoff = false;
2208                 brcmf_txflowblock(bus->sdiodev->dev, false);
2209         }
2210
2211         return cnt;
2212 }
2213
2214 static void brcmf_sdio_bus_stop(struct device *dev)
2215 {
2216         u32 local_hostintmask;
2217         u8 saveclk;
2218         int err;
2219         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2220         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2221         struct brcmf_sdio *bus = sdiodev->bus;
2222
2223         brcmf_dbg(TRACE, "Enter\n");
2224
2225         if (bus->watchdog_tsk) {
2226                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2227                 kthread_stop(bus->watchdog_tsk);
2228                 bus->watchdog_tsk = NULL;
2229         }
2230
2231         if (bus_if->state == BRCMF_BUS_DOWN) {
2232                 sdio_claim_host(sdiodev->func[1]);
2233
2234                 /* Enable clock for device interrupts */
2235                 brcmf_sdio_bus_sleep(bus, false, false);
2236
2237                 /* Disable and clear interrupts at the chip level also */
2238                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2239                 local_hostintmask = bus->hostintmask;
2240                 bus->hostintmask = 0;
2241
2242                 /* Force backplane clocks to assure F2 interrupt propagates */
2243                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2244                                             &err);
2245                 if (!err)
2246                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2247                                           (saveclk | SBSDIO_FORCE_HT), &err);
2248                 if (err)
2249                         brcmf_err("Failed to force clock for F2: err %d\n",
2250                                   err);
2251
2252                 /* Turn off the bus (F2), free any pending packets */
2253                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2254                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2255
2256                 /* Clear any pending interrupts now that F2 is disabled */
2257                 w_sdreg32(bus, local_hostintmask,
2258                           offsetof(struct sdpcmd_regs, intstatus));
2259
2260                 sdio_release_host(sdiodev->func[1]);
2261         }
2262         /* Clear the data packet queues */
2263         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2264
2265         /* Clear any held glomming stuff */
2266         if (bus->glomd)
2267                 brcmu_pkt_buf_free_skb(bus->glomd);
2268         brcmf_sdio_free_glom(bus);
2269
2270         /* Clear rx control and wake any waiters */
2271         spin_lock_bh(&bus->rxctl_lock);
2272         bus->rxlen = 0;
2273         spin_unlock_bh(&bus->rxctl_lock);
2274         brcmf_sdio_dcmd_resp_wake(bus);
2275
2276         /* Reset some F2 state stuff */
2277         bus->rxskip = false;
2278         bus->tx_seq = bus->rx_seq = 0;
2279 }
2280
2281 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2282 {
2283         unsigned long flags;
2284
2285         if (bus->sdiodev->oob_irq_requested) {
2286                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2287                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2288                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2289                         bus->sdiodev->irq_en = true;
2290                 }
2291                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2292         }
2293 }
2294
2295 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2296 {
2297         u8 idx;
2298         u32 addr;
2299         unsigned long val;
2300         int n, ret;
2301
2302         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2303         addr = bus->ci->c_inf[idx].base +
2304                offsetof(struct sdpcmd_regs, intstatus);
2305
2306         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2307         bus->sdcnt.f1regdata++;
2308         if (ret != 0)
2309                 val = 0;
2310
2311         val &= bus->hostintmask;
2312         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2313
2314         /* Clear interrupts */
2315         if (val) {
2316                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2317                 bus->sdcnt.f1regdata++;
2318         }
2319
2320         if (ret) {
2321                 atomic_set(&bus->intstatus, 0);
2322         } else if (val) {
2323                 for_each_set_bit(n, &val, 32)
2324                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2325         }
2326
2327         return ret;
2328 }
2329
2330 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2331 {
2332         u32 newstatus = 0;
2333         unsigned long intstatus;
2334         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2335         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2336         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2337         int err = 0, n;
2338
2339         brcmf_dbg(TRACE, "Enter\n");
2340
2341         sdio_claim_host(bus->sdiodev->func[1]);
2342
2343         /* If waiting for HTAVAIL, check status */
2344         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2345                 u8 clkctl, devctl = 0;
2346
2347 #ifdef DEBUG
2348                 /* Check for inconsistent device control */
2349                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2350                                            SBSDIO_DEVICE_CTL, &err);
2351 #endif                          /* DEBUG */
2352
2353                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2354                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2355                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2356
2357                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2358                           devctl, clkctl);
2359
2360                 if (SBSDIO_HTAV(clkctl)) {
2361                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2362                                                    SBSDIO_DEVICE_CTL, &err);
2363                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2364                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2365                                           devctl, &err);
2366                         bus->clkstate = CLK_AVAIL;
2367                 }
2368         }
2369
2370         /* Make sure backplane clock is on */
2371         brcmf_sdio_bus_sleep(bus, false, true);
2372
2373         /* Pending interrupt indicates new device status */
2374         if (atomic_read(&bus->ipend) > 0) {
2375                 atomic_set(&bus->ipend, 0);
2376                 err = brcmf_sdio_intr_rstatus(bus);
2377         }
2378
2379         /* Start with leftover status bits */
2380         intstatus = atomic_xchg(&bus->intstatus, 0);
2381
2382         /* Handle flow-control change: read new state in case our ack
2383          * crossed another change interrupt.  If change still set, assume
2384          * FC ON for safety, let next loop through do the debounce.
2385          */
2386         if (intstatus & I_HMB_FC_CHANGE) {
2387                 intstatus &= ~I_HMB_FC_CHANGE;
2388                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2389                                 offsetof(struct sdpcmd_regs, intstatus));
2390
2391                 err = r_sdreg32(bus, &newstatus,
2392                                 offsetof(struct sdpcmd_regs, intstatus));
2393                 bus->sdcnt.f1regdata += 2;
2394                 atomic_set(&bus->fcstate,
2395                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2396                 intstatus |= (newstatus & bus->hostintmask);
2397         }
2398
2399         /* Handle host mailbox indication */
2400         if (intstatus & I_HMB_HOST_INT) {
2401                 intstatus &= ~I_HMB_HOST_INT;
2402                 intstatus |= brcmf_sdio_hostmail(bus);
2403         }
2404
2405         sdio_release_host(bus->sdiodev->func[1]);
2406
2407         /* Generally don't ask for these, can get CRC errors... */
2408         if (intstatus & I_WR_OOSYNC) {
2409                 brcmf_err("Dongle reports WR_OOSYNC\n");
2410                 intstatus &= ~I_WR_OOSYNC;
2411         }
2412
2413         if (intstatus & I_RD_OOSYNC) {
2414                 brcmf_err("Dongle reports RD_OOSYNC\n");
2415                 intstatus &= ~I_RD_OOSYNC;
2416         }
2417
2418         if (intstatus & I_SBINT) {
2419                 brcmf_err("Dongle reports SBINT\n");
2420                 intstatus &= ~I_SBINT;
2421         }
2422
2423         /* Would be active due to wake-wlan in gSPI */
2424         if (intstatus & I_CHIPACTIVE) {
2425                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2426                 intstatus &= ~I_CHIPACTIVE;
2427         }
2428
2429         /* Ignore frame indications if rxskip is set */
2430         if (bus->rxskip)
2431                 intstatus &= ~I_HMB_FRAME_IND;
2432
2433         /* On frame indication, read available frames */
2434         if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2435                 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2436                 if (!bus->rxpending)
2437                         intstatus &= ~I_HMB_FRAME_IND;
2438                 rxlimit -= min(framecnt, rxlimit);
2439         }
2440
2441         /* Keep still-pending events for next scheduling */
2442         if (intstatus) {
2443                 for_each_set_bit(n, &intstatus, 32)
2444                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2445         }
2446
2447         brcmf_sdio_clrintr(bus);
2448
2449         if (data_ok(bus) && bus->ctrl_frame_stat &&
2450                 (bus->clkstate == CLK_AVAIL)) {
2451                 int i;
2452
2453                 sdio_claim_host(bus->sdiodev->func[1]);
2454                 err = brcmf_sdiod_send_buf(bus->sdiodev, bus->ctrl_frame_buf,
2455                                            (u32)bus->ctrl_frame_len);
2456
2457                 if (err < 0) {
2458                         /* On failure, abort the command and
2459                                 terminate the frame */
2460                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2461                                   err);
2462                         bus->sdcnt.tx_sderrs++;
2463
2464                         brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2465
2466                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2467                                           SFC_WF_TERM, &err);
2468                         bus->sdcnt.f1regdata++;
2469
2470                         for (i = 0; i < 3; i++) {
2471                                 u8 hi, lo;
2472                                 hi = brcmf_sdiod_regrb(bus->sdiodev,
2473                                                        SBSDIO_FUNC1_WFRAMEBCHI,
2474                                                        &err);
2475                                 lo = brcmf_sdiod_regrb(bus->sdiodev,
2476                                                        SBSDIO_FUNC1_WFRAMEBCLO,
2477                                                        &err);
2478                                 bus->sdcnt.f1regdata += 2;
2479                                 if ((hi == 0) && (lo == 0))
2480                                         break;
2481                         }
2482
2483                 } else {
2484                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2485                 }
2486                 sdio_release_host(bus->sdiodev->func[1]);
2487                 bus->ctrl_frame_stat = false;
2488                 brcmf_sdio_wait_event_wakeup(bus);
2489         }
2490         /* Send queued frames (limit 1 if rx may still be pending) */
2491         else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2492                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2493                  && data_ok(bus)) {
2494                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2495                                             txlimit;
2496                 framecnt = brcmf_sdio_sendfromq(bus, framecnt);
2497                 txlimit -= framecnt;
2498         }
2499
2500         if (!brcmf_bus_ready(bus->sdiodev->bus_if) || (err != 0)) {
2501                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2502                 atomic_set(&bus->intstatus, 0);
2503         } else if (atomic_read(&bus->intstatus) ||
2504                    atomic_read(&bus->ipend) > 0 ||
2505                    (!atomic_read(&bus->fcstate) &&
2506                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2507                     data_ok(bus)) || PKT_AVAILABLE()) {
2508                 atomic_inc(&bus->dpc_tskcnt);
2509         }
2510
2511         /* If we're done for now, turn off clock request. */
2512         if ((bus->clkstate != CLK_PENDING)
2513             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2514                 bus->activity = false;
2515                 brcmf_dbg(SDIO, "idle state\n");
2516                 sdio_claim_host(bus->sdiodev->func[1]);
2517                 brcmf_sdio_bus_sleep(bus, true, false);
2518                 sdio_release_host(bus->sdiodev->func[1]);
2519         }
2520 }
2521
2522 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2523 {
2524         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2525         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2526         struct brcmf_sdio *bus = sdiodev->bus;
2527
2528         return &bus->txq;
2529 }
2530
2531 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2532 {
2533         int ret = -EBADE;
2534         uint datalen, prec;
2535         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2536         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2537         struct brcmf_sdio *bus = sdiodev->bus;
2538         ulong flags;
2539
2540         brcmf_dbg(TRACE, "Enter\n");
2541
2542         datalen = pkt->len;
2543
2544         /* Add space for the header */
2545         skb_push(pkt, bus->tx_hdrlen);
2546         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2547
2548         prec = prio2prec((pkt->priority & PRIOMASK));
2549
2550         /* Check for existing queue, current flow-control,
2551                          pending event, or pending clock */
2552         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2553         bus->sdcnt.fcqueued++;
2554
2555         /* Priority based enq */
2556         spin_lock_irqsave(&bus->txqlock, flags);
2557         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2558                 skb_pull(pkt, bus->tx_hdrlen);
2559                 brcmf_err("out of bus->txq !!!\n");
2560                 ret = -ENOSR;
2561         } else {
2562                 ret = 0;
2563         }
2564
2565         if (pktq_len(&bus->txq) >= TXHI) {
2566                 bus->txoff = true;
2567                 brcmf_txflowblock(bus->sdiodev->dev, true);
2568         }
2569         spin_unlock_irqrestore(&bus->txqlock, flags);
2570
2571 #ifdef DEBUG
2572         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2573                 qcount[prec] = pktq_plen(&bus->txq, prec);
2574 #endif
2575
2576         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2577                 atomic_inc(&bus->dpc_tskcnt);
2578                 queue_work(bus->brcmf_wq, &bus->datawork);
2579         }
2580
2581         return ret;
2582 }
2583
2584 #ifdef DEBUG
2585 #define CONSOLE_LINE_MAX        192
2586
2587 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2588 {
2589         struct brcmf_console *c = &bus->console;
2590         u8 line[CONSOLE_LINE_MAX], ch;
2591         u32 n, idx, addr;
2592         int rv;
2593
2594         /* Don't do anything until FWREADY updates console address */
2595         if (bus->console_addr == 0)
2596                 return 0;
2597
2598         /* Read console log struct */
2599         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2600         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2601                                sizeof(c->log_le));
2602         if (rv < 0)
2603                 return rv;
2604
2605         /* Allocate console buffer (one time only) */
2606         if (c->buf == NULL) {
2607                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2608                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2609                 if (c->buf == NULL)
2610                         return -ENOMEM;
2611         }
2612
2613         idx = le32_to_cpu(c->log_le.idx);
2614
2615         /* Protect against corrupt value */
2616         if (idx > c->bufsize)
2617                 return -EBADE;
2618
2619         /* Skip reading the console buffer if the index pointer
2620          has not moved */
2621         if (idx == c->last)
2622                 return 0;
2623
2624         /* Read the console buffer */
2625         addr = le32_to_cpu(c->log_le.buf);
2626         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2627         if (rv < 0)
2628                 return rv;
2629
2630         while (c->last != idx) {
2631                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2632                         if (c->last == idx) {
2633                                 /* This would output a partial line.
2634                                  * Instead, back up
2635                                  * the buffer pointer and output this
2636                                  * line next time around.
2637                                  */
2638                                 if (c->last >= n)
2639                                         c->last -= n;
2640                                 else
2641                                         c->last = c->bufsize - n;
2642                                 goto break2;
2643                         }
2644                         ch = c->buf[c->last];
2645                         c->last = (c->last + 1) % c->bufsize;
2646                         if (ch == '\n')
2647                                 break;
2648                         line[n] = ch;
2649                 }
2650
2651                 if (n > 0) {
2652                         if (line[n - 1] == '\r')
2653                                 n--;
2654                         line[n] = 0;
2655                         pr_debug("CONSOLE: %s\n", line);
2656                 }
2657         }
2658 break2:
2659
2660         return 0;
2661 }
2662 #endif                          /* DEBUG */
2663
2664 static int brcmf_sdio_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2665 {
2666         int i;
2667         int ret;
2668
2669         bus->ctrl_frame_stat = false;
2670         ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2671
2672         if (ret < 0) {
2673                 /* On failure, abort the command and terminate the frame */
2674                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2675                           ret);
2676                 bus->sdcnt.tx_sderrs++;
2677
2678                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2679
2680                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2681                                   SFC_WF_TERM, NULL);
2682                 bus->sdcnt.f1regdata++;
2683
2684                 for (i = 0; i < 3; i++) {
2685                         u8 hi, lo;
2686                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2687                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2688                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2689                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2690                         bus->sdcnt.f1regdata += 2;
2691                         if (hi == 0 && lo == 0)
2692                                 break;
2693                 }
2694                 return ret;
2695         }
2696
2697         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2698
2699         return ret;
2700 }
2701
2702 static int
2703 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2704 {
2705         u8 *frame;
2706         u16 len, pad;
2707         uint retries = 0;
2708         u8 doff = 0;
2709         int ret = -1;
2710         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2711         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2712         struct brcmf_sdio *bus = sdiodev->bus;
2713         struct brcmf_sdio_hdrinfo hd_info = {0};
2714
2715         brcmf_dbg(TRACE, "Enter\n");
2716
2717         /* Back the pointer to make a room for bus header */
2718         frame = msg - bus->tx_hdrlen;
2719         len = (msglen += bus->tx_hdrlen);
2720
2721         /* Add alignment padding (optional for ctl frames) */
2722         doff = ((unsigned long)frame % bus->head_align);
2723         if (doff) {
2724                 frame -= doff;
2725                 len += doff;
2726                 msglen += doff;
2727                 memset(frame, 0, doff + bus->tx_hdrlen);
2728         }
2729         /* precondition: doff < bus->head_align */
2730         doff += bus->tx_hdrlen;
2731
2732         /* Round send length to next SDIO block */
2733         pad = 0;
2734         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2735                 pad = bus->blocksize - (len % bus->blocksize);
2736                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2737                         pad = 0;
2738         } else if (len % bus->head_align) {
2739                 pad = bus->head_align - (len % bus->head_align);
2740         }
2741         len += pad;
2742
2743         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2744
2745         /* Make sure backplane clock is on */
2746         sdio_claim_host(bus->sdiodev->func[1]);
2747         brcmf_sdio_bus_sleep(bus, false, false);
2748         sdio_release_host(bus->sdiodev->func[1]);
2749
2750         hd_info.len = (u16)msglen;
2751         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2752         hd_info.dat_offset = doff;
2753         hd_info.seq_num = bus->tx_seq;
2754         hd_info.lastfrm = true;
2755         hd_info.tail_pad = pad;
2756         brcmf_sdio_hdpack(bus, frame, &hd_info);
2757
2758         if (bus->txglom)
2759                 brcmf_sdio_update_hwhdr(frame, len);
2760
2761         if (!data_ok(bus)) {
2762                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2763                           bus->tx_max, bus->tx_seq);
2764                 bus->ctrl_frame_stat = true;
2765                 /* Send from dpc */
2766                 bus->ctrl_frame_buf = frame;
2767                 bus->ctrl_frame_len = len;
2768
2769                 wait_event_interruptible_timeout(bus->ctrl_wait,
2770                                                  !bus->ctrl_frame_stat,
2771                                                  msecs_to_jiffies(2000));
2772
2773                 if (!bus->ctrl_frame_stat) {
2774                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2775                         ret = 0;
2776                 } else {
2777                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2778                         ret = -1;
2779                 }
2780         }
2781
2782         if (ret == -1) {
2783                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2784                                    frame, len, "Tx Frame:\n");
2785                 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2786                                    BRCMF_HDRS_ON(),
2787                                    frame, min_t(u16, len, 16), "TxHdr:\n");
2788
2789                 do {
2790                         sdio_claim_host(bus->sdiodev->func[1]);
2791                         ret = brcmf_sdio_tx_frame(bus, frame, len);
2792                         sdio_release_host(bus->sdiodev->func[1]);
2793                 } while (ret < 0 && retries++ < TXRETRIES);
2794         }
2795
2796         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2797             atomic_read(&bus->dpc_tskcnt) == 0) {
2798                 bus->activity = false;
2799                 sdio_claim_host(bus->sdiodev->func[1]);
2800                 brcmf_dbg(INFO, "idle\n");
2801                 brcmf_sdio_clkctl(bus, CLK_NONE, true);
2802                 sdio_release_host(bus->sdiodev->func[1]);
2803         }
2804
2805         if (ret)
2806                 bus->sdcnt.tx_ctlerrs++;
2807         else
2808                 bus->sdcnt.tx_ctlpkts++;
2809
2810         return ret ? -EIO : 0;
2811 }
2812
2813 #ifdef DEBUG
2814 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2815 {
2816         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2817 }
2818
2819 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2820                                  struct sdpcm_shared *sh)
2821 {
2822         u32 addr;
2823         int rv;
2824         u32 shaddr = 0;
2825         struct sdpcm_shared_le sh_le;
2826         __le32 addr_le;
2827
2828         shaddr = bus->ci->rambase + bus->ramsize - 4;
2829
2830         /*
2831          * Read last word in socram to determine
2832          * address of sdpcm_shared structure
2833          */
2834         sdio_claim_host(bus->sdiodev->func[1]);
2835         brcmf_sdio_bus_sleep(bus, false, false);
2836         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2837         sdio_release_host(bus->sdiodev->func[1]);
2838         if (rv < 0)
2839                 return rv;
2840
2841         addr = le32_to_cpu(addr_le);
2842
2843         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2844
2845         /*
2846          * Check if addr is valid.
2847          * NVRAM length at the end of memory should have been overwritten.
2848          */
2849         if (!brcmf_sdio_valid_shared_address(addr)) {
2850                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2851                                   addr);
2852                         return -EINVAL;
2853         }
2854
2855         /* Read hndrte_shared structure */
2856         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2857                                sizeof(struct sdpcm_shared_le));
2858         if (rv < 0)
2859                 return rv;
2860
2861         /* Endianness */
2862         sh->flags = le32_to_cpu(sh_le.flags);
2863         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2864         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2865         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2866         sh->assert_line = le32_to_cpu(sh_le.assert_line);
2867         sh->console_addr = le32_to_cpu(sh_le.console_addr);
2868         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2869
2870         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2871                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2872                           SDPCM_SHARED_VERSION,
2873                           sh->flags & SDPCM_SHARED_VERSION_MASK);
2874                 return -EPROTO;
2875         }
2876
2877         return 0;
2878 }
2879
2880 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2881                                    struct sdpcm_shared *sh, char __user *data,
2882                                    size_t count)
2883 {
2884         u32 addr, console_ptr, console_size, console_index;
2885         char *conbuf = NULL;
2886         __le32 sh_val;
2887         int rv;
2888         loff_t pos = 0;
2889         int nbytes = 0;
2890
2891         /* obtain console information from device memory */
2892         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2893         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2894                                (u8 *)&sh_val, sizeof(u32));
2895         if (rv < 0)
2896                 return rv;
2897         console_ptr = le32_to_cpu(sh_val);
2898
2899         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2900         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2901                                (u8 *)&sh_val, sizeof(u32));
2902         if (rv < 0)
2903                 return rv;
2904         console_size = le32_to_cpu(sh_val);
2905
2906         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2907         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2908                                (u8 *)&sh_val, sizeof(u32));
2909         if (rv < 0)
2910                 return rv;
2911         console_index = le32_to_cpu(sh_val);
2912
2913         /* allocate buffer for console data */
2914         if (console_size <= CONSOLE_BUFFER_MAX)
2915                 conbuf = vzalloc(console_size+1);
2916
2917         if (!conbuf)
2918                 return -ENOMEM;
2919
2920         /* obtain the console data from device */
2921         conbuf[console_size] = '\0';
2922         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2923                                console_size);
2924         if (rv < 0)
2925                 goto done;
2926
2927         rv = simple_read_from_buffer(data, count, &pos,
2928                                      conbuf + console_index,
2929                                      console_size - console_index);
2930         if (rv < 0)
2931                 goto done;
2932
2933         nbytes = rv;
2934         if (console_index > 0) {
2935                 pos = 0;
2936                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2937                                              conbuf, console_index - 1);
2938                 if (rv < 0)
2939                         goto done;
2940                 rv += nbytes;
2941         }
2942 done:
2943         vfree(conbuf);
2944         return rv;
2945 }
2946
2947 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2948                                 char __user *data, size_t count)
2949 {
2950         int error, res;
2951         char buf[350];
2952         struct brcmf_trap_info tr;
2953         loff_t pos = 0;
2954
2955         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2956                 brcmf_dbg(INFO, "no trap in firmware\n");
2957                 return 0;
2958         }
2959
2960         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2961                                   sizeof(struct brcmf_trap_info));
2962         if (error < 0)
2963                 return error;
2964
2965         res = scnprintf(buf, sizeof(buf),
2966                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
2967                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2968                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2969                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2970                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2971                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2972                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2973                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2974                         le32_to_cpu(tr.pc), sh->trap_addr,
2975                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2976                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2977                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2978                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2979
2980         return simple_read_from_buffer(data, count, &pos, buf, res);
2981 }
2982
2983 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2984                                   struct sdpcm_shared *sh, char __user *data,
2985                                   size_t count)
2986 {
2987         int error = 0;
2988         char buf[200];
2989         char file[80] = "?";
2990         char expr[80] = "<???>";
2991         int res;
2992         loff_t pos = 0;
2993
2994         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2995                 brcmf_dbg(INFO, "firmware not built with -assert\n");
2996                 return 0;
2997         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2998                 brcmf_dbg(INFO, "no assert in dongle\n");
2999                 return 0;
3000         }
3001
3002         sdio_claim_host(bus->sdiodev->func[1]);
3003         if (sh->assert_file_addr != 0) {
3004                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3005                                           sh->assert_file_addr, (u8 *)file, 80);
3006                 if (error < 0)
3007                         return error;
3008         }
3009         if (sh->assert_exp_addr != 0) {
3010                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3011                                           sh->assert_exp_addr, (u8 *)expr, 80);
3012                 if (error < 0)
3013                         return error;
3014         }
3015         sdio_release_host(bus->sdiodev->func[1]);
3016
3017         res = scnprintf(buf, sizeof(buf),
3018                         "dongle assert: %s:%d: assert(%s)\n",
3019                         file, sh->assert_line, expr);
3020         return simple_read_from_buffer(data, count, &pos, buf, res);
3021 }
3022
3023 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3024 {
3025         int error;
3026         struct sdpcm_shared sh;
3027
3028         error = brcmf_sdio_readshared(bus, &sh);
3029
3030         if (error < 0)
3031                 return error;
3032
3033         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3034                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3035         else if (sh.flags & SDPCM_SHARED_ASSERT)
3036                 brcmf_err("assertion in dongle\n");
3037
3038         if (sh.flags & SDPCM_SHARED_TRAP)
3039                 brcmf_err("firmware trap in dongle\n");
3040
3041         return 0;
3042 }
3043
3044 static int brcmf_sdio_died_dump(struct brcmf_sdio *bus, char __user *data,
3045                                 size_t count, loff_t *ppos)
3046 {
3047         int error = 0;
3048         struct sdpcm_shared sh;
3049         int nbytes = 0;
3050         loff_t pos = *ppos;
3051
3052         if (pos != 0)
3053                 return 0;
3054
3055         error = brcmf_sdio_readshared(bus, &sh);
3056         if (error < 0)
3057                 goto done;
3058
3059         error = brcmf_sdio_assert_info(bus, &sh, data, count);
3060         if (error < 0)
3061                 goto done;
3062         nbytes = error;
3063
3064         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3065         if (error < 0)
3066                 goto done;
3067         nbytes += error;
3068
3069         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3070         if (error < 0)
3071                 goto done;
3072         nbytes += error;
3073
3074         error = nbytes;
3075         *ppos += nbytes;
3076 done:
3077         return error;
3078 }
3079
3080 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3081                                         size_t count, loff_t *ppos)
3082 {
3083         struct brcmf_sdio *bus = f->private_data;
3084         int res;
3085
3086         res = brcmf_sdio_died_dump(bus, data, count, ppos);
3087         if (res > 0)
3088                 *ppos += res;
3089         return (ssize_t)res;
3090 }
3091
3092 static const struct file_operations brcmf_sdio_forensic_ops = {
3093         .owner = THIS_MODULE,
3094         .open = simple_open,
3095         .read = brcmf_sdio_forensic_read
3096 };
3097
3098 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3099 {
3100         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3101         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3102
3103         if (IS_ERR_OR_NULL(dentry))
3104                 return;
3105
3106         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3107                             &brcmf_sdio_forensic_ops);
3108         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3109 }
3110 #else
3111 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3112 {
3113         return 0;
3114 }
3115
3116 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3117 {
3118 }
3119 #endif /* DEBUG */
3120
3121 static int
3122 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3123 {
3124         int timeleft;
3125         uint rxlen = 0;
3126         bool pending;
3127         u8 *buf;
3128         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3129         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3130         struct brcmf_sdio *bus = sdiodev->bus;
3131
3132         brcmf_dbg(TRACE, "Enter\n");
3133
3134         /* Wait until control frame is available */
3135         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3136
3137         spin_lock_bh(&bus->rxctl_lock);
3138         rxlen = bus->rxlen;
3139         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3140         bus->rxctl = NULL;
3141         buf = bus->rxctl_orig;
3142         bus->rxctl_orig = NULL;
3143         bus->rxlen = 0;
3144         spin_unlock_bh(&bus->rxctl_lock);
3145         vfree(buf);
3146
3147         if (rxlen) {
3148                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3149                           rxlen, msglen);
3150         } else if (timeleft == 0) {
3151                 brcmf_err("resumed on timeout\n");
3152                 brcmf_sdio_checkdied(bus);
3153         } else if (pending) {
3154                 brcmf_dbg(CTL, "cancelled\n");
3155                 return -ERESTARTSYS;
3156         } else {
3157                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3158                 brcmf_sdio_checkdied(bus);
3159         }
3160
3161         if (rxlen)
3162                 bus->sdcnt.rx_ctlpkts++;
3163         else
3164                 bus->sdcnt.rx_ctlerrs++;
3165
3166         return rxlen ? (int)rxlen : -ETIMEDOUT;
3167 }
3168
3169 #ifdef DEBUG
3170 static bool
3171 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3172                         u8 *ram_data, uint ram_sz)
3173 {
3174         char *ram_cmp;
3175         int err;
3176         bool ret = true;
3177         int address;
3178         int offset;
3179         int len;
3180
3181         /* read back and verify */
3182         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3183                   ram_sz);
3184         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3185         /* do not proceed while no memory but  */
3186         if (!ram_cmp)
3187                 return true;
3188
3189         address = ram_addr;
3190         offset = 0;
3191         while (offset < ram_sz) {
3192                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3193                       ram_sz - offset;
3194                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3195                 if (err) {
3196                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3197                                   err, len, address);
3198                         ret = false;
3199                         break;
3200                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3201                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3202                                   offset, len);
3203                         ret = false;
3204                         break;
3205                 }
3206                 offset += len;
3207                 address += len;
3208         }
3209
3210         kfree(ram_cmp);
3211
3212         return ret;
3213 }
3214 #else   /* DEBUG */
3215 static bool
3216 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3217                         u8 *ram_data, uint ram_sz)
3218 {
3219         return true;
3220 }
3221 #endif  /* DEBUG */
3222
3223 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3224                                          const struct firmware *fw)
3225 {
3226         int err;
3227         int offset;
3228         int address;
3229         int len;
3230
3231         brcmf_dbg(TRACE, "Enter\n");
3232
3233         err = 0;
3234         offset = 0;
3235         address = bus->ci->rambase;
3236         while (offset < fw->size) {
3237                 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3238                       fw->size - offset;
3239                 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address,
3240                                         (u8 *)&fw->data[offset], len);
3241                 if (err) {
3242                         brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3243                                   err, len, address);
3244                         return err;
3245                 }
3246                 offset += len;
3247                 address += len;
3248         }
3249         if (!err)
3250                 if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3251                                              (u8 *)fw->data, fw->size))
3252                         err = -EIO;
3253
3254         return err;
3255 }
3256
3257 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3258                                      const struct firmware *nv)
3259 {
3260         void *vars;
3261         u32 varsz;
3262         int address;
3263         int err;
3264
3265         brcmf_dbg(TRACE, "Enter\n");
3266
3267         vars = brcmf_nvram_strip(nv, &varsz);
3268
3269         if (vars == NULL)
3270                 return -EINVAL;
3271
3272         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3273         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3274         if (err)
3275                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3276                           err, varsz, address);
3277         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3278                 err = -EIO;
3279
3280         brcmf_nvram_free(vars);
3281
3282         return err;
3283 }
3284
3285 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus)
3286 {
3287         int bcmerror = -EFAULT;
3288         const struct firmware *fw;
3289         u32 rstvec;
3290
3291         sdio_claim_host(bus->sdiodev->func[1]);
3292         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3293
3294         /* Keep arm in reset */
3295         brcmf_sdio_chip_enter_download(bus->sdiodev, bus->ci);
3296
3297         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_BIN);
3298         if (fw == NULL) {
3299                 bcmerror = -ENOENT;
3300                 goto err;
3301         }
3302
3303         rstvec = get_unaligned_le32(fw->data);
3304         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3305
3306         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3307         release_firmware(fw);
3308         if (bcmerror) {
3309                 brcmf_err("dongle image file download failed\n");
3310                 goto err;
3311         }
3312
3313         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3314         if (fw == NULL) {
3315                 bcmerror = -ENOENT;
3316                 goto err;
3317         }
3318
3319         bcmerror = brcmf_sdio_download_nvram(bus, fw);
3320         release_firmware(fw);
3321         if (bcmerror) {
3322                 brcmf_err("dongle nvram file download failed\n");
3323                 goto err;
3324         }
3325
3326         /* Take arm out of reset */
3327         if (!brcmf_sdio_chip_exit_download(bus->sdiodev, bus->ci, rstvec)) {
3328                 brcmf_err("error getting out of ARM core reset\n");
3329                 goto err;
3330         }
3331
3332         /* Allow HT Clock now that the ARM is running. */
3333         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_LOAD);
3334         bcmerror = 0;
3335
3336 err:
3337         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3338         sdio_release_host(bus->sdiodev->func[1]);
3339         return bcmerror;
3340 }
3341
3342 static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus)
3343 {
3344         u32 addr, reg, pmu_cc3_mask = ~0;
3345         int err;
3346
3347         brcmf_dbg(TRACE, "Enter\n");
3348
3349         /* old chips with PMU version less than 17 don't support save restore */
3350         if (bus->ci->pmurev < 17)
3351                 return false;
3352
3353         switch (bus->ci->chip) {
3354         case BCM43241_CHIP_ID:
3355         case BCM4335_CHIP_ID:
3356         case BCM4339_CHIP_ID:
3357                 /* read PMU chipcontrol register 3 */
3358                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3359                 brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL);
3360                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3361                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3362                 return (reg & pmu_cc3_mask) != 0;
3363         default:
3364                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, pmucapabilities_ext);
3365                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, &err);
3366                 if ((reg & PCAPEXT_SR_SUPPORTED_MASK) == 0)
3367                         return false;
3368
3369                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, retention_ctl);
3370                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3371                 return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK |
3372                                PMU_RCTL_LOGIC_DISABLE_MASK)) == 0;
3373         }
3374 }
3375
3376 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3377 {
3378         int err = 0;
3379         u8 val;
3380
3381         brcmf_dbg(TRACE, "Enter\n");
3382
3383         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3384         if (err) {
3385                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3386                 return;
3387         }
3388
3389         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3390         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3391         if (err) {
3392                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3393                 return;
3394         }
3395
3396         /* Add CMD14 Support */
3397         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3398                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3399                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3400                           &err);
3401         if (err) {
3402                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3403                 return;
3404         }
3405
3406         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3407                           SBSDIO_FORCE_HT, &err);
3408         if (err) {
3409                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3410                 return;
3411         }
3412
3413         /* set flag */
3414         bus->sr_enabled = true;
3415         brcmf_dbg(INFO, "SR enabled\n");
3416 }
3417
3418 /* enable KSO bit */
3419 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3420 {
3421         u8 val;
3422         int err = 0;
3423
3424         brcmf_dbg(TRACE, "Enter\n");
3425
3426         /* KSO bit added in SDIO core rev 12 */
3427         if (bus->ci->c_inf[1].rev < 12)
3428                 return 0;
3429
3430         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3431         if (err) {
3432                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3433                 return err;
3434         }
3435
3436         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3437                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3438                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3439                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3440                                   val, &err);
3441                 if (err) {
3442                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3443                         return err;
3444                 }
3445         }
3446
3447         return 0;
3448 }
3449
3450
3451 static int brcmf_sdio_bus_preinit(struct device *dev)
3452 {
3453         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3454         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3455         struct brcmf_sdio *bus = sdiodev->bus;
3456         uint pad_size;
3457         u32 value;
3458         u8 idx;
3459         int err;
3460
3461         /* the commands below use the terms tx and rx from
3462          * a device perspective, ie. bus:txglom affects the
3463          * bus transfers from device to host.
3464          */
3465         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3466         if (bus->ci->c_inf[idx].rev < 12) {
3467                 /* for sdio core rev < 12, disable txgloming */
3468                 value = 0;
3469                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3470                                            sizeof(u32));
3471         } else {
3472                 /* otherwise, set txglomalign */
3473                 value = 4;
3474                 if (sdiodev->pdata)
3475                         value = sdiodev->pdata->sd_sgentry_align;
3476                 /* SDIO ADMA requires at least 32 bit alignment */
3477                 value = max_t(u32, value, 4);
3478                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3479                                            sizeof(u32));
3480         }
3481
3482         if (err < 0)
3483                 goto done;
3484
3485         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3486         if (sdiodev->sg_support) {
3487                 bus->txglom = false;
3488                 value = 1;
3489                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3490                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3491                                            &value, sizeof(u32));
3492                 if (err < 0) {
3493                         /* bus:rxglom is allowed to fail */
3494                         err = 0;
3495                 } else {
3496                         bus->txglom = true;
3497                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3498                 }
3499         }
3500         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3501
3502 done:
3503         return err;
3504 }
3505
3506 static int brcmf_sdio_bus_init(struct device *dev)
3507 {
3508         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3509         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3510         struct brcmf_sdio *bus = sdiodev->bus;
3511         int err, ret = 0;
3512         u8 saveclk;
3513
3514         brcmf_dbg(TRACE, "Enter\n");
3515
3516         /* try to download image and nvram to the dongle */
3517         if (bus_if->state == BRCMF_BUS_DOWN) {
3518                 bus->alp_only = true;
3519                 err = brcmf_sdio_download_firmware(bus);
3520                 if (err)
3521                         return err;
3522                 bus->alp_only = false;
3523         }
3524
3525         if (!bus->sdiodev->bus_if->drvr)
3526                 return 0;
3527
3528         /* Start the watchdog timer */
3529         bus->sdcnt.tickcnt = 0;
3530         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3531
3532         sdio_claim_host(bus->sdiodev->func[1]);
3533
3534         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3535         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3536         if (bus->clkstate != CLK_AVAIL)
3537                 goto exit;
3538
3539         /* Force clocks on backplane to be sure F2 interrupt propagates */
3540         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3541                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
3542         if (!err) {
3543                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3544                                   (saveclk | SBSDIO_FORCE_HT), &err);
3545         }
3546         if (err) {
3547                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3548                 goto exit;
3549         }
3550
3551         /* Enable function 2 (frame transfers) */
3552         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3553                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3554         err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3555
3556
3557         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3558
3559         /* If F2 successfully enabled, set core and enable interrupts */
3560         if (!err) {
3561                 /* Set up the interrupt mask and enable interrupts */
3562                 bus->hostintmask = HOSTINTMASK;
3563                 w_sdreg32(bus, bus->hostintmask,
3564                           offsetof(struct sdpcmd_regs, hostintmask));
3565
3566                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3567         } else {
3568                 /* Disable F2 again */
3569                 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3570                 ret = -ENODEV;
3571         }
3572
3573         if (brcmf_sdio_sr_capable(bus)) {
3574                 brcmf_sdio_sr_init(bus);
3575         } else {
3576                 /* Restore previous clock setting */
3577                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3578                                   saveclk, &err);
3579         }
3580
3581         if (ret == 0) {
3582                 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3583                 if (ret != 0)
3584                         brcmf_err("intr register failed:%d\n", ret);
3585         }
3586
3587         /* If we didn't come up, turn off backplane clock */
3588         if (ret != 0)
3589                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3590
3591 exit:
3592         sdio_release_host(bus->sdiodev->func[1]);
3593
3594         return ret;
3595 }
3596
3597 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3598 {
3599         brcmf_dbg(TRACE, "Enter\n");
3600
3601         if (!bus) {
3602                 brcmf_err("bus is null pointer, exiting\n");
3603                 return;
3604         }
3605
3606         if (!brcmf_bus_ready(bus->sdiodev->bus_if)) {
3607                 brcmf_err("bus is down. we have nothing to do\n");
3608                 return;
3609         }
3610         /* Count the interrupt call */
3611         bus->sdcnt.intrcount++;
3612         if (in_interrupt())
3613                 atomic_set(&bus->ipend, 1);
3614         else
3615                 if (brcmf_sdio_intr_rstatus(bus)) {
3616                         brcmf_err("failed backplane access\n");
3617                 }
3618
3619         /* Disable additional interrupts (is this needed now)? */
3620         if (!bus->intr)
3621                 brcmf_err("isr w/o interrupt configured!\n");
3622
3623         atomic_inc(&bus->dpc_tskcnt);
3624         queue_work(bus->brcmf_wq, &bus->datawork);
3625 }
3626
3627 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3628 {
3629 #ifdef DEBUG
3630         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3631 #endif  /* DEBUG */
3632
3633         brcmf_dbg(TIMER, "Enter\n");
3634
3635         /* Poll period: check device if appropriate. */
3636         if (!bus->sr_enabled &&
3637             bus->poll && (++bus->polltick >= bus->pollrate)) {
3638                 u32 intstatus = 0;
3639
3640                 /* Reset poll tick */
3641                 bus->polltick = 0;
3642
3643                 /* Check device if no interrupts */
3644                 if (!bus->intr ||
3645                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3646
3647                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3648                                 u8 devpend;
3649
3650                                 sdio_claim_host(bus->sdiodev->func[1]);
3651                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3652                                                             SDIO_CCCR_INTx,
3653                                                             NULL);
3654                                 sdio_release_host(bus->sdiodev->func[1]);
3655                                 intstatus =
3656                                     devpend & (INTR_STATUS_FUNC1 |
3657                                                INTR_STATUS_FUNC2);
3658                         }
3659
3660                         /* If there is something, make like the ISR and
3661                                  schedule the DPC */
3662                         if (intstatus) {
3663                                 bus->sdcnt.pollcnt++;
3664                                 atomic_set(&bus->ipend, 1);
3665
3666                                 atomic_inc(&bus->dpc_tskcnt);
3667                                 queue_work(bus->brcmf_wq, &bus->datawork);
3668                         }
3669                 }
3670
3671                 /* Update interrupt tracking */
3672                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3673         }
3674 #ifdef DEBUG
3675         /* Poll for console output periodically */
3676         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3677             bus->console_interval != 0) {
3678                 bus->console.count += BRCMF_WD_POLL_MS;
3679                 if (bus->console.count >= bus->console_interval) {
3680                         bus->console.count -= bus->console_interval;
3681                         sdio_claim_host(bus->sdiodev->func[1]);
3682                         /* Make sure backplane clock is on */
3683                         brcmf_sdio_bus_sleep(bus, false, false);
3684                         if (brcmf_sdio_readconsole(bus) < 0)
3685                                 /* stop on error */
3686                                 bus->console_interval = 0;
3687                         sdio_release_host(bus->sdiodev->func[1]);
3688                 }
3689         }
3690 #endif                          /* DEBUG */
3691
3692         /* On idle timeout clear activity flag and/or turn off clock */
3693         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3694                 if (++bus->idlecount >= bus->idletime) {
3695                         bus->idlecount = 0;
3696                         if (bus->activity) {
3697                                 bus->activity = false;
3698                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3699                         } else {
3700                                 brcmf_dbg(SDIO, "idle\n");
3701                                 sdio_claim_host(bus->sdiodev->func[1]);
3702                                 brcmf_sdio_bus_sleep(bus, true, false);
3703                                 sdio_release_host(bus->sdiodev->func[1]);
3704                         }
3705                 }
3706         }
3707
3708         return (atomic_read(&bus->ipend) > 0);
3709 }
3710
3711 static void brcmf_sdio_dataworker(struct work_struct *work)
3712 {
3713         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3714                                               datawork);
3715
3716         while (atomic_read(&bus->dpc_tskcnt)) {
3717                 brcmf_sdio_dpc(bus);
3718                 atomic_dec(&bus->dpc_tskcnt);
3719         }
3720 }
3721
3722 static bool
3723 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3724 {
3725         u8 clkctl = 0;
3726         int err = 0;
3727         int reg_addr;
3728         u32 reg_val;
3729         u32 drivestrength;
3730
3731         sdio_claim_host(bus->sdiodev->func[1]);
3732
3733         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3734                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3735
3736         /*
3737          * Force PLL off until brcmf_sdio_chip_attach()
3738          * programs PLL control regs
3739          */
3740
3741         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3742                           BRCMF_INIT_CLKCTL1, &err);
3743         if (!err)
3744                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3745                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3746
3747         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3748                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3749                           err, BRCMF_INIT_CLKCTL1, clkctl);
3750                 goto fail;
3751         }
3752
3753         /* SDIO register access works so moving
3754          * state from UNKNOWN to DOWN.
3755          */
3756         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_DOWN);
3757
3758         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci)) {
3759                 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3760                 goto fail;
3761         }
3762
3763         if (brcmf_sdio_kso_init(bus)) {
3764                 brcmf_err("error enabling KSO\n");
3765                 goto fail;
3766         }
3767
3768         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3769                 drivestrength = bus->sdiodev->pdata->drive_strength;
3770         else
3771                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3772         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3773
3774         /* Get info on the SOCRAM cores... */
3775         bus->ramsize = bus->ci->ramsize;
3776         if (!(bus->ramsize)) {
3777                 brcmf_err("failed to find SOCRAM memory!\n");
3778                 goto fail;
3779         }
3780
3781         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3782         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3783                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3784         if (err)
3785                 goto fail;
3786
3787         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3788
3789         brcmf_sdiod_regwb(bus->sdiodev,
3790                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3791         if (err)
3792                 goto fail;
3793
3794         /* set PMUControl so a backplane reset does PMU state reload */
3795         reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3796                                pmucontrol);
3797         reg_val = brcmf_sdiod_regrl(bus->sdiodev,
3798                                     reg_addr,
3799                                     &err);
3800         if (err)
3801                 goto fail;
3802
3803         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3804
3805         brcmf_sdiod_regwl(bus->sdiodev,
3806                           reg_addr,
3807                           reg_val,
3808                           &err);
3809         if (err)
3810                 goto fail;
3811
3812
3813         sdio_release_host(bus->sdiodev->func[1]);
3814
3815         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3816
3817         /* allocate header buffer */
3818         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3819         if (!bus->hdrbuf)
3820                 return false;
3821         /* Locate an appropriately-aligned portion of hdrbuf */
3822         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3823                                     bus->head_align);
3824
3825         /* Set the poll and/or interrupt flags */
3826         bus->intr = true;
3827         bus->poll = false;
3828         if (bus->poll)
3829                 bus->pollrate = 1;
3830
3831         return true;
3832
3833 fail:
3834         sdio_release_host(bus->sdiodev->func[1]);
3835         return false;
3836 }
3837
3838 static int
3839 brcmf_sdio_watchdog_thread(void *data)
3840 {
3841         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3842
3843         allow_signal(SIGTERM);
3844         /* Run until signal received */
3845         while (1) {
3846                 if (kthread_should_stop())
3847                         break;
3848                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3849                         brcmf_sdio_bus_watchdog(bus);
3850                         /* Count the tick for reference */
3851                         bus->sdcnt.tickcnt++;
3852                 } else
3853                         break;
3854         }
3855         return 0;
3856 }
3857
3858 static void
3859 brcmf_sdio_watchdog(unsigned long data)
3860 {
3861         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3862
3863         if (bus->watchdog_tsk) {
3864                 complete(&bus->watchdog_wait);
3865                 /* Reschedule the watchdog */
3866                 if (bus->wd_timer_valid)
3867                         mod_timer(&bus->timer,
3868                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3869         }
3870 }
3871
3872 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3873         .stop = brcmf_sdio_bus_stop,
3874         .preinit = brcmf_sdio_bus_preinit,
3875         .init = brcmf_sdio_bus_init,
3876         .txdata = brcmf_sdio_bus_txdata,
3877         .txctl = brcmf_sdio_bus_txctl,
3878         .rxctl = brcmf_sdio_bus_rxctl,
3879         .gettxq = brcmf_sdio_bus_gettxq,
3880 };
3881
3882 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
3883 {
3884         int ret;
3885         struct brcmf_sdio *bus;
3886
3887         brcmf_dbg(TRACE, "Enter\n");
3888
3889         /* Allocate private bus interface state */
3890         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3891         if (!bus)
3892                 goto fail;
3893
3894         bus->sdiodev = sdiodev;
3895         sdiodev->bus = bus;
3896         skb_queue_head_init(&bus->glom);
3897         bus->txbound = BRCMF_TXBOUND;
3898         bus->rxbound = BRCMF_RXBOUND;
3899         bus->txminmax = BRCMF_TXMINMAX;
3900         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
3901
3902         /* platform specific configuration:
3903          *   alignments must be at least 4 bytes for ADMA
3904          */
3905         bus->head_align = ALIGNMENT;
3906         bus->sgentry_align = ALIGNMENT;
3907         if (sdiodev->pdata) {
3908                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
3909                         bus->head_align = sdiodev->pdata->sd_head_align;
3910                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
3911                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
3912         }
3913
3914         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3915         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3916         if (bus->brcmf_wq == NULL) {
3917                 brcmf_err("insufficient memory to create txworkqueue\n");
3918                 goto fail;
3919         }
3920
3921         /* attempt to attach to the dongle */
3922         if (!(brcmf_sdio_probe_attach(bus))) {
3923                 brcmf_err("brcmf_sdio_probe_attach failed\n");
3924                 goto fail;
3925         }
3926
3927         spin_lock_init(&bus->rxctl_lock);
3928         spin_lock_init(&bus->txqlock);
3929         init_waitqueue_head(&bus->ctrl_wait);
3930         init_waitqueue_head(&bus->dcmd_resp_wait);
3931
3932         /* Set up the watchdog timer */
3933         init_timer(&bus->timer);
3934         bus->timer.data = (unsigned long)bus;
3935         bus->timer.function = brcmf_sdio_watchdog;
3936
3937         /* Initialize watchdog thread */
3938         init_completion(&bus->watchdog_wait);
3939         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
3940                                         bus, "brcmf_watchdog");
3941         if (IS_ERR(bus->watchdog_tsk)) {
3942                 pr_warn("brcmf_watchdog thread failed to start\n");
3943                 bus->watchdog_tsk = NULL;
3944         }
3945         /* Initialize DPC thread */
3946         atomic_set(&bus->dpc_tskcnt, 0);
3947
3948         /* Assign bus interface call back */
3949         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3950         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3951         bus->sdiodev->bus_if->chip = bus->ci->chip;
3952         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
3953
3954         /* default sdio bus header length for tx packet */
3955         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3956
3957         /* Attach to the common layer, reserve hdr space */
3958         ret = brcmf_attach(bus->sdiodev->dev);
3959         if (ret != 0) {
3960                 brcmf_err("brcmf_attach failed\n");
3961                 goto fail;
3962         }
3963
3964         /* Allocate buffers */
3965         if (bus->sdiodev->bus_if->maxctl) {
3966                 bus->rxblen =
3967                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3968                             ALIGNMENT) + bus->head_align;
3969                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3970                 if (!(bus->rxbuf)) {
3971                         brcmf_err("rxbuf allocation failed\n");
3972                         goto fail;
3973                 }
3974         }
3975
3976         sdio_claim_host(bus->sdiodev->func[1]);
3977
3978         /* Disable F2 to clear any intermediate frame state on the dongle */
3979         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3980
3981         bus->rxflow = false;
3982
3983         /* Done with backplane-dependent accesses, can drop clock... */
3984         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3985
3986         sdio_release_host(bus->sdiodev->func[1]);
3987
3988         /* ...and initialize clock/power states */
3989         bus->clkstate = CLK_SDONLY;
3990         bus->idletime = BRCMF_IDLE_INTERVAL;
3991         bus->idleclock = BRCMF_IDLE_ACTIVE;
3992
3993         /* Query the F2 block size, set roundup accordingly */
3994         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3995         bus->roundup = min(max_roundup, bus->blocksize);
3996
3997         /* SR state */
3998         bus->sleeping = false;
3999         bus->sr_enabled = false;
4000
4001         brcmf_sdio_debugfs_create(bus);
4002         brcmf_dbg(INFO, "completed!!\n");
4003
4004         /* if firmware path present try to download and bring up bus */
4005         ret = brcmf_bus_start(bus->sdiodev->dev);
4006         if (ret != 0) {
4007                 brcmf_err("dongle is not responding\n");
4008                 goto fail;
4009         }
4010
4011         return bus;
4012
4013 fail:
4014         brcmf_sdio_remove(bus);
4015         return NULL;
4016 }
4017
4018 /* Detach and free everything */
4019 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4020 {
4021         brcmf_dbg(TRACE, "Enter\n");
4022
4023         if (bus) {
4024                 /* De-register interrupt handler */
4025                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4026
4027                 cancel_work_sync(&bus->datawork);
4028                 if (bus->brcmf_wq)
4029                         destroy_workqueue(bus->brcmf_wq);
4030
4031                 if (bus->sdiodev->bus_if->drvr) {
4032                         brcmf_detach(bus->sdiodev->dev);
4033                 }
4034
4035                 if (bus->ci) {
4036                         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
4037                                 sdio_claim_host(bus->sdiodev->func[1]);
4038                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4039                                 /* Leave the device in state where it is
4040                                  * 'quiet'. This is done by putting it in
4041                                  * download_state which essentially resets
4042                                  * all necessary cores.
4043                                  */
4044                                 msleep(20);
4045                                 brcmf_sdio_chip_enter_download(bus->sdiodev,
4046                                                                bus->ci);
4047                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4048                                 sdio_release_host(bus->sdiodev->func[1]);
4049                         }
4050                         brcmf_sdio_chip_detach(&bus->ci);
4051                 }
4052
4053                 kfree(bus->rxbuf);
4054                 kfree(bus->hdrbuf);
4055                 kfree(bus);
4056         }
4057
4058         brcmf_dbg(TRACE, "Disconnected\n");
4059 }
4060
4061 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4062 {
4063         /* Totally stop the timer */
4064         if (!wdtick && bus->wd_timer_valid) {
4065                 del_timer_sync(&bus->timer);
4066                 bus->wd_timer_valid = false;
4067                 bus->save_ms = wdtick;
4068                 return;
4069         }
4070
4071         /* don't start the wd until fw is loaded */
4072         if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4073                 return;
4074
4075         if (wdtick) {
4076                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4077                         if (bus->wd_timer_valid)
4078                                 /* Stop timer and restart at new value */
4079                                 del_timer_sync(&bus->timer);
4080
4081                         /* Create timer again when watchdog period is
4082                            dynamically changed or in the first instance
4083                          */
4084                         bus->timer.expires =
4085                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4086                         add_timer(&bus->timer);
4087
4088                 } else {
4089                         /* Re arm the timer, at last watchdog period */
4090                         mod_timer(&bus->timer,
4091                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4092                 }
4093
4094                 bus->wd_timer_valid = true;
4095                 bus->save_ms = wdtick;
4096         }
4097 }