drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_ids.h>
  27 #include <linux/mmc/sdio_func.h>
  28 #include <linux/mmc/card.h>
  29 #include <linux/semaphore.h>
  30 #include <linux/firmware.h>
  31 #include <linux/module.h>
  32 #include <linux/bcma/bcma.h>
  33 #include <linux/debugfs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/platform_data/brcmfmac-sdio.h>
  36 #include <linux/moduleparam.h>
  37 #include <asm/unaligned.h>
  38 #include <defs.h>
  39 #include <brcmu_wifi.h>
  40 #include <brcmu_utils.h>
  41 #include <brcm_hw_ids.h>
  42 #include <soc.h>
  43 #include "sdio_host.h"
  44 #include "chip.h"
  45 #include "firmware.h"
  46
  47 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  48
  49 #ifdef DEBUG
  50
  51 #define BRCMF_TRAP_INFO_SIZE    80
  52
  53 #define CBUF_LEN        (128)
  54
  55 /* Device console log buffer state */
  56 #define CONSOLE_BUFFER_MAX      2024
  57
  58 struct rte_log_le {
  59         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  60         __le32 buf_size;
  61         __le32 idx;
  62         char *_buf_compat;      /* Redundant pointer for backward compat. */
  63 };
  64
  65 struct rte_console {
  66         /* Virtual UART
  67          * When there is no UART (e.g. Quickturn),
  68          * the host should write a complete
  69          * input line directly into cbuf and then write
  70          * the length into vcons_in.
  71          * This may also be used when there is a real UART
  72          * (at risk of conflicting with
  73          * the real UART).  vcons_out is currently unused.
  74          */
  75         uint vcons_in;
  76         uint vcons_out;
  77
  78         /* Output (logging) buffer
  79          * Console output is written to a ring buffer log_buf at index log_idx.
  80          * The host may read the output when it sees log_idx advance.
  81          * Output will be lost if the output wraps around faster than the host
  82          * polls.
  83          */
  84         struct rte_log_le log_le;
  85
  86         /* Console input line buffer
  87          * Characters are read one at a time into cbuf
  88          * until <CR> is received, then
  89          * the buffer is processed as a command line.
  90          * Also used for virtual UART.
  91          */
  92         uint cbuf_idx;
  93         char cbuf[CBUF_LEN];
  94 };
  95
  96 #endif                          /* DEBUG */
  97 #include <chipcommon.h>
  98
  99 #include "dhd_bus.h"
 100 #include "dhd_dbg.h"
 101 #include "tracepoint.h"
 102
 103 #define TXQLEN          2048    /* bulk tx queue length */
 104 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 105 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 106 #define PRIOMASK        7
 107
 108 #define TXRETRIES       2       /* # of retries for tx frames */
 109
 110 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 111                                  one scheduling */
 112
 113 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 114                                  one scheduling */
 115
 116 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 117
 118 #define MEMBLOCK        2048    /* Block size used for downloading
 119                                  of dongle image */
 120 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 121                                  biggest possible glom */
 122
 123 #define BRCMF_FIRSTREAD (1 << 6)
 124
 125
 126 /* SBSDIO_DEVICE_CTL */
 127
 128 /* 1: device will assert busy signal when receiving CMD53 */
 129 #define SBSDIO_DEVCTL_SETBUSY           0x01
 130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 133 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 135  * sdio bus power cycle to clear (rev 9) */
 136 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 137 /* Force SD->SB reset mapping (rev 11) */
 138 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 139 /*   Determined by CoreControl bit */
 140 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 141 /*   Force backplane reset */
 142 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 143 /*   Force no backplane reset */
 144 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 145
 146 /* direct(mapped) cis space */
 147
 148 /* MAPPED common CIS address */
 149 #define SBSDIO_CIS_BASE_COMMON          0x1000
 150 /* maximum bytes in one CIS */
 151 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 152 /* cis offset addr is < 17 bits */
 153 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 154
 155 /* manfid tuple length, include tuple, link bytes */
 156 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 157
 158 #define CORE_BUS_REG(base, field) \
 159                 (base + offsetof(struct sdpcmd_regs, field))
 160
 161 /* SDIO function 1 register CHIPCLKCSR */
 162 /* Force ALP request to backplane */
 163 #define SBSDIO_FORCE_ALP                0x01
 164 /* Force HT request to backplane */
 165 #define SBSDIO_FORCE_HT                 0x02
 166 /* Force ILP request to backplane */
 167 #define SBSDIO_FORCE_ILP                0x04
 168 /* Make ALP ready (power up xtal) */
 169 #define SBSDIO_ALP_AVAIL_REQ            0x08
 170 /* Make HT ready (power up PLL) */
 171 #define SBSDIO_HT_AVAIL_REQ             0x10
 172 /* Squelch clock requests from HW */
 173 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 174 /* Status: ALP is ready */
 175 #define SBSDIO_ALP_AVAIL                0x40
 176 /* Status: HT is ready */
 177 #define SBSDIO_HT_AVAIL                 0x80
 178 #define SBSDIO_CSR_MASK                 0x1F
 179 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 180 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 181 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 182 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 183 #define SBSDIO_CLKAV(regval, alponly) \
 184         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 185
 186 /* intstatus */
 187 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 188 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 189 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 190 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 191 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 192 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 193 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 194 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 195 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 196 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 197 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 198 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 199 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 200 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 201 #define I_PC            (1 << 10)       /* descriptor error */
 202 #define I_PD            (1 << 11)       /* data error */
 203 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 204 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 205 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 206 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 207 #define I_RI            (1 << 16)       /* Receive Interrupt */
 208 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 209 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 210 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 211 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 212 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 213 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 214 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 215 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 216 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 217 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 218 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 219 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 220
 221 /* corecontrol */
 222 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 223 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 224 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 225 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 226 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 227 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 228
 229 /* SDA_FRAMECTRL */
 230 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 231 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 232 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 233 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 234
 235 /*
 236  * Software allocation of To SB Mailbox resources
 237  */
 238
 239 /* tosbmailbox bits corresponding to intstatus bits */
 240 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 241 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 242 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 243 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 244
 245 /* tosbmailboxdata */
 246 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 247
 248 /*
 249  * Software allocation of To Host Mailbox resources
 250  */
 251
 252 /* intstatus bits */
 253 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 254 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 255 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 256 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 257
 258 /* tohostmailboxdata */
 259 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 260 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 261 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 262 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 263
 264 #define HMB_DATA_FCDATA_MASK    0xff000000
 265 #define HMB_DATA_FCDATA_SHIFT   24
 266
 267 #define HMB_DATA_VERSION_MASK   0x00ff0000
 268 #define HMB_DATA_VERSION_SHIFT  16
 269
 270 /*
 271  * Software-defined protocol header
 272  */
 273
 274 /* Current protocol version */
 275 #define SDPCM_PROT_VERSION      4
 276
 277 /*
 278  * Shared structure between dongle and the host.
 279  * The structure contains pointers to trap or assert information.
 280  */
 281 #define SDPCM_SHARED_VERSION       0x0003
 282 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 283 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 284 #define SDPCM_SHARED_ASSERT        0x0200
 285 #define SDPCM_SHARED_TRAP          0x0400
 286
 287 /* Space for header read, limit for data packets */
 288 #define MAX_HDR_READ    (1 << 6)
 289 #define MAX_RX_DATASZ   2048
 290
 291 /* Bump up limit on waiting for HT to account for first startup;
 292  * if the image is doing a CRC calculation before programming the PMU
 293  * for HT availability, it could take a couple hundred ms more, so
 294  * max out at a 1 second (1000000us).
 295  */
 296 #undef PMU_MAX_TRANSITION_DLY
 297 #define PMU_MAX_TRANSITION_DLY 1000000
 298
 299 /* Value for ChipClockCSR during initial setup */
 300 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 301                                         SBSDIO_ALP_AVAIL_REQ)
 302
 303 /* Flags for SDH calls */
 304 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 305
 306 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 307                                          * when idle
 308                                          */
 309 #define BRCMF_IDLE_INTERVAL     1
 310
 311 #define KSO_WAIT_US 50
 312 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 313
 314 /*
 315  * Conversion of 802.1D priority to precedence level
 316  */
 317 static uint prio2prec(u32 prio)
 318 {
 319         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 320                (prio^2) : prio;
 321 }
 322
 323 #ifdef DEBUG
 324 /* Device console log buffer state */
 325 struct brcmf_console {
 326         uint count;             /* Poll interval msec counter */
 327         uint log_addr;          /* Log struct address (fixed) */
 328         struct rte_log_le log_le;       /* Log struct (host copy) */
 329         uint bufsize;           /* Size of log buffer */
 330         u8 *buf;                /* Log buffer (host copy) */
 331         uint last;              /* Last buffer read index */
 332 };
 333
 334 struct brcmf_trap_info {
 335         __le32          type;
 336         __le32          epc;
 337         __le32          cpsr;
 338         __le32          spsr;
 339         __le32          r0;     /* a1 */
 340         __le32          r1;     /* a2 */
 341         __le32          r2;     /* a3 */
 342         __le32          r3;     /* a4 */
 343         __le32          r4;     /* v1 */
 344         __le32          r5;     /* v2 */
 345         __le32          r6;     /* v3 */
 346         __le32          r7;     /* v4 */
 347         __le32          r8;     /* v5 */
 348         __le32          r9;     /* sb/v6 */
 349         __le32          r10;    /* sl/v7 */
 350         __le32          r11;    /* fp/v8 */
 351         __le32          r12;    /* ip */
 352         __le32          r13;    /* sp */
 353         __le32          r14;    /* lr */
 354         __le32          pc;     /* r15 */
 355 };
 356 #endif                          /* DEBUG */
 357
 358 struct sdpcm_shared {
 359         u32 flags;
 360         u32 trap_addr;
 361         u32 assert_exp_addr;
 362         u32 assert_file_addr;
 363         u32 assert_line;
 364         u32 console_addr;       /* Address of struct rte_console */
 365         u32 msgtrace_addr;
 366         u8 tag[32];
 367         u32 brpt_addr;
 368 };
 369
 370 struct sdpcm_shared_le {
 371         __le32 flags;
 372         __le32 trap_addr;
 373         __le32 assert_exp_addr;
 374         __le32 assert_file_addr;
 375         __le32 assert_line;
 376         __le32 console_addr;    /* Address of struct rte_console */
 377         __le32 msgtrace_addr;
 378         u8 tag[32];
 379         __le32 brpt_addr;
 380 };
 381
 382 /* dongle SDIO bus specific header info */
 383 struct brcmf_sdio_hdrinfo {
 384         u8 seq_num;
 385         u8 channel;
 386         u16 len;
 387         u16 len_left;
 388         u16 len_nxtfrm;
 389         u8 dat_offset;
 390         bool lastfrm;
 391         u16 tail_pad;
 392 };
 393
 394 /* misc chip info needed by some of the routines */
 395 /* Private data for SDIO bus interaction */
 396 struct brcmf_sdio {
 397         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 398         struct brcmf_chip *ci;  /* Chip info struct */
 399
 400         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 401
 402         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 403         atomic_t intstatus;     /* Intstatus bits (events) pending */
 404         atomic_t fcstate;       /* State of dongle flow-control */
 405
 406         uint blocksize;         /* Block size of SDIO transfers */
 407         uint roundup;           /* Max roundup limit */
 408
 409         struct pktq txq;        /* Queue length used for flow-control */
 410         u8 flowcontrol; /* per prio flow control bitmask */
 411         u8 tx_seq;              /* Transmit sequence number (next) */
 412         u8 tx_max;              /* Maximum transmit sequence allowed */
 413
 414         u8 *hdrbuf;             /* buffer for handling rx frame */
 415         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 416         u8 rx_seq;              /* Receive sequence number (expected) */
 417         struct brcmf_sdio_hdrinfo cur_read;
 418                                 /* info of current read frame */
 419         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 420         bool rxpending;         /* Data frame pending in dongle */
 421
 422         uint rxbound;           /* Rx frames to read before resched */
 423         uint txbound;           /* Tx frames to send before resched */
 424         uint txminmax;
 425
 426         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 427         struct sk_buff_head glom; /* Packet list for glommed superframe */
 428         uint glomerr;           /* Glom packet read errors */
 429
 430         u8 *rxbuf;              /* Buffer for receiving control packets */
 431         uint rxblen;            /* Allocated length of rxbuf */
 432         u8 *rxctl;              /* Aligned pointer into rxbuf */
 433         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 434         uint rxlen;             /* Length of valid data in buffer */
 435         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 436
 437         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 438
 439         bool intr;              /* Use interrupts */
 440         bool poll;              /* Use polling */
 441         atomic_t ipend;         /* Device interrupt is pending */
 442         uint spurious;          /* Count of spurious interrupts */
 443         uint pollrate;          /* Ticks between device polls */
 444         uint polltick;          /* Tick counter */
 445
 446 #ifdef DEBUG
 447         uint console_interval;
 448         struct brcmf_console console;   /* Console output polling support */
 449         uint console_addr;      /* Console address from shared struct */
 450 #endif                          /* DEBUG */
 451
 452         uint clkstate;          /* State of sd and backplane clock(s) */
 453         bool activity;          /* Activity flag for clock down */
 454         s32 idletime;           /* Control for activity timeout */
 455         s32 idlecount;  /* Activity timeout counter */
 456         s32 idleclock;  /* How to set bus driver when idle */
 457         bool rxflow_mode;       /* Rx flow control mode */
 458         bool rxflow;            /* Is rx flow control on */
 459         bool alp_only;          /* Don't use HT clock (ALP only) */
 460
 461         u8 *ctrl_frame_buf;
 462         u16 ctrl_frame_len;
 463         bool ctrl_frame_stat;
 464
 465         spinlock_t txq_lock;            /* protect bus->txq */
 466         struct semaphore tx_seq_lock;   /* protect bus->tx_seq */
 467         wait_queue_head_t ctrl_wait;
 468         wait_queue_head_t dcmd_resp_wait;
 469
 470         struct timer_list timer;
 471         struct completion watchdog_wait;
 472         struct task_struct *watchdog_tsk;
 473         bool wd_timer_valid;
 474         uint save_ms;
 475
 476         struct workqueue_struct *brcmf_wq;
 477         struct work_struct datawork;
 478         atomic_t dpc_tskcnt;
 479
 480         bool txoff;             /* Transmit flow-controlled */
 481         struct brcmf_sdio_count sdcnt;
 482         bool sr_enabled; /* SaveRestore enabled */
 483         bool sleeping; /* SDIO bus sleeping */
 484
 485         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 486         bool txglom;            /* host tx glomming enable flag */
 487         u16 head_align;         /* buffer pointer alignment */
 488         u16 sgentry_align;      /* scatter-gather buffer alignment */
 489 };
 490
 491 /* clkstate */
 492 #define CLK_NONE        0
 493 #define CLK_SDONLY      1
 494 #define CLK_PENDING     2
 495 #define CLK_AVAIL       3
 496
 497 #ifdef DEBUG
 498 static int qcount[NUMPRIO];
 499 #endif                          /* DEBUG */
 500
 501 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 502
 503 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 504
 505 /* Retry count for register access failures */
 506 static const uint retry_limit = 2;
 507
 508 /* Limit on rounding up frames */
 509 static const uint max_roundup = 512;
 510
 511 #define ALIGNMENT  4
 512
 513 enum brcmf_sdio_frmtype {
 514         BRCMF_SDIO_FT_NORMAL,
 515         BRCMF_SDIO_FT_SUPER,
 516         BRCMF_SDIO_FT_SUB,
 517 };
 518
 519 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 520
 521 /* SDIO Pad drive strength to select value mappings */
 522 struct sdiod_drive_str {
 523         u8 strength;    /* Pad Drive Strength in mA */
 524         u8 sel;         /* Chip-specific select value */
 525 };
 526
 527 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 528 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 529         {32, 0x6},
 530         {26, 0x7},
 531         {22, 0x4},
 532         {16, 0x5},
 533         {12, 0x2},
 534         {8, 0x3},
 535         {4, 0x0},
 536         {0, 0x1}
 537 };
 538
 539 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 540 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 541         {6, 0x7},
 542         {5, 0x6},
 543         {4, 0x5},
 544         {3, 0x4},
 545         {2, 0x2},
 546         {1, 0x1},
 547         {0, 0x0}
 548 };
 549
 550 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 551 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 552         {3, 0x3},
 553         {2, 0x2},
 554         {1, 0x1},
 555         {0, 0x0} };
 556
 557 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 558 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 559         {16, 0x7},
 560         {12, 0x5},
 561         {8,  0x3},
 562         {4,  0x1}
 563 };
 564
 565 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 566 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 567 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 568 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 569 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 570 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 571 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 572 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 573 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 574 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 575 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 576 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 577 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 578 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 579 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 580 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 581 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 582 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 583 #define BCM4354_FIRMWARE_NAME           "brcm/brcmfmac4354-sdio.bin"
 584 #define BCM4354_NVRAM_NAME              "brcm/brcmfmac4354-sdio.txt"
 585
 586 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 587 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 588 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 589 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 590 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 591 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 592 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 593 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 594 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 595 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 596 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 597 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 598 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 599 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 600 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 601 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 602 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 603 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 604 MODULE_FIRMWARE(BCM4354_FIRMWARE_NAME);
 605 MODULE_FIRMWARE(BCM4354_NVRAM_NAME);
 606
 607 struct brcmf_firmware_names {
 608         u32 chipid;
 609         u32 revmsk;
 610         const char *bin;
 611         const char *nv;
 612 };
 613
 614 enum brcmf_firmware_type {
 615         BRCMF_FIRMWARE_BIN,
 616         BRCMF_FIRMWARE_NVRAM
 617 };
 618
 619 #define BRCMF_FIRMWARE_NVRAM(name) \
 620         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 621
 622 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 623         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 624         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 625         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 626         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 627         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 628         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 629         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 630         { BCM43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 631         { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) },
 632         { BCM4354_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4354) }
 633 };
 634
 635
 636 static const struct firmware *brcmf_sdio_get_fw(struct brcmf_sdio *bus,
 637                                                   enum brcmf_firmware_type type)
 638 {
 639         const struct firmware *fw;
 640         const char *name;
 641         int err, i;
 642
 643         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 644                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 645                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 646                         switch (type) {
 647                         case BRCMF_FIRMWARE_BIN:
 648                                 name = brcmf_fwname_data[i].bin;
 649                                 break;
 650                         case BRCMF_FIRMWARE_NVRAM:
 651                                 name = brcmf_fwname_data[i].nv;
 652                                 break;
 653                         default:
 654                                 brcmf_err("invalid firmware type (%d)\n", type);
 655                                 return NULL;
 656                         }
 657                         goto found;
 658                 }
 659         }
 660         brcmf_err("Unknown chipid %d [%d]\n",
 661                   bus->ci->chip, bus->ci->chiprev);
 662         return NULL;
 663
 664 found:
 665         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 666         if ((err) || (!fw)) {
 667                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 668                 return NULL;
 669         }
 670
 671         return fw;
 672 }
 673
 674 static void pkt_align(struct sk_buff *p, int len, int align)
 675 {
 676         uint datalign;
 677         datalign = (unsigned long)(p->data);
 678         datalign = roundup(datalign, (align)) - datalign;
 679         if (datalign)
 680                 skb_pull(p, datalign);
 681         __skb_trim(p, len);
 682 }
 683
 684 /* To check if there's window offered */
 685 static bool data_ok(struct brcmf_sdio *bus)
 686 {
 687         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 688                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 689 }
 690
 691 /*
 692  * Reads a register in the SDIO hardware block. This block occupies a series of
 693  * adresses on the 32 bit backplane bus.
 694  */
 695 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 696 {
 697         struct brcmf_core *core;
 698         int ret;
 699
 700         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 701         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 702
 703         return ret;
 704 }
 705
 706 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 707 {
 708         struct brcmf_core *core;
 709         int ret;
 710
 711         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 712         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 713
 714         return ret;
 715 }
 716
 717 static int
 718 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 719 {
 720         u8 wr_val = 0, rd_val, cmp_val, bmask;
 721         int err = 0;
 722         int try_cnt = 0;
 723
 724         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 725
 726         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 727         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 728         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 729                           wr_val, &err);
 730
 731         if (on) {
 732                 /* device WAKEUP through KSO:
 733                  * write bit 0 & read back until
 734                  * both bits 0 (kso bit) & 1 (dev on status) are set
 735                  */
 736                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 737                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 738                 bmask = cmp_val;
 739                 usleep_range(2000, 3000);
 740         } else {
 741                 /* Put device to sleep, turn off KSO */
 742                 cmp_val = 0;
 743                 /* only check for bit0, bit1(dev on status) may not
 744                  * get cleared right away
 745                  */
 746                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 747         }
 748
 749         do {
 750                 /* reliable KSO bit set/clr:
 751                  * the sdiod sleep write access is synced to PMU 32khz clk
 752                  * just one write attempt may fail,
 753                  * read it back until it matches written value
 754                  */
 755                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 756                                            &err);
 757                 if (((rd_val & bmask) == cmp_val) && !err)
 758                         break;
 759
 760                 udelay(KSO_WAIT_US);
 761                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 762                                   wr_val, &err);
 763         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 764
 765         if (try_cnt > 2)
 766                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 767                           rd_val, err);
 768
 769         if (try_cnt > MAX_KSO_ATTEMPTS)
 770                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 771
 772         return err;
 773 }
 774
 775 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 776
 777 /* Turn backplane clock on or off */
 778 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 779 {
 780         int err;
 781         u8 clkctl, clkreq, devctl;
 782         unsigned long timeout;
 783
 784         brcmf_dbg(SDIO, "Enter\n");
 785
 786         clkctl = 0;
 787
 788         if (bus->sr_enabled) {
 789                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 790                 return 0;
 791         }
 792
 793         if (on) {
 794                 /* Request HT Avail */
 795                 clkreq =
 796                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 797
 798                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 799                                   clkreq, &err);
 800                 if (err) {
 801                         brcmf_err("HT Avail request error: %d\n", err);
 802                         return -EBADE;
 803                 }
 804
 805                 /* Check current status */
 806                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 807                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 808                 if (err) {
 809                         brcmf_err("HT Avail read error: %d\n", err);
 810                         return -EBADE;
 811                 }
 812
 813                 /* Go to pending and await interrupt if appropriate */
 814                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 815                         /* Allow only clock-available interrupt */
 816                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 817                                                    SBSDIO_DEVICE_CTL, &err);
 818                         if (err) {
 819                                 brcmf_err("Devctl error setting CA: %d\n",
 820                                           err);
 821                                 return -EBADE;
 822                         }
 823
 824                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 825                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 826                                           devctl, &err);
 827                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 828                         bus->clkstate = CLK_PENDING;
 829
 830                         return 0;
 831                 } else if (bus->clkstate == CLK_PENDING) {
 832                         /* Cancel CA-only interrupt filter */
 833                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 834                                                    SBSDIO_DEVICE_CTL, &err);
 835                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 836                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 837                                           devctl, &err);
 838                 }
 839
 840                 /* Otherwise, wait here (polling) for HT Avail */
 841                 timeout = jiffies +
 842                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 843                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 844                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 845                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 846                                                    &err);
 847                         if (time_after(jiffies, timeout))
 848                                 break;
 849                         else
 850                                 usleep_range(5000, 10000);
 851                 }
 852                 if (err) {
 853                         brcmf_err("HT Avail request error: %d\n", err);
 854                         return -EBADE;
 855                 }
 856                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 857                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 858                                   PMU_MAX_TRANSITION_DLY, clkctl);
 859                         return -EBADE;
 860                 }
 861
 862                 /* Mark clock available */
 863                 bus->clkstate = CLK_AVAIL;
 864                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 865
 866 #if defined(DEBUG)
 867                 if (!bus->alp_only) {
 868                         if (SBSDIO_ALPONLY(clkctl))
 869                                 brcmf_err("HT Clock should be on\n");
 870                 }
 871 #endif                          /* defined (DEBUG) */
 872
 873         } else {
 874                 clkreq = 0;
 875
 876                 if (bus->clkstate == CLK_PENDING) {
 877                         /* Cancel CA-only interrupt filter */
 878                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 879                                                    SBSDIO_DEVICE_CTL, &err);
 880                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 881                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 882                                           devctl, &err);
 883                 }
 884
 885                 bus->clkstate = CLK_SDONLY;
 886                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 887                                   clkreq, &err);
 888                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 889                 if (err) {
 890                         brcmf_err("Failed access turning clock off: %d\n",
 891                                   err);
 892                         return -EBADE;
 893                 }
 894         }
 895         return 0;
 896 }
 897
 898 /* Change idle/active SD state */
 899 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 900 {
 901         brcmf_dbg(SDIO, "Enter\n");
 902
 903         if (on)
 904                 bus->clkstate = CLK_SDONLY;
 905         else
 906                 bus->clkstate = CLK_NONE;
 907
 908         return 0;
 909 }
 910
 911 /* Transition SD and backplane clock readiness */
 912 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 913 {
 914 #ifdef DEBUG
 915         uint oldstate = bus->clkstate;
 916 #endif                          /* DEBUG */
 917
 918         brcmf_dbg(SDIO, "Enter\n");
 919
 920         /* Early exit if we're already there */
 921         if (bus->clkstate == target) {
 922                 if (target == CLK_AVAIL) {
 923                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 924                         bus->activity = true;
 925                 }
 926                 return 0;
 927         }
 928
 929         switch (target) {
 930         case CLK_AVAIL:
 931                 /* Make sure SD clock is available */
 932                 if (bus->clkstate == CLK_NONE)
 933                         brcmf_sdio_sdclk(bus, true);
 934                 /* Now request HT Avail on the backplane */
 935                 brcmf_sdio_htclk(bus, true, pendok);
 936                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 937                 bus->activity = true;
 938                 break;
 939
 940         case CLK_SDONLY:
 941                 /* Remove HT request, or bring up SD clock */
 942                 if (bus->clkstate == CLK_NONE)
 943                         brcmf_sdio_sdclk(bus, true);
 944                 else if (bus->clkstate == CLK_AVAIL)
 945                         brcmf_sdio_htclk(bus, false, false);
 946                 else
 947                         brcmf_err("request for %d -> %d\n",
 948                                   bus->clkstate, target);
 949                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 950                 break;
 951
 952         case CLK_NONE:
 953                 /* Make sure to remove HT request */
 954                 if (bus->clkstate == CLK_AVAIL)
 955                         brcmf_sdio_htclk(bus, false, false);
 956                 /* Now remove the SD clock */
 957                 brcmf_sdio_sdclk(bus, false);
 958                 brcmf_sdio_wd_timer(bus, 0);
 959                 break;
 960         }
 961 #ifdef DEBUG
 962         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 963 #endif                          /* DEBUG */
 964
 965         return 0;
 966 }
 967
 968 static int
 969 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 970 {
 971         int err = 0;
 972         u8 clkcsr;
 973
 974         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 975                   (sleep ? "SLEEP" : "WAKE"),
 976                   (bus->sleeping ? "SLEEP" : "WAKE"));
 977
 978         /* If SR is enabled control bus state with KSO */
 979         if (bus->sr_enabled) {
 980                 /* Done if we're already in the requested state */
 981                 if (sleep == bus->sleeping)
 982                         goto end;
 983
 984                 /* Going to sleep */
 985                 if (sleep) {
 986                         /* Don't sleep if something is pending */
 987                         if (atomic_read(&bus->intstatus) ||
 988                             atomic_read(&bus->ipend) > 0 ||
 989                             (!atomic_read(&bus->fcstate) &&
 990                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 991                             data_ok(bus))) {
 992                                  err = -EBUSY;
 993                                  goto done;
 994                         }
 995
 996                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
 997                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 998                                                    &err);
 999                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
1000                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
1001                                 brcmf_sdiod_regwb(bus->sdiodev,
1002                                                   SBSDIO_FUNC1_CHIPCLKCSR,
1003                                                   SBSDIO_ALP_AVAIL_REQ, &err);
1004                         }
1005                         err = brcmf_sdio_kso_control(bus, false);
1006                         /* disable watchdog */
1007                         if (!err)
1008                                 brcmf_sdio_wd_timer(bus, 0);
1009                 } else {
1010                         bus->idlecount = 0;
1011                         err = brcmf_sdio_kso_control(bus, true);
1012                 }
1013                 if (!err) {
1014                         /* Change state */
1015                         bus->sleeping = sleep;
1016                         brcmf_dbg(SDIO, "new state %s\n",
1017                                   (sleep ? "SLEEP" : "WAKE"));
1018                 } else {
1019                         brcmf_err("error while changing bus sleep state %d\n",
1020                                   err);
1021                         goto done;
1022                 }
1023         }
1024
1025 end:
1026         /* control clocks */
1027         if (sleep) {
1028                 if (!bus->sr_enabled)
1029                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
1030         } else {
1031                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
1032         }
1033 done:
1034         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
1035         return err;
1036
1037 }
1038
1039 #ifdef DEBUG
1040 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
1041 {
1042         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
1043 }
1044
1045 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
1046                                  struct sdpcm_shared *sh)
1047 {
1048         u32 addr;
1049         int rv;
1050         u32 shaddr = 0;
1051         struct sdpcm_shared_le sh_le;
1052         __le32 addr_le;
1053
1054         shaddr = bus->ci->rambase + bus->ramsize - 4;
1055
1056         /*
1057          * Read last word in socram to determine
1058          * address of sdpcm_shared structure
1059          */
1060         sdio_claim_host(bus->sdiodev->func[1]);
1061         brcmf_sdio_bus_sleep(bus, false, false);
1062         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
1063         sdio_release_host(bus->sdiodev->func[1]);
1064         if (rv < 0)
1065                 return rv;
1066
1067         addr = le32_to_cpu(addr_le);
1068
1069         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
1070
1071         /*
1072          * Check if addr is valid.
1073          * NVRAM length at the end of memory should have been overwritten.
1074          */
1075         if (!brcmf_sdio_valid_shared_address(addr)) {
1076                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
1077                                   addr);
1078                         return -EINVAL;
1079         }
1080
1081         /* Read hndrte_shared structure */
1082         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1083                                sizeof(struct sdpcm_shared_le));
1084         if (rv < 0)
1085                 return rv;
1086
1087         /* Endianness */
1088         sh->flags = le32_to_cpu(sh_le.flags);
1089         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1090         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1091         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1092         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1093         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1094         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1095
1096         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1097                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1098                           SDPCM_SHARED_VERSION,
1099                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1100                 return -EPROTO;
1101         }
1102
1103         return 0;
1104 }
1105
1106 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1107 {
1108         struct sdpcm_shared sh;
1109
1110         if (brcmf_sdio_readshared(bus, &sh) == 0)
1111                 bus->console_addr = sh.console_addr;
1112 }
1113 #else
1114 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1115 {
1116 }
1117 #endif /* DEBUG */
1118
1119 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1120 {
1121         u32 intstatus = 0;
1122         u32 hmb_data;
1123         u8 fcbits;
1124         int ret;
1125
1126         brcmf_dbg(SDIO, "Enter\n");
1127
1128         /* Read mailbox data and ack that we did so */
1129         ret = r_sdreg32(bus, &hmb_data,
1130                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1131
1132         if (ret == 0)
1133                 w_sdreg32(bus, SMB_INT_ACK,
1134                           offsetof(struct sdpcmd_regs, tosbmailbox));
1135         bus->sdcnt.f1regdata += 2;
1136
1137         /* Dongle recomposed rx frames, accept them again */
1138         if (hmb_data & HMB_DATA_NAKHANDLED) {
1139                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1140                           bus->rx_seq);
1141                 if (!bus->rxskip)
1142                         brcmf_err("unexpected NAKHANDLED!\n");
1143
1144                 bus->rxskip = false;
1145                 intstatus |= I_HMB_FRAME_IND;
1146         }
1147
1148         /*
1149          * DEVREADY does not occur with gSPI.
1150          */
1151         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1152                 bus->sdpcm_ver =
1153                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1154                     HMB_DATA_VERSION_SHIFT;
1155                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1156                         brcmf_err("Version mismatch, dongle reports %d, "
1157                                   "expecting %d\n",
1158                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1159                 else
1160                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1161                                   bus->sdpcm_ver);
1162
1163                 /*
1164                  * Retrieve console state address now that firmware should have
1165                  * updated it.
1166                  */
1167                 brcmf_sdio_get_console_addr(bus);
1168         }
1169
1170         /*
1171          * Flow Control has been moved into the RX headers and this out of band
1172          * method isn't used any more.
1173          * remaining backward compatible with older dongles.
1174          */
1175         if (hmb_data & HMB_DATA_FC) {
1176                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1177                                                         HMB_DATA_FCDATA_SHIFT;
1178
1179                 if (fcbits & ~bus->flowcontrol)
1180                         bus->sdcnt.fc_xoff++;
1181
1182                 if (bus->flowcontrol & ~fcbits)
1183                         bus->sdcnt.fc_xon++;
1184
1185                 bus->sdcnt.fc_rcvd++;
1186                 bus->flowcontrol = fcbits;
1187         }
1188
1189         /* Shouldn't be any others */
1190         if (hmb_data & ~(HMB_DATA_DEVREADY |
1191                          HMB_DATA_NAKHANDLED |
1192                          HMB_DATA_FC |
1193                          HMB_DATA_FWREADY |
1194                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1195                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1196                           hmb_data);
1197
1198         return intstatus;
1199 }
1200
1201 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1202 {
1203         uint retries = 0;
1204         u16 lastrbc;
1205         u8 hi, lo;
1206         int err;
1207
1208         brcmf_err("%sterminate frame%s\n",
1209                   abort ? "abort command, " : "",
1210                   rtx ? ", send NAK" : "");
1211
1212         if (abort)
1213                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1214
1215         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1216                           SFC_RF_TERM, &err);
1217         bus->sdcnt.f1regdata++;
1218
1219         /* Wait until the packet has been flushed (device/FIFO stable) */
1220         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1221                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1222                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1223                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1224                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1225                 bus->sdcnt.f1regdata += 2;
1226
1227                 if ((hi == 0) && (lo == 0))
1228                         break;
1229
1230                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1231                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1232                                   lastrbc, (hi << 8) + lo);
1233                 }
1234                 lastrbc = (hi << 8) + lo;
1235         }
1236
1237         if (!retries)
1238                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1239         else
1240                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1241
1242         if (rtx) {
1243                 bus->sdcnt.rxrtx++;
1244                 err = w_sdreg32(bus, SMB_NAK,
1245                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1246
1247                 bus->sdcnt.f1regdata++;
1248                 if (err == 0)
1249                         bus->rxskip = true;
1250         }
1251
1252         /* Clear partial in any case */
1253         bus->cur_read.len = 0;
1254 }
1255
1256 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1257 {
1258         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1259         u8 i, hi, lo;
1260
1261         /* On failure, abort the command and terminate the frame */
1262         brcmf_err("sdio error, abort command and terminate frame\n");
1263         bus->sdcnt.tx_sderrs++;
1264
1265         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1266         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1267         bus->sdcnt.f1regdata++;
1268
1269         for (i = 0; i < 3; i++) {
1270                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1271                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1272                 bus->sdcnt.f1regdata += 2;
1273                 if ((hi == 0) && (lo == 0))
1274                         break;
1275         }
1276 }
1277
1278 /* return total length of buffer chain */
1279 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1280 {
1281         struct sk_buff *p;
1282         uint total;
1283
1284         total = 0;
1285         skb_queue_walk(&bus->glom, p)
1286                 total += p->len;
1287         return total;
1288 }
1289
1290 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1291 {
1292         struct sk_buff *cur, *next;
1293
1294         skb_queue_walk_safe(&bus->glom, cur, next) {
1295                 skb_unlink(cur, &bus->glom);
1296                 brcmu_pkt_buf_free_skb(cur);
1297         }
1298 }
1299
1300 /**
1301  * brcmfmac sdio bus specific header
1302  * This is the lowest layer header wrapped on the packets transmitted between
1303  * host and WiFi dongle which contains information needed for SDIO core and
1304  * firmware
1305  *
1306  * It consists of 3 parts: hardware header, hardware extension header and
1307  * software header
1308  * hardware header (frame tag) - 4 bytes
1309  * Byte 0~1: Frame length
1310  * Byte 2~3: Checksum, bit-wise inverse of frame length
1311  * hardware extension header - 8 bytes
1312  * Tx glom mode only, N/A for Rx or normal Tx
1313  * Byte 0~1: Packet length excluding hw frame tag
1314  * Byte 2: Reserved
1315  * Byte 3: Frame flags, bit 0: last frame indication
1316  * Byte 4~5: Reserved
1317  * Byte 6~7: Tail padding length
1318  * software header - 8 bytes
1319  * Byte 0: Rx/Tx sequence number
1320  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1321  * Byte 2: Length of next data frame, reserved for Tx
1322  * Byte 3: Data offset
1323  * Byte 4: Flow control bits, reserved for Tx
1324  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1325  * Byte 6~7: Reserved
1326  */
1327 #define SDPCM_HWHDR_LEN                 4
1328 #define SDPCM_HWEXT_LEN                 8
1329 #define SDPCM_SWHDR_LEN                 8
1330 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1331 /* software header */
1332 #define SDPCM_SEQ_MASK                  0x000000ff
1333 #define SDPCM_SEQ_WRAP                  256
1334 #define SDPCM_CHANNEL_MASK              0x00000f00
1335 #define SDPCM_CHANNEL_SHIFT             8
1336 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1337 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1338 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1339 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1340 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1341 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1342 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1343 #define SDPCM_NEXTLEN_SHIFT             16
1344 #define SDPCM_DOFFSET_MASK              0xff000000
1345 #define SDPCM_DOFFSET_SHIFT             24
1346 #define SDPCM_FCMASK_MASK               0x000000ff
1347 #define SDPCM_WINDOW_MASK               0x0000ff00
1348 #define SDPCM_WINDOW_SHIFT              8
1349
1350 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1351 {
1352         u32 hdrvalue;
1353         hdrvalue = *(u32 *)swheader;
1354         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1355 }
1356
1357 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1358                               struct brcmf_sdio_hdrinfo *rd,
1359                               enum brcmf_sdio_frmtype type)
1360 {
1361         u16 len, checksum;
1362         u8 rx_seq, fc, tx_seq_max;
1363         u32 swheader;
1364
1365         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1366
1367         /* hw header */
1368         len = get_unaligned_le16(header);
1369         checksum = get_unaligned_le16(header + sizeof(u16));
1370         /* All zero means no more to read */
1371         if (!(len | checksum)) {
1372                 bus->rxpending = false;
1373                 return -ENODATA;
1374         }
1375         if ((u16)(~(len ^ checksum))) {
1376                 brcmf_err("HW header checksum error\n");
1377                 bus->sdcnt.rx_badhdr++;
1378                 brcmf_sdio_rxfail(bus, false, false);
1379                 return -EIO;
1380         }
1381         if (len < SDPCM_HDRLEN) {
1382                 brcmf_err("HW header length error\n");
1383                 return -EPROTO;
1384         }
1385         if (type == BRCMF_SDIO_FT_SUPER &&
1386             (roundup(len, bus->blocksize) != rd->len)) {
1387                 brcmf_err("HW superframe header length error\n");
1388                 return -EPROTO;
1389         }
1390         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1391                 brcmf_err("HW subframe header length error\n");
1392                 return -EPROTO;
1393         }
1394         rd->len = len;
1395
1396         /* software header */
1397         header += SDPCM_HWHDR_LEN;
1398         swheader = le32_to_cpu(*(__le32 *)header);
1399         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1400                 brcmf_err("Glom descriptor found in superframe head\n");
1401                 rd->len = 0;
1402                 return -EINVAL;
1403         }
1404         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1405         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1406         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1407             type != BRCMF_SDIO_FT_SUPER) {
1408                 brcmf_err("HW header length too long\n");
1409                 bus->sdcnt.rx_toolong++;
1410                 brcmf_sdio_rxfail(bus, false, false);
1411                 rd->len = 0;
1412                 return -EPROTO;
1413         }
1414         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1415                 brcmf_err("Wrong channel for superframe\n");
1416                 rd->len = 0;
1417                 return -EINVAL;
1418         }
1419         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1420             rd->channel != SDPCM_EVENT_CHANNEL) {
1421                 brcmf_err("Wrong channel for subframe\n");
1422                 rd->len = 0;
1423                 return -EINVAL;
1424         }
1425         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1426         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1427                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1428                 bus->sdcnt.rx_badhdr++;
1429                 brcmf_sdio_rxfail(bus, false, false);
1430                 rd->len = 0;
1431                 return -ENXIO;
1432         }
1433         if (rd->seq_num != rx_seq) {
1434                 brcmf_err("seq %d: sequence number error, expect %d\n",
1435                           rx_seq, rd->seq_num);
1436                 bus->sdcnt.rx_badseq++;
1437                 rd->seq_num = rx_seq;
1438         }
1439         /* no need to check the reset for subframe */
1440         if (type == BRCMF_SDIO_FT_SUB)
1441                 return 0;
1442         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1443         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1444                 /* only warm for NON glom packet */
1445                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1446                         brcmf_err("seq %d: next length error\n", rx_seq);
1447                 rd->len_nxtfrm = 0;
1448         }
1449         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1450         fc = swheader & SDPCM_FCMASK_MASK;
1451         if (bus->flowcontrol != fc) {
1452                 if (~bus->flowcontrol & fc)
1453                         bus->sdcnt.fc_xoff++;
1454                 if (bus->flowcontrol & ~fc)
1455                         bus->sdcnt.fc_xon++;
1456                 bus->sdcnt.fc_rcvd++;
1457                 bus->flowcontrol = fc;
1458         }
1459         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1460         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1461                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1462                 tx_seq_max = bus->tx_seq + 2;
1463         }
1464         bus->tx_max = tx_seq_max;
1465
1466         return 0;
1467 }
1468
1469 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1470 {
1471         *(__le16 *)header = cpu_to_le16(frm_length);
1472         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1473 }
1474
1475 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1476                               struct brcmf_sdio_hdrinfo *hd_info)
1477 {
1478         u32 hdrval;
1479         u8 hdr_offset;
1480
1481         brcmf_sdio_update_hwhdr(header, hd_info->len);
1482         hdr_offset = SDPCM_HWHDR_LEN;
1483
1484         if (bus->txglom) {
1485                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1486                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1487                 hdrval = (u16)hd_info->tail_pad << 16;
1488                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1489                 hdr_offset += SDPCM_HWEXT_LEN;
1490         }
1491
1492         hdrval = hd_info->seq_num;
1493         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1494                   SDPCM_CHANNEL_MASK;
1495         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1496                   SDPCM_DOFFSET_MASK;
1497         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1498         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1499         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1500 }
1501
1502 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1503 {
1504         u16 dlen, totlen;
1505         u8 *dptr, num = 0;
1506         u16 sublen;
1507         struct sk_buff *pfirst, *pnext;
1508
1509         int errcode;
1510         u8 doff, sfdoff;
1511
1512         struct brcmf_sdio_hdrinfo rd_new;
1513
1514         /* If packets, issue read(s) and send up packet chain */
1515         /* Return sequence numbers consumed? */
1516
1517         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1518                   bus->glomd, skb_peek(&bus->glom));
1519
1520         /* If there's a descriptor, generate the packet chain */
1521         if (bus->glomd) {
1522                 pfirst = pnext = NULL;
1523                 dlen = (u16) (bus->glomd->len);
1524                 dptr = bus->glomd->data;
1525                 if (!dlen || (dlen & 1)) {
1526                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1527                                   dlen);
1528                         dlen = 0;
1529                 }
1530
1531                 for (totlen = num = 0; dlen; num++) {
1532                         /* Get (and move past) next length */
1533                         sublen = get_unaligned_le16(dptr);
1534                         dlen -= sizeof(u16);
1535                         dptr += sizeof(u16);
1536                         if ((sublen < SDPCM_HDRLEN) ||
1537                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1538                                 brcmf_err("descriptor len %d bad: %d\n",
1539                                           num, sublen);
1540                                 pnext = NULL;
1541                                 break;
1542                         }
1543                         if (sublen % bus->sgentry_align) {
1544                                 brcmf_err("sublen %d not multiple of %d\n",
1545                                           sublen, bus->sgentry_align);
1546                         }
1547                         totlen += sublen;
1548
1549                         /* For last frame, adjust read len so total
1550                                  is a block multiple */
1551                         if (!dlen) {
1552                                 sublen +=
1553                                     (roundup(totlen, bus->blocksize) - totlen);
1554                                 totlen = roundup(totlen, bus->blocksize);
1555                         }
1556
1557                         /* Allocate/chain packet for next subframe */
1558                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1559                         if (pnext == NULL) {
1560                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1561                                           num, sublen);
1562                                 break;
1563                         }
1564                         skb_queue_tail(&bus->glom, pnext);
1565
1566                         /* Adhere to start alignment requirements */
1567                         pkt_align(pnext, sublen, bus->sgentry_align);
1568                 }
1569
1570                 /* If all allocations succeeded, save packet chain
1571                          in bus structure */
1572                 if (pnext) {
1573                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1574                                   totlen, num);
1575                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1576                             totlen != bus->cur_read.len) {
1577                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1578                                           bus->cur_read.len, totlen, rxseq);
1579                         }
1580                         pfirst = pnext = NULL;
1581                 } else {
1582                         brcmf_sdio_free_glom(bus);
1583                         num = 0;
1584                 }
1585
1586                 /* Done with descriptor packet */
1587                 brcmu_pkt_buf_free_skb(bus->glomd);
1588                 bus->glomd = NULL;
1589                 bus->cur_read.len = 0;
1590         }
1591
1592         /* Ok -- either we just generated a packet chain,
1593                  or had one from before */
1594         if (!skb_queue_empty(&bus->glom)) {
1595                 if (BRCMF_GLOM_ON()) {
1596                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1597                         skb_queue_walk(&bus->glom, pnext) {
1598                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1599                                           pnext, (u8 *) (pnext->data),
1600                                           pnext->len, pnext->len);
1601                         }
1602                 }
1603
1604                 pfirst = skb_peek(&bus->glom);
1605                 dlen = (u16) brcmf_sdio_glom_len(bus);
1606
1607                 /* Do an SDIO read for the superframe.  Configurable iovar to
1608                  * read directly into the chained packet, or allocate a large
1609                  * packet and and copy into the chain.
1610                  */
1611                 sdio_claim_host(bus->sdiodev->func[1]);
1612                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1613                                                  &bus->glom, dlen);
1614                 sdio_release_host(bus->sdiodev->func[1]);
1615                 bus->sdcnt.f2rxdata++;
1616
1617                 /* On failure, kill the superframe, allow a couple retries */
1618                 if (errcode < 0) {
1619                         brcmf_err("glom read of %d bytes failed: %d\n",
1620                                   dlen, errcode);
1621
1622                         sdio_claim_host(bus->sdiodev->func[1]);
1623                         if (bus->glomerr++ < 3) {
1624                                 brcmf_sdio_rxfail(bus, true, true);
1625                         } else {
1626                                 bus->glomerr = 0;
1627                                 brcmf_sdio_rxfail(bus, true, false);
1628                                 bus->sdcnt.rxglomfail++;
1629                                 brcmf_sdio_free_glom(bus);
1630                         }
1631                         sdio_release_host(bus->sdiodev->func[1]);
1632                         return 0;
1633                 }
1634
1635                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1636                                    pfirst->data, min_t(int, pfirst->len, 48),
1637                                    "SUPERFRAME:\n");
1638
1639                 rd_new.seq_num = rxseq;
1640                 rd_new.len = dlen;
1641                 sdio_claim_host(bus->sdiodev->func[1]);
1642                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1643                                              BRCMF_SDIO_FT_SUPER);
1644                 sdio_release_host(bus->sdiodev->func[1]);
1645                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1646
1647                 /* Remove superframe header, remember offset */
1648                 skb_pull(pfirst, rd_new.dat_offset);
1649                 sfdoff = rd_new.dat_offset;
1650                 num = 0;
1651
1652                 /* Validate all the subframe headers */
1653                 skb_queue_walk(&bus->glom, pnext) {
1654                         /* leave when invalid subframe is found */
1655                         if (errcode)
1656                                 break;
1657
1658                         rd_new.len = pnext->len;
1659                         rd_new.seq_num = rxseq++;
1660                         sdio_claim_host(bus->sdiodev->func[1]);
1661                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1662                                                      BRCMF_SDIO_FT_SUB);
1663                         sdio_release_host(bus->sdiodev->func[1]);
1664                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1665                                            pnext->data, 32, "subframe:\n");
1666
1667                         num++;
1668                 }
1669
1670                 if (errcode) {
1671                         /* Terminate frame on error, request
1672                                  a couple retries */
1673                         sdio_claim_host(bus->sdiodev->func[1]);
1674                         if (bus->glomerr++ < 3) {
1675                                 /* Restore superframe header space */
1676                                 skb_push(pfirst, sfdoff);
1677                                 brcmf_sdio_rxfail(bus, true, true);
1678                         } else {
1679                                 bus->glomerr = 0;
1680                                 brcmf_sdio_rxfail(bus, true, false);
1681                                 bus->sdcnt.rxglomfail++;
1682                                 brcmf_sdio_free_glom(bus);
1683                         }
1684                         sdio_release_host(bus->sdiodev->func[1]);
1685                         bus->cur_read.len = 0;
1686                         return 0;
1687                 }
1688
1689                 /* Basic SD framing looks ok - process each packet (header) */
1690
1691                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1692                         dptr = (u8 *) (pfirst->data);
1693                         sublen = get_unaligned_le16(dptr);
1694                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1695
1696                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1697                                            dptr, pfirst->len,
1698                                            "Rx Subframe Data:\n");
1699
1700                         __skb_trim(pfirst, sublen);
1701                         skb_pull(pfirst, doff);
1702
1703                         if (pfirst->len == 0) {
1704                                 skb_unlink(pfirst, &bus->glom);
1705                                 brcmu_pkt_buf_free_skb(pfirst);
1706                                 continue;
1707                         }
1708
1709                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1710                                            pfirst->data,
1711                                            min_t(int, pfirst->len, 32),
1712                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1713                                            bus->glom.qlen, pfirst, pfirst->data,
1714                                            pfirst->len, pfirst->next,
1715                                            pfirst->prev);
1716                         skb_unlink(pfirst, &bus->glom);
1717                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1718                         bus->sdcnt.rxglompkts++;
1719                 }
1720
1721                 bus->sdcnt.rxglomframes++;
1722         }
1723         return num;
1724 }
1725
1726 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1727                                      bool *pending)
1728 {
1729         DECLARE_WAITQUEUE(wait, current);
1730         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1731
1732         /* Wait until control frame is available */
1733         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1734         set_current_state(TASK_INTERRUPTIBLE);
1735
1736         while (!(*condition) && (!signal_pending(current) && timeout))
1737                 timeout = schedule_timeout(timeout);
1738
1739         if (signal_pending(current))
1740                 *pending = true;
1741
1742         set_current_state(TASK_RUNNING);
1743         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1744
1745         return timeout;
1746 }
1747
1748 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1749 {
1750         if (waitqueue_active(&bus->dcmd_resp_wait))
1751                 wake_up_interruptible(&bus->dcmd_resp_wait);
1752
1753         return 0;
1754 }
1755 static void
1756 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1757 {
1758         uint rdlen, pad;
1759         u8 *buf = NULL, *rbuf;
1760         int sdret;
1761
1762         brcmf_dbg(TRACE, "Enter\n");
1763
1764         if (bus->rxblen)
1765                 buf = vzalloc(bus->rxblen);
1766         if (!buf)
1767                 goto done;
1768
1769         rbuf = bus->rxbuf;
1770         pad = ((unsigned long)rbuf % bus->head_align);
1771         if (pad)
1772                 rbuf += (bus->head_align - pad);
1773
1774         /* Copy the already-read portion over */
1775         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1776         if (len <= BRCMF_FIRSTREAD)
1777                 goto gotpkt;
1778
1779         /* Raise rdlen to next SDIO block to avoid tail command */
1780         rdlen = len - BRCMF_FIRSTREAD;
1781         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1782                 pad = bus->blocksize - (rdlen % bus->blocksize);
1783                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1784                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1785                         rdlen += pad;
1786         } else if (rdlen % bus->head_align) {
1787                 rdlen += bus->head_align - (rdlen % bus->head_align);
1788         }
1789
1790         /* Drop if the read is too big or it exceeds our maximum */
1791         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1792                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1793                           rdlen, bus->sdiodev->bus_if->maxctl);
1794                 brcmf_sdio_rxfail(bus, false, false);
1795                 goto done;
1796         }
1797
1798         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1799                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1800                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1801                 bus->sdcnt.rx_toolong++;
1802                 brcmf_sdio_rxfail(bus, false, false);
1803                 goto done;
1804         }
1805
1806         /* Read remain of frame body */
1807         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1808         bus->sdcnt.f2rxdata++;
1809
1810         /* Control frame failures need retransmission */
1811         if (sdret < 0) {
1812                 brcmf_err("read %d control bytes failed: %d\n",
1813                           rdlen, sdret);
1814                 bus->sdcnt.rxc_errors++;
1815                 brcmf_sdio_rxfail(bus, true, true);
1816                 goto done;
1817         } else
1818                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1819
1820 gotpkt:
1821
1822         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1823                            buf, len, "RxCtrl:\n");
1824
1825         /* Point to valid data and indicate its length */
1826         spin_lock_bh(&bus->rxctl_lock);
1827         if (bus->rxctl) {
1828                 brcmf_err("last control frame is being processed.\n");
1829                 spin_unlock_bh(&bus->rxctl_lock);
1830                 vfree(buf);
1831                 goto done;
1832         }
1833         bus->rxctl = buf + doff;
1834         bus->rxctl_orig = buf;
1835         bus->rxlen = len - doff;
1836         spin_unlock_bh(&bus->rxctl_lock);
1837
1838 done:
1839         /* Awake any waiters */
1840         brcmf_sdio_dcmd_resp_wake(bus);
1841 }
1842
1843 /* Pad read to blocksize for efficiency */
1844 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1845 {
1846         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1847                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1848                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1849                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1850                         *rdlen += *pad;
1851         } else if (*rdlen % bus->head_align) {
1852                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1853         }
1854 }
1855
1856 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1857 {
1858         struct sk_buff *pkt;            /* Packet for event or data frames */
1859         u16 pad;                /* Number of pad bytes to read */
1860         uint rxleft = 0;        /* Remaining number of frames allowed */
1861         int ret;                /* Return code from calls */
1862         uint rxcount = 0;       /* Total frames read */
1863         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1864         u8 head_read = 0;
1865
1866         brcmf_dbg(TRACE, "Enter\n");
1867
1868         /* Not finished unless we encounter no more frames indication */
1869         bus->rxpending = true;
1870
1871         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1872              !bus->rxskip && rxleft && brcmf_bus_ready(bus->sdiodev->bus_if);
1873              rd->seq_num++, rxleft--) {
1874
1875                 /* Handle glomming separately */
1876                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1877                         u8 cnt;
1878                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1879                                   bus->glomd, skb_peek(&bus->glom));
1880                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1881                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1882                         rd->seq_num += cnt - 1;
1883                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1884                         continue;
1885                 }
1886
1887                 rd->len_left = rd->len;
1888                 /* read header first for unknow frame length */
1889                 sdio_claim_host(bus->sdiodev->func[1]);
1890                 if (!rd->len) {
1891                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1892                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1893                         bus->sdcnt.f2rxhdrs++;
1894                         if (ret < 0) {
1895                                 brcmf_err("RXHEADER FAILED: %d\n",
1896                                           ret);
1897                                 bus->sdcnt.rx_hdrfail++;
1898                                 brcmf_sdio_rxfail(bus, true, true);
1899                                 sdio_release_host(bus->sdiodev->func[1]);
1900                                 continue;
1901                         }
1902
1903                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1904                                            bus->rxhdr, SDPCM_HDRLEN,
1905                                            "RxHdr:\n");
1906
1907                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1908                                                BRCMF_SDIO_FT_NORMAL)) {
1909                                 sdio_release_host(bus->sdiodev->func[1]);
1910                                 if (!bus->rxpending)
1911                                         break;
1912                                 else
1913                                         continue;
1914                         }
1915
1916                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1917                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1918                                                         rd->len,
1919                                                         rd->dat_offset);
1920                                 /* prepare the descriptor for the next read */
1921                                 rd->len = rd->len_nxtfrm << 4;
1922                                 rd->len_nxtfrm = 0;
1923                                 /* treat all packet as event if we don't know */
1924                                 rd->channel = SDPCM_EVENT_CHANNEL;
1925                                 sdio_release_host(bus->sdiodev->func[1]);
1926                                 continue;
1927                         }
1928                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1929                                        rd->len - BRCMF_FIRSTREAD : 0;
1930                         head_read = BRCMF_FIRSTREAD;
1931                 }
1932
1933                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1934
1935                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1936                                             bus->head_align);
1937                 if (!pkt) {
1938                         /* Give up on data, request rtx of events */
1939                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1940                         brcmf_sdio_rxfail(bus, false,
1941                                             RETRYCHAN(rd->channel));
1942                         sdio_release_host(bus->sdiodev->func[1]);
1943                         continue;
1944                 }
1945                 skb_pull(pkt, head_read);
1946                 pkt_align(pkt, rd->len_left, bus->head_align);
1947
1948                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1949                 bus->sdcnt.f2rxdata++;
1950                 sdio_release_host(bus->sdiodev->func[1]);
1951
1952                 if (ret < 0) {
1953                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1954                                   rd->len, rd->channel, ret);
1955                         brcmu_pkt_buf_free_skb(pkt);
1956                         sdio_claim_host(bus->sdiodev->func[1]);
1957                         brcmf_sdio_rxfail(bus, true,
1958                                             RETRYCHAN(rd->channel));
1959                         sdio_release_host(bus->sdiodev->func[1]);
1960                         continue;
1961                 }
1962
1963                 if (head_read) {
1964                         skb_push(pkt, head_read);
1965                         memcpy(pkt->data, bus->rxhdr, head_read);
1966                         head_read = 0;
1967                 } else {
1968                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1969                         rd_new.seq_num = rd->seq_num;
1970                         sdio_claim_host(bus->sdiodev->func[1]);
1971                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1972                                                BRCMF_SDIO_FT_NORMAL)) {
1973                                 rd->len = 0;
1974                                 brcmu_pkt_buf_free_skb(pkt);
1975                         }
1976                         bus->sdcnt.rx_readahead_cnt++;
1977                         if (rd->len != roundup(rd_new.len, 16)) {
1978                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1979                                           rd->len,
1980                                           roundup(rd_new.len, 16) >> 4);
1981                                 rd->len = 0;
1982                                 brcmf_sdio_rxfail(bus, true, true);
1983                                 sdio_release_host(bus->sdiodev->func[1]);
1984                                 brcmu_pkt_buf_free_skb(pkt);
1985                                 continue;
1986                         }
1987                         sdio_release_host(bus->sdiodev->func[1]);
1988                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1989                         rd->channel = rd_new.channel;
1990                         rd->dat_offset = rd_new.dat_offset;
1991
1992                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1993                                              BRCMF_DATA_ON()) &&
1994                                            BRCMF_HDRS_ON(),
1995                                            bus->rxhdr, SDPCM_HDRLEN,
1996                                            "RxHdr:\n");
1997
1998                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1999                                 brcmf_err("readahead on control packet %d?\n",
2000                                           rd_new.seq_num);
2001                                 /* Force retry w/normal header read */
2002                                 rd->len = 0;
2003                                 sdio_claim_host(bus->sdiodev->func[1]);
2004                                 brcmf_sdio_rxfail(bus, false, true);
2005                                 sdio_release_host(bus->sdiodev->func[1]);
2006                                 brcmu_pkt_buf_free_skb(pkt);
2007                                 continue;
2008                         }
2009                 }
2010
2011                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
2012                                    pkt->data, rd->len, "Rx Data:\n");
2013
2014                 /* Save superframe descriptor and allocate packet frame */
2015                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
2016                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
2017                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2018                                           rd->len);
2019                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2020                                                    pkt->data, rd->len,
2021                                                    "Glom Data:\n");
2022                                 __skb_trim(pkt, rd->len);
2023                                 skb_pull(pkt, SDPCM_HDRLEN);
2024                                 bus->glomd = pkt;
2025                         } else {
2026                                 brcmf_err("%s: glom superframe w/o "
2027                                           "descriptor!\n", __func__);
2028                                 sdio_claim_host(bus->sdiodev->func[1]);
2029                                 brcmf_sdio_rxfail(bus, false, false);
2030                                 sdio_release_host(bus->sdiodev->func[1]);
2031                         }
2032                         /* prepare the descriptor for the next read */
2033                         rd->len = rd->len_nxtfrm << 4;
2034                         rd->len_nxtfrm = 0;
2035                         /* treat all packet as event if we don't know */
2036                         rd->channel = SDPCM_EVENT_CHANNEL;
2037                         continue;
2038                 }
2039
2040                 /* Fill in packet len and prio, deliver upward */
2041                 __skb_trim(pkt, rd->len);
2042                 skb_pull(pkt, rd->dat_offset);
2043
2044                 /* prepare the descriptor for the next read */
2045                 rd->len = rd->len_nxtfrm << 4;
2046                 rd->len_nxtfrm = 0;
2047                 /* treat all packet as event if we don't know */
2048                 rd->channel = SDPCM_EVENT_CHANNEL;
2049
2050                 if (pkt->len == 0) {
2051                         brcmu_pkt_buf_free_skb(pkt);
2052                         continue;
2053                 }
2054
2055                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
2056         }
2057
2058         rxcount = maxframes - rxleft;
2059         /* Message if we hit the limit */
2060         if (!rxleft)
2061                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2062         else
2063                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2064         /* Back off rxseq if awaiting rtx, update rx_seq */
2065         if (bus->rxskip)
2066                 rd->seq_num--;
2067         bus->rx_seq = rd->seq_num;
2068
2069         return rxcount;
2070 }
2071
2072 static void
2073 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2074 {
2075         if (waitqueue_active(&bus->ctrl_wait))
2076                 wake_up_interruptible(&bus->ctrl_wait);
2077         return;
2078 }
2079
2080 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2081 {
2082         u16 head_pad;
2083         u8 *dat_buf;
2084
2085         dat_buf = (u8 *)(pkt->data);
2086
2087         /* Check head padding */
2088         head_pad = ((unsigned long)dat_buf % bus->head_align);
2089         if (head_pad) {
2090                 if (skb_headroom(pkt) < head_pad) {
2091                         bus->sdiodev->bus_if->tx_realloc++;
2092                         head_pad = 0;
2093                         if (skb_cow(pkt, head_pad))
2094                                 return -ENOMEM;
2095                 }
2096                 skb_push(pkt, head_pad);
2097                 dat_buf = (u8 *)(pkt->data);
2098                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2099         }
2100         return head_pad;
2101 }
2102
2103 /**
2104  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2105  * bus layer usage.
2106  */
2107 /* flag marking a dummy skb added for DMA alignment requirement */
2108 #define ALIGN_SKB_FLAG          0x8000
2109 /* bit mask of data length chopped from the previous packet */
2110 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2111
2112 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2113                                     struct sk_buff_head *pktq,
2114                                     struct sk_buff *pkt, u16 total_len)
2115 {
2116         struct brcmf_sdio_dev *sdiodev;
2117         struct sk_buff *pkt_pad;
2118         u16 tail_pad, tail_chop, chain_pad;
2119         unsigned int blksize;
2120         bool lastfrm;
2121         int ntail, ret;
2122
2123         sdiodev = bus->sdiodev;
2124         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2125         /* sg entry alignment should be a divisor of block size */
2126         WARN_ON(blksize % bus->sgentry_align);
2127
2128         /* Check tail padding */
2129         lastfrm = skb_queue_is_last(pktq, pkt);
2130         tail_pad = 0;
2131         tail_chop = pkt->len % bus->sgentry_align;
2132         if (tail_chop)
2133                 tail_pad = bus->sgentry_align - tail_chop;
2134         chain_pad = (total_len + tail_pad) % blksize;
2135         if (lastfrm && chain_pad)
2136                 tail_pad += blksize - chain_pad;
2137         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2138                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2139                                                 bus->head_align);
2140                 if (pkt_pad == NULL)
2141                         return -ENOMEM;
2142                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2143                 if (unlikely(ret < 0)) {
2144                         kfree_skb(pkt_pad);
2145                         return ret;
2146                 }
2147                 memcpy(pkt_pad->data,
2148                        pkt->data + pkt->len - tail_chop,
2149                        tail_chop);
2150                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2151                 skb_trim(pkt, pkt->len - tail_chop);
2152                 skb_trim(pkt_pad, tail_pad + tail_chop);
2153                 __skb_queue_after(pktq, pkt, pkt_pad);
2154         } else {
2155                 ntail = pkt->data_len + tail_pad -
2156                         (pkt->end - pkt->tail);
2157                 if (skb_cloned(pkt) || ntail > 0)
2158                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2159                                 return -ENOMEM;
2160                 if (skb_linearize(pkt))
2161                         return -ENOMEM;
2162                 __skb_put(pkt, tail_pad);
2163         }
2164
2165         return tail_pad;
2166 }
2167
2168 /**
2169  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2170  * @bus: brcmf_sdio structure pointer
2171  * @pktq: packet list pointer
2172  * @chan: virtual channel to transmit the packet
2173  *
2174  * Processes to be applied to the packet
2175  *      - Align data buffer pointer
2176  *      - Align data buffer length
2177  *      - Prepare header
2178  * Return: negative value if there is error
2179  */
2180 static int
2181 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2182                       uint chan)
2183 {
2184         u16 head_pad, total_len;
2185         struct sk_buff *pkt_next;
2186         u8 txseq;
2187         int ret;
2188         struct brcmf_sdio_hdrinfo hd_info = {0};
2189
2190         txseq = bus->tx_seq;
2191         total_len = 0;
2192         skb_queue_walk(pktq, pkt_next) {
2193                 /* alignment packet inserted in previous
2194                  * loop cycle can be skipped as it is
2195                  * already properly aligned and does not
2196                  * need an sdpcm header.
2197                  */
2198                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2199                         continue;
2200
2201                 /* align packet data pointer */
2202                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2203                 if (ret < 0)
2204                         return ret;
2205                 head_pad = (u16)ret;
2206                 if (head_pad)
2207                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2208
2209                 total_len += pkt_next->len;
2210
2211                 hd_info.len = pkt_next->len;
2212                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2213                 if (bus->txglom && pktq->qlen > 1) {
2214                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2215                                                        pkt_next, total_len);
2216                         if (ret < 0)
2217                                 return ret;
2218                         hd_info.tail_pad = (u16)ret;
2219                         total_len += (u16)ret;
2220                 }
2221
2222                 hd_info.channel = chan;
2223                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2224                 hd_info.seq_num = txseq++;
2225
2226                 /* Now fill the header */
2227                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2228
2229                 if (BRCMF_BYTES_ON() &&
2230                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2231                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2232                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2233                                            "Tx Frame:\n");
2234                 else if (BRCMF_HDRS_ON())
2235                         brcmf_dbg_hex_dump(true, pkt_next->data,
2236                                            head_pad + bus->tx_hdrlen,
2237                                            "Tx Header:\n");
2238         }
2239         /* Hardware length tag of the first packet should be total
2240          * length of the chain (including padding)
2241          */
2242         if (bus->txglom)
2243                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2244         return 0;
2245 }
2246
2247 /**
2248  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2249  * @bus: brcmf_sdio structure pointer
2250  * @pktq: packet list pointer
2251  *
2252  * Processes to be applied to the packet
2253  *      - Remove head padding
2254  *      - Remove tail padding
2255  */
2256 static void
2257 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2258 {
2259         u8 *hdr;
2260         u32 dat_offset;
2261         u16 tail_pad;
2262         u16 dummy_flags, chop_len;
2263         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2264
2265         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2266                 dummy_flags = *(u16 *)(pkt_next->cb);
2267                 if (dummy_flags & ALIGN_SKB_FLAG) {
2268                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2269                         if (chop_len) {
2270                                 pkt_prev = pkt_next->prev;
2271                                 skb_put(pkt_prev, chop_len);
2272                         }
2273                         __skb_unlink(pkt_next, pktq);
2274                         brcmu_pkt_buf_free_skb(pkt_next);
2275                 } else {
2276                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2277                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2278                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2279                                      SDPCM_DOFFSET_SHIFT;
2280                         skb_pull(pkt_next, dat_offset);
2281                         if (bus->txglom) {
2282                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2283                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2284                         }
2285                 }
2286         }
2287 }
2288
2289 /* Writes a HW/SW header into the packet and sends it. */
2290 /* Assumes: (a) header space already there, (b) caller holds lock */
2291 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2292                             uint chan)
2293 {
2294         int ret;
2295         struct sk_buff *pkt_next, *tmp;
2296
2297         brcmf_dbg(TRACE, "Enter\n");
2298
2299         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2300         if (ret)
2301                 goto done;
2302
2303         sdio_claim_host(bus->sdiodev->func[1]);
2304         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2305         bus->sdcnt.f2txdata++;
2306
2307         if (ret < 0)
2308                 brcmf_sdio_txfail(bus);
2309
2310         sdio_release_host(bus->sdiodev->func[1]);
2311
2312 done:
2313         brcmf_sdio_txpkt_postp(bus, pktq);
2314         if (ret == 0)
2315                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2316         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2317                 __skb_unlink(pkt_next, pktq);
2318                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2319         }
2320         return ret;
2321 }
2322
2323 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2324 {
2325         struct sk_buff *pkt;
2326         struct sk_buff_head pktq;
2327         u32 intstatus = 0;
2328         int ret = 0, prec_out, i;
2329         uint cnt = 0;
2330         u8 tx_prec_map, pkt_num;
2331
2332         brcmf_dbg(TRACE, "Enter\n");
2333
2334         tx_prec_map = ~bus->flowcontrol;
2335
2336         /* Send frames until the limit or some other event */
2337         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2338                 pkt_num = 1;
2339                 if (down_interruptible(&bus->tx_seq_lock))
2340                         return cnt;
2341                 if (bus->txglom)
2342                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2343                                         bus->sdiodev->txglomsz);
2344                 pkt_num = min_t(u32, pkt_num,
2345                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2346                 __skb_queue_head_init(&pktq);
2347                 spin_lock_bh(&bus->txq_lock);
2348                 for (i = 0; i < pkt_num; i++) {
2349                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2350                                               &prec_out);
2351                         if (pkt == NULL)
2352                                 break;
2353                         __skb_queue_tail(&pktq, pkt);
2354                 }
2355                 spin_unlock_bh(&bus->txq_lock);
2356                 if (i == 0) {
2357                         up(&bus->tx_seq_lock);
2358                         break;
2359                 }
2360
2361                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2362                 up(&bus->tx_seq_lock);
2363
2364                 cnt += i;
2365
2366                 /* In poll mode, need to check for other events */
2367                 if (!bus->intr) {
2368                         /* Check device status, signal pending interrupt */
2369                         sdio_claim_host(bus->sdiodev->func[1]);
2370                         ret = r_sdreg32(bus, &intstatus,
2371                                         offsetof(struct sdpcmd_regs,
2372                                                  intstatus));
2373                         sdio_release_host(bus->sdiodev->func[1]);
2374                         bus->sdcnt.f2txdata++;
2375                         if (ret != 0)
2376                                 break;
2377                         if (intstatus & bus->hostintmask)
2378                                 atomic_set(&bus->ipend, 1);
2379                 }
2380         }
2381
2382         /* Deflow-control stack if needed */
2383         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2384             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2385                 bus->txoff = false;
2386                 brcmf_txflowblock(bus->sdiodev->dev, false);
2387         }
2388
2389         return cnt;
2390 }
2391
2392 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2393 {
2394         u8 doff;
2395         u16 pad;
2396         uint retries = 0;
2397         struct brcmf_sdio_hdrinfo hd_info = {0};
2398         int ret;
2399
2400         brcmf_dbg(TRACE, "Enter\n");
2401
2402         /* Back the pointer to make room for bus header */
2403         frame -= bus->tx_hdrlen;
2404         len += bus->tx_hdrlen;
2405
2406         /* Add alignment padding (optional for ctl frames) */
2407         doff = ((unsigned long)frame % bus->head_align);
2408         if (doff) {
2409                 frame -= doff;
2410                 len += doff;
2411                 memset(frame + bus->tx_hdrlen, 0, doff);
2412         }
2413
2414         /* Round send length to next SDIO block */
2415         pad = 0;
2416         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2417                 pad = bus->blocksize - (len % bus->blocksize);
2418                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2419                         pad = 0;
2420         } else if (len % bus->head_align) {
2421                 pad = bus->head_align - (len % bus->head_align);
2422         }
2423         len += pad;
2424
2425         hd_info.len = len - pad;
2426         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2427         hd_info.dat_offset = doff + bus->tx_hdrlen;
2428         hd_info.seq_num = bus->tx_seq;
2429         hd_info.lastfrm = true;
2430         hd_info.tail_pad = pad;
2431         brcmf_sdio_hdpack(bus, frame, &hd_info);
2432
2433         if (bus->txglom)
2434                 brcmf_sdio_update_hwhdr(frame, len);
2435
2436         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2437                            frame, len, "Tx Frame:\n");
2438         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2439                            BRCMF_HDRS_ON(),
2440                            frame, min_t(u16, len, 16), "TxHdr:\n");
2441
2442         do {
2443                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2444
2445                 if (ret < 0)
2446                         brcmf_sdio_txfail(bus);
2447                 else
2448                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2449         } while (ret < 0 && retries++ < TXRETRIES);
2450
2451         return ret;
2452 }
2453
2454 static void brcmf_sdio_bus_stop(struct device *dev)
2455 {
2456         u32 local_hostintmask;
2457         u8 saveclk;
2458         int err;
2459         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2460         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2461         struct brcmf_sdio *bus = sdiodev->bus;
2462
2463         brcmf_dbg(TRACE, "Enter\n");
2464
2465         if (bus->watchdog_tsk) {
2466                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2467                 kthread_stop(bus->watchdog_tsk);
2468                 bus->watchdog_tsk = NULL;
2469         }
2470
2471         if (bus_if->state == BRCMF_BUS_DOWN) {
2472                 sdio_claim_host(sdiodev->func[1]);
2473
2474                 /* Enable clock for device interrupts */
2475                 brcmf_sdio_bus_sleep(bus, false, false);
2476
2477                 /* Disable and clear interrupts at the chip level also */
2478                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2479                 local_hostintmask = bus->hostintmask;
2480                 bus->hostintmask = 0;
2481
2482                 /* Force backplane clocks to assure F2 interrupt propagates */
2483                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2484                                             &err);
2485                 if (!err)
2486                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2487                                           (saveclk | SBSDIO_FORCE_HT), &err);
2488                 if (err)
2489                         brcmf_err("Failed to force clock for F2: err %d\n",
2490                                   err);
2491
2492                 /* Turn off the bus (F2), free any pending packets */
2493                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2494                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2495
2496                 /* Clear any pending interrupts now that F2 is disabled */
2497                 w_sdreg32(bus, local_hostintmask,
2498                           offsetof(struct sdpcmd_regs, intstatus));
2499
2500                 sdio_release_host(sdiodev->func[1]);
2501         }
2502         /* Clear the data packet queues */
2503         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2504
2505         /* Clear any held glomming stuff */
2506         if (bus->glomd)
2507                 brcmu_pkt_buf_free_skb(bus->glomd);
2508         brcmf_sdio_free_glom(bus);
2509
2510         /* Clear rx control and wake any waiters */
2511         spin_lock_bh(&bus->rxctl_lock);
2512         bus->rxlen = 0;
2513         spin_unlock_bh(&bus->rxctl_lock);
2514         brcmf_sdio_dcmd_resp_wake(bus);
2515
2516         /* Reset some F2 state stuff */
2517         bus->rxskip = false;
2518         bus->tx_seq = bus->rx_seq = 0;
2519 }
2520
2521 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2522 {
2523         unsigned long flags;
2524
2525         if (bus->sdiodev->oob_irq_requested) {
2526                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2527                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2528                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2529                         bus->sdiodev->irq_en = true;
2530                 }
2531                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2532         }
2533 }
2534
2535 static void atomic_orr(int val, atomic_t *v)
2536 {
2537         int old_val;
2538
2539         old_val = atomic_read(v);
2540         while (atomic_cmpxchg(v, old_val, val | old_val) != old_val)
2541                 old_val = atomic_read(v);
2542 }
2543
2544 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2545 {
2546         struct brcmf_core *buscore;
2547         u32 addr;
2548         unsigned long val;
2549         int ret;
2550
2551         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2552         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2553
2554         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2555         bus->sdcnt.f1regdata++;
2556         if (ret != 0)
2557                 return ret;
2558
2559         val &= bus->hostintmask;
2560         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2561
2562         /* Clear interrupts */
2563         if (val) {
2564                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2565                 bus->sdcnt.f1regdata++;
2566                 atomic_orr(val, &bus->intstatus);
2567         }
2568
2569         return ret;
2570 }
2571
2572 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2573 {
2574         u32 newstatus = 0;
2575         unsigned long intstatus;
2576         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2577         uint framecnt;                  /* Temporary counter of tx/rx frames */
2578         int err = 0;
2579
2580         brcmf_dbg(TRACE, "Enter\n");
2581
2582         sdio_claim_host(bus->sdiodev->func[1]);
2583
2584         /* If waiting for HTAVAIL, check status */
2585         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2586                 u8 clkctl, devctl = 0;
2587
2588 #ifdef DEBUG
2589                 /* Check for inconsistent device control */
2590                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2591                                            SBSDIO_DEVICE_CTL, &err);
2592 #endif                          /* DEBUG */
2593
2594                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2595                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2596                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2597
2598                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2599                           devctl, clkctl);
2600
2601                 if (SBSDIO_HTAV(clkctl)) {
2602                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2603                                                    SBSDIO_DEVICE_CTL, &err);
2604                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2605                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2606                                           devctl, &err);
2607                         bus->clkstate = CLK_AVAIL;
2608                 }
2609         }
2610
2611         /* Make sure backplane clock is on */
2612         brcmf_sdio_bus_sleep(bus, false, true);
2613
2614         /* Pending interrupt indicates new device status */
2615         if (atomic_read(&bus->ipend) > 0) {
2616                 atomic_set(&bus->ipend, 0);
2617                 err = brcmf_sdio_intr_rstatus(bus);
2618         }
2619
2620         /* Start with leftover status bits */
2621         intstatus = atomic_xchg(&bus->intstatus, 0);
2622
2623         /* Handle flow-control change: read new state in case our ack
2624          * crossed another change interrupt.  If change still set, assume
2625          * FC ON for safety, let next loop through do the debounce.
2626          */
2627         if (intstatus & I_HMB_FC_CHANGE) {
2628                 intstatus &= ~I_HMB_FC_CHANGE;
2629                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2630                                 offsetof(struct sdpcmd_regs, intstatus));
2631
2632                 err = r_sdreg32(bus, &newstatus,
2633                                 offsetof(struct sdpcmd_regs, intstatus));
2634                 bus->sdcnt.f1regdata += 2;
2635                 atomic_set(&bus->fcstate,
2636                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2637                 intstatus |= (newstatus & bus->hostintmask);
2638         }
2639
2640         /* Handle host mailbox indication */
2641         if (intstatus & I_HMB_HOST_INT) {
2642                 intstatus &= ~I_HMB_HOST_INT;
2643                 intstatus |= brcmf_sdio_hostmail(bus);
2644         }
2645
2646         sdio_release_host(bus->sdiodev->func[1]);
2647
2648         /* Generally don't ask for these, can get CRC errors... */
2649         if (intstatus & I_WR_OOSYNC) {
2650                 brcmf_err("Dongle reports WR_OOSYNC\n");
2651                 intstatus &= ~I_WR_OOSYNC;
2652         }
2653
2654         if (intstatus & I_RD_OOSYNC) {
2655                 brcmf_err("Dongle reports RD_OOSYNC\n");
2656                 intstatus &= ~I_RD_OOSYNC;
2657         }
2658
2659         if (intstatus & I_SBINT) {
2660                 brcmf_err("Dongle reports SBINT\n");
2661                 intstatus &= ~I_SBINT;
2662         }
2663
2664         /* Would be active due to wake-wlan in gSPI */
2665         if (intstatus & I_CHIPACTIVE) {
2666                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2667                 intstatus &= ~I_CHIPACTIVE;
2668         }
2669
2670         /* Ignore frame indications if rxskip is set */
2671         if (bus->rxskip)
2672                 intstatus &= ~I_HMB_FRAME_IND;
2673
2674         /* On frame indication, read available frames */
2675         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2676                 brcmf_sdio_readframes(bus, bus->rxbound);
2677                 if (!bus->rxpending)
2678                         intstatus &= ~I_HMB_FRAME_IND;
2679         }
2680
2681         /* Keep still-pending events for next scheduling */
2682         if (intstatus)
2683                 atomic_orr(intstatus, &bus->intstatus);
2684
2685         brcmf_sdio_clrintr(bus);
2686
2687         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2688             (down_interruptible(&bus->tx_seq_lock) == 0)) {
2689                 if (data_ok(bus)) {
2690                         sdio_claim_host(bus->sdiodev->func[1]);
2691                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2692                                                       bus->ctrl_frame_len);
2693                         sdio_release_host(bus->sdiodev->func[1]);
2694
2695                         bus->ctrl_frame_stat = false;
2696                         brcmf_sdio_wait_event_wakeup(bus);
2697                 }
2698                 up(&bus->tx_seq_lock);
2699         }
2700         /* Send queued frames (limit 1 if rx may still be pending) */
2701         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2702             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2703             data_ok(bus)) {
2704                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2705                                             txlimit;
2706                 brcmf_sdio_sendfromq(bus, framecnt);
2707         }
2708
2709         if (!brcmf_bus_ready(bus->sdiodev->bus_if) || (err != 0)) {
2710                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2711                 atomic_set(&bus->intstatus, 0);
2712         } else if (atomic_read(&bus->intstatus) ||
2713                    atomic_read(&bus->ipend) > 0 ||
2714                    (!atomic_read(&bus->fcstate) &&
2715                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2716                     data_ok(bus))) {
2717                 atomic_inc(&bus->dpc_tskcnt);
2718         }
2719 }
2720
2721 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2722 {
2723         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2724         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2725         struct brcmf_sdio *bus = sdiodev->bus;
2726
2727         return &bus->txq;
2728 }
2729
2730 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2731 {
2732         int ret = -EBADE;
2733         uint prec;
2734         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2735         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2736         struct brcmf_sdio *bus = sdiodev->bus;
2737
2738         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2739
2740         /* Add space for the header */
2741         skb_push(pkt, bus->tx_hdrlen);
2742         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2743
2744         prec = prio2prec((pkt->priority & PRIOMASK));
2745
2746         /* Check for existing queue, current flow-control,
2747                          pending event, or pending clock */
2748         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2749         bus->sdcnt.fcqueued++;
2750
2751         /* Priority based enq */
2752         spin_lock_bh(&bus->txq_lock);
2753         /* reset bus_flags in packet cb */
2754         *(u16 *)(pkt->cb) = 0;
2755         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2756                 skb_pull(pkt, bus->tx_hdrlen);
2757                 brcmf_err("out of bus->txq !!!\n");
2758                 ret = -ENOSR;
2759         } else {
2760                 ret = 0;
2761         }
2762
2763         if (pktq_len(&bus->txq) >= TXHI) {
2764                 bus->txoff = true;
2765                 brcmf_txflowblock(bus->sdiodev->dev, true);
2766         }
2767         spin_unlock_bh(&bus->txq_lock);
2768
2769 #ifdef DEBUG
2770         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2771                 qcount[prec] = pktq_plen(&bus->txq, prec);
2772 #endif
2773
2774         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2775                 atomic_inc(&bus->dpc_tskcnt);
2776                 queue_work(bus->brcmf_wq, &bus->datawork);
2777         }
2778
2779         return ret;
2780 }
2781
2782 #ifdef DEBUG
2783 #define CONSOLE_LINE_MAX        192
2784
2785 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2786 {
2787         struct brcmf_console *c = &bus->console;
2788         u8 line[CONSOLE_LINE_MAX], ch;
2789         u32 n, idx, addr;
2790         int rv;
2791
2792         /* Don't do anything until FWREADY updates console address */
2793         if (bus->console_addr == 0)
2794                 return 0;
2795
2796         /* Read console log struct */
2797         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2798         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2799                                sizeof(c->log_le));
2800         if (rv < 0)
2801                 return rv;
2802
2803         /* Allocate console buffer (one time only) */
2804         if (c->buf == NULL) {
2805                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2806                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2807                 if (c->buf == NULL)
2808                         return -ENOMEM;
2809         }
2810
2811         idx = le32_to_cpu(c->log_le.idx);
2812
2813         /* Protect against corrupt value */
2814         if (idx > c->bufsize)
2815                 return -EBADE;
2816
2817         /* Skip reading the console buffer if the index pointer
2818          has not moved */
2819         if (idx == c->last)
2820                 return 0;
2821
2822         /* Read the console buffer */
2823         addr = le32_to_cpu(c->log_le.buf);
2824         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2825         if (rv < 0)
2826                 return rv;
2827
2828         while (c->last != idx) {
2829                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2830                         if (c->last == idx) {
2831                                 /* This would output a partial line.
2832                                  * Instead, back up
2833                                  * the buffer pointer and output this
2834                                  * line next time around.
2835                                  */
2836                                 if (c->last >= n)
2837                                         c->last -= n;
2838                                 else
2839                                         c->last = c->bufsize - n;
2840                                 goto break2;
2841                         }
2842                         ch = c->buf[c->last];
2843                         c->last = (c->last + 1) % c->bufsize;
2844                         if (ch == '\n')
2845                                 break;
2846                         line[n] = ch;
2847                 }
2848
2849                 if (n > 0) {
2850                         if (line[n - 1] == '\r')
2851                                 n--;
2852                         line[n] = 0;
2853                         pr_debug("CONSOLE: %s\n", line);
2854                 }
2855         }
2856 break2:
2857
2858         return 0;
2859 }
2860 #endif                          /* DEBUG */
2861
2862 static int
2863 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2864 {
2865         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2866         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2867         struct brcmf_sdio *bus = sdiodev->bus;
2868         int ret = -1;
2869
2870         brcmf_dbg(TRACE, "Enter\n");
2871
2872         if (down_interruptible(&bus->tx_seq_lock))
2873                 return -EINTR;
2874
2875         if (!data_ok(bus)) {
2876                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2877                           bus->tx_max, bus->tx_seq);
2878                 up(&bus->tx_seq_lock);
2879                 /* Send from dpc */
2880                 bus->ctrl_frame_buf = msg;
2881                 bus->ctrl_frame_len = msglen;
2882                 bus->ctrl_frame_stat = true;
2883
2884                 wait_event_interruptible_timeout(bus->ctrl_wait,
2885                                                  !bus->ctrl_frame_stat,
2886                                                  msecs_to_jiffies(2000));
2887
2888                 if (!bus->ctrl_frame_stat) {
2889                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2890                         ret = 0;
2891                 } else {
2892                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2893                         bus->ctrl_frame_stat = false;
2894                         if (down_interruptible(&bus->tx_seq_lock))
2895                                 return -EINTR;
2896                         ret = -1;
2897                 }
2898         }
2899         if (ret == -1) {
2900                 sdio_claim_host(bus->sdiodev->func[1]);
2901                 brcmf_sdio_bus_sleep(bus, false, false);
2902                 ret = brcmf_sdio_tx_ctrlframe(bus, msg, msglen);
2903                 sdio_release_host(bus->sdiodev->func[1]);
2904                 up(&bus->tx_seq_lock);
2905         }
2906
2907         if (ret)
2908                 bus->sdcnt.tx_ctlerrs++;
2909         else
2910                 bus->sdcnt.tx_ctlpkts++;
2911
2912         return ret ? -EIO : 0;
2913 }
2914
2915 #ifdef DEBUG
2916 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2917                                    struct sdpcm_shared *sh, char __user *data,
2918                                    size_t count)
2919 {
2920         u32 addr, console_ptr, console_size, console_index;
2921         char *conbuf = NULL;
2922         __le32 sh_val;
2923         int rv;
2924         loff_t pos = 0;
2925         int nbytes = 0;
2926
2927         /* obtain console information from device memory */
2928         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2929         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2930                                (u8 *)&sh_val, sizeof(u32));
2931         if (rv < 0)
2932                 return rv;
2933         console_ptr = le32_to_cpu(sh_val);
2934
2935         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2936         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2937                                (u8 *)&sh_val, sizeof(u32));
2938         if (rv < 0)
2939                 return rv;
2940         console_size = le32_to_cpu(sh_val);
2941
2942         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2943         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2944                                (u8 *)&sh_val, sizeof(u32));
2945         if (rv < 0)
2946                 return rv;
2947         console_index = le32_to_cpu(sh_val);
2948
2949         /* allocate buffer for console data */
2950         if (console_size <= CONSOLE_BUFFER_MAX)
2951                 conbuf = vzalloc(console_size+1);
2952
2953         if (!conbuf)
2954                 return -ENOMEM;
2955
2956         /* obtain the console data from device */
2957         conbuf[console_size] = '\0';
2958         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2959                                console_size);
2960         if (rv < 0)
2961                 goto done;
2962
2963         rv = simple_read_from_buffer(data, count, &pos,
2964                                      conbuf + console_index,
2965                                      console_size - console_index);
2966         if (rv < 0)
2967                 goto done;
2968
2969         nbytes = rv;
2970         if (console_index > 0) {
2971                 pos = 0;
2972                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2973                                              conbuf, console_index - 1);
2974                 if (rv < 0)
2975                         goto done;
2976                 rv += nbytes;
2977         }
2978 done:
2979         vfree(conbuf);
2980         return rv;
2981 }
2982
2983 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2984                                 char __user *data, size_t count)
2985 {
2986         int error, res;
2987         char buf[350];
2988         struct brcmf_trap_info tr;
2989         loff_t pos = 0;
2990
2991         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2992                 brcmf_dbg(INFO, "no trap in firmware\n");
2993                 return 0;
2994         }
2995
2996         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2997                                   sizeof(struct brcmf_trap_info));
2998         if (error < 0)
2999                 return error;
3000
3001         res = scnprintf(buf, sizeof(buf),
3002                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
3003                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3004                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3005                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3006                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3007                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3008                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3009                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3010                         le32_to_cpu(tr.pc), sh->trap_addr,
3011                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3012                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3013                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3014                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3015
3016         return simple_read_from_buffer(data, count, &pos, buf, res);
3017 }
3018
3019 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3020                                   struct sdpcm_shared *sh, char __user *data,
3021                                   size_t count)
3022 {
3023         int error = 0;
3024         char buf[200];
3025         char file[80] = "?";
3026         char expr[80] = "<???>";
3027         int res;
3028         loff_t pos = 0;
3029
3030         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3031                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3032                 return 0;
3033         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3034                 brcmf_dbg(INFO, "no assert in dongle\n");
3035                 return 0;
3036         }
3037
3038         sdio_claim_host(bus->sdiodev->func[1]);
3039         if (sh->assert_file_addr != 0) {
3040                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3041                                           sh->assert_file_addr, (u8 *)file, 80);
3042                 if (error < 0)
3043                         return error;
3044         }
3045         if (sh->assert_exp_addr != 0) {
3046                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3047                                           sh->assert_exp_addr, (u8 *)expr, 80);
3048                 if (error < 0)
3049                         return error;
3050         }
3051         sdio_release_host(bus->sdiodev->func[1]);
3052
3053         res = scnprintf(buf, sizeof(buf),
3054                         "dongle assert: %s:%d: assert(%s)\n",
3055                         file, sh->assert_line, expr);
3056         return simple_read_from_buffer(data, count, &pos, buf, res);
3057 }
3058
3059 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3060 {
3061         int error;
3062         struct sdpcm_shared sh;
3063
3064         error = brcmf_sdio_readshared(bus, &sh);
3065
3066         if (error < 0)
3067                 return error;
3068
3069         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3070                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3071         else if (sh.flags & SDPCM_SHARED_ASSERT)
3072                 brcmf_err("assertion in dongle\n");
3073
3074         if (sh.flags & SDPCM_SHARED_TRAP)
3075                 brcmf_err("firmware trap in dongle\n");
3076
3077         return 0;
3078 }
3079
3080 static int brcmf_sdio_died_dump(struct brcmf_sdio *bus, char __user *data,
3081                                 size_t count, loff_t *ppos)
3082 {
3083         int error = 0;
3084         struct sdpcm_shared sh;
3085         int nbytes = 0;
3086         loff_t pos = *ppos;
3087
3088         if (pos != 0)
3089                 return 0;
3090
3091         error = brcmf_sdio_readshared(bus, &sh);
3092         if (error < 0)
3093                 goto done;
3094
3095         error = brcmf_sdio_assert_info(bus, &sh, data, count);
3096         if (error < 0)
3097                 goto done;
3098         nbytes = error;
3099
3100         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3101         if (error < 0)
3102                 goto done;
3103         nbytes += error;
3104
3105         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3106         if (error < 0)
3107                 goto done;
3108         nbytes += error;
3109
3110         error = nbytes;
3111         *ppos += nbytes;
3112 done:
3113         return error;
3114 }
3115
3116 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3117                                         size_t count, loff_t *ppos)
3118 {
3119         struct brcmf_sdio *bus = f->private_data;
3120         int res;
3121
3122         res = brcmf_sdio_died_dump(bus, data, count, ppos);
3123         if (res > 0)
3124                 *ppos += res;
3125         return (ssize_t)res;
3126 }
3127
3128 static const struct file_operations brcmf_sdio_forensic_ops = {
3129         .owner = THIS_MODULE,
3130         .open = simple_open,
3131         .read = brcmf_sdio_forensic_read
3132 };
3133
3134 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3135 {
3136         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3137         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3138
3139         if (IS_ERR_OR_NULL(dentry))
3140                 return;
3141
3142         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3143                             &brcmf_sdio_forensic_ops);
3144         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3145         debugfs_create_u32("console_interval", 0644, dentry,
3146                            &bus->console_interval);
3147 }
3148 #else
3149 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3150 {
3151         return 0;
3152 }
3153
3154 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3155 {
3156 }
3157 #endif /* DEBUG */
3158
3159 static int
3160 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3161 {
3162         int timeleft;
3163         uint rxlen = 0;
3164         bool pending;
3165         u8 *buf;
3166         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3167         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3168         struct brcmf_sdio *bus = sdiodev->bus;
3169
3170         brcmf_dbg(TRACE, "Enter\n");
3171
3172         /* Wait until control frame is available */
3173         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3174
3175         spin_lock_bh(&bus->rxctl_lock);
3176         rxlen = bus->rxlen;
3177         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3178         bus->rxctl = NULL;
3179         buf = bus->rxctl_orig;
3180         bus->rxctl_orig = NULL;
3181         bus->rxlen = 0;
3182         spin_unlock_bh(&bus->rxctl_lock);
3183         vfree(buf);
3184
3185         if (rxlen) {
3186                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3187                           rxlen, msglen);
3188         } else if (timeleft == 0) {
3189                 brcmf_err("resumed on timeout\n");
3190                 brcmf_sdio_checkdied(bus);
3191         } else if (pending) {
3192                 brcmf_dbg(CTL, "cancelled\n");
3193                 return -ERESTARTSYS;
3194         } else {
3195                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3196                 brcmf_sdio_checkdied(bus);
3197         }
3198
3199         if (rxlen)
3200                 bus->sdcnt.rx_ctlpkts++;
3201         else
3202                 bus->sdcnt.rx_ctlerrs++;
3203
3204         return rxlen ? (int)rxlen : -ETIMEDOUT;
3205 }
3206
3207 #ifdef DEBUG
3208 static bool
3209 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3210                         u8 *ram_data, uint ram_sz)
3211 {
3212         char *ram_cmp;
3213         int err;
3214         bool ret = true;
3215         int address;
3216         int offset;
3217         int len;
3218
3219         /* read back and verify */
3220         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3221                   ram_sz);
3222         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3223         /* do not proceed while no memory but  */
3224         if (!ram_cmp)
3225                 return true;
3226
3227         address = ram_addr;
3228         offset = 0;
3229         while (offset < ram_sz) {
3230                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3231                       ram_sz - offset;
3232                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3233                 if (err) {
3234                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3235                                   err, len, address);
3236                         ret = false;
3237                         break;
3238                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3239                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3240                                   offset, len);
3241                         ret = false;
3242                         break;
3243                 }
3244                 offset += len;
3245                 address += len;
3246         }
3247
3248         kfree(ram_cmp);
3249
3250         return ret;
3251 }
3252 #else   /* DEBUG */
3253 static bool
3254 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3255                         u8 *ram_data, uint ram_sz)
3256 {
3257         return true;
3258 }
3259 #endif  /* DEBUG */
3260
3261 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3262                                          const struct firmware *fw)
3263 {
3264         int err;
3265
3266         brcmf_dbg(TRACE, "Enter\n");
3267
3268         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3269                                 (u8 *)fw->data, fw->size);
3270         if (err)
3271                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3272                           err, (int)fw->size, bus->ci->rambase);
3273         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3274                                           (u8 *)fw->data, fw->size))
3275                 err = -EIO;
3276
3277         return err;
3278 }
3279
3280 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3281                                      const struct firmware *nv)
3282 {
3283         void *vars;
3284         u32 varsz;
3285         int address;
3286         int err;
3287
3288         brcmf_dbg(TRACE, "Enter\n");
3289
3290         vars = brcmf_fw_nvram_strip(nv, &varsz);
3291
3292         if (vars == NULL)
3293                 return -EINVAL;
3294
3295         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3296         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3297         if (err)
3298                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3299                           err, varsz, address);
3300         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3301                 err = -EIO;
3302
3303         brcmf_fw_nvram_free(vars);
3304
3305         return err;
3306 }
3307
3308 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus)
3309 {
3310         int bcmerror = -EFAULT;
3311         const struct firmware *fw;
3312         u32 rstvec;
3313
3314         sdio_claim_host(bus->sdiodev->func[1]);
3315         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3316
3317         /* Keep arm in reset */
3318         brcmf_chip_enter_download(bus->ci);
3319
3320         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_BIN);
3321         if (fw == NULL) {
3322                 bcmerror = -ENOENT;
3323                 goto err;
3324         }
3325
3326         rstvec = get_unaligned_le32(fw->data);
3327         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3328
3329         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3330         release_firmware(fw);
3331         if (bcmerror) {
3332                 brcmf_err("dongle image file download failed\n");
3333                 goto err;
3334         }
3335
3336         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3337         if (fw == NULL) {
3338                 bcmerror = -ENOENT;
3339                 goto err;
3340         }
3341
3342         bcmerror = brcmf_sdio_download_nvram(bus, fw);
3343         release_firmware(fw);
3344         if (bcmerror) {
3345                 brcmf_err("dongle nvram file download failed\n");
3346                 goto err;
3347         }
3348
3349         /* Take arm out of reset */
3350         if (!brcmf_chip_exit_download(bus->ci, rstvec)) {
3351                 brcmf_err("error getting out of ARM core reset\n");
3352                 goto err;
3353         }
3354
3355         /* Allow HT Clock now that the ARM is running. */
3356         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_LOAD);
3357         bcmerror = 0;
3358
3359 err:
3360         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3361         sdio_release_host(bus->sdiodev->func[1]);
3362         return bcmerror;
3363 }
3364
3365 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3366 {
3367         int err = 0;
3368         u8 val;
3369
3370         brcmf_dbg(TRACE, "Enter\n");
3371
3372         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3373         if (err) {
3374                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3375                 return;
3376         }
3377
3378         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3379         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3380         if (err) {
3381                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3382                 return;
3383         }
3384
3385         /* Add CMD14 Support */
3386         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3387                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3388                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3389                           &err);
3390         if (err) {
3391                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3392                 return;
3393         }
3394
3395         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3396                           SBSDIO_FORCE_HT, &err);
3397         if (err) {
3398                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3399                 return;
3400         }
3401
3402         /* set flag */
3403         bus->sr_enabled = true;
3404         brcmf_dbg(INFO, "SR enabled\n");
3405 }
3406
3407 /* enable KSO bit */
3408 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3409 {
3410         u8 val;
3411         int err = 0;
3412
3413         brcmf_dbg(TRACE, "Enter\n");
3414
3415         /* KSO bit added in SDIO core rev 12 */
3416         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3417                 return 0;
3418
3419         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3420         if (err) {
3421                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3422                 return err;
3423         }
3424
3425         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3426                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3427                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3428                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3429                                   val, &err);
3430                 if (err) {
3431                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3432                         return err;
3433                 }
3434         }
3435
3436         return 0;
3437 }
3438
3439
3440 static int brcmf_sdio_bus_preinit(struct device *dev)
3441 {
3442         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3443         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3444         struct brcmf_sdio *bus = sdiodev->bus;
3445         uint pad_size;
3446         u32 value;
3447         int err;
3448
3449         /* the commands below use the terms tx and rx from
3450          * a device perspective, ie. bus:txglom affects the
3451          * bus transfers from device to host.
3452          */
3453         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3454                 /* for sdio core rev < 12, disable txgloming */
3455                 value = 0;
3456                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3457                                            sizeof(u32));
3458         } else {
3459                 /* otherwise, set txglomalign */
3460                 value = 4;
3461                 if (sdiodev->pdata)
3462                         value = sdiodev->pdata->sd_sgentry_align;
3463                 /* SDIO ADMA requires at least 32 bit alignment */
3464                 value = max_t(u32, value, 4);
3465                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3466                                            sizeof(u32));
3467         }
3468
3469         if (err < 0)
3470                 goto done;
3471
3472         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3473         if (sdiodev->sg_support) {
3474                 bus->txglom = false;
3475                 value = 1;
3476                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3477                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3478                                            &value, sizeof(u32));
3479                 if (err < 0) {
3480                         /* bus:rxglom is allowed to fail */
3481                         err = 0;
3482                 } else {
3483                         bus->txglom = true;
3484                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3485                 }
3486         }
3487         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3488
3489 done:
3490         return err;
3491 }
3492
3493 static int brcmf_sdio_bus_init(struct device *dev)
3494 {
3495         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3496         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3497         struct brcmf_sdio *bus = sdiodev->bus;
3498         int err, ret = 0;
3499         u8 saveclk;
3500
3501         brcmf_dbg(TRACE, "Enter\n");
3502
3503         /* try to download image and nvram to the dongle */
3504         if (bus_if->state == BRCMF_BUS_DOWN) {
3505                 bus->alp_only = true;
3506                 err = brcmf_sdio_download_firmware(bus);
3507                 if (err)
3508                         return err;
3509                 bus->alp_only = false;
3510         }
3511
3512         if (!bus->sdiodev->bus_if->drvr)
3513                 return 0;
3514
3515         /* Start the watchdog timer */
3516         bus->sdcnt.tickcnt = 0;
3517         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3518
3519         sdio_claim_host(bus->sdiodev->func[1]);
3520
3521         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3522         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3523         if (bus->clkstate != CLK_AVAIL)
3524                 goto exit;
3525
3526         /* Force clocks on backplane to be sure F2 interrupt propagates */
3527         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3528                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
3529         if (!err) {
3530                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3531                                   (saveclk | SBSDIO_FORCE_HT), &err);
3532         }
3533         if (err) {
3534                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3535                 goto exit;
3536         }
3537
3538         /* Enable function 2 (frame transfers) */
3539         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3540                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3541         err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3542
3543
3544         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3545
3546         /* If F2 successfully enabled, set core and enable interrupts */
3547         if (!err) {
3548                 /* Set up the interrupt mask and enable interrupts */
3549                 bus->hostintmask = HOSTINTMASK;
3550                 w_sdreg32(bus, bus->hostintmask,
3551                           offsetof(struct sdpcmd_regs, hostintmask));
3552
3553                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3554         } else {
3555                 /* Disable F2 again */
3556                 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3557                 ret = -ENODEV;
3558         }
3559
3560         if (brcmf_chip_sr_capable(bus->ci)) {
3561                 brcmf_sdio_sr_init(bus);
3562         } else {
3563                 /* Restore previous clock setting */
3564                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3565                                   saveclk, &err);
3566         }
3567
3568         if (ret == 0) {
3569                 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3570                 if (ret != 0)
3571                         brcmf_err("intr register failed:%d\n", ret);
3572         }
3573
3574         /* If we didn't come up, turn off backplane clock */
3575         if (ret != 0)
3576                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3577
3578 exit:
3579         sdio_release_host(bus->sdiodev->func[1]);
3580
3581         return ret;
3582 }
3583
3584 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3585 {
3586         brcmf_dbg(TRACE, "Enter\n");
3587
3588         if (!bus) {
3589                 brcmf_err("bus is null pointer, exiting\n");
3590                 return;
3591         }
3592
3593         if (!brcmf_bus_ready(bus->sdiodev->bus_if)) {
3594                 brcmf_err("bus is down. we have nothing to do\n");
3595                 return;
3596         }
3597         /* Count the interrupt call */
3598         bus->sdcnt.intrcount++;
3599         if (in_interrupt())
3600                 atomic_set(&bus->ipend, 1);
3601         else
3602                 if (brcmf_sdio_intr_rstatus(bus)) {
3603                         brcmf_err("failed backplane access\n");
3604                 }
3605
3606         /* Disable additional interrupts (is this needed now)? */
3607         if (!bus->intr)
3608                 brcmf_err("isr w/o interrupt configured!\n");
3609
3610         atomic_inc(&bus->dpc_tskcnt);
3611         queue_work(bus->brcmf_wq, &bus->datawork);
3612 }
3613
3614 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3615 {
3616 #ifdef DEBUG
3617         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3618 #endif  /* DEBUG */
3619
3620         brcmf_dbg(TIMER, "Enter\n");
3621
3622         /* Poll period: check device if appropriate. */
3623         if (!bus->sr_enabled &&
3624             bus->poll && (++bus->polltick >= bus->pollrate)) {
3625                 u32 intstatus = 0;
3626
3627                 /* Reset poll tick */
3628                 bus->polltick = 0;
3629
3630                 /* Check device if no interrupts */
3631                 if (!bus->intr ||
3632                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3633
3634                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3635                                 u8 devpend;
3636
3637                                 sdio_claim_host(bus->sdiodev->func[1]);
3638                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3639                                                             SDIO_CCCR_INTx,
3640                                                             NULL);
3641                                 sdio_release_host(bus->sdiodev->func[1]);
3642                                 intstatus =
3643                                     devpend & (INTR_STATUS_FUNC1 |
3644                                                INTR_STATUS_FUNC2);
3645                         }
3646
3647                         /* If there is something, make like the ISR and
3648                                  schedule the DPC */
3649                         if (intstatus) {
3650                                 bus->sdcnt.pollcnt++;
3651                                 atomic_set(&bus->ipend, 1);
3652
3653                                 atomic_inc(&bus->dpc_tskcnt);
3654                                 queue_work(bus->brcmf_wq, &bus->datawork);
3655                         }
3656                 }
3657
3658                 /* Update interrupt tracking */
3659                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3660         }
3661 #ifdef DEBUG
3662         /* Poll for console output periodically */
3663         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3664             bus->console_interval != 0) {
3665                 bus->console.count += BRCMF_WD_POLL_MS;
3666                 if (bus->console.count >= bus->console_interval) {
3667                         bus->console.count -= bus->console_interval;
3668                         sdio_claim_host(bus->sdiodev->func[1]);
3669                         /* Make sure backplane clock is on */
3670                         brcmf_sdio_bus_sleep(bus, false, false);
3671                         if (brcmf_sdio_readconsole(bus) < 0)
3672                                 /* stop on error */
3673                                 bus->console_interval = 0;
3674                         sdio_release_host(bus->sdiodev->func[1]);
3675                 }
3676         }
3677 #endif                          /* DEBUG */
3678
3679         /* On idle timeout clear activity flag and/or turn off clock */
3680         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3681                 if (++bus->idlecount >= bus->idletime) {
3682                         bus->idlecount = 0;
3683                         if (bus->activity) {
3684                                 bus->activity = false;
3685                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3686                         } else {
3687                                 brcmf_dbg(SDIO, "idle\n");
3688                                 sdio_claim_host(bus->sdiodev->func[1]);
3689                                 brcmf_sdio_bus_sleep(bus, true, false);
3690                                 sdio_release_host(bus->sdiodev->func[1]);
3691                         }
3692                 }
3693         }
3694
3695         return (atomic_read(&bus->ipend) > 0);
3696 }
3697
3698 static void brcmf_sdio_dataworker(struct work_struct *work)
3699 {
3700         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3701                                               datawork);
3702
3703         while (atomic_read(&bus->dpc_tskcnt)) {
3704                 atomic_set(&bus->dpc_tskcnt, 0);
3705                 brcmf_sdio_dpc(bus);
3706         }
3707 }
3708
3709 static void
3710 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3711                              struct brcmf_chip *ci, u32 drivestrength)
3712 {
3713         const struct sdiod_drive_str *str_tab = NULL;
3714         u32 str_mask;
3715         u32 str_shift;
3716         u32 base;
3717         u32 i;
3718         u32 drivestrength_sel = 0;
3719         u32 cc_data_temp;
3720         u32 addr;
3721
3722         if (!(ci->cc_caps & CC_CAP_PMU))
3723                 return;
3724
3725         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3726         case SDIOD_DRVSTR_KEY(BCM4330_CHIP_ID, 12):
3727                 str_tab = sdiod_drvstr_tab1_1v8;
3728                 str_mask = 0x00003800;
3729                 str_shift = 11;
3730                 break;
3731         case SDIOD_DRVSTR_KEY(BCM4334_CHIP_ID, 17):
3732                 str_tab = sdiod_drvstr_tab6_1v8;
3733                 str_mask = 0x00001800;
3734                 str_shift = 11;
3735                 break;
3736         case SDIOD_DRVSTR_KEY(BCM43143_CHIP_ID, 17):
3737                 /* note: 43143 does not support tristate */
3738                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3739                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3740                         str_tab = sdiod_drvstr_tab2_3v3;
3741                         str_mask = 0x00000007;
3742                         str_shift = 0;
3743                 } else
3744                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3745                                   ci->name, drivestrength);
3746                 break;
3747         case SDIOD_DRVSTR_KEY(BCM43362_CHIP_ID, 13):
3748                 str_tab = sdiod_drive_strength_tab5_1v8;
3749                 str_mask = 0x00003800;
3750                 str_shift = 11;
3751                 break;
3752         default:
3753                 brcmf_err("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
3754                           ci->name, ci->chiprev, ci->pmurev);
3755                 break;
3756         }
3757
3758         if (str_tab != NULL) {
3759                 for (i = 0; str_tab[i].strength != 0; i++) {
3760                         if (drivestrength >= str_tab[i].strength) {
3761                                 drivestrength_sel = str_tab[i].sel;
3762                                 break;
3763                         }
3764                 }
3765                 base = brcmf_chip_get_chipcommon(ci)->base;
3766                 addr = CORE_CC_REG(base, chipcontrol_addr);
3767                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3768                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3769                 cc_data_temp &= ~str_mask;
3770                 drivestrength_sel <<= str_shift;
3771                 cc_data_temp |= drivestrength_sel;
3772                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3773
3774                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3775                           str_tab[i].strength, drivestrength, cc_data_temp);
3776         }
3777 }
3778
3779 static int brcmf_sdio_buscoreprep(void *ctx)
3780 {
3781         struct brcmf_sdio_dev *sdiodev = ctx;
3782         int err = 0;
3783         u8 clkval, clkset;
3784
3785         /* Try forcing SDIO core to do ALPAvail request only */
3786         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3787         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3788         if (err) {
3789                 brcmf_err("error writing for HT off\n");
3790                 return err;
3791         }
3792
3793         /* If register supported, wait for ALPAvail and then force ALP */
3794         /* This may take up to 15 milliseconds */
3795         clkval = brcmf_sdiod_regrb(sdiodev,
3796                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3797
3798         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3799                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3800                           clkset, clkval);
3801                 return -EACCES;
3802         }
3803
3804         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3805                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3806                         !SBSDIO_ALPAV(clkval)),
3807                         PMU_MAX_TRANSITION_DLY);
3808         if (!SBSDIO_ALPAV(clkval)) {
3809                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3810                           clkval);
3811                 return -EBUSY;
3812         }
3813
3814         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3815         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3816         udelay(65);
3817
3818         /* Also, disable the extra SDIO pull-ups */
3819         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3820
3821         return 0;
3822 }
3823
3824 static void brcmf_sdio_buscore_exitdl(void *ctx, struct brcmf_chip *chip,
3825                                       u32 rstvec)
3826 {
3827         struct brcmf_sdio_dev *sdiodev = ctx;
3828         struct brcmf_core *core;
3829         u32 reg_addr;
3830
3831         /* clear all interrupts */
3832         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3833         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3834         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3835
3836         if (rstvec)
3837                 /* Write reset vector to address 0 */
3838                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3839                                   sizeof(rstvec));
3840 }
3841
3842 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3843 {
3844         struct brcmf_sdio_dev *sdiodev = ctx;
3845         u32 val, rev;
3846
3847         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3848         if (sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 &&
3849             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3850                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3851                 if (rev >= 2) {
3852                         val &= ~CID_ID_MASK;
3853                         val |= BCM4339_CHIP_ID;
3854                 }
3855         }
3856         return val;
3857 }
3858
3859 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3860 {
3861         struct brcmf_sdio_dev *sdiodev = ctx;
3862
3863         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3864 }
3865
3866 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3867         .prepare = brcmf_sdio_buscoreprep,
3868         .exit_dl = brcmf_sdio_buscore_exitdl,
3869         .read32 = brcmf_sdio_buscore_read32,
3870         .write32 = brcmf_sdio_buscore_write32,
3871 };
3872
3873 static bool
3874 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3875 {
3876         u8 clkctl = 0;
3877         int err = 0;
3878         int reg_addr;
3879         u32 reg_val;
3880         u32 drivestrength;
3881
3882         sdio_claim_host(bus->sdiodev->func[1]);
3883
3884         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3885                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3886
3887         /*
3888          * Force PLL off until brcmf_chip_attach()
3889          * programs PLL control regs
3890          */
3891
3892         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3893                           BRCMF_INIT_CLKCTL1, &err);
3894         if (!err)
3895                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3896                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3897
3898         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3899                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3900                           err, BRCMF_INIT_CLKCTL1, clkctl);
3901                 goto fail;
3902         }
3903
3904         /* SDIO register access works so moving
3905          * state from UNKNOWN to DOWN.
3906          */
3907         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_DOWN);
3908
3909         bus->ci = brcmf_chip_attach(bus->sdiodev, &brcmf_sdio_buscore_ops);
3910         if (IS_ERR(bus->ci)) {
3911                 brcmf_err("brcmf_chip_attach failed!\n");
3912                 bus->ci = NULL;
3913                 goto fail;
3914         }
3915
3916         if (brcmf_sdio_kso_init(bus)) {
3917                 brcmf_err("error enabling KSO\n");
3918                 goto fail;
3919         }
3920
3921         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3922                 drivestrength = bus->sdiodev->pdata->drive_strength;
3923         else
3924                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3925         brcmf_sdio_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3926
3927         /* Get info on the SOCRAM cores... */
3928         bus->ramsize = bus->ci->ramsize;
3929         if (!(bus->ramsize)) {
3930                 brcmf_err("failed to find SOCRAM memory!\n");
3931                 goto fail;
3932         }
3933
3934         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3935         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3936                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3937         if (err)
3938                 goto fail;
3939
3940         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3941
3942         brcmf_sdiod_regwb(bus->sdiodev,
3943                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3944         if (err)
3945                 goto fail;
3946
3947         /* set PMUControl so a backplane reset does PMU state reload */
3948         reg_addr = CORE_CC_REG(brcmf_chip_get_chipcommon(bus->ci)->base,
3949                                pmucontrol);
3950         reg_val = brcmf_sdiod_regrl(bus->sdiodev, reg_addr, &err);
3951         if (err)
3952                 goto fail;
3953
3954         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3955
3956         brcmf_sdiod_regwl(bus->sdiodev, reg_addr, reg_val, &err);
3957         if (err)
3958                 goto fail;
3959
3960         sdio_release_host(bus->sdiodev->func[1]);
3961
3962         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3963
3964         /* allocate header buffer */
3965         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3966         if (!bus->hdrbuf)
3967                 return false;
3968         /* Locate an appropriately-aligned portion of hdrbuf */
3969         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3970                                     bus->head_align);
3971
3972         /* Set the poll and/or interrupt flags */
3973         bus->intr = true;
3974         bus->poll = false;
3975         if (bus->poll)
3976                 bus->pollrate = 1;
3977
3978         return true;
3979
3980 fail:
3981         sdio_release_host(bus->sdiodev->func[1]);
3982         return false;
3983 }
3984
3985 static int
3986 brcmf_sdio_watchdog_thread(void *data)
3987 {
3988         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3989
3990         allow_signal(SIGTERM);
3991         /* Run until signal received */
3992         while (1) {
3993                 if (kthread_should_stop())
3994                         break;
3995                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3996                         brcmf_sdio_bus_watchdog(bus);
3997                         /* Count the tick for reference */
3998                         bus->sdcnt.tickcnt++;
3999                         reinit_completion(&bus->watchdog_wait);
4000                 } else
4001                         break;
4002         }
4003         return 0;
4004 }
4005
4006 static void
4007 brcmf_sdio_watchdog(unsigned long data)
4008 {
4009         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
4010
4011         if (bus->watchdog_tsk) {
4012                 complete(&bus->watchdog_wait);
4013                 /* Reschedule the watchdog */
4014                 if (bus->wd_timer_valid)
4015                         mod_timer(&bus->timer,
4016                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4017         }
4018 }
4019
4020 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4021         .stop = brcmf_sdio_bus_stop,
4022         .preinit = brcmf_sdio_bus_preinit,
4023         .txdata = brcmf_sdio_bus_txdata,
4024         .txctl = brcmf_sdio_bus_txctl,
4025         .rxctl = brcmf_sdio_bus_rxctl,
4026         .gettxq = brcmf_sdio_bus_gettxq,
4027 };
4028
4029 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4030 {
4031         int ret;
4032         struct brcmf_sdio *bus;
4033
4034         brcmf_dbg(TRACE, "Enter\n");
4035
4036         /* Allocate private bus interface state */
4037         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4038         if (!bus)
4039                 goto fail;
4040
4041         bus->sdiodev = sdiodev;
4042         sdiodev->bus = bus;
4043         skb_queue_head_init(&bus->glom);
4044         bus->txbound = BRCMF_TXBOUND;
4045         bus->rxbound = BRCMF_RXBOUND;
4046         bus->txminmax = BRCMF_TXMINMAX;
4047         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4048
4049         /* platform specific configuration:
4050          *   alignments must be at least 4 bytes for ADMA
4051          */
4052         bus->head_align = ALIGNMENT;
4053         bus->sgentry_align = ALIGNMENT;
4054         if (sdiodev->pdata) {
4055                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4056                         bus->head_align = sdiodev->pdata->sd_head_align;
4057                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4058                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4059         }
4060
4061         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4062         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4063         if (bus->brcmf_wq == NULL) {
4064                 brcmf_err("insufficient memory to create txworkqueue\n");
4065                 goto fail;
4066         }
4067
4068         /* attempt to attach to the dongle */
4069         if (!(brcmf_sdio_probe_attach(bus))) {
4070                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4071                 goto fail;
4072         }
4073
4074         spin_lock_init(&bus->rxctl_lock);
4075         spin_lock_init(&bus->txq_lock);
4076         sema_init(&bus->tx_seq_lock, 1);
4077         init_waitqueue_head(&bus->ctrl_wait);
4078         init_waitqueue_head(&bus->dcmd_resp_wait);
4079
4080         /* Set up the watchdog timer */
4081         init_timer(&bus->timer);
4082         bus->timer.data = (unsigned long)bus;
4083         bus->timer.function = brcmf_sdio_watchdog;
4084
4085         /* Initialize watchdog thread */
4086         init_completion(&bus->watchdog_wait);
4087         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4088                                         bus, "brcmf_watchdog");
4089         if (IS_ERR(bus->watchdog_tsk)) {
4090                 pr_warn("brcmf_watchdog thread failed to start\n");
4091                 bus->watchdog_tsk = NULL;
4092         }
4093         /* Initialize DPC thread */
4094         atomic_set(&bus->dpc_tskcnt, 0);
4095
4096         /* Assign bus interface call back */
4097         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4098         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4099         bus->sdiodev->bus_if->chip = bus->ci->chip;
4100         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4101
4102         /* default sdio bus header length for tx packet */
4103         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4104
4105         /* Attach to the common layer, reserve hdr space */
4106         ret = brcmf_attach(bus->sdiodev->dev);
4107         if (ret != 0) {
4108                 brcmf_err("brcmf_attach failed\n");
4109                 goto fail;
4110         }
4111
4112         /* Allocate buffers */
4113         if (bus->sdiodev->bus_if->maxctl) {
4114                 bus->rxblen =
4115                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4116                             ALIGNMENT) + bus->head_align;
4117                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4118                 if (!(bus->rxbuf)) {
4119                         brcmf_err("rxbuf allocation failed\n");
4120                         goto fail;
4121                 }
4122         }
4123
4124         sdio_claim_host(bus->sdiodev->func[1]);
4125
4126         /* Disable F2 to clear any intermediate frame state on the dongle */
4127         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4128
4129         bus->rxflow = false;
4130
4131         /* Done with backplane-dependent accesses, can drop clock... */
4132         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4133
4134         sdio_release_host(bus->sdiodev->func[1]);
4135
4136         /* ...and initialize clock/power states */
4137         bus->clkstate = CLK_SDONLY;
4138         bus->idletime = BRCMF_IDLE_INTERVAL;
4139         bus->idleclock = BRCMF_IDLE_ACTIVE;
4140
4141         /* Query the F2 block size, set roundup accordingly */
4142         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4143         bus->roundup = min(max_roundup, bus->blocksize);
4144
4145         /* SR state */
4146         bus->sleeping = false;
4147         bus->sr_enabled = false;
4148
4149         brcmf_sdio_debugfs_create(bus);
4150         brcmf_dbg(INFO, "completed!!\n");
4151
4152         ret = brcmf_sdio_bus_init(sdiodev->dev);
4153         if (ret)
4154                 goto fail;
4155
4156         /* if firmware path present try to download and bring up bus */
4157         ret = brcmf_bus_start(bus->sdiodev->dev);
4158         if (ret != 0) {
4159                 brcmf_err("dongle is not responding\n");
4160                 goto fail;
4161         }
4162
4163         return bus;
4164
4165 fail:
4166         brcmf_sdio_remove(bus);
4167         return NULL;
4168 }
4169
4170 /* Detach and free everything */
4171 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4172 {
4173         brcmf_dbg(TRACE, "Enter\n");
4174
4175         if (bus) {
4176                 /* De-register interrupt handler */
4177                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4178
4179                 brcmf_detach(bus->sdiodev->dev);
4180
4181                 cancel_work_sync(&bus->datawork);
4182                 if (bus->brcmf_wq)
4183                         destroy_workqueue(bus->brcmf_wq);
4184
4185                 if (bus->ci) {
4186                         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
4187                                 sdio_claim_host(bus->sdiodev->func[1]);
4188                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4189                                 /* Leave the device in state where it is
4190                                  * 'quiet'. This is done by putting it in
4191                                  * download_state which essentially resets
4192                                  * all necessary cores.
4193                                  */
4194                                 msleep(20);
4195                                 brcmf_chip_enter_download(bus->ci);
4196                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4197                                 sdio_release_host(bus->sdiodev->func[1]);
4198                         }
4199                         brcmf_chip_detach(bus->ci);
4200                 }
4201
4202                 kfree(bus->rxbuf);
4203                 kfree(bus->hdrbuf);
4204                 kfree(bus);
4205         }
4206
4207         brcmf_dbg(TRACE, "Disconnected\n");
4208 }
4209
4210 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4211 {
4212         /* Totally stop the timer */
4213         if (!wdtick && bus->wd_timer_valid) {
4214                 del_timer_sync(&bus->timer);
4215                 bus->wd_timer_valid = false;
4216                 bus->save_ms = wdtick;
4217                 return;
4218         }
4219
4220         /* don't start the wd until fw is loaded */
4221         if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4222                 return;
4223
4224         if (wdtick) {
4225                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4226                         if (bus->wd_timer_valid)
4227                                 /* Stop timer and restart at new value */
4228                                 del_timer_sync(&bus->timer);
4229
4230                         /* Create timer again when watchdog period is
4231                            dynamically changed or in the first instance
4232                          */
4233                         bus->timer.expires =
4234                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4235                         add_timer(&bus->timer);
4236
4237                 } else {
4238                         /* Re arm the timer, at last watchdog period */
4239                         mod_timer(&bus->timer,
4240                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4241                 }
4242
4243                 bus->wd_timer_valid = true;
4244                 bus->save_ms = wdtick;
4245         }
4246 }