drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_ids.h>
  27 #include <linux/mmc/sdio_func.h>
  28 #include <linux/mmc/card.h>
  29 #include <linux/semaphore.h>
  30 #include <linux/firmware.h>
  31 #include <linux/module.h>
  32 #include <linux/bcma/bcma.h>
  33 #include <linux/debugfs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/platform_data/brcmfmac-sdio.h>
  36 #include <linux/moduleparam.h>
  37 #include <asm/unaligned.h>
  38 #include <defs.h>
  39 #include <brcmu_wifi.h>
  40 #include <brcmu_utils.h>
  41 #include <brcm_hw_ids.h>
  42 #include <soc.h>
  43 #include "sdio_host.h"
  44 #include "chip.h"
  45 #include "firmware.h"
  46
  47 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  48
  49 #ifdef DEBUG
  50
  51 #define BRCMF_TRAP_INFO_SIZE    80
  52
  53 #define CBUF_LEN        (128)
  54
  55 /* Device console log buffer state */
  56 #define CONSOLE_BUFFER_MAX      2024
  57
  58 struct rte_log_le {
  59         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  60         __le32 buf_size;
  61         __le32 idx;
  62         char *_buf_compat;      /* Redundant pointer for backward compat. */
  63 };
  64
  65 struct rte_console {
  66         /* Virtual UART
  67          * When there is no UART (e.g. Quickturn),
  68          * the host should write a complete
  69          * input line directly into cbuf and then write
  70          * the length into vcons_in.
  71          * This may also be used when there is a real UART
  72          * (at risk of conflicting with
  73          * the real UART).  vcons_out is currently unused.
  74          */
  75         uint vcons_in;
  76         uint vcons_out;
  77
  78         /* Output (logging) buffer
  79          * Console output is written to a ring buffer log_buf at index log_idx.
  80          * The host may read the output when it sees log_idx advance.
  81          * Output will be lost if the output wraps around faster than the host
  82          * polls.
  83          */
  84         struct rte_log_le log_le;
  85
  86         /* Console input line buffer
  87          * Characters are read one at a time into cbuf
  88          * until <CR> is received, then
  89          * the buffer is processed as a command line.
  90          * Also used for virtual UART.
  91          */
  92         uint cbuf_idx;
  93         char cbuf[CBUF_LEN];
  94 };
  95
  96 #endif                          /* DEBUG */
  97 #include <chipcommon.h>
  98
  99 #include "dhd_bus.h"
 100 #include "dhd_dbg.h"
 101 #include "tracepoint.h"
 102
 103 #define TXQLEN          2048    /* bulk tx queue length */
 104 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 105 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 106 #define PRIOMASK        7
 107
 108 #define TXRETRIES       2       /* # of retries for tx frames */
 109
 110 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 111                                  one scheduling */
 112
 113 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 114                                  one scheduling */
 115
 116 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 117
 118 #define MEMBLOCK        2048    /* Block size used for downloading
 119                                  of dongle image */
 120 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 121                                  biggest possible glom */
 122
 123 #define BRCMF_FIRSTREAD (1 << 6)
 124
 125
 126 /* SBSDIO_DEVICE_CTL */
 127
 128 /* 1: device will assert busy signal when receiving CMD53 */
 129 #define SBSDIO_DEVCTL_SETBUSY           0x01
 130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 133 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 135  * sdio bus power cycle to clear (rev 9) */
 136 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 137 /* Force SD->SB reset mapping (rev 11) */
 138 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 139 /*   Determined by CoreControl bit */
 140 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 141 /*   Force backplane reset */
 142 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 143 /*   Force no backplane reset */
 144 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 145
 146 /* direct(mapped) cis space */
 147
 148 /* MAPPED common CIS address */
 149 #define SBSDIO_CIS_BASE_COMMON          0x1000
 150 /* maximum bytes in one CIS */
 151 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 152 /* cis offset addr is < 17 bits */
 153 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 154
 155 /* manfid tuple length, include tuple, link bytes */
 156 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 157
 158 #define CORE_BUS_REG(base, field) \
 159                 (base + offsetof(struct sdpcmd_regs, field))
 160
 161 /* SDIO function 1 register CHIPCLKCSR */
 162 /* Force ALP request to backplane */
 163 #define SBSDIO_FORCE_ALP                0x01
 164 /* Force HT request to backplane */
 165 #define SBSDIO_FORCE_HT                 0x02
 166 /* Force ILP request to backplane */
 167 #define SBSDIO_FORCE_ILP                0x04
 168 /* Make ALP ready (power up xtal) */
 169 #define SBSDIO_ALP_AVAIL_REQ            0x08
 170 /* Make HT ready (power up PLL) */
 171 #define SBSDIO_HT_AVAIL_REQ             0x10
 172 /* Squelch clock requests from HW */
 173 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 174 /* Status: ALP is ready */
 175 #define SBSDIO_ALP_AVAIL                0x40
 176 /* Status: HT is ready */
 177 #define SBSDIO_HT_AVAIL                 0x80
 178 #define SBSDIO_CSR_MASK                 0x1F
 179 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 180 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 181 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 182 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 183 #define SBSDIO_CLKAV(regval, alponly) \
 184         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 185
 186 /* intstatus */
 187 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 188 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 189 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 190 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 191 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 192 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 193 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 194 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 195 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 196 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 197 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 198 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 199 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 200 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 201 #define I_PC            (1 << 10)       /* descriptor error */
 202 #define I_PD            (1 << 11)       /* data error */
 203 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 204 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 205 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 206 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 207 #define I_RI            (1 << 16)       /* Receive Interrupt */
 208 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 209 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 210 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 211 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 212 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 213 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 214 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 215 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 216 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 217 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 218 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 219 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 220
 221 /* corecontrol */
 222 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 223 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 224 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 225 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 226 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 227 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 228
 229 /* SDA_FRAMECTRL */
 230 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 231 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 232 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 233 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 234
 235 /*
 236  * Software allocation of To SB Mailbox resources
 237  */
 238
 239 /* tosbmailbox bits corresponding to intstatus bits */
 240 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 241 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 242 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 243 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 244
 245 /* tosbmailboxdata */
 246 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 247
 248 /*
 249  * Software allocation of To Host Mailbox resources
 250  */
 251
 252 /* intstatus bits */
 253 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 254 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 255 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 256 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 257
 258 /* tohostmailboxdata */
 259 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 260 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 261 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 262 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 263
 264 #define HMB_DATA_FCDATA_MASK    0xff000000
 265 #define HMB_DATA_FCDATA_SHIFT   24
 266
 267 #define HMB_DATA_VERSION_MASK   0x00ff0000
 268 #define HMB_DATA_VERSION_SHIFT  16
 269
 270 /*
 271  * Software-defined protocol header
 272  */
 273
 274 /* Current protocol version */
 275 #define SDPCM_PROT_VERSION      4
 276
 277 /*
 278  * Shared structure between dongle and the host.
 279  * The structure contains pointers to trap or assert information.
 280  */
 281 #define SDPCM_SHARED_VERSION       0x0003
 282 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 283 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 284 #define SDPCM_SHARED_ASSERT        0x0200
 285 #define SDPCM_SHARED_TRAP          0x0400
 286
 287 /* Space for header read, limit for data packets */
 288 #define MAX_HDR_READ    (1 << 6)
 289 #define MAX_RX_DATASZ   2048
 290
 291 /* Bump up limit on waiting for HT to account for first startup;
 292  * if the image is doing a CRC calculation before programming the PMU
 293  * for HT availability, it could take a couple hundred ms more, so
 294  * max out at a 1 second (1000000us).
 295  */
 296 #undef PMU_MAX_TRANSITION_DLY
 297 #define PMU_MAX_TRANSITION_DLY 1000000
 298
 299 /* Value for ChipClockCSR during initial setup */
 300 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 301                                         SBSDIO_ALP_AVAIL_REQ)
 302
 303 /* Flags for SDH calls */
 304 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 305
 306 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 307                                          * when idle
 308                                          */
 309 #define BRCMF_IDLE_INTERVAL     1
 310
 311 #define KSO_WAIT_US 50
 312 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 313
 314 /*
 315  * Conversion of 802.1D priority to precedence level
 316  */
 317 static uint prio2prec(u32 prio)
 318 {
 319         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 320                (prio^2) : prio;
 321 }
 322
 323 #ifdef DEBUG
 324 /* Device console log buffer state */
 325 struct brcmf_console {
 326         uint count;             /* Poll interval msec counter */
 327         uint log_addr;          /* Log struct address (fixed) */
 328         struct rte_log_le log_le;       /* Log struct (host copy) */
 329         uint bufsize;           /* Size of log buffer */
 330         u8 *buf;                /* Log buffer (host copy) */
 331         uint last;              /* Last buffer read index */
 332 };
 333
 334 struct brcmf_trap_info {
 335         __le32          type;
 336         __le32          epc;
 337         __le32          cpsr;
 338         __le32          spsr;
 339         __le32          r0;     /* a1 */
 340         __le32          r1;     /* a2 */
 341         __le32          r2;     /* a3 */
 342         __le32          r3;     /* a4 */
 343         __le32          r4;     /* v1 */
 344         __le32          r5;     /* v2 */
 345         __le32          r6;     /* v3 */
 346         __le32          r7;     /* v4 */
 347         __le32          r8;     /* v5 */
 348         __le32          r9;     /* sb/v6 */
 349         __le32          r10;    /* sl/v7 */
 350         __le32          r11;    /* fp/v8 */
 351         __le32          r12;    /* ip */
 352         __le32          r13;    /* sp */
 353         __le32          r14;    /* lr */
 354         __le32          pc;     /* r15 */
 355 };
 356 #endif                          /* DEBUG */
 357
 358 struct sdpcm_shared {
 359         u32 flags;
 360         u32 trap_addr;
 361         u32 assert_exp_addr;
 362         u32 assert_file_addr;
 363         u32 assert_line;
 364         u32 console_addr;       /* Address of struct rte_console */
 365         u32 msgtrace_addr;
 366         u8 tag[32];
 367         u32 brpt_addr;
 368 };
 369
 370 struct sdpcm_shared_le {
 371         __le32 flags;
 372         __le32 trap_addr;
 373         __le32 assert_exp_addr;
 374         __le32 assert_file_addr;
 375         __le32 assert_line;
 376         __le32 console_addr;    /* Address of struct rte_console */
 377         __le32 msgtrace_addr;
 378         u8 tag[32];
 379         __le32 brpt_addr;
 380 };
 381
 382 /* dongle SDIO bus specific header info */
 383 struct brcmf_sdio_hdrinfo {
 384         u8 seq_num;
 385         u8 channel;
 386         u16 len;
 387         u16 len_left;
 388         u16 len_nxtfrm;
 389         u8 dat_offset;
 390         bool lastfrm;
 391         u16 tail_pad;
 392 };
 393
 394 /*
 395  * hold counter variables
 396  */
 397 struct brcmf_sdio_count {
 398         uint intrcount;         /* Count of device interrupt callbacks */
 399         uint lastintrs;         /* Count as of last watchdog timer */
 400         uint pollcnt;           /* Count of active polls */
 401         uint regfails;          /* Count of R_REG failures */
 402         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 403         uint fcqueued;          /* Tx packets that got queued */
 404         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 405         uint rx_toolong;        /* Receive frames too long to receive */
 406         uint rxc_errors;        /* SDIO errors when reading control frames */
 407         uint rx_hdrfail;        /* SDIO errors on header reads */
 408         uint rx_badhdr;         /* Bad received headers (roosync?) */
 409         uint rx_badseq;         /* Mismatched rx sequence number */
 410         uint fc_rcvd;           /* Number of flow-control events received */
 411         uint fc_xoff;           /* Number which turned on flow-control */
 412         uint fc_xon;            /* Number which turned off flow-control */
 413         uint rxglomfail;        /* Failed deglom attempts */
 414         uint rxglomframes;      /* Number of glom frames (superframes) */
 415         uint rxglompkts;        /* Number of packets from glom frames */
 416         uint f2rxhdrs;          /* Number of header reads */
 417         uint f2rxdata;          /* Number of frame data reads */
 418         uint f2txdata;          /* Number of f2 frame writes */
 419         uint f1regdata;         /* Number of f1 register accesses */
 420         uint tickcnt;           /* Number of watchdog been schedule */
 421         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 422         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 423         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 424         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 425         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 426 };
 427
 428 /* misc chip info needed by some of the routines */
 429 /* Private data for SDIO bus interaction */
 430 struct brcmf_sdio {
 431         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 432         struct brcmf_chip *ci;  /* Chip info struct */
 433
 434         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 435
 436         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 437         atomic_t intstatus;     /* Intstatus bits (events) pending */
 438         atomic_t fcstate;       /* State of dongle flow-control */
 439
 440         uint blocksize;         /* Block size of SDIO transfers */
 441         uint roundup;           /* Max roundup limit */
 442
 443         struct pktq txq;        /* Queue length used for flow-control */
 444         u8 flowcontrol; /* per prio flow control bitmask */
 445         u8 tx_seq;              /* Transmit sequence number (next) */
 446         u8 tx_max;              /* Maximum transmit sequence allowed */
 447
 448         u8 *hdrbuf;             /* buffer for handling rx frame */
 449         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 450         u8 rx_seq;              /* Receive sequence number (expected) */
 451         struct brcmf_sdio_hdrinfo cur_read;
 452                                 /* info of current read frame */
 453         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 454         bool rxpending;         /* Data frame pending in dongle */
 455
 456         uint rxbound;           /* Rx frames to read before resched */
 457         uint txbound;           /* Tx frames to send before resched */
 458         uint txminmax;
 459
 460         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 461         struct sk_buff_head glom; /* Packet list for glommed superframe */
 462         uint glomerr;           /* Glom packet read errors */
 463
 464         u8 *rxbuf;              /* Buffer for receiving control packets */
 465         uint rxblen;            /* Allocated length of rxbuf */
 466         u8 *rxctl;              /* Aligned pointer into rxbuf */
 467         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 468         uint rxlen;             /* Length of valid data in buffer */
 469         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 470
 471         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 472
 473         bool intr;              /* Use interrupts */
 474         bool poll;              /* Use polling */
 475         atomic_t ipend;         /* Device interrupt is pending */
 476         uint spurious;          /* Count of spurious interrupts */
 477         uint pollrate;          /* Ticks between device polls */
 478         uint polltick;          /* Tick counter */
 479
 480 #ifdef DEBUG
 481         uint console_interval;
 482         struct brcmf_console console;   /* Console output polling support */
 483         uint console_addr;      /* Console address from shared struct */
 484 #endif                          /* DEBUG */
 485
 486         uint clkstate;          /* State of sd and backplane clock(s) */
 487         bool activity;          /* Activity flag for clock down */
 488         s32 idletime;           /* Control for activity timeout */
 489         s32 idlecount;  /* Activity timeout counter */
 490         s32 idleclock;  /* How to set bus driver when idle */
 491         bool rxflow_mode;       /* Rx flow control mode */
 492         bool rxflow;            /* Is rx flow control on */
 493         bool alp_only;          /* Don't use HT clock (ALP only) */
 494
 495         u8 *ctrl_frame_buf;
 496         u16 ctrl_frame_len;
 497         bool ctrl_frame_stat;
 498
 499         spinlock_t txq_lock;            /* protect bus->txq */
 500         struct semaphore tx_seq_lock;   /* protect bus->tx_seq */
 501         wait_queue_head_t ctrl_wait;
 502         wait_queue_head_t dcmd_resp_wait;
 503
 504         struct timer_list timer;
 505         struct completion watchdog_wait;
 506         struct task_struct *watchdog_tsk;
 507         bool wd_timer_valid;
 508         uint save_ms;
 509
 510         struct workqueue_struct *brcmf_wq;
 511         struct work_struct datawork;
 512         atomic_t dpc_tskcnt;
 513
 514         bool txoff;             /* Transmit flow-controlled */
 515         struct brcmf_sdio_count sdcnt;
 516         bool sr_enabled; /* SaveRestore enabled */
 517         bool sleeping; /* SDIO bus sleeping */
 518
 519         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 520         bool txglom;            /* host tx glomming enable flag */
 521         u16 head_align;         /* buffer pointer alignment */
 522         u16 sgentry_align;      /* scatter-gather buffer alignment */
 523 };
 524
 525 /* clkstate */
 526 #define CLK_NONE        0
 527 #define CLK_SDONLY      1
 528 #define CLK_PENDING     2
 529 #define CLK_AVAIL       3
 530
 531 #ifdef DEBUG
 532 static int qcount[NUMPRIO];
 533 #endif                          /* DEBUG */
 534
 535 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 536
 537 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 538
 539 /* Retry count for register access failures */
 540 static const uint retry_limit = 2;
 541
 542 /* Limit on rounding up frames */
 543 static const uint max_roundup = 512;
 544
 545 #define ALIGNMENT  4
 546
 547 enum brcmf_sdio_frmtype {
 548         BRCMF_SDIO_FT_NORMAL,
 549         BRCMF_SDIO_FT_SUPER,
 550         BRCMF_SDIO_FT_SUB,
 551 };
 552
 553 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 554
 555 /* SDIO Pad drive strength to select value mappings */
 556 struct sdiod_drive_str {
 557         u8 strength;    /* Pad Drive Strength in mA */
 558         u8 sel;         /* Chip-specific select value */
 559 };
 560
 561 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 562 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 563         {32, 0x6},
 564         {26, 0x7},
 565         {22, 0x4},
 566         {16, 0x5},
 567         {12, 0x2},
 568         {8, 0x3},
 569         {4, 0x0},
 570         {0, 0x1}
 571 };
 572
 573 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 574 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 575         {6, 0x7},
 576         {5, 0x6},
 577         {4, 0x5},
 578         {3, 0x4},
 579         {2, 0x2},
 580         {1, 0x1},
 581         {0, 0x0}
 582 };
 583
 584 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 585 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 586         {3, 0x3},
 587         {2, 0x2},
 588         {1, 0x1},
 589         {0, 0x0} };
 590
 591 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 592 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 593         {16, 0x7},
 594         {12, 0x5},
 595         {8,  0x3},
 596         {4,  0x1}
 597 };
 598
 599 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 600 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 601 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 602 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 603 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 604 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 605 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 606 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 607 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 608 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 609 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 610 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 611 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 612 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 613 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 614 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 615 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 616 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 617 #define BCM4354_FIRMWARE_NAME           "brcm/brcmfmac4354-sdio.bin"
 618 #define BCM4354_NVRAM_NAME              "brcm/brcmfmac4354-sdio.txt"
 619
 620 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 621 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 622 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 623 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 624 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 625 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 626 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 627 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 628 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 629 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 630 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 631 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 632 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 633 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 634 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 635 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 636 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 637 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 638 MODULE_FIRMWARE(BCM4354_FIRMWARE_NAME);
 639 MODULE_FIRMWARE(BCM4354_NVRAM_NAME);
 640
 641 struct brcmf_firmware_names {
 642         u32 chipid;
 643         u32 revmsk;
 644         const char *bin;
 645         const char *nv;
 646 };
 647
 648 enum brcmf_firmware_type {
 649         BRCMF_FIRMWARE_BIN,
 650         BRCMF_FIRMWARE_NVRAM
 651 };
 652
 653 #define BRCMF_FIRMWARE_NVRAM(name) \
 654         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 655
 656 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 657         { BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 658         { BRCM_CC_43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 659         { BRCM_CC_43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 660         { BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 661         { BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 662         { BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 663         { BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 664         { BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 665         { BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) },
 666         { BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4354) }
 667 };
 668
 669 static int brcmf_sdio_get_fwnames(struct brcmf_chip *ci,
 670                                   struct brcmf_sdio_dev *sdiodev)
 671 {
 672         int i;
 673         uint fw_len, nv_len;
 674         char end;
 675
 676         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 677                 if (brcmf_fwname_data[i].chipid == ci->chip &&
 678                     brcmf_fwname_data[i].revmsk & BIT(ci->chiprev))
 679                         break;
 680         }
 681
 682         if (i == ARRAY_SIZE(brcmf_fwname_data)) {
 683                 brcmf_err("Unknown chipid %d [%d]\n", ci->chip, ci->chiprev);
 684                 return -ENODEV;
 685         }
 686
 687         fw_len = sizeof(sdiodev->fw_name) - 1;
 688         nv_len = sizeof(sdiodev->nvram_name) - 1;
 689         /* check if firmware path is provided by module parameter */
 690         if (brcmf_firmware_path[0] != '\0') {
 691                 strncpy(sdiodev->fw_name, brcmf_firmware_path, fw_len);
 692                 strncpy(sdiodev->nvram_name, brcmf_firmware_path, nv_len);
 693                 fw_len -= strlen(sdiodev->fw_name);
 694                 nv_len -= strlen(sdiodev->nvram_name);
 695
 696                 end = brcmf_firmware_path[strlen(brcmf_firmware_path) - 1];
 697                 if (end != '/') {
 698                         strncat(sdiodev->fw_name, "/", fw_len);
 699                         strncat(sdiodev->nvram_name, "/", nv_len);
 700                         fw_len--;
 701                         nv_len--;
 702                 }
 703         }
 704         strncat(sdiodev->fw_name, brcmf_fwname_data[i].bin, fw_len);
 705         strncat(sdiodev->nvram_name, brcmf_fwname_data[i].nv, nv_len);
 706
 707         return 0;
 708 }
 709
 710 static void pkt_align(struct sk_buff *p, int len, int align)
 711 {
 712         uint datalign;
 713         datalign = (unsigned long)(p->data);
 714         datalign = roundup(datalign, (align)) - datalign;
 715         if (datalign)
 716                 skb_pull(p, datalign);
 717         __skb_trim(p, len);
 718 }
 719
 720 /* To check if there's window offered */
 721 static bool data_ok(struct brcmf_sdio *bus)
 722 {
 723         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 724                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 725 }
 726
 727 /*
 728  * Reads a register in the SDIO hardware block. This block occupies a series of
 729  * adresses on the 32 bit backplane bus.
 730  */
 731 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 732 {
 733         struct brcmf_core *core;
 734         int ret;
 735
 736         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 737         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 738
 739         return ret;
 740 }
 741
 742 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 743 {
 744         struct brcmf_core *core;
 745         int ret;
 746
 747         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 748         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 749
 750         return ret;
 751 }
 752
 753 static int
 754 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 755 {
 756         u8 wr_val = 0, rd_val, cmp_val, bmask;
 757         int err = 0;
 758         int try_cnt = 0;
 759
 760         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 761
 762         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 763         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 764         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 765                           wr_val, &err);
 766
 767         if (on) {
 768                 /* device WAKEUP through KSO:
 769                  * write bit 0 & read back until
 770                  * both bits 0 (kso bit) & 1 (dev on status) are set
 771                  */
 772                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 773                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 774                 bmask = cmp_val;
 775                 usleep_range(2000, 3000);
 776         } else {
 777                 /* Put device to sleep, turn off KSO */
 778                 cmp_val = 0;
 779                 /* only check for bit0, bit1(dev on status) may not
 780                  * get cleared right away
 781                  */
 782                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 783         }
 784
 785         do {
 786                 /* reliable KSO bit set/clr:
 787                  * the sdiod sleep write access is synced to PMU 32khz clk
 788                  * just one write attempt may fail,
 789                  * read it back until it matches written value
 790                  */
 791                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 792                                            &err);
 793                 if (((rd_val & bmask) == cmp_val) && !err)
 794                         break;
 795
 796                 udelay(KSO_WAIT_US);
 797                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 798                                   wr_val, &err);
 799         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 800
 801         if (try_cnt > 2)
 802                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 803                           rd_val, err);
 804
 805         if (try_cnt > MAX_KSO_ATTEMPTS)
 806                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 807
 808         return err;
 809 }
 810
 811 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 812
 813 /* Turn backplane clock on or off */
 814 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 815 {
 816         int err;
 817         u8 clkctl, clkreq, devctl;
 818         unsigned long timeout;
 819
 820         brcmf_dbg(SDIO, "Enter\n");
 821
 822         clkctl = 0;
 823
 824         if (bus->sr_enabled) {
 825                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 826                 return 0;
 827         }
 828
 829         if (on) {
 830                 /* Request HT Avail */
 831                 clkreq =
 832                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 833
 834                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 835                                   clkreq, &err);
 836                 if (err) {
 837                         brcmf_err("HT Avail request error: %d\n", err);
 838                         return -EBADE;
 839                 }
 840
 841                 /* Check current status */
 842                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 843                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 844                 if (err) {
 845                         brcmf_err("HT Avail read error: %d\n", err);
 846                         return -EBADE;
 847                 }
 848
 849                 /* Go to pending and await interrupt if appropriate */
 850                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 851                         /* Allow only clock-available interrupt */
 852                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 853                                                    SBSDIO_DEVICE_CTL, &err);
 854                         if (err) {
 855                                 brcmf_err("Devctl error setting CA: %d\n",
 856                                           err);
 857                                 return -EBADE;
 858                         }
 859
 860                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 861                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 862                                           devctl, &err);
 863                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 864                         bus->clkstate = CLK_PENDING;
 865
 866                         return 0;
 867                 } else if (bus->clkstate == CLK_PENDING) {
 868                         /* Cancel CA-only interrupt filter */
 869                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 870                                                    SBSDIO_DEVICE_CTL, &err);
 871                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 872                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 873                                           devctl, &err);
 874                 }
 875
 876                 /* Otherwise, wait here (polling) for HT Avail */
 877                 timeout = jiffies +
 878                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 879                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 880                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 881                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 882                                                    &err);
 883                         if (time_after(jiffies, timeout))
 884                                 break;
 885                         else
 886                                 usleep_range(5000, 10000);
 887                 }
 888                 if (err) {
 889                         brcmf_err("HT Avail request error: %d\n", err);
 890                         return -EBADE;
 891                 }
 892                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 893                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 894                                   PMU_MAX_TRANSITION_DLY, clkctl);
 895                         return -EBADE;
 896                 }
 897
 898                 /* Mark clock available */
 899                 bus->clkstate = CLK_AVAIL;
 900                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 901
 902 #if defined(DEBUG)
 903                 if (!bus->alp_only) {
 904                         if (SBSDIO_ALPONLY(clkctl))
 905                                 brcmf_err("HT Clock should be on\n");
 906                 }
 907 #endif                          /* defined (DEBUG) */
 908
 909         } else {
 910                 clkreq = 0;
 911
 912                 if (bus->clkstate == CLK_PENDING) {
 913                         /* Cancel CA-only interrupt filter */
 914                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 915                                                    SBSDIO_DEVICE_CTL, &err);
 916                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 917                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 918                                           devctl, &err);
 919                 }
 920
 921                 bus->clkstate = CLK_SDONLY;
 922                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 923                                   clkreq, &err);
 924                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 925                 if (err) {
 926                         brcmf_err("Failed access turning clock off: %d\n",
 927                                   err);
 928                         return -EBADE;
 929                 }
 930         }
 931         return 0;
 932 }
 933
 934 /* Change idle/active SD state */
 935 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 936 {
 937         brcmf_dbg(SDIO, "Enter\n");
 938
 939         if (on)
 940                 bus->clkstate = CLK_SDONLY;
 941         else
 942                 bus->clkstate = CLK_NONE;
 943
 944         return 0;
 945 }
 946
 947 /* Transition SD and backplane clock readiness */
 948 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 949 {
 950 #ifdef DEBUG
 951         uint oldstate = bus->clkstate;
 952 #endif                          /* DEBUG */
 953
 954         brcmf_dbg(SDIO, "Enter\n");
 955
 956         /* Early exit if we're already there */
 957         if (bus->clkstate == target) {
 958                 if (target == CLK_AVAIL) {
 959                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 960                         bus->activity = true;
 961                 }
 962                 return 0;
 963         }
 964
 965         switch (target) {
 966         case CLK_AVAIL:
 967                 /* Make sure SD clock is available */
 968                 if (bus->clkstate == CLK_NONE)
 969                         brcmf_sdio_sdclk(bus, true);
 970                 /* Now request HT Avail on the backplane */
 971                 brcmf_sdio_htclk(bus, true, pendok);
 972                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 973                 bus->activity = true;
 974                 break;
 975
 976         case CLK_SDONLY:
 977                 /* Remove HT request, or bring up SD clock */
 978                 if (bus->clkstate == CLK_NONE)
 979                         brcmf_sdio_sdclk(bus, true);
 980                 else if (bus->clkstate == CLK_AVAIL)
 981                         brcmf_sdio_htclk(bus, false, false);
 982                 else
 983                         brcmf_err("request for %d -> %d\n",
 984                                   bus->clkstate, target);
 985                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 986                 break;
 987
 988         case CLK_NONE:
 989                 /* Make sure to remove HT request */
 990                 if (bus->clkstate == CLK_AVAIL)
 991                         brcmf_sdio_htclk(bus, false, false);
 992                 /* Now remove the SD clock */
 993                 brcmf_sdio_sdclk(bus, false);
 994                 brcmf_sdio_wd_timer(bus, 0);
 995                 break;
 996         }
 997 #ifdef DEBUG
 998         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 999 #endif                          /* DEBUG */
1000
1001         return 0;
1002 }
1003
1004 static int
1005 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
1006 {
1007         int err = 0;
1008         u8 clkcsr;
1009
1010         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
1011                   (sleep ? "SLEEP" : "WAKE"),
1012                   (bus->sleeping ? "SLEEP" : "WAKE"));
1013
1014         /* If SR is enabled control bus state with KSO */
1015         if (bus->sr_enabled) {
1016                 /* Done if we're already in the requested state */
1017                 if (sleep == bus->sleeping)
1018                         goto end;
1019
1020                 /* Going to sleep */
1021                 if (sleep) {
1022                         /* Don't sleep if something is pending */
1023                         if (atomic_read(&bus->intstatus) ||
1024                             atomic_read(&bus->ipend) > 0 ||
1025                             (!atomic_read(&bus->fcstate) &&
1026                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
1027                             data_ok(bus))) {
1028                                  err = -EBUSY;
1029                                  goto done;
1030                         }
1031
1032                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
1033                                                    SBSDIO_FUNC1_CHIPCLKCSR,
1034                                                    &err);
1035                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
1036                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
1037                                 brcmf_sdiod_regwb(bus->sdiodev,
1038                                                   SBSDIO_FUNC1_CHIPCLKCSR,
1039                                                   SBSDIO_ALP_AVAIL_REQ, &err);
1040                         }
1041                         err = brcmf_sdio_kso_control(bus, false);
1042                         /* disable watchdog */
1043                         if (!err)
1044                                 brcmf_sdio_wd_timer(bus, 0);
1045                 } else {
1046                         bus->idlecount = 0;
1047                         err = brcmf_sdio_kso_control(bus, true);
1048                 }
1049                 if (!err) {
1050                         /* Change state */
1051                         bus->sleeping = sleep;
1052                         brcmf_dbg(SDIO, "new state %s\n",
1053                                   (sleep ? "SLEEP" : "WAKE"));
1054                 } else {
1055                         brcmf_err("error while changing bus sleep state %d\n",
1056                                   err);
1057                         goto done;
1058                 }
1059         }
1060
1061 end:
1062         /* control clocks */
1063         if (sleep) {
1064                 if (!bus->sr_enabled)
1065                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
1066         } else {
1067                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
1068         }
1069 done:
1070         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
1071         return err;
1072
1073 }
1074
1075 #ifdef DEBUG
1076 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
1077 {
1078         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
1079 }
1080
1081 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
1082                                  struct sdpcm_shared *sh)
1083 {
1084         u32 addr;
1085         int rv;
1086         u32 shaddr = 0;
1087         struct sdpcm_shared_le sh_le;
1088         __le32 addr_le;
1089
1090         shaddr = bus->ci->rambase + bus->ramsize - 4;
1091
1092         /*
1093          * Read last word in socram to determine
1094          * address of sdpcm_shared structure
1095          */
1096         sdio_claim_host(bus->sdiodev->func[1]);
1097         brcmf_sdio_bus_sleep(bus, false, false);
1098         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
1099         sdio_release_host(bus->sdiodev->func[1]);
1100         if (rv < 0)
1101                 return rv;
1102
1103         addr = le32_to_cpu(addr_le);
1104
1105         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
1106
1107         /*
1108          * Check if addr is valid.
1109          * NVRAM length at the end of memory should have been overwritten.
1110          */
1111         if (!brcmf_sdio_valid_shared_address(addr)) {
1112                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
1113                                   addr);
1114                         return -EINVAL;
1115         }
1116
1117         /* Read hndrte_shared structure */
1118         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1119                                sizeof(struct sdpcm_shared_le));
1120         if (rv < 0)
1121                 return rv;
1122
1123         /* Endianness */
1124         sh->flags = le32_to_cpu(sh_le.flags);
1125         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1126         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1127         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1128         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1129         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1130         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1131
1132         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1133                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1134                           SDPCM_SHARED_VERSION,
1135                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1136                 return -EPROTO;
1137         }
1138
1139         return 0;
1140 }
1141
1142 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1143 {
1144         struct sdpcm_shared sh;
1145
1146         if (brcmf_sdio_readshared(bus, &sh) == 0)
1147                 bus->console_addr = sh.console_addr;
1148 }
1149 #else
1150 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1151 {
1152 }
1153 #endif /* DEBUG */
1154
1155 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1156 {
1157         u32 intstatus = 0;
1158         u32 hmb_data;
1159         u8 fcbits;
1160         int ret;
1161
1162         brcmf_dbg(SDIO, "Enter\n");
1163
1164         /* Read mailbox data and ack that we did so */
1165         ret = r_sdreg32(bus, &hmb_data,
1166                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1167
1168         if (ret == 0)
1169                 w_sdreg32(bus, SMB_INT_ACK,
1170                           offsetof(struct sdpcmd_regs, tosbmailbox));
1171         bus->sdcnt.f1regdata += 2;
1172
1173         /* Dongle recomposed rx frames, accept them again */
1174         if (hmb_data & HMB_DATA_NAKHANDLED) {
1175                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1176                           bus->rx_seq);
1177                 if (!bus->rxskip)
1178                         brcmf_err("unexpected NAKHANDLED!\n");
1179
1180                 bus->rxskip = false;
1181                 intstatus |= I_HMB_FRAME_IND;
1182         }
1183
1184         /*
1185          * DEVREADY does not occur with gSPI.
1186          */
1187         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1188                 bus->sdpcm_ver =
1189                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1190                     HMB_DATA_VERSION_SHIFT;
1191                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1192                         brcmf_err("Version mismatch, dongle reports %d, "
1193                                   "expecting %d\n",
1194                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1195                 else
1196                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1197                                   bus->sdpcm_ver);
1198
1199                 /*
1200                  * Retrieve console state address now that firmware should have
1201                  * updated it.
1202                  */
1203                 brcmf_sdio_get_console_addr(bus);
1204         }
1205
1206         /*
1207          * Flow Control has been moved into the RX headers and this out of band
1208          * method isn't used any more.
1209          * remaining backward compatible with older dongles.
1210          */
1211         if (hmb_data & HMB_DATA_FC) {
1212                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1213                                                         HMB_DATA_FCDATA_SHIFT;
1214
1215                 if (fcbits & ~bus->flowcontrol)
1216                         bus->sdcnt.fc_xoff++;
1217
1218                 if (bus->flowcontrol & ~fcbits)
1219                         bus->sdcnt.fc_xon++;
1220
1221                 bus->sdcnt.fc_rcvd++;
1222                 bus->flowcontrol = fcbits;
1223         }
1224
1225         /* Shouldn't be any others */
1226         if (hmb_data & ~(HMB_DATA_DEVREADY |
1227                          HMB_DATA_NAKHANDLED |
1228                          HMB_DATA_FC |
1229                          HMB_DATA_FWREADY |
1230                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1231                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1232                           hmb_data);
1233
1234         return intstatus;
1235 }
1236
1237 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1238 {
1239         uint retries = 0;
1240         u16 lastrbc;
1241         u8 hi, lo;
1242         int err;
1243
1244         brcmf_err("%sterminate frame%s\n",
1245                   abort ? "abort command, " : "",
1246                   rtx ? ", send NAK" : "");
1247
1248         if (abort)
1249                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1250
1251         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1252                           SFC_RF_TERM, &err);
1253         bus->sdcnt.f1regdata++;
1254
1255         /* Wait until the packet has been flushed (device/FIFO stable) */
1256         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1257                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1258                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1259                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1260                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1261                 bus->sdcnt.f1regdata += 2;
1262
1263                 if ((hi == 0) && (lo == 0))
1264                         break;
1265
1266                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1267                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1268                                   lastrbc, (hi << 8) + lo);
1269                 }
1270                 lastrbc = (hi << 8) + lo;
1271         }
1272
1273         if (!retries)
1274                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1275         else
1276                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1277
1278         if (rtx) {
1279                 bus->sdcnt.rxrtx++;
1280                 err = w_sdreg32(bus, SMB_NAK,
1281                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1282
1283                 bus->sdcnt.f1regdata++;
1284                 if (err == 0)
1285                         bus->rxskip = true;
1286         }
1287
1288         /* Clear partial in any case */
1289         bus->cur_read.len = 0;
1290 }
1291
1292 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1293 {
1294         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1295         u8 i, hi, lo;
1296
1297         /* On failure, abort the command and terminate the frame */
1298         brcmf_err("sdio error, abort command and terminate frame\n");
1299         bus->sdcnt.tx_sderrs++;
1300
1301         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1302         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1303         bus->sdcnt.f1regdata++;
1304
1305         for (i = 0; i < 3; i++) {
1306                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1307                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1308                 bus->sdcnt.f1regdata += 2;
1309                 if ((hi == 0) && (lo == 0))
1310                         break;
1311         }
1312 }
1313
1314 /* return total length of buffer chain */
1315 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1316 {
1317         struct sk_buff *p;
1318         uint total;
1319
1320         total = 0;
1321         skb_queue_walk(&bus->glom, p)
1322                 total += p->len;
1323         return total;
1324 }
1325
1326 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1327 {
1328         struct sk_buff *cur, *next;
1329
1330         skb_queue_walk_safe(&bus->glom, cur, next) {
1331                 skb_unlink(cur, &bus->glom);
1332                 brcmu_pkt_buf_free_skb(cur);
1333         }
1334 }
1335
1336 /**
1337  * brcmfmac sdio bus specific header
1338  * This is the lowest layer header wrapped on the packets transmitted between
1339  * host and WiFi dongle which contains information needed for SDIO core and
1340  * firmware
1341  *
1342  * It consists of 3 parts: hardware header, hardware extension header and
1343  * software header
1344  * hardware header (frame tag) - 4 bytes
1345  * Byte 0~1: Frame length
1346  * Byte 2~3: Checksum, bit-wise inverse of frame length
1347  * hardware extension header - 8 bytes
1348  * Tx glom mode only, N/A for Rx or normal Tx
1349  * Byte 0~1: Packet length excluding hw frame tag
1350  * Byte 2: Reserved
1351  * Byte 3: Frame flags, bit 0: last frame indication
1352  * Byte 4~5: Reserved
1353  * Byte 6~7: Tail padding length
1354  * software header - 8 bytes
1355  * Byte 0: Rx/Tx sequence number
1356  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1357  * Byte 2: Length of next data frame, reserved for Tx
1358  * Byte 3: Data offset
1359  * Byte 4: Flow control bits, reserved for Tx
1360  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1361  * Byte 6~7: Reserved
1362  */
1363 #define SDPCM_HWHDR_LEN                 4
1364 #define SDPCM_HWEXT_LEN                 8
1365 #define SDPCM_SWHDR_LEN                 8
1366 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1367 /* software header */
1368 #define SDPCM_SEQ_MASK                  0x000000ff
1369 #define SDPCM_SEQ_WRAP                  256
1370 #define SDPCM_CHANNEL_MASK              0x00000f00
1371 #define SDPCM_CHANNEL_SHIFT             8
1372 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1373 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1374 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1375 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1376 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1377 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1378 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1379 #define SDPCM_NEXTLEN_SHIFT             16
1380 #define SDPCM_DOFFSET_MASK              0xff000000
1381 #define SDPCM_DOFFSET_SHIFT             24
1382 #define SDPCM_FCMASK_MASK               0x000000ff
1383 #define SDPCM_WINDOW_MASK               0x0000ff00
1384 #define SDPCM_WINDOW_SHIFT              8
1385
1386 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1387 {
1388         u32 hdrvalue;
1389         hdrvalue = *(u32 *)swheader;
1390         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1391 }
1392
1393 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1394                               struct brcmf_sdio_hdrinfo *rd,
1395                               enum brcmf_sdio_frmtype type)
1396 {
1397         u16 len, checksum;
1398         u8 rx_seq, fc, tx_seq_max;
1399         u32 swheader;
1400
1401         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1402
1403         /* hw header */
1404         len = get_unaligned_le16(header);
1405         checksum = get_unaligned_le16(header + sizeof(u16));
1406         /* All zero means no more to read */
1407         if (!(len | checksum)) {
1408                 bus->rxpending = false;
1409                 return -ENODATA;
1410         }
1411         if ((u16)(~(len ^ checksum))) {
1412                 brcmf_err("HW header checksum error\n");
1413                 bus->sdcnt.rx_badhdr++;
1414                 brcmf_sdio_rxfail(bus, false, false);
1415                 return -EIO;
1416         }
1417         if (len < SDPCM_HDRLEN) {
1418                 brcmf_err("HW header length error\n");
1419                 return -EPROTO;
1420         }
1421         if (type == BRCMF_SDIO_FT_SUPER &&
1422             (roundup(len, bus->blocksize) != rd->len)) {
1423                 brcmf_err("HW superframe header length error\n");
1424                 return -EPROTO;
1425         }
1426         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1427                 brcmf_err("HW subframe header length error\n");
1428                 return -EPROTO;
1429         }
1430         rd->len = len;
1431
1432         /* software header */
1433         header += SDPCM_HWHDR_LEN;
1434         swheader = le32_to_cpu(*(__le32 *)header);
1435         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1436                 brcmf_err("Glom descriptor found in superframe head\n");
1437                 rd->len = 0;
1438                 return -EINVAL;
1439         }
1440         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1441         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1442         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1443             type != BRCMF_SDIO_FT_SUPER) {
1444                 brcmf_err("HW header length too long\n");
1445                 bus->sdcnt.rx_toolong++;
1446                 brcmf_sdio_rxfail(bus, false, false);
1447                 rd->len = 0;
1448                 return -EPROTO;
1449         }
1450         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1451                 brcmf_err("Wrong channel for superframe\n");
1452                 rd->len = 0;
1453                 return -EINVAL;
1454         }
1455         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1456             rd->channel != SDPCM_EVENT_CHANNEL) {
1457                 brcmf_err("Wrong channel for subframe\n");
1458                 rd->len = 0;
1459                 return -EINVAL;
1460         }
1461         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1462         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1463                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1464                 bus->sdcnt.rx_badhdr++;
1465                 brcmf_sdio_rxfail(bus, false, false);
1466                 rd->len = 0;
1467                 return -ENXIO;
1468         }
1469         if (rd->seq_num != rx_seq) {
1470                 brcmf_err("seq %d: sequence number error, expect %d\n",
1471                           rx_seq, rd->seq_num);
1472                 bus->sdcnt.rx_badseq++;
1473                 rd->seq_num = rx_seq;
1474         }
1475         /* no need to check the reset for subframe */
1476         if (type == BRCMF_SDIO_FT_SUB)
1477                 return 0;
1478         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1479         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1480                 /* only warm for NON glom packet */
1481                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1482                         brcmf_err("seq %d: next length error\n", rx_seq);
1483                 rd->len_nxtfrm = 0;
1484         }
1485         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1486         fc = swheader & SDPCM_FCMASK_MASK;
1487         if (bus->flowcontrol != fc) {
1488                 if (~bus->flowcontrol & fc)
1489                         bus->sdcnt.fc_xoff++;
1490                 if (bus->flowcontrol & ~fc)
1491                         bus->sdcnt.fc_xon++;
1492                 bus->sdcnt.fc_rcvd++;
1493                 bus->flowcontrol = fc;
1494         }
1495         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1496         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1497                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1498                 tx_seq_max = bus->tx_seq + 2;
1499         }
1500         bus->tx_max = tx_seq_max;
1501
1502         return 0;
1503 }
1504
1505 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1506 {
1507         *(__le16 *)header = cpu_to_le16(frm_length);
1508         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1509 }
1510
1511 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1512                               struct brcmf_sdio_hdrinfo *hd_info)
1513 {
1514         u32 hdrval;
1515         u8 hdr_offset;
1516
1517         brcmf_sdio_update_hwhdr(header, hd_info->len);
1518         hdr_offset = SDPCM_HWHDR_LEN;
1519
1520         if (bus->txglom) {
1521                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1522                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1523                 hdrval = (u16)hd_info->tail_pad << 16;
1524                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1525                 hdr_offset += SDPCM_HWEXT_LEN;
1526         }
1527
1528         hdrval = hd_info->seq_num;
1529         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1530                   SDPCM_CHANNEL_MASK;
1531         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1532                   SDPCM_DOFFSET_MASK;
1533         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1534         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1535         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1536 }
1537
1538 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1539 {
1540         u16 dlen, totlen;
1541         u8 *dptr, num = 0;
1542         u16 sublen;
1543         struct sk_buff *pfirst, *pnext;
1544
1545         int errcode;
1546         u8 doff, sfdoff;
1547
1548         struct brcmf_sdio_hdrinfo rd_new;
1549
1550         /* If packets, issue read(s) and send up packet chain */
1551         /* Return sequence numbers consumed? */
1552
1553         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1554                   bus->glomd, skb_peek(&bus->glom));
1555
1556         /* If there's a descriptor, generate the packet chain */
1557         if (bus->glomd) {
1558                 pfirst = pnext = NULL;
1559                 dlen = (u16) (bus->glomd->len);
1560                 dptr = bus->glomd->data;
1561                 if (!dlen || (dlen & 1)) {
1562                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1563                                   dlen);
1564                         dlen = 0;
1565                 }
1566
1567                 for (totlen = num = 0; dlen; num++) {
1568                         /* Get (and move past) next length */
1569                         sublen = get_unaligned_le16(dptr);
1570                         dlen -= sizeof(u16);
1571                         dptr += sizeof(u16);
1572                         if ((sublen < SDPCM_HDRLEN) ||
1573                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1574                                 brcmf_err("descriptor len %d bad: %d\n",
1575                                           num, sublen);
1576                                 pnext = NULL;
1577                                 break;
1578                         }
1579                         if (sublen % bus->sgentry_align) {
1580                                 brcmf_err("sublen %d not multiple of %d\n",
1581                                           sublen, bus->sgentry_align);
1582                         }
1583                         totlen += sublen;
1584
1585                         /* For last frame, adjust read len so total
1586                                  is a block multiple */
1587                         if (!dlen) {
1588                                 sublen +=
1589                                     (roundup(totlen, bus->blocksize) - totlen);
1590                                 totlen = roundup(totlen, bus->blocksize);
1591                         }
1592
1593                         /* Allocate/chain packet for next subframe */
1594                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1595                         if (pnext == NULL) {
1596                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1597                                           num, sublen);
1598                                 break;
1599                         }
1600                         skb_queue_tail(&bus->glom, pnext);
1601
1602                         /* Adhere to start alignment requirements */
1603                         pkt_align(pnext, sublen, bus->sgentry_align);
1604                 }
1605
1606                 /* If all allocations succeeded, save packet chain
1607                          in bus structure */
1608                 if (pnext) {
1609                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1610                                   totlen, num);
1611                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1612                             totlen != bus->cur_read.len) {
1613                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1614                                           bus->cur_read.len, totlen, rxseq);
1615                         }
1616                         pfirst = pnext = NULL;
1617                 } else {
1618                         brcmf_sdio_free_glom(bus);
1619                         num = 0;
1620                 }
1621
1622                 /* Done with descriptor packet */
1623                 brcmu_pkt_buf_free_skb(bus->glomd);
1624                 bus->glomd = NULL;
1625                 bus->cur_read.len = 0;
1626         }
1627
1628         /* Ok -- either we just generated a packet chain,
1629                  or had one from before */
1630         if (!skb_queue_empty(&bus->glom)) {
1631                 if (BRCMF_GLOM_ON()) {
1632                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1633                         skb_queue_walk(&bus->glom, pnext) {
1634                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1635                                           pnext, (u8 *) (pnext->data),
1636                                           pnext->len, pnext->len);
1637                         }
1638                 }
1639
1640                 pfirst = skb_peek(&bus->glom);
1641                 dlen = (u16) brcmf_sdio_glom_len(bus);
1642
1643                 /* Do an SDIO read for the superframe.  Configurable iovar to
1644                  * read directly into the chained packet, or allocate a large
1645                  * packet and and copy into the chain.
1646                  */
1647                 sdio_claim_host(bus->sdiodev->func[1]);
1648                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1649                                                  &bus->glom, dlen);
1650                 sdio_release_host(bus->sdiodev->func[1]);
1651                 bus->sdcnt.f2rxdata++;
1652
1653                 /* On failure, kill the superframe, allow a couple retries */
1654                 if (errcode < 0) {
1655                         brcmf_err("glom read of %d bytes failed: %d\n",
1656                                   dlen, errcode);
1657
1658                         sdio_claim_host(bus->sdiodev->func[1]);
1659                         if (bus->glomerr++ < 3) {
1660                                 brcmf_sdio_rxfail(bus, true, true);
1661                         } else {
1662                                 bus->glomerr = 0;
1663                                 brcmf_sdio_rxfail(bus, true, false);
1664                                 bus->sdcnt.rxglomfail++;
1665                                 brcmf_sdio_free_glom(bus);
1666                         }
1667                         sdio_release_host(bus->sdiodev->func[1]);
1668                         return 0;
1669                 }
1670
1671                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1672                                    pfirst->data, min_t(int, pfirst->len, 48),
1673                                    "SUPERFRAME:\n");
1674
1675                 rd_new.seq_num = rxseq;
1676                 rd_new.len = dlen;
1677                 sdio_claim_host(bus->sdiodev->func[1]);
1678                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1679                                              BRCMF_SDIO_FT_SUPER);
1680                 sdio_release_host(bus->sdiodev->func[1]);
1681                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1682
1683                 /* Remove superframe header, remember offset */
1684                 skb_pull(pfirst, rd_new.dat_offset);
1685                 sfdoff = rd_new.dat_offset;
1686                 num = 0;
1687
1688                 /* Validate all the subframe headers */
1689                 skb_queue_walk(&bus->glom, pnext) {
1690                         /* leave when invalid subframe is found */
1691                         if (errcode)
1692                                 break;
1693
1694                         rd_new.len = pnext->len;
1695                         rd_new.seq_num = rxseq++;
1696                         sdio_claim_host(bus->sdiodev->func[1]);
1697                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1698                                                      BRCMF_SDIO_FT_SUB);
1699                         sdio_release_host(bus->sdiodev->func[1]);
1700                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1701                                            pnext->data, 32, "subframe:\n");
1702
1703                         num++;
1704                 }
1705
1706                 if (errcode) {
1707                         /* Terminate frame on error, request
1708                                  a couple retries */
1709                         sdio_claim_host(bus->sdiodev->func[1]);
1710                         if (bus->glomerr++ < 3) {
1711                                 /* Restore superframe header space */
1712                                 skb_push(pfirst, sfdoff);
1713                                 brcmf_sdio_rxfail(bus, true, true);
1714                         } else {
1715                                 bus->glomerr = 0;
1716                                 brcmf_sdio_rxfail(bus, true, false);
1717                                 bus->sdcnt.rxglomfail++;
1718                                 brcmf_sdio_free_glom(bus);
1719                         }
1720                         sdio_release_host(bus->sdiodev->func[1]);
1721                         bus->cur_read.len = 0;
1722                         return 0;
1723                 }
1724
1725                 /* Basic SD framing looks ok - process each packet (header) */
1726
1727                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1728                         dptr = (u8 *) (pfirst->data);
1729                         sublen = get_unaligned_le16(dptr);
1730                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1731
1732                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1733                                            dptr, pfirst->len,
1734                                            "Rx Subframe Data:\n");
1735
1736                         __skb_trim(pfirst, sublen);
1737                         skb_pull(pfirst, doff);
1738
1739                         if (pfirst->len == 0) {
1740                                 skb_unlink(pfirst, &bus->glom);
1741                                 brcmu_pkt_buf_free_skb(pfirst);
1742                                 continue;
1743                         }
1744
1745                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1746                                            pfirst->data,
1747                                            min_t(int, pfirst->len, 32),
1748                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1749                                            bus->glom.qlen, pfirst, pfirst->data,
1750                                            pfirst->len, pfirst->next,
1751                                            pfirst->prev);
1752                         skb_unlink(pfirst, &bus->glom);
1753                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1754                         bus->sdcnt.rxglompkts++;
1755                 }
1756
1757                 bus->sdcnt.rxglomframes++;
1758         }
1759         return num;
1760 }
1761
1762 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1763                                      bool *pending)
1764 {
1765         DECLARE_WAITQUEUE(wait, current);
1766         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1767
1768         /* Wait until control frame is available */
1769         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1770         set_current_state(TASK_INTERRUPTIBLE);
1771
1772         while (!(*condition) && (!signal_pending(current) && timeout))
1773                 timeout = schedule_timeout(timeout);
1774
1775         if (signal_pending(current))
1776                 *pending = true;
1777
1778         set_current_state(TASK_RUNNING);
1779         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1780
1781         return timeout;
1782 }
1783
1784 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1785 {
1786         if (waitqueue_active(&bus->dcmd_resp_wait))
1787                 wake_up_interruptible(&bus->dcmd_resp_wait);
1788
1789         return 0;
1790 }
1791 static void
1792 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1793 {
1794         uint rdlen, pad;
1795         u8 *buf = NULL, *rbuf;
1796         int sdret;
1797
1798         brcmf_dbg(TRACE, "Enter\n");
1799
1800         if (bus->rxblen)
1801                 buf = vzalloc(bus->rxblen);
1802         if (!buf)
1803                 goto done;
1804
1805         rbuf = bus->rxbuf;
1806         pad = ((unsigned long)rbuf % bus->head_align);
1807         if (pad)
1808                 rbuf += (bus->head_align - pad);
1809
1810         /* Copy the already-read portion over */
1811         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1812         if (len <= BRCMF_FIRSTREAD)
1813                 goto gotpkt;
1814
1815         /* Raise rdlen to next SDIO block to avoid tail command */
1816         rdlen = len - BRCMF_FIRSTREAD;
1817         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1818                 pad = bus->blocksize - (rdlen % bus->blocksize);
1819                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1820                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1821                         rdlen += pad;
1822         } else if (rdlen % bus->head_align) {
1823                 rdlen += bus->head_align - (rdlen % bus->head_align);
1824         }
1825
1826         /* Drop if the read is too big or it exceeds our maximum */
1827         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1828                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1829                           rdlen, bus->sdiodev->bus_if->maxctl);
1830                 brcmf_sdio_rxfail(bus, false, false);
1831                 goto done;
1832         }
1833
1834         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1835                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1836                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1837                 bus->sdcnt.rx_toolong++;
1838                 brcmf_sdio_rxfail(bus, false, false);
1839                 goto done;
1840         }
1841
1842         /* Read remain of frame body */
1843         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1844         bus->sdcnt.f2rxdata++;
1845
1846         /* Control frame failures need retransmission */
1847         if (sdret < 0) {
1848                 brcmf_err("read %d control bytes failed: %d\n",
1849                           rdlen, sdret);
1850                 bus->sdcnt.rxc_errors++;
1851                 brcmf_sdio_rxfail(bus, true, true);
1852                 goto done;
1853         } else
1854                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1855
1856 gotpkt:
1857
1858         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1859                            buf, len, "RxCtrl:\n");
1860
1861         /* Point to valid data and indicate its length */
1862         spin_lock_bh(&bus->rxctl_lock);
1863         if (bus->rxctl) {
1864                 brcmf_err("last control frame is being processed.\n");
1865                 spin_unlock_bh(&bus->rxctl_lock);
1866                 vfree(buf);
1867                 goto done;
1868         }
1869         bus->rxctl = buf + doff;
1870         bus->rxctl_orig = buf;
1871         bus->rxlen = len - doff;
1872         spin_unlock_bh(&bus->rxctl_lock);
1873
1874 done:
1875         /* Awake any waiters */
1876         brcmf_sdio_dcmd_resp_wake(bus);
1877 }
1878
1879 /* Pad read to blocksize for efficiency */
1880 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1881 {
1882         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1883                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1884                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1885                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1886                         *rdlen += *pad;
1887         } else if (*rdlen % bus->head_align) {
1888                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1889         }
1890 }
1891
1892 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1893 {
1894         struct sk_buff *pkt;            /* Packet for event or data frames */
1895         u16 pad;                /* Number of pad bytes to read */
1896         uint rxleft = 0;        /* Remaining number of frames allowed */
1897         int ret;                /* Return code from calls */
1898         uint rxcount = 0;       /* Total frames read */
1899         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1900         u8 head_read = 0;
1901
1902         brcmf_dbg(TRACE, "Enter\n");
1903
1904         /* Not finished unless we encounter no more frames indication */
1905         bus->rxpending = true;
1906
1907         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1908              !bus->rxskip && rxleft && brcmf_bus_ready(bus->sdiodev->bus_if);
1909              rd->seq_num++, rxleft--) {
1910
1911                 /* Handle glomming separately */
1912                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1913                         u8 cnt;
1914                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1915                                   bus->glomd, skb_peek(&bus->glom));
1916                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1917                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1918                         rd->seq_num += cnt - 1;
1919                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1920                         continue;
1921                 }
1922
1923                 rd->len_left = rd->len;
1924                 /* read header first for unknow frame length */
1925                 sdio_claim_host(bus->sdiodev->func[1]);
1926                 if (!rd->len) {
1927                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1928                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1929                         bus->sdcnt.f2rxhdrs++;
1930                         if (ret < 0) {
1931                                 brcmf_err("RXHEADER FAILED: %d\n",
1932                                           ret);
1933                                 bus->sdcnt.rx_hdrfail++;
1934                                 brcmf_sdio_rxfail(bus, true, true);
1935                                 sdio_release_host(bus->sdiodev->func[1]);
1936                                 continue;
1937                         }
1938
1939                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1940                                            bus->rxhdr, SDPCM_HDRLEN,
1941                                            "RxHdr:\n");
1942
1943                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1944                                                BRCMF_SDIO_FT_NORMAL)) {
1945                                 sdio_release_host(bus->sdiodev->func[1]);
1946                                 if (!bus->rxpending)
1947                                         break;
1948                                 else
1949                                         continue;
1950                         }
1951
1952                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1953                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1954                                                         rd->len,
1955                                                         rd->dat_offset);
1956                                 /* prepare the descriptor for the next read */
1957                                 rd->len = rd->len_nxtfrm << 4;
1958                                 rd->len_nxtfrm = 0;
1959                                 /* treat all packet as event if we don't know */
1960                                 rd->channel = SDPCM_EVENT_CHANNEL;
1961                                 sdio_release_host(bus->sdiodev->func[1]);
1962                                 continue;
1963                         }
1964                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1965                                        rd->len - BRCMF_FIRSTREAD : 0;
1966                         head_read = BRCMF_FIRSTREAD;
1967                 }
1968
1969                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1970
1971                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1972                                             bus->head_align);
1973                 if (!pkt) {
1974                         /* Give up on data, request rtx of events */
1975                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1976                         brcmf_sdio_rxfail(bus, false,
1977                                             RETRYCHAN(rd->channel));
1978                         sdio_release_host(bus->sdiodev->func[1]);
1979                         continue;
1980                 }
1981                 skb_pull(pkt, head_read);
1982                 pkt_align(pkt, rd->len_left, bus->head_align);
1983
1984                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1985                 bus->sdcnt.f2rxdata++;
1986                 sdio_release_host(bus->sdiodev->func[1]);
1987
1988                 if (ret < 0) {
1989                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1990                                   rd->len, rd->channel, ret);
1991                         brcmu_pkt_buf_free_skb(pkt);
1992                         sdio_claim_host(bus->sdiodev->func[1]);
1993                         brcmf_sdio_rxfail(bus, true,
1994                                             RETRYCHAN(rd->channel));
1995                         sdio_release_host(bus->sdiodev->func[1]);
1996                         continue;
1997                 }
1998
1999                 if (head_read) {
2000                         skb_push(pkt, head_read);
2001                         memcpy(pkt->data, bus->rxhdr, head_read);
2002                         head_read = 0;
2003                 } else {
2004                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
2005                         rd_new.seq_num = rd->seq_num;
2006                         sdio_claim_host(bus->sdiodev->func[1]);
2007                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
2008                                                BRCMF_SDIO_FT_NORMAL)) {
2009                                 rd->len = 0;
2010                                 brcmu_pkt_buf_free_skb(pkt);
2011                         }
2012                         bus->sdcnt.rx_readahead_cnt++;
2013                         if (rd->len != roundup(rd_new.len, 16)) {
2014                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
2015                                           rd->len,
2016                                           roundup(rd_new.len, 16) >> 4);
2017                                 rd->len = 0;
2018                                 brcmf_sdio_rxfail(bus, true, true);
2019                                 sdio_release_host(bus->sdiodev->func[1]);
2020                                 brcmu_pkt_buf_free_skb(pkt);
2021                                 continue;
2022                         }
2023                         sdio_release_host(bus->sdiodev->func[1]);
2024                         rd->len_nxtfrm = rd_new.len_nxtfrm;
2025                         rd->channel = rd_new.channel;
2026                         rd->dat_offset = rd_new.dat_offset;
2027
2028                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2029                                              BRCMF_DATA_ON()) &&
2030                                            BRCMF_HDRS_ON(),
2031                                            bus->rxhdr, SDPCM_HDRLEN,
2032                                            "RxHdr:\n");
2033
2034                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
2035                                 brcmf_err("readahead on control packet %d?\n",
2036                                           rd_new.seq_num);
2037                                 /* Force retry w/normal header read */
2038                                 rd->len = 0;
2039                                 sdio_claim_host(bus->sdiodev->func[1]);
2040                                 brcmf_sdio_rxfail(bus, false, true);
2041                                 sdio_release_host(bus->sdiodev->func[1]);
2042                                 brcmu_pkt_buf_free_skb(pkt);
2043                                 continue;
2044                         }
2045                 }
2046
2047                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
2048                                    pkt->data, rd->len, "Rx Data:\n");
2049
2050                 /* Save superframe descriptor and allocate packet frame */
2051                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
2052                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
2053                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2054                                           rd->len);
2055                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2056                                                    pkt->data, rd->len,
2057                                                    "Glom Data:\n");
2058                                 __skb_trim(pkt, rd->len);
2059                                 skb_pull(pkt, SDPCM_HDRLEN);
2060                                 bus->glomd = pkt;
2061                         } else {
2062                                 brcmf_err("%s: glom superframe w/o "
2063                                           "descriptor!\n", __func__);
2064                                 sdio_claim_host(bus->sdiodev->func[1]);
2065                                 brcmf_sdio_rxfail(bus, false, false);
2066                                 sdio_release_host(bus->sdiodev->func[1]);
2067                         }
2068                         /* prepare the descriptor for the next read */
2069                         rd->len = rd->len_nxtfrm << 4;
2070                         rd->len_nxtfrm = 0;
2071                         /* treat all packet as event if we don't know */
2072                         rd->channel = SDPCM_EVENT_CHANNEL;
2073                         continue;
2074                 }
2075
2076                 /* Fill in packet len and prio, deliver upward */
2077                 __skb_trim(pkt, rd->len);
2078                 skb_pull(pkt, rd->dat_offset);
2079
2080                 /* prepare the descriptor for the next read */
2081                 rd->len = rd->len_nxtfrm << 4;
2082                 rd->len_nxtfrm = 0;
2083                 /* treat all packet as event if we don't know */
2084                 rd->channel = SDPCM_EVENT_CHANNEL;
2085
2086                 if (pkt->len == 0) {
2087                         brcmu_pkt_buf_free_skb(pkt);
2088                         continue;
2089                 }
2090
2091                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
2092         }
2093
2094         rxcount = maxframes - rxleft;
2095         /* Message if we hit the limit */
2096         if (!rxleft)
2097                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2098         else
2099                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2100         /* Back off rxseq if awaiting rtx, update rx_seq */
2101         if (bus->rxskip)
2102                 rd->seq_num--;
2103         bus->rx_seq = rd->seq_num;
2104
2105         return rxcount;
2106 }
2107
2108 static void
2109 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2110 {
2111         if (waitqueue_active(&bus->ctrl_wait))
2112                 wake_up_interruptible(&bus->ctrl_wait);
2113         return;
2114 }
2115
2116 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2117 {
2118         u16 head_pad;
2119         u8 *dat_buf;
2120
2121         dat_buf = (u8 *)(pkt->data);
2122
2123         /* Check head padding */
2124         head_pad = ((unsigned long)dat_buf % bus->head_align);
2125         if (head_pad) {
2126                 if (skb_headroom(pkt) < head_pad) {
2127                         bus->sdiodev->bus_if->tx_realloc++;
2128                         head_pad = 0;
2129                         if (skb_cow(pkt, head_pad))
2130                                 return -ENOMEM;
2131                 }
2132                 skb_push(pkt, head_pad);
2133                 dat_buf = (u8 *)(pkt->data);
2134                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2135         }
2136         return head_pad;
2137 }
2138
2139 /**
2140  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2141  * bus layer usage.
2142  */
2143 /* flag marking a dummy skb added for DMA alignment requirement */
2144 #define ALIGN_SKB_FLAG          0x8000
2145 /* bit mask of data length chopped from the previous packet */
2146 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2147
2148 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2149                                     struct sk_buff_head *pktq,
2150                                     struct sk_buff *pkt, u16 total_len)
2151 {
2152         struct brcmf_sdio_dev *sdiodev;
2153         struct sk_buff *pkt_pad;
2154         u16 tail_pad, tail_chop, chain_pad;
2155         unsigned int blksize;
2156         bool lastfrm;
2157         int ntail, ret;
2158
2159         sdiodev = bus->sdiodev;
2160         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2161         /* sg entry alignment should be a divisor of block size */
2162         WARN_ON(blksize % bus->sgentry_align);
2163
2164         /* Check tail padding */
2165         lastfrm = skb_queue_is_last(pktq, pkt);
2166         tail_pad = 0;
2167         tail_chop = pkt->len % bus->sgentry_align;
2168         if (tail_chop)
2169                 tail_pad = bus->sgentry_align - tail_chop;
2170         chain_pad = (total_len + tail_pad) % blksize;
2171         if (lastfrm && chain_pad)
2172                 tail_pad += blksize - chain_pad;
2173         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2174                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2175                                                 bus->head_align);
2176                 if (pkt_pad == NULL)
2177                         return -ENOMEM;
2178                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2179                 if (unlikely(ret < 0)) {
2180                         kfree_skb(pkt_pad);
2181                         return ret;
2182                 }
2183                 memcpy(pkt_pad->data,
2184                        pkt->data + pkt->len - tail_chop,
2185                        tail_chop);
2186                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2187                 skb_trim(pkt, pkt->len - tail_chop);
2188                 skb_trim(pkt_pad, tail_pad + tail_chop);
2189                 __skb_queue_after(pktq, pkt, pkt_pad);
2190         } else {
2191                 ntail = pkt->data_len + tail_pad -
2192                         (pkt->end - pkt->tail);
2193                 if (skb_cloned(pkt) || ntail > 0)
2194                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2195                                 return -ENOMEM;
2196                 if (skb_linearize(pkt))
2197                         return -ENOMEM;
2198                 __skb_put(pkt, tail_pad);
2199         }
2200
2201         return tail_pad;
2202 }
2203
2204 /**
2205  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2206  * @bus: brcmf_sdio structure pointer
2207  * @pktq: packet list pointer
2208  * @chan: virtual channel to transmit the packet
2209  *
2210  * Processes to be applied to the packet
2211  *      - Align data buffer pointer
2212  *      - Align data buffer length
2213  *      - Prepare header
2214  * Return: negative value if there is error
2215  */
2216 static int
2217 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2218                       uint chan)
2219 {
2220         u16 head_pad, total_len;
2221         struct sk_buff *pkt_next;
2222         u8 txseq;
2223         int ret;
2224         struct brcmf_sdio_hdrinfo hd_info = {0};
2225
2226         txseq = bus->tx_seq;
2227         total_len = 0;
2228         skb_queue_walk(pktq, pkt_next) {
2229                 /* alignment packet inserted in previous
2230                  * loop cycle can be skipped as it is
2231                  * already properly aligned and does not
2232                  * need an sdpcm header.
2233                  */
2234                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2235                         continue;
2236
2237                 /* align packet data pointer */
2238                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2239                 if (ret < 0)
2240                         return ret;
2241                 head_pad = (u16)ret;
2242                 if (head_pad)
2243                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2244
2245                 total_len += pkt_next->len;
2246
2247                 hd_info.len = pkt_next->len;
2248                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2249                 if (bus->txglom && pktq->qlen > 1) {
2250                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2251                                                        pkt_next, total_len);
2252                         if (ret < 0)
2253                                 return ret;
2254                         hd_info.tail_pad = (u16)ret;
2255                         total_len += (u16)ret;
2256                 }
2257
2258                 hd_info.channel = chan;
2259                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2260                 hd_info.seq_num = txseq++;
2261
2262                 /* Now fill the header */
2263                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2264
2265                 if (BRCMF_BYTES_ON() &&
2266                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2267                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2268                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2269                                            "Tx Frame:\n");
2270                 else if (BRCMF_HDRS_ON())
2271                         brcmf_dbg_hex_dump(true, pkt_next->data,
2272                                            head_pad + bus->tx_hdrlen,
2273                                            "Tx Header:\n");
2274         }
2275         /* Hardware length tag of the first packet should be total
2276          * length of the chain (including padding)
2277          */
2278         if (bus->txglom)
2279                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2280         return 0;
2281 }
2282
2283 /**
2284  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2285  * @bus: brcmf_sdio structure pointer
2286  * @pktq: packet list pointer
2287  *
2288  * Processes to be applied to the packet
2289  *      - Remove head padding
2290  *      - Remove tail padding
2291  */
2292 static void
2293 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2294 {
2295         u8 *hdr;
2296         u32 dat_offset;
2297         u16 tail_pad;
2298         u16 dummy_flags, chop_len;
2299         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2300
2301         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2302                 dummy_flags = *(u16 *)(pkt_next->cb);
2303                 if (dummy_flags & ALIGN_SKB_FLAG) {
2304                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2305                         if (chop_len) {
2306                                 pkt_prev = pkt_next->prev;
2307                                 skb_put(pkt_prev, chop_len);
2308                         }
2309                         __skb_unlink(pkt_next, pktq);
2310                         brcmu_pkt_buf_free_skb(pkt_next);
2311                 } else {
2312                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2313                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2314                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2315                                      SDPCM_DOFFSET_SHIFT;
2316                         skb_pull(pkt_next, dat_offset);
2317                         if (bus->txglom) {
2318                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2319                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2320                         }
2321                 }
2322         }
2323 }
2324
2325 /* Writes a HW/SW header into the packet and sends it. */
2326 /* Assumes: (a) header space already there, (b) caller holds lock */
2327 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2328                             uint chan)
2329 {
2330         int ret;
2331         struct sk_buff *pkt_next, *tmp;
2332
2333         brcmf_dbg(TRACE, "Enter\n");
2334
2335         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2336         if (ret)
2337                 goto done;
2338
2339         sdio_claim_host(bus->sdiodev->func[1]);
2340         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2341         bus->sdcnt.f2txdata++;
2342
2343         if (ret < 0)
2344                 brcmf_sdio_txfail(bus);
2345
2346         sdio_release_host(bus->sdiodev->func[1]);
2347
2348 done:
2349         brcmf_sdio_txpkt_postp(bus, pktq);
2350         if (ret == 0)
2351                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2352         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2353                 __skb_unlink(pkt_next, pktq);
2354                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2355         }
2356         return ret;
2357 }
2358
2359 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2360 {
2361         struct sk_buff *pkt;
2362         struct sk_buff_head pktq;
2363         u32 intstatus = 0;
2364         int ret = 0, prec_out, i;
2365         uint cnt = 0;
2366         u8 tx_prec_map, pkt_num;
2367
2368         brcmf_dbg(TRACE, "Enter\n");
2369
2370         tx_prec_map = ~bus->flowcontrol;
2371
2372         /* Send frames until the limit or some other event */
2373         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2374                 pkt_num = 1;
2375                 if (down_interruptible(&bus->tx_seq_lock))
2376                         return cnt;
2377                 if (bus->txglom)
2378                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2379                                         bus->sdiodev->txglomsz);
2380                 pkt_num = min_t(u32, pkt_num,
2381                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2382                 __skb_queue_head_init(&pktq);
2383                 spin_lock_bh(&bus->txq_lock);
2384                 for (i = 0; i < pkt_num; i++) {
2385                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2386                                               &prec_out);
2387                         if (pkt == NULL)
2388                                 break;
2389                         __skb_queue_tail(&pktq, pkt);
2390                 }
2391                 spin_unlock_bh(&bus->txq_lock);
2392                 if (i == 0) {
2393                         up(&bus->tx_seq_lock);
2394                         break;
2395                 }
2396
2397                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2398                 up(&bus->tx_seq_lock);
2399
2400                 cnt += i;
2401
2402                 /* In poll mode, need to check for other events */
2403                 if (!bus->intr) {
2404                         /* Check device status, signal pending interrupt */
2405                         sdio_claim_host(bus->sdiodev->func[1]);
2406                         ret = r_sdreg32(bus, &intstatus,
2407                                         offsetof(struct sdpcmd_regs,
2408                                                  intstatus));
2409                         sdio_release_host(bus->sdiodev->func[1]);
2410                         bus->sdcnt.f2txdata++;
2411                         if (ret != 0)
2412                                 break;
2413                         if (intstatus & bus->hostintmask)
2414                                 atomic_set(&bus->ipend, 1);
2415                 }
2416         }
2417
2418         /* Deflow-control stack if needed */
2419         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2420             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2421                 bus->txoff = false;
2422                 brcmf_txflowblock(bus->sdiodev->dev, false);
2423         }
2424
2425         return cnt;
2426 }
2427
2428 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2429 {
2430         u8 doff;
2431         u16 pad;
2432         uint retries = 0;
2433         struct brcmf_sdio_hdrinfo hd_info = {0};
2434         int ret;
2435
2436         brcmf_dbg(TRACE, "Enter\n");
2437
2438         /* Back the pointer to make room for bus header */
2439         frame -= bus->tx_hdrlen;
2440         len += bus->tx_hdrlen;
2441
2442         /* Add alignment padding (optional for ctl frames) */
2443         doff = ((unsigned long)frame % bus->head_align);
2444         if (doff) {
2445                 frame -= doff;
2446                 len += doff;
2447                 memset(frame + bus->tx_hdrlen, 0, doff);
2448         }
2449
2450         /* Round send length to next SDIO block */
2451         pad = 0;
2452         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2453                 pad = bus->blocksize - (len % bus->blocksize);
2454                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2455                         pad = 0;
2456         } else if (len % bus->head_align) {
2457                 pad = bus->head_align - (len % bus->head_align);
2458         }
2459         len += pad;
2460
2461         hd_info.len = len - pad;
2462         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2463         hd_info.dat_offset = doff + bus->tx_hdrlen;
2464         hd_info.seq_num = bus->tx_seq;
2465         hd_info.lastfrm = true;
2466         hd_info.tail_pad = pad;
2467         brcmf_sdio_hdpack(bus, frame, &hd_info);
2468
2469         if (bus->txglom)
2470                 brcmf_sdio_update_hwhdr(frame, len);
2471
2472         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2473                            frame, len, "Tx Frame:\n");
2474         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2475                            BRCMF_HDRS_ON(),
2476                            frame, min_t(u16, len, 16), "TxHdr:\n");
2477
2478         do {
2479                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2480
2481                 if (ret < 0)
2482                         brcmf_sdio_txfail(bus);
2483                 else
2484                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2485         } while (ret < 0 && retries++ < TXRETRIES);
2486
2487         return ret;
2488 }
2489
2490 static void brcmf_sdio_bus_stop(struct device *dev)
2491 {
2492         u32 local_hostintmask;
2493         u8 saveclk;
2494         int err;
2495         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2496         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2497         struct brcmf_sdio *bus = sdiodev->bus;
2498
2499         brcmf_dbg(TRACE, "Enter\n");
2500
2501         if (bus->watchdog_tsk) {
2502                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2503                 kthread_stop(bus->watchdog_tsk);
2504                 bus->watchdog_tsk = NULL;
2505         }
2506
2507         if (bus_if->state == BRCMF_BUS_DOWN) {
2508                 sdio_claim_host(sdiodev->func[1]);
2509
2510                 /* Enable clock for device interrupts */
2511                 brcmf_sdio_bus_sleep(bus, false, false);
2512
2513                 /* Disable and clear interrupts at the chip level also */
2514                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2515                 local_hostintmask = bus->hostintmask;
2516                 bus->hostintmask = 0;
2517
2518                 /* Force backplane clocks to assure F2 interrupt propagates */
2519                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2520                                             &err);
2521                 if (!err)
2522                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2523                                           (saveclk | SBSDIO_FORCE_HT), &err);
2524                 if (err)
2525                         brcmf_err("Failed to force clock for F2: err %d\n",
2526                                   err);
2527
2528                 /* Turn off the bus (F2), free any pending packets */
2529                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2530                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2531
2532                 /* Clear any pending interrupts now that F2 is disabled */
2533                 w_sdreg32(bus, local_hostintmask,
2534                           offsetof(struct sdpcmd_regs, intstatus));
2535
2536                 sdio_release_host(sdiodev->func[1]);
2537         }
2538         /* Clear the data packet queues */
2539         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2540
2541         /* Clear any held glomming stuff */
2542         if (bus->glomd)
2543                 brcmu_pkt_buf_free_skb(bus->glomd);
2544         brcmf_sdio_free_glom(bus);
2545
2546         /* Clear rx control and wake any waiters */
2547         spin_lock_bh(&bus->rxctl_lock);
2548         bus->rxlen = 0;
2549         spin_unlock_bh(&bus->rxctl_lock);
2550         brcmf_sdio_dcmd_resp_wake(bus);
2551
2552         /* Reset some F2 state stuff */
2553         bus->rxskip = false;
2554         bus->tx_seq = bus->rx_seq = 0;
2555 }
2556
2557 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2558 {
2559         unsigned long flags;
2560
2561         if (bus->sdiodev->oob_irq_requested) {
2562                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2563                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2564                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2565                         bus->sdiodev->irq_en = true;
2566                 }
2567                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2568         }
2569 }
2570
2571 static void atomic_orr(int val, atomic_t *v)
2572 {
2573         int old_val;
2574
2575         old_val = atomic_read(v);
2576         while (atomic_cmpxchg(v, old_val, val | old_val) != old_val)
2577                 old_val = atomic_read(v);
2578 }
2579
2580 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2581 {
2582         struct brcmf_core *buscore;
2583         u32 addr;
2584         unsigned long val;
2585         int ret;
2586
2587         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2588         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2589
2590         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2591         bus->sdcnt.f1regdata++;
2592         if (ret != 0)
2593                 return ret;
2594
2595         val &= bus->hostintmask;
2596         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2597
2598         /* Clear interrupts */
2599         if (val) {
2600                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2601                 bus->sdcnt.f1regdata++;
2602                 atomic_orr(val, &bus->intstatus);
2603         }
2604
2605         return ret;
2606 }
2607
2608 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2609 {
2610         u32 newstatus = 0;
2611         unsigned long intstatus;
2612         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2613         uint framecnt;                  /* Temporary counter of tx/rx frames */
2614         int err = 0;
2615
2616         brcmf_dbg(TRACE, "Enter\n");
2617
2618         sdio_claim_host(bus->sdiodev->func[1]);
2619
2620         /* If waiting for HTAVAIL, check status */
2621         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2622                 u8 clkctl, devctl = 0;
2623
2624 #ifdef DEBUG
2625                 /* Check for inconsistent device control */
2626                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2627                                            SBSDIO_DEVICE_CTL, &err);
2628 #endif                          /* DEBUG */
2629
2630                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2631                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2632                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2633
2634                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2635                           devctl, clkctl);
2636
2637                 if (SBSDIO_HTAV(clkctl)) {
2638                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2639                                                    SBSDIO_DEVICE_CTL, &err);
2640                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2641                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2642                                           devctl, &err);
2643                         bus->clkstate = CLK_AVAIL;
2644                 }
2645         }
2646
2647         /* Make sure backplane clock is on */
2648         brcmf_sdio_bus_sleep(bus, false, true);
2649
2650         /* Pending interrupt indicates new device status */
2651         if (atomic_read(&bus->ipend) > 0) {
2652                 atomic_set(&bus->ipend, 0);
2653                 err = brcmf_sdio_intr_rstatus(bus);
2654         }
2655
2656         /* Start with leftover status bits */
2657         intstatus = atomic_xchg(&bus->intstatus, 0);
2658
2659         /* Handle flow-control change: read new state in case our ack
2660          * crossed another change interrupt.  If change still set, assume
2661          * FC ON for safety, let next loop through do the debounce.
2662          */
2663         if (intstatus & I_HMB_FC_CHANGE) {
2664                 intstatus &= ~I_HMB_FC_CHANGE;
2665                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2666                                 offsetof(struct sdpcmd_regs, intstatus));
2667
2668                 err = r_sdreg32(bus, &newstatus,
2669                                 offsetof(struct sdpcmd_regs, intstatus));
2670                 bus->sdcnt.f1regdata += 2;
2671                 atomic_set(&bus->fcstate,
2672                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2673                 intstatus |= (newstatus & bus->hostintmask);
2674         }
2675
2676         /* Handle host mailbox indication */
2677         if (intstatus & I_HMB_HOST_INT) {
2678                 intstatus &= ~I_HMB_HOST_INT;
2679                 intstatus |= brcmf_sdio_hostmail(bus);
2680         }
2681
2682         sdio_release_host(bus->sdiodev->func[1]);
2683
2684         /* Generally don't ask for these, can get CRC errors... */
2685         if (intstatus & I_WR_OOSYNC) {
2686                 brcmf_err("Dongle reports WR_OOSYNC\n");
2687                 intstatus &= ~I_WR_OOSYNC;
2688         }
2689
2690         if (intstatus & I_RD_OOSYNC) {
2691                 brcmf_err("Dongle reports RD_OOSYNC\n");
2692                 intstatus &= ~I_RD_OOSYNC;
2693         }
2694
2695         if (intstatus & I_SBINT) {
2696                 brcmf_err("Dongle reports SBINT\n");
2697                 intstatus &= ~I_SBINT;
2698         }
2699
2700         /* Would be active due to wake-wlan in gSPI */
2701         if (intstatus & I_CHIPACTIVE) {
2702                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2703                 intstatus &= ~I_CHIPACTIVE;
2704         }
2705
2706         /* Ignore frame indications if rxskip is set */
2707         if (bus->rxskip)
2708                 intstatus &= ~I_HMB_FRAME_IND;
2709
2710         /* On frame indication, read available frames */
2711         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2712                 brcmf_sdio_readframes(bus, bus->rxbound);
2713                 if (!bus->rxpending)
2714                         intstatus &= ~I_HMB_FRAME_IND;
2715         }
2716
2717         /* Keep still-pending events for next scheduling */
2718         if (intstatus)
2719                 atomic_orr(intstatus, &bus->intstatus);
2720
2721         brcmf_sdio_clrintr(bus);
2722
2723         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2724             (down_interruptible(&bus->tx_seq_lock) == 0)) {
2725                 if (data_ok(bus)) {
2726                         sdio_claim_host(bus->sdiodev->func[1]);
2727                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2728                                                       bus->ctrl_frame_len);
2729                         sdio_release_host(bus->sdiodev->func[1]);
2730
2731                         bus->ctrl_frame_stat = false;
2732                         brcmf_sdio_wait_event_wakeup(bus);
2733                 }
2734                 up(&bus->tx_seq_lock);
2735         }
2736         /* Send queued frames (limit 1 if rx may still be pending) */
2737         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2738             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2739             data_ok(bus)) {
2740                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2741                                             txlimit;
2742                 brcmf_sdio_sendfromq(bus, framecnt);
2743         }
2744
2745         if (!brcmf_bus_ready(bus->sdiodev->bus_if) || (err != 0)) {
2746                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2747                 atomic_set(&bus->intstatus, 0);
2748         } else if (atomic_read(&bus->intstatus) ||
2749                    atomic_read(&bus->ipend) > 0 ||
2750                    (!atomic_read(&bus->fcstate) &&
2751                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2752                     data_ok(bus))) {
2753                 atomic_inc(&bus->dpc_tskcnt);
2754         }
2755 }
2756
2757 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2758 {
2759         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2760         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2761         struct brcmf_sdio *bus = sdiodev->bus;
2762
2763         return &bus->txq;
2764 }
2765
2766 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2767 {
2768         int ret = -EBADE;
2769         uint prec;
2770         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2771         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2772         struct brcmf_sdio *bus = sdiodev->bus;
2773
2774         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2775
2776         /* Add space for the header */
2777         skb_push(pkt, bus->tx_hdrlen);
2778         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2779
2780         prec = prio2prec((pkt->priority & PRIOMASK));
2781
2782         /* Check for existing queue, current flow-control,
2783                          pending event, or pending clock */
2784         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2785         bus->sdcnt.fcqueued++;
2786
2787         /* Priority based enq */
2788         spin_lock_bh(&bus->txq_lock);
2789         /* reset bus_flags in packet cb */
2790         *(u16 *)(pkt->cb) = 0;
2791         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2792                 skb_pull(pkt, bus->tx_hdrlen);
2793                 brcmf_err("out of bus->txq !!!\n");
2794                 ret = -ENOSR;
2795         } else {
2796                 ret = 0;
2797         }
2798
2799         if (pktq_len(&bus->txq) >= TXHI) {
2800                 bus->txoff = true;
2801                 brcmf_txflowblock(bus->sdiodev->dev, true);
2802         }
2803         spin_unlock_bh(&bus->txq_lock);
2804
2805 #ifdef DEBUG
2806         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2807                 qcount[prec] = pktq_plen(&bus->txq, prec);
2808 #endif
2809
2810         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2811                 atomic_inc(&bus->dpc_tskcnt);
2812                 queue_work(bus->brcmf_wq, &bus->datawork);
2813         }
2814
2815         return ret;
2816 }
2817
2818 #ifdef DEBUG
2819 #define CONSOLE_LINE_MAX        192
2820
2821 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2822 {
2823         struct brcmf_console *c = &bus->console;
2824         u8 line[CONSOLE_LINE_MAX], ch;
2825         u32 n, idx, addr;
2826         int rv;
2827
2828         /* Don't do anything until FWREADY updates console address */
2829         if (bus->console_addr == 0)
2830                 return 0;
2831
2832         /* Read console log struct */
2833         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2834         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2835                                sizeof(c->log_le));
2836         if (rv < 0)
2837                 return rv;
2838
2839         /* Allocate console buffer (one time only) */
2840         if (c->buf == NULL) {
2841                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2842                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2843                 if (c->buf == NULL)
2844                         return -ENOMEM;
2845         }
2846
2847         idx = le32_to_cpu(c->log_le.idx);
2848
2849         /* Protect against corrupt value */
2850         if (idx > c->bufsize)
2851                 return -EBADE;
2852
2853         /* Skip reading the console buffer if the index pointer
2854          has not moved */
2855         if (idx == c->last)
2856                 return 0;
2857
2858         /* Read the console buffer */
2859         addr = le32_to_cpu(c->log_le.buf);
2860         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2861         if (rv < 0)
2862                 return rv;
2863
2864         while (c->last != idx) {
2865                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2866                         if (c->last == idx) {
2867                                 /* This would output a partial line.
2868                                  * Instead, back up
2869                                  * the buffer pointer and output this
2870                                  * line next time around.
2871                                  */
2872                                 if (c->last >= n)
2873                                         c->last -= n;
2874                                 else
2875                                         c->last = c->bufsize - n;
2876                                 goto break2;
2877                         }
2878                         ch = c->buf[c->last];
2879                         c->last = (c->last + 1) % c->bufsize;
2880                         if (ch == '\n')
2881                                 break;
2882                         line[n] = ch;
2883                 }
2884
2885                 if (n > 0) {
2886                         if (line[n - 1] == '\r')
2887                                 n--;
2888                         line[n] = 0;
2889                         pr_debug("CONSOLE: %s\n", line);
2890                 }
2891         }
2892 break2:
2893
2894         return 0;
2895 }
2896 #endif                          /* DEBUG */
2897
2898 static int
2899 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2900 {
2901         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2902         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2903         struct brcmf_sdio *bus = sdiodev->bus;
2904         int ret = -1;
2905
2906         brcmf_dbg(TRACE, "Enter\n");
2907
2908         if (down_interruptible(&bus->tx_seq_lock))
2909                 return -EINTR;
2910
2911         if (!data_ok(bus)) {
2912                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2913                           bus->tx_max, bus->tx_seq);
2914                 up(&bus->tx_seq_lock);
2915                 /* Send from dpc */
2916                 bus->ctrl_frame_buf = msg;
2917                 bus->ctrl_frame_len = msglen;
2918                 bus->ctrl_frame_stat = true;
2919
2920                 wait_event_interruptible_timeout(bus->ctrl_wait,
2921                                                  !bus->ctrl_frame_stat,
2922                                                  msecs_to_jiffies(2000));
2923
2924                 if (!bus->ctrl_frame_stat) {
2925                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2926                         ret = 0;
2927                 } else {
2928                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2929                         bus->ctrl_frame_stat = false;
2930                         if (down_interruptible(&bus->tx_seq_lock))
2931                                 return -EINTR;
2932                         ret = -1;
2933                 }
2934         }
2935         if (ret == -1) {
2936                 sdio_claim_host(bus->sdiodev->func[1]);
2937                 brcmf_sdio_bus_sleep(bus, false, false);
2938                 ret = brcmf_sdio_tx_ctrlframe(bus, msg, msglen);
2939                 sdio_release_host(bus->sdiodev->func[1]);
2940                 up(&bus->tx_seq_lock);
2941         }
2942
2943         if (ret)
2944                 bus->sdcnt.tx_ctlerrs++;
2945         else
2946                 bus->sdcnt.tx_ctlpkts++;
2947
2948         return ret ? -EIO : 0;
2949 }
2950
2951 #ifdef DEBUG
2952 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2953                                    struct sdpcm_shared *sh)
2954 {
2955         u32 addr, console_ptr, console_size, console_index;
2956         char *conbuf = NULL;
2957         __le32 sh_val;
2958         int rv;
2959
2960         /* obtain console information from device memory */
2961         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2962         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2963                                (u8 *)&sh_val, sizeof(u32));
2964         if (rv < 0)
2965                 return rv;
2966         console_ptr = le32_to_cpu(sh_val);
2967
2968         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2969         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2970                                (u8 *)&sh_val, sizeof(u32));
2971         if (rv < 0)
2972                 return rv;
2973         console_size = le32_to_cpu(sh_val);
2974
2975         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2976         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2977                                (u8 *)&sh_val, sizeof(u32));
2978         if (rv < 0)
2979                 return rv;
2980         console_index = le32_to_cpu(sh_val);
2981
2982         /* allocate buffer for console data */
2983         if (console_size <= CONSOLE_BUFFER_MAX)
2984                 conbuf = vzalloc(console_size+1);
2985
2986         if (!conbuf)
2987                 return -ENOMEM;
2988
2989         /* obtain the console data from device */
2990         conbuf[console_size] = '\0';
2991         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2992                                console_size);
2993         if (rv < 0)
2994                 goto done;
2995
2996         rv = seq_write(seq, conbuf + console_index,
2997                        console_size - console_index);
2998         if (rv < 0)
2999                 goto done;
3000
3001         if (console_index > 0)
3002                 rv = seq_write(seq, conbuf, console_index - 1);
3003
3004 done:
3005         vfree(conbuf);
3006         return rv;
3007 }
3008
3009 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
3010                                 struct sdpcm_shared *sh)
3011 {
3012         int error;
3013         struct brcmf_trap_info tr;
3014
3015         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
3016                 brcmf_dbg(INFO, "no trap in firmware\n");
3017                 return 0;
3018         }
3019
3020         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3021                                   sizeof(struct brcmf_trap_info));
3022         if (error < 0)
3023                 return error;
3024
3025         seq_printf(seq,
3026                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
3027                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3028                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3029                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3030                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3031                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3032                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3033                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3034                    le32_to_cpu(tr.pc), sh->trap_addr,
3035                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3036                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3037                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3038                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3039
3040         return 0;
3041 }
3042
3043 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3044                                   struct sdpcm_shared *sh)
3045 {
3046         int error = 0;
3047         char file[80] = "?";
3048         char expr[80] = "<???>";
3049
3050         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3051                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3052                 return 0;
3053         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3054                 brcmf_dbg(INFO, "no assert in dongle\n");
3055                 return 0;
3056         }
3057
3058         sdio_claim_host(bus->sdiodev->func[1]);
3059         if (sh->assert_file_addr != 0) {
3060                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3061                                           sh->assert_file_addr, (u8 *)file, 80);
3062                 if (error < 0)
3063                         return error;
3064         }
3065         if (sh->assert_exp_addr != 0) {
3066                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3067                                           sh->assert_exp_addr, (u8 *)expr, 80);
3068                 if (error < 0)
3069                         return error;
3070         }
3071         sdio_release_host(bus->sdiodev->func[1]);
3072
3073         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3074                    file, sh->assert_line, expr);
3075         return 0;
3076 }
3077
3078 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3079 {
3080         int error;
3081         struct sdpcm_shared sh;
3082
3083         error = brcmf_sdio_readshared(bus, &sh);
3084
3085         if (error < 0)
3086                 return error;
3087
3088         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3089                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3090         else if (sh.flags & SDPCM_SHARED_ASSERT)
3091                 brcmf_err("assertion in dongle\n");
3092
3093         if (sh.flags & SDPCM_SHARED_TRAP)
3094                 brcmf_err("firmware trap in dongle\n");
3095
3096         return 0;
3097 }
3098
3099 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3100 {
3101         int error = 0;
3102         struct sdpcm_shared sh;
3103
3104         error = brcmf_sdio_readshared(bus, &sh);
3105         if (error < 0)
3106                 goto done;
3107
3108         error = brcmf_sdio_assert_info(seq, bus, &sh);
3109         if (error < 0)
3110                 goto done;
3111
3112         error = brcmf_sdio_trap_info(seq, bus, &sh);
3113         if (error < 0)
3114                 goto done;
3115
3116         error = brcmf_sdio_dump_console(seq, bus, &sh);
3117
3118 done:
3119         return error;
3120 }
3121
3122 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3123 {
3124         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3125         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3126
3127         return brcmf_sdio_died_dump(seq, bus);
3128 }
3129
3130 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3131 {
3132         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3133         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3134         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3135
3136         seq_printf(seq,
3137                    "intrcount:    %u\nlastintrs:    %u\n"
3138                    "pollcnt:      %u\nregfails:     %u\n"
3139                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3140                    "rxrtx:        %u\nrx_toolong:   %u\n"
3141                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3142                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3143                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3144                    "fc_xon:       %u\nrxglomfail:   %u\n"
3145                    "rxglomframes: %u\nrxglompkts:   %u\n"
3146                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3147                    "f2txdata:     %u\nf1regdata:    %u\n"
3148                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3149                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3150                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3151                    sdcnt->intrcount, sdcnt->lastintrs,
3152                    sdcnt->pollcnt, sdcnt->regfails,
3153                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3154                    sdcnt->rxrtx, sdcnt->rx_toolong,
3155                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3156                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3157                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3158                    sdcnt->fc_xon, sdcnt->rxglomfail,
3159                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3160                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3161                    sdcnt->f2txdata, sdcnt->f1regdata,
3162                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3163                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3164                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3165
3166         return 0;
3167 }
3168
3169 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3170 {
3171         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3172         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3173
3174         if (IS_ERR_OR_NULL(dentry))
3175                 return;
3176
3177         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3178         brcmf_debugfs_add_entry(drvr, "counters",
3179                                 brcmf_debugfs_sdio_count_read);
3180         debugfs_create_u32("console_interval", 0644, dentry,
3181                            &bus->console_interval);
3182 }
3183 #else
3184 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3185 {
3186         return 0;
3187 }
3188
3189 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3190 {
3191 }
3192 #endif /* DEBUG */
3193
3194 static int
3195 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3196 {
3197         int timeleft;
3198         uint rxlen = 0;
3199         bool pending;
3200         u8 *buf;
3201         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3202         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3203         struct brcmf_sdio *bus = sdiodev->bus;
3204
3205         brcmf_dbg(TRACE, "Enter\n");
3206
3207         /* Wait until control frame is available */
3208         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3209
3210         spin_lock_bh(&bus->rxctl_lock);
3211         rxlen = bus->rxlen;
3212         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3213         bus->rxctl = NULL;
3214         buf = bus->rxctl_orig;
3215         bus->rxctl_orig = NULL;
3216         bus->rxlen = 0;
3217         spin_unlock_bh(&bus->rxctl_lock);
3218         vfree(buf);
3219
3220         if (rxlen) {
3221                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3222                           rxlen, msglen);
3223         } else if (timeleft == 0) {
3224                 brcmf_err("resumed on timeout\n");
3225                 brcmf_sdio_checkdied(bus);
3226         } else if (pending) {
3227                 brcmf_dbg(CTL, "cancelled\n");
3228                 return -ERESTARTSYS;
3229         } else {
3230                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3231                 brcmf_sdio_checkdied(bus);
3232         }
3233
3234         if (rxlen)
3235                 bus->sdcnt.rx_ctlpkts++;
3236         else
3237                 bus->sdcnt.rx_ctlerrs++;
3238
3239         return rxlen ? (int)rxlen : -ETIMEDOUT;
3240 }
3241
3242 #ifdef DEBUG
3243 static bool
3244 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3245                         u8 *ram_data, uint ram_sz)
3246 {
3247         char *ram_cmp;
3248         int err;
3249         bool ret = true;
3250         int address;
3251         int offset;
3252         int len;
3253
3254         /* read back and verify */
3255         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3256                   ram_sz);
3257         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3258         /* do not proceed while no memory but  */
3259         if (!ram_cmp)
3260                 return true;
3261
3262         address = ram_addr;
3263         offset = 0;
3264         while (offset < ram_sz) {
3265                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3266                       ram_sz - offset;
3267                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3268                 if (err) {
3269                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3270                                   err, len, address);
3271                         ret = false;
3272                         break;
3273                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3274                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3275                                   offset, len);
3276                         ret = false;
3277                         break;
3278                 }
3279                 offset += len;
3280                 address += len;
3281         }
3282
3283         kfree(ram_cmp);
3284
3285         return ret;
3286 }
3287 #else   /* DEBUG */
3288 static bool
3289 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3290                         u8 *ram_data, uint ram_sz)
3291 {
3292         return true;
3293 }
3294 #endif  /* DEBUG */
3295
3296 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3297                                          const struct firmware *fw)
3298 {
3299         int err;
3300
3301         brcmf_dbg(TRACE, "Enter\n");
3302
3303         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3304                                 (u8 *)fw->data, fw->size);
3305         if (err)
3306                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3307                           err, (int)fw->size, bus->ci->rambase);
3308         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3309                                           (u8 *)fw->data, fw->size))
3310                 err = -EIO;
3311
3312         return err;
3313 }
3314
3315 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3316                                      void *vars, u32 varsz)
3317 {
3318         int address;
3319         int err;
3320
3321         brcmf_dbg(TRACE, "Enter\n");
3322
3323         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3324         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3325         if (err)
3326                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3327                           err, varsz, address);
3328         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3329                 err = -EIO;
3330
3331         return err;
3332 }
3333
3334 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3335                                         const struct firmware *fw,
3336                                         void *nvram, u32 nvlen)
3337 {
3338         int bcmerror = -EFAULT;
3339         u32 rstvec;
3340
3341         sdio_claim_host(bus->sdiodev->func[1]);
3342         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3343
3344         /* Keep arm in reset */
3345         brcmf_chip_enter_download(bus->ci);
3346
3347         rstvec = get_unaligned_le32(fw->data);
3348         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3349
3350         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3351         release_firmware(fw);
3352         if (bcmerror) {
3353                 brcmf_err("dongle image file download failed\n");
3354                 brcmf_fw_nvram_free(nvram);
3355                 goto err;
3356         }
3357
3358         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3359         brcmf_fw_nvram_free(nvram);
3360         if (bcmerror) {
3361                 brcmf_err("dongle nvram file download failed\n");
3362                 goto err;
3363         }
3364
3365         /* Take arm out of reset */
3366         if (!brcmf_chip_exit_download(bus->ci, rstvec)) {
3367                 brcmf_err("error getting out of ARM core reset\n");
3368                 goto err;
3369         }
3370
3371         /* Allow HT Clock now that the ARM is running. */
3372         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_LOAD);
3373         bcmerror = 0;
3374
3375 err:
3376         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3377         sdio_release_host(bus->sdiodev->func[1]);
3378         return bcmerror;
3379 }
3380
3381 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3382 {
3383         int err = 0;
3384         u8 val;
3385
3386         brcmf_dbg(TRACE, "Enter\n");
3387
3388         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3389         if (err) {
3390                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3391                 return;
3392         }
3393
3394         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3395         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3396         if (err) {
3397                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3398                 return;
3399         }
3400
3401         /* Add CMD14 Support */
3402         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3403                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3404                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3405                           &err);
3406         if (err) {
3407                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3408                 return;
3409         }
3410
3411         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3412                           SBSDIO_FORCE_HT, &err);
3413         if (err) {
3414                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3415                 return;
3416         }
3417
3418         /* set flag */
3419         bus->sr_enabled = true;
3420         brcmf_dbg(INFO, "SR enabled\n");
3421 }
3422
3423 /* enable KSO bit */
3424 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3425 {
3426         u8 val;
3427         int err = 0;
3428
3429         brcmf_dbg(TRACE, "Enter\n");
3430
3431         /* KSO bit added in SDIO core rev 12 */
3432         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3433                 return 0;
3434
3435         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3436         if (err) {
3437                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3438                 return err;
3439         }
3440
3441         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3442                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3443                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3444                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3445                                   val, &err);
3446                 if (err) {
3447                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3448                         return err;
3449                 }
3450         }
3451
3452         return 0;
3453 }
3454
3455
3456 static int brcmf_sdio_bus_preinit(struct device *dev)
3457 {
3458         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3459         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3460         struct brcmf_sdio *bus = sdiodev->bus;
3461         uint pad_size;
3462         u32 value;
3463         int err;
3464
3465         /* the commands below use the terms tx and rx from
3466          * a device perspective, ie. bus:txglom affects the
3467          * bus transfers from device to host.
3468          */
3469         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3470                 /* for sdio core rev < 12, disable txgloming */
3471                 value = 0;
3472                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3473                                            sizeof(u32));
3474         } else {
3475                 /* otherwise, set txglomalign */
3476                 value = 4;
3477                 if (sdiodev->pdata)
3478                         value = sdiodev->pdata->sd_sgentry_align;
3479                 /* SDIO ADMA requires at least 32 bit alignment */
3480                 value = max_t(u32, value, 4);
3481                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3482                                            sizeof(u32));
3483         }
3484
3485         if (err < 0)
3486                 goto done;
3487
3488         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3489         if (sdiodev->sg_support) {
3490                 bus->txglom = false;
3491                 value = 1;
3492                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3493                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3494                                            &value, sizeof(u32));
3495                 if (err < 0) {
3496                         /* bus:rxglom is allowed to fail */
3497                         err = 0;
3498                 } else {
3499                         bus->txglom = true;
3500                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3501                 }
3502         }
3503         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3504
3505 done:
3506         return err;
3507 }
3508
3509 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3510 {
3511         brcmf_dbg(TRACE, "Enter\n");
3512
3513         if (!bus) {
3514                 brcmf_err("bus is null pointer, exiting\n");
3515                 return;
3516         }
3517
3518         if (!brcmf_bus_ready(bus->sdiodev->bus_if)) {
3519                 brcmf_err("bus is down. we have nothing to do\n");
3520                 return;
3521         }
3522         /* Count the interrupt call */
3523         bus->sdcnt.intrcount++;
3524         if (in_interrupt())
3525                 atomic_set(&bus->ipend, 1);
3526         else
3527                 if (brcmf_sdio_intr_rstatus(bus)) {
3528                         brcmf_err("failed backplane access\n");
3529                 }
3530
3531         /* Disable additional interrupts (is this needed now)? */
3532         if (!bus->intr)
3533                 brcmf_err("isr w/o interrupt configured!\n");
3534
3535         atomic_inc(&bus->dpc_tskcnt);
3536         queue_work(bus->brcmf_wq, &bus->datawork);
3537 }
3538
3539 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3540 {
3541 #ifdef DEBUG
3542         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3543 #endif  /* DEBUG */
3544
3545         brcmf_dbg(TIMER, "Enter\n");
3546
3547         /* Poll period: check device if appropriate. */
3548         if (!bus->sr_enabled &&
3549             bus->poll && (++bus->polltick >= bus->pollrate)) {
3550                 u32 intstatus = 0;
3551
3552                 /* Reset poll tick */
3553                 bus->polltick = 0;
3554
3555                 /* Check device if no interrupts */
3556                 if (!bus->intr ||
3557                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3558
3559                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3560                                 u8 devpend;
3561
3562                                 sdio_claim_host(bus->sdiodev->func[1]);
3563                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3564                                                             SDIO_CCCR_INTx,
3565                                                             NULL);
3566                                 sdio_release_host(bus->sdiodev->func[1]);
3567                                 intstatus =
3568                                     devpend & (INTR_STATUS_FUNC1 |
3569                                                INTR_STATUS_FUNC2);
3570                         }
3571
3572                         /* If there is something, make like the ISR and
3573                                  schedule the DPC */
3574                         if (intstatus) {
3575                                 bus->sdcnt.pollcnt++;
3576                                 atomic_set(&bus->ipend, 1);
3577
3578                                 atomic_inc(&bus->dpc_tskcnt);
3579                                 queue_work(bus->brcmf_wq, &bus->datawork);
3580                         }
3581                 }
3582
3583                 /* Update interrupt tracking */
3584                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3585         }
3586 #ifdef DEBUG
3587         /* Poll for console output periodically */
3588         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3589             bus->console_interval != 0) {
3590                 bus->console.count += BRCMF_WD_POLL_MS;
3591                 if (bus->console.count >= bus->console_interval) {
3592                         bus->console.count -= bus->console_interval;
3593                         sdio_claim_host(bus->sdiodev->func[1]);
3594                         /* Make sure backplane clock is on */
3595                         brcmf_sdio_bus_sleep(bus, false, false);
3596                         if (brcmf_sdio_readconsole(bus) < 0)
3597                                 /* stop on error */
3598                                 bus->console_interval = 0;
3599                         sdio_release_host(bus->sdiodev->func[1]);
3600                 }
3601         }
3602 #endif                          /* DEBUG */
3603
3604         /* On idle timeout clear activity flag and/or turn off clock */
3605         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3606                 if (++bus->idlecount >= bus->idletime) {
3607                         bus->idlecount = 0;
3608                         if (bus->activity) {
3609                                 bus->activity = false;
3610                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3611                         } else {
3612                                 brcmf_dbg(SDIO, "idle\n");
3613                                 sdio_claim_host(bus->sdiodev->func[1]);
3614                                 brcmf_sdio_bus_sleep(bus, true, false);
3615                                 sdio_release_host(bus->sdiodev->func[1]);
3616                         }
3617                 }
3618         }
3619
3620         return (atomic_read(&bus->ipend) > 0);
3621 }
3622
3623 static void brcmf_sdio_dataworker(struct work_struct *work)
3624 {
3625         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3626                                               datawork);
3627
3628         while (atomic_read(&bus->dpc_tskcnt)) {
3629                 atomic_set(&bus->dpc_tskcnt, 0);
3630                 brcmf_sdio_dpc(bus);
3631         }
3632 }
3633
3634 static void
3635 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3636                              struct brcmf_chip *ci, u32 drivestrength)
3637 {
3638         const struct sdiod_drive_str *str_tab = NULL;
3639         u32 str_mask;
3640         u32 str_shift;
3641         u32 base;
3642         u32 i;
3643         u32 drivestrength_sel = 0;
3644         u32 cc_data_temp;
3645         u32 addr;
3646
3647         if (!(ci->cc_caps & CC_CAP_PMU))
3648                 return;
3649
3650         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3651         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3652                 str_tab = sdiod_drvstr_tab1_1v8;
3653                 str_mask = 0x00003800;
3654                 str_shift = 11;
3655                 break;
3656         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3657                 str_tab = sdiod_drvstr_tab6_1v8;
3658                 str_mask = 0x00001800;
3659                 str_shift = 11;
3660                 break;
3661         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3662                 /* note: 43143 does not support tristate */
3663                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3664                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3665                         str_tab = sdiod_drvstr_tab2_3v3;
3666                         str_mask = 0x00000007;
3667                         str_shift = 0;
3668                 } else
3669                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3670                                   ci->name, drivestrength);
3671                 break;
3672         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3673                 str_tab = sdiod_drive_strength_tab5_1v8;
3674                 str_mask = 0x00003800;
3675                 str_shift = 11;
3676                 break;
3677         default:
3678                 brcmf_err("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
3679                           ci->name, ci->chiprev, ci->pmurev);
3680                 break;
3681         }
3682
3683         if (str_tab != NULL) {
3684                 for (i = 0; str_tab[i].strength != 0; i++) {
3685                         if (drivestrength >= str_tab[i].strength) {
3686                                 drivestrength_sel = str_tab[i].sel;
3687                                 break;
3688                         }
3689                 }
3690                 base = brcmf_chip_get_chipcommon(ci)->base;
3691                 addr = CORE_CC_REG(base, chipcontrol_addr);
3692                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3693                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3694                 cc_data_temp &= ~str_mask;
3695                 drivestrength_sel <<= str_shift;
3696                 cc_data_temp |= drivestrength_sel;
3697                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3698
3699                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3700                           str_tab[i].strength, drivestrength, cc_data_temp);
3701         }
3702 }
3703
3704 static int brcmf_sdio_buscoreprep(void *ctx)
3705 {
3706         struct brcmf_sdio_dev *sdiodev = ctx;
3707         int err = 0;
3708         u8 clkval, clkset;
3709
3710         /* Try forcing SDIO core to do ALPAvail request only */
3711         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3712         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3713         if (err) {
3714                 brcmf_err("error writing for HT off\n");
3715                 return err;
3716         }
3717
3718         /* If register supported, wait for ALPAvail and then force ALP */
3719         /* This may take up to 15 milliseconds */
3720         clkval = brcmf_sdiod_regrb(sdiodev,
3721                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3722
3723         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3724                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3725                           clkset, clkval);
3726                 return -EACCES;
3727         }
3728
3729         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3730                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3731                         !SBSDIO_ALPAV(clkval)),
3732                         PMU_MAX_TRANSITION_DLY);
3733         if (!SBSDIO_ALPAV(clkval)) {
3734                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3735                           clkval);
3736                 return -EBUSY;
3737         }
3738
3739         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3740         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3741         udelay(65);
3742
3743         /* Also, disable the extra SDIO pull-ups */
3744         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3745
3746         return 0;
3747 }
3748
3749 static void brcmf_sdio_buscore_exitdl(void *ctx, struct brcmf_chip *chip,
3750                                       u32 rstvec)
3751 {
3752         struct brcmf_sdio_dev *sdiodev = ctx;
3753         struct brcmf_core *core;
3754         u32 reg_addr;
3755
3756         /* clear all interrupts */
3757         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3758         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3759         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3760
3761         if (rstvec)
3762                 /* Write reset vector to address 0 */
3763                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3764                                   sizeof(rstvec));
3765 }
3766
3767 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3768 {
3769         struct brcmf_sdio_dev *sdiodev = ctx;
3770         u32 val, rev;
3771
3772         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3773         if (sdiodev->func[0]->device == BRCM_SDIO_4335_4339_DEVICE_ID &&
3774             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3775                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3776                 if (rev >= 2) {
3777                         val &= ~CID_ID_MASK;
3778                         val |= BRCM_CC_4339_CHIP_ID;
3779                 }
3780         }
3781         return val;
3782 }
3783
3784 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3785 {
3786         struct brcmf_sdio_dev *sdiodev = ctx;
3787
3788         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3789 }
3790
3791 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3792         .prepare = brcmf_sdio_buscoreprep,
3793         .exit_dl = brcmf_sdio_buscore_exitdl,
3794         .read32 = brcmf_sdio_buscore_read32,
3795         .write32 = brcmf_sdio_buscore_write32,
3796 };
3797
3798 static bool
3799 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3800 {
3801         u8 clkctl = 0;
3802         int err = 0;
3803         int reg_addr;
3804         u32 reg_val;
3805         u32 drivestrength;
3806
3807         sdio_claim_host(bus->sdiodev->func[1]);
3808
3809         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3810                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3811
3812         /*
3813          * Force PLL off until brcmf_chip_attach()
3814          * programs PLL control regs
3815          */
3816
3817         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3818                           BRCMF_INIT_CLKCTL1, &err);
3819         if (!err)
3820                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3821                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3822
3823         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3824                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3825                           err, BRCMF_INIT_CLKCTL1, clkctl);
3826                 goto fail;
3827         }
3828
3829         /* SDIO register access works so moving
3830          * state from UNKNOWN to DOWN.
3831          */
3832         brcmf_bus_change_state(bus->sdiodev->bus_if, BRCMF_BUS_DOWN);
3833
3834         bus->ci = brcmf_chip_attach(bus->sdiodev, &brcmf_sdio_buscore_ops);
3835         if (IS_ERR(bus->ci)) {
3836                 brcmf_err("brcmf_chip_attach failed!\n");
3837                 bus->ci = NULL;
3838                 goto fail;
3839         }
3840
3841         if (brcmf_sdio_kso_init(bus)) {
3842                 brcmf_err("error enabling KSO\n");
3843                 goto fail;
3844         }
3845
3846         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3847                 drivestrength = bus->sdiodev->pdata->drive_strength;
3848         else
3849                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3850         brcmf_sdio_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3851
3852         /* Get info on the SOCRAM cores... */
3853         bus->ramsize = bus->ci->ramsize;
3854         if (!(bus->ramsize)) {
3855                 brcmf_err("failed to find SOCRAM memory!\n");
3856                 goto fail;
3857         }
3858
3859         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3860         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3861                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3862         if (err)
3863                 goto fail;
3864
3865         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3866
3867         brcmf_sdiod_regwb(bus->sdiodev,
3868                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3869         if (err)
3870                 goto fail;
3871
3872         /* set PMUControl so a backplane reset does PMU state reload */
3873         reg_addr = CORE_CC_REG(brcmf_chip_get_chipcommon(bus->ci)->base,
3874                                pmucontrol);
3875         reg_val = brcmf_sdiod_regrl(bus->sdiodev, reg_addr, &err);
3876         if (err)
3877                 goto fail;
3878
3879         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3880
3881         brcmf_sdiod_regwl(bus->sdiodev, reg_addr, reg_val, &err);
3882         if (err)
3883                 goto fail;
3884
3885         sdio_release_host(bus->sdiodev->func[1]);
3886
3887         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3888
3889         /* allocate header buffer */
3890         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3891         if (!bus->hdrbuf)
3892                 return false;
3893         /* Locate an appropriately-aligned portion of hdrbuf */
3894         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3895                                     bus->head_align);
3896
3897         /* Set the poll and/or interrupt flags */
3898         bus->intr = true;
3899         bus->poll = false;
3900         if (bus->poll)
3901                 bus->pollrate = 1;
3902
3903         return true;
3904
3905 fail:
3906         sdio_release_host(bus->sdiodev->func[1]);
3907         return false;
3908 }
3909
3910 static int
3911 brcmf_sdio_watchdog_thread(void *data)
3912 {
3913         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3914
3915         allow_signal(SIGTERM);
3916         /* Run until signal received */
3917         while (1) {
3918                 if (kthread_should_stop())
3919                         break;
3920                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3921                         brcmf_sdio_bus_watchdog(bus);
3922                         /* Count the tick for reference */
3923                         bus->sdcnt.tickcnt++;
3924                         reinit_completion(&bus->watchdog_wait);
3925                 } else
3926                         break;
3927         }
3928         return 0;
3929 }
3930
3931 static void
3932 brcmf_sdio_watchdog(unsigned long data)
3933 {
3934         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3935
3936         if (bus->watchdog_tsk) {
3937                 complete(&bus->watchdog_wait);
3938                 /* Reschedule the watchdog */
3939                 if (bus->wd_timer_valid)
3940                         mod_timer(&bus->timer,
3941                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3942         }
3943 }
3944
3945 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3946         .stop = brcmf_sdio_bus_stop,
3947         .preinit = brcmf_sdio_bus_preinit,
3948         .txdata = brcmf_sdio_bus_txdata,
3949         .txctl = brcmf_sdio_bus_txctl,
3950         .rxctl = brcmf_sdio_bus_rxctl,
3951         .gettxq = brcmf_sdio_bus_gettxq,
3952 };
3953
3954 static void brcmf_sdio_firmware_callback(struct device *dev,
3955                                          const struct firmware *code,
3956                                          void *nvram, u32 nvram_len)
3957 {
3958         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3959         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3960         struct brcmf_sdio *bus = sdiodev->bus;
3961         int err = 0;
3962         u8 saveclk;
3963
3964         brcmf_dbg(TRACE, "Enter: dev=%s\n", dev_name(dev));
3965
3966         /* try to download image and nvram to the dongle */
3967         if (bus_if->state == BRCMF_BUS_DOWN) {
3968                 bus->alp_only = true;
3969                 err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
3970                 if (err)
3971                         goto fail;
3972                 bus->alp_only = false;
3973         }
3974
3975         if (!bus_if->drvr)
3976                 return;
3977
3978         /* Start the watchdog timer */
3979         bus->sdcnt.tickcnt = 0;
3980         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3981
3982         sdio_claim_host(sdiodev->func[1]);
3983
3984         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3985         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3986         if (bus->clkstate != CLK_AVAIL)
3987                 goto release;
3988
3989         /* Force clocks on backplane to be sure F2 interrupt propagates */
3990         saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
3991         if (!err) {
3992                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3993                                   (saveclk | SBSDIO_FORCE_HT), &err);
3994         }
3995         if (err) {
3996                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3997                 goto release;
3998         }
3999
4000         /* Enable function 2 (frame transfers) */
4001         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4002                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
4003         err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4004
4005
4006         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4007
4008         /* If F2 successfully enabled, set core and enable interrupts */
4009         if (!err) {
4010                 /* Set up the interrupt mask and enable interrupts */
4011                 bus->hostintmask = HOSTINTMASK;
4012                 w_sdreg32(bus, bus->hostintmask,
4013                           offsetof(struct sdpcmd_regs, hostintmask));
4014
4015                 brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4016         } else {
4017                 /* Disable F2 again */
4018                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4019                 goto release;
4020         }
4021
4022         if (brcmf_chip_sr_capable(bus->ci)) {
4023                 brcmf_sdio_sr_init(bus);
4024         } else {
4025                 /* Restore previous clock setting */
4026                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4027                                   saveclk, &err);
4028         }
4029
4030         if (err == 0) {
4031                 err = brcmf_sdiod_intr_register(sdiodev);
4032                 if (err != 0)
4033                         brcmf_err("intr register failed:%d\n", err);
4034         }
4035
4036         /* If we didn't come up, turn off backplane clock */
4037         if (err != 0)
4038                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4039
4040         sdio_release_host(sdiodev->func[1]);
4041
4042         err = brcmf_bus_start(dev);
4043         if (err != 0) {
4044                 brcmf_err("dongle is not responding\n");
4045                 goto fail;
4046         }
4047         return;
4048
4049 release:
4050         sdio_release_host(sdiodev->func[1]);
4051 fail:
4052         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4053         device_release_driver(dev);
4054 }
4055
4056 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4057 {
4058         int ret;
4059         struct brcmf_sdio *bus;
4060
4061         brcmf_dbg(TRACE, "Enter\n");
4062
4063         /* Allocate private bus interface state */
4064         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4065         if (!bus)
4066                 goto fail;
4067
4068         bus->sdiodev = sdiodev;
4069         sdiodev->bus = bus;
4070         skb_queue_head_init(&bus->glom);
4071         bus->txbound = BRCMF_TXBOUND;
4072         bus->rxbound = BRCMF_RXBOUND;
4073         bus->txminmax = BRCMF_TXMINMAX;
4074         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4075
4076         /* platform specific configuration:
4077          *   alignments must be at least 4 bytes for ADMA
4078          */
4079         bus->head_align = ALIGNMENT;
4080         bus->sgentry_align = ALIGNMENT;
4081         if (sdiodev->pdata) {
4082                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4083                         bus->head_align = sdiodev->pdata->sd_head_align;
4084                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4085                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4086         }
4087
4088         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4089         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4090         if (bus->brcmf_wq == NULL) {
4091                 brcmf_err("insufficient memory to create txworkqueue\n");
4092                 goto fail;
4093         }
4094
4095         /* attempt to attach to the dongle */
4096         if (!(brcmf_sdio_probe_attach(bus))) {
4097                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4098                 goto fail;
4099         }
4100
4101         spin_lock_init(&bus->rxctl_lock);
4102         spin_lock_init(&bus->txq_lock);
4103         sema_init(&bus->tx_seq_lock, 1);
4104         init_waitqueue_head(&bus->ctrl_wait);
4105         init_waitqueue_head(&bus->dcmd_resp_wait);
4106
4107         /* Set up the watchdog timer */
4108         init_timer(&bus->timer);
4109         bus->timer.data = (unsigned long)bus;
4110         bus->timer.function = brcmf_sdio_watchdog;
4111
4112         /* Initialize watchdog thread */
4113         init_completion(&bus->watchdog_wait);
4114         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4115                                         bus, "brcmf_watchdog");
4116         if (IS_ERR(bus->watchdog_tsk)) {
4117                 pr_warn("brcmf_watchdog thread failed to start\n");
4118                 bus->watchdog_tsk = NULL;
4119         }
4120         /* Initialize DPC thread */
4121         atomic_set(&bus->dpc_tskcnt, 0);
4122
4123         /* Assign bus interface call back */
4124         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4125         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4126         bus->sdiodev->bus_if->chip = bus->ci->chip;
4127         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4128
4129         /* default sdio bus header length for tx packet */
4130         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4131
4132         /* Attach to the common layer, reserve hdr space */
4133         ret = brcmf_attach(bus->sdiodev->dev);
4134         if (ret != 0) {
4135                 brcmf_err("brcmf_attach failed\n");
4136                 goto fail;
4137         }
4138
4139         /* Query the F2 block size, set roundup accordingly */
4140         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4141         bus->roundup = min(max_roundup, bus->blocksize);
4142
4143         /* Allocate buffers */
4144         if (bus->sdiodev->bus_if->maxctl) {
4145                 bus->sdiodev->bus_if->maxctl += bus->roundup;
4146                 bus->rxblen =
4147                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4148                             ALIGNMENT) + bus->head_align;
4149                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4150                 if (!(bus->rxbuf)) {
4151                         brcmf_err("rxbuf allocation failed\n");
4152                         goto fail;
4153                 }
4154         }
4155
4156         sdio_claim_host(bus->sdiodev->func[1]);
4157
4158         /* Disable F2 to clear any intermediate frame state on the dongle */
4159         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4160
4161         bus->rxflow = false;
4162
4163         /* Done with backplane-dependent accesses, can drop clock... */
4164         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4165
4166         sdio_release_host(bus->sdiodev->func[1]);
4167
4168         /* ...and initialize clock/power states */
4169         bus->clkstate = CLK_SDONLY;
4170         bus->idletime = BRCMF_IDLE_INTERVAL;
4171         bus->idleclock = BRCMF_IDLE_ACTIVE;
4172
4173         /* SR state */
4174         bus->sleeping = false;
4175         bus->sr_enabled = false;
4176
4177         brcmf_sdio_debugfs_create(bus);
4178         brcmf_dbg(INFO, "completed!!\n");
4179
4180         ret = brcmf_sdio_get_fwnames(bus->ci, sdiodev);
4181         if (ret)
4182                 goto fail;
4183
4184         ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4185                                      sdiodev->fw_name, sdiodev->nvram_name,
4186                                      brcmf_sdio_firmware_callback);
4187         if (ret != 0) {
4188                 brcmf_err("async firmware request failed: %d\n", ret);
4189                 goto fail;
4190         }
4191
4192         return bus;
4193
4194 fail:
4195         brcmf_sdio_remove(bus);
4196         return NULL;
4197 }
4198
4199 /* Detach and free everything */
4200 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4201 {
4202         brcmf_dbg(TRACE, "Enter\n");
4203
4204         if (bus) {
4205                 /* De-register interrupt handler */
4206                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4207
4208                 brcmf_detach(bus->sdiodev->dev);
4209
4210                 cancel_work_sync(&bus->datawork);
4211                 if (bus->brcmf_wq)
4212                         destroy_workqueue(bus->brcmf_wq);
4213
4214                 if (bus->ci) {
4215                         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
4216                                 sdio_claim_host(bus->sdiodev->func[1]);
4217                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4218                                 /* Leave the device in state where it is
4219                                  * 'quiet'. This is done by putting it in
4220                                  * download_state which essentially resets
4221                                  * all necessary cores.
4222                                  */
4223                                 msleep(20);
4224                                 brcmf_chip_enter_download(bus->ci);
4225                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4226                                 sdio_release_host(bus->sdiodev->func[1]);
4227                         }
4228                         brcmf_chip_detach(bus->ci);
4229                 }
4230
4231                 kfree(bus->rxbuf);
4232                 kfree(bus->hdrbuf);
4233                 kfree(bus);
4234         }
4235
4236         brcmf_dbg(TRACE, "Disconnected\n");
4237 }
4238
4239 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4240 {
4241         /* Totally stop the timer */
4242         if (!wdtick && bus->wd_timer_valid) {
4243                 del_timer_sync(&bus->timer);
4244                 bus->wd_timer_valid = false;
4245                 bus->save_ms = wdtick;
4246                 return;
4247         }
4248
4249         /* don't start the wd until fw is loaded */
4250         if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4251                 return;
4252
4253         if (wdtick) {
4254                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4255                         if (bus->wd_timer_valid)
4256                                 /* Stop timer and restart at new value */
4257                                 del_timer_sync(&bus->timer);
4258
4259                         /* Create timer again when watchdog period is
4260                            dynamically changed or in the first instance
4261                          */
4262                         bus->timer.expires =
4263                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4264                         add_timer(&bus->timer);
4265
4266                 } else {
4267                         /* Re arm the timer, at last watchdog period */
4268                         mod_timer(&bus->timer,
4269                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4270                 }
4271
4272                 bus->wd_timer_valid = true;
4273                 bus->save_ms = wdtick;
4274         }
4275 }