uapi: update install list after nvme.h rename
[cascardo/linux.git] / drivers / nvme / host / nvme.h
1 /*
2  * Copyright (c) 2011-2014, Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  */
13
14 #ifndef _NVME_H
15 #define _NVME_H
16
17 #include <linux/nvme.h>
18 #include <linux/pci.h>
19 #include <linux/kref.h>
20 #include <linux/blk-mq.h>
21
22 enum {
23         /*
24          * Driver internal status code for commands that were cancelled due
25          * to timeouts or controller shutdown.  The value is negative so
26          * that it a) doesn't overlap with the unsigned hardware error codes,
27          * and b) can easily be tested for.
28          */
29         NVME_SC_CANCELLED               = -EINTR,
30 };
31
32 extern unsigned char nvme_io_timeout;
33 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
34
35 extern unsigned char admin_timeout;
36 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
37
38 extern unsigned char shutdown_timeout;
39 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
40
41 enum {
42         NVME_NS_LBA             = 0,
43         NVME_NS_LIGHTNVM        = 1,
44 };
45
46 /*
47  * List of workarounds for devices that required behavior not specified in
48  * the standard.
49  */
50 enum nvme_quirks {
51         /*
52          * Prefers I/O aligned to a stripe size specified in a vendor
53          * specific Identify field.
54          */
55         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
56
57         /*
58          * The controller doesn't handle Identify value others than 0 or 1
59          * correctly.
60          */
61         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
62 };
63
64 struct nvme_ctrl {
65         const struct nvme_ctrl_ops *ops;
66         struct request_queue *admin_q;
67         struct device *dev;
68         struct kref kref;
69         int instance;
70         struct blk_mq_tag_set *tagset;
71         struct list_head namespaces;
72         struct mutex namespaces_mutex;
73         struct device *device;  /* char device */
74         struct list_head node;
75
76         char name[12];
77         char serial[20];
78         char model[40];
79         char firmware_rev[8];
80
81         u32 ctrl_config;
82
83         u32 page_size;
84         u32 max_hw_sectors;
85         u32 stripe_size;
86         u16 oncs;
87         atomic_t abort_limit;
88         u8 event_limit;
89         u8 vwc;
90         u32 vs;
91         bool subsystem;
92         unsigned long quirks;
93 };
94
95 /*
96  * An NVM Express namespace is equivalent to a SCSI LUN
97  */
98 struct nvme_ns {
99         struct list_head list;
100
101         struct nvme_ctrl *ctrl;
102         struct request_queue *queue;
103         struct gendisk *disk;
104         struct kref kref;
105
106         u8 eui[8];
107         u8 uuid[16];
108
109         unsigned ns_id;
110         int lba_shift;
111         u16 ms;
112         bool ext;
113         u8 pi_type;
114         int type;
115         u64 mode_select_num_blocks;
116         u32 mode_select_block_len;
117 };
118
119 struct nvme_ctrl_ops {
120         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
121         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
122         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
123         bool (*io_incapable)(struct nvme_ctrl *ctrl);
124         int (*reset_ctrl)(struct nvme_ctrl *ctrl);
125         void (*free_ctrl)(struct nvme_ctrl *ctrl);
126 };
127
128 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
129 {
130         u32 val = 0;
131
132         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
133                 return false;
134         return val & NVME_CSTS_RDY;
135 }
136
137 static inline bool nvme_io_incapable(struct nvme_ctrl *ctrl)
138 {
139         u32 val = 0;
140
141         if (ctrl->ops->io_incapable(ctrl))
142                 return false;
143         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
144                 return false;
145         return val & NVME_CSTS_CFS;
146 }
147
148 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
149 {
150         if (!ctrl->subsystem)
151                 return -ENOTTY;
152         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
153 }
154
155 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
156 {
157         return (sector >> (ns->lba_shift - 9));
158 }
159
160 static inline void nvme_setup_flush(struct nvme_ns *ns,
161                 struct nvme_command *cmnd)
162 {
163         memset(cmnd, 0, sizeof(*cmnd));
164         cmnd->common.opcode = nvme_cmd_flush;
165         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
166 }
167
168 static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
169                 struct nvme_command *cmnd)
170 {
171         u16 control = 0;
172         u32 dsmgmt = 0;
173
174         if (req->cmd_flags & REQ_FUA)
175                 control |= NVME_RW_FUA;
176         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
177                 control |= NVME_RW_LR;
178
179         if (req->cmd_flags & REQ_RAHEAD)
180                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
181
182         memset(cmnd, 0, sizeof(*cmnd));
183         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
184         cmnd->rw.command_id = req->tag;
185         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
186         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
187         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
188
189         if (ns->ms) {
190                 switch (ns->pi_type) {
191                 case NVME_NS_DPS_PI_TYPE3:
192                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
193                         break;
194                 case NVME_NS_DPS_PI_TYPE1:
195                 case NVME_NS_DPS_PI_TYPE2:
196                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
197                                         NVME_RW_PRINFO_PRCHK_REF;
198                         cmnd->rw.reftag = cpu_to_le32(
199                                         nvme_block_nr(ns, blk_rq_pos(req)));
200                         break;
201                 }
202                 if (!blk_integrity_rq(req))
203                         control |= NVME_RW_PRINFO_PRACT;
204         }
205
206         cmnd->rw.control = cpu_to_le16(control);
207         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
208 }
209
210
211 static inline int nvme_error_status(u16 status)
212 {
213         switch (status & 0x7ff) {
214         case NVME_SC_SUCCESS:
215                 return 0;
216         case NVME_SC_CAP_EXCEEDED:
217                 return -ENOSPC;
218         default:
219                 return -EIO;
220         }
221 }
222
223 static inline bool nvme_req_needs_retry(struct request *req, u16 status)
224 {
225         return !(status & NVME_SC_DNR || blk_noretry_request(req)) &&
226                 (jiffies - req->start_time) < req->timeout;
227 }
228
229 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
230 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
231 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
232 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
233                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
234 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
235 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
236 int nvme_init_identify(struct nvme_ctrl *ctrl);
237
238 void nvme_scan_namespaces(struct nvme_ctrl *ctrl);
239 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
240
241 void nvme_stop_queues(struct nvme_ctrl *ctrl);
242 void nvme_start_queues(struct nvme_ctrl *ctrl);
243
244 struct request *nvme_alloc_request(struct request_queue *q,
245                 struct nvme_command *cmd, unsigned int flags);
246 void nvme_requeue_req(struct request *req);
247 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
248                 void *buf, unsigned bufflen);
249 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
250                 void *buffer, unsigned bufflen,  u32 *result, unsigned timeout);
251 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
252                 void __user *ubuffer, unsigned bufflen, u32 *result,
253                 unsigned timeout);
254 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
255                 void __user *ubuffer, unsigned bufflen,
256                 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
257                 u32 *result, unsigned timeout);
258 int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
259 int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
260                 struct nvme_id_ns **id);
261 int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
262 int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
263                         dma_addr_t dma_addr, u32 *result);
264 int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
265                         dma_addr_t dma_addr, u32 *result);
266 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
267
268 extern spinlock_t dev_list_lock;
269
270 struct sg_io_hdr;
271
272 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
273 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
274 int nvme_sg_get_version_num(int __user *ip);
275
276 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
277 int nvme_nvm_register(struct request_queue *q, char *disk_name);
278 void nvme_nvm_unregister(struct request_queue *q, char *disk_name);
279
280 int __init nvme_core_init(void);
281 void nvme_core_exit(void);
282
283 #endif /* _NVME_H */