Merge branch 'linus' into locking/urgent, to pick up fixes
[cascardo/linux.git] / drivers / nvme / host / nvme.h
1 /*
2  * Copyright (c) 2011-2014, Intel Corporation.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  */
13
14 #ifndef _NVME_H
15 #define _NVME_H
16
17 #include <linux/nvme.h>
18 #include <linux/pci.h>
19 #include <linux/kref.h>
20 #include <linux/blk-mq.h>
21
22 enum {
23         /*
24          * Driver internal status code for commands that were cancelled due
25          * to timeouts or controller shutdown.  The value is negative so
26          * that it a) doesn't overlap with the unsigned hardware error codes,
27          * and b) can easily be tested for.
28          */
29         NVME_SC_CANCELLED               = -EINTR,
30 };
31
32 extern unsigned char nvme_io_timeout;
33 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
34
35 extern unsigned char admin_timeout;
36 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
37
38 extern unsigned char shutdown_timeout;
39 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
40
41 #define NVME_DEFAULT_KATO       5
42 #define NVME_KATO_GRACE         10
43
44 extern unsigned int nvme_max_retries;
45
46 enum {
47         NVME_NS_LBA             = 0,
48         NVME_NS_LIGHTNVM        = 1,
49 };
50
51 /*
52  * List of workarounds for devices that required behavior not specified in
53  * the standard.
54  */
55 enum nvme_quirks {
56         /*
57          * Prefers I/O aligned to a stripe size specified in a vendor
58          * specific Identify field.
59          */
60         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
61
62         /*
63          * The controller doesn't handle Identify value others than 0 or 1
64          * correctly.
65          */
66         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
67
68         /*
69          * The controller deterministically returns O's on reads to discarded
70          * logical blocks.
71          */
72         NVME_QUIRK_DISCARD_ZEROES               = (1 << 2),
73
74         /*
75          * The controller needs a delay before starts checking the device
76          * readiness, which is done by reading the NVME_CSTS_RDY bit.
77          */
78         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
79 };
80
81 /* The below value is the specific amount of delay needed before checking
82  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
83  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
84  * found empirically.
85  */
86 #define NVME_QUIRK_DELAY_AMOUNT         2000
87
88 enum nvme_ctrl_state {
89         NVME_CTRL_NEW,
90         NVME_CTRL_LIVE,
91         NVME_CTRL_RESETTING,
92         NVME_CTRL_RECONNECTING,
93         NVME_CTRL_DELETING,
94         NVME_CTRL_DEAD,
95 };
96
97 struct nvme_ctrl {
98         enum nvme_ctrl_state state;
99         spinlock_t lock;
100         const struct nvme_ctrl_ops *ops;
101         struct request_queue *admin_q;
102         struct request_queue *connect_q;
103         struct device *dev;
104         struct kref kref;
105         int instance;
106         struct blk_mq_tag_set *tagset;
107         struct list_head namespaces;
108         struct mutex namespaces_mutex;
109         struct device *device;  /* char device */
110         struct list_head node;
111         struct ida ns_ida;
112
113         char name[12];
114         char serial[20];
115         char model[40];
116         char firmware_rev[8];
117         u16 cntlid;
118
119         u32 ctrl_config;
120
121         u32 page_size;
122         u32 max_hw_sectors;
123         u32 stripe_size;
124         u16 oncs;
125         u16 vid;
126         atomic_t abort_limit;
127         u8 event_limit;
128         u8 vwc;
129         u32 vs;
130         u32 sgls;
131         u16 kas;
132         unsigned int kato;
133         bool subsystem;
134         unsigned long quirks;
135         struct work_struct scan_work;
136         struct work_struct async_event_work;
137         struct delayed_work ka_work;
138
139         /* Fabrics only */
140         u16 sqsize;
141         u32 ioccsz;
142         u32 iorcsz;
143         u16 icdoff;
144         u16 maxcmd;
145         struct nvmf_ctrl_options *opts;
146 };
147
148 /*
149  * An NVM Express namespace is equivalent to a SCSI LUN
150  */
151 struct nvme_ns {
152         struct list_head list;
153
154         struct nvme_ctrl *ctrl;
155         struct request_queue *queue;
156         struct gendisk *disk;
157         struct kref kref;
158         int instance;
159
160         u8 eui[8];
161         u8 uuid[16];
162
163         unsigned ns_id;
164         int lba_shift;
165         u16 ms;
166         bool ext;
167         u8 pi_type;
168         int type;
169         unsigned long flags;
170
171 #define NVME_NS_REMOVING 0
172 #define NVME_NS_DEAD     1
173
174         u64 mode_select_num_blocks;
175         u32 mode_select_block_len;
176 };
177
178 struct nvme_ctrl_ops {
179         const char *name;
180         struct module *module;
181         bool is_fabrics;
182         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
183         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
184         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
185         int (*reset_ctrl)(struct nvme_ctrl *ctrl);
186         void (*free_ctrl)(struct nvme_ctrl *ctrl);
187         void (*post_scan)(struct nvme_ctrl *ctrl);
188         void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
189         int (*delete_ctrl)(struct nvme_ctrl *ctrl);
190         const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl);
191         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
192 };
193
194 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
195 {
196         u32 val = 0;
197
198         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
199                 return false;
200         return val & NVME_CSTS_RDY;
201 }
202
203 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
204 {
205         if (!ctrl->subsystem)
206                 return -ENOTTY;
207         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
208 }
209
210 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
211 {
212         return (sector >> (ns->lba_shift - 9));
213 }
214
215 static inline unsigned nvme_map_len(struct request *rq)
216 {
217         if (req_op(rq) == REQ_OP_DISCARD)
218                 return sizeof(struct nvme_dsm_range);
219         else
220                 return blk_rq_bytes(rq);
221 }
222
223 static inline void nvme_cleanup_cmd(struct request *req)
224 {
225         if (req_op(req) == REQ_OP_DISCARD)
226                 kfree(req->completion_data);
227 }
228
229 static inline int nvme_error_status(u16 status)
230 {
231         switch (status & 0x7ff) {
232         case NVME_SC_SUCCESS:
233                 return 0;
234         case NVME_SC_CAP_EXCEEDED:
235                 return -ENOSPC;
236         default:
237                 return -EIO;
238         }
239 }
240
241 static inline bool nvme_req_needs_retry(struct request *req, u16 status)
242 {
243         return !(status & NVME_SC_DNR || blk_noretry_request(req)) &&
244                 (jiffies - req->start_time) < req->timeout &&
245                 req->retries < nvme_max_retries;
246 }
247
248 void nvme_cancel_request(struct request *req, void *data, bool reserved);
249 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
250                 enum nvme_ctrl_state new_state);
251 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
252 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
253 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
254 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
255                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
256 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
257 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
258 int nvme_init_identify(struct nvme_ctrl *ctrl);
259
260 void nvme_queue_scan(struct nvme_ctrl *ctrl);
261 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
262
263 #define NVME_NR_AERS    1
264 void nvme_complete_async_event(struct nvme_ctrl *ctrl,
265                 struct nvme_completion *cqe);
266 void nvme_queue_async_events(struct nvme_ctrl *ctrl);
267
268 void nvme_stop_queues(struct nvme_ctrl *ctrl);
269 void nvme_start_queues(struct nvme_ctrl *ctrl);
270 void nvme_kill_queues(struct nvme_ctrl *ctrl);
271
272 #define NVME_QID_ANY -1
273 struct request *nvme_alloc_request(struct request_queue *q,
274                 struct nvme_command *cmd, unsigned int flags, int qid);
275 void nvme_requeue_req(struct request *req);
276 int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
277                 struct nvme_command *cmd);
278 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
279                 void *buf, unsigned bufflen);
280 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
281                 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
282                 unsigned timeout, int qid, int at_head, int flags);
283 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
284                 void __user *ubuffer, unsigned bufflen, u32 *result,
285                 unsigned timeout);
286 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
287                 void __user *ubuffer, unsigned bufflen,
288                 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
289                 u32 *result, unsigned timeout);
290 int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
291 int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
292                 struct nvme_id_ns **id);
293 int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
294 int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
295                         dma_addr_t dma_addr, u32 *result);
296 int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
297                         dma_addr_t dma_addr, u32 *result);
298 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
299 void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
300 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
301
302 struct sg_io_hdr;
303
304 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
305 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
306 int nvme_sg_get_version_num(int __user *ip);
307
308 #ifdef CONFIG_NVM
309 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
310 int nvme_nvm_register(struct request_queue *q, char *disk_name);
311 void nvme_nvm_unregister(struct request_queue *q, char *disk_name);
312 #else
313 static inline int nvme_nvm_register(struct request_queue *q, char *disk_name)
314 {
315         return 0;
316 }
317
318 static inline void nvme_nvm_unregister(struct request_queue *q, char *disk_name) {};
319
320 static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
321 {
322         return 0;
323 }
324 #endif /* CONFIG_NVM */
325
326 int __init nvme_core_init(void);
327 void nvme_core_exit(void);
328
329 #endif /* _NVME_H */