drivers/rtc/rtc-ds1307.c

   1 /*
   2  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
   3  *
   4  *  Copyright (C) 2005 James Chapman (ds1337 core)
   5  *  Copyright (C) 2006 David Brownell
   6  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support)
   7  *  Copyright (C) 2012 Bertrand Achard (nvram access fixes)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/bcd.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/rtc/ds1307.h>
  19 #include <linux/rtc.h>
  20 #include <linux/slab.h>
  21 #include <linux/string.h>
  22 #include <linux/hwmon.h>
  23 #include <linux/hwmon-sysfs.h>
  24 #include <linux/clk-provider.h>
  25
  26 /*
  27  * We can't determine type by probing, but if we expect pre-Linux code
  28  * to have set the chip up as a clock (turning on the oscillator and
  29  * setting the date and time), Linux can ignore the non-clock features.
  30  * That's a natural job for a factory or repair bench.
  31  */
  32 enum ds_type {
  33         ds_1307,
  34         ds_1337,
  35         ds_1338,
  36         ds_1339,
  37         ds_1340,
  38         ds_1388,
  39         ds_3231,
  40         m41t00,
  41         mcp794xx,
  42         rx_8025,
  43         last_ds_type /* always last */
  44         /* rs5c372 too?  different address... */
  45 };
  46
  47
  48 /* RTC registers don't differ much, except for the century flag */
  49 #define DS1307_REG_SECS         0x00    /* 00-59 */
  50 #       define DS1307_BIT_CH            0x80
  51 #       define DS1340_BIT_nEOSC         0x80
  52 #       define MCP794XX_BIT_ST          0x80
  53 #define DS1307_REG_MIN          0x01    /* 00-59 */
  54 #define DS1307_REG_HOUR         0x02    /* 00-23, or 1-12{am,pm} */
  55 #       define DS1307_BIT_12HR          0x40    /* in REG_HOUR */
  56 #       define DS1307_BIT_PM            0x20    /* in REG_HOUR */
  57 #       define DS1340_BIT_CENTURY_EN    0x80    /* in REG_HOUR */
  58 #       define DS1340_BIT_CENTURY       0x40    /* in REG_HOUR */
  59 #define DS1307_REG_WDAY         0x03    /* 01-07 */
  60 #       define MCP794XX_BIT_VBATEN      0x08
  61 #define DS1307_REG_MDAY         0x04    /* 01-31 */
  62 #define DS1307_REG_MONTH        0x05    /* 01-12 */
  63 #       define DS1337_BIT_CENTURY       0x80    /* in REG_MONTH */
  64 #define DS1307_REG_YEAR         0x06    /* 00-99 */
  65
  66 /*
  67  * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  68  * start at 7, and they differ a LOT. Only control and status matter for
  69  * basic RTC date and time functionality; be careful using them.
  70  */
  71 #define DS1307_REG_CONTROL      0x07            /* or ds1338 */
  72 #       define DS1307_BIT_OUT           0x80
  73 #       define DS1338_BIT_OSF           0x20
  74 #       define DS1307_BIT_SQWE          0x10
  75 #       define DS1307_BIT_RS1           0x02
  76 #       define DS1307_BIT_RS0           0x01
  77 #define DS1337_REG_CONTROL      0x0e
  78 #       define DS1337_BIT_nEOSC         0x80
  79 #       define DS1339_BIT_BBSQI         0x20
  80 #       define DS3231_BIT_BBSQW         0x40 /* same as BBSQI */
  81 #       define DS1337_BIT_RS2           0x10
  82 #       define DS1337_BIT_RS1           0x08
  83 #       define DS1337_BIT_INTCN         0x04
  84 #       define DS1337_BIT_A2IE          0x02
  85 #       define DS1337_BIT_A1IE          0x01
  86 #define DS1340_REG_CONTROL      0x07
  87 #       define DS1340_BIT_OUT           0x80
  88 #       define DS1340_BIT_FT            0x40
  89 #       define DS1340_BIT_CALIB_SIGN    0x20
  90 #       define DS1340_M_CALIBRATION     0x1f
  91 #define DS1340_REG_FLAG         0x09
  92 #       define DS1340_BIT_OSF           0x80
  93 #define DS1337_REG_STATUS       0x0f
  94 #       define DS1337_BIT_OSF           0x80
  95 #       define DS3231_BIT_EN32KHZ       0x08
  96 #       define DS1337_BIT_A2I           0x02
  97 #       define DS1337_BIT_A1I           0x01
  98 #define DS1339_REG_ALARM1_SECS  0x07
  99
 100 #define DS13XX_TRICKLE_CHARGER_MAGIC    0xa0
 101
 102 #define RX8025_REG_CTRL1        0x0e
 103 #       define RX8025_BIT_2412          0x20
 104 #define RX8025_REG_CTRL2        0x0f
 105 #       define RX8025_BIT_PON           0x10
 106 #       define RX8025_BIT_VDET          0x40
 107 #       define RX8025_BIT_XST           0x20
 108
 109
 110 struct ds1307 {
 111         u8                      offset; /* register's offset */
 112         u8                      regs[11];
 113         u16                     nvram_offset;
 114         struct bin_attribute    *nvram;
 115         enum ds_type            type;
 116         unsigned long           flags;
 117 #define HAS_NVRAM       0               /* bit 0 == sysfs file active */
 118 #define HAS_ALARM       1               /* bit 1 == irq claimed */
 119         struct i2c_client       *client;
 120         struct rtc_device       *rtc;
 121         s32 (*read_block_data)(const struct i2c_client *client, u8 command,
 122                                u8 length, u8 *values);
 123         s32 (*write_block_data)(const struct i2c_client *client, u8 command,
 124                                 u8 length, const u8 *values);
 125 #ifdef CONFIG_COMMON_CLK
 126         struct clk_hw           clks[2];
 127 #endif
 128 };
 129
 130 struct chip_desc {
 131         unsigned                alarm:1;
 132         u16                     nvram_offset;
 133         u16                     nvram_size;
 134         u16                     trickle_charger_reg;
 135         u8                      trickle_charger_setup;
 136         u8                      (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
 137 };
 138
 139 static u8 do_trickle_setup_ds1339(struct i2c_client *,
 140                                   uint32_t ohms, bool diode);
 141
 142 static struct chip_desc chips[last_ds_type] = {
 143         [ds_1307] = {
 144                 .nvram_offset   = 8,
 145                 .nvram_size     = 56,
 146         },
 147         [ds_1337] = {
 148                 .alarm          = 1,
 149         },
 150         [ds_1338] = {
 151                 .nvram_offset   = 8,
 152                 .nvram_size     = 56,
 153         },
 154         [ds_1339] = {
 155                 .alarm          = 1,
 156                 .trickle_charger_reg = 0x10,
 157                 .do_trickle_setup = &do_trickle_setup_ds1339,
 158         },
 159         [ds_1340] = {
 160                 .trickle_charger_reg = 0x08,
 161         },
 162         [ds_1388] = {
 163                 .trickle_charger_reg = 0x0a,
 164         },
 165         [ds_3231] = {
 166                 .alarm          = 1,
 167         },
 168         [mcp794xx] = {
 169                 .alarm          = 1,
 170                 /* this is battery backed SRAM */
 171                 .nvram_offset   = 0x20,
 172                 .nvram_size     = 0x40,
 173         },
 174 };
 175
 176 static const struct i2c_device_id ds1307_id[] = {
 177         { "ds1307", ds_1307 },
 178         { "ds1337", ds_1337 },
 179         { "ds1338", ds_1338 },
 180         { "ds1339", ds_1339 },
 181         { "ds1388", ds_1388 },
 182         { "ds1340", ds_1340 },
 183         { "ds3231", ds_3231 },
 184         { "m41t00", m41t00 },
 185         { "mcp7940x", mcp794xx },
 186         { "mcp7941x", mcp794xx },
 187         { "pt7c4338", ds_1307 },
 188         { "rx8025", rx_8025 },
 189         { }
 190 };
 191 MODULE_DEVICE_TABLE(i2c, ds1307_id);
 192
 193 /*----------------------------------------------------------------------*/
 194
 195 #define BLOCK_DATA_MAX_TRIES 10
 196
 197 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
 198                                        u8 command, u8 length, u8 *values)
 199 {
 200         s32 i, data;
 201
 202         for (i = 0; i < length; i++) {
 203                 data = i2c_smbus_read_byte_data(client, command + i);
 204                 if (data < 0)
 205                         return data;
 206                 values[i] = data;
 207         }
 208         return i;
 209 }
 210
 211 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
 212                                   u8 length, u8 *values)
 213 {
 214         u8 oldvalues[255];
 215         s32 ret;
 216         int tries = 0;
 217
 218         dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
 219         ret = ds1307_read_block_data_once(client, command, length, values);
 220         if (ret < 0)
 221                 return ret;
 222         do {
 223                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 224                         dev_err(&client->dev,
 225                                 "ds1307_read_block_data failed\n");
 226                         return -EIO;
 227                 }
 228                 memcpy(oldvalues, values, length);
 229                 ret = ds1307_read_block_data_once(client, command, length,
 230                                                   values);
 231                 if (ret < 0)
 232                         return ret;
 233         } while (memcmp(oldvalues, values, length));
 234         return length;
 235 }
 236
 237 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
 238                                    u8 length, const u8 *values)
 239 {
 240         u8 currvalues[255];
 241         int tries = 0;
 242
 243         dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
 244         do {
 245                 s32 i, ret;
 246
 247                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 248                         dev_err(&client->dev,
 249                                 "ds1307_write_block_data failed\n");
 250                         return -EIO;
 251                 }
 252                 for (i = 0; i < length; i++) {
 253                         ret = i2c_smbus_write_byte_data(client, command + i,
 254                                                         values[i]);
 255                         if (ret < 0)
 256                                 return ret;
 257                 }
 258                 ret = ds1307_read_block_data_once(client, command, length,
 259                                                   currvalues);
 260                 if (ret < 0)
 261                         return ret;
 262         } while (memcmp(currvalues, values, length));
 263         return length;
 264 }
 265
 266 /*----------------------------------------------------------------------*/
 267
 268 /* These RTC devices are not designed to be connected to a SMbus adapter.
 269    SMbus limits block operations length to 32 bytes, whereas it's not
 270    limited on I2C buses. As a result, accesses may exceed 32 bytes;
 271    in that case, split them into smaller blocks */
 272
 273 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
 274                                 u8 command, u8 length, const u8 *values)
 275 {
 276         u8 suboffset = 0;
 277
 278         if (length <= I2C_SMBUS_BLOCK_MAX) {
 279                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 280                                         command, length, values);
 281                 if (retval < 0)
 282                         return retval;
 283                 return length;
 284         }
 285
 286         while (suboffset < length) {
 287                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 288                                 command + suboffset,
 289                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 290                                 values + suboffset);
 291                 if (retval < 0)
 292                         return retval;
 293
 294                 suboffset += I2C_SMBUS_BLOCK_MAX;
 295         }
 296         return length;
 297 }
 298
 299 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
 300                                 u8 command, u8 length, u8 *values)
 301 {
 302         u8 suboffset = 0;
 303
 304         if (length <= I2C_SMBUS_BLOCK_MAX)
 305                 return i2c_smbus_read_i2c_block_data(client,
 306                                         command, length, values);
 307
 308         while (suboffset < length) {
 309                 s32 retval = i2c_smbus_read_i2c_block_data(client,
 310                                 command + suboffset,
 311                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 312                                 values + suboffset);
 313                 if (retval < 0)
 314                         return retval;
 315
 316                 suboffset += I2C_SMBUS_BLOCK_MAX;
 317         }
 318         return length;
 319 }
 320
 321 /*----------------------------------------------------------------------*/
 322
 323 /*
 324  * The ds1337 and ds1339 both have two alarms, but we only use the first
 325  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
 326  * signal; ds1339 chips have only one alarm signal.
 327  */
 328 static irqreturn_t ds1307_irq(int irq, void *dev_id)
 329 {
 330         struct i2c_client       *client = dev_id;
 331         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 332         struct mutex            *lock = &ds1307->rtc->ops_lock;
 333         int                     stat, control;
 334
 335         mutex_lock(lock);
 336         stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
 337         if (stat < 0)
 338                 goto out;
 339
 340         if (stat & DS1337_BIT_A1I) {
 341                 stat &= ~DS1337_BIT_A1I;
 342                 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
 343
 344                 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 345                 if (control < 0)
 346                         goto out;
 347
 348                 control &= ~DS1337_BIT_A1IE;
 349                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 350
 351                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 352         }
 353
 354 out:
 355         mutex_unlock(lock);
 356
 357         return IRQ_HANDLED;
 358 }
 359
 360 /*----------------------------------------------------------------------*/
 361
 362 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 363 {
 364         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 365         int             tmp;
 366
 367         /* read the RTC date and time registers all at once */
 368         tmp = ds1307->read_block_data(ds1307->client,
 369                 ds1307->offset, 7, ds1307->regs);
 370         if (tmp != 7) {
 371                 dev_err(dev, "%s error %d\n", "read", tmp);
 372                 return -EIO;
 373         }
 374
 375         dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
 376
 377         t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
 378         t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
 379         tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
 380         t->tm_hour = bcd2bin(tmp);
 381         t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
 382         t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
 383         tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
 384         t->tm_mon = bcd2bin(tmp) - 1;
 385
 386         /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
 387         t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
 388
 389         dev_dbg(dev, "%s secs=%d, mins=%d, "
 390                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 391                 "read", t->tm_sec, t->tm_min,
 392                 t->tm_hour, t->tm_mday,
 393                 t->tm_mon, t->tm_year, t->tm_wday);
 394
 395         /* initial clock setting can be undefined */
 396         return rtc_valid_tm(t);
 397 }
 398
 399 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
 400 {
 401         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 402         int             result;
 403         int             tmp;
 404         u8              *buf = ds1307->regs;
 405
 406         dev_dbg(dev, "%s secs=%d, mins=%d, "
 407                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 408                 "write", t->tm_sec, t->tm_min,
 409                 t->tm_hour, t->tm_mday,
 410                 t->tm_mon, t->tm_year, t->tm_wday);
 411
 412         buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
 413         buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
 414         buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
 415         buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
 416         buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
 417         buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
 418
 419         /* assume 20YY not 19YY */
 420         tmp = t->tm_year - 100;
 421         buf[DS1307_REG_YEAR] = bin2bcd(tmp);
 422
 423         switch (ds1307->type) {
 424         case ds_1337:
 425         case ds_1339:
 426         case ds_3231:
 427                 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
 428                 break;
 429         case ds_1340:
 430                 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
 431                                 | DS1340_BIT_CENTURY;
 432                 break;
 433         case mcp794xx:
 434                 /*
 435                  * these bits were cleared when preparing the date/time
 436                  * values and need to be set again before writing the
 437                  * buffer out to the device.
 438                  */
 439                 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
 440                 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
 441                 break;
 442         default:
 443                 break;
 444         }
 445
 446         dev_dbg(dev, "%s: %7ph\n", "write", buf);
 447
 448         result = ds1307->write_block_data(ds1307->client,
 449                 ds1307->offset, 7, buf);
 450         if (result < 0) {
 451                 dev_err(dev, "%s error %d\n", "write", result);
 452                 return result;
 453         }
 454         return 0;
 455 }
 456
 457 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 458 {
 459         struct i2c_client       *client = to_i2c_client(dev);
 460         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 461         int                     ret;
 462
 463         if (!test_bit(HAS_ALARM, &ds1307->flags))
 464                 return -EINVAL;
 465
 466         /* read all ALARM1, ALARM2, and status registers at once */
 467         ret = ds1307->read_block_data(client,
 468                         DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
 469         if (ret != 9) {
 470                 dev_err(dev, "%s error %d\n", "alarm read", ret);
 471                 return -EIO;
 472         }
 473
 474         dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
 475                 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
 476
 477         /*
 478          * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
 479          * and that all four fields are checked matches
 480          */
 481         t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
 482         t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
 483         t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
 484         t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
 485         t->time.tm_mon = -1;
 486         t->time.tm_year = -1;
 487         t->time.tm_wday = -1;
 488         t->time.tm_yday = -1;
 489         t->time.tm_isdst = -1;
 490
 491         /* ... and status */
 492         t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
 493         t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
 494
 495         dev_dbg(dev, "%s secs=%d, mins=%d, "
 496                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 497                 "alarm read", t->time.tm_sec, t->time.tm_min,
 498                 t->time.tm_hour, t->time.tm_mday,
 499                 t->enabled, t->pending);
 500
 501         return 0;
 502 }
 503
 504 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 505 {
 506         struct i2c_client       *client = to_i2c_client(dev);
 507         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 508         unsigned char           *buf = ds1307->regs;
 509         u8                      control, status;
 510         int                     ret;
 511
 512         if (!test_bit(HAS_ALARM, &ds1307->flags))
 513                 return -EINVAL;
 514
 515         dev_dbg(dev, "%s secs=%d, mins=%d, "
 516                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 517                 "alarm set", t->time.tm_sec, t->time.tm_min,
 518                 t->time.tm_hour, t->time.tm_mday,
 519                 t->enabled, t->pending);
 520
 521         /* read current status of both alarms and the chip */
 522         ret = ds1307->read_block_data(client,
 523                         DS1339_REG_ALARM1_SECS, 9, buf);
 524         if (ret != 9) {
 525                 dev_err(dev, "%s error %d\n", "alarm write", ret);
 526                 return -EIO;
 527         }
 528         control = ds1307->regs[7];
 529         status = ds1307->regs[8];
 530
 531         dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
 532                 &ds1307->regs[0], &ds1307->regs[4], control, status);
 533
 534         /* set ALARM1, using 24 hour and day-of-month modes */
 535         buf[0] = bin2bcd(t->time.tm_sec);
 536         buf[1] = bin2bcd(t->time.tm_min);
 537         buf[2] = bin2bcd(t->time.tm_hour);
 538         buf[3] = bin2bcd(t->time.tm_mday);
 539
 540         /* set ALARM2 to non-garbage */
 541         buf[4] = 0;
 542         buf[5] = 0;
 543         buf[6] = 0;
 544
 545         /* disable alarms */
 546         buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
 547         buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
 548
 549         ret = ds1307->write_block_data(client,
 550                         DS1339_REG_ALARM1_SECS, 9, buf);
 551         if (ret < 0) {
 552                 dev_err(dev, "can't set alarm time\n");
 553                 return ret;
 554         }
 555
 556         /* optionally enable ALARM1 */
 557         if (t->enabled) {
 558                 dev_dbg(dev, "alarm IRQ armed\n");
 559                 buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
 560                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
 561         }
 562
 563         return 0;
 564 }
 565
 566 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
 567 {
 568         struct i2c_client       *client = to_i2c_client(dev);
 569         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 570         int                     ret;
 571
 572         if (!test_bit(HAS_ALARM, &ds1307->flags))
 573                 return -ENOTTY;
 574
 575         ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 576         if (ret < 0)
 577                 return ret;
 578
 579         if (enabled)
 580                 ret |= DS1337_BIT_A1IE;
 581         else
 582                 ret &= ~DS1337_BIT_A1IE;
 583
 584         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
 585         if (ret < 0)
 586                 return ret;
 587
 588         return 0;
 589 }
 590
 591 static const struct rtc_class_ops ds13xx_rtc_ops = {
 592         .read_time      = ds1307_get_time,
 593         .set_time       = ds1307_set_time,
 594         .read_alarm     = ds1337_read_alarm,
 595         .set_alarm      = ds1337_set_alarm,
 596         .alarm_irq_enable = ds1307_alarm_irq_enable,
 597 };
 598
 599 /*----------------------------------------------------------------------*/
 600
 601 /*
 602  * Alarm support for mcp794xx devices.
 603  */
 604
 605 #define MCP794XX_REG_CONTROL            0x07
 606 #       define MCP794XX_BIT_ALM0_EN     0x10
 607 #       define MCP794XX_BIT_ALM1_EN     0x20
 608 #define MCP794XX_REG_ALARM0_BASE        0x0a
 609 #define MCP794XX_REG_ALARM0_CTRL        0x0d
 610 #define MCP794XX_REG_ALARM1_BASE        0x11
 611 #define MCP794XX_REG_ALARM1_CTRL        0x14
 612 #       define MCP794XX_BIT_ALMX_IF     (1 << 3)
 613 #       define MCP794XX_BIT_ALMX_C0     (1 << 4)
 614 #       define MCP794XX_BIT_ALMX_C1     (1 << 5)
 615 #       define MCP794XX_BIT_ALMX_C2     (1 << 6)
 616 #       define MCP794XX_BIT_ALMX_POL    (1 << 7)
 617 #       define MCP794XX_MSK_ALMX_MATCH  (MCP794XX_BIT_ALMX_C0 | \
 618                                          MCP794XX_BIT_ALMX_C1 | \
 619                                          MCP794XX_BIT_ALMX_C2)
 620
 621 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
 622 {
 623         struct i2c_client       *client = dev_id;
 624         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 625         struct mutex            *lock = &ds1307->rtc->ops_lock;
 626         int reg, ret;
 627
 628         mutex_lock(lock);
 629
 630         /* Check and clear alarm 0 interrupt flag. */
 631         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
 632         if (reg < 0)
 633                 goto out;
 634         if (!(reg & MCP794XX_BIT_ALMX_IF))
 635                 goto out;
 636         reg &= ~MCP794XX_BIT_ALMX_IF;
 637         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
 638         if (ret < 0)
 639                 goto out;
 640
 641         /* Disable alarm 0. */
 642         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 643         if (reg < 0)
 644                 goto out;
 645         reg &= ~MCP794XX_BIT_ALM0_EN;
 646         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 647         if (ret < 0)
 648                 goto out;
 649
 650         rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 651
 652 out:
 653         mutex_unlock(lock);
 654
 655         return IRQ_HANDLED;
 656 }
 657
 658 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 659 {
 660         struct i2c_client *client = to_i2c_client(dev);
 661         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 662         u8 *regs = ds1307->regs;
 663         int ret;
 664
 665         if (!test_bit(HAS_ALARM, &ds1307->flags))
 666                 return -EINVAL;
 667
 668         /* Read control and alarm 0 registers. */
 669         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 670         if (ret < 0)
 671                 return ret;
 672
 673         t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
 674
 675         /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
 676         t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
 677         t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
 678         t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
 679         t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
 680         t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
 681         t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
 682         t->time.tm_year = -1;
 683         t->time.tm_yday = -1;
 684         t->time.tm_isdst = -1;
 685
 686         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 687                 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
 688                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 689                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
 690                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
 691                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
 692                 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
 693
 694         return 0;
 695 }
 696
 697 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 698 {
 699         struct i2c_client *client = to_i2c_client(dev);
 700         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 701         unsigned char *regs = ds1307->regs;
 702         int ret;
 703
 704         if (!test_bit(HAS_ALARM, &ds1307->flags))
 705                 return -EINVAL;
 706
 707         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 708                 "enabled=%d pending=%d\n", __func__,
 709                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 710                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
 711                 t->enabled, t->pending);
 712
 713         /* Read control and alarm 0 registers. */
 714         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 715         if (ret < 0)
 716                 return ret;
 717
 718         /* Set alarm 0, using 24-hour and day-of-month modes. */
 719         regs[3] = bin2bcd(t->time.tm_sec);
 720         regs[4] = bin2bcd(t->time.tm_min);
 721         regs[5] = bin2bcd(t->time.tm_hour);
 722         regs[6] = bin2bcd(t->time.tm_wday + 1);
 723         regs[7] = bin2bcd(t->time.tm_mday);
 724         regs[8] = bin2bcd(t->time.tm_mon + 1);
 725
 726         /* Clear the alarm 0 interrupt flag. */
 727         regs[6] &= ~MCP794XX_BIT_ALMX_IF;
 728         /* Set alarm match: second, minute, hour, day, date, month. */
 729         regs[6] |= MCP794XX_MSK_ALMX_MATCH;
 730         /* Disable interrupt. We will not enable until completely programmed */
 731         regs[0] &= ~MCP794XX_BIT_ALM0_EN;
 732
 733         ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 734         if (ret < 0)
 735                 return ret;
 736
 737         if (!t->enabled)
 738                 return 0;
 739         regs[0] |= MCP794XX_BIT_ALM0_EN;
 740         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
 741 }
 742
 743 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
 744 {
 745         struct i2c_client *client = to_i2c_client(dev);
 746         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 747         int reg;
 748
 749         if (!test_bit(HAS_ALARM, &ds1307->flags))
 750                 return -EINVAL;
 751
 752         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 753         if (reg < 0)
 754                 return reg;
 755
 756         if (enabled)
 757                 reg |= MCP794XX_BIT_ALM0_EN;
 758         else
 759                 reg &= ~MCP794XX_BIT_ALM0_EN;
 760
 761         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 762 }
 763
 764 static const struct rtc_class_ops mcp794xx_rtc_ops = {
 765         .read_time      = ds1307_get_time,
 766         .set_time       = ds1307_set_time,
 767         .read_alarm     = mcp794xx_read_alarm,
 768         .set_alarm      = mcp794xx_set_alarm,
 769         .alarm_irq_enable = mcp794xx_alarm_irq_enable,
 770 };
 771
 772 /*----------------------------------------------------------------------*/
 773
 774 static ssize_t
 775 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
 776                 struct bin_attribute *attr,
 777                 char *buf, loff_t off, size_t count)
 778 {
 779         struct i2c_client       *client;
 780         struct ds1307           *ds1307;
 781         int                     result;
 782
 783         client = kobj_to_i2c_client(kobj);
 784         ds1307 = i2c_get_clientdata(client);
 785
 786         result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
 787                                                                 count, buf);
 788         if (result < 0)
 789                 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
 790         return result;
 791 }
 792
 793 static ssize_t
 794 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
 795                 struct bin_attribute *attr,
 796                 char *buf, loff_t off, size_t count)
 797 {
 798         struct i2c_client       *client;
 799         struct ds1307           *ds1307;
 800         int                     result;
 801
 802         client = kobj_to_i2c_client(kobj);
 803         ds1307 = i2c_get_clientdata(client);
 804
 805         result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
 806                                                                 count, buf);
 807         if (result < 0) {
 808                 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
 809                 return result;
 810         }
 811         return count;
 812 }
 813
 814
 815 /*----------------------------------------------------------------------*/
 816
 817 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
 818                                   uint32_t ohms, bool diode)
 819 {
 820         u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
 821                 DS1307_TRICKLE_CHARGER_NO_DIODE;
 822
 823         switch (ohms) {
 824         case 250:
 825                 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
 826                 break;
 827         case 2000:
 828                 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
 829                 break;
 830         case 4000:
 831                 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
 832                 break;
 833         default:
 834                 dev_warn(&client->dev,
 835                          "Unsupported ohm value %u in dt\n", ohms);
 836                 return 0;
 837         }
 838         return setup;
 839 }
 840
 841 static void ds1307_trickle_of_init(struct i2c_client *client,
 842                                    struct chip_desc *chip)
 843 {
 844         uint32_t ohms = 0;
 845         bool diode = true;
 846
 847         if (!chip->do_trickle_setup)
 848                 goto out;
 849         if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
 850                 goto out;
 851         if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
 852                 diode = false;
 853         chip->trickle_charger_setup = chip->do_trickle_setup(client,
 854                                                              ohms, diode);
 855 out:
 856         return;
 857 }
 858
 859 /*----------------------------------------------------------------------*/
 860
 861 #ifdef CONFIG_RTC_DRV_DS1307_HWMON
 862
 863 /*
 864  * Temperature sensor support for ds3231 devices.
 865  */
 866
 867 #define DS3231_REG_TEMPERATURE  0x11
 868
 869 /*
 870  * A user-initiated temperature conversion is not started by this function,
 871  * so the temperature is updated once every 64 seconds.
 872  */
 873 static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
 874 {
 875         struct ds1307 *ds1307 = dev_get_drvdata(dev);
 876         u8 temp_buf[2];
 877         s16 temp;
 878         int ret;
 879
 880         ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
 881                                         sizeof(temp_buf), temp_buf);
 882         if (ret < 0)
 883                 return ret;
 884         if (ret != sizeof(temp_buf))
 885                 return -EIO;
 886
 887         /*
 888          * Temperature is represented as a 10-bit code with a resolution of
 889          * 0.25 degree celsius and encoded in two's complement format.
 890          */
 891         temp = (temp_buf[0] << 8) | temp_buf[1];
 892         temp >>= 6;
 893         *mC = temp * 250;
 894
 895         return 0;
 896 }
 897
 898 static ssize_t ds3231_hwmon_show_temp(struct device *dev,
 899                                 struct device_attribute *attr, char *buf)
 900 {
 901         int ret;
 902         s32 temp;
 903
 904         ret = ds3231_hwmon_read_temp(dev, &temp);
 905         if (ret)
 906                 return ret;
 907
 908         return sprintf(buf, "%d\n", temp);
 909 }
 910 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
 911                         NULL, 0);
 912
 913 static struct attribute *ds3231_hwmon_attrs[] = {
 914         &sensor_dev_attr_temp1_input.dev_attr.attr,
 915         NULL,
 916 };
 917 ATTRIBUTE_GROUPS(ds3231_hwmon);
 918
 919 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 920 {
 921         struct device *dev;
 922
 923         if (ds1307->type != ds_3231)
 924                 return;
 925
 926         dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
 927                                                 ds1307->client->name,
 928                                                 ds1307, ds3231_hwmon_groups);
 929         if (IS_ERR(dev)) {
 930                 dev_warn(&ds1307->client->dev,
 931                         "unable to register hwmon device %ld\n", PTR_ERR(dev));
 932         }
 933 }
 934
 935 #else
 936
 937 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 938 {
 939 }
 940
 941 #endif /* CONFIG_RTC_DRV_DS1307_HWMON */
 942
 943 /*----------------------------------------------------------------------*/
 944
 945 /*
 946  * Square-wave output support for DS3231
 947  * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
 948  */
 949 #ifdef CONFIG_COMMON_CLK
 950
 951 enum {
 952         DS3231_CLK_SQW = 0,
 953         DS3231_CLK_32KHZ,
 954 };
 955
 956 #define clk_sqw_to_ds1307(clk)  \
 957         container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
 958 #define clk_32khz_to_ds1307(clk)        \
 959         container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
 960
 961 static int ds3231_clk_sqw_rates[] = {
 962         1,
 963         1024,
 964         4096,
 965         8192,
 966 };
 967
 968 static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
 969 {
 970         struct i2c_client *client = ds1307->client;
 971         struct mutex *lock = &ds1307->rtc->ops_lock;
 972         int control;
 973         int ret;
 974
 975         mutex_lock(lock);
 976
 977         control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 978         if (control < 0) {
 979                 ret = control;
 980                 goto out;
 981         }
 982
 983         control &= ~mask;
 984         control |= value;
 985
 986         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 987 out:
 988         mutex_unlock(lock);
 989
 990         return ret;
 991 }
 992
 993 static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
 994                                                 unsigned long parent_rate)
 995 {
 996         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
 997         int control;
 998         int rate_sel = 0;
 999
1000         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1001         if (control < 0)
1002                 return control;
1003         if (control & DS1337_BIT_RS1)
1004                 rate_sel += 1;
1005         if (control & DS1337_BIT_RS2)
1006                 rate_sel += 2;
1007
1008         return ds3231_clk_sqw_rates[rate_sel];
1009 }
1010
1011 static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1012                                         unsigned long *prate)
1013 {
1014         int i;
1015
1016         for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1017                 if (ds3231_clk_sqw_rates[i] <= rate)
1018                         return ds3231_clk_sqw_rates[i];
1019         }
1020
1021         return 0;
1022 }
1023
1024 static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1025                                         unsigned long parent_rate)
1026 {
1027         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1028         int control = 0;
1029         int rate_sel;
1030
1031         for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1032                         rate_sel++) {
1033                 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1034                         break;
1035         }
1036
1037         if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1038                 return -EINVAL;
1039
1040         if (rate_sel & 1)
1041                 control |= DS1337_BIT_RS1;
1042         if (rate_sel & 2)
1043                 control |= DS1337_BIT_RS2;
1044
1045         return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1046                                 control);
1047 }
1048
1049 static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1050 {
1051         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1052
1053         return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1054 }
1055
1056 static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1057 {
1058         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1059
1060         ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1061 }
1062
1063 static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1064 {
1065         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1066         int control;
1067
1068         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1069         if (control < 0)
1070                 return control;
1071
1072         return !(control & DS1337_BIT_INTCN);
1073 }
1074
1075 static const struct clk_ops ds3231_clk_sqw_ops = {
1076         .prepare = ds3231_clk_sqw_prepare,
1077         .unprepare = ds3231_clk_sqw_unprepare,
1078         .is_prepared = ds3231_clk_sqw_is_prepared,
1079         .recalc_rate = ds3231_clk_sqw_recalc_rate,
1080         .round_rate = ds3231_clk_sqw_round_rate,
1081         .set_rate = ds3231_clk_sqw_set_rate,
1082 };
1083
1084 static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1085                                                 unsigned long parent_rate)
1086 {
1087         return 32768;
1088 }
1089
1090 static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1091 {
1092         struct i2c_client *client = ds1307->client;
1093         struct mutex *lock = &ds1307->rtc->ops_lock;
1094         int status;
1095         int ret;
1096
1097         mutex_lock(lock);
1098
1099         status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1100         if (status < 0) {
1101                 ret = status;
1102                 goto out;
1103         }
1104
1105         if (enable)
1106                 status |= DS3231_BIT_EN32KHZ;
1107         else
1108                 status &= ~DS3231_BIT_EN32KHZ;
1109
1110         ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1111 out:
1112         mutex_unlock(lock);
1113
1114         return ret;
1115 }
1116
1117 static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1118 {
1119         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1120
1121         return ds3231_clk_32khz_control(ds1307, true);
1122 }
1123
1124 static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1125 {
1126         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1127
1128         ds3231_clk_32khz_control(ds1307, false);
1129 }
1130
1131 static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1132 {
1133         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1134         int status;
1135
1136         status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1137         if (status < 0)
1138                 return status;
1139
1140         return !!(status & DS3231_BIT_EN32KHZ);
1141 }
1142
1143 static const struct clk_ops ds3231_clk_32khz_ops = {
1144         .prepare = ds3231_clk_32khz_prepare,
1145         .unprepare = ds3231_clk_32khz_unprepare,
1146         .is_prepared = ds3231_clk_32khz_is_prepared,
1147         .recalc_rate = ds3231_clk_32khz_recalc_rate,
1148 };
1149
1150 static struct clk_init_data ds3231_clks_init[] = {
1151         [DS3231_CLK_SQW] = {
1152                 .name = "ds3231_clk_sqw",
1153                 .ops = &ds3231_clk_sqw_ops,
1154         },
1155         [DS3231_CLK_32KHZ] = {
1156                 .name = "ds3231_clk_32khz",
1157                 .ops = &ds3231_clk_32khz_ops,
1158         },
1159 };
1160
1161 static int ds3231_clks_register(struct ds1307 *ds1307)
1162 {
1163         struct i2c_client *client = ds1307->client;
1164         struct device_node *node = client->dev.of_node;
1165         struct clk_onecell_data *onecell;
1166         int i;
1167
1168         onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1169         if (!onecell)
1170                 return -ENOMEM;
1171
1172         onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1173         onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1174                                         sizeof(onecell->clks[0]), GFP_KERNEL);
1175         if (!onecell->clks)
1176                 return -ENOMEM;
1177
1178         for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1179                 struct clk_init_data init = ds3231_clks_init[i];
1180
1181                 /*
1182                  * Interrupt signal due to alarm conditions and square-wave
1183                  * output share same pin, so don't initialize both.
1184                  */
1185                 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1186                         continue;
1187
1188                 /* optional override of the clockname */
1189                 of_property_read_string_index(node, "clock-output-names", i,
1190                                                 &init.name);
1191                 ds1307->clks[i].init = &init;
1192
1193                 onecell->clks[i] = devm_clk_register(&client->dev,
1194                                                         &ds1307->clks[i]);
1195                 if (IS_ERR(onecell->clks[i]))
1196                         return PTR_ERR(onecell->clks[i]);
1197         }
1198
1199         if (!node)
1200                 return 0;
1201
1202         of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1203
1204         return 0;
1205 }
1206
1207 static void ds1307_clks_register(struct ds1307 *ds1307)
1208 {
1209         int ret;
1210
1211         if (ds1307->type != ds_3231)
1212                 return;
1213
1214         ret = ds3231_clks_register(ds1307);
1215         if (ret) {
1216                 dev_warn(&ds1307->client->dev,
1217                         "unable to register clock device %d\n", ret);
1218         }
1219 }
1220
1221 #else
1222
1223 static void ds1307_clks_register(struct ds1307 *ds1307)
1224 {
1225 }
1226
1227 #endif /* CONFIG_COMMON_CLK */
1228
1229 static int ds1307_probe(struct i2c_client *client,
1230                         const struct i2c_device_id *id)
1231 {
1232         struct ds1307           *ds1307;
1233         int                     err = -ENODEV;
1234         int                     tmp;
1235         struct chip_desc        *chip = &chips[id->driver_data];
1236         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
1237         bool                    want_irq = false;
1238         bool                    ds1307_can_wakeup_device = false;
1239         unsigned char           *buf;
1240         struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
1241         irq_handler_t   irq_handler = ds1307_irq;
1242
1243         static const int        bbsqi_bitpos[] = {
1244                 [ds_1337] = 0,
1245                 [ds_1339] = DS1339_BIT_BBSQI,
1246                 [ds_3231] = DS3231_BIT_BBSQW,
1247         };
1248         const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
1249
1250         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
1251             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
1252                 return -EIO;
1253
1254         ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
1255         if (!ds1307)
1256                 return -ENOMEM;
1257
1258         i2c_set_clientdata(client, ds1307);
1259
1260         ds1307->client  = client;
1261         ds1307->type    = id->driver_data;
1262
1263         if (!pdata && client->dev.of_node)
1264                 ds1307_trickle_of_init(client, chip);
1265         else if (pdata && pdata->trickle_charger_setup)
1266                 chip->trickle_charger_setup = pdata->trickle_charger_setup;
1267
1268         if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
1269                 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
1270                     DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
1271                     chip->trickle_charger_reg);
1272                 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
1273                     DS13XX_TRICKLE_CHARGER_MAGIC |
1274                     chip->trickle_charger_setup);
1275         }
1276
1277         buf = ds1307->regs;
1278         if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1279                 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
1280                 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
1281         } else {
1282                 ds1307->read_block_data = ds1307_read_block_data;
1283                 ds1307->write_block_data = ds1307_write_block_data;
1284         }
1285
1286 #ifdef CONFIG_OF
1287 /*
1288  * For devices with no IRQ directly connected to the SoC, the RTC chip
1289  * can be forced as a wakeup source by stating that explicitly in
1290  * the device's .dts file using the "wakeup-source" boolean property.
1291  * If the "wakeup-source" property is set, don't request an IRQ.
1292  * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1293  * if supported by the RTC.
1294  */
1295         if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1296                 ds1307_can_wakeup_device = true;
1297         }
1298 #endif
1299
1300         switch (ds1307->type) {
1301         case ds_1337:
1302         case ds_1339:
1303         case ds_3231:
1304                 /* get registers that the "rtc" read below won't read... */
1305                 tmp = ds1307->read_block_data(ds1307->client,
1306                                 DS1337_REG_CONTROL, 2, buf);
1307                 if (tmp != 2) {
1308                         dev_dbg(&client->dev, "read error %d\n", tmp);
1309                         err = -EIO;
1310                         goto exit;
1311                 }
1312
1313                 /* oscillator off?  turn it on, so clock can tick. */
1314                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
1315                         ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
1316
1317                 /*
1318                  * Using IRQ or defined as wakeup-source?
1319                  * Disable the square wave and both alarms.
1320                  * For some variants, be sure alarms can trigger when we're
1321                  * running on Vbackup (BBSQI/BBSQW)
1322                  */
1323                 if (chip->alarm && (ds1307->client->irq > 0 ||
1324                                                 ds1307_can_wakeup_device)) {
1325                         ds1307->regs[0] |= DS1337_BIT_INTCN
1326                                         | bbsqi_bitpos[ds1307->type];
1327                         ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
1328
1329                         want_irq = true;
1330                 }
1331
1332                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
1333                                                         ds1307->regs[0]);
1334
1335                 /* oscillator fault?  clear flag, and warn */
1336                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
1337                         i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
1338                                 ds1307->regs[1] & ~DS1337_BIT_OSF);
1339                         dev_warn(&client->dev, "SET TIME!\n");
1340                 }
1341                 break;
1342
1343         case rx_8025:
1344                 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1345                                 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1346                 if (tmp != 2) {
1347                         dev_dbg(&client->dev, "read error %d\n", tmp);
1348                         err = -EIO;
1349                         goto exit;
1350                 }
1351
1352                 /* oscillator off?  turn it on, so clock can tick. */
1353                 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
1354                         ds1307->regs[1] |= RX8025_BIT_XST;
1355                         i2c_smbus_write_byte_data(client,
1356                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1357                                                   ds1307->regs[1]);
1358                         dev_warn(&client->dev,
1359                                  "oscillator stop detected - SET TIME!\n");
1360                 }
1361
1362                 if (ds1307->regs[1] & RX8025_BIT_PON) {
1363                         ds1307->regs[1] &= ~RX8025_BIT_PON;
1364                         i2c_smbus_write_byte_data(client,
1365                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1366                                                   ds1307->regs[1]);
1367                         dev_warn(&client->dev, "power-on detected\n");
1368                 }
1369
1370                 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1371                         ds1307->regs[1] &= ~RX8025_BIT_VDET;
1372                         i2c_smbus_write_byte_data(client,
1373                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1374                                                   ds1307->regs[1]);
1375                         dev_warn(&client->dev, "voltage drop detected\n");
1376                 }
1377
1378                 /* make sure we are running in 24hour mode */
1379                 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1380                         u8 hour;
1381
1382                         /* switch to 24 hour mode */
1383                         i2c_smbus_write_byte_data(client,
1384                                                   RX8025_REG_CTRL1 << 4 | 0x08,
1385                                                   ds1307->regs[0] |
1386                                                   RX8025_BIT_2412);
1387
1388                         tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1389                                         RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1390                         if (tmp != 2) {
1391                                 dev_dbg(&client->dev, "read error %d\n", tmp);
1392                                 err = -EIO;
1393                                 goto exit;
1394                         }
1395
1396                         /* correct hour */
1397                         hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1398                         if (hour == 12)
1399                                 hour = 0;
1400                         if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1401                                 hour += 12;
1402
1403                         i2c_smbus_write_byte_data(client,
1404                                                   DS1307_REG_HOUR << 4 | 0x08,
1405                                                   hour);
1406                 }
1407                 break;
1408         case ds_1388:
1409                 ds1307->offset = 1; /* Seconds starts at 1 */
1410                 break;
1411         case mcp794xx:
1412                 rtc_ops = &mcp794xx_rtc_ops;
1413                 if (ds1307->client->irq > 0 && chip->alarm) {
1414                         irq_handler = mcp794xx_irq;
1415                         want_irq = true;
1416                 }
1417                 break;
1418         default:
1419                 break;
1420         }
1421
1422 read_rtc:
1423         /* read RTC registers */
1424         tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1425         if (tmp != 8) {
1426                 dev_dbg(&client->dev, "read error %d\n", tmp);
1427                 err = -EIO;
1428                 goto exit;
1429         }
1430
1431         /*
1432          * minimal sanity checking; some chips (like DS1340) don't
1433          * specify the extra bits as must-be-zero, but there are
1434          * still a few values that are clearly out-of-range.
1435          */
1436         tmp = ds1307->regs[DS1307_REG_SECS];
1437         switch (ds1307->type) {
1438         case ds_1307:
1439         case m41t00:
1440                 /* clock halted?  turn it on, so clock can tick. */
1441                 if (tmp & DS1307_BIT_CH) {
1442                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1443                         dev_warn(&client->dev, "SET TIME!\n");
1444                         goto read_rtc;
1445                 }
1446                 break;
1447         case ds_1338:
1448                 /* clock halted?  turn it on, so clock can tick. */
1449                 if (tmp & DS1307_BIT_CH)
1450                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1451
1452                 /* oscillator fault?  clear flag, and warn */
1453                 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1454                         i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1455                                         ds1307->regs[DS1307_REG_CONTROL]
1456                                         & ~DS1338_BIT_OSF);
1457                         dev_warn(&client->dev, "SET TIME!\n");
1458                         goto read_rtc;
1459                 }
1460                 break;
1461         case ds_1340:
1462                 /* clock halted?  turn it on, so clock can tick. */
1463                 if (tmp & DS1340_BIT_nEOSC)
1464                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1465
1466                 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1467                 if (tmp < 0) {
1468                         dev_dbg(&client->dev, "read error %d\n", tmp);
1469                         err = -EIO;
1470                         goto exit;
1471                 }
1472
1473                 /* oscillator fault?  clear flag, and warn */
1474                 if (tmp & DS1340_BIT_OSF) {
1475                         i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1476                         dev_warn(&client->dev, "SET TIME!\n");
1477                 }
1478                 break;
1479         case mcp794xx:
1480                 /* make sure that the backup battery is enabled */
1481                 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1482                         i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1483                                         ds1307->regs[DS1307_REG_WDAY]
1484                                         | MCP794XX_BIT_VBATEN);
1485                 }
1486
1487                 /* clock halted?  turn it on, so clock can tick. */
1488                 if (!(tmp & MCP794XX_BIT_ST)) {
1489                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1490                                         MCP794XX_BIT_ST);
1491                         dev_warn(&client->dev, "SET TIME!\n");
1492                         goto read_rtc;
1493                 }
1494
1495                 break;
1496         default:
1497                 break;
1498         }
1499
1500         tmp = ds1307->regs[DS1307_REG_HOUR];
1501         switch (ds1307->type) {
1502         case ds_1340:
1503         case m41t00:
1504                 /*
1505                  * NOTE: ignores century bits; fix before deploying
1506                  * systems that will run through year 2100.
1507                  */
1508                 break;
1509         case rx_8025:
1510                 break;
1511         default:
1512                 if (!(tmp & DS1307_BIT_12HR))
1513                         break;
1514
1515                 /*
1516                  * Be sure we're in 24 hour mode.  Multi-master systems
1517                  * take note...
1518                  */
1519                 tmp = bcd2bin(tmp & 0x1f);
1520                 if (tmp == 12)
1521                         tmp = 0;
1522                 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1523                         tmp += 12;
1524                 i2c_smbus_write_byte_data(client,
1525                                 ds1307->offset + DS1307_REG_HOUR,
1526                                 bin2bcd(tmp));
1527         }
1528
1529         if (want_irq) {
1530                 device_set_wakeup_capable(&client->dev, true);
1531                 set_bit(HAS_ALARM, &ds1307->flags);
1532         }
1533         ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1534                                 rtc_ops, THIS_MODULE);
1535         if (IS_ERR(ds1307->rtc)) {
1536                 return PTR_ERR(ds1307->rtc);
1537         }
1538
1539         if (ds1307_can_wakeup_device && ds1307->client->irq <= 0) {
1540                 /* Disable request for an IRQ */
1541                 want_irq = false;
1542                 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1543                 /* We cannot support UIE mode if we do not have an IRQ line */
1544                 ds1307->rtc->uie_unsupported = 1;
1545         }
1546
1547         if (want_irq) {
1548                 err = devm_request_threaded_irq(&client->dev,
1549                                                 client->irq, NULL, irq_handler,
1550                                                 IRQF_SHARED | IRQF_ONESHOT,
1551                                                 ds1307->rtc->name, client);
1552                 if (err) {
1553                         client->irq = 0;
1554                         device_set_wakeup_capable(&client->dev, false);
1555                         clear_bit(HAS_ALARM, &ds1307->flags);
1556                         dev_err(&client->dev, "unable to request IRQ!\n");
1557                 } else
1558                         dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1559         }
1560
1561         if (chip->nvram_size) {
1562
1563                 ds1307->nvram = devm_kzalloc(&client->dev,
1564                                         sizeof(struct bin_attribute),
1565                                         GFP_KERNEL);
1566                 if (!ds1307->nvram) {
1567                         dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1568                 } else {
1569
1570                         ds1307->nvram->attr.name = "nvram";
1571                         ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1572
1573                         sysfs_bin_attr_init(ds1307->nvram);
1574
1575                         ds1307->nvram->read = ds1307_nvram_read;
1576                         ds1307->nvram->write = ds1307_nvram_write;
1577                         ds1307->nvram->size = chip->nvram_size;
1578                         ds1307->nvram_offset = chip->nvram_offset;
1579
1580                         err = sysfs_create_bin_file(&client->dev.kobj,
1581                                                     ds1307->nvram);
1582                         if (err) {
1583                                 dev_err(&client->dev,
1584                                         "unable to create sysfs file: %s\n",
1585                                         ds1307->nvram->attr.name);
1586                         } else {
1587                                 set_bit(HAS_NVRAM, &ds1307->flags);
1588                                 dev_info(&client->dev, "%zu bytes nvram\n",
1589                                          ds1307->nvram->size);
1590                         }
1591                 }
1592         }
1593
1594         ds1307_hwmon_register(ds1307);
1595         ds1307_clks_register(ds1307);
1596
1597         return 0;
1598
1599 exit:
1600         return err;
1601 }
1602
1603 static int ds1307_remove(struct i2c_client *client)
1604 {
1605         struct ds1307 *ds1307 = i2c_get_clientdata(client);
1606
1607         if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1608                 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1609
1610         return 0;
1611 }
1612
1613 static struct i2c_driver ds1307_driver = {
1614         .driver = {
1615                 .name   = "rtc-ds1307",
1616         },
1617         .probe          = ds1307_probe,
1618         .remove         = ds1307_remove,
1619         .id_table       = ds1307_id,
1620 };
1621
1622 module_i2c_driver(ds1307_driver);
1623
1624 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1625 MODULE_LICENSE("GPL");