drivers/rtc/rtc-ds1307.c

   1 /*
   2  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
   3  *
   4  *  Copyright (C) 2005 James Chapman (ds1337 core)
   5  *  Copyright (C) 2006 David Brownell
   6  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support)
   7  *  Copyright (C) 2012 Bertrand Achard (nvram access fixes)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/bcd.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/rtc/ds1307.h>
  19 #include <linux/rtc.h>
  20 #include <linux/slab.h>
  21 #include <linux/string.h>
  22 #include <linux/hwmon.h>
  23 #include <linux/hwmon-sysfs.h>
  24 #include <linux/clk-provider.h>
  25
  26 /*
  27  * We can't determine type by probing, but if we expect pre-Linux code
  28  * to have set the chip up as a clock (turning on the oscillator and
  29  * setting the date and time), Linux can ignore the non-clock features.
  30  * That's a natural job for a factory or repair bench.
  31  */
  32 enum ds_type {
  33         ds_1307,
  34         ds_1337,
  35         ds_1338,
  36         ds_1339,
  37         ds_1340,
  38         ds_1388,
  39         ds_3231,
  40         m41t00,
  41         mcp794xx,
  42         rx_8025,
  43         last_ds_type /* always last */
  44         /* rs5c372 too?  different address... */
  45 };
  46
  47
  48 /* RTC registers don't differ much, except for the century flag */
  49 #define DS1307_REG_SECS         0x00    /* 00-59 */
  50 #       define DS1307_BIT_CH            0x80
  51 #       define DS1340_BIT_nEOSC         0x80
  52 #       define MCP794XX_BIT_ST          0x80
  53 #define DS1307_REG_MIN          0x01    /* 00-59 */
  54 #define DS1307_REG_HOUR         0x02    /* 00-23, or 1-12{am,pm} */
  55 #       define DS1307_BIT_12HR          0x40    /* in REG_HOUR */
  56 #       define DS1307_BIT_PM            0x20    /* in REG_HOUR */
  57 #       define DS1340_BIT_CENTURY_EN    0x80    /* in REG_HOUR */
  58 #       define DS1340_BIT_CENTURY       0x40    /* in REG_HOUR */
  59 #define DS1307_REG_WDAY         0x03    /* 01-07 */
  60 #       define MCP794XX_BIT_VBATEN      0x08
  61 #define DS1307_REG_MDAY         0x04    /* 01-31 */
  62 #define DS1307_REG_MONTH        0x05    /* 01-12 */
  63 #       define DS1337_BIT_CENTURY       0x80    /* in REG_MONTH */
  64 #define DS1307_REG_YEAR         0x06    /* 00-99 */
  65
  66 /*
  67  * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  68  * start at 7, and they differ a LOT. Only control and status matter for
  69  * basic RTC date and time functionality; be careful using them.
  70  */
  71 #define DS1307_REG_CONTROL      0x07            /* or ds1338 */
  72 #       define DS1307_BIT_OUT           0x80
  73 #       define DS1338_BIT_OSF           0x20
  74 #       define DS1307_BIT_SQWE          0x10
  75 #       define DS1307_BIT_RS1           0x02
  76 #       define DS1307_BIT_RS0           0x01
  77 #define DS1337_REG_CONTROL      0x0e
  78 #       define DS1337_BIT_nEOSC         0x80
  79 #       define DS1339_BIT_BBSQI         0x20
  80 #       define DS3231_BIT_BBSQW         0x40 /* same as BBSQI */
  81 #       define DS1337_BIT_RS2           0x10
  82 #       define DS1337_BIT_RS1           0x08
  83 #       define DS1337_BIT_INTCN         0x04
  84 #       define DS1337_BIT_A2IE          0x02
  85 #       define DS1337_BIT_A1IE          0x01
  86 #define DS1340_REG_CONTROL      0x07
  87 #       define DS1340_BIT_OUT           0x80
  88 #       define DS1340_BIT_FT            0x40
  89 #       define DS1340_BIT_CALIB_SIGN    0x20
  90 #       define DS1340_M_CALIBRATION     0x1f
  91 #define DS1340_REG_FLAG         0x09
  92 #       define DS1340_BIT_OSF           0x80
  93 #define DS1337_REG_STATUS       0x0f
  94 #       define DS1337_BIT_OSF           0x80
  95 #       define DS3231_BIT_EN32KHZ       0x08
  96 #       define DS1337_BIT_A2I           0x02
  97 #       define DS1337_BIT_A1I           0x01
  98 #define DS1339_REG_ALARM1_SECS  0x07
  99
 100 #define DS13XX_TRICKLE_CHARGER_MAGIC    0xa0
 101
 102 #define RX8025_REG_CTRL1        0x0e
 103 #       define RX8025_BIT_2412          0x20
 104 #define RX8025_REG_CTRL2        0x0f
 105 #       define RX8025_BIT_PON           0x10
 106 #       define RX8025_BIT_VDET          0x40
 107 #       define RX8025_BIT_XST           0x20
 108
 109
 110 struct ds1307 {
 111         u8                      offset; /* register's offset */
 112         u8                      regs[11];
 113         u16                     nvram_offset;
 114         struct bin_attribute    *nvram;
 115         enum ds_type            type;
 116         unsigned long           flags;
 117 #define HAS_NVRAM       0               /* bit 0 == sysfs file active */
 118 #define HAS_ALARM       1               /* bit 1 == irq claimed */
 119         struct i2c_client       *client;
 120         struct rtc_device       *rtc;
 121         s32 (*read_block_data)(const struct i2c_client *client, u8 command,
 122                                u8 length, u8 *values);
 123         s32 (*write_block_data)(const struct i2c_client *client, u8 command,
 124                                 u8 length, const u8 *values);
 125 #ifdef CONFIG_COMMON_CLK
 126         struct clk_hw           clks[2];
 127 #endif
 128 };
 129
 130 struct chip_desc {
 131         unsigned                alarm:1;
 132         u16                     nvram_offset;
 133         u16                     nvram_size;
 134         u16                     trickle_charger_reg;
 135         u8                      trickle_charger_setup;
 136         u8                      (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
 137 };
 138
 139 static u8 do_trickle_setup_ds1339(struct i2c_client *,
 140                                   uint32_t ohms, bool diode);
 141
 142 static struct chip_desc chips[last_ds_type] = {
 143         [ds_1307] = {
 144                 .nvram_offset   = 8,
 145                 .nvram_size     = 56,
 146         },
 147         [ds_1337] = {
 148                 .alarm          = 1,
 149         },
 150         [ds_1338] = {
 151                 .nvram_offset   = 8,
 152                 .nvram_size     = 56,
 153         },
 154         [ds_1339] = {
 155                 .alarm          = 1,
 156                 .trickle_charger_reg = 0x10,
 157                 .do_trickle_setup = &do_trickle_setup_ds1339,
 158         },
 159         [ds_1340] = {
 160                 .trickle_charger_reg = 0x08,
 161         },
 162         [ds_1388] = {
 163                 .trickle_charger_reg = 0x0a,
 164         },
 165         [ds_3231] = {
 166                 .alarm          = 1,
 167         },
 168         [mcp794xx] = {
 169                 .alarm          = 1,
 170                 /* this is battery backed SRAM */
 171                 .nvram_offset   = 0x20,
 172                 .nvram_size     = 0x40,
 173         },
 174 };
 175
 176 static const struct i2c_device_id ds1307_id[] = {
 177         { "ds1307", ds_1307 },
 178         { "ds1337", ds_1337 },
 179         { "ds1338", ds_1338 },
 180         { "ds1339", ds_1339 },
 181         { "ds1388", ds_1388 },
 182         { "ds1340", ds_1340 },
 183         { "ds3231", ds_3231 },
 184         { "m41t00", m41t00 },
 185         { "mcp7940x", mcp794xx },
 186         { "mcp7941x", mcp794xx },
 187         { "pt7c4338", ds_1307 },
 188         { "rx8025", rx_8025 },
 189         { }
 190 };
 191 MODULE_DEVICE_TABLE(i2c, ds1307_id);
 192
 193 /*----------------------------------------------------------------------*/
 194
 195 #define BLOCK_DATA_MAX_TRIES 10
 196
 197 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
 198                                        u8 command, u8 length, u8 *values)
 199 {
 200         s32 i, data;
 201
 202         for (i = 0; i < length; i++) {
 203                 data = i2c_smbus_read_byte_data(client, command + i);
 204                 if (data < 0)
 205                         return data;
 206                 values[i] = data;
 207         }
 208         return i;
 209 }
 210
 211 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
 212                                   u8 length, u8 *values)
 213 {
 214         u8 oldvalues[255];
 215         s32 ret;
 216         int tries = 0;
 217
 218         dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
 219         ret = ds1307_read_block_data_once(client, command, length, values);
 220         if (ret < 0)
 221                 return ret;
 222         do {
 223                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 224                         dev_err(&client->dev,
 225                                 "ds1307_read_block_data failed\n");
 226                         return -EIO;
 227                 }
 228                 memcpy(oldvalues, values, length);
 229                 ret = ds1307_read_block_data_once(client, command, length,
 230                                                   values);
 231                 if (ret < 0)
 232                         return ret;
 233         } while (memcmp(oldvalues, values, length));
 234         return length;
 235 }
 236
 237 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
 238                                    u8 length, const u8 *values)
 239 {
 240         u8 currvalues[255];
 241         int tries = 0;
 242
 243         dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
 244         do {
 245                 s32 i, ret;
 246
 247                 if (++tries > BLOCK_DATA_MAX_TRIES) {
 248                         dev_err(&client->dev,
 249                                 "ds1307_write_block_data failed\n");
 250                         return -EIO;
 251                 }
 252                 for (i = 0; i < length; i++) {
 253                         ret = i2c_smbus_write_byte_data(client, command + i,
 254                                                         values[i]);
 255                         if (ret < 0)
 256                                 return ret;
 257                 }
 258                 ret = ds1307_read_block_data_once(client, command, length,
 259                                                   currvalues);
 260                 if (ret < 0)
 261                         return ret;
 262         } while (memcmp(currvalues, values, length));
 263         return length;
 264 }
 265
 266 /*----------------------------------------------------------------------*/
 267
 268 /* These RTC devices are not designed to be connected to a SMbus adapter.
 269    SMbus limits block operations length to 32 bytes, whereas it's not
 270    limited on I2C buses. As a result, accesses may exceed 32 bytes;
 271    in that case, split them into smaller blocks */
 272
 273 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
 274                                 u8 command, u8 length, const u8 *values)
 275 {
 276         u8 suboffset = 0;
 277
 278         if (length <= I2C_SMBUS_BLOCK_MAX)
 279                 return i2c_smbus_write_i2c_block_data(client,
 280                                         command, length, values);
 281
 282         while (suboffset < length) {
 283                 s32 retval = i2c_smbus_write_i2c_block_data(client,
 284                                 command + suboffset,
 285                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 286                                 values + suboffset);
 287                 if (retval < 0)
 288                         return retval;
 289
 290                 suboffset += I2C_SMBUS_BLOCK_MAX;
 291         }
 292         return length;
 293 }
 294
 295 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
 296                                 u8 command, u8 length, u8 *values)
 297 {
 298         u8 suboffset = 0;
 299
 300         if (length <= I2C_SMBUS_BLOCK_MAX)
 301                 return i2c_smbus_read_i2c_block_data(client,
 302                                         command, length, values);
 303
 304         while (suboffset < length) {
 305                 s32 retval = i2c_smbus_read_i2c_block_data(client,
 306                                 command + suboffset,
 307                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
 308                                 values + suboffset);
 309                 if (retval < 0)
 310                         return retval;
 311
 312                 suboffset += I2C_SMBUS_BLOCK_MAX;
 313         }
 314         return length;
 315 }
 316
 317 /*----------------------------------------------------------------------*/
 318
 319 /*
 320  * The ds1337 and ds1339 both have two alarms, but we only use the first
 321  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
 322  * signal; ds1339 chips have only one alarm signal.
 323  */
 324 static irqreturn_t ds1307_irq(int irq, void *dev_id)
 325 {
 326         struct i2c_client       *client = dev_id;
 327         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 328         struct mutex            *lock = &ds1307->rtc->ops_lock;
 329         int                     stat, control;
 330
 331         mutex_lock(lock);
 332         stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
 333         if (stat < 0)
 334                 goto out;
 335
 336         if (stat & DS1337_BIT_A1I) {
 337                 stat &= ~DS1337_BIT_A1I;
 338                 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
 339
 340                 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 341                 if (control < 0)
 342                         goto out;
 343
 344                 control &= ~DS1337_BIT_A1IE;
 345                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 346
 347                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 348         }
 349
 350 out:
 351         mutex_unlock(lock);
 352
 353         return IRQ_HANDLED;
 354 }
 355
 356 /*----------------------------------------------------------------------*/
 357
 358 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
 359 {
 360         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 361         int             tmp;
 362
 363         /* read the RTC date and time registers all at once */
 364         tmp = ds1307->read_block_data(ds1307->client,
 365                 ds1307->offset, 7, ds1307->regs);
 366         if (tmp != 7) {
 367                 dev_err(dev, "%s error %d\n", "read", tmp);
 368                 return -EIO;
 369         }
 370
 371         dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
 372
 373         t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
 374         t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
 375         tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
 376         t->tm_hour = bcd2bin(tmp);
 377         t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
 378         t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
 379         tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
 380         t->tm_mon = bcd2bin(tmp) - 1;
 381
 382         /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
 383         t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
 384
 385         dev_dbg(dev, "%s secs=%d, mins=%d, "
 386                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 387                 "read", t->tm_sec, t->tm_min,
 388                 t->tm_hour, t->tm_mday,
 389                 t->tm_mon, t->tm_year, t->tm_wday);
 390
 391         /* initial clock setting can be undefined */
 392         return rtc_valid_tm(t);
 393 }
 394
 395 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
 396 {
 397         struct ds1307   *ds1307 = dev_get_drvdata(dev);
 398         int             result;
 399         int             tmp;
 400         u8              *buf = ds1307->regs;
 401
 402         dev_dbg(dev, "%s secs=%d, mins=%d, "
 403                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
 404                 "write", t->tm_sec, t->tm_min,
 405                 t->tm_hour, t->tm_mday,
 406                 t->tm_mon, t->tm_year, t->tm_wday);
 407
 408         buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
 409         buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
 410         buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
 411         buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
 412         buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
 413         buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
 414
 415         /* assume 20YY not 19YY */
 416         tmp = t->tm_year - 100;
 417         buf[DS1307_REG_YEAR] = bin2bcd(tmp);
 418
 419         switch (ds1307->type) {
 420         case ds_1337:
 421         case ds_1339:
 422         case ds_3231:
 423                 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
 424                 break;
 425         case ds_1340:
 426                 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
 427                                 | DS1340_BIT_CENTURY;
 428                 break;
 429         case mcp794xx:
 430                 /*
 431                  * these bits were cleared when preparing the date/time
 432                  * values and need to be set again before writing the
 433                  * buffer out to the device.
 434                  */
 435                 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
 436                 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
 437                 break;
 438         default:
 439                 break;
 440         }
 441
 442         dev_dbg(dev, "%s: %7ph\n", "write", buf);
 443
 444         result = ds1307->write_block_data(ds1307->client,
 445                 ds1307->offset, 7, buf);
 446         if (result < 0) {
 447                 dev_err(dev, "%s error %d\n", "write", result);
 448                 return result;
 449         }
 450         return 0;
 451 }
 452
 453 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 454 {
 455         struct i2c_client       *client = to_i2c_client(dev);
 456         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 457         int                     ret;
 458
 459         if (!test_bit(HAS_ALARM, &ds1307->flags))
 460                 return -EINVAL;
 461
 462         /* read all ALARM1, ALARM2, and status registers at once */
 463         ret = ds1307->read_block_data(client,
 464                         DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
 465         if (ret != 9) {
 466                 dev_err(dev, "%s error %d\n", "alarm read", ret);
 467                 return -EIO;
 468         }
 469
 470         dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
 471                 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
 472
 473         /*
 474          * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
 475          * and that all four fields are checked matches
 476          */
 477         t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
 478         t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
 479         t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
 480         t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
 481         t->time.tm_mon = -1;
 482         t->time.tm_year = -1;
 483         t->time.tm_wday = -1;
 484         t->time.tm_yday = -1;
 485         t->time.tm_isdst = -1;
 486
 487         /* ... and status */
 488         t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
 489         t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
 490
 491         dev_dbg(dev, "%s secs=%d, mins=%d, "
 492                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 493                 "alarm read", t->time.tm_sec, t->time.tm_min,
 494                 t->time.tm_hour, t->time.tm_mday,
 495                 t->enabled, t->pending);
 496
 497         return 0;
 498 }
 499
 500 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 501 {
 502         struct i2c_client       *client = to_i2c_client(dev);
 503         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 504         unsigned char           *buf = ds1307->regs;
 505         u8                      control, status;
 506         int                     ret;
 507
 508         if (!test_bit(HAS_ALARM, &ds1307->flags))
 509                 return -EINVAL;
 510
 511         dev_dbg(dev, "%s secs=%d, mins=%d, "
 512                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
 513                 "alarm set", t->time.tm_sec, t->time.tm_min,
 514                 t->time.tm_hour, t->time.tm_mday,
 515                 t->enabled, t->pending);
 516
 517         /* read current status of both alarms and the chip */
 518         ret = ds1307->read_block_data(client,
 519                         DS1339_REG_ALARM1_SECS, 9, buf);
 520         if (ret != 9) {
 521                 dev_err(dev, "%s error %d\n", "alarm write", ret);
 522                 return -EIO;
 523         }
 524         control = ds1307->regs[7];
 525         status = ds1307->regs[8];
 526
 527         dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
 528                 &ds1307->regs[0], &ds1307->regs[4], control, status);
 529
 530         /* set ALARM1, using 24 hour and day-of-month modes */
 531         buf[0] = bin2bcd(t->time.tm_sec);
 532         buf[1] = bin2bcd(t->time.tm_min);
 533         buf[2] = bin2bcd(t->time.tm_hour);
 534         buf[3] = bin2bcd(t->time.tm_mday);
 535
 536         /* set ALARM2 to non-garbage */
 537         buf[4] = 0;
 538         buf[5] = 0;
 539         buf[6] = 0;
 540
 541         /* optionally enable ALARM1 */
 542         buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
 543         if (t->enabled) {
 544                 dev_dbg(dev, "alarm IRQ armed\n");
 545                 buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
 546         }
 547         buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
 548
 549         ret = ds1307->write_block_data(client,
 550                         DS1339_REG_ALARM1_SECS, 9, buf);
 551         if (ret < 0) {
 552                 dev_err(dev, "can't set alarm time\n");
 553                 return ret;
 554         }
 555
 556         return 0;
 557 }
 558
 559 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
 560 {
 561         struct i2c_client       *client = to_i2c_client(dev);
 562         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 563         int                     ret;
 564
 565         if (!test_bit(HAS_ALARM, &ds1307->flags))
 566                 return -ENOTTY;
 567
 568         ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 569         if (ret < 0)
 570                 return ret;
 571
 572         if (enabled)
 573                 ret |= DS1337_BIT_A1IE;
 574         else
 575                 ret &= ~DS1337_BIT_A1IE;
 576
 577         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
 578         if (ret < 0)
 579                 return ret;
 580
 581         return 0;
 582 }
 583
 584 static const struct rtc_class_ops ds13xx_rtc_ops = {
 585         .read_time      = ds1307_get_time,
 586         .set_time       = ds1307_set_time,
 587         .read_alarm     = ds1337_read_alarm,
 588         .set_alarm      = ds1337_set_alarm,
 589         .alarm_irq_enable = ds1307_alarm_irq_enable,
 590 };
 591
 592 /*----------------------------------------------------------------------*/
 593
 594 /*
 595  * Alarm support for mcp794xx devices.
 596  */
 597
 598 #define MCP794XX_REG_CONTROL            0x07
 599 #       define MCP794XX_BIT_ALM0_EN     0x10
 600 #       define MCP794XX_BIT_ALM1_EN     0x20
 601 #define MCP794XX_REG_ALARM0_BASE        0x0a
 602 #define MCP794XX_REG_ALARM0_CTRL        0x0d
 603 #define MCP794XX_REG_ALARM1_BASE        0x11
 604 #define MCP794XX_REG_ALARM1_CTRL        0x14
 605 #       define MCP794XX_BIT_ALMX_IF     (1 << 3)
 606 #       define MCP794XX_BIT_ALMX_C0     (1 << 4)
 607 #       define MCP794XX_BIT_ALMX_C1     (1 << 5)
 608 #       define MCP794XX_BIT_ALMX_C2     (1 << 6)
 609 #       define MCP794XX_BIT_ALMX_POL    (1 << 7)
 610 #       define MCP794XX_MSK_ALMX_MATCH  (MCP794XX_BIT_ALMX_C0 | \
 611                                          MCP794XX_BIT_ALMX_C1 | \
 612                                          MCP794XX_BIT_ALMX_C2)
 613
 614 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
 615 {
 616         struct i2c_client       *client = dev_id;
 617         struct ds1307           *ds1307 = i2c_get_clientdata(client);
 618         struct mutex            *lock = &ds1307->rtc->ops_lock;
 619         int reg, ret;
 620
 621         mutex_lock(lock);
 622
 623         /* Check and clear alarm 0 interrupt flag. */
 624         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
 625         if (reg < 0)
 626                 goto out;
 627         if (!(reg & MCP794XX_BIT_ALMX_IF))
 628                 goto out;
 629         reg &= ~MCP794XX_BIT_ALMX_IF;
 630         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
 631         if (ret < 0)
 632                 goto out;
 633
 634         /* Disable alarm 0. */
 635         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 636         if (reg < 0)
 637                 goto out;
 638         reg &= ~MCP794XX_BIT_ALM0_EN;
 639         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 640         if (ret < 0)
 641                 goto out;
 642
 643         rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
 644
 645 out:
 646         mutex_unlock(lock);
 647
 648         return IRQ_HANDLED;
 649 }
 650
 651 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
 652 {
 653         struct i2c_client *client = to_i2c_client(dev);
 654         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 655         u8 *regs = ds1307->regs;
 656         int ret;
 657
 658         if (!test_bit(HAS_ALARM, &ds1307->flags))
 659                 return -EINVAL;
 660
 661         /* Read control and alarm 0 registers. */
 662         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 663         if (ret < 0)
 664                 return ret;
 665
 666         t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
 667
 668         /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
 669         t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
 670         t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
 671         t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
 672         t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
 673         t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
 674         t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
 675         t->time.tm_year = -1;
 676         t->time.tm_yday = -1;
 677         t->time.tm_isdst = -1;
 678
 679         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 680                 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
 681                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 682                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
 683                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
 684                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
 685                 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
 686
 687         return 0;
 688 }
 689
 690 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
 691 {
 692         struct i2c_client *client = to_i2c_client(dev);
 693         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 694         unsigned char *regs = ds1307->regs;
 695         int ret;
 696
 697         if (!test_bit(HAS_ALARM, &ds1307->flags))
 698                 return -EINVAL;
 699
 700         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
 701                 "enabled=%d pending=%d\n", __func__,
 702                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
 703                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
 704                 t->enabled, t->pending);
 705
 706         /* Read control and alarm 0 registers. */
 707         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 708         if (ret < 0)
 709                 return ret;
 710
 711         /* Set alarm 0, using 24-hour and day-of-month modes. */
 712         regs[3] = bin2bcd(t->time.tm_sec);
 713         regs[4] = bin2bcd(t->time.tm_min);
 714         regs[5] = bin2bcd(t->time.tm_hour);
 715         regs[6] = bin2bcd(t->time.tm_wday + 1);
 716         regs[7] = bin2bcd(t->time.tm_mday);
 717         regs[8] = bin2bcd(t->time.tm_mon + 1);
 718
 719         /* Clear the alarm 0 interrupt flag. */
 720         regs[6] &= ~MCP794XX_BIT_ALMX_IF;
 721         /* Set alarm match: second, minute, hour, day, date, month. */
 722         regs[6] |= MCP794XX_MSK_ALMX_MATCH;
 723         /* Disable interrupt. We will not enable until completely programmed */
 724         regs[0] &= ~MCP794XX_BIT_ALM0_EN;
 725
 726         ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
 727         if (ret < 0)
 728                 return ret;
 729
 730         if (!t->enabled)
 731                 return 0;
 732         regs[0] |= MCP794XX_BIT_ALM0_EN;
 733         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
 734 }
 735
 736 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
 737 {
 738         struct i2c_client *client = to_i2c_client(dev);
 739         struct ds1307 *ds1307 = i2c_get_clientdata(client);
 740         int reg;
 741
 742         if (!test_bit(HAS_ALARM, &ds1307->flags))
 743                 return -EINVAL;
 744
 745         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
 746         if (reg < 0)
 747                 return reg;
 748
 749         if (enabled)
 750                 reg |= MCP794XX_BIT_ALM0_EN;
 751         else
 752                 reg &= ~MCP794XX_BIT_ALM0_EN;
 753
 754         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
 755 }
 756
 757 static const struct rtc_class_ops mcp794xx_rtc_ops = {
 758         .read_time      = ds1307_get_time,
 759         .set_time       = ds1307_set_time,
 760         .read_alarm     = mcp794xx_read_alarm,
 761         .set_alarm      = mcp794xx_set_alarm,
 762         .alarm_irq_enable = mcp794xx_alarm_irq_enable,
 763 };
 764
 765 /*----------------------------------------------------------------------*/
 766
 767 static ssize_t
 768 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
 769                 struct bin_attribute *attr,
 770                 char *buf, loff_t off, size_t count)
 771 {
 772         struct i2c_client       *client;
 773         struct ds1307           *ds1307;
 774         int                     result;
 775
 776         client = kobj_to_i2c_client(kobj);
 777         ds1307 = i2c_get_clientdata(client);
 778
 779         result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
 780                                                                 count, buf);
 781         if (result < 0)
 782                 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
 783         return result;
 784 }
 785
 786 static ssize_t
 787 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
 788                 struct bin_attribute *attr,
 789                 char *buf, loff_t off, size_t count)
 790 {
 791         struct i2c_client       *client;
 792         struct ds1307           *ds1307;
 793         int                     result;
 794
 795         client = kobj_to_i2c_client(kobj);
 796         ds1307 = i2c_get_clientdata(client);
 797
 798         result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
 799                                                                 count, buf);
 800         if (result < 0) {
 801                 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
 802                 return result;
 803         }
 804         return count;
 805 }
 806
 807
 808 /*----------------------------------------------------------------------*/
 809
 810 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
 811                                   uint32_t ohms, bool diode)
 812 {
 813         u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
 814                 DS1307_TRICKLE_CHARGER_NO_DIODE;
 815
 816         switch (ohms) {
 817         case 250:
 818                 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
 819                 break;
 820         case 2000:
 821                 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
 822                 break;
 823         case 4000:
 824                 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
 825                 break;
 826         default:
 827                 dev_warn(&client->dev,
 828                          "Unsupported ohm value %u in dt\n", ohms);
 829                 return 0;
 830         }
 831         return setup;
 832 }
 833
 834 static void ds1307_trickle_of_init(struct i2c_client *client,
 835                                    struct chip_desc *chip)
 836 {
 837         uint32_t ohms = 0;
 838         bool diode = true;
 839
 840         if (!chip->do_trickle_setup)
 841                 goto out;
 842         if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
 843                 goto out;
 844         if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
 845                 diode = false;
 846         chip->trickle_charger_setup = chip->do_trickle_setup(client,
 847                                                              ohms, diode);
 848 out:
 849         return;
 850 }
 851
 852 /*----------------------------------------------------------------------*/
 853
 854 #ifdef CONFIG_RTC_DRV_DS1307_HWMON
 855
 856 /*
 857  * Temperature sensor support for ds3231 devices.
 858  */
 859
 860 #define DS3231_REG_TEMPERATURE  0x11
 861
 862 /*
 863  * A user-initiated temperature conversion is not started by this function,
 864  * so the temperature is updated once every 64 seconds.
 865  */
 866 static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
 867 {
 868         struct ds1307 *ds1307 = dev_get_drvdata(dev);
 869         u8 temp_buf[2];
 870         s16 temp;
 871         int ret;
 872
 873         ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
 874                                         sizeof(temp_buf), temp_buf);
 875         if (ret < 0)
 876                 return ret;
 877         if (ret != sizeof(temp_buf))
 878                 return -EIO;
 879
 880         /*
 881          * Temperature is represented as a 10-bit code with a resolution of
 882          * 0.25 degree celsius and encoded in two's complement format.
 883          */
 884         temp = (temp_buf[0] << 8) | temp_buf[1];
 885         temp >>= 6;
 886         *mC = temp * 250;
 887
 888         return 0;
 889 }
 890
 891 static ssize_t ds3231_hwmon_show_temp(struct device *dev,
 892                                 struct device_attribute *attr, char *buf)
 893 {
 894         int ret;
 895         s32 temp;
 896
 897         ret = ds3231_hwmon_read_temp(dev, &temp);
 898         if (ret)
 899                 return ret;
 900
 901         return sprintf(buf, "%d\n", temp);
 902 }
 903 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
 904                         NULL, 0);
 905
 906 static struct attribute *ds3231_hwmon_attrs[] = {
 907         &sensor_dev_attr_temp1_input.dev_attr.attr,
 908         NULL,
 909 };
 910 ATTRIBUTE_GROUPS(ds3231_hwmon);
 911
 912 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 913 {
 914         struct device *dev;
 915
 916         if (ds1307->type != ds_3231)
 917                 return;
 918
 919         dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
 920                                                 ds1307->client->name,
 921                                                 ds1307, ds3231_hwmon_groups);
 922         if (IS_ERR(dev)) {
 923                 dev_warn(&ds1307->client->dev,
 924                         "unable to register hwmon device %ld\n", PTR_ERR(dev));
 925         }
 926 }
 927
 928 #else
 929
 930 static void ds1307_hwmon_register(struct ds1307 *ds1307)
 931 {
 932 }
 933
 934 #endif /* CONFIG_RTC_DRV_DS1307_HWMON */
 935
 936 /*----------------------------------------------------------------------*/
 937
 938 /*
 939  * Square-wave output support for DS3231
 940  * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
 941  */
 942 #ifdef CONFIG_COMMON_CLK
 943
 944 enum {
 945         DS3231_CLK_SQW = 0,
 946         DS3231_CLK_32KHZ,
 947 };
 948
 949 #define clk_sqw_to_ds1307(clk)  \
 950         container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
 951 #define clk_32khz_to_ds1307(clk)        \
 952         container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
 953
 954 static int ds3231_clk_sqw_rates[] = {
 955         1,
 956         1024,
 957         4096,
 958         8192,
 959 };
 960
 961 static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
 962 {
 963         struct i2c_client *client = ds1307->client;
 964         struct mutex *lock = &ds1307->rtc->ops_lock;
 965         int control;
 966         int ret;
 967
 968         mutex_lock(lock);
 969
 970         control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
 971         if (control < 0) {
 972                 ret = control;
 973                 goto out;
 974         }
 975
 976         control &= ~mask;
 977         control |= value;
 978
 979         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
 980 out:
 981         mutex_unlock(lock);
 982
 983         return ret;
 984 }
 985
 986 static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
 987                                                 unsigned long parent_rate)
 988 {
 989         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
 990         int control;
 991         int rate_sel = 0;
 992
 993         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
 994         if (control < 0)
 995                 return control;
 996         if (control & DS1337_BIT_RS1)
 997                 rate_sel += 1;
 998         if (control & DS1337_BIT_RS2)
 999                 rate_sel += 2;
1000
1001         return ds3231_clk_sqw_rates[rate_sel];
1002 }
1003
1004 static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1005                                         unsigned long *prate)
1006 {
1007         int i;
1008
1009         for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1010                 if (ds3231_clk_sqw_rates[i] <= rate)
1011                         return ds3231_clk_sqw_rates[i];
1012         }
1013
1014         return 0;
1015 }
1016
1017 static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1018                                         unsigned long parent_rate)
1019 {
1020         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1021         int control = 0;
1022         int rate_sel;
1023
1024         for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1025                         rate_sel++) {
1026                 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1027                         break;
1028         }
1029
1030         if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1031                 return -EINVAL;
1032
1033         if (rate_sel & 1)
1034                 control |= DS1337_BIT_RS1;
1035         if (rate_sel & 2)
1036                 control |= DS1337_BIT_RS2;
1037
1038         return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1039                                 control);
1040 }
1041
1042 static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1043 {
1044         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1045
1046         return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1047 }
1048
1049 static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1050 {
1051         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1052
1053         ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1054 }
1055
1056 static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1057 {
1058         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1059         int control;
1060
1061         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1062         if (control < 0)
1063                 return control;
1064
1065         return !(control & DS1337_BIT_INTCN);
1066 }
1067
1068 static const struct clk_ops ds3231_clk_sqw_ops = {
1069         .prepare = ds3231_clk_sqw_prepare,
1070         .unprepare = ds3231_clk_sqw_unprepare,
1071         .is_prepared = ds3231_clk_sqw_is_prepared,
1072         .recalc_rate = ds3231_clk_sqw_recalc_rate,
1073         .round_rate = ds3231_clk_sqw_round_rate,
1074         .set_rate = ds3231_clk_sqw_set_rate,
1075 };
1076
1077 static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1078                                                 unsigned long parent_rate)
1079 {
1080         return 32768;
1081 }
1082
1083 static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1084 {
1085         struct i2c_client *client = ds1307->client;
1086         struct mutex *lock = &ds1307->rtc->ops_lock;
1087         int status;
1088         int ret;
1089
1090         mutex_lock(lock);
1091
1092         status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1093         if (status < 0) {
1094                 ret = status;
1095                 goto out;
1096         }
1097
1098         if (enable)
1099                 status |= DS3231_BIT_EN32KHZ;
1100         else
1101                 status &= ~DS3231_BIT_EN32KHZ;
1102
1103         ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1104 out:
1105         mutex_unlock(lock);
1106
1107         return ret;
1108 }
1109
1110 static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1111 {
1112         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1113
1114         return ds3231_clk_32khz_control(ds1307, true);
1115 }
1116
1117 static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1118 {
1119         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1120
1121         ds3231_clk_32khz_control(ds1307, false);
1122 }
1123
1124 static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1125 {
1126         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1127         int status;
1128
1129         status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1130         if (status < 0)
1131                 return status;
1132
1133         return !!(status & DS3231_BIT_EN32KHZ);
1134 }
1135
1136 static const struct clk_ops ds3231_clk_32khz_ops = {
1137         .prepare = ds3231_clk_32khz_prepare,
1138         .unprepare = ds3231_clk_32khz_unprepare,
1139         .is_prepared = ds3231_clk_32khz_is_prepared,
1140         .recalc_rate = ds3231_clk_32khz_recalc_rate,
1141 };
1142
1143 static struct clk_init_data ds3231_clks_init[] = {
1144         [DS3231_CLK_SQW] = {
1145                 .name = "ds3231_clk_sqw",
1146                 .ops = &ds3231_clk_sqw_ops,
1147                 .flags = CLK_IS_ROOT,
1148         },
1149         [DS3231_CLK_32KHZ] = {
1150                 .name = "ds3231_clk_32khz",
1151                 .ops = &ds3231_clk_32khz_ops,
1152                 .flags = CLK_IS_ROOT,
1153         },
1154 };
1155
1156 static int ds3231_clks_register(struct ds1307 *ds1307)
1157 {
1158         struct i2c_client *client = ds1307->client;
1159         struct device_node *node = client->dev.of_node;
1160         struct clk_onecell_data *onecell;
1161         int i;
1162
1163         onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1164         if (!onecell)
1165                 return -ENOMEM;
1166
1167         onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1168         onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1169                                         sizeof(onecell->clks[0]), GFP_KERNEL);
1170         if (!onecell->clks)
1171                 return -ENOMEM;
1172
1173         for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1174                 struct clk_init_data init = ds3231_clks_init[i];
1175
1176                 /*
1177                  * Interrupt signal due to alarm conditions and square-wave
1178                  * output share same pin, so don't initialize both.
1179                  */
1180                 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1181                         continue;
1182
1183                 /* optional override of the clockname */
1184                 of_property_read_string_index(node, "clock-output-names", i,
1185                                                 &init.name);
1186                 ds1307->clks[i].init = &init;
1187
1188                 onecell->clks[i] = devm_clk_register(&client->dev,
1189                                                         &ds1307->clks[i]);
1190                 if (IS_ERR(onecell->clks[i]))
1191                         return PTR_ERR(onecell->clks[i]);
1192         }
1193
1194         if (!node)
1195                 return 0;
1196
1197         of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1198
1199         return 0;
1200 }
1201
1202 static void ds1307_clks_register(struct ds1307 *ds1307)
1203 {
1204         int ret;
1205
1206         if (ds1307->type != ds_3231)
1207                 return;
1208
1209         ret = ds3231_clks_register(ds1307);
1210         if (ret) {
1211                 dev_warn(&ds1307->client->dev,
1212                         "unable to register clock device %d\n", ret);
1213         }
1214 }
1215
1216 #else
1217
1218 static void ds1307_clks_register(struct ds1307 *ds1307)
1219 {
1220 }
1221
1222 #endif /* CONFIG_COMMON_CLK */
1223
1224 static int ds1307_probe(struct i2c_client *client,
1225                         const struct i2c_device_id *id)
1226 {
1227         struct ds1307           *ds1307;
1228         int                     err = -ENODEV;
1229         int                     tmp;
1230         struct chip_desc        *chip = &chips[id->driver_data];
1231         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
1232         bool                    want_irq = false;
1233         bool                    ds1307_can_wakeup_device = false;
1234         unsigned char           *buf;
1235         struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
1236         irq_handler_t   irq_handler = ds1307_irq;
1237
1238         static const int        bbsqi_bitpos[] = {
1239                 [ds_1337] = 0,
1240                 [ds_1339] = DS1339_BIT_BBSQI,
1241                 [ds_3231] = DS3231_BIT_BBSQW,
1242         };
1243         const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
1244
1245         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
1246             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
1247                 return -EIO;
1248
1249         ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
1250         if (!ds1307)
1251                 return -ENOMEM;
1252
1253         i2c_set_clientdata(client, ds1307);
1254
1255         ds1307->client  = client;
1256         ds1307->type    = id->driver_data;
1257
1258         if (!pdata && client->dev.of_node)
1259                 ds1307_trickle_of_init(client, chip);
1260         else if (pdata && pdata->trickle_charger_setup)
1261                 chip->trickle_charger_setup = pdata->trickle_charger_setup;
1262
1263         if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
1264                 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
1265                     DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
1266                     chip->trickle_charger_reg);
1267                 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
1268                     DS13XX_TRICKLE_CHARGER_MAGIC |
1269                     chip->trickle_charger_setup);
1270         }
1271
1272         buf = ds1307->regs;
1273         if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1274                 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
1275                 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
1276         } else {
1277                 ds1307->read_block_data = ds1307_read_block_data;
1278                 ds1307->write_block_data = ds1307_write_block_data;
1279         }
1280
1281 #ifdef CONFIG_OF
1282 /*
1283  * For devices with no IRQ directly connected to the SoC, the RTC chip
1284  * can be forced as a wakeup source by stating that explicitly in
1285  * the device's .dts file using the "wakeup-source" boolean property.
1286  * If the "wakeup-source" property is set, don't request an IRQ.
1287  * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1288  * if supported by the RTC.
1289  */
1290         if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1291                 ds1307_can_wakeup_device = true;
1292         }
1293 #endif
1294
1295         switch (ds1307->type) {
1296         case ds_1337:
1297         case ds_1339:
1298         case ds_3231:
1299                 /* get registers that the "rtc" read below won't read... */
1300                 tmp = ds1307->read_block_data(ds1307->client,
1301                                 DS1337_REG_CONTROL, 2, buf);
1302                 if (tmp != 2) {
1303                         dev_dbg(&client->dev, "read error %d\n", tmp);
1304                         err = -EIO;
1305                         goto exit;
1306                 }
1307
1308                 /* oscillator off?  turn it on, so clock can tick. */
1309                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
1310                         ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
1311
1312                 /*
1313                  * Using IRQ or defined as wakeup-source?
1314                  * Disable the square wave and both alarms.
1315                  * For some variants, be sure alarms can trigger when we're
1316                  * running on Vbackup (BBSQI/BBSQW)
1317                  */
1318                 if (chip->alarm && (ds1307->client->irq > 0 ||
1319                                                 ds1307_can_wakeup_device)) {
1320                         ds1307->regs[0] |= DS1337_BIT_INTCN
1321                                         | bbsqi_bitpos[ds1307->type];
1322                         ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
1323
1324                         want_irq = true;
1325                 }
1326
1327                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
1328                                                         ds1307->regs[0]);
1329
1330                 /* oscillator fault?  clear flag, and warn */
1331                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
1332                         i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
1333                                 ds1307->regs[1] & ~DS1337_BIT_OSF);
1334                         dev_warn(&client->dev, "SET TIME!\n");
1335                 }
1336                 break;
1337
1338         case rx_8025:
1339                 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1340                                 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1341                 if (tmp != 2) {
1342                         dev_dbg(&client->dev, "read error %d\n", tmp);
1343                         err = -EIO;
1344                         goto exit;
1345                 }
1346
1347                 /* oscillator off?  turn it on, so clock can tick. */
1348                 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
1349                         ds1307->regs[1] |= RX8025_BIT_XST;
1350                         i2c_smbus_write_byte_data(client,
1351                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1352                                                   ds1307->regs[1]);
1353                         dev_warn(&client->dev,
1354                                  "oscillator stop detected - SET TIME!\n");
1355                 }
1356
1357                 if (ds1307->regs[1] & RX8025_BIT_PON) {
1358                         ds1307->regs[1] &= ~RX8025_BIT_PON;
1359                         i2c_smbus_write_byte_data(client,
1360                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1361                                                   ds1307->regs[1]);
1362                         dev_warn(&client->dev, "power-on detected\n");
1363                 }
1364
1365                 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1366                         ds1307->regs[1] &= ~RX8025_BIT_VDET;
1367                         i2c_smbus_write_byte_data(client,
1368                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1369                                                   ds1307->regs[1]);
1370                         dev_warn(&client->dev, "voltage drop detected\n");
1371                 }
1372
1373                 /* make sure we are running in 24hour mode */
1374                 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1375                         u8 hour;
1376
1377                         /* switch to 24 hour mode */
1378                         i2c_smbus_write_byte_data(client,
1379                                                   RX8025_REG_CTRL1 << 4 | 0x08,
1380                                                   ds1307->regs[0] |
1381                                                   RX8025_BIT_2412);
1382
1383                         tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1384                                         RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1385                         if (tmp != 2) {
1386                                 dev_dbg(&client->dev, "read error %d\n", tmp);
1387                                 err = -EIO;
1388                                 goto exit;
1389                         }
1390
1391                         /* correct hour */
1392                         hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1393                         if (hour == 12)
1394                                 hour = 0;
1395                         if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1396                                 hour += 12;
1397
1398                         i2c_smbus_write_byte_data(client,
1399                                                   DS1307_REG_HOUR << 4 | 0x08,
1400                                                   hour);
1401                 }
1402                 break;
1403         case ds_1388:
1404                 ds1307->offset = 1; /* Seconds starts at 1 */
1405                 break;
1406         case mcp794xx:
1407                 rtc_ops = &mcp794xx_rtc_ops;
1408                 if (ds1307->client->irq > 0 && chip->alarm) {
1409                         irq_handler = mcp794xx_irq;
1410                         want_irq = true;
1411                 }
1412                 break;
1413         default:
1414                 break;
1415         }
1416
1417 read_rtc:
1418         /* read RTC registers */
1419         tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1420         if (tmp != 8) {
1421                 dev_dbg(&client->dev, "read error %d\n", tmp);
1422                 err = -EIO;
1423                 goto exit;
1424         }
1425
1426         /*
1427          * minimal sanity checking; some chips (like DS1340) don't
1428          * specify the extra bits as must-be-zero, but there are
1429          * still a few values that are clearly out-of-range.
1430          */
1431         tmp = ds1307->regs[DS1307_REG_SECS];
1432         switch (ds1307->type) {
1433         case ds_1307:
1434         case m41t00:
1435                 /* clock halted?  turn it on, so clock can tick. */
1436                 if (tmp & DS1307_BIT_CH) {
1437                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1438                         dev_warn(&client->dev, "SET TIME!\n");
1439                         goto read_rtc;
1440                 }
1441                 break;
1442         case ds_1338:
1443                 /* clock halted?  turn it on, so clock can tick. */
1444                 if (tmp & DS1307_BIT_CH)
1445                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1446
1447                 /* oscillator fault?  clear flag, and warn */
1448                 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1449                         i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1450                                         ds1307->regs[DS1307_REG_CONTROL]
1451                                         & ~DS1338_BIT_OSF);
1452                         dev_warn(&client->dev, "SET TIME!\n");
1453                         goto read_rtc;
1454                 }
1455                 break;
1456         case ds_1340:
1457                 /* clock halted?  turn it on, so clock can tick. */
1458                 if (tmp & DS1340_BIT_nEOSC)
1459                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1460
1461                 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1462                 if (tmp < 0) {
1463                         dev_dbg(&client->dev, "read error %d\n", tmp);
1464                         err = -EIO;
1465                         goto exit;
1466                 }
1467
1468                 /* oscillator fault?  clear flag, and warn */
1469                 if (tmp & DS1340_BIT_OSF) {
1470                         i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1471                         dev_warn(&client->dev, "SET TIME!\n");
1472                 }
1473                 break;
1474         case mcp794xx:
1475                 /* make sure that the backup battery is enabled */
1476                 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1477                         i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1478                                         ds1307->regs[DS1307_REG_WDAY]
1479                                         | MCP794XX_BIT_VBATEN);
1480                 }
1481
1482                 /* clock halted?  turn it on, so clock can tick. */
1483                 if (!(tmp & MCP794XX_BIT_ST)) {
1484                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1485                                         MCP794XX_BIT_ST);
1486                         dev_warn(&client->dev, "SET TIME!\n");
1487                         goto read_rtc;
1488                 }
1489
1490                 break;
1491         default:
1492                 break;
1493         }
1494
1495         tmp = ds1307->regs[DS1307_REG_HOUR];
1496         switch (ds1307->type) {
1497         case ds_1340:
1498         case m41t00:
1499                 /*
1500                  * NOTE: ignores century bits; fix before deploying
1501                  * systems that will run through year 2100.
1502                  */
1503                 break;
1504         case rx_8025:
1505                 break;
1506         default:
1507                 if (!(tmp & DS1307_BIT_12HR))
1508                         break;
1509
1510                 /*
1511                  * Be sure we're in 24 hour mode.  Multi-master systems
1512                  * take note...
1513                  */
1514                 tmp = bcd2bin(tmp & 0x1f);
1515                 if (tmp == 12)
1516                         tmp = 0;
1517                 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1518                         tmp += 12;
1519                 i2c_smbus_write_byte_data(client,
1520                                 ds1307->offset + DS1307_REG_HOUR,
1521                                 bin2bcd(tmp));
1522         }
1523
1524         if (want_irq) {
1525                 device_set_wakeup_capable(&client->dev, true);
1526                 set_bit(HAS_ALARM, &ds1307->flags);
1527         }
1528         ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1529                                 rtc_ops, THIS_MODULE);
1530         if (IS_ERR(ds1307->rtc)) {
1531                 return PTR_ERR(ds1307->rtc);
1532         }
1533
1534         if (ds1307_can_wakeup_device && ds1307->client->irq <= 0) {
1535                 /* Disable request for an IRQ */
1536                 want_irq = false;
1537                 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1538                 /* We cannot support UIE mode if we do not have an IRQ line */
1539                 ds1307->rtc->uie_unsupported = 1;
1540         }
1541
1542         if (want_irq) {
1543                 err = devm_request_threaded_irq(&client->dev,
1544                                                 client->irq, NULL, irq_handler,
1545                                                 IRQF_SHARED | IRQF_ONESHOT,
1546                                                 ds1307->rtc->name, client);
1547                 if (err) {
1548                         client->irq = 0;
1549                         device_set_wakeup_capable(&client->dev, false);
1550                         clear_bit(HAS_ALARM, &ds1307->flags);
1551                         dev_err(&client->dev, "unable to request IRQ!\n");
1552                 } else
1553                         dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1554         }
1555
1556         if (chip->nvram_size) {
1557
1558                 ds1307->nvram = devm_kzalloc(&client->dev,
1559                                         sizeof(struct bin_attribute),
1560                                         GFP_KERNEL);
1561                 if (!ds1307->nvram) {
1562                         dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1563                 } else {
1564
1565                         ds1307->nvram->attr.name = "nvram";
1566                         ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1567
1568                         sysfs_bin_attr_init(ds1307->nvram);
1569
1570                         ds1307->nvram->read = ds1307_nvram_read;
1571                         ds1307->nvram->write = ds1307_nvram_write;
1572                         ds1307->nvram->size = chip->nvram_size;
1573                         ds1307->nvram_offset = chip->nvram_offset;
1574
1575                         err = sysfs_create_bin_file(&client->dev.kobj,
1576                                                     ds1307->nvram);
1577                         if (err) {
1578                                 dev_err(&client->dev,
1579                                         "unable to create sysfs file: %s\n",
1580                                         ds1307->nvram->attr.name);
1581                         } else {
1582                                 set_bit(HAS_NVRAM, &ds1307->flags);
1583                                 dev_info(&client->dev, "%zu bytes nvram\n",
1584                                          ds1307->nvram->size);
1585                         }
1586                 }
1587         }
1588
1589         ds1307_hwmon_register(ds1307);
1590         ds1307_clks_register(ds1307);
1591
1592         return 0;
1593
1594 exit:
1595         return err;
1596 }
1597
1598 static int ds1307_remove(struct i2c_client *client)
1599 {
1600         struct ds1307 *ds1307 = i2c_get_clientdata(client);
1601
1602         if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1603                 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1604
1605         return 0;
1606 }
1607
1608 static struct i2c_driver ds1307_driver = {
1609         .driver = {
1610                 .name   = "rtc-ds1307",
1611         },
1612         .probe          = ds1307_probe,
1613         .remove         = ds1307_remove,
1614         .id_table       = ds1307_id,
1615 };
1616
1617 module_i2c_driver(ds1307_driver);
1618
1619 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1620 MODULE_LICENSE("GPL");