drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2013 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@emulex.com
  14  *
  15  * Emulex
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32
  33 #include <scsi/libiscsi.h>
  34 #include <scsi/scsi_bsg_iscsi.h>
  35 #include <scsi/scsi_netlink.h>
  36 #include <scsi/scsi_transport_iscsi.h>
  37 #include <scsi/scsi_transport.h>
  38 #include <scsi/scsi_cmnd.h>
  39 #include <scsi/scsi_device.h>
  40 #include <scsi/scsi_host.h>
  41 #include <scsi/scsi.h>
  42 #include "be_main.h"
  43 #include "be_iscsi.h"
  44 #include "be_mgmt.h"
  45 #include "be_cmds.h"
  46
  47 static unsigned int be_iopoll_budget = 10;
  48 static unsigned int be_max_phys_size = 64;
  49 static unsigned int enable_msix = 1;
  50
  51 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
  52 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  53 MODULE_VERSION(BUILD_STR);
  54 MODULE_AUTHOR("Emulex Corporation");
  55 MODULE_LICENSE("GPL");
  56 module_param(be_iopoll_budget, int, 0);
  57 module_param(enable_msix, int, 0);
  58 module_param(be_max_phys_size, uint, S_IRUGO);
  59 MODULE_PARM_DESC(be_max_phys_size,
  60                 "Maximum Size (In Kilobytes) of physically contiguous "
  61                 "memory that can be allocated. Range is 16 - 128");
  62
  63 #define beiscsi_disp_param(_name)\
  64 ssize_t \
  65 beiscsi_##_name##_disp(struct device *dev,\
  66                         struct device_attribute *attrib, char *buf)     \
  67 {       \
  68         struct Scsi_Host *shost = class_to_shost(dev);\
  69         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  70         uint32_t param_val = 0; \
  71         param_val = phba->attr_##_name;\
  72         return snprintf(buf, PAGE_SIZE, "%d\n",\
  73                         phba->attr_##_name);\
  74 }
  75
  76 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  77 int \
  78 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  79 {\
  80         if (val >= _minval && val <= _maxval) {\
  81                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  82                             "BA_%d : beiscsi_"#_name" updated "\
  83                             "from 0x%x ==> 0x%x\n",\
  84                             phba->attr_##_name, val); \
  85                 phba->attr_##_name = val;\
  86                 return 0;\
  87         } \
  88         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  89                     "BA_%d beiscsi_"#_name" attribute "\
  90                     "cannot be updated to 0x%x, "\
  91                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  92                 return -EINVAL;\
  93 }
  94
  95 #define beiscsi_store_param(_name)  \
  96 ssize_t \
  97 beiscsi_##_name##_store(struct device *dev,\
  98                          struct device_attribute *attr, const char *buf,\
  99                          size_t count) \
 100 { \
 101         struct Scsi_Host  *shost = class_to_shost(dev);\
 102         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 103         uint32_t param_val = 0;\
 104         if (!isdigit(buf[0]))\
 105                 return -EINVAL;\
 106         if (sscanf(buf, "%i", &param_val) != 1)\
 107                 return -EINVAL;\
 108         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 109                 return strlen(buf);\
 110         else \
 111                 return -EINVAL;\
 112 }
 113
 114 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 115 int \
 116 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 117 { \
 118         if (val >= _minval && val <= _maxval) {\
 119                 phba->attr_##_name = val;\
 120                 return 0;\
 121         } \
 122         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 123                     "BA_%d beiscsi_"#_name" attribute " \
 124                     "cannot be updated to 0x%x, "\
 125                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 126         phba->attr_##_name = _defval;\
 127         return -EINVAL;\
 128 }
 129
 130 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 131 static uint beiscsi_##_name = _defval;\
 132 module_param(beiscsi_##_name, uint, S_IRUGO);\
 133 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 134 beiscsi_disp_param(_name)\
 135 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 136 beiscsi_store_param(_name)\
 137 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 138 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 139               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 140
 141 /*
 142  * When new log level added update the
 143  * the MAX allowed value for log_enable
 144  */
 145 BEISCSI_RW_ATTR(log_enable, 0x00,
 146                 0xFF, 0x00, "Enable logging Bit Mask\n"
 147                 "\t\t\t\tInitialization Events  : 0x01\n"
 148                 "\t\t\t\tMailbox Events         : 0x02\n"
 149                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 150                 "\t\t\t\tError Handling         : 0x08\n"
 151                 "\t\t\t\tIO Path Events         : 0x10\n"
 152                 "\t\t\t\tConfiguration Path     : 0x20\n"
 153                 "\t\t\t\tiSCSI Protocol         : 0x40\n");
 154
 155 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 156 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 157 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 158 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
 159 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
 160              beiscsi_active_session_disp, NULL);
 161 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
 162              beiscsi_free_session_disp, NULL);
 163 struct device_attribute *beiscsi_attrs[] = {
 164         &dev_attr_beiscsi_log_enable,
 165         &dev_attr_beiscsi_drvr_ver,
 166         &dev_attr_beiscsi_adapter_family,
 167         &dev_attr_beiscsi_fw_ver,
 168         &dev_attr_beiscsi_active_session_count,
 169         &dev_attr_beiscsi_free_session_count,
 170         &dev_attr_beiscsi_phys_port,
 171         NULL,
 172 };
 173
 174 static char const *cqe_desc[] = {
 175         "RESERVED_DESC",
 176         "SOL_CMD_COMPLETE",
 177         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 178         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 179         "CXN_KILLED_BURST_LEN_MISMATCH",
 180         "CXN_KILLED_AHS_RCVD",
 181         "CXN_KILLED_HDR_DIGEST_ERR",
 182         "CXN_KILLED_UNKNOWN_HDR",
 183         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 184         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 185         "CXN_KILLED_RST_RCVD",
 186         "CXN_KILLED_TIMED_OUT",
 187         "CXN_KILLED_RST_SENT",
 188         "CXN_KILLED_FIN_RCVD",
 189         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 190         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 191         "CXN_KILLED_OVER_RUN_RESIDUAL",
 192         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 193         "CMD_KILLED_INVALID_STATSN_RCVD",
 194         "CMD_KILLED_INVALID_R2T_RCVD",
 195         "CMD_CXN_KILLED_LUN_INVALID",
 196         "CMD_CXN_KILLED_ICD_INVALID",
 197         "CMD_CXN_KILLED_ITT_INVALID",
 198         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 199         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 200         "CXN_INVALIDATE_NOTIFY",
 201         "CXN_INVALIDATE_INDEX_NOTIFY",
 202         "CMD_INVALIDATED_NOTIFY",
 203         "UNSOL_HDR_NOTIFY",
 204         "UNSOL_DATA_NOTIFY",
 205         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 206         "DRIVERMSG_NOTIFY",
 207         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 208         "SOL_CMD_KILLED_DIF_ERR",
 209         "CXN_KILLED_SYN_RCVD",
 210         "CXN_KILLED_IMM_DATA_RCVD"
 211 };
 212
 213 static int beiscsi_slave_configure(struct scsi_device *sdev)
 214 {
 215         blk_queue_max_segment_size(sdev->request_queue, 65536);
 216         return 0;
 217 }
 218
 219 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 220 {
 221         struct iscsi_cls_session *cls_session;
 222         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 223         struct beiscsi_io_task *aborted_io_task;
 224         struct iscsi_conn *conn;
 225         struct beiscsi_conn *beiscsi_conn;
 226         struct beiscsi_hba *phba;
 227         struct iscsi_session *session;
 228         struct invalidate_command_table *inv_tbl;
 229         struct be_dma_mem nonemb_cmd;
 230         unsigned int cid, tag, num_invalidate;
 231
 232         cls_session = starget_to_session(scsi_target(sc->device));
 233         session = cls_session->dd_data;
 234
 235         spin_lock_bh(&session->lock);
 236         if (!aborted_task || !aborted_task->sc) {
 237                 /* we raced */
 238                 spin_unlock_bh(&session->lock);
 239                 return SUCCESS;
 240         }
 241
 242         aborted_io_task = aborted_task->dd_data;
 243         if (!aborted_io_task->scsi_cmnd) {
 244                 /* raced or invalid command */
 245                 spin_unlock_bh(&session->lock);
 246                 return SUCCESS;
 247         }
 248         spin_unlock_bh(&session->lock);
 249         /* Invalidate WRB Posted for this Task */
 250         AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 251                       aborted_io_task->pwrb_handle->pwrb,
 252                       1);
 253
 254         conn = aborted_task->conn;
 255         beiscsi_conn = conn->dd_data;
 256         phba = beiscsi_conn->phba;
 257
 258         /* invalidate iocb */
 259         cid = beiscsi_conn->beiscsi_conn_cid;
 260         inv_tbl = phba->inv_tbl;
 261         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 262         inv_tbl->cid = cid;
 263         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 264         num_invalidate = 1;
 265         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 266                                 sizeof(struct invalidate_commands_params_in),
 267                                 &nonemb_cmd.dma);
 268         if (nonemb_cmd.va == NULL) {
 269                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 270                             "BM_%d : Failed to allocate memory for"
 271                             "mgmt_invalidate_icds\n");
 272                 return FAILED;
 273         }
 274         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 275
 276         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 277                                    cid, &nonemb_cmd);
 278         if (!tag) {
 279                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 280                             "BM_%d : mgmt_invalidate_icds could not be"
 281                             "submitted\n");
 282                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 283                                     nonemb_cmd.va, nonemb_cmd.dma);
 284
 285                 return FAILED;
 286         }
 287
 288         beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
 289         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 290                             nonemb_cmd.va, nonemb_cmd.dma);
 291         return iscsi_eh_abort(sc);
 292 }
 293
 294 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 295 {
 296         struct iscsi_task *abrt_task;
 297         struct beiscsi_io_task *abrt_io_task;
 298         struct iscsi_conn *conn;
 299         struct beiscsi_conn *beiscsi_conn;
 300         struct beiscsi_hba *phba;
 301         struct iscsi_session *session;
 302         struct iscsi_cls_session *cls_session;
 303         struct invalidate_command_table *inv_tbl;
 304         struct be_dma_mem nonemb_cmd;
 305         unsigned int cid, tag, i, num_invalidate;
 306
 307         /* invalidate iocbs */
 308         cls_session = starget_to_session(scsi_target(sc->device));
 309         session = cls_session->dd_data;
 310         spin_lock_bh(&session->lock);
 311         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 312                 spin_unlock_bh(&session->lock);
 313                 return FAILED;
 314         }
 315         conn = session->leadconn;
 316         beiscsi_conn = conn->dd_data;
 317         phba = beiscsi_conn->phba;
 318         cid = beiscsi_conn->beiscsi_conn_cid;
 319         inv_tbl = phba->inv_tbl;
 320         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 321         num_invalidate = 0;
 322         for (i = 0; i < conn->session->cmds_max; i++) {
 323                 abrt_task = conn->session->cmds[i];
 324                 abrt_io_task = abrt_task->dd_data;
 325                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 326                         continue;
 327
 328                 if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
 329                         continue;
 330
 331                 /* Invalidate WRB Posted for this Task */
 332                 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 333                               abrt_io_task->pwrb_handle->pwrb,
 334                               1);
 335
 336                 inv_tbl->cid = cid;
 337                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 338                 num_invalidate++;
 339                 inv_tbl++;
 340         }
 341         spin_unlock_bh(&session->lock);
 342         inv_tbl = phba->inv_tbl;
 343
 344         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 345                                 sizeof(struct invalidate_commands_params_in),
 346                                 &nonemb_cmd.dma);
 347         if (nonemb_cmd.va == NULL) {
 348                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 349                             "BM_%d : Failed to allocate memory for"
 350                             "mgmt_invalidate_icds\n");
 351                 return FAILED;
 352         }
 353         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 354         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 355         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 356                                    cid, &nonemb_cmd);
 357         if (!tag) {
 358                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 359                             "BM_%d : mgmt_invalidate_icds could not be"
 360                             " submitted\n");
 361                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 362                                     nonemb_cmd.va, nonemb_cmd.dma);
 363                 return FAILED;
 364         }
 365
 366         beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
 367         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 368                             nonemb_cmd.va, nonemb_cmd.dma);
 369         return iscsi_eh_device_reset(sc);
 370 }
 371
 372 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
 373 {
 374         struct beiscsi_hba *phba = data;
 375         struct mgmt_session_info *boot_sess = &phba->boot_sess;
 376         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
 377         char *str = buf;
 378         int rc;
 379
 380         switch (type) {
 381         case ISCSI_BOOT_TGT_NAME:
 382                 rc = sprintf(buf, "%.*s\n",
 383                             (int)strlen(boot_sess->target_name),
 384                             (char *)&boot_sess->target_name);
 385                 break;
 386         case ISCSI_BOOT_TGT_IP_ADDR:
 387                 if (boot_conn->dest_ipaddr.ip_type == 0x1)
 388                         rc = sprintf(buf, "%pI4\n",
 389                                 (char *)&boot_conn->dest_ipaddr.addr);
 390                 else
 391                         rc = sprintf(str, "%pI6\n",
 392                                 (char *)&boot_conn->dest_ipaddr.addr);
 393                 break;
 394         case ISCSI_BOOT_TGT_PORT:
 395                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
 396                 break;
 397
 398         case ISCSI_BOOT_TGT_CHAP_NAME:
 399                 rc = sprintf(str,  "%.*s\n",
 400                              boot_conn->negotiated_login_options.auth_data.chap.
 401                              target_chap_name_length,
 402                              (char *)&boot_conn->negotiated_login_options.
 403                              auth_data.chap.target_chap_name);
 404                 break;
 405         case ISCSI_BOOT_TGT_CHAP_SECRET:
 406                 rc = sprintf(str,  "%.*s\n",
 407                              boot_conn->negotiated_login_options.auth_data.chap.
 408                              target_secret_length,
 409                              (char *)&boot_conn->negotiated_login_options.
 410                              auth_data.chap.target_secret);
 411                 break;
 412         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 413                 rc = sprintf(str,  "%.*s\n",
 414                              boot_conn->negotiated_login_options.auth_data.chap.
 415                              intr_chap_name_length,
 416                              (char *)&boot_conn->negotiated_login_options.
 417                              auth_data.chap.intr_chap_name);
 418                 break;
 419         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 420                 rc = sprintf(str,  "%.*s\n",
 421                              boot_conn->negotiated_login_options.auth_data.chap.
 422                              intr_secret_length,
 423                              (char *)&boot_conn->negotiated_login_options.
 424                              auth_data.chap.intr_secret);
 425                 break;
 426         case ISCSI_BOOT_TGT_FLAGS:
 427                 rc = sprintf(str, "2\n");
 428                 break;
 429         case ISCSI_BOOT_TGT_NIC_ASSOC:
 430                 rc = sprintf(str, "0\n");
 431                 break;
 432         default:
 433                 rc = -ENOSYS;
 434                 break;
 435         }
 436         return rc;
 437 }
 438
 439 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
 440 {
 441         struct beiscsi_hba *phba = data;
 442         char *str = buf;
 443         int rc;
 444
 445         switch (type) {
 446         case ISCSI_BOOT_INI_INITIATOR_NAME:
 447                 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
 448                 break;
 449         default:
 450                 rc = -ENOSYS;
 451                 break;
 452         }
 453         return rc;
 454 }
 455
 456 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
 457 {
 458         struct beiscsi_hba *phba = data;
 459         char *str = buf;
 460         int rc;
 461
 462         switch (type) {
 463         case ISCSI_BOOT_ETH_FLAGS:
 464                 rc = sprintf(str, "2\n");
 465                 break;
 466         case ISCSI_BOOT_ETH_INDEX:
 467                 rc = sprintf(str, "0\n");
 468                 break;
 469         case ISCSI_BOOT_ETH_MAC:
 470                 rc  = beiscsi_get_macaddr(str, phba);
 471                 break;
 472         default:
 473                 rc = -ENOSYS;
 474                 break;
 475         }
 476         return rc;
 477 }
 478
 479
 480 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
 481 {
 482         umode_t rc;
 483
 484         switch (type) {
 485         case ISCSI_BOOT_TGT_NAME:
 486         case ISCSI_BOOT_TGT_IP_ADDR:
 487         case ISCSI_BOOT_TGT_PORT:
 488         case ISCSI_BOOT_TGT_CHAP_NAME:
 489         case ISCSI_BOOT_TGT_CHAP_SECRET:
 490         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 491         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 492         case ISCSI_BOOT_TGT_NIC_ASSOC:
 493         case ISCSI_BOOT_TGT_FLAGS:
 494                 rc = S_IRUGO;
 495                 break;
 496         default:
 497                 rc = 0;
 498                 break;
 499         }
 500         return rc;
 501 }
 502
 503 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
 504 {
 505         umode_t rc;
 506
 507         switch (type) {
 508         case ISCSI_BOOT_INI_INITIATOR_NAME:
 509                 rc = S_IRUGO;
 510                 break;
 511         default:
 512                 rc = 0;
 513                 break;
 514         }
 515         return rc;
 516 }
 517
 518
 519 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
 520 {
 521         umode_t rc;
 522
 523         switch (type) {
 524         case ISCSI_BOOT_ETH_FLAGS:
 525         case ISCSI_BOOT_ETH_MAC:
 526         case ISCSI_BOOT_ETH_INDEX:
 527                 rc = S_IRUGO;
 528                 break;
 529         default:
 530                 rc = 0;
 531                 break;
 532         }
 533         return rc;
 534 }
 535
 536 /*------------------- PCI Driver operations and data ----------------- */
 537 static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
 538         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 539         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 540         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 541         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 542         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 543         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 544         { 0 }
 545 };
 546 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 547
 548
 549 static struct scsi_host_template beiscsi_sht = {
 550         .module = THIS_MODULE,
 551         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 552         .proc_name = DRV_NAME,
 553         .queuecommand = iscsi_queuecommand,
 554         .change_queue_depth = iscsi_change_queue_depth,
 555         .slave_configure = beiscsi_slave_configure,
 556         .target_alloc = iscsi_target_alloc,
 557         .eh_abort_handler = beiscsi_eh_abort,
 558         .eh_device_reset_handler = beiscsi_eh_device_reset,
 559         .eh_target_reset_handler = iscsi_eh_session_reset,
 560         .shost_attrs = beiscsi_attrs,
 561         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 562         .can_queue = BE2_IO_DEPTH,
 563         .this_id = -1,
 564         .max_sectors = BEISCSI_MAX_SECTORS,
 565         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 566         .use_clustering = ENABLE_CLUSTERING,
 567         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 568
 569 };
 570
 571 static struct scsi_transport_template *beiscsi_scsi_transport;
 572
 573 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 574 {
 575         struct beiscsi_hba *phba;
 576         struct Scsi_Host *shost;
 577
 578         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 579         if (!shost) {
 580                 dev_err(&pcidev->dev,
 581                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 582                 return NULL;
 583         }
 584         shost->dma_boundary = pcidev->dma_mask;
 585         shost->max_id = BE2_MAX_SESSIONS;
 586         shost->max_channel = 0;
 587         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 588         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 589         shost->transportt = beiscsi_scsi_transport;
 590         phba = iscsi_host_priv(shost);
 591         memset(phba, 0, sizeof(*phba));
 592         phba->shost = shost;
 593         phba->pcidev = pci_dev_get(pcidev);
 594         pci_set_drvdata(pcidev, phba);
 595         phba->interface_handle = 0xFFFFFFFF;
 596
 597         if (iscsi_host_add(shost, &phba->pcidev->dev))
 598                 goto free_devices;
 599
 600         return phba;
 601
 602 free_devices:
 603         pci_dev_put(phba->pcidev);
 604         iscsi_host_free(phba->shost);
 605         return NULL;
 606 }
 607
 608 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 609 {
 610         if (phba->csr_va) {
 611                 iounmap(phba->csr_va);
 612                 phba->csr_va = NULL;
 613         }
 614         if (phba->db_va) {
 615                 iounmap(phba->db_va);
 616                 phba->db_va = NULL;
 617         }
 618         if (phba->pci_va) {
 619                 iounmap(phba->pci_va);
 620                 phba->pci_va = NULL;
 621         }
 622 }
 623
 624 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 625                                 struct pci_dev *pcidev)
 626 {
 627         u8 __iomem *addr;
 628         int pcicfg_reg;
 629
 630         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 631                                pci_resource_len(pcidev, 2));
 632         if (addr == NULL)
 633                 return -ENOMEM;
 634         phba->ctrl.csr = addr;
 635         phba->csr_va = addr;
 636         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 637
 638         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 639         if (addr == NULL)
 640                 goto pci_map_err;
 641         phba->ctrl.db = addr;
 642         phba->db_va = addr;
 643         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 644
 645         if (phba->generation == BE_GEN2)
 646                 pcicfg_reg = 1;
 647         else
 648                 pcicfg_reg = 0;
 649
 650         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 651                                pci_resource_len(pcidev, pcicfg_reg));
 652
 653         if (addr == NULL)
 654                 goto pci_map_err;
 655         phba->ctrl.pcicfg = addr;
 656         phba->pci_va = addr;
 657         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 658         return 0;
 659
 660 pci_map_err:
 661         beiscsi_unmap_pci_function(phba);
 662         return -ENOMEM;
 663 }
 664
 665 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 666 {
 667         int ret;
 668
 669         ret = pci_enable_device(pcidev);
 670         if (ret) {
 671                 dev_err(&pcidev->dev,
 672                         "beiscsi_enable_pci - enable device failed\n");
 673                 return ret;
 674         }
 675
 676         pci_set_master(pcidev);
 677         if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
 678                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
 679                 if (ret) {
 680                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 681                         pci_disable_device(pcidev);
 682                         return ret;
 683                 }
 684         }
 685         return 0;
 686 }
 687
 688 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 689 {
 690         struct be_ctrl_info *ctrl = &phba->ctrl;
 691         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 692         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 693         int status = 0;
 694
 695         ctrl->pdev = pdev;
 696         status = beiscsi_map_pci_bars(phba, pdev);
 697         if (status)
 698                 return status;
 699         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 700         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 701                                                   mbox_mem_alloc->size,
 702                                                   &mbox_mem_alloc->dma);
 703         if (!mbox_mem_alloc->va) {
 704                 beiscsi_unmap_pci_function(phba);
 705                 return -ENOMEM;
 706         }
 707
 708         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 709         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 710         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 711         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 712         spin_lock_init(&ctrl->mbox_lock);
 713         spin_lock_init(&phba->ctrl.mcc_lock);
 714         spin_lock_init(&phba->ctrl.mcc_cq_lock);
 715
 716         return status;
 717 }
 718
 719 /**
 720  * beiscsi_get_params()- Set the config paramters
 721  * @phba: ptr  device priv structure
 722  **/
 723 static void beiscsi_get_params(struct beiscsi_hba *phba)
 724 {
 725         uint32_t total_cid_count = 0;
 726         uint32_t total_icd_count = 0;
 727         uint8_t ulp_num = 0;
 728
 729         total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
 730                           BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
 731
 732         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
 733                 uint32_t align_mask = 0;
 734                 uint32_t icd_post_per_page = 0;
 735                 uint32_t icd_count_unavailable = 0;
 736                 uint32_t icd_start = 0, icd_count = 0;
 737                 uint32_t icd_start_align = 0, icd_count_align = 0;
 738
 739                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
 740                         icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
 741                         icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 742
 743                         /* Get ICD count that can be posted on each page */
 744                         icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
 745                                              sizeof(struct iscsi_sge)));
 746                         align_mask = (icd_post_per_page - 1);
 747
 748                         /* Check if icd_start is aligned ICD per page posting */
 749                         if (icd_start % icd_post_per_page) {
 750                                 icd_start_align = ((icd_start +
 751                                                     icd_post_per_page) &
 752                                                     ~(align_mask));
 753                                 phba->fw_config.
 754                                         iscsi_icd_start[ulp_num] =
 755                                         icd_start_align;
 756                         }
 757
 758                         icd_count_align = (icd_count & ~align_mask);
 759
 760                         /* ICD discarded in the process of alignment */
 761                         if (icd_start_align)
 762                                 icd_count_unavailable = ((icd_start_align -
 763                                                           icd_start) +
 764                                                          (icd_count -
 765                                                           icd_count_align));
 766
 767                         /* Updated ICD count available */
 768                         phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
 769                                         icd_count_unavailable);
 770
 771                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 772                                         "BM_%d : Aligned ICD values\n"
 773                                         "\t ICD Start : %d\n"
 774                                         "\t ICD Count : %d\n"
 775                                         "\t ICD Discarded : %d\n",
 776                                         phba->fw_config.
 777                                         iscsi_icd_start[ulp_num],
 778                                         phba->fw_config.
 779                                         iscsi_icd_count[ulp_num],
 780                                         icd_count_unavailable);
 781                         break;
 782                 }
 783         }
 784
 785         total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 786         phba->params.ios_per_ctrl = (total_icd_count -
 787                                     (total_cid_count +
 788                                      BE2_TMFS + BE2_NOPOUT_REQ));
 789         phba->params.cxns_per_ctrl = total_cid_count;
 790         phba->params.asyncpdus_per_ctrl = total_cid_count;
 791         phba->params.icds_per_ctrl = total_icd_count;
 792         phba->params.num_sge_per_io = BE2_SGE;
 793         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 794         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 795         phba->params.eq_timer = 64;
 796         phba->params.num_eq_entries = 1024;
 797         phba->params.num_cq_entries = 1024;
 798         phba->params.wrbs_per_cxn = 256;
 799 }
 800
 801 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 802                            unsigned int id, unsigned int clr_interrupt,
 803                            unsigned int num_processed,
 804                            unsigned char rearm, unsigned char event)
 805 {
 806         u32 val = 0;
 807         val |= id & DB_EQ_RING_ID_MASK;
 808         if (rearm)
 809                 val |= 1 << DB_EQ_REARM_SHIFT;
 810         if (clr_interrupt)
 811                 val |= 1 << DB_EQ_CLR_SHIFT;
 812         if (event)
 813                 val |= 1 << DB_EQ_EVNT_SHIFT;
 814         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 815         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 816 }
 817
 818 /**
 819  * be_isr_mcc - The isr routine of the driver.
 820  * @irq: Not used
 821  * @dev_id: Pointer to host adapter structure
 822  */
 823 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 824 {
 825         struct beiscsi_hba *phba;
 826         struct be_eq_entry *eqe = NULL;
 827         struct be_queue_info *eq;
 828         struct be_queue_info *mcc;
 829         unsigned int num_eq_processed;
 830         struct be_eq_obj *pbe_eq;
 831         unsigned long flags;
 832
 833         pbe_eq = dev_id;
 834         eq = &pbe_eq->q;
 835         phba =  pbe_eq->phba;
 836         mcc = &phba->ctrl.mcc_obj.cq;
 837         eqe = queue_tail_node(eq);
 838
 839         num_eq_processed = 0;
 840
 841         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 842                                 & EQE_VALID_MASK) {
 843                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 844                      resource_id) / 32] &
 845                      EQE_RESID_MASK) >> 16) == mcc->id) {
 846                         spin_lock_irqsave(&phba->isr_lock, flags);
 847                         pbe_eq->todo_mcc_cq = true;
 848                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 849                 }
 850                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 851                 queue_tail_inc(eq);
 852                 eqe = queue_tail_node(eq);
 853                 num_eq_processed++;
 854         }
 855         if (pbe_eq->todo_mcc_cq)
 856                 queue_work(phba->wq, &pbe_eq->work_cqs);
 857         if (num_eq_processed)
 858                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 859
 860         return IRQ_HANDLED;
 861 }
 862
 863 /**
 864  * be_isr_msix - The isr routine of the driver.
 865  * @irq: Not used
 866  * @dev_id: Pointer to host adapter structure
 867  */
 868 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 869 {
 870         struct beiscsi_hba *phba;
 871         struct be_eq_entry *eqe = NULL;
 872         struct be_queue_info *eq;
 873         struct be_queue_info *cq;
 874         unsigned int num_eq_processed;
 875         struct be_eq_obj *pbe_eq;
 876         unsigned long flags;
 877
 878         pbe_eq = dev_id;
 879         eq = &pbe_eq->q;
 880         cq = pbe_eq->cq;
 881         eqe = queue_tail_node(eq);
 882
 883         phba = pbe_eq->phba;
 884         num_eq_processed = 0;
 885         if (blk_iopoll_enabled) {
 886                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 887                                         & EQE_VALID_MASK) {
 888                         if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 889                                 blk_iopoll_sched(&pbe_eq->iopoll);
 890
 891                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 892                         queue_tail_inc(eq);
 893                         eqe = queue_tail_node(eq);
 894                         num_eq_processed++;
 895                 }
 896         } else {
 897                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 898                                                 & EQE_VALID_MASK) {
 899                         spin_lock_irqsave(&phba->isr_lock, flags);
 900                         pbe_eq->todo_cq = true;
 901                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 902                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 903                         queue_tail_inc(eq);
 904                         eqe = queue_tail_node(eq);
 905                         num_eq_processed++;
 906                 }
 907
 908                 if (pbe_eq->todo_cq)
 909                         queue_work(phba->wq, &pbe_eq->work_cqs);
 910         }
 911
 912         if (num_eq_processed)
 913                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
 914
 915         return IRQ_HANDLED;
 916 }
 917
 918 /**
 919  * be_isr - The isr routine of the driver.
 920  * @irq: Not used
 921  * @dev_id: Pointer to host adapter structure
 922  */
 923 static irqreturn_t be_isr(int irq, void *dev_id)
 924 {
 925         struct beiscsi_hba *phba;
 926         struct hwi_controller *phwi_ctrlr;
 927         struct hwi_context_memory *phwi_context;
 928         struct be_eq_entry *eqe = NULL;
 929         struct be_queue_info *eq;
 930         struct be_queue_info *cq;
 931         struct be_queue_info *mcc;
 932         unsigned long flags, index;
 933         unsigned int num_mcceq_processed, num_ioeq_processed;
 934         struct be_ctrl_info *ctrl;
 935         struct be_eq_obj *pbe_eq;
 936         int isr;
 937
 938         phba = dev_id;
 939         ctrl = &phba->ctrl;
 940         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 941                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 942         if (!isr)
 943                 return IRQ_NONE;
 944
 945         phwi_ctrlr = phba->phwi_ctrlr;
 946         phwi_context = phwi_ctrlr->phwi_ctxt;
 947         pbe_eq = &phwi_context->be_eq[0];
 948
 949         eq = &phwi_context->be_eq[0].q;
 950         mcc = &phba->ctrl.mcc_obj.cq;
 951         index = 0;
 952         eqe = queue_tail_node(eq);
 953
 954         num_ioeq_processed = 0;
 955         num_mcceq_processed = 0;
 956         if (blk_iopoll_enabled) {
 957                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 958                                         & EQE_VALID_MASK) {
 959                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 960                              resource_id) / 32] &
 961                              EQE_RESID_MASK) >> 16) == mcc->id) {
 962                                 spin_lock_irqsave(&phba->isr_lock, flags);
 963                                 pbe_eq->todo_mcc_cq = true;
 964                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 965                                 num_mcceq_processed++;
 966                         } else {
 967                                 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 968                                         blk_iopoll_sched(&pbe_eq->iopoll);
 969                                 num_ioeq_processed++;
 970                         }
 971                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 972                         queue_tail_inc(eq);
 973                         eqe = queue_tail_node(eq);
 974                 }
 975                 if (num_ioeq_processed || num_mcceq_processed) {
 976                         if (pbe_eq->todo_mcc_cq)
 977                                 queue_work(phba->wq, &pbe_eq->work_cqs);
 978
 979                         if ((num_mcceq_processed) && (!num_ioeq_processed))
 980                                 hwi_ring_eq_db(phba, eq->id, 0,
 981                                               (num_ioeq_processed +
 982                                                num_mcceq_processed) , 1, 1);
 983                         else
 984                                 hwi_ring_eq_db(phba, eq->id, 0,
 985                                                (num_ioeq_processed +
 986                                                 num_mcceq_processed), 0, 1);
 987
 988                         return IRQ_HANDLED;
 989                 } else
 990                         return IRQ_NONE;
 991         } else {
 992                 cq = &phwi_context->be_cq[0];
 993                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 994                                                 & EQE_VALID_MASK) {
 995
 996                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 997                              resource_id) / 32] &
 998                              EQE_RESID_MASK) >> 16) != cq->id) {
 999                                 spin_lock_irqsave(&phba->isr_lock, flags);
1000                                 pbe_eq->todo_mcc_cq = true;
1001                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
1002                         } else {
1003                                 spin_lock_irqsave(&phba->isr_lock, flags);
1004                                 pbe_eq->todo_cq = true;
1005                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
1006                         }
1007                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
1008                         queue_tail_inc(eq);
1009                         eqe = queue_tail_node(eq);
1010                         num_ioeq_processed++;
1011                 }
1012                 if (pbe_eq->todo_cq || pbe_eq->todo_mcc_cq)
1013                         queue_work(phba->wq, &pbe_eq->work_cqs);
1014
1015                 if (num_ioeq_processed) {
1016                         hwi_ring_eq_db(phba, eq->id, 0,
1017                                        num_ioeq_processed, 1, 1);
1018                         return IRQ_HANDLED;
1019                 } else
1020                         return IRQ_NONE;
1021         }
1022 }
1023
1024 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
1025 {
1026         struct pci_dev *pcidev = phba->pcidev;
1027         struct hwi_controller *phwi_ctrlr;
1028         struct hwi_context_memory *phwi_context;
1029         int ret, msix_vec, i, j;
1030
1031         phwi_ctrlr = phba->phwi_ctrlr;
1032         phwi_context = phwi_ctrlr->phwi_ctxt;
1033
1034         if (phba->msix_enabled) {
1035                 for (i = 0; i < phba->num_cpus; i++) {
1036                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
1037                                                     GFP_KERNEL);
1038                         if (!phba->msi_name[i]) {
1039                                 ret = -ENOMEM;
1040                                 goto free_msix_irqs;
1041                         }
1042
1043                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
1044                                 phba->shost->host_no, i);
1045                         msix_vec = phba->msix_entries[i].vector;
1046                         ret = request_irq(msix_vec, be_isr_msix, 0,
1047                                           phba->msi_name[i],
1048                                           &phwi_context->be_eq[i]);
1049                         if (ret) {
1050                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1051                                             "BM_%d : beiscsi_init_irqs-Failed to"
1052                                             "register msix for i = %d\n",
1053                                             i);
1054                                 kfree(phba->msi_name[i]);
1055                                 goto free_msix_irqs;
1056                         }
1057                 }
1058                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
1059                 if (!phba->msi_name[i]) {
1060                         ret = -ENOMEM;
1061                         goto free_msix_irqs;
1062                 }
1063                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
1064                         phba->shost->host_no);
1065                 msix_vec = phba->msix_entries[i].vector;
1066                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
1067                                   &phwi_context->be_eq[i]);
1068                 if (ret) {
1069                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1070                                     "BM_%d : beiscsi_init_irqs-"
1071                                     "Failed to register beiscsi_msix_mcc\n");
1072                         kfree(phba->msi_name[i]);
1073                         goto free_msix_irqs;
1074                 }
1075
1076         } else {
1077                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1078                                   "beiscsi", phba);
1079                 if (ret) {
1080                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1081                                     "BM_%d : beiscsi_init_irqs-"
1082                                     "Failed to register irq\\n");
1083                         return ret;
1084                 }
1085         }
1086         return 0;
1087 free_msix_irqs:
1088         for (j = i - 1; j >= 0; j--) {
1089                 kfree(phba->msi_name[j]);
1090                 msix_vec = phba->msix_entries[j].vector;
1091                 free_irq(msix_vec, &phwi_context->be_eq[j]);
1092         }
1093         return ret;
1094 }
1095
1096 static void hwi_ring_cq_db(struct beiscsi_hba *phba,
1097                            unsigned int id, unsigned int num_processed,
1098                            unsigned char rearm, unsigned char event)
1099 {
1100         u32 val = 0;
1101         val |= id & DB_CQ_RING_ID_MASK;
1102         if (rearm)
1103                 val |= 1 << DB_CQ_REARM_SHIFT;
1104         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1105         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1106 }
1107
1108 static unsigned int
1109 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1110                           struct beiscsi_hba *phba,
1111                           struct pdu_base *ppdu,
1112                           unsigned long pdu_len,
1113                           void *pbuffer, unsigned long buf_len)
1114 {
1115         struct iscsi_conn *conn = beiscsi_conn->conn;
1116         struct iscsi_session *session = conn->session;
1117         struct iscsi_task *task;
1118         struct beiscsi_io_task *io_task;
1119         struct iscsi_hdr *login_hdr;
1120
1121         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1122                                                 PDUBASE_OPCODE_MASK) {
1123         case ISCSI_OP_NOOP_IN:
1124                 pbuffer = NULL;
1125                 buf_len = 0;
1126                 break;
1127         case ISCSI_OP_ASYNC_EVENT:
1128                 break;
1129         case ISCSI_OP_REJECT:
1130                 WARN_ON(!pbuffer);
1131                 WARN_ON(!(buf_len == 48));
1132                 beiscsi_log(phba, KERN_ERR,
1133                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1134                             "BM_%d : In ISCSI_OP_REJECT\n");
1135                 break;
1136         case ISCSI_OP_LOGIN_RSP:
1137         case ISCSI_OP_TEXT_RSP:
1138                 task = conn->login_task;
1139                 io_task = task->dd_data;
1140                 login_hdr = (struct iscsi_hdr *)ppdu;
1141                 login_hdr->itt = io_task->libiscsi_itt;
1142                 break;
1143         default:
1144                 beiscsi_log(phba, KERN_WARNING,
1145                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1146                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1147                             (ppdu->
1148                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
1149                              & PDUBASE_OPCODE_MASK));
1150                 return 1;
1151         }
1152
1153         spin_lock_bh(&session->lock);
1154         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1155         spin_unlock_bh(&session->lock);
1156         return 0;
1157 }
1158
1159 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1160 {
1161         struct sgl_handle *psgl_handle;
1162
1163         if (phba->io_sgl_hndl_avbl) {
1164                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1165                             "BM_%d : In alloc_io_sgl_handle,"
1166                             " io_sgl_alloc_index=%d\n",
1167                             phba->io_sgl_alloc_index);
1168
1169                 psgl_handle = phba->io_sgl_hndl_base[phba->
1170                                                 io_sgl_alloc_index];
1171                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1172                 phba->io_sgl_hndl_avbl--;
1173                 if (phba->io_sgl_alloc_index == (phba->params.
1174                                                  ios_per_ctrl - 1))
1175                         phba->io_sgl_alloc_index = 0;
1176                 else
1177                         phba->io_sgl_alloc_index++;
1178         } else
1179                 psgl_handle = NULL;
1180         return psgl_handle;
1181 }
1182
1183 static void
1184 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1185 {
1186         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1187                     "BM_%d : In free_,io_sgl_free_index=%d\n",
1188                     phba->io_sgl_free_index);
1189
1190         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1191                 /*
1192                  * this can happen if clean_task is called on a task that
1193                  * failed in xmit_task or alloc_pdu.
1194                  */
1195                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1196                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1197                              "value there=%p\n", phba->io_sgl_free_index,
1198                              phba->io_sgl_hndl_base
1199                              [phba->io_sgl_free_index]);
1200                 return;
1201         }
1202         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1203         phba->io_sgl_hndl_avbl++;
1204         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1205                 phba->io_sgl_free_index = 0;
1206         else
1207                 phba->io_sgl_free_index++;
1208 }
1209
1210 /**
1211  * alloc_wrb_handle - To allocate a wrb handle
1212  * @phba: The hba pointer
1213  * @cid: The cid to use for allocation
1214  *
1215  * This happens under session_lock until submission to chip
1216  */
1217 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
1218 {
1219         struct hwi_wrb_context *pwrb_context;
1220         struct hwi_controller *phwi_ctrlr;
1221         struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
1222         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1223
1224         phwi_ctrlr = phba->phwi_ctrlr;
1225         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1226         if (pwrb_context->wrb_handles_available >= 2) {
1227                 pwrb_handle = pwrb_context->pwrb_handle_base[
1228                                             pwrb_context->alloc_index];
1229                 pwrb_context->wrb_handles_available--;
1230                 if (pwrb_context->alloc_index ==
1231                                                 (phba->params.wrbs_per_cxn - 1))
1232                         pwrb_context->alloc_index = 0;
1233                 else
1234                         pwrb_context->alloc_index++;
1235                 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1236                                                 pwrb_context->alloc_index];
1237                 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
1238         } else
1239                 pwrb_handle = NULL;
1240         return pwrb_handle;
1241 }
1242
1243 /**
1244  * free_wrb_handle - To free the wrb handle back to pool
1245  * @phba: The hba pointer
1246  * @pwrb_context: The context to free from
1247  * @pwrb_handle: The wrb_handle to free
1248  *
1249  * This happens under session_lock until submission to chip
1250  */
1251 static void
1252 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1253                 struct wrb_handle *pwrb_handle)
1254 {
1255         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1256         pwrb_context->wrb_handles_available++;
1257         if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1258                 pwrb_context->free_index = 0;
1259         else
1260                 pwrb_context->free_index++;
1261
1262         beiscsi_log(phba, KERN_INFO,
1263                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1264                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1265                     "wrb_handles_available=%d\n",
1266                     pwrb_handle, pwrb_context->free_index,
1267                     pwrb_context->wrb_handles_available);
1268 }
1269
1270 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1271 {
1272         struct sgl_handle *psgl_handle;
1273
1274         if (phba->eh_sgl_hndl_avbl) {
1275                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1276                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1277                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1278                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1279                             phba->eh_sgl_alloc_index,
1280                             phba->eh_sgl_alloc_index);
1281
1282                 phba->eh_sgl_hndl_avbl--;
1283                 if (phba->eh_sgl_alloc_index ==
1284                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1285                      1))
1286                         phba->eh_sgl_alloc_index = 0;
1287                 else
1288                         phba->eh_sgl_alloc_index++;
1289         } else
1290                 psgl_handle = NULL;
1291         return psgl_handle;
1292 }
1293
1294 void
1295 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1296 {
1297
1298         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1299                     "BM_%d : In  free_mgmt_sgl_handle,"
1300                     "eh_sgl_free_index=%d\n",
1301                     phba->eh_sgl_free_index);
1302
1303         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1304                 /*
1305                  * this can happen if clean_task is called on a task that
1306                  * failed in xmit_task or alloc_pdu.
1307                  */
1308                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1309                             "BM_%d : Double Free in eh SGL ,"
1310                             "eh_sgl_free_index=%d\n",
1311                             phba->eh_sgl_free_index);
1312                 return;
1313         }
1314         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1315         phba->eh_sgl_hndl_avbl++;
1316         if (phba->eh_sgl_free_index ==
1317             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1318                 phba->eh_sgl_free_index = 0;
1319         else
1320                 phba->eh_sgl_free_index++;
1321 }
1322
1323 static void
1324 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1325                 struct iscsi_task *task,
1326                 struct common_sol_cqe *csol_cqe)
1327 {
1328         struct beiscsi_io_task *io_task = task->dd_data;
1329         struct be_status_bhs *sts_bhs =
1330                                 (struct be_status_bhs *)io_task->cmd_bhs;
1331         struct iscsi_conn *conn = beiscsi_conn->conn;
1332         unsigned char *sense;
1333         u32 resid = 0, exp_cmdsn, max_cmdsn;
1334         u8 rsp, status, flags;
1335
1336         exp_cmdsn = csol_cqe->exp_cmdsn;
1337         max_cmdsn = (csol_cqe->exp_cmdsn +
1338                      csol_cqe->cmd_wnd - 1);
1339         rsp = csol_cqe->i_resp;
1340         status = csol_cqe->i_sts;
1341         flags = csol_cqe->i_flags;
1342         resid = csol_cqe->res_cnt;
1343
1344         if (!task->sc) {
1345                 if (io_task->scsi_cmnd)
1346                         scsi_dma_unmap(io_task->scsi_cmnd);
1347
1348                 return;
1349         }
1350         task->sc->result = (DID_OK << 16) | status;
1351         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1352                 task->sc->result = DID_ERROR << 16;
1353                 goto unmap;
1354         }
1355
1356         /* bidi not initially supported */
1357         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1358                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1359                         task->sc->result = DID_ERROR << 16;
1360
1361                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1362                         scsi_set_resid(task->sc, resid);
1363                         if (!status && (scsi_bufflen(task->sc) - resid <
1364                             task->sc->underflow))
1365                                 task->sc->result = DID_ERROR << 16;
1366                 }
1367         }
1368
1369         if (status == SAM_STAT_CHECK_CONDITION) {
1370                 u16 sense_len;
1371                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1372
1373                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1374                 sense_len = be16_to_cpu(*slen);
1375                 memcpy(task->sc->sense_buffer, sense,
1376                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1377         }
1378
1379         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1380                 conn->rxdata_octets += resid;
1381 unmap:
1382         scsi_dma_unmap(io_task->scsi_cmnd);
1383         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1384 }
1385
1386 static void
1387 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1388                     struct iscsi_task *task,
1389                     struct common_sol_cqe *csol_cqe)
1390 {
1391         struct iscsi_logout_rsp *hdr;
1392         struct beiscsi_io_task *io_task = task->dd_data;
1393         struct iscsi_conn *conn = beiscsi_conn->conn;
1394
1395         hdr = (struct iscsi_logout_rsp *)task->hdr;
1396         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1397         hdr->t2wait = 5;
1398         hdr->t2retain = 0;
1399         hdr->flags = csol_cqe->i_flags;
1400         hdr->response = csol_cqe->i_resp;
1401         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1402         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1403                                      csol_cqe->cmd_wnd - 1);
1404
1405         hdr->dlength[0] = 0;
1406         hdr->dlength[1] = 0;
1407         hdr->dlength[2] = 0;
1408         hdr->hlength = 0;
1409         hdr->itt = io_task->libiscsi_itt;
1410         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1411 }
1412
1413 static void
1414 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1415                  struct iscsi_task *task,
1416                  struct common_sol_cqe *csol_cqe)
1417 {
1418         struct iscsi_tm_rsp *hdr;
1419         struct iscsi_conn *conn = beiscsi_conn->conn;
1420         struct beiscsi_io_task *io_task = task->dd_data;
1421
1422         hdr = (struct iscsi_tm_rsp *)task->hdr;
1423         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1424         hdr->flags = csol_cqe->i_flags;
1425         hdr->response = csol_cqe->i_resp;
1426         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1427         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1428                                      csol_cqe->cmd_wnd - 1);
1429
1430         hdr->itt = io_task->libiscsi_itt;
1431         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1432 }
1433
1434 static void
1435 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1436                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1437 {
1438         struct hwi_wrb_context *pwrb_context;
1439         struct wrb_handle *pwrb_handle = NULL;
1440         struct hwi_controller *phwi_ctrlr;
1441         struct iscsi_task *task;
1442         struct beiscsi_io_task *io_task;
1443         uint16_t wrb_index, cid, cri_index;
1444
1445         phwi_ctrlr = phba->phwi_ctrlr;
1446         if (is_chip_be2_be3r(phba)) {
1447                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1448                                           wrb_idx, psol);
1449                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1450                                     cid, psol);
1451         } else {
1452                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1453                                           wrb_idx, psol);
1454                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1455                                     cid, psol);
1456         }
1457
1458         cri_index = BE_GET_CRI_FROM_CID(cid);
1459         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1460         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1461         task = pwrb_handle->pio_handle;
1462
1463         io_task = task->dd_data;
1464         memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1465         iscsi_put_task(task);
1466 }
1467
1468 static void
1469 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1470                         struct iscsi_task *task,
1471                         struct common_sol_cqe *csol_cqe)
1472 {
1473         struct iscsi_nopin *hdr;
1474         struct iscsi_conn *conn = beiscsi_conn->conn;
1475         struct beiscsi_io_task *io_task = task->dd_data;
1476
1477         hdr = (struct iscsi_nopin *)task->hdr;
1478         hdr->flags = csol_cqe->i_flags;
1479         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1480         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1481                                      csol_cqe->cmd_wnd - 1);
1482
1483         hdr->opcode = ISCSI_OP_NOOP_IN;
1484         hdr->itt = io_task->libiscsi_itt;
1485         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1486 }
1487
1488 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1489                 struct sol_cqe *psol,
1490                 struct common_sol_cqe *csol_cqe)
1491 {
1492         if (is_chip_be2_be3r(phba)) {
1493                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1494                                                     i_exp_cmd_sn, psol);
1495                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1496                                                   i_res_cnt, psol);
1497                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1498                                                   i_cmd_wnd, psol);
1499                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1500                                                     wrb_index, psol);
1501                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1502                                               cid, psol);
1503                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1504                                                  hw_sts, psol);
1505                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1506                                                  i_resp, psol);
1507                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1508                                                 i_sts, psol);
1509                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1510                                                   i_flags, psol);
1511         } else {
1512                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1513                                                     i_exp_cmd_sn, psol);
1514                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1515                                                   i_res_cnt, psol);
1516                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1517                                                     wrb_index, psol);
1518                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1519                                               cid, psol);
1520                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1521                                                  hw_sts, psol);
1522                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1523                                                   i_cmd_wnd, psol);
1524                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1525                                   cmd_cmpl, psol))
1526                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1527                                                         i_sts, psol);
1528                 else
1529                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1530                                                          i_sts, psol);
1531                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1532                                   u, psol))
1533                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1534
1535                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1536                                   o, psol))
1537                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1538         }
1539 }
1540
1541
1542 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1543                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1544 {
1545         struct hwi_wrb_context *pwrb_context;
1546         struct wrb_handle *pwrb_handle;
1547         struct iscsi_wrb *pwrb = NULL;
1548         struct hwi_controller *phwi_ctrlr;
1549         struct iscsi_task *task;
1550         unsigned int type;
1551         struct iscsi_conn *conn = beiscsi_conn->conn;
1552         struct iscsi_session *session = conn->session;
1553         struct common_sol_cqe csol_cqe = {0};
1554         uint16_t cri_index = 0;
1555
1556         phwi_ctrlr = phba->phwi_ctrlr;
1557
1558         /* Copy the elements to a common structure */
1559         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1560
1561         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1562         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1563
1564         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1565                       csol_cqe.wrb_index];
1566
1567         task = pwrb_handle->pio_handle;
1568         pwrb = pwrb_handle->pwrb;
1569         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1570
1571         spin_lock_bh(&session->lock);
1572         switch (type) {
1573         case HWH_TYPE_IO:
1574         case HWH_TYPE_IO_RD:
1575                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1576                      ISCSI_OP_NOOP_OUT)
1577                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1578                 else
1579                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1580                 break;
1581
1582         case HWH_TYPE_LOGOUT:
1583                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1584                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1585                 else
1586                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1587                 break;
1588
1589         case HWH_TYPE_LOGIN:
1590                 beiscsi_log(phba, KERN_ERR,
1591                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1592                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1593                             " hwi_complete_cmd- Solicited path\n");
1594                 break;
1595
1596         case HWH_TYPE_NOP:
1597                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1598                 break;
1599
1600         default:
1601                 beiscsi_log(phba, KERN_WARNING,
1602                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1603                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1604                             "wrb_index 0x%x CID 0x%x\n", type,
1605                             csol_cqe.wrb_index,
1606                             csol_cqe.cid);
1607                 break;
1608         }
1609
1610         spin_unlock_bh(&session->lock);
1611 }
1612
1613 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1614                                           *pasync_ctx, unsigned int is_header,
1615                                           unsigned int host_write_ptr)
1616 {
1617         if (is_header)
1618                 return &pasync_ctx->async_entry[host_write_ptr].
1619                     header_busy_list;
1620         else
1621                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1622 }
1623
1624 static struct async_pdu_handle *
1625 hwi_get_async_handle(struct beiscsi_hba *phba,
1626                      struct beiscsi_conn *beiscsi_conn,
1627                      struct hwi_async_pdu_context *pasync_ctx,
1628                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1629 {
1630         struct be_bus_address phys_addr;
1631         struct list_head *pbusy_list;
1632         struct async_pdu_handle *pasync_handle = NULL;
1633         unsigned char is_header = 0;
1634         unsigned int index, dpl;
1635
1636         if (is_chip_be2_be3r(phba)) {
1637                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1638                                     dpl, pdpdu_cqe);
1639                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1640                                       index, pdpdu_cqe);
1641         } else {
1642                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1643                                     dpl, pdpdu_cqe);
1644                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1645                                       index, pdpdu_cqe);
1646         }
1647
1648         phys_addr.u.a32.address_lo =
1649                 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1650                                         db_addr_lo) / 32] - dpl);
1651         phys_addr.u.a32.address_hi =
1652                 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1653                                        db_addr_hi) / 32];
1654
1655         phys_addr.u.a64.address =
1656                         *((unsigned long long *)(&phys_addr.u.a64.address));
1657
1658         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1659                         & PDUCQE_CODE_MASK) {
1660         case UNSOL_HDR_NOTIFY:
1661                 is_header = 1;
1662
1663                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1664                                                       is_header, index);
1665                 break;
1666         case UNSOL_DATA_NOTIFY:
1667                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1668                                                       is_header, index);
1669                 break;
1670         default:
1671                 pbusy_list = NULL;
1672                 beiscsi_log(phba, KERN_WARNING,
1673                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1674                             "BM_%d : Unexpected code=%d\n",
1675                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1676                             code) / 32] & PDUCQE_CODE_MASK);
1677                 return NULL;
1678         }
1679
1680         WARN_ON(list_empty(pbusy_list));
1681         list_for_each_entry(pasync_handle, pbusy_list, link) {
1682                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1683                         break;
1684         }
1685
1686         WARN_ON(!pasync_handle);
1687
1688         pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(
1689                              beiscsi_conn->beiscsi_conn_cid);
1690         pasync_handle->is_header = is_header;
1691         pasync_handle->buffer_len = dpl;
1692         *pcq_index = index;
1693
1694         return pasync_handle;
1695 }
1696
1697 static unsigned int
1698 hwi_update_async_writables(struct beiscsi_hba *phba,
1699                             struct hwi_async_pdu_context *pasync_ctx,
1700                             unsigned int is_header, unsigned int cq_index)
1701 {
1702         struct list_head *pbusy_list;
1703         struct async_pdu_handle *pasync_handle;
1704         unsigned int num_entries, writables = 0;
1705         unsigned int *pep_read_ptr, *pwritables;
1706
1707         num_entries = pasync_ctx->num_entries;
1708         if (is_header) {
1709                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1710                 pwritables = &pasync_ctx->async_header.writables;
1711         } else {
1712                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1713                 pwritables = &pasync_ctx->async_data.writables;
1714         }
1715
1716         while ((*pep_read_ptr) != cq_index) {
1717                 (*pep_read_ptr)++;
1718                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1719
1720                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1721                                                      *pep_read_ptr);
1722                 if (writables == 0)
1723                         WARN_ON(list_empty(pbusy_list));
1724
1725                 if (!list_empty(pbusy_list)) {
1726                         pasync_handle = list_entry(pbusy_list->next,
1727                                                    struct async_pdu_handle,
1728                                                    link);
1729                         WARN_ON(!pasync_handle);
1730                         pasync_handle->consumed = 1;
1731                 }
1732
1733                 writables++;
1734         }
1735
1736         if (!writables) {
1737                 beiscsi_log(phba, KERN_ERR,
1738                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1739                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1740                             cq_index);
1741                 WARN_ON(1);
1742         }
1743
1744         *pwritables = *pwritables + writables;
1745         return 0;
1746 }
1747
1748 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1749                                struct hwi_async_pdu_context *pasync_ctx,
1750                                unsigned int cri)
1751 {
1752         struct async_pdu_handle *pasync_handle, *tmp_handle;
1753         struct list_head *plist;
1754
1755         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1756         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1757                 list_del(&pasync_handle->link);
1758
1759                 if (pasync_handle->is_header) {
1760                         list_add_tail(&pasync_handle->link,
1761                                       &pasync_ctx->async_header.free_list);
1762                         pasync_ctx->async_header.free_entries++;
1763                 } else {
1764                         list_add_tail(&pasync_handle->link,
1765                                       &pasync_ctx->async_data.free_list);
1766                         pasync_ctx->async_data.free_entries++;
1767                 }
1768         }
1769
1770         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1771         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1772         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1773 }
1774
1775 static struct phys_addr *
1776 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1777                      unsigned int is_header, unsigned int host_write_ptr)
1778 {
1779         struct phys_addr *pasync_sge = NULL;
1780
1781         if (is_header)
1782                 pasync_sge = pasync_ctx->async_header.ring_base;
1783         else
1784                 pasync_sge = pasync_ctx->async_data.ring_base;
1785
1786         return pasync_sge + host_write_ptr;
1787 }
1788
1789 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1790                                     unsigned int is_header, uint8_t ulp_num)
1791 {
1792         struct hwi_controller *phwi_ctrlr;
1793         struct hwi_async_pdu_context *pasync_ctx;
1794         struct async_pdu_handle *pasync_handle;
1795         struct list_head *pfree_link, *pbusy_list;
1796         struct phys_addr *pasync_sge;
1797         unsigned int ring_id, num_entries;
1798         unsigned int host_write_num, doorbell_offset;
1799         unsigned int writables;
1800         unsigned int i = 0;
1801         u32 doorbell = 0;
1802
1803         phwi_ctrlr = phba->phwi_ctrlr;
1804         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1805         num_entries = pasync_ctx->num_entries;
1806
1807         if (is_header) {
1808                 writables = min(pasync_ctx->async_header.writables,
1809                                 pasync_ctx->async_header.free_entries);
1810                 pfree_link = pasync_ctx->async_header.free_list.next;
1811                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1812                 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1813                 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1814                                   doorbell_offset;
1815         } else {
1816                 writables = min(pasync_ctx->async_data.writables,
1817                                 pasync_ctx->async_data.free_entries);
1818                 pfree_link = pasync_ctx->async_data.free_list.next;
1819                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1820                 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1821                 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1822                                   doorbell_offset;
1823         }
1824
1825         writables = (writables / 8) * 8;
1826         if (writables) {
1827                 for (i = 0; i < writables; i++) {
1828                         pbusy_list =
1829                             hwi_get_async_busy_list(pasync_ctx, is_header,
1830                                                     host_write_num);
1831                         pasync_handle =
1832                             list_entry(pfree_link, struct async_pdu_handle,
1833                                                                 link);
1834                         WARN_ON(!pasync_handle);
1835                         pasync_handle->consumed = 0;
1836
1837                         pfree_link = pfree_link->next;
1838
1839                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1840                                                 is_header, host_write_num);
1841
1842                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1843                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1844
1845                         list_move(&pasync_handle->link, pbusy_list);
1846
1847                         host_write_num++;
1848                         host_write_num = host_write_num % num_entries;
1849                 }
1850
1851                 if (is_header) {
1852                         pasync_ctx->async_header.host_write_ptr =
1853                                                         host_write_num;
1854                         pasync_ctx->async_header.free_entries -= writables;
1855                         pasync_ctx->async_header.writables -= writables;
1856                         pasync_ctx->async_header.busy_entries += writables;
1857                 } else {
1858                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1859                         pasync_ctx->async_data.free_entries -= writables;
1860                         pasync_ctx->async_data.writables -= writables;
1861                         pasync_ctx->async_data.busy_entries += writables;
1862                 }
1863
1864                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1865                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1866                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1867                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1868                                         << DB_DEF_PDU_CQPROC_SHIFT;
1869
1870                 iowrite32(doorbell, phba->db_va + doorbell_offset);
1871         }
1872 }
1873
1874 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1875                                          struct beiscsi_conn *beiscsi_conn,
1876                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1877 {
1878         struct hwi_controller *phwi_ctrlr;
1879         struct hwi_async_pdu_context *pasync_ctx;
1880         struct async_pdu_handle *pasync_handle = NULL;
1881         unsigned int cq_index = -1;
1882         uint16_t cri_index = BE_GET_CRI_FROM_CID(
1883                              beiscsi_conn->beiscsi_conn_cid);
1884
1885         phwi_ctrlr = phba->phwi_ctrlr;
1886         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1887                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1888                      cri_index));
1889
1890         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1891                                              pdpdu_cqe, &cq_index);
1892         BUG_ON(pasync_handle->is_header != 0);
1893         if (pasync_handle->consumed == 0)
1894                 hwi_update_async_writables(phba, pasync_ctx,
1895                                            pasync_handle->is_header, cq_index);
1896
1897         hwi_free_async_msg(phba, pasync_ctx, pasync_handle->cri);
1898         hwi_post_async_buffers(phba, pasync_handle->is_header,
1899                                BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1900                                cri_index));
1901 }
1902
1903 static unsigned int
1904 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1905                   struct beiscsi_hba *phba,
1906                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1907 {
1908         struct list_head *plist;
1909         struct async_pdu_handle *pasync_handle;
1910         void *phdr = NULL;
1911         unsigned int hdr_len = 0, buf_len = 0;
1912         unsigned int status, index = 0, offset = 0;
1913         void *pfirst_buffer = NULL;
1914         unsigned int num_buf = 0;
1915
1916         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1917
1918         list_for_each_entry(pasync_handle, plist, link) {
1919                 if (index == 0) {
1920                         phdr = pasync_handle->pbuffer;
1921                         hdr_len = pasync_handle->buffer_len;
1922                 } else {
1923                         buf_len = pasync_handle->buffer_len;
1924                         if (!num_buf) {
1925                                 pfirst_buffer = pasync_handle->pbuffer;
1926                                 num_buf++;
1927                         }
1928                         memcpy(pfirst_buffer + offset,
1929                                pasync_handle->pbuffer, buf_len);
1930                         offset += buf_len;
1931                 }
1932                 index++;
1933         }
1934
1935         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1936                                             phdr, hdr_len, pfirst_buffer,
1937                                             offset);
1938
1939         hwi_free_async_msg(phba, pasync_ctx, cri);
1940         return 0;
1941 }
1942
1943 static unsigned int
1944 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1945                      struct beiscsi_hba *phba,
1946                      struct async_pdu_handle *pasync_handle)
1947 {
1948         struct hwi_async_pdu_context *pasync_ctx;
1949         struct hwi_controller *phwi_ctrlr;
1950         unsigned int bytes_needed = 0, status = 0;
1951         unsigned short cri = pasync_handle->cri;
1952         struct pdu_base *ppdu;
1953
1954         phwi_ctrlr = phba->phwi_ctrlr;
1955         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
1956                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
1957                      BE_GET_CRI_FROM_CID(beiscsi_conn->
1958                                  beiscsi_conn_cid)));
1959
1960         list_del(&pasync_handle->link);
1961         if (pasync_handle->is_header) {
1962                 pasync_ctx->async_header.busy_entries--;
1963                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1964                         hwi_free_async_msg(phba, pasync_ctx, cri);
1965                         BUG();
1966                 }
1967
1968                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1969                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1970                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1971                                 (unsigned short)pasync_handle->buffer_len;
1972                 list_add_tail(&pasync_handle->link,
1973                               &pasync_ctx->async_entry[cri].wait_queue.list);
1974
1975                 ppdu = pasync_handle->pbuffer;
1976                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1977                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1978                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1979                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1980                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1981
1982                 if (status == 0) {
1983                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1984                             bytes_needed;
1985
1986                         if (bytes_needed == 0)
1987                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1988                                                            pasync_ctx, cri);
1989                 }
1990         } else {
1991                 pasync_ctx->async_data.busy_entries--;
1992                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1993                         list_add_tail(&pasync_handle->link,
1994                                       &pasync_ctx->async_entry[cri].wait_queue.
1995                                       list);
1996                         pasync_ctx->async_entry[cri].wait_queue.
1997                                 bytes_received +=
1998                                 (unsigned short)pasync_handle->buffer_len;
1999
2000                         if (pasync_ctx->async_entry[cri].wait_queue.
2001                             bytes_received >=
2002                             pasync_ctx->async_entry[cri].wait_queue.
2003                             bytes_needed)
2004                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
2005                                                            pasync_ctx, cri);
2006                 }
2007         }
2008         return status;
2009 }
2010
2011 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
2012                                          struct beiscsi_hba *phba,
2013                                          struct i_t_dpdu_cqe *pdpdu_cqe)
2014 {
2015         struct hwi_controller *phwi_ctrlr;
2016         struct hwi_async_pdu_context *pasync_ctx;
2017         struct async_pdu_handle *pasync_handle = NULL;
2018         unsigned int cq_index = -1;
2019         uint16_t cri_index = BE_GET_CRI_FROM_CID(
2020                              beiscsi_conn->beiscsi_conn_cid);
2021
2022         phwi_ctrlr = phba->phwi_ctrlr;
2023         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr,
2024                      BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr,
2025                      cri_index));
2026
2027         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
2028                                              pdpdu_cqe, &cq_index);
2029
2030         if (pasync_handle->consumed == 0)
2031                 hwi_update_async_writables(phba, pasync_ctx,
2032                                            pasync_handle->is_header, cq_index);
2033
2034         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
2035         hwi_post_async_buffers(phba, pasync_handle->is_header,
2036                                BEISCSI_GET_ULP_FROM_CRI(
2037                                phwi_ctrlr, cri_index));
2038 }
2039
2040 static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
2041 {
2042         struct be_queue_info *mcc_cq;
2043         struct  be_mcc_compl *mcc_compl;
2044         unsigned int num_processed = 0;
2045
2046         mcc_cq = &phba->ctrl.mcc_obj.cq;
2047         mcc_compl = queue_tail_node(mcc_cq);
2048         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2049         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
2050
2051                 if (num_processed >= 32) {
2052                         hwi_ring_cq_db(phba, mcc_cq->id,
2053                                         num_processed, 0, 0);
2054                         num_processed = 0;
2055                 }
2056                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
2057                         /* Interpret flags as an async trailer */
2058                         if (is_link_state_evt(mcc_compl->flags))
2059                                 /* Interpret compl as a async link evt */
2060                                 beiscsi_async_link_state_process(phba,
2061                                 (struct be_async_event_link_state *) mcc_compl);
2062                         else
2063                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
2064                                             "BM_%d :  Unsupported Async Event, flags"
2065                                             " = 0x%08x\n",
2066                                             mcc_compl->flags);
2067                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
2068                         be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
2069                         atomic_dec(&phba->ctrl.mcc_obj.q.used);
2070                 }
2071
2072                 mcc_compl->flags = 0;
2073                 queue_tail_inc(mcc_cq);
2074                 mcc_compl = queue_tail_node(mcc_cq);
2075                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
2076                 num_processed++;
2077         }
2078
2079         if (num_processed > 0)
2080                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
2081
2082 }
2083
2084 /**
2085  * beiscsi_process_cq()- Process the Completion Queue
2086  * @pbe_eq: Event Q on which the Completion has come
2087  *
2088  * return
2089  *     Number of Completion Entries processed.
2090  **/
2091 static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
2092 {
2093         struct be_queue_info *cq;
2094         struct sol_cqe *sol;
2095         struct dmsg_cqe *dmsg;
2096         unsigned int num_processed = 0;
2097         unsigned int tot_nump = 0;
2098         unsigned short code = 0, cid = 0;
2099         uint16_t cri_index = 0;
2100         struct beiscsi_conn *beiscsi_conn;
2101         struct beiscsi_endpoint *beiscsi_ep;
2102         struct iscsi_endpoint *ep;
2103         struct beiscsi_hba *phba;
2104
2105         cq = pbe_eq->cq;
2106         sol = queue_tail_node(cq);
2107         phba = pbe_eq->phba;
2108
2109         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2110                CQE_VALID_MASK) {
2111                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2112
2113                  code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2114                          32] & CQE_CODE_MASK);
2115
2116                  /* Get the CID */
2117                 if (is_chip_be2_be3r(phba)) {
2118                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2119                 } else {
2120                         if ((code == DRIVERMSG_NOTIFY) ||
2121                             (code == UNSOL_HDR_NOTIFY) ||
2122                             (code == UNSOL_DATA_NOTIFY))
2123                                 cid = AMAP_GET_BITS(
2124                                                     struct amap_i_t_dpdu_cqe_v2,
2125                                                     cid, sol);
2126                          else
2127                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2128                                                      cid, sol);
2129                 }
2130
2131                 cri_index = BE_GET_CRI_FROM_CID(cid);
2132                 ep = phba->ep_array[cri_index];
2133                 beiscsi_ep = ep->dd_data;
2134                 beiscsi_conn = beiscsi_ep->conn;
2135
2136                 if (num_processed >= 32) {
2137                         hwi_ring_cq_db(phba, cq->id,
2138                                         num_processed, 0, 0);
2139                         tot_nump += num_processed;
2140                         num_processed = 0;
2141                 }
2142
2143                 switch (code) {
2144                 case SOL_CMD_COMPLETE:
2145                         hwi_complete_cmd(beiscsi_conn, phba, sol);
2146                         break;
2147                 case DRIVERMSG_NOTIFY:
2148                         beiscsi_log(phba, KERN_INFO,
2149                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2150                                     "BM_%d : Received %s[%d] on CID : %d\n",
2151                                     cqe_desc[code], code, cid);
2152
2153                         dmsg = (struct dmsg_cqe *)sol;
2154                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2155                         break;
2156                 case UNSOL_HDR_NOTIFY:
2157                         beiscsi_log(phba, KERN_INFO,
2158                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2159                                     "BM_%d : Received %s[%d] on CID : %d\n",
2160                                     cqe_desc[code], code, cid);
2161
2162                         spin_lock_bh(&phba->async_pdu_lock);
2163                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2164                                              (struct i_t_dpdu_cqe *)sol);
2165                         spin_unlock_bh(&phba->async_pdu_lock);
2166                         break;
2167                 case UNSOL_DATA_NOTIFY:
2168                         beiscsi_log(phba, KERN_INFO,
2169                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2170                                     "BM_%d : Received %s[%d] on CID : %d\n",
2171                                     cqe_desc[code], code, cid);
2172
2173                         spin_lock_bh(&phba->async_pdu_lock);
2174                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2175                                              (struct i_t_dpdu_cqe *)sol);
2176                         spin_unlock_bh(&phba->async_pdu_lock);
2177                         break;
2178                 case CXN_INVALIDATE_INDEX_NOTIFY:
2179                 case CMD_INVALIDATED_NOTIFY:
2180                 case CXN_INVALIDATE_NOTIFY:
2181                         beiscsi_log(phba, KERN_ERR,
2182                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2183                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2184                                     cqe_desc[code], code, cid);
2185                         break;
2186                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2187                 case CMD_KILLED_INVALID_STATSN_RCVD:
2188                 case CMD_KILLED_INVALID_R2T_RCVD:
2189                 case CMD_CXN_KILLED_LUN_INVALID:
2190                 case CMD_CXN_KILLED_ICD_INVALID:
2191                 case CMD_CXN_KILLED_ITT_INVALID:
2192                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2193                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2194                         beiscsi_log(phba, KERN_ERR,
2195                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2196                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2197                                     cqe_desc[code], code,  cid);
2198                         break;
2199                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2200                         beiscsi_log(phba, KERN_ERR,
2201                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2202                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2203                                     cqe_desc[code], code, cid);
2204                         spin_lock_bh(&phba->async_pdu_lock);
2205                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2206                                              (struct i_t_dpdu_cqe *) sol);
2207                         spin_unlock_bh(&phba->async_pdu_lock);
2208                         break;
2209                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2210                 case CXN_KILLED_BURST_LEN_MISMATCH:
2211                 case CXN_KILLED_AHS_RCVD:
2212                 case CXN_KILLED_HDR_DIGEST_ERR:
2213                 case CXN_KILLED_UNKNOWN_HDR:
2214                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2215                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2216                 case CXN_KILLED_TIMED_OUT:
2217                 case CXN_KILLED_FIN_RCVD:
2218                 case CXN_KILLED_RST_SENT:
2219                 case CXN_KILLED_RST_RCVD:
2220                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2221                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2222                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2223                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2224                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2225                         beiscsi_log(phba, KERN_ERR,
2226                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2227                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2228                                     cqe_desc[code], code, cid);
2229                         if (beiscsi_conn)
2230                                 iscsi_conn_failure(beiscsi_conn->conn,
2231                                                    ISCSI_ERR_CONN_FAILED);
2232                         break;
2233                 default:
2234                         beiscsi_log(phba, KERN_ERR,
2235                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2236                                     "BM_%d : Invalid CQE Event Received Code : %d"
2237                                     "CID 0x%x...\n",
2238                                     code, cid);
2239                         break;
2240                 }
2241
2242                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2243                 queue_tail_inc(cq);
2244                 sol = queue_tail_node(cq);
2245                 num_processed++;
2246         }
2247
2248         if (num_processed > 0) {
2249                 tot_nump += num_processed;
2250                 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
2251         }
2252         return tot_nump;
2253 }
2254
2255 void beiscsi_process_all_cqs(struct work_struct *work)
2256 {
2257         unsigned long flags;
2258         struct hwi_controller *phwi_ctrlr;
2259         struct hwi_context_memory *phwi_context;
2260         struct beiscsi_hba *phba;
2261         struct be_eq_obj *pbe_eq =
2262             container_of(work, struct be_eq_obj, work_cqs);
2263
2264         phba = pbe_eq->phba;
2265         phwi_ctrlr = phba->phwi_ctrlr;
2266         phwi_context = phwi_ctrlr->phwi_ctxt;
2267
2268         if (pbe_eq->todo_mcc_cq) {
2269                 spin_lock_irqsave(&phba->isr_lock, flags);
2270                 pbe_eq->todo_mcc_cq = false;
2271                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2272                 beiscsi_process_mcc_isr(phba);
2273         }
2274
2275         if (pbe_eq->todo_cq) {
2276                 spin_lock_irqsave(&phba->isr_lock, flags);
2277                 pbe_eq->todo_cq = false;
2278                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2279                 beiscsi_process_cq(pbe_eq);
2280         }
2281
2282         /* rearm EQ for further interrupts */
2283         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2284 }
2285
2286 static int be_iopoll(struct blk_iopoll *iop, int budget)
2287 {
2288         unsigned int ret;
2289         struct beiscsi_hba *phba;
2290         struct be_eq_obj *pbe_eq;
2291
2292         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2293         ret = beiscsi_process_cq(pbe_eq);
2294         if (ret < budget) {
2295                 phba = pbe_eq->phba;
2296                 blk_iopoll_complete(iop);
2297                 beiscsi_log(phba, KERN_INFO,
2298                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2299                             "BM_%d : rearm pbe_eq->q.id =%d\n",
2300                             pbe_eq->q.id);
2301                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2302         }
2303         return ret;
2304 }
2305
2306 static void
2307 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2308                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2309 {
2310         struct iscsi_sge *psgl;
2311         unsigned int sg_len, index;
2312         unsigned int sge_len = 0;
2313         unsigned long long addr;
2314         struct scatterlist *l_sg;
2315         unsigned int offset;
2316
2317         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2318                       io_task->bhs_pa.u.a32.address_lo);
2319         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2320                       io_task->bhs_pa.u.a32.address_hi);
2321
2322         l_sg = sg;
2323         for (index = 0; (index < num_sg) && (index < 2); index++,
2324                         sg = sg_next(sg)) {
2325                 if (index == 0) {
2326                         sg_len = sg_dma_len(sg);
2327                         addr = (u64) sg_dma_address(sg);
2328                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2329                                       sge0_addr_lo, pwrb,
2330                                       lower_32_bits(addr));
2331                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2332                                       sge0_addr_hi, pwrb,
2333                                       upper_32_bits(addr));
2334                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2335                                       sge0_len, pwrb,
2336                                       sg_len);
2337                         sge_len = sg_len;
2338                 } else {
2339                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2340                                       pwrb, sge_len);
2341                         sg_len = sg_dma_len(sg);
2342                         addr = (u64) sg_dma_address(sg);
2343                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2344                                       sge1_addr_lo, pwrb,
2345                                       lower_32_bits(addr));
2346                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2347                                       sge1_addr_hi, pwrb,
2348                                       upper_32_bits(addr));
2349                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2350                                       sge1_len, pwrb,
2351                                       sg_len);
2352                 }
2353         }
2354         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2355         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2356
2357         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2358
2359         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2360                       io_task->bhs_pa.u.a32.address_hi);
2361         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2362                       io_task->bhs_pa.u.a32.address_lo);
2363
2364         if (num_sg == 1) {
2365                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2366                               1);
2367                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2368                               0);
2369         } else if (num_sg == 2) {
2370                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2371                               0);
2372                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2373                               1);
2374         } else {
2375                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2376                               0);
2377                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2378                               0);
2379         }
2380
2381         sg = l_sg;
2382         psgl++;
2383         psgl++;
2384         offset = 0;
2385         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2386                 sg_len = sg_dma_len(sg);
2387                 addr = (u64) sg_dma_address(sg);
2388                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2389                               lower_32_bits(addr));
2390                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2391                               upper_32_bits(addr));
2392                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2393                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2394                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2395                 offset += sg_len;
2396         }
2397         psgl--;
2398         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2399 }
2400
2401 static void
2402 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2403               unsigned int num_sg, struct beiscsi_io_task *io_task)
2404 {
2405         struct iscsi_sge *psgl;
2406         unsigned int sg_len, index;
2407         unsigned int sge_len = 0;
2408         unsigned long long addr;
2409         struct scatterlist *l_sg;
2410         unsigned int offset;
2411
2412         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2413                                       io_task->bhs_pa.u.a32.address_lo);
2414         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2415                                       io_task->bhs_pa.u.a32.address_hi);
2416
2417         l_sg = sg;
2418         for (index = 0; (index < num_sg) && (index < 2); index++,
2419                                                          sg = sg_next(sg)) {
2420                 if (index == 0) {
2421                         sg_len = sg_dma_len(sg);
2422                         addr = (u64) sg_dma_address(sg);
2423                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2424                                                 ((u32)(addr & 0xFFFFFFFF)));
2425                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2426                                                         ((u32)(addr >> 32)));
2427                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2428                                                         sg_len);
2429                         sge_len = sg_len;
2430                 } else {
2431                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2432                                                         pwrb, sge_len);
2433                         sg_len = sg_dma_len(sg);
2434                         addr = (u64) sg_dma_address(sg);
2435                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2436                                                 ((u32)(addr & 0xFFFFFFFF)));
2437                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2438                                                         ((u32)(addr >> 32)));
2439                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2440                                                         sg_len);
2441                 }
2442         }
2443         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2444         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2445
2446         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2447
2448         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2449                         io_task->bhs_pa.u.a32.address_hi);
2450         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2451                         io_task->bhs_pa.u.a32.address_lo);
2452
2453         if (num_sg == 1) {
2454                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2455                                                                 1);
2456                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2457                                                                 0);
2458         } else if (num_sg == 2) {
2459                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2460                                                                 0);
2461                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2462                                                                 1);
2463         } else {
2464                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2465                                                                 0);
2466                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2467                                                                 0);
2468         }
2469         sg = l_sg;
2470         psgl++;
2471         psgl++;
2472         offset = 0;
2473         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2474                 sg_len = sg_dma_len(sg);
2475                 addr = (u64) sg_dma_address(sg);
2476                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2477                                                 (addr & 0xFFFFFFFF));
2478                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2479                                                 (addr >> 32));
2480                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2481                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2482                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2483                 offset += sg_len;
2484         }
2485         psgl--;
2486         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2487 }
2488
2489 /**
2490  * hwi_write_buffer()- Populate the WRB with task info
2491  * @pwrb: ptr to the WRB entry
2492  * @task: iscsi task which is to be executed
2493  **/
2494 static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2495 {
2496         struct iscsi_sge *psgl;
2497         struct beiscsi_io_task *io_task = task->dd_data;
2498         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2499         struct beiscsi_hba *phba = beiscsi_conn->phba;
2500         uint8_t dsp_value = 0;
2501
2502         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2503         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2504                                 io_task->bhs_pa.u.a32.address_lo);
2505         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2506                                 io_task->bhs_pa.u.a32.address_hi);
2507
2508         if (task->data) {
2509
2510                 /* Check for the data_count */
2511                 dsp_value = (task->data_count) ? 1 : 0;
2512
2513                 if (is_chip_be2_be3r(phba))
2514                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2515                                       pwrb, dsp_value);
2516                 else
2517                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2518                                       pwrb, dsp_value);
2519
2520                 /* Map addr only if there is data_count */
2521                 if (dsp_value) {
2522                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2523                                                              task->data,
2524                                                              task->data_count,
2525                                                              PCI_DMA_TODEVICE);
2526                         io_task->mtask_data_count = task->data_count;
2527                 } else
2528                         io_task->mtask_addr = 0;
2529
2530                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2531                               lower_32_bits(io_task->mtask_addr));
2532                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2533                               upper_32_bits(io_task->mtask_addr));
2534                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2535                                                 task->data_count);
2536
2537                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2538         } else {
2539                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2540                 io_task->mtask_addr = 0;
2541         }
2542
2543         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2544
2545         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2546
2547         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2548                       io_task->bhs_pa.u.a32.address_hi);
2549         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2550                       io_task->bhs_pa.u.a32.address_lo);
2551         if (task->data) {
2552                 psgl++;
2553                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2554                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2555                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2556                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2557                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2558                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2559
2560                 psgl++;
2561                 if (task->data) {
2562                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2563                                       lower_32_bits(io_task->mtask_addr));
2564                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2565                                       upper_32_bits(io_task->mtask_addr));
2566                 }
2567                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2568         }
2569         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2570 }
2571
2572 /**
2573  * beiscsi_find_mem_req()- Find mem needed
2574  * @phba: ptr to HBA struct
2575  **/
2576 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2577 {
2578         uint8_t mem_descr_index, ulp_num;
2579         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2580         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2581         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2582
2583         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2584                                       sizeof(struct sol_cqe));
2585
2586         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2587
2588         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2589                                                  BE_ISCSI_PDU_HEADER_SIZE;
2590         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2591                                             sizeof(struct hwi_context_memory);
2592
2593
2594         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2595             * (phba->params.wrbs_per_cxn)
2596             * phba->params.cxns_per_ctrl;
2597         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2598                                  (phba->params.wrbs_per_cxn);
2599         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2600                                 phba->params.cxns_per_ctrl);
2601
2602         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2603                 phba->params.icds_per_ctrl;
2604         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2605                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2606         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2607                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2608
2609                         num_async_pdu_buf_sgl_pages =
2610                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2611                                                phba, ulp_num) *
2612                                                sizeof(struct phys_addr));
2613
2614                         num_async_pdu_buf_pages =
2615                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2616                                                phba, ulp_num) *
2617                                                phba->params.defpdu_hdr_sz);
2618
2619                         num_async_pdu_data_pages =
2620                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2621                                                phba, ulp_num) *
2622                                                phba->params.defpdu_data_sz);
2623
2624                         num_async_pdu_data_sgl_pages =
2625                                 PAGES_REQUIRED(BEISCSI_GET_CID_COUNT(
2626                                                phba, ulp_num) *
2627                                                sizeof(struct phys_addr));
2628
2629                         mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2630                                           (ulp_num * MEM_DESCR_OFFSET));
2631                         phba->mem_req[mem_descr_index] =
2632                                         BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2633                                         BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2634
2635                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2636                                           (ulp_num * MEM_DESCR_OFFSET));
2637                         phba->mem_req[mem_descr_index] =
2638                                           num_async_pdu_buf_pages *
2639                                           PAGE_SIZE;
2640
2641                         mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2642                                           (ulp_num * MEM_DESCR_OFFSET));
2643                         phba->mem_req[mem_descr_index] =
2644                                           num_async_pdu_data_pages *
2645                                           PAGE_SIZE;
2646
2647                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2648                                           (ulp_num * MEM_DESCR_OFFSET));
2649                         phba->mem_req[mem_descr_index] =
2650                                           num_async_pdu_buf_sgl_pages *
2651                                           PAGE_SIZE;
2652
2653                         mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2654                                           (ulp_num * MEM_DESCR_OFFSET));
2655                         phba->mem_req[mem_descr_index] =
2656                                           num_async_pdu_data_sgl_pages *
2657                                           PAGE_SIZE;
2658
2659                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2660                                           (ulp_num * MEM_DESCR_OFFSET));
2661                         phba->mem_req[mem_descr_index] =
2662                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2663                                           sizeof(struct async_pdu_handle);
2664
2665                         mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2666                                           (ulp_num * MEM_DESCR_OFFSET));
2667                         phba->mem_req[mem_descr_index] =
2668                                           BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2669                                           sizeof(struct async_pdu_handle);
2670
2671                         mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2672                                           (ulp_num * MEM_DESCR_OFFSET));
2673                         phba->mem_req[mem_descr_index] =
2674                                           sizeof(struct hwi_async_pdu_context) +
2675                                          (BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2676                                           sizeof(struct hwi_async_entry));
2677                 }
2678         }
2679 }
2680
2681 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2682 {
2683         dma_addr_t bus_add;
2684         struct hwi_controller *phwi_ctrlr;
2685         struct be_mem_descriptor *mem_descr;
2686         struct mem_array *mem_arr, *mem_arr_orig;
2687         unsigned int i, j, alloc_size, curr_alloc_size;
2688
2689         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2690         if (!phba->phwi_ctrlr)
2691                 return -ENOMEM;
2692
2693         /* Allocate memory for wrb_context */
2694         phwi_ctrlr = phba->phwi_ctrlr;
2695         phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2696                                           phba->params.cxns_per_ctrl,
2697                                           GFP_KERNEL);
2698         if (!phwi_ctrlr->wrb_context)
2699                 return -ENOMEM;
2700
2701         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2702                                  GFP_KERNEL);
2703         if (!phba->init_mem) {
2704                 kfree(phwi_ctrlr->wrb_context);
2705                 kfree(phba->phwi_ctrlr);
2706                 return -ENOMEM;
2707         }
2708
2709         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2710                                GFP_KERNEL);
2711         if (!mem_arr_orig) {
2712                 kfree(phba->init_mem);
2713                 kfree(phwi_ctrlr->wrb_context);
2714                 kfree(phba->phwi_ctrlr);
2715                 return -ENOMEM;
2716         }
2717
2718         mem_descr = phba->init_mem;
2719         for (i = 0; i < SE_MEM_MAX; i++) {
2720                 if (!phba->mem_req[i]) {
2721                         mem_descr->mem_array = NULL;
2722                         mem_descr++;
2723                         continue;
2724                 }
2725
2726                 j = 0;
2727                 mem_arr = mem_arr_orig;
2728                 alloc_size = phba->mem_req[i];
2729                 memset(mem_arr, 0, sizeof(struct mem_array) *
2730                        BEISCSI_MAX_FRAGS_INIT);
2731                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2732                 do {
2733                         mem_arr->virtual_address = pci_alloc_consistent(
2734                                                         phba->pcidev,
2735                                                         curr_alloc_size,
2736                                                         &bus_add);
2737                         if (!mem_arr->virtual_address) {
2738                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2739                                         goto free_mem;
2740                                 if (curr_alloc_size -
2741                                         rounddown_pow_of_two(curr_alloc_size))
2742                                         curr_alloc_size = rounddown_pow_of_two
2743                                                              (curr_alloc_size);
2744                                 else
2745                                         curr_alloc_size = curr_alloc_size / 2;
2746                         } else {
2747                                 mem_arr->bus_address.u.
2748                                     a64.address = (__u64) bus_add;
2749                                 mem_arr->size = curr_alloc_size;
2750                                 alloc_size -= curr_alloc_size;
2751                                 curr_alloc_size = min(be_max_phys_size *
2752                                                       1024, alloc_size);
2753                                 j++;
2754                                 mem_arr++;
2755                         }
2756                 } while (alloc_size);
2757                 mem_descr->num_elements = j;
2758                 mem_descr->size_in_bytes = phba->mem_req[i];
2759                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2760                                                GFP_KERNEL);
2761                 if (!mem_descr->mem_array)
2762                         goto free_mem;
2763
2764                 memcpy(mem_descr->mem_array, mem_arr_orig,
2765                        sizeof(struct mem_array) * j);
2766                 mem_descr++;
2767         }
2768         kfree(mem_arr_orig);
2769         return 0;
2770 free_mem:
2771         mem_descr->num_elements = j;
2772         while ((i) || (j)) {
2773                 for (j = mem_descr->num_elements; j > 0; j--) {
2774                         pci_free_consistent(phba->pcidev,
2775                                             mem_descr->mem_array[j - 1].size,
2776                                             mem_descr->mem_array[j - 1].
2777                                             virtual_address,
2778                                             (unsigned long)mem_descr->
2779                                             mem_array[j - 1].
2780                                             bus_address.u.a64.address);
2781                 }
2782                 if (i) {
2783                         i--;
2784                         kfree(mem_descr->mem_array);
2785                         mem_descr--;
2786                 }
2787         }
2788         kfree(mem_arr_orig);
2789         kfree(phba->init_mem);
2790         kfree(phba->phwi_ctrlr->wrb_context);
2791         kfree(phba->phwi_ctrlr);
2792         return -ENOMEM;
2793 }
2794
2795 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2796 {
2797         beiscsi_find_mem_req(phba);
2798         return beiscsi_alloc_mem(phba);
2799 }
2800
2801 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2802 {
2803         struct pdu_data_out *pdata_out;
2804         struct pdu_nop_out *pnop_out;
2805         struct be_mem_descriptor *mem_descr;
2806
2807         mem_descr = phba->init_mem;
2808         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2809         pdata_out =
2810             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2811         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2812
2813         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2814                       IIOC_SCSI_DATA);
2815
2816         pnop_out =
2817             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2818                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2819
2820         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2821         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2822         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2823         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2824 }
2825
2826 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2827 {
2828         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2829         struct hwi_context_memory *phwi_ctxt;
2830         struct wrb_handle *pwrb_handle = NULL;
2831         struct hwi_controller *phwi_ctrlr;
2832         struct hwi_wrb_context *pwrb_context;
2833         struct iscsi_wrb *pwrb = NULL;
2834         unsigned int num_cxn_wrbh = 0;
2835         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2836
2837         mem_descr_wrbh = phba->init_mem;
2838         mem_descr_wrbh += HWI_MEM_WRBH;
2839
2840         mem_descr_wrb = phba->init_mem;
2841         mem_descr_wrb += HWI_MEM_WRB;
2842         phwi_ctrlr = phba->phwi_ctrlr;
2843
2844         /* Allocate memory for WRBQ */
2845         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2846         phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2847                                      phba->params.cxns_per_ctrl,
2848                                      GFP_KERNEL);
2849         if (!phwi_ctxt->be_wrbq) {
2850                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2851                             "BM_%d : WRBQ Mem Alloc Failed\n");
2852                 return -ENOMEM;
2853         }
2854
2855         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2856                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2857                 pwrb_context->pwrb_handle_base =
2858                                 kzalloc(sizeof(struct wrb_handle *) *
2859                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2860                 if (!pwrb_context->pwrb_handle_base) {
2861                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2862                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2863                         goto init_wrb_hndl_failed;
2864                 }
2865                 pwrb_context->pwrb_handle_basestd =
2866                                 kzalloc(sizeof(struct wrb_handle *) *
2867                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2868                 if (!pwrb_context->pwrb_handle_basestd) {
2869                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2870                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2871                         goto init_wrb_hndl_failed;
2872                 }
2873                 if (!num_cxn_wrbh) {
2874                         pwrb_handle =
2875                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2876                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2877                                         ((sizeof(struct wrb_handle)) *
2878                                          phba->params.wrbs_per_cxn));
2879                         idx++;
2880                 }
2881                 pwrb_context->alloc_index = 0;
2882                 pwrb_context->wrb_handles_available = 0;
2883                 pwrb_context->free_index = 0;
2884
2885                 if (num_cxn_wrbh) {
2886                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2887                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2888                                 pwrb_context->pwrb_handle_basestd[j] =
2889                                                                 pwrb_handle;
2890                                 pwrb_context->wrb_handles_available++;
2891                                 pwrb_handle->wrb_index = j;
2892                                 pwrb_handle++;
2893                         }
2894                         num_cxn_wrbh--;
2895                 }
2896         }
2897         idx = 0;
2898         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2899                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2900                 if (!num_cxn_wrb) {
2901                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2902                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2903                                 ((sizeof(struct iscsi_wrb) *
2904                                   phba->params.wrbs_per_cxn));
2905                         idx++;
2906                 }
2907
2908                 if (num_cxn_wrb) {
2909                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2910                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2911                                 pwrb_handle->pwrb = pwrb;
2912                                 pwrb++;
2913                         }
2914                         num_cxn_wrb--;
2915                 }
2916         }
2917         return 0;
2918 init_wrb_hndl_failed:
2919         for (j = index; j > 0; j--) {
2920                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2921                 kfree(pwrb_context->pwrb_handle_base);
2922                 kfree(pwrb_context->pwrb_handle_basestd);
2923         }
2924         return -ENOMEM;
2925 }
2926
2927 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2928 {
2929         uint8_t ulp_num;
2930         struct hwi_controller *phwi_ctrlr;
2931         struct hba_parameters *p = &phba->params;
2932         struct hwi_async_pdu_context *pasync_ctx;
2933         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2934         unsigned int index, idx, num_per_mem, num_async_data;
2935         struct be_mem_descriptor *mem_descr;
2936
2937         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2938                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2939
2940                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2941                         mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2942                                      (ulp_num * MEM_DESCR_OFFSET));
2943
2944                         phwi_ctrlr = phba->phwi_ctrlr;
2945                         phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2946                                 (struct hwi_async_pdu_context *)
2947                                  mem_descr->mem_array[0].virtual_address;
2948
2949                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2950                         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2951
2952                         pasync_ctx->async_entry =
2953                                         (struct hwi_async_entry *)
2954                                         ((long unsigned int)pasync_ctx +
2955                                         sizeof(struct hwi_async_pdu_context));
2956
2957                         pasync_ctx->num_entries = BEISCSI_GET_CID_COUNT(phba,
2958                                                   ulp_num);
2959                         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2960
2961                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2962                         mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2963                                 (ulp_num * MEM_DESCR_OFFSET);
2964                         if (mem_descr->mem_array[0].virtual_address) {
2965                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2966                                             "BM_%d : hwi_init_async_pdu_ctx"
2967                                             " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2968                                             ulp_num,
2969                                             mem_descr->mem_array[0].
2970                                             virtual_address);
2971                         } else
2972                                 beiscsi_log(phba, KERN_WARNING,
2973                                             BEISCSI_LOG_INIT,
2974                                             "BM_%d : No Virtual address for ULP : %d\n",
2975                                             ulp_num);
2976
2977                         pasync_ctx->async_header.va_base =
2978                                 mem_descr->mem_array[0].virtual_address;
2979
2980                         pasync_ctx->async_header.pa_base.u.a64.address =
2981                                 mem_descr->mem_array[0].
2982                                 bus_address.u.a64.address;
2983
2984                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2985                         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2986                                      (ulp_num * MEM_DESCR_OFFSET);
2987                         if (mem_descr->mem_array[0].virtual_address) {
2988                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2989                                             "BM_%d : hwi_init_async_pdu_ctx"
2990                                             " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2991                                             ulp_num,
2992                                             mem_descr->mem_array[0].
2993                                             virtual_address);
2994                         } else
2995                                 beiscsi_log(phba, KERN_WARNING,
2996                                             BEISCSI_LOG_INIT,
2997                                             "BM_%d : No Virtual address for ULP : %d\n",
2998                                             ulp_num);
2999
3000                         pasync_ctx->async_header.ring_base =
3001                                 mem_descr->mem_array[0].virtual_address;
3002
3003                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3004                         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
3005                                      (ulp_num * MEM_DESCR_OFFSET);
3006                         if (mem_descr->mem_array[0].virtual_address) {
3007                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3008                                             "BM_%d : hwi_init_async_pdu_ctx"
3009                                             " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
3010                                             ulp_num,
3011                                             mem_descr->mem_array[0].
3012                                             virtual_address);
3013                         } else
3014                                 beiscsi_log(phba, KERN_WARNING,
3015                                             BEISCSI_LOG_INIT,
3016                                             "BM_%d : No Virtual address for ULP : %d\n",
3017                                             ulp_num);
3018
3019                         pasync_ctx->async_header.handle_base =
3020                                 mem_descr->mem_array[0].virtual_address;
3021                         pasync_ctx->async_header.writables = 0;
3022                         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
3023
3024                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3025                         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3026                                      (ulp_num * MEM_DESCR_OFFSET);
3027                         if (mem_descr->mem_array[0].virtual_address) {
3028                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3029                                             "BM_%d : hwi_init_async_pdu_ctx"
3030                                             " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
3031                                             ulp_num,
3032                                             mem_descr->mem_array[0].
3033                                             virtual_address);
3034                         } else
3035                                 beiscsi_log(phba, KERN_WARNING,
3036                                             BEISCSI_LOG_INIT,
3037                                             "BM_%d : No Virtual address for ULP : %d\n",
3038                                             ulp_num);
3039
3040                         pasync_ctx->async_data.ring_base =
3041                                 mem_descr->mem_array[0].virtual_address;
3042
3043                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3044                         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
3045                                      (ulp_num * MEM_DESCR_OFFSET);
3046                         if (!mem_descr->mem_array[0].virtual_address)
3047                                 beiscsi_log(phba, KERN_WARNING,
3048                                             BEISCSI_LOG_INIT,
3049                                             "BM_%d : No Virtual address for ULP : %d\n",
3050                                             ulp_num);
3051
3052                         pasync_ctx->async_data.handle_base =
3053                                 mem_descr->mem_array[0].virtual_address;
3054                         pasync_ctx->async_data.writables = 0;
3055                         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
3056
3057                         pasync_header_h =
3058                                 (struct async_pdu_handle *)
3059                                 pasync_ctx->async_header.handle_base;
3060                         pasync_data_h =
3061                                 (struct async_pdu_handle *)
3062                                 pasync_ctx->async_data.handle_base;
3063
3064                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3065                         mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
3066                                      (ulp_num * MEM_DESCR_OFFSET);
3067                         if (mem_descr->mem_array[0].virtual_address) {
3068                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3069                                             "BM_%d : hwi_init_async_pdu_ctx"
3070                                             " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
3071                                             ulp_num,
3072                                             mem_descr->mem_array[0].
3073                                             virtual_address);
3074                         } else
3075                                 beiscsi_log(phba, KERN_WARNING,
3076                                             BEISCSI_LOG_INIT,
3077                                             "BM_%d : No Virtual address for ULP : %d\n",
3078                                             ulp_num);
3079
3080                         idx = 0;
3081                         pasync_ctx->async_data.va_base =
3082                                 mem_descr->mem_array[idx].virtual_address;
3083                         pasync_ctx->async_data.pa_base.u.a64.address =
3084                                 mem_descr->mem_array[idx].
3085                                 bus_address.u.a64.address;
3086
3087                         num_async_data = ((mem_descr->mem_array[idx].size) /
3088                                         phba->params.defpdu_data_sz);
3089                         num_per_mem = 0;
3090
3091                         for (index = 0; index < BEISCSI_GET_CID_COUNT
3092                                         (phba, ulp_num); index++) {
3093                                 pasync_header_h->cri = -1;
3094                                 pasync_header_h->index = (char)index;
3095                                 INIT_LIST_HEAD(&pasync_header_h->link);
3096                                 pasync_header_h->pbuffer =
3097                                         (void *)((unsigned long)
3098                                                  (pasync_ctx->
3099                                                   async_header.va_base) +
3100                                                  (p->defpdu_hdr_sz * index));
3101
3102                                 pasync_header_h->pa.u.a64.address =
3103                                         pasync_ctx->async_header.pa_base.u.a64.
3104                                         address + (p->defpdu_hdr_sz * index);
3105
3106                                 list_add_tail(&pasync_header_h->link,
3107                                               &pasync_ctx->async_header.
3108                                               free_list);
3109                                 pasync_header_h++;
3110                                 pasync_ctx->async_header.free_entries++;
3111                                 pasync_ctx->async_header.writables++;
3112
3113                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3114                                                wait_queue.list);
3115                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3116                                                header_busy_list);
3117                                 pasync_data_h->cri = -1;
3118                                 pasync_data_h->index = (char)index;
3119                                 INIT_LIST_HEAD(&pasync_data_h->link);
3120
3121                                 if (!num_async_data) {
3122                                         num_per_mem = 0;
3123                                         idx++;
3124                                         pasync_ctx->async_data.va_base =
3125                                                 mem_descr->mem_array[idx].
3126                                                 virtual_address;
3127                                         pasync_ctx->async_data.pa_base.u.
3128                                                 a64.address =
3129                                                 mem_descr->mem_array[idx].
3130                                                 bus_address.u.a64.address;
3131                                         num_async_data =
3132                                                 ((mem_descr->mem_array[idx].
3133                                                   size) /
3134                                                  phba->params.defpdu_data_sz);
3135                                 }
3136                                 pasync_data_h->pbuffer =
3137                                         (void *)((unsigned long)
3138                                         (pasync_ctx->async_data.va_base) +
3139                                         (p->defpdu_data_sz * num_per_mem));
3140
3141                                 pasync_data_h->pa.u.a64.address =
3142                                         pasync_ctx->async_data.pa_base.u.a64.
3143                                         address + (p->defpdu_data_sz *
3144                                         num_per_mem);
3145                                 num_per_mem++;
3146                                 num_async_data--;
3147
3148                                 list_add_tail(&pasync_data_h->link,
3149                                               &pasync_ctx->async_data.
3150                                               free_list);
3151                                 pasync_data_h++;
3152                                 pasync_ctx->async_data.free_entries++;
3153                                 pasync_ctx->async_data.writables++;
3154
3155                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
3156                                                data_busy_list);
3157                         }
3158
3159                         pasync_ctx->async_header.host_write_ptr = 0;
3160                         pasync_ctx->async_header.ep_read_ptr = -1;
3161                         pasync_ctx->async_data.host_write_ptr = 0;
3162                         pasync_ctx->async_data.ep_read_ptr = -1;
3163                 }
3164         }
3165
3166         return 0;
3167 }
3168
3169 static int
3170 be_sgl_create_contiguous(void *virtual_address,
3171                          u64 physical_address, u32 length,
3172                          struct be_dma_mem *sgl)
3173 {
3174         WARN_ON(!virtual_address);
3175         WARN_ON(!physical_address);
3176         WARN_ON(!length > 0);
3177         WARN_ON(!sgl);
3178
3179         sgl->va = virtual_address;
3180         sgl->dma = (unsigned long)physical_address;
3181         sgl->size = length;
3182
3183         return 0;
3184 }
3185
3186 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
3187 {
3188         memset(sgl, 0, sizeof(*sgl));
3189 }
3190
3191 static void
3192 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
3193                      struct mem_array *pmem, struct be_dma_mem *sgl)
3194 {
3195         if (sgl->va)
3196                 be_sgl_destroy_contiguous(sgl);
3197
3198         be_sgl_create_contiguous(pmem->virtual_address,
3199                                  pmem->bus_address.u.a64.address,
3200                                  pmem->size, sgl);
3201 }
3202
3203 static void
3204 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3205                            struct mem_array *pmem, struct be_dma_mem *sgl)
3206 {
3207         if (sgl->va)
3208                 be_sgl_destroy_contiguous(sgl);
3209
3210         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3211                                  pmem->bus_address.u.a64.address,
3212                                  pmem->size, sgl);
3213 }
3214
3215 static int be_fill_queue(struct be_queue_info *q,
3216                 u16 len, u16 entry_size, void *vaddress)
3217 {
3218         struct be_dma_mem *mem = &q->dma_mem;
3219
3220         memset(q, 0, sizeof(*q));
3221         q->len = len;
3222         q->entry_size = entry_size;
3223         mem->size = len * entry_size;
3224         mem->va = vaddress;
3225         if (!mem->va)
3226                 return -ENOMEM;
3227         memset(mem->va, 0, mem->size);
3228         return 0;
3229 }
3230
3231 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3232                              struct hwi_context_memory *phwi_context)
3233 {
3234         unsigned int i, num_eq_pages;
3235         int ret = 0, eq_for_mcc;
3236         struct be_queue_info *eq;
3237         struct be_dma_mem *mem;
3238         void *eq_vaddress;
3239         dma_addr_t paddr;
3240
3241         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3242                                       sizeof(struct be_eq_entry));
3243
3244         if (phba->msix_enabled)
3245                 eq_for_mcc = 1;
3246         else
3247                 eq_for_mcc = 0;
3248         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3249                 eq = &phwi_context->be_eq[i].q;
3250                 mem = &eq->dma_mem;
3251                 phwi_context->be_eq[i].phba = phba;
3252                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3253                                                      num_eq_pages * PAGE_SIZE,
3254                                                      &paddr);
3255                 if (!eq_vaddress)
3256                         goto create_eq_error;
3257
3258                 mem->va = eq_vaddress;
3259                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3260                                     sizeof(struct be_eq_entry), eq_vaddress);
3261                 if (ret) {
3262                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3263                                     "BM_%d : be_fill_queue Failed for EQ\n");
3264                         goto create_eq_error;
3265                 }
3266
3267                 mem->dma = paddr;
3268                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3269                                             phwi_context->cur_eqd);
3270                 if (ret) {
3271                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3272                                     "BM_%d : beiscsi_cmd_eq_create"
3273                                     "Failed for EQ\n");
3274                         goto create_eq_error;
3275                 }
3276
3277                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3278                             "BM_%d : eqid = %d\n",
3279                             phwi_context->be_eq[i].q.id);
3280         }
3281         return 0;
3282 create_eq_error:
3283         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3284                 eq = &phwi_context->be_eq[i].q;
3285                 mem = &eq->dma_mem;
3286                 if (mem->va)
3287                         pci_free_consistent(phba->pcidev, num_eq_pages
3288                                             * PAGE_SIZE,
3289                                             mem->va, mem->dma);
3290         }
3291         return ret;
3292 }
3293
3294 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3295                              struct hwi_context_memory *phwi_context)
3296 {
3297         unsigned int i, num_cq_pages;
3298         int ret = 0;
3299         struct be_queue_info *cq, *eq;
3300         struct be_dma_mem *mem;
3301         struct be_eq_obj *pbe_eq;
3302         void *cq_vaddress;
3303         dma_addr_t paddr;
3304
3305         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3306                                       sizeof(struct sol_cqe));
3307
3308         for (i = 0; i < phba->num_cpus; i++) {
3309                 cq = &phwi_context->be_cq[i];
3310                 eq = &phwi_context->be_eq[i].q;
3311                 pbe_eq = &phwi_context->be_eq[i];
3312                 pbe_eq->cq = cq;
3313                 pbe_eq->phba = phba;
3314                 mem = &cq->dma_mem;
3315                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3316                                                      num_cq_pages * PAGE_SIZE,
3317                                                      &paddr);
3318                 if (!cq_vaddress)
3319                         goto create_cq_error;
3320                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3321                                     sizeof(struct sol_cqe), cq_vaddress);
3322                 if (ret) {
3323                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3324                                     "BM_%d : be_fill_queue Failed "
3325                                     "for ISCSI CQ\n");
3326                         goto create_cq_error;
3327                 }
3328
3329                 mem->dma = paddr;
3330                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3331                                             false, 0);
3332                 if (ret) {
3333                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3334                                     "BM_%d : beiscsi_cmd_eq_create"
3335                                     "Failed for ISCSI CQ\n");
3336                         goto create_cq_error;
3337                 }
3338                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3339                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3340                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3341         }
3342         return 0;
3343
3344 create_cq_error:
3345         for (i = 0; i < phba->num_cpus; i++) {
3346                 cq = &phwi_context->be_cq[i];
3347                 mem = &cq->dma_mem;
3348                 if (mem->va)
3349                         pci_free_consistent(phba->pcidev, num_cq_pages
3350                                             * PAGE_SIZE,
3351                                             mem->va, mem->dma);
3352         }
3353         return ret;
3354
3355 }
3356
3357 static int
3358 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3359                        struct hwi_context_memory *phwi_context,
3360                        struct hwi_controller *phwi_ctrlr,
3361                        unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3362 {
3363         unsigned int idx;
3364         int ret;
3365         struct be_queue_info *dq, *cq;
3366         struct be_dma_mem *mem;
3367         struct be_mem_descriptor *mem_descr;
3368         void *dq_vaddress;
3369
3370         idx = 0;
3371         dq = &phwi_context->be_def_hdrq[ulp_num];
3372         cq = &phwi_context->be_cq[0];
3373         mem = &dq->dma_mem;
3374         mem_descr = phba->init_mem;
3375         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3376                     (ulp_num * MEM_DESCR_OFFSET);
3377         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3378         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3379                             sizeof(struct phys_addr),
3380                             sizeof(struct phys_addr), dq_vaddress);
3381         if (ret) {
3382                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3383                             "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3384                             ulp_num);
3385
3386                 return ret;
3387         }
3388         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3389                                   bus_address.u.a64.address;
3390         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3391                                               def_pdu_ring_sz,
3392                                               phba->params.defpdu_hdr_sz,
3393                                               BEISCSI_DEFQ_HDR, ulp_num);
3394         if (ret) {
3395                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3396                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3397                             ulp_num);
3398
3399                 return ret;
3400         }
3401
3402         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3403                     "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3404                     ulp_num,
3405                     phwi_context->be_def_hdrq[ulp_num].id);
3406         hwi_post_async_buffers(phba, BEISCSI_DEFQ_HDR, ulp_num);
3407         return 0;
3408 }
3409
3410 static int
3411 beiscsi_create_def_data(struct beiscsi_hba *phba,
3412                         struct hwi_context_memory *phwi_context,
3413                         struct hwi_controller *phwi_ctrlr,
3414                         unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3415 {
3416         unsigned int idx;
3417         int ret;
3418         struct be_queue_info *dataq, *cq;
3419         struct be_dma_mem *mem;
3420         struct be_mem_descriptor *mem_descr;
3421         void *dq_vaddress;
3422
3423         idx = 0;
3424         dataq = &phwi_context->be_def_dataq[ulp_num];
3425         cq = &phwi_context->be_cq[0];
3426         mem = &dataq->dma_mem;
3427         mem_descr = phba->init_mem;
3428         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3429                     (ulp_num * MEM_DESCR_OFFSET);
3430         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3431         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3432                             sizeof(struct phys_addr),
3433                             sizeof(struct phys_addr), dq_vaddress);
3434         if (ret) {
3435                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3436                             "BM_%d : be_fill_queue Failed for DEF PDU "
3437                             "DATA on ULP : %d\n",
3438                             ulp_num);
3439
3440                 return ret;
3441         }
3442         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3443                                   bus_address.u.a64.address;
3444         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3445                                               def_pdu_ring_sz,
3446                                               phba->params.defpdu_data_sz,
3447                                               BEISCSI_DEFQ_DATA, ulp_num);
3448         if (ret) {
3449                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3450                             "BM_%d be_cmd_create_default_pdu_queue"
3451                             " Failed for DEF PDU DATA on ULP : %d\n",
3452                             ulp_num);
3453                 return ret;
3454         }
3455
3456         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3457                     "BM_%d : iscsi def data id on ULP : %d is  %d\n",
3458                     ulp_num,
3459                     phwi_context->be_def_dataq[ulp_num].id);
3460
3461         hwi_post_async_buffers(phba, BEISCSI_DEFQ_DATA, ulp_num);
3462         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3463                     "BM_%d : DEFAULT PDU DATA RING CREATED"
3464                     "on ULP : %d\n", ulp_num);
3465
3466         return 0;
3467 }
3468
3469
3470 static int
3471 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3472 {
3473         struct be_mem_descriptor *mem_descr;
3474         struct mem_array *pm_arr;
3475         struct be_dma_mem sgl;
3476         int status, ulp_num;
3477
3478         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3479                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3480                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3481                         mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3482                                     (ulp_num * MEM_DESCR_OFFSET);
3483                         pm_arr = mem_descr->mem_array;
3484
3485                         hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3486                         status = be_cmd_iscsi_post_template_hdr(
3487                                  &phba->ctrl, &sgl);
3488
3489                         if (status != 0) {
3490                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3491                                             "BM_%d : Post Template HDR Failed for"
3492                                             "ULP_%d\n", ulp_num);
3493                                 return status;
3494                         }
3495
3496                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3497                                     "BM_%d : Template HDR Pages Posted for"
3498                                     "ULP_%d\n", ulp_num);
3499                 }
3500         }
3501         return 0;
3502 }
3503
3504 static int
3505 beiscsi_post_pages(struct beiscsi_hba *phba)
3506 {
3507         struct be_mem_descriptor *mem_descr;
3508         struct mem_array *pm_arr;
3509         unsigned int page_offset, i;
3510         struct be_dma_mem sgl;
3511         int status, ulp_num = 0;
3512
3513         mem_descr = phba->init_mem;
3514         mem_descr += HWI_MEM_SGE;
3515         pm_arr = mem_descr->mem_array;
3516
3517         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3518                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3519                         break;
3520
3521         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3522                         phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3523         for (i = 0; i < mem_descr->num_elements; i++) {
3524                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3525                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3526                                                 page_offset,
3527                                                 (pm_arr->size / PAGE_SIZE));
3528                 page_offset += pm_arr->size / PAGE_SIZE;
3529                 if (status != 0) {
3530                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3531                                     "BM_%d : post sgl failed.\n");
3532                         return status;
3533                 }
3534                 pm_arr++;
3535         }
3536         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3537                     "BM_%d : POSTED PAGES\n");
3538         return 0;
3539 }
3540
3541 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3542 {
3543         struct be_dma_mem *mem = &q->dma_mem;
3544         if (mem->va) {
3545                 pci_free_consistent(phba->pcidev, mem->size,
3546                         mem->va, mem->dma);
3547                 mem->va = NULL;
3548         }
3549 }
3550
3551 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3552                 u16 len, u16 entry_size)
3553 {
3554         struct be_dma_mem *mem = &q->dma_mem;
3555
3556         memset(q, 0, sizeof(*q));
3557         q->len = len;
3558         q->entry_size = entry_size;
3559         mem->size = len * entry_size;
3560         mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
3561         if (!mem->va)
3562                 return -ENOMEM;
3563         memset(mem->va, 0, mem->size);
3564         return 0;
3565 }
3566
3567 static int
3568 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3569                          struct hwi_context_memory *phwi_context,
3570                          struct hwi_controller *phwi_ctrlr)
3571 {
3572         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3573         u64 pa_addr_lo;
3574         unsigned int idx, num, i, ulp_num;
3575         struct mem_array *pwrb_arr;
3576         void *wrb_vaddr;
3577         struct be_dma_mem sgl;
3578         struct be_mem_descriptor *mem_descr;
3579         struct hwi_wrb_context *pwrb_context;
3580         int status;
3581         uint8_t ulp_count = 0, ulp_base_num = 0;
3582         uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3583
3584         idx = 0;
3585         mem_descr = phba->init_mem;
3586         mem_descr += HWI_MEM_WRB;
3587         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3588                            GFP_KERNEL);
3589         if (!pwrb_arr) {
3590                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3591                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3592                 return -ENOMEM;
3593         }
3594         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3595         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3596         num_wrb_rings = mem_descr->mem_array[idx].size /
3597                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3598
3599         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3600                 if (num_wrb_rings) {
3601                         pwrb_arr[num].virtual_address = wrb_vaddr;
3602                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3603                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3604                                             sizeof(struct iscsi_wrb);
3605                         wrb_vaddr += pwrb_arr[num].size;
3606                         pa_addr_lo += pwrb_arr[num].size;
3607                         num_wrb_rings--;
3608                 } else {
3609                         idx++;
3610                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3611                         pa_addr_lo = mem_descr->mem_array[idx].\
3612                                         bus_address.u.a64.address;
3613                         num_wrb_rings = mem_descr->mem_array[idx].size /
3614                                         (phba->params.wrbs_per_cxn *
3615                                         sizeof(struct iscsi_wrb));
3616                         pwrb_arr[num].virtual_address = wrb_vaddr;
3617                         pwrb_arr[num].bus_address.u.a64.address\
3618                                                 = pa_addr_lo;
3619                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3620                                                  sizeof(struct iscsi_wrb);
3621                         wrb_vaddr += pwrb_arr[num].size;
3622                         pa_addr_lo   += pwrb_arr[num].size;
3623                         num_wrb_rings--;
3624                 }
3625         }
3626
3627         /* Get the ULP Count */
3628         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3629                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3630                         ulp_count++;
3631                         ulp_base_num = ulp_num;
3632                         cid_count_ulp[ulp_num] =
3633                                 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3634                 }
3635
3636         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3637                 wrb_mem_index = 0;
3638                 offset = 0;
3639                 size = 0;
3640
3641                 if (ulp_count > 1) {
3642                         ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3643
3644                         if (!cid_count_ulp[ulp_base_num])
3645                                 ulp_base_num = (ulp_base_num + 1) %
3646                                                 BEISCSI_ULP_COUNT;
3647
3648                         cid_count_ulp[ulp_base_num]--;
3649                 }
3650
3651
3652                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3653                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3654                                             &phwi_context->be_wrbq[i],
3655                                             &phwi_ctrlr->wrb_context[i],
3656                                             ulp_base_num);
3657                 if (status != 0) {
3658                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3659                                     "BM_%d : wrbq create failed.");
3660                         kfree(pwrb_arr);
3661                         return status;
3662                 }
3663                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3664                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3665         }
3666         kfree(pwrb_arr);
3667         return 0;
3668 }
3669
3670 static void free_wrb_handles(struct beiscsi_hba *phba)
3671 {
3672         unsigned int index;
3673         struct hwi_controller *phwi_ctrlr;
3674         struct hwi_wrb_context *pwrb_context;
3675
3676         phwi_ctrlr = phba->phwi_ctrlr;
3677         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3678                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3679                 kfree(pwrb_context->pwrb_handle_base);
3680                 kfree(pwrb_context->pwrb_handle_basestd);
3681         }
3682 }
3683
3684 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3685 {
3686         struct be_queue_info *q;
3687         struct be_ctrl_info *ctrl = &phba->ctrl;
3688
3689         q = &phba->ctrl.mcc_obj.q;
3690         if (q->created)
3691                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3692         be_queue_free(phba, q);
3693
3694         q = &phba->ctrl.mcc_obj.cq;
3695         if (q->created)
3696                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3697         be_queue_free(phba, q);
3698 }
3699
3700 static void hwi_cleanup(struct beiscsi_hba *phba)
3701 {
3702         struct be_queue_info *q;
3703         struct be_ctrl_info *ctrl = &phba->ctrl;
3704         struct hwi_controller *phwi_ctrlr;
3705         struct hwi_context_memory *phwi_context;
3706         struct hwi_async_pdu_context *pasync_ctx;
3707         int i, eq_num, ulp_num;
3708
3709         phwi_ctrlr = phba->phwi_ctrlr;
3710         phwi_context = phwi_ctrlr->phwi_ctxt;
3711
3712         be_cmd_iscsi_remove_template_hdr(ctrl);
3713
3714         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3715                 q = &phwi_context->be_wrbq[i];
3716                 if (q->created)
3717                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3718         }
3719         kfree(phwi_context->be_wrbq);
3720         free_wrb_handles(phba);
3721
3722         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3723                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3724
3725                         q = &phwi_context->be_def_hdrq[ulp_num];
3726                         if (q->created)
3727                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3728
3729                         q = &phwi_context->be_def_dataq[ulp_num];
3730                         if (q->created)
3731                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3732
3733                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
3734                 }
3735         }
3736
3737         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3738
3739         for (i = 0; i < (phba->num_cpus); i++) {
3740                 q = &phwi_context->be_cq[i];
3741                 if (q->created)
3742                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3743         }
3744         if (phba->msix_enabled)
3745                 eq_num = 1;
3746         else
3747                 eq_num = 0;
3748         for (i = 0; i < (phba->num_cpus + eq_num); i++) {
3749                 q = &phwi_context->be_eq[i].q;
3750                 if (q->created)
3751                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3752         }
3753         be_mcc_queues_destroy(phba);
3754         be_cmd_fw_uninit(ctrl);
3755 }
3756
3757 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3758                                 struct hwi_context_memory *phwi_context)
3759 {
3760         struct be_queue_info *q, *cq;
3761         struct be_ctrl_info *ctrl = &phba->ctrl;
3762
3763         /* Alloc MCC compl queue */
3764         cq = &phba->ctrl.mcc_obj.cq;
3765         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3766                         sizeof(struct be_mcc_compl)))
3767                 goto err;
3768         /* Ask BE to create MCC compl queue; */
3769         if (phba->msix_enabled) {
3770                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3771                                          [phba->num_cpus].q, false, true, 0))
3772                 goto mcc_cq_free;
3773         } else {
3774                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3775                                           false, true, 0))
3776                 goto mcc_cq_free;
3777         }
3778
3779         /* Alloc MCC queue */
3780         q = &phba->ctrl.mcc_obj.q;
3781         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3782                 goto mcc_cq_destroy;
3783
3784         /* Ask BE to create MCC queue */
3785         if (beiscsi_cmd_mccq_create(phba, q, cq))
3786                 goto mcc_q_free;
3787
3788         return 0;
3789
3790 mcc_q_free:
3791         be_queue_free(phba, q);
3792 mcc_cq_destroy:
3793         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3794 mcc_cq_free:
3795         be_queue_free(phba, cq);
3796 err:
3797         return -ENOMEM;
3798 }
3799
3800 /**
3801  * find_num_cpus()- Get the CPU online count
3802  * @phba: ptr to priv structure
3803  *
3804  * CPU count is used for creating EQ.
3805  **/
3806 static void find_num_cpus(struct beiscsi_hba *phba)
3807 {
3808         int  num_cpus = 0;
3809
3810         num_cpus = num_online_cpus();
3811
3812         switch (phba->generation) {
3813         case BE_GEN2:
3814         case BE_GEN3:
3815                 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3816                                   BEISCSI_MAX_NUM_CPUS : num_cpus;
3817                 break;
3818         case BE_GEN4:
3819                 /*
3820                  * If eqid_count == 1 fall back to
3821                  * INTX mechanism
3822                  **/
3823                 if (phba->fw_config.eqid_count == 1) {
3824                         enable_msix = 0;
3825                         phba->num_cpus = 1;
3826                         return;
3827                 }
3828
3829                 phba->num_cpus =
3830                         (num_cpus > (phba->fw_config.eqid_count - 1)) ?
3831                         (phba->fw_config.eqid_count - 1) : num_cpus;
3832                 break;
3833         default:
3834                 phba->num_cpus = 1;
3835         }
3836 }
3837
3838 static int hwi_init_port(struct beiscsi_hba *phba)
3839 {
3840         struct hwi_controller *phwi_ctrlr;
3841         struct hwi_context_memory *phwi_context;
3842         unsigned int def_pdu_ring_sz;
3843         struct be_ctrl_info *ctrl = &phba->ctrl;
3844         int status, ulp_num;
3845
3846         phwi_ctrlr = phba->phwi_ctrlr;
3847         phwi_context = phwi_ctrlr->phwi_ctxt;
3848         phwi_context->max_eqd = 0;
3849         phwi_context->min_eqd = 0;
3850         phwi_context->cur_eqd = 64;
3851         be_cmd_fw_initialize(&phba->ctrl);
3852
3853         status = beiscsi_create_eqs(phba, phwi_context);
3854         if (status != 0) {
3855                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3856                             "BM_%d : EQ not created\n");
3857                 goto error;
3858         }
3859
3860         status = be_mcc_queues_create(phba, phwi_context);
3861         if (status != 0)
3862                 goto error;
3863
3864         status = mgmt_check_supported_fw(ctrl, phba);
3865         if (status != 0) {
3866                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3867                             "BM_%d : Unsupported fw version\n");
3868                 goto error;
3869         }
3870
3871         status = beiscsi_create_cqs(phba, phwi_context);
3872         if (status != 0) {
3873                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3874                             "BM_%d : CQ not created\n");
3875                 goto error;
3876         }
3877
3878         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3879                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3880
3881                         def_pdu_ring_sz =
3882                                 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
3883                                 sizeof(struct phys_addr);
3884
3885                         status = beiscsi_create_def_hdr(phba, phwi_context,
3886                                                         phwi_ctrlr,
3887                                                         def_pdu_ring_sz,
3888                                                         ulp_num);
3889                         if (status != 0) {
3890                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3891                                             "BM_%d : Default Header not created for ULP : %d\n",
3892                                             ulp_num);
3893                                 goto error;
3894                         }
3895
3896                         status = beiscsi_create_def_data(phba, phwi_context,
3897                                                          phwi_ctrlr,
3898                                                          def_pdu_ring_sz,
3899                                                          ulp_num);
3900                         if (status != 0) {
3901                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3902                                             "BM_%d : Default Data not created for ULP : %d\n",
3903                                             ulp_num);
3904                                 goto error;
3905                         }
3906                 }
3907         }
3908
3909         status = beiscsi_post_pages(phba);
3910         if (status != 0) {
3911                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3912                             "BM_%d : Post SGL Pages Failed\n");
3913                 goto error;
3914         }
3915
3916         status = beiscsi_post_template_hdr(phba);
3917         if (status != 0) {
3918                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3919                             "BM_%d : Template HDR Posting for CXN Failed\n");
3920         }
3921
3922         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3923         if (status != 0) {
3924                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3925                             "BM_%d : WRB Rings not created\n");
3926                 goto error;
3927         }
3928
3929         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3930                 uint16_t async_arr_idx = 0;
3931
3932                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3933                         uint16_t cri = 0;
3934                         struct hwi_async_pdu_context *pasync_ctx;
3935
3936                         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3937                                      phwi_ctrlr, ulp_num);
3938                         for (cri = 0; cri <
3939                              phba->params.cxns_per_ctrl; cri++) {
3940                                 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3941                                                (phwi_ctrlr, cri))
3942                                         pasync_ctx->cid_to_async_cri_map[
3943                                         phwi_ctrlr->wrb_context[cri].cid] =
3944                                         async_arr_idx++;
3945                         }
3946                 }
3947         }
3948
3949         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3950                     "BM_%d : hwi_init_port success\n");
3951         return 0;
3952
3953 error:
3954         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3955                     "BM_%d : hwi_init_port failed");
3956         hwi_cleanup(phba);
3957         return status;
3958 }
3959
3960 static int hwi_init_controller(struct beiscsi_hba *phba)
3961 {
3962         struct hwi_controller *phwi_ctrlr;
3963
3964         phwi_ctrlr = phba->phwi_ctrlr;
3965         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3966                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3967                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3968                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3969                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3970                             phwi_ctrlr->phwi_ctxt);
3971         } else {
3972                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3973                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3974                             "than one element.Failing to load\n");
3975                 return -ENOMEM;
3976         }
3977
3978         iscsi_init_global_templates(phba);
3979         if (beiscsi_init_wrb_handle(phba))
3980                 return -ENOMEM;
3981
3982         if (hwi_init_async_pdu_ctx(phba)) {
3983                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3984                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
3985                 return -ENOMEM;
3986         }
3987
3988         if (hwi_init_port(phba) != 0) {
3989                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3990                             "BM_%d : hwi_init_controller failed\n");
3991
3992                 return -ENOMEM;
3993         }
3994         return 0;
3995 }
3996
3997 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3998 {
3999         struct be_mem_descriptor *mem_descr;
4000         int i, j;
4001
4002         mem_descr = phba->init_mem;
4003         i = 0;
4004         j = 0;
4005         for (i = 0; i < SE_MEM_MAX; i++) {
4006                 for (j = mem_descr->num_elements; j > 0; j--) {
4007                         pci_free_consistent(phba->pcidev,
4008                           mem_descr->mem_array[j - 1].size,
4009                           mem_descr->mem_array[j - 1].virtual_address,
4010                           (unsigned long)mem_descr->mem_array[j - 1].
4011                           bus_address.u.a64.address);
4012                 }
4013
4014                 kfree(mem_descr->mem_array);
4015                 mem_descr++;
4016         }
4017         kfree(phba->init_mem);
4018         kfree(phba->phwi_ctrlr->wrb_context);
4019         kfree(phba->phwi_ctrlr);
4020 }
4021
4022 static int beiscsi_init_controller(struct beiscsi_hba *phba)
4023 {
4024         int ret = -ENOMEM;
4025
4026         ret = beiscsi_get_memory(phba);
4027         if (ret < 0) {
4028                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4029                             "BM_%d : beiscsi_dev_probe -"
4030                             "Failed in beiscsi_alloc_memory\n");
4031                 return ret;
4032         }
4033
4034         ret = hwi_init_controller(phba);
4035         if (ret)
4036                 goto free_init;
4037         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4038                     "BM_%d : Return success from beiscsi_init_controller");
4039
4040         return 0;
4041
4042 free_init:
4043         beiscsi_free_mem(phba);
4044         return ret;
4045 }
4046
4047 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
4048 {
4049         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
4050         struct sgl_handle *psgl_handle;
4051         struct iscsi_sge *pfrag;
4052         unsigned int arr_index, i, idx;
4053         unsigned int ulp_icd_start, ulp_num = 0;
4054
4055         phba->io_sgl_hndl_avbl = 0;
4056         phba->eh_sgl_hndl_avbl = 0;
4057
4058         mem_descr_sglh = phba->init_mem;
4059         mem_descr_sglh += HWI_MEM_SGLH;
4060         if (1 == mem_descr_sglh->num_elements) {
4061                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4062                                                  phba->params.ios_per_ctrl,
4063                                                  GFP_KERNEL);
4064                 if (!phba->io_sgl_hndl_base) {
4065                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4066                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4067                         return -ENOMEM;
4068                 }
4069                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
4070                                                  (phba->params.icds_per_ctrl -
4071                                                  phba->params.ios_per_ctrl),
4072                                                  GFP_KERNEL);
4073                 if (!phba->eh_sgl_hndl_base) {
4074                         kfree(phba->io_sgl_hndl_base);
4075                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4076                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
4077                         return -ENOMEM;
4078                 }
4079         } else {
4080                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4081                             "BM_%d : HWI_MEM_SGLH is more than one element."
4082                             "Failing to load\n");
4083                 return -ENOMEM;
4084         }
4085
4086         arr_index = 0;
4087         idx = 0;
4088         while (idx < mem_descr_sglh->num_elements) {
4089                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
4090
4091                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
4092                       sizeof(struct sgl_handle)); i++) {
4093                         if (arr_index < phba->params.ios_per_ctrl) {
4094                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
4095                                 phba->io_sgl_hndl_avbl++;
4096                                 arr_index++;
4097                         } else {
4098                                 phba->eh_sgl_hndl_base[arr_index -
4099                                         phba->params.ios_per_ctrl] =
4100                                                                 psgl_handle;
4101                                 arr_index++;
4102                                 phba->eh_sgl_hndl_avbl++;
4103                         }
4104                         psgl_handle++;
4105                 }
4106                 idx++;
4107         }
4108         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4109                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
4110                     "phba->eh_sgl_hndl_avbl=%d\n",
4111                     phba->io_sgl_hndl_avbl,
4112                     phba->eh_sgl_hndl_avbl);
4113
4114         mem_descr_sg = phba->init_mem;
4115         mem_descr_sg += HWI_MEM_SGE;
4116         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4117                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
4118                     mem_descr_sg->num_elements);
4119
4120         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
4121                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
4122                         break;
4123
4124         ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4125
4126         arr_index = 0;
4127         idx = 0;
4128         while (idx < mem_descr_sg->num_elements) {
4129                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
4130
4131                 for (i = 0;
4132                      i < (mem_descr_sg->mem_array[idx].size) /
4133                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
4134                      i++) {
4135                         if (arr_index < phba->params.ios_per_ctrl)
4136                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
4137                         else
4138                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
4139                                                 phba->params.ios_per_ctrl];
4140                         psgl_handle->pfrag = pfrag;
4141                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
4142                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
4143                         pfrag += phba->params.num_sge_per_io;
4144                         psgl_handle->sgl_index = ulp_icd_start + arr_index++;
4145                 }
4146                 idx++;
4147         }
4148         phba->io_sgl_free_index = 0;
4149         phba->io_sgl_alloc_index = 0;
4150         phba->eh_sgl_free_index = 0;
4151         phba->eh_sgl_alloc_index = 0;
4152         return 0;
4153 }
4154
4155 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
4156 {
4157         int ret;
4158         uint16_t i, ulp_num;
4159         struct ulp_cid_info *ptr_cid_info = NULL;
4160
4161         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4162                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4163                         ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
4164                                                GFP_KERNEL);
4165
4166                         if (!ptr_cid_info) {
4167                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4168                                             "BM_%d : Failed to allocate memory"
4169                                             "for ULP_CID_INFO for ULP : %d\n",
4170                                             ulp_num);
4171                                 ret = -ENOMEM;
4172                                 goto free_memory;
4173
4174                         }
4175
4176                         /* Allocate memory for CID array */
4177                         ptr_cid_info->cid_array = kzalloc(sizeof(void *) *
4178                                                   BEISCSI_GET_CID_COUNT(phba,
4179                                                   ulp_num), GFP_KERNEL);
4180                         if (!ptr_cid_info->cid_array) {
4181                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4182                                             "BM_%d : Failed to allocate memory"
4183                                             "for CID_ARRAY for ULP : %d\n",
4184                                             ulp_num);
4185                                 kfree(ptr_cid_info);
4186                                 ptr_cid_info = NULL;
4187                                 ret = -ENOMEM;
4188
4189                                 goto free_memory;
4190                         }
4191                         ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4192                                                    phba, ulp_num);
4193
4194                         /* Save the cid_info_array ptr */
4195                         phba->cid_array_info[ulp_num] = ptr_cid_info;
4196                 }
4197         }
4198         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
4199                                  phba->params.cxns_per_ctrl, GFP_KERNEL);
4200         if (!phba->ep_array) {
4201                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4202                             "BM_%d : Failed to allocate memory in "
4203                             "hba_setup_cid_tbls\n");
4204                 ret = -ENOMEM;
4205
4206                 goto free_memory;
4207         }
4208
4209         phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
4210                                    phba->params.cxns_per_ctrl, GFP_KERNEL);
4211         if (!phba->conn_table) {
4212                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4213                             "BM_%d : Failed to allocate memory in"
4214                             "hba_setup_cid_tbls\n");
4215
4216                 kfree(phba->ep_array);
4217                 phba->ep_array = NULL;
4218                 ret = -ENOMEM;
4219         }
4220
4221         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4222                 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4223
4224                 ptr_cid_info = phba->cid_array_info[ulp_num];
4225                 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4226                         phba->phwi_ctrlr->wrb_context[i].cid;
4227
4228         }
4229
4230         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4231                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4232                         ptr_cid_info = phba->cid_array_info[ulp_num];
4233
4234                         ptr_cid_info->cid_alloc = 0;
4235                         ptr_cid_info->cid_free = 0;
4236                 }
4237         }
4238         return 0;
4239
4240 free_memory:
4241         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4242                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4243                         ptr_cid_info = phba->cid_array_info[ulp_num];
4244
4245                         if (ptr_cid_info) {
4246                                 kfree(ptr_cid_info->cid_array);
4247                                 kfree(ptr_cid_info);
4248                                 phba->cid_array_info[ulp_num] = NULL;
4249                         }
4250                 }
4251         }
4252
4253         return ret;
4254 }
4255
4256 static void hwi_enable_intr(struct beiscsi_hba *phba)
4257 {
4258         struct be_ctrl_info *ctrl = &phba->ctrl;
4259         struct hwi_controller *phwi_ctrlr;
4260         struct hwi_context_memory *phwi_context;
4261         struct be_queue_info *eq;
4262         u8 __iomem *addr;
4263         u32 reg, i;
4264         u32 enabled;
4265
4266         phwi_ctrlr = phba->phwi_ctrlr;
4267         phwi_context = phwi_ctrlr->phwi_ctxt;
4268
4269         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4270                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4271         reg = ioread32(addr);
4272
4273         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4274         if (!enabled) {
4275                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4276                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4277                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4278                 iowrite32(reg, addr);
4279         }
4280
4281         if (!phba->msix_enabled) {
4282                 eq = &phwi_context->be_eq[0].q;
4283                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4284                             "BM_%d : eq->id=%d\n", eq->id);
4285
4286                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4287         } else {
4288                 for (i = 0; i <= phba->num_cpus; i++) {
4289                         eq = &phwi_context->be_eq[i].q;
4290                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4291                                     "BM_%d : eq->id=%d\n", eq->id);
4292                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4293                 }
4294         }
4295 }
4296
4297 static void hwi_disable_intr(struct beiscsi_hba *phba)
4298 {
4299         struct be_ctrl_info *ctrl = &phba->ctrl;
4300
4301         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4302         u32 reg = ioread32(addr);
4303
4304         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4305         if (enabled) {
4306                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4307                 iowrite32(reg, addr);
4308         } else
4309                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4310                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
4311 }
4312
4313 /**
4314  * beiscsi_get_boot_info()- Get the boot session info
4315  * @phba: The device priv structure instance
4316  *
4317  * Get the boot target info and store in driver priv structure
4318  *
4319  * return values
4320  *      Success: 0
4321  *      Failure: Non-Zero Value
4322  **/
4323 static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
4324 {
4325         struct be_cmd_get_session_resp *session_resp;
4326         struct be_dma_mem nonemb_cmd;
4327         unsigned int tag;
4328         unsigned int s_handle;
4329         int ret = -ENOMEM;
4330
4331         /* Get the session handle of the boot target */
4332         ret = be_mgmt_get_boot_shandle(phba, &s_handle);
4333         if (ret) {
4334                 beiscsi_log(phba, KERN_ERR,
4335                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4336                             "BM_%d : No boot session\n");
4337                 return ret;
4338         }
4339         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4340                                 sizeof(*session_resp),
4341                                 &nonemb_cmd.dma);
4342         if (nonemb_cmd.va == NULL) {
4343                 beiscsi_log(phba, KERN_ERR,
4344                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4345                             "BM_%d : Failed to allocate memory for"
4346                             "beiscsi_get_session_info\n");
4347
4348                 return -ENOMEM;
4349         }
4350
4351         memset(nonemb_cmd.va, 0, sizeof(*session_resp));
4352         tag = mgmt_get_session_info(phba, s_handle,
4353                                     &nonemb_cmd);
4354         if (!tag) {
4355                 beiscsi_log(phba, KERN_ERR,
4356                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4357                             "BM_%d : beiscsi_get_session_info"
4358                             " Failed\n");
4359
4360                 goto boot_freemem;
4361         }
4362
4363         ret = beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
4364         if (ret) {
4365                 beiscsi_log(phba, KERN_ERR,
4366                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
4367                             "BM_%d : beiscsi_get_session_info Failed");
4368                 goto boot_freemem;
4369         }
4370
4371         session_resp = nonemb_cmd.va ;
4372
4373         memcpy(&phba->boot_sess, &session_resp->session_info,
4374                sizeof(struct mgmt_session_info));
4375         ret = 0;
4376
4377 boot_freemem:
4378         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4379                     nonemb_cmd.va, nonemb_cmd.dma);
4380         return ret;
4381 }
4382
4383 static void beiscsi_boot_release(void *data)
4384 {
4385         struct beiscsi_hba *phba = data;
4386
4387         scsi_host_put(phba->shost);
4388 }
4389
4390 static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
4391 {
4392         struct iscsi_boot_kobj *boot_kobj;
4393
4394         /* get boot info using mgmt cmd */
4395         if (beiscsi_get_boot_info(phba))
4396                 /* Try to see if we can carry on without this */
4397                 return 0;
4398
4399         phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4400         if (!phba->boot_kset)
4401                 return -ENOMEM;
4402
4403         /* get a ref because the show function will ref the phba */
4404         if (!scsi_host_get(phba->shost))
4405                 goto free_kset;
4406         boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4407                                              beiscsi_show_boot_tgt_info,
4408                                              beiscsi_tgt_get_attr_visibility,
4409                                              beiscsi_boot_release);
4410         if (!boot_kobj)
4411                 goto put_shost;
4412
4413         if (!scsi_host_get(phba->shost))
4414                 goto free_kset;
4415         boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4416                                                 beiscsi_show_boot_ini_info,
4417                                                 beiscsi_ini_get_attr_visibility,
4418                                                 beiscsi_boot_release);
4419         if (!boot_kobj)
4420                 goto put_shost;
4421
4422         if (!scsi_host_get(phba->shost))
4423                 goto free_kset;
4424         boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4425                                                beiscsi_show_boot_eth_info,
4426                                                beiscsi_eth_get_attr_visibility,
4427                                                beiscsi_boot_release);
4428         if (!boot_kobj)
4429                 goto put_shost;
4430         return 0;
4431
4432 put_shost:
4433         scsi_host_put(phba->shost);
4434 free_kset:
4435         iscsi_boot_destroy_kset(phba->boot_kset);
4436         return -ENOMEM;
4437 }
4438
4439 static int beiscsi_init_port(struct beiscsi_hba *phba)
4440 {
4441         int ret;
4442
4443         ret = beiscsi_init_controller(phba);
4444         if (ret < 0) {
4445                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4446                             "BM_%d : beiscsi_dev_probe - Failed in"
4447                             "beiscsi_init_controller\n");
4448                 return ret;
4449         }
4450         ret = beiscsi_init_sgl_handle(phba);
4451         if (ret < 0) {
4452                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4453                             "BM_%d : beiscsi_dev_probe - Failed in"
4454                             "beiscsi_init_sgl_handle\n");
4455                 goto do_cleanup_ctrlr;
4456         }
4457
4458         if (hba_setup_cid_tbls(phba)) {
4459                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4460                             "BM_%d : Failed in hba_setup_cid_tbls\n");
4461                 kfree(phba->io_sgl_hndl_base);
4462                 kfree(phba->eh_sgl_hndl_base);
4463                 goto do_cleanup_ctrlr;
4464         }
4465
4466         return ret;
4467
4468 do_cleanup_ctrlr:
4469         hwi_cleanup(phba);
4470         return ret;
4471 }
4472
4473 static void hwi_purge_eq(struct beiscsi_hba *phba)
4474 {
4475         struct hwi_controller *phwi_ctrlr;
4476         struct hwi_context_memory *phwi_context;
4477         struct be_queue_info *eq;
4478         struct be_eq_entry *eqe = NULL;
4479         int i, eq_msix;
4480         unsigned int num_processed;
4481
4482         phwi_ctrlr = phba->phwi_ctrlr;
4483         phwi_context = phwi_ctrlr->phwi_ctxt;
4484         if (phba->msix_enabled)
4485                 eq_msix = 1;
4486         else
4487                 eq_msix = 0;
4488
4489         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4490                 eq = &phwi_context->be_eq[i].q;
4491                 eqe = queue_tail_node(eq);
4492                 num_processed = 0;
4493                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4494                                         & EQE_VALID_MASK) {
4495                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4496                         queue_tail_inc(eq);
4497                         eqe = queue_tail_node(eq);
4498                         num_processed++;
4499                 }
4500
4501                 if (num_processed)
4502                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
4503         }
4504 }
4505
4506 static void beiscsi_clean_port(struct beiscsi_hba *phba)
4507 {
4508         int mgmt_status, ulp_num;
4509         struct ulp_cid_info *ptr_cid_info = NULL;
4510
4511         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4512                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4513                         mgmt_status = mgmt_epfw_cleanup(phba, ulp_num);
4514                         if (mgmt_status)
4515                                 beiscsi_log(phba, KERN_WARNING,
4516                                             BEISCSI_LOG_INIT,
4517                                             "BM_%d : mgmt_epfw_cleanup FAILED"
4518                                             " for ULP_%d\n", ulp_num);
4519                 }
4520         }
4521
4522         hwi_purge_eq(phba);
4523         hwi_cleanup(phba);
4524         kfree(phba->io_sgl_hndl_base);
4525         kfree(phba->eh_sgl_hndl_base);
4526         kfree(phba->ep_array);
4527         kfree(phba->conn_table);
4528
4529         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4530                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4531                         ptr_cid_info = phba->cid_array_info[ulp_num];
4532
4533                         if (ptr_cid_info) {
4534                                 kfree(ptr_cid_info->cid_array);
4535                                 kfree(ptr_cid_info);
4536                                 phba->cid_array_info[ulp_num] = NULL;
4537                         }
4538                 }
4539         }
4540
4541 }
4542
4543 /**
4544  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4545  * @beiscsi_conn: ptr to the conn to be cleaned up
4546  * @task: ptr to iscsi_task resource to be freed.
4547  *
4548  * Free driver mgmt resources binded to CXN.
4549  **/
4550 void
4551 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4552                                 struct iscsi_task *task)
4553 {
4554         struct beiscsi_io_task *io_task;
4555         struct beiscsi_hba *phba = beiscsi_conn->phba;
4556         struct hwi_wrb_context *pwrb_context;
4557         struct hwi_controller *phwi_ctrlr;
4558         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4559                                 beiscsi_conn->beiscsi_conn_cid);
4560
4561         phwi_ctrlr = phba->phwi_ctrlr;
4562         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4563
4564         io_task = task->dd_data;
4565
4566         if (io_task->pwrb_handle) {
4567                 memset(io_task->pwrb_handle->pwrb, 0,
4568                        sizeof(struct iscsi_wrb));
4569                 free_wrb_handle(phba, pwrb_context,
4570                                 io_task->pwrb_handle);
4571                 io_task->pwrb_handle = NULL;
4572         }
4573
4574         if (io_task->psgl_handle) {
4575                 spin_lock_bh(&phba->mgmt_sgl_lock);
4576                 free_mgmt_sgl_handle(phba,
4577                                      io_task->psgl_handle);
4578                 io_task->psgl_handle = NULL;
4579                 spin_unlock_bh(&phba->mgmt_sgl_lock);
4580         }
4581
4582         if (io_task->mtask_addr)
4583                 pci_unmap_single(phba->pcidev,
4584                                  io_task->mtask_addr,
4585                                  io_task->mtask_data_count,
4586                                  PCI_DMA_TODEVICE);
4587 }
4588
4589 /**
4590  * beiscsi_cleanup_task()- Free driver resources of the task
4591  * @task: ptr to the iscsi task
4592  *
4593  **/
4594 static void beiscsi_cleanup_task(struct iscsi_task *task)
4595 {
4596         struct beiscsi_io_task *io_task = task->dd_data;
4597         struct iscsi_conn *conn = task->conn;
4598         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4599         struct beiscsi_hba *phba = beiscsi_conn->phba;
4600         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4601         struct hwi_wrb_context *pwrb_context;
4602         struct hwi_controller *phwi_ctrlr;
4603         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4604                              beiscsi_conn->beiscsi_conn_cid);
4605
4606         phwi_ctrlr = phba->phwi_ctrlr;
4607         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4608
4609         if (io_task->cmd_bhs) {
4610                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4611                               io_task->bhs_pa.u.a64.address);
4612                 io_task->cmd_bhs = NULL;
4613         }
4614
4615         if (task->sc) {
4616                 if (io_task->pwrb_handle) {
4617                         free_wrb_handle(phba, pwrb_context,
4618                                         io_task->pwrb_handle);
4619                         io_task->pwrb_handle = NULL;
4620                 }
4621
4622                 if (io_task->psgl_handle) {
4623                         spin_lock(&phba->io_sgl_lock);
4624                         free_io_sgl_handle(phba, io_task->psgl_handle);
4625                         spin_unlock(&phba->io_sgl_lock);
4626                         io_task->psgl_handle = NULL;
4627                 }
4628         } else {
4629                 if (!beiscsi_conn->login_in_progress)
4630                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4631         }
4632 }
4633
4634 void
4635 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4636                            struct beiscsi_offload_params *params)
4637 {
4638         struct wrb_handle *pwrb_handle;
4639         struct beiscsi_hba *phba = beiscsi_conn->phba;
4640         struct iscsi_task *task = beiscsi_conn->task;
4641         struct iscsi_session *session = task->conn->session;
4642         u32 doorbell = 0;
4643
4644         /*
4645          * We can always use 0 here because it is reserved by libiscsi for
4646          * login/startup related tasks.
4647          */
4648         beiscsi_conn->login_in_progress = 0;
4649         spin_lock_bh(&session->lock);
4650         beiscsi_cleanup_task(task);
4651         spin_unlock_bh(&session->lock);
4652
4653         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid);
4654
4655         /* Check for the adapter family */
4656         if (is_chip_be2_be3r(phba))
4657                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4658                                        phba->init_mem);
4659         else
4660                 beiscsi_offload_cxn_v2(params, pwrb_handle);
4661
4662         be_dws_le_to_cpu(pwrb_handle->pwrb,
4663                          sizeof(struct iscsi_target_context_update_wrb));
4664
4665         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4666         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4667                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4668         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4669         iowrite32(doorbell, phba->db_va +
4670                   beiscsi_conn->doorbell_offset);
4671 }
4672
4673 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4674                               int *index, int *age)
4675 {
4676         *index = (int)itt;
4677         if (age)
4678                 *age = conn->session->age;
4679 }
4680
4681 /**
4682  * beiscsi_alloc_pdu - allocates pdu and related resources
4683  * @task: libiscsi task
4684  * @opcode: opcode of pdu for task
4685  *
4686  * This is called with the session lock held. It will allocate
4687  * the wrb and sgl if needed for the command. And it will prep
4688  * the pdu's itt. beiscsi_parse_pdu will later translate
4689  * the pdu itt to the libiscsi task itt.
4690  */
4691 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4692 {
4693         struct beiscsi_io_task *io_task = task->dd_data;
4694         struct iscsi_conn *conn = task->conn;
4695         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4696         struct beiscsi_hba *phba = beiscsi_conn->phba;
4697         struct hwi_wrb_context *pwrb_context;
4698         struct hwi_controller *phwi_ctrlr;
4699         itt_t itt;
4700         uint16_t cri_index = 0;
4701         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4702         dma_addr_t paddr;
4703
4704         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4705                                           GFP_ATOMIC, &paddr);
4706         if (!io_task->cmd_bhs)
4707                 return -ENOMEM;
4708         io_task->bhs_pa.u.a64.address = paddr;
4709         io_task->libiscsi_itt = (itt_t)task->itt;
4710         io_task->conn = beiscsi_conn;
4711
4712         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4713         task->hdr_max = sizeof(struct be_cmd_bhs);
4714         io_task->psgl_handle = NULL;
4715         io_task->pwrb_handle = NULL;
4716
4717         if (task->sc) {
4718                 spin_lock(&phba->io_sgl_lock);
4719                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4720                 spin_unlock(&phba->io_sgl_lock);
4721                 if (!io_task->psgl_handle) {
4722                         beiscsi_log(phba, KERN_ERR,
4723                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4724                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4725                                     "for the CID : %d\n",
4726                                     beiscsi_conn->beiscsi_conn_cid);
4727                         goto free_hndls;
4728                 }
4729                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4730                                         beiscsi_conn->beiscsi_conn_cid);
4731                 if (!io_task->pwrb_handle) {
4732                         beiscsi_log(phba, KERN_ERR,
4733                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4734                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4735                                     "for the CID : %d\n",
4736                                     beiscsi_conn->beiscsi_conn_cid);
4737                         goto free_io_hndls;
4738                 }
4739         } else {
4740                 io_task->scsi_cmnd = NULL;
4741                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4742                         beiscsi_conn->task = task;
4743                         if (!beiscsi_conn->login_in_progress) {
4744                                 spin_lock(&phba->mgmt_sgl_lock);
4745                                 io_task->psgl_handle = (struct sgl_handle *)
4746                                                 alloc_mgmt_sgl_handle(phba);
4747                                 spin_unlock(&phba->mgmt_sgl_lock);
4748                                 if (!io_task->psgl_handle) {
4749                                         beiscsi_log(phba, KERN_ERR,
4750                                                     BEISCSI_LOG_IO |
4751                                                     BEISCSI_LOG_CONFIG,
4752                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4753                                                     "for the CID : %d\n",
4754                                                     beiscsi_conn->
4755                                                     beiscsi_conn_cid);
4756                                         goto free_hndls;
4757                                 }
4758
4759                                 beiscsi_conn->login_in_progress = 1;
4760                                 beiscsi_conn->plogin_sgl_handle =
4761                                                         io_task->psgl_handle;
4762                                 io_task->pwrb_handle =
4763                                         alloc_wrb_handle(phba,
4764                                         beiscsi_conn->beiscsi_conn_cid);
4765                                 if (!io_task->pwrb_handle) {
4766                                         beiscsi_log(phba, KERN_ERR,
4767                                                     BEISCSI_LOG_IO |
4768                                                     BEISCSI_LOG_CONFIG,
4769                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4770                                                     "for the CID : %d\n",
4771                                                     beiscsi_conn->
4772                                                     beiscsi_conn_cid);
4773                                         goto free_mgmt_hndls;
4774                                 }
4775                                 beiscsi_conn->plogin_wrb_handle =
4776                                                         io_task->pwrb_handle;
4777
4778                         } else {
4779                                 io_task->psgl_handle =
4780                                                 beiscsi_conn->plogin_sgl_handle;
4781                                 io_task->pwrb_handle =
4782                                                 beiscsi_conn->plogin_wrb_handle;
4783                         }
4784                 } else {
4785                         spin_lock(&phba->mgmt_sgl_lock);
4786                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4787                         spin_unlock(&phba->mgmt_sgl_lock);
4788                         if (!io_task->psgl_handle) {
4789                                 beiscsi_log(phba, KERN_ERR,
4790                                             BEISCSI_LOG_IO |
4791                                             BEISCSI_LOG_CONFIG,
4792                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4793                                             "for the CID : %d\n",
4794                                             beiscsi_conn->
4795                                             beiscsi_conn_cid);
4796                                 goto free_hndls;
4797                         }
4798                         io_task->pwrb_handle =
4799                                         alloc_wrb_handle(phba,
4800                                         beiscsi_conn->beiscsi_conn_cid);
4801                         if (!io_task->pwrb_handle) {
4802                                 beiscsi_log(phba, KERN_ERR,
4803                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4804                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4805                                             "for the CID : %d\n",
4806                                             beiscsi_conn->beiscsi_conn_cid);
4807                                 goto free_mgmt_hndls;
4808                         }
4809
4810                 }
4811         }
4812         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4813                                  wrb_index << 16) | (unsigned int)
4814                                 (io_task->psgl_handle->sgl_index));
4815         io_task->pwrb_handle->pio_handle = task;
4816
4817         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4818         return 0;
4819
4820 free_io_hndls:
4821         spin_lock(&phba->io_sgl_lock);
4822         free_io_sgl_handle(phba, io_task->psgl_handle);
4823         spin_unlock(&phba->io_sgl_lock);
4824         goto free_hndls;
4825 free_mgmt_hndls:
4826         spin_lock(&phba->mgmt_sgl_lock);
4827         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4828         io_task->psgl_handle = NULL;
4829         spin_unlock(&phba->mgmt_sgl_lock);
4830 free_hndls:
4831         phwi_ctrlr = phba->phwi_ctrlr;
4832         cri_index = BE_GET_CRI_FROM_CID(
4833         beiscsi_conn->beiscsi_conn_cid);
4834         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4835         if (io_task->pwrb_handle)
4836                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4837         io_task->pwrb_handle = NULL;
4838         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4839                       io_task->bhs_pa.u.a64.address);
4840         io_task->cmd_bhs = NULL;
4841         return -ENOMEM;
4842 }
4843 int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4844                        unsigned int num_sg, unsigned int xferlen,
4845                        unsigned int writedir)
4846 {
4847
4848         struct beiscsi_io_task *io_task = task->dd_data;
4849         struct iscsi_conn *conn = task->conn;
4850         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4851         struct beiscsi_hba *phba = beiscsi_conn->phba;
4852         struct iscsi_wrb *pwrb = NULL;
4853         unsigned int doorbell = 0;
4854
4855         pwrb = io_task->pwrb_handle->pwrb;
4856
4857         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4858         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4859
4860         if (writedir) {
4861                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4862                               INI_WR_CMD);
4863                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4864         } else {
4865                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4866                               INI_RD_CMD);
4867                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4868         }
4869
4870         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4871                                           type, pwrb);
4872
4873         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4874                       cpu_to_be16(*(unsigned short *)
4875                       &io_task->cmd_bhs->iscsi_hdr.lun));
4876         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4877         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4878                       io_task->pwrb_handle->wrb_index);
4879         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4880                       be32_to_cpu(task->cmdsn));
4881         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4882                       io_task->psgl_handle->sgl_index);
4883
4884         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4885         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4886                       io_task->pwrb_handle->nxt_wrb_index);
4887
4888         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4889
4890         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4891         doorbell |= (io_task->pwrb_handle->wrb_index &
4892                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4893                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4894         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4895         iowrite32(doorbell, phba->db_va +
4896                   beiscsi_conn->doorbell_offset);
4897         return 0;
4898 }
4899
4900 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4901                           unsigned int num_sg, unsigned int xferlen,
4902                           unsigned int writedir)
4903 {
4904
4905         struct beiscsi_io_task *io_task = task->dd_data;
4906         struct iscsi_conn *conn = task->conn;
4907         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4908         struct beiscsi_hba *phba = beiscsi_conn->phba;
4909         struct iscsi_wrb *pwrb = NULL;
4910         unsigned int doorbell = 0;
4911
4912         pwrb = io_task->pwrb_handle->pwrb;
4913         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4914         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4915
4916         if (writedir) {
4917                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4918                               INI_WR_CMD);
4919                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4920         } else {
4921                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4922                               INI_RD_CMD);
4923                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4924         }
4925
4926         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4927                                           type, pwrb);
4928
4929         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4930                       cpu_to_be16(*(unsigned short *)
4931                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4932         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4933         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4934                       io_task->pwrb_handle->wrb_index);
4935         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4936                       be32_to_cpu(task->cmdsn));
4937         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4938                       io_task->psgl_handle->sgl_index);
4939
4940         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4941
4942         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4943                       io_task->pwrb_handle->nxt_wrb_index);
4944         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4945
4946         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4947         doorbell |= (io_task->pwrb_handle->wrb_index &
4948                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4949         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4950
4951         iowrite32(doorbell, phba->db_va +
4952                   beiscsi_conn->doorbell_offset);
4953         return 0;
4954 }
4955
4956 static int beiscsi_mtask(struct iscsi_task *task)
4957 {
4958         struct beiscsi_io_task *io_task = task->dd_data;
4959         struct iscsi_conn *conn = task->conn;
4960         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4961         struct beiscsi_hba *phba = beiscsi_conn->phba;
4962         struct iscsi_wrb *pwrb = NULL;
4963         unsigned int doorbell = 0;
4964         unsigned int cid;
4965         unsigned int pwrb_typeoffset = 0;
4966
4967         cid = beiscsi_conn->beiscsi_conn_cid;
4968         pwrb = io_task->pwrb_handle->pwrb;
4969         memset(pwrb, 0, sizeof(*pwrb));
4970
4971         if (is_chip_be2_be3r(phba)) {
4972                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4973                               be32_to_cpu(task->cmdsn));
4974                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4975                               io_task->pwrb_handle->wrb_index);
4976                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4977                               io_task->psgl_handle->sgl_index);
4978                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4979                               task->data_count);
4980                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4981                               io_task->pwrb_handle->nxt_wrb_index);
4982                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
4983         } else {
4984                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4985                               be32_to_cpu(task->cmdsn));
4986                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4987                               io_task->pwrb_handle->wrb_index);
4988                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4989                               io_task->psgl_handle->sgl_index);
4990                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4991                               task->data_count);
4992                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4993                               io_task->pwrb_handle->nxt_wrb_index);
4994                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
4995         }
4996
4997
4998         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4999         case ISCSI_OP_LOGIN:
5000                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
5001                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5002                 hwi_write_buffer(pwrb, task);
5003                 break;
5004         case ISCSI_OP_NOOP_OUT:
5005                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
5006                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5007                         if (is_chip_be2_be3r(phba))
5008                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5009                                               dmsg, pwrb, 1);
5010                         else
5011                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5012                                               dmsg, pwrb, 1);
5013                 } else {
5014                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
5015                         if (is_chip_be2_be3r(phba))
5016                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
5017                                               dmsg, pwrb, 0);
5018                         else
5019                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
5020                                               dmsg, pwrb, 0);
5021                 }
5022                 hwi_write_buffer(pwrb, task);
5023                 break;
5024         case ISCSI_OP_TEXT:
5025                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
5026                 hwi_write_buffer(pwrb, task);
5027                 break;
5028         case ISCSI_OP_SCSI_TMFUNC:
5029                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
5030                 hwi_write_buffer(pwrb, task);
5031                 break;
5032         case ISCSI_OP_LOGOUT:
5033                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
5034                 hwi_write_buffer(pwrb, task);
5035                 break;
5036
5037         default:
5038                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5039                             "BM_%d : opcode =%d Not supported\n",
5040                             task->hdr->opcode & ISCSI_OPCODE_MASK);
5041
5042                 return -EINVAL;
5043         }
5044
5045         /* Set the task type */
5046         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
5047                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
5048                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
5049
5050         doorbell |= cid & DB_WRB_POST_CID_MASK;
5051         doorbell |= (io_task->pwrb_handle->wrb_index &
5052                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
5053         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
5054         iowrite32(doorbell, phba->db_va +
5055                   beiscsi_conn->doorbell_offset);
5056         return 0;
5057 }
5058
5059 static int beiscsi_task_xmit(struct iscsi_task *task)
5060 {
5061         struct beiscsi_io_task *io_task = task->dd_data;
5062         struct scsi_cmnd *sc = task->sc;
5063         struct beiscsi_hba *phba = NULL;
5064         struct scatterlist *sg;
5065         int num_sg;
5066         unsigned int  writedir = 0, xferlen = 0;
5067
5068         phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
5069
5070         if (!sc)
5071                 return beiscsi_mtask(task);
5072
5073         io_task->scsi_cmnd = sc;
5074         num_sg = scsi_dma_map(sc);
5075         if (num_sg < 0) {
5076                 struct iscsi_conn *conn = task->conn;
5077                 struct beiscsi_hba *phba = NULL;
5078
5079                 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
5080                 beiscsi_log(phba, KERN_ERR,
5081                             BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
5082                             "BM_%d : scsi_dma_map Failed "
5083                             "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
5084                             be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
5085                             io_task->libiscsi_itt, scsi_bufflen(sc));
5086
5087                 return num_sg;
5088         }
5089         xferlen = scsi_bufflen(sc);
5090         sg = scsi_sglist(sc);
5091         if (sc->sc_data_direction == DMA_TO_DEVICE)
5092                 writedir = 1;
5093          else
5094                 writedir = 0;
5095
5096          return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
5097 }
5098
5099 /**
5100  * beiscsi_bsg_request - handle bsg request from ISCSI transport
5101  * @job: job to handle
5102  */
5103 static int beiscsi_bsg_request(struct bsg_job *job)
5104 {
5105         struct Scsi_Host *shost;
5106         struct beiscsi_hba *phba;
5107         struct iscsi_bsg_request *bsg_req = job->request;
5108         int rc = -EINVAL;
5109         unsigned int tag;
5110         struct be_dma_mem nonemb_cmd;
5111         struct be_cmd_resp_hdr *resp;
5112         struct iscsi_bsg_reply *bsg_reply = job->reply;
5113         unsigned short status, extd_status;
5114
5115         shost = iscsi_job_to_shost(job);
5116         phba = iscsi_host_priv(shost);
5117
5118         switch (bsg_req->msgcode) {
5119         case ISCSI_BSG_HST_VENDOR:
5120                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
5121                                         job->request_payload.payload_len,
5122                                         &nonemb_cmd.dma);
5123                 if (nonemb_cmd.va == NULL) {
5124                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5125                                     "BM_%d : Failed to allocate memory for "
5126                                     "beiscsi_bsg_request\n");
5127                         return -ENOMEM;
5128                 }
5129                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
5130                                                   &nonemb_cmd);
5131                 if (!tag) {
5132                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5133                                     "BM_%d : MBX Tag Allocation Failed\n");
5134
5135                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5136                                             nonemb_cmd.va, nonemb_cmd.dma);
5137                         return -EAGAIN;
5138                 }
5139
5140                 rc = wait_event_interruptible_timeout(
5141                                         phba->ctrl.mcc_wait[tag],
5142                                         phba->ctrl.mcc_numtag[tag],
5143                                         msecs_to_jiffies(
5144                                         BEISCSI_HOST_MBX_TIMEOUT));
5145                 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
5146                 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
5147                 free_mcc_tag(&phba->ctrl, tag);
5148                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
5149                 sg_copy_from_buffer(job->reply_payload.sg_list,
5150                                     job->reply_payload.sg_cnt,
5151                                     nonemb_cmd.va, (resp->response_length
5152                                     + sizeof(*resp)));
5153                 bsg_reply->reply_payload_rcv_len = resp->response_length;
5154                 bsg_reply->result = status;
5155                 bsg_job_done(job, bsg_reply->result,
5156                              bsg_reply->reply_payload_rcv_len);
5157                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
5158                                     nonemb_cmd.va, nonemb_cmd.dma);
5159                 if (status || extd_status) {
5160                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5161                                     "BM_%d : MBX Cmd Failed"
5162                                     " status = %d extd_status = %d\n",
5163                                     status, extd_status);
5164
5165                         return -EIO;
5166                 } else {
5167                         rc = 0;
5168                 }
5169                 break;
5170
5171         default:
5172                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
5173                                 "BM_%d : Unsupported bsg command: 0x%x\n",
5174                                 bsg_req->msgcode);
5175                 break;
5176         }
5177
5178         return rc;
5179 }
5180
5181 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
5182 {
5183         /* Set the logging parameter */
5184         beiscsi_log_enable_init(phba, beiscsi_log_enable);
5185 }
5186
5187 /*
5188  * beiscsi_quiesce()- Cleanup Driver resources
5189  * @phba: Instance Priv structure
5190  * @unload_state:i Clean or EEH unload state
5191  *
5192  * Free the OS and HW resources held by the driver
5193  **/
5194 static void beiscsi_quiesce(struct beiscsi_hba *phba,
5195                 uint32_t unload_state)
5196 {
5197         struct hwi_controller *phwi_ctrlr;
5198         struct hwi_context_memory *phwi_context;
5199         struct be_eq_obj *pbe_eq;
5200         unsigned int i, msix_vec;
5201
5202         phwi_ctrlr = phba->phwi_ctrlr;
5203         phwi_context = phwi_ctrlr->phwi_ctxt;
5204         hwi_disable_intr(phba);
5205         if (phba->msix_enabled) {
5206                 for (i = 0; i <= phba->num_cpus; i++) {
5207                         msix_vec = phba->msix_entries[i].vector;
5208                         synchronize_irq(msix_vec);
5209                         free_irq(msix_vec, &phwi_context->be_eq[i]);
5210                         kfree(phba->msi_name[i]);
5211                 }
5212         } else
5213                 if (phba->pcidev->irq) {
5214                         synchronize_irq(phba->pcidev->irq);
5215                         free_irq(phba->pcidev->irq, phba);
5216                 }
5217         pci_disable_msix(phba->pcidev);
5218
5219         if (blk_iopoll_enabled)
5220                 for (i = 0; i < phba->num_cpus; i++) {
5221                         pbe_eq = &phwi_context->be_eq[i];
5222                         blk_iopoll_disable(&pbe_eq->iopoll);
5223                 }
5224
5225         if (unload_state == BEISCSI_CLEAN_UNLOAD) {
5226                 destroy_workqueue(phba->wq);
5227                 beiscsi_clean_port(phba);
5228                 beiscsi_free_mem(phba);
5229
5230                 beiscsi_unmap_pci_function(phba);
5231                 pci_free_consistent(phba->pcidev,
5232                                     phba->ctrl.mbox_mem_alloced.size,
5233                                     phba->ctrl.mbox_mem_alloced.va,
5234                                     phba->ctrl.mbox_mem_alloced.dma);
5235         } else {
5236                 hwi_purge_eq(phba);
5237                 hwi_cleanup(phba);
5238         }
5239
5240         cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
5241 }
5242
5243 static void beiscsi_remove(struct pci_dev *pcidev)
5244 {
5245
5246         struct beiscsi_hba *phba = NULL;
5247
5248         phba = pci_get_drvdata(pcidev);
5249         if (!phba) {
5250                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5251                 return;
5252         }
5253
5254         beiscsi_destroy_def_ifaces(phba);
5255         beiscsi_quiesce(phba, BEISCSI_CLEAN_UNLOAD);
5256         iscsi_boot_destroy_kset(phba->boot_kset);
5257         iscsi_host_remove(phba->shost);
5258         pci_dev_put(phba->pcidev);
5259         iscsi_host_free(phba->shost);
5260         pci_disable_pcie_error_reporting(pcidev);
5261         pci_set_drvdata(pcidev, NULL);
5262         pci_disable_device(pcidev);
5263 }
5264
5265 static void beiscsi_shutdown(struct pci_dev *pcidev)
5266 {
5267
5268         struct beiscsi_hba *phba = NULL;
5269
5270         phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
5271         if (!phba) {
5272                 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
5273                 return;
5274         }
5275
5276         beiscsi_quiesce(phba, BEISCSI_CLEAN_UNLOAD);
5277         pci_disable_device(pcidev);
5278 }
5279
5280 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
5281 {
5282         int i, status;
5283
5284         for (i = 0; i <= phba->num_cpus; i++)
5285                 phba->msix_entries[i].entry = i;
5286
5287         status = pci_enable_msix(phba->pcidev, phba->msix_entries,
5288                                  (phba->num_cpus + 1));
5289         if (!status)
5290                 phba->msix_enabled = true;
5291
5292         return;
5293 }
5294
5295 /*
5296  * beiscsi_hw_health_check()- Check adapter health
5297  * @work: work item to check HW health
5298  *
5299  * Check if adapter in an unrecoverable state or not.
5300  **/
5301 static void
5302 beiscsi_hw_health_check(struct work_struct *work)
5303 {
5304         struct beiscsi_hba *phba =
5305                 container_of(work, struct beiscsi_hba,
5306                              beiscsi_hw_check_task.work);
5307
5308         beiscsi_ue_detect(phba);
5309
5310         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5311                               msecs_to_jiffies(1000));
5312 }
5313
5314
5315 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5316                 pci_channel_state_t state)
5317 {
5318         struct beiscsi_hba *phba = NULL;
5319
5320         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5321         phba->state |= BE_ADAPTER_PCI_ERR;
5322
5323         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5324                     "BM_%d : EEH error detected\n");
5325
5326         beiscsi_quiesce(phba, BEISCSI_EEH_UNLOAD);
5327
5328         if (state == pci_channel_io_perm_failure) {
5329                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5330                             "BM_%d : EEH : State PERM Failure");
5331                 return PCI_ERS_RESULT_DISCONNECT;
5332         }
5333
5334         pci_disable_device(pdev);
5335
5336         /* The error could cause the FW to trigger a flash debug dump.
5337          * Resetting the card while flash dump is in progress
5338          * can cause it not to recover; wait for it to finish.
5339          * Wait only for first function as it is needed only once per
5340          * adapter.
5341          **/
5342         if (pdev->devfn == 0)
5343                 ssleep(30);
5344
5345         return PCI_ERS_RESULT_NEED_RESET;
5346 }
5347
5348 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5349 {
5350         struct beiscsi_hba *phba = NULL;
5351         int status = 0;
5352
5353         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5354
5355         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5356                     "BM_%d : EEH Reset\n");
5357
5358         status = pci_enable_device(pdev);
5359         if (status)
5360                 return PCI_ERS_RESULT_DISCONNECT;
5361
5362         pci_set_master(pdev);
5363         pci_set_power_state(pdev, PCI_D0);
5364         pci_restore_state(pdev);
5365
5366         /* Wait for the CHIP Reset to complete */
5367         status = be_chk_reset_complete(phba);
5368         if (!status) {
5369                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5370                             "BM_%d : EEH Reset Completed\n");
5371         } else {
5372                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5373                             "BM_%d : EEH Reset Completion Failure\n");
5374                 return PCI_ERS_RESULT_DISCONNECT;
5375         }
5376
5377         pci_cleanup_aer_uncorrect_error_status(pdev);
5378         return PCI_ERS_RESULT_RECOVERED;
5379 }
5380
5381 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5382 {
5383         int ret = 0, i;
5384         struct be_eq_obj *pbe_eq;
5385         struct beiscsi_hba *phba = NULL;
5386         struct hwi_controller *phwi_ctrlr;
5387         struct hwi_context_memory *phwi_context;
5388
5389         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5390         pci_save_state(pdev);
5391
5392         if (enable_msix)
5393                 find_num_cpus(phba);
5394         else
5395                 phba->num_cpus = 1;
5396
5397         if (enable_msix) {
5398                 beiscsi_msix_enable(phba);
5399                 if (!phba->msix_enabled)
5400                         phba->num_cpus = 1;
5401         }
5402
5403         ret = beiscsi_cmd_reset_function(phba);
5404         if (ret) {
5405                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5406                             "BM_%d : Reset Failed\n");
5407                 goto ret_err;
5408         }
5409
5410         ret = be_chk_reset_complete(phba);
5411         if (ret) {
5412                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5413                             "BM_%d : Failed to get out of reset.\n");
5414                 goto ret_err;
5415         }
5416
5417         beiscsi_get_params(phba);
5418         phba->shost->max_id = phba->params.cxns_per_ctrl;
5419         phba->shost->can_queue = phba->params.ios_per_ctrl;
5420         ret = hwi_init_controller(phba);
5421
5422         for (i = 0; i < MAX_MCC_CMD; i++) {
5423                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5424                 phba->ctrl.mcc_tag[i] = i + 1;
5425                 phba->ctrl.mcc_numtag[i + 1] = 0;
5426                 phba->ctrl.mcc_tag_available++;
5427         }
5428
5429         phwi_ctrlr = phba->phwi_ctrlr;
5430         phwi_context = phwi_ctrlr->phwi_ctxt;
5431
5432         if (blk_iopoll_enabled) {
5433                 for (i = 0; i < phba->num_cpus; i++) {
5434                         pbe_eq = &phwi_context->be_eq[i];
5435                         blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5436                                         be_iopoll);
5437                         blk_iopoll_enable(&pbe_eq->iopoll);
5438                 }
5439
5440                 i = (phba->msix_enabled) ? i : 0;
5441                 /* Work item for MCC handling */
5442                 pbe_eq = &phwi_context->be_eq[i];
5443                 INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5444         } else {
5445                 if (phba->msix_enabled) {
5446                         for (i = 0; i <= phba->num_cpus; i++) {
5447                                 pbe_eq = &phwi_context->be_eq[i];
5448                                 INIT_WORK(&pbe_eq->work_cqs,
5449                                           beiscsi_process_all_cqs);
5450                         }
5451                 } else {
5452                         pbe_eq = &phwi_context->be_eq[0];
5453                         INIT_WORK(&pbe_eq->work_cqs,
5454                                   beiscsi_process_all_cqs);
5455                 }
5456         }
5457
5458         ret = beiscsi_init_irqs(phba);
5459         if (ret < 0) {
5460                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5461                             "BM_%d : beiscsi_eeh_resume - "
5462                             "Failed to beiscsi_init_irqs\n");
5463                 goto ret_err;
5464         }
5465
5466         hwi_enable_intr(phba);
5467         phba->state &= ~BE_ADAPTER_PCI_ERR;
5468
5469         return;
5470 ret_err:
5471         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5472                     "BM_%d : AER EEH Resume Failed\n");
5473 }
5474
5475 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5476                              const struct pci_device_id *id)
5477 {
5478         struct beiscsi_hba *phba = NULL;
5479         struct hwi_controller *phwi_ctrlr;
5480         struct hwi_context_memory *phwi_context;
5481         struct be_eq_obj *pbe_eq;
5482         int ret = 0, i;
5483
5484         ret = beiscsi_enable_pci(pcidev);
5485         if (ret < 0) {
5486                 dev_err(&pcidev->dev,
5487                         "beiscsi_dev_probe - Failed to enable pci device\n");
5488                 return ret;
5489         }
5490
5491         phba = beiscsi_hba_alloc(pcidev);
5492         if (!phba) {
5493                 dev_err(&pcidev->dev,
5494                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5495                 goto disable_pci;
5496         }
5497
5498         /* Enable EEH reporting */
5499         ret = pci_enable_pcie_error_reporting(pcidev);
5500         if (ret)
5501                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5502                             "BM_%d : PCIe Error Reporting "
5503                             "Enabling Failed\n");
5504
5505         pci_save_state(pcidev);
5506
5507         /* Initialize Driver configuration Paramters */
5508         beiscsi_hba_attrs_init(phba);
5509
5510         phba->fw_timeout = false;
5511         phba->mac_addr_set = false;
5512
5513
5514         switch (pcidev->device) {
5515         case BE_DEVICE_ID1:
5516         case OC_DEVICE_ID1:
5517         case OC_DEVICE_ID2:
5518                 phba->generation = BE_GEN2;
5519                 phba->iotask_fn = beiscsi_iotask;
5520                 break;
5521         case BE_DEVICE_ID2:
5522         case OC_DEVICE_ID3:
5523                 phba->generation = BE_GEN3;
5524                 phba->iotask_fn = beiscsi_iotask;
5525                 break;
5526         case OC_SKH_ID1:
5527                 phba->generation = BE_GEN4;
5528                 phba->iotask_fn = beiscsi_iotask_v2;
5529                 break;
5530         default:
5531                 phba->generation = 0;
5532         }
5533
5534         ret = be_ctrl_init(phba, pcidev);
5535         if (ret) {
5536                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5537                             "BM_%d : beiscsi_dev_probe-"
5538                             "Failed in be_ctrl_init\n");
5539                 goto hba_free;
5540         }
5541
5542         ret = beiscsi_cmd_reset_function(phba);
5543         if (ret) {
5544                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5545                             "BM_%d : Reset Failed\n");
5546                 goto hba_free;
5547         }
5548         ret = be_chk_reset_complete(phba);
5549         if (ret) {
5550                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5551                             "BM_%d : Failed to get out of reset.\n");
5552                 goto hba_free;
5553         }
5554
5555         spin_lock_init(&phba->io_sgl_lock);
5556         spin_lock_init(&phba->mgmt_sgl_lock);
5557         spin_lock_init(&phba->isr_lock);
5558         spin_lock_init(&phba->async_pdu_lock);
5559         ret = mgmt_get_fw_config(&phba->ctrl, phba);
5560         if (ret != 0) {
5561                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5562                             "BM_%d : Error getting fw config\n");
5563                 goto free_port;
5564         }
5565
5566         if (enable_msix)
5567                 find_num_cpus(phba);
5568         else
5569                 phba->num_cpus = 1;
5570
5571         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5572                     "BM_%d : num_cpus = %d\n",
5573                     phba->num_cpus);
5574
5575         if (enable_msix) {
5576                 beiscsi_msix_enable(phba);
5577                 if (!phba->msix_enabled)
5578                         phba->num_cpus = 1;
5579         }
5580
5581         phba->shost->max_id = phba->params.cxns_per_ctrl;
5582         beiscsi_get_params(phba);
5583         phba->shost->can_queue = phba->params.ios_per_ctrl;
5584         ret = beiscsi_init_port(phba);
5585         if (ret < 0) {
5586                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5587                             "BM_%d : beiscsi_dev_probe-"
5588                             "Failed in beiscsi_init_port\n");
5589                 goto free_port;
5590         }
5591
5592         for (i = 0; i < MAX_MCC_CMD; i++) {
5593                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5594                 phba->ctrl.mcc_tag[i] = i + 1;
5595                 phba->ctrl.mcc_numtag[i + 1] = 0;
5596                 phba->ctrl.mcc_tag_available++;
5597         }
5598
5599         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5600
5601         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
5602                  phba->shost->host_no);
5603         phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, phba->wq_name);
5604         if (!phba->wq) {
5605                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5606                             "BM_%d : beiscsi_dev_probe-"
5607                             "Failed to allocate work queue\n");
5608                 goto free_twq;
5609         }
5610
5611         INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5612                           beiscsi_hw_health_check);
5613
5614         phwi_ctrlr = phba->phwi_ctrlr;
5615         phwi_context = phwi_ctrlr->phwi_ctxt;
5616
5617         if (blk_iopoll_enabled) {
5618                 for (i = 0; i < phba->num_cpus; i++) {
5619                         pbe_eq = &phwi_context->be_eq[i];
5620                         blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5621                                         be_iopoll);
5622                         blk_iopoll_enable(&pbe_eq->iopoll);
5623                 }
5624
5625                 i = (phba->msix_enabled) ? i : 0;
5626                 /* Work item for MCC handling */
5627                 pbe_eq = &phwi_context->be_eq[i];
5628                 INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5629         } else {
5630                 if (phba->msix_enabled) {
5631                         for (i = 0; i <= phba->num_cpus; i++) {
5632                                 pbe_eq = &phwi_context->be_eq[i];
5633                                 INIT_WORK(&pbe_eq->work_cqs,
5634                                           beiscsi_process_all_cqs);
5635                         }
5636                 } else {
5637                                 pbe_eq = &phwi_context->be_eq[0];
5638                                 INIT_WORK(&pbe_eq->work_cqs,
5639                                           beiscsi_process_all_cqs);
5640                         }
5641         }
5642
5643         ret = beiscsi_init_irqs(phba);
5644         if (ret < 0) {
5645                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5646                             "BM_%d : beiscsi_dev_probe-"
5647                             "Failed to beiscsi_init_irqs\n");
5648                 goto free_blkenbld;
5649         }
5650         hwi_enable_intr(phba);
5651
5652         if (beiscsi_setup_boot_info(phba))
5653                 /*
5654                  * log error but continue, because we may not be using
5655                  * iscsi boot.
5656                  */
5657                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5658                             "BM_%d : Could not set up "
5659                             "iSCSI boot info.\n");
5660
5661         beiscsi_create_def_ifaces(phba);
5662         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5663                               msecs_to_jiffies(1000));
5664
5665         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5666                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5667         return 0;
5668
5669 free_blkenbld:
5670         destroy_workqueue(phba->wq);
5671         if (blk_iopoll_enabled)
5672                 for (i = 0; i < phba->num_cpus; i++) {
5673                         pbe_eq = &phwi_context->be_eq[i];
5674                         blk_iopoll_disable(&pbe_eq->iopoll);
5675                 }
5676 free_twq:
5677         beiscsi_clean_port(phba);
5678         beiscsi_free_mem(phba);
5679 free_port:
5680         pci_free_consistent(phba->pcidev,
5681                             phba->ctrl.mbox_mem_alloced.size,
5682                             phba->ctrl.mbox_mem_alloced.va,
5683                            phba->ctrl.mbox_mem_alloced.dma);
5684         beiscsi_unmap_pci_function(phba);
5685 hba_free:
5686         if (phba->msix_enabled)
5687                 pci_disable_msix(phba->pcidev);
5688         iscsi_host_remove(phba->shost);
5689         pci_dev_put(phba->pcidev);
5690         iscsi_host_free(phba->shost);
5691 disable_pci:
5692         pci_disable_device(pcidev);
5693         return ret;
5694 }
5695
5696 static struct pci_error_handlers beiscsi_eeh_handlers = {
5697         .error_detected = beiscsi_eeh_err_detected,
5698         .slot_reset = beiscsi_eeh_reset,
5699         .resume = beiscsi_eeh_resume,
5700 };
5701
5702 struct iscsi_transport beiscsi_iscsi_transport = {
5703         .owner = THIS_MODULE,
5704         .name = DRV_NAME,
5705         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5706                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5707         .create_session = beiscsi_session_create,
5708         .destroy_session = beiscsi_session_destroy,
5709         .create_conn = beiscsi_conn_create,
5710         .bind_conn = beiscsi_conn_bind,
5711         .destroy_conn = iscsi_conn_teardown,
5712         .attr_is_visible = be2iscsi_attr_is_visible,
5713         .set_iface_param = be2iscsi_iface_set_param,
5714         .get_iface_param = be2iscsi_iface_get_param,
5715         .set_param = beiscsi_set_param,
5716         .get_conn_param = iscsi_conn_get_param,
5717         .get_session_param = iscsi_session_get_param,
5718         .get_host_param = beiscsi_get_host_param,
5719         .start_conn = beiscsi_conn_start,
5720         .stop_conn = iscsi_conn_stop,
5721         .send_pdu = iscsi_conn_send_pdu,
5722         .xmit_task = beiscsi_task_xmit,
5723         .cleanup_task = beiscsi_cleanup_task,
5724         .alloc_pdu = beiscsi_alloc_pdu,
5725         .parse_pdu_itt = beiscsi_parse_pdu,
5726         .get_stats = beiscsi_conn_get_stats,
5727         .get_ep_param = beiscsi_ep_get_param,
5728         .ep_connect = beiscsi_ep_connect,
5729         .ep_poll = beiscsi_ep_poll,
5730         .ep_disconnect = beiscsi_ep_disconnect,
5731         .session_recovery_timedout = iscsi_session_recovery_timedout,
5732         .bsg_request = beiscsi_bsg_request,
5733 };
5734
5735 static struct pci_driver beiscsi_pci_driver = {
5736         .name = DRV_NAME,
5737         .probe = beiscsi_dev_probe,
5738         .remove = beiscsi_remove,
5739         .shutdown = beiscsi_shutdown,
5740         .id_table = beiscsi_pci_id_table,
5741         .err_handler = &beiscsi_eeh_handlers
5742 };
5743
5744
5745 static int __init beiscsi_module_init(void)
5746 {
5747         int ret;
5748
5749         beiscsi_scsi_transport =
5750                         iscsi_register_transport(&beiscsi_iscsi_transport);
5751         if (!beiscsi_scsi_transport) {
5752                 printk(KERN_ERR
5753                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5754                 return -ENOMEM;
5755         }
5756         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5757                &beiscsi_iscsi_transport);
5758
5759         ret = pci_register_driver(&beiscsi_pci_driver);
5760         if (ret) {
5761                 printk(KERN_ERR
5762                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5763                 goto unregister_iscsi_transport;
5764         }
5765         return 0;
5766
5767 unregister_iscsi_transport:
5768         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5769         return ret;
5770 }
5771
5772 static void __exit beiscsi_module_exit(void)
5773 {
5774         pci_unregister_driver(&beiscsi_pci_driver);
5775         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5776 }
5777
5778 module_init(beiscsi_module_init);
5779 module_exit(beiscsi_module_exit);