drivers/scsi/mpt3sas/mpt3sas_base.c

   1 /*
   2  * This is the Fusion MPT base driver providing common API layer interface
   3  * for access to MPT (Message Passing Technology) firmware.
   4  *
   5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
   6  * Copyright (C) 2012-2014  LSI Corporation
   7  * Copyright (C) 2013-2014 Avago Technologies
   8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * NO WARRANTY
  21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  25  * solely responsible for determining the appropriateness of using and
  26  * distributing the Program and assumes all risks associated with its
  27  * exercise of rights under this Agreement, including but not limited to
  28  * the risks and costs of program errors, damage to or loss of data,
  29  * programs or equipment, and unavailability or interruption of operations.
  30
  31  * DISCLAIMER OF LIABILITY
  32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39
  40  * You should have received a copy of the GNU General Public License
  41  * along with this program; if not, write to the Free Software
  42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
  43  * USA.
  44  */
  45
  46 #include <linux/kernel.h>
  47 #include <linux/module.h>
  48 #include <linux/errno.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/types.h>
  52 #include <linux/pci.h>
  53 #include <linux/kdev_t.h>
  54 #include <linux/blkdev.h>
  55 #include <linux/delay.h>
  56 #include <linux/interrupt.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/io.h>
  59 #include <linux/time.h>
  60 #include <linux/ktime.h>
  61 #include <linux/kthread.h>
  62 #include <linux/aer.h>
  63
  64
  65 #include "mpt3sas_base.h"
  66
  67 static MPT_CALLBACK     mpt_callbacks[MPT_MAX_CALLBACKS];
  68
  69
  70 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  71
  72  /* maximum controller queue depth */
  73 #define MAX_HBA_QUEUE_DEPTH     30000
  74 #define MAX_CHAIN_DEPTH         100000
  75 static int max_queue_depth = -1;
  76 module_param(max_queue_depth, int, 0);
  77 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  78
  79 static int max_sgl_entries = -1;
  80 module_param(max_sgl_entries, int, 0);
  81 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  82
  83 static int msix_disable = -1;
  84 module_param(msix_disable, int, 0);
  85 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  86
  87 static int smp_affinity_enable = 1;
  88 module_param(smp_affinity_enable, int, S_IRUGO);
  89 MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
  90
  91 static int max_msix_vectors = -1;
  92 module_param(max_msix_vectors, int, 0);
  93 MODULE_PARM_DESC(max_msix_vectors,
  94         " max msix vectors");
  95
  96 static int mpt3sas_fwfault_debug;
  97 MODULE_PARM_DESC(mpt3sas_fwfault_debug,
  98         " enable detection of firmware fault and halt firmware - (default=0)");
  99
 100 static int
 101 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
 102
 103 /**
 104  * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
 105  *
 106  */
 107 static int
 108 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
 109 {
 110         int ret = param_set_int(val, kp);
 111         struct MPT3SAS_ADAPTER *ioc;
 112
 113         if (ret)
 114                 return ret;
 115
 116         /* global ioc spinlock to protect controller list on list operations */
 117         pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug);
 118         spin_lock(&gioc_lock);
 119         list_for_each_entry(ioc, &mpt3sas_ioc_list, list)
 120                 ioc->fwfault_debug = mpt3sas_fwfault_debug;
 121         spin_unlock(&gioc_lock);
 122         return 0;
 123 }
 124 module_param_call(mpt3sas_fwfault_debug, _scsih_set_fwfault_debug,
 125         param_get_int, &mpt3sas_fwfault_debug, 0644);
 126
 127 /**
 128  *  mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
 129  * @arg: input argument, used to derive ioc
 130  *
 131  * Return 0 if controller is removed from pci subsystem.
 132  * Return -1 for other case.
 133  */
 134 static int mpt3sas_remove_dead_ioc_func(void *arg)
 135 {
 136         struct MPT3SAS_ADAPTER *ioc = (struct MPT3SAS_ADAPTER *)arg;
 137         struct pci_dev *pdev;
 138
 139         if ((ioc == NULL))
 140                 return -1;
 141
 142         pdev = ioc->pdev;
 143         if ((pdev == NULL))
 144                 return -1;
 145         pci_stop_and_remove_bus_device_locked(pdev);
 146         return 0;
 147 }
 148
 149 /**
 150  * _base_fault_reset_work - workq handling ioc fault conditions
 151  * @work: input argument, used to derive ioc
 152  * Context: sleep.
 153  *
 154  * Return nothing.
 155  */
 156 static void
 157 _base_fault_reset_work(struct work_struct *work)
 158 {
 159         struct MPT3SAS_ADAPTER *ioc =
 160             container_of(work, struct MPT3SAS_ADAPTER, fault_reset_work.work);
 161         unsigned long    flags;
 162         u32 doorbell;
 163         int rc;
 164         struct task_struct *p;
 165
 166
 167         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 168         if (ioc->shost_recovery || ioc->pci_error_recovery)
 169                 goto rearm_timer;
 170         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 171
 172         doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 173         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
 174                 pr_err(MPT3SAS_FMT "SAS host is non-operational !!!!\n",
 175                     ioc->name);
 176
 177                 /* It may be possible that EEH recovery can resolve some of
 178                  * pci bus failure issues rather removing the dead ioc function
 179                  * by considering controller is in a non-operational state. So
 180                  * here priority is given to the EEH recovery. If it doesn't
 181                  * not resolve this issue, mpt3sas driver will consider this
 182                  * controller to non-operational state and remove the dead ioc
 183                  * function.
 184                  */
 185                 if (ioc->non_operational_loop++ < 5) {
 186                         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
 187                                                          flags);
 188                         goto rearm_timer;
 189                 }
 190
 191                 /*
 192                  * Call _scsih_flush_pending_cmds callback so that we flush all
 193                  * pending commands back to OS. This call is required to aovid
 194                  * deadlock at block layer. Dead IOC will fail to do diag reset,
 195                  * and this call is safe since dead ioc will never return any
 196                  * command back from HW.
 197                  */
 198                 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
 199                 /*
 200                  * Set remove_host flag early since kernel thread will
 201                  * take some time to execute.
 202                  */
 203                 ioc->remove_host = 1;
 204                 /*Remove the Dead Host */
 205                 p = kthread_run(mpt3sas_remove_dead_ioc_func, ioc,
 206                     "%s_dead_ioc_%d", ioc->driver_name, ioc->id);
 207                 if (IS_ERR(p))
 208                         pr_err(MPT3SAS_FMT
 209                         "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
 210                         ioc->name, __func__);
 211                 else
 212                         pr_err(MPT3SAS_FMT
 213                         "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
 214                         ioc->name, __func__);
 215                 return; /* don't rearm timer */
 216         }
 217
 218         ioc->non_operational_loop = 0;
 219
 220         if ((doorbell & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) {
 221                 rc = mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
 222                     FORCE_BIG_HAMMER);
 223                 pr_warn(MPT3SAS_FMT "%s: hard reset: %s\n", ioc->name,
 224                     __func__, (rc == 0) ? "success" : "failed");
 225                 doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 226                 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 227                         mpt3sas_base_fault_info(ioc, doorbell &
 228                             MPI2_DOORBELL_DATA_MASK);
 229                 if (rc && (doorbell & MPI2_IOC_STATE_MASK) !=
 230                     MPI2_IOC_STATE_OPERATIONAL)
 231                         return; /* don't rearm timer */
 232         }
 233
 234         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 235  rearm_timer:
 236         if (ioc->fault_reset_work_q)
 237                 queue_delayed_work(ioc->fault_reset_work_q,
 238                     &ioc->fault_reset_work,
 239                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 240         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 241 }
 242
 243 /**
 244  * mpt3sas_base_start_watchdog - start the fault_reset_work_q
 245  * @ioc: per adapter object
 246  * Context: sleep.
 247  *
 248  * Return nothing.
 249  */
 250 void
 251 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc)
 252 {
 253         unsigned long    flags;
 254
 255         if (ioc->fault_reset_work_q)
 256                 return;
 257
 258         /* initialize fault polling */
 259
 260         INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
 261         snprintf(ioc->fault_reset_work_q_name,
 262             sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status",
 263             ioc->driver_name, ioc->id);
 264         ioc->fault_reset_work_q =
 265                 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
 266         if (!ioc->fault_reset_work_q) {
 267                 pr_err(MPT3SAS_FMT "%s: failed (line=%d)\n",
 268                     ioc->name, __func__, __LINE__);
 269                         return;
 270         }
 271         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 272         if (ioc->fault_reset_work_q)
 273                 queue_delayed_work(ioc->fault_reset_work_q,
 274                     &ioc->fault_reset_work,
 275                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 276         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 277 }
 278
 279 /**
 280  * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
 281  * @ioc: per adapter object
 282  * Context: sleep.
 283  *
 284  * Return nothing.
 285  */
 286 void
 287 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc)
 288 {
 289         unsigned long flags;
 290         struct workqueue_struct *wq;
 291
 292         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 293         wq = ioc->fault_reset_work_q;
 294         ioc->fault_reset_work_q = NULL;
 295         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 296         if (wq) {
 297                 if (!cancel_delayed_work_sync(&ioc->fault_reset_work))
 298                         flush_workqueue(wq);
 299                 destroy_workqueue(wq);
 300         }
 301 }
 302
 303 /**
 304  * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
 305  * @ioc: per adapter object
 306  * @fault_code: fault code
 307  *
 308  * Return nothing.
 309  */
 310 void
 311 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code)
 312 {
 313         pr_err(MPT3SAS_FMT "fault_state(0x%04x)!\n",
 314             ioc->name, fault_code);
 315 }
 316
 317 /**
 318  * mpt3sas_halt_firmware - halt's mpt controller firmware
 319  * @ioc: per adapter object
 320  *
 321  * For debugging timeout related issues.  Writing 0xCOFFEE00
 322  * to the doorbell register will halt controller firmware. With
 323  * the purpose to stop both driver and firmware, the enduser can
 324  * obtain a ring buffer from controller UART.
 325  */
 326 void
 327 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc)
 328 {
 329         u32 doorbell;
 330
 331         if (!ioc->fwfault_debug)
 332                 return;
 333
 334         dump_stack();
 335
 336         doorbell = readl(&ioc->chip->Doorbell);
 337         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 338                 mpt3sas_base_fault_info(ioc , doorbell);
 339         else {
 340                 writel(0xC0FFEE00, &ioc->chip->Doorbell);
 341                 pr_err(MPT3SAS_FMT "Firmware is halted due to command timeout\n",
 342                         ioc->name);
 343         }
 344
 345         if (ioc->fwfault_debug == 2)
 346                 for (;;)
 347                         ;
 348         else
 349                 panic("panic in %s\n", __func__);
 350 }
 351
 352 /**
 353  * _base_sas_ioc_info - verbose translation of the ioc status
 354  * @ioc: per adapter object
 355  * @mpi_reply: reply mf payload returned from firmware
 356  * @request_hdr: request mf
 357  *
 358  * Return nothing.
 359  */
 360 static void
 361 _base_sas_ioc_info(struct MPT3SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
 362         MPI2RequestHeader_t *request_hdr)
 363 {
 364         u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
 365             MPI2_IOCSTATUS_MASK;
 366         char *desc = NULL;
 367         u16 frame_sz;
 368         char *func_str = NULL;
 369
 370         /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
 371         if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
 372             request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
 373             request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
 374                 return;
 375
 376         if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
 377                 return;
 378
 379         switch (ioc_status) {
 380
 381 /****************************************************************************
 382 *  Common IOCStatus values for all replies
 383 ****************************************************************************/
 384
 385         case MPI2_IOCSTATUS_INVALID_FUNCTION:
 386                 desc = "invalid function";
 387                 break;
 388         case MPI2_IOCSTATUS_BUSY:
 389                 desc = "busy";
 390                 break;
 391         case MPI2_IOCSTATUS_INVALID_SGL:
 392                 desc = "invalid sgl";
 393                 break;
 394         case MPI2_IOCSTATUS_INTERNAL_ERROR:
 395                 desc = "internal error";
 396                 break;
 397         case MPI2_IOCSTATUS_INVALID_VPID:
 398                 desc = "invalid vpid";
 399                 break;
 400         case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
 401                 desc = "insufficient resources";
 402                 break;
 403         case MPI2_IOCSTATUS_INSUFFICIENT_POWER:
 404                 desc = "insufficient power";
 405                 break;
 406         case MPI2_IOCSTATUS_INVALID_FIELD:
 407                 desc = "invalid field";
 408                 break;
 409         case MPI2_IOCSTATUS_INVALID_STATE:
 410                 desc = "invalid state";
 411                 break;
 412         case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
 413                 desc = "op state not supported";
 414                 break;
 415
 416 /****************************************************************************
 417 *  Config IOCStatus values
 418 ****************************************************************************/
 419
 420         case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
 421                 desc = "config invalid action";
 422                 break;
 423         case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
 424                 desc = "config invalid type";
 425                 break;
 426         case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
 427                 desc = "config invalid page";
 428                 break;
 429         case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
 430                 desc = "config invalid data";
 431                 break;
 432         case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
 433                 desc = "config no defaults";
 434                 break;
 435         case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
 436                 desc = "config cant commit";
 437                 break;
 438
 439 /****************************************************************************
 440 *  SCSI IO Reply
 441 ****************************************************************************/
 442
 443         case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
 444         case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
 445         case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
 446         case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
 447         case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
 448         case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
 449         case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
 450         case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
 451         case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
 452         case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
 453         case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
 454         case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
 455                 break;
 456
 457 /****************************************************************************
 458 *  For use by SCSI Initiator and SCSI Target end-to-end data protection
 459 ****************************************************************************/
 460
 461         case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
 462                 desc = "eedp guard error";
 463                 break;
 464         case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
 465                 desc = "eedp ref tag error";
 466                 break;
 467         case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
 468                 desc = "eedp app tag error";
 469                 break;
 470
 471 /****************************************************************************
 472 *  SCSI Target values
 473 ****************************************************************************/
 474
 475         case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
 476                 desc = "target invalid io index";
 477                 break;
 478         case MPI2_IOCSTATUS_TARGET_ABORTED:
 479                 desc = "target aborted";
 480                 break;
 481         case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
 482                 desc = "target no conn retryable";
 483                 break;
 484         case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
 485                 desc = "target no connection";
 486                 break;
 487         case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
 488                 desc = "target xfer count mismatch";
 489                 break;
 490         case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
 491                 desc = "target data offset error";
 492                 break;
 493         case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
 494                 desc = "target too much write data";
 495                 break;
 496         case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
 497                 desc = "target iu too short";
 498                 break;
 499         case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
 500                 desc = "target ack nak timeout";
 501                 break;
 502         case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
 503                 desc = "target nak received";
 504                 break;
 505
 506 /****************************************************************************
 507 *  Serial Attached SCSI values
 508 ****************************************************************************/
 509
 510         case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
 511                 desc = "smp request failed";
 512                 break;
 513         case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
 514                 desc = "smp data overrun";
 515                 break;
 516
 517 /****************************************************************************
 518 *  Diagnostic Buffer Post / Diagnostic Release values
 519 ****************************************************************************/
 520
 521         case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
 522                 desc = "diagnostic released";
 523                 break;
 524         default:
 525                 break;
 526         }
 527
 528         if (!desc)
 529                 return;
 530
 531         switch (request_hdr->Function) {
 532         case MPI2_FUNCTION_CONFIG:
 533                 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
 534                 func_str = "config_page";
 535                 break;
 536         case MPI2_FUNCTION_SCSI_TASK_MGMT:
 537                 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
 538                 func_str = "task_mgmt";
 539                 break;
 540         case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
 541                 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
 542                 func_str = "sas_iounit_ctl";
 543                 break;
 544         case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
 545                 frame_sz = sizeof(Mpi2SepRequest_t);
 546                 func_str = "enclosure";
 547                 break;
 548         case MPI2_FUNCTION_IOC_INIT:
 549                 frame_sz = sizeof(Mpi2IOCInitRequest_t);
 550                 func_str = "ioc_init";
 551                 break;
 552         case MPI2_FUNCTION_PORT_ENABLE:
 553                 frame_sz = sizeof(Mpi2PortEnableRequest_t);
 554                 func_str = "port_enable";
 555                 break;
 556         case MPI2_FUNCTION_SMP_PASSTHROUGH:
 557                 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
 558                 func_str = "smp_passthru";
 559                 break;
 560         default:
 561                 frame_sz = 32;
 562                 func_str = "unknown";
 563                 break;
 564         }
 565
 566         pr_warn(MPT3SAS_FMT "ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
 567                 ioc->name, desc, ioc_status, request_hdr, func_str);
 568
 569         _debug_dump_mf(request_hdr, frame_sz/4);
 570 }
 571
 572 /**
 573  * _base_display_event_data - verbose translation of firmware asyn events
 574  * @ioc: per adapter object
 575  * @mpi_reply: reply mf payload returned from firmware
 576  *
 577  * Return nothing.
 578  */
 579 static void
 580 _base_display_event_data(struct MPT3SAS_ADAPTER *ioc,
 581         Mpi2EventNotificationReply_t *mpi_reply)
 582 {
 583         char *desc = NULL;
 584         u16 event;
 585
 586         if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
 587                 return;
 588
 589         event = le16_to_cpu(mpi_reply->Event);
 590
 591         switch (event) {
 592         case MPI2_EVENT_LOG_DATA:
 593                 desc = "Log Data";
 594                 break;
 595         case MPI2_EVENT_STATE_CHANGE:
 596                 desc = "Status Change";
 597                 break;
 598         case MPI2_EVENT_HARD_RESET_RECEIVED:
 599                 desc = "Hard Reset Received";
 600                 break;
 601         case MPI2_EVENT_EVENT_CHANGE:
 602                 desc = "Event Change";
 603                 break;
 604         case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
 605                 desc = "Device Status Change";
 606                 break;
 607         case MPI2_EVENT_IR_OPERATION_STATUS:
 608                 if (!ioc->hide_ir_msg)
 609                         desc = "IR Operation Status";
 610                 break;
 611         case MPI2_EVENT_SAS_DISCOVERY:
 612         {
 613                 Mpi2EventDataSasDiscovery_t *event_data =
 614                     (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
 615                 pr_info(MPT3SAS_FMT "Discovery: (%s)", ioc->name,
 616                     (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
 617                     "start" : "stop");
 618                 if (event_data->DiscoveryStatus)
 619                         pr_info("discovery_status(0x%08x)",
 620                             le32_to_cpu(event_data->DiscoveryStatus));
 621                         pr_info("\n");
 622                 return;
 623         }
 624         case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
 625                 desc = "SAS Broadcast Primitive";
 626                 break;
 627         case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
 628                 desc = "SAS Init Device Status Change";
 629                 break;
 630         case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
 631                 desc = "SAS Init Table Overflow";
 632                 break;
 633         case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
 634                 desc = "SAS Topology Change List";
 635                 break;
 636         case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
 637                 desc = "SAS Enclosure Device Status Change";
 638                 break;
 639         case MPI2_EVENT_IR_VOLUME:
 640                 if (!ioc->hide_ir_msg)
 641                         desc = "IR Volume";
 642                 break;
 643         case MPI2_EVENT_IR_PHYSICAL_DISK:
 644                 if (!ioc->hide_ir_msg)
 645                         desc = "IR Physical Disk";
 646                 break;
 647         case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
 648                 if (!ioc->hide_ir_msg)
 649                         desc = "IR Configuration Change List";
 650                 break;
 651         case MPI2_EVENT_LOG_ENTRY_ADDED:
 652                 if (!ioc->hide_ir_msg)
 653                         desc = "Log Entry Added";
 654                 break;
 655         case MPI2_EVENT_TEMP_THRESHOLD:
 656                 desc = "Temperature Threshold";
 657                 break;
 658         case MPI2_EVENT_ACTIVE_CABLE_EXCEPTION:
 659                 desc = "Active cable exception";
 660                 break;
 661         }
 662
 663         if (!desc)
 664                 return;
 665
 666         pr_info(MPT3SAS_FMT "%s\n", ioc->name, desc);
 667 }
 668
 669 /**
 670  * _base_sas_log_info - verbose translation of firmware log info
 671  * @ioc: per adapter object
 672  * @log_info: log info
 673  *
 674  * Return nothing.
 675  */
 676 static void
 677 _base_sas_log_info(struct MPT3SAS_ADAPTER *ioc , u32 log_info)
 678 {
 679         union loginfo_type {
 680                 u32     loginfo;
 681                 struct {
 682                         u32     subcode:16;
 683                         u32     code:8;
 684                         u32     originator:4;
 685                         u32     bus_type:4;
 686                 } dw;
 687         };
 688         union loginfo_type sas_loginfo;
 689         char *originator_str = NULL;
 690
 691         sas_loginfo.loginfo = log_info;
 692         if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
 693                 return;
 694
 695         /* each nexus loss loginfo */
 696         if (log_info == 0x31170000)
 697                 return;
 698
 699         /* eat the loginfos associated with task aborts */
 700         if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
 701             0x31140000 || log_info == 0x31130000))
 702                 return;
 703
 704         switch (sas_loginfo.dw.originator) {
 705         case 0:
 706                 originator_str = "IOP";
 707                 break;
 708         case 1:
 709                 originator_str = "PL";
 710                 break;
 711         case 2:
 712                 if (!ioc->hide_ir_msg)
 713                         originator_str = "IR";
 714                 else
 715                         originator_str = "WarpDrive";
 716                 break;
 717         }
 718
 719         pr_warn(MPT3SAS_FMT
 720                 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
 721                 ioc->name, log_info,
 722              originator_str, sas_loginfo.dw.code,
 723              sas_loginfo.dw.subcode);
 724 }
 725
 726 /**
 727  * _base_display_reply_info -
 728  * @ioc: per adapter object
 729  * @smid: system request message index
 730  * @msix_index: MSIX table index supplied by the OS
 731  * @reply: reply message frame(lower 32bit addr)
 732  *
 733  * Return nothing.
 734  */
 735 static void
 736 _base_display_reply_info(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 737         u32 reply)
 738 {
 739         MPI2DefaultReply_t *mpi_reply;
 740         u16 ioc_status;
 741         u32 loginfo = 0;
 742
 743         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 744         if (unlikely(!mpi_reply)) {
 745                 pr_err(MPT3SAS_FMT "mpi_reply not valid at %s:%d/%s()!\n",
 746                     ioc->name, __FILE__, __LINE__, __func__);
 747                 return;
 748         }
 749         ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
 750
 751         if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
 752             (ioc->logging_level & MPT_DEBUG_REPLY)) {
 753                 _base_sas_ioc_info(ioc , mpi_reply,
 754                    mpt3sas_base_get_msg_frame(ioc, smid));
 755         }
 756
 757         if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
 758                 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo);
 759                 _base_sas_log_info(ioc, loginfo);
 760         }
 761
 762         if (ioc_status || loginfo) {
 763                 ioc_status &= MPI2_IOCSTATUS_MASK;
 764                 mpt3sas_trigger_mpi(ioc, ioc_status, loginfo);
 765         }
 766 }
 767
 768 /**
 769  * mpt3sas_base_done - base internal command completion routine
 770  * @ioc: per adapter object
 771  * @smid: system request message index
 772  * @msix_index: MSIX table index supplied by the OS
 773  * @reply: reply message frame(lower 32bit addr)
 774  *
 775  * Return 1 meaning mf should be freed from _base_interrupt
 776  *        0 means the mf is freed from this function.
 777  */
 778 u8
 779 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 780         u32 reply)
 781 {
 782         MPI2DefaultReply_t *mpi_reply;
 783
 784         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 785         if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
 786                 return mpt3sas_check_for_pending_internal_cmds(ioc, smid);
 787
 788         if (ioc->base_cmds.status == MPT3_CMD_NOT_USED)
 789                 return 1;
 790
 791         ioc->base_cmds.status |= MPT3_CMD_COMPLETE;
 792         if (mpi_reply) {
 793                 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID;
 794                 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
 795         }
 796         ioc->base_cmds.status &= ~MPT3_CMD_PENDING;
 797
 798         complete(&ioc->base_cmds.done);
 799         return 1;
 800 }
 801
 802 /**
 803  * _base_async_event - main callback handler for firmware asyn events
 804  * @ioc: per adapter object
 805  * @msix_index: MSIX table index supplied by the OS
 806  * @reply: reply message frame(lower 32bit addr)
 807  *
 808  * Return 1 meaning mf should be freed from _base_interrupt
 809  *        0 means the mf is freed from this function.
 810  */
 811 static u8
 812 _base_async_event(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
 813 {
 814         Mpi2EventNotificationReply_t *mpi_reply;
 815         Mpi2EventAckRequest_t *ack_request;
 816         u16 smid;
 817         struct _event_ack_list *delayed_event_ack;
 818
 819         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 820         if (!mpi_reply)
 821                 return 1;
 822         if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
 823                 return 1;
 824
 825         _base_display_event_data(ioc, mpi_reply);
 826
 827         if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
 828                 goto out;
 829         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
 830         if (!smid) {
 831                 delayed_event_ack = kzalloc(sizeof(*delayed_event_ack),
 832                                         GFP_ATOMIC);
 833                 if (!delayed_event_ack)
 834                         goto out;
 835                 INIT_LIST_HEAD(&delayed_event_ack->list);
 836                 delayed_event_ack->Event = mpi_reply->Event;
 837                 delayed_event_ack->EventContext = mpi_reply->EventContext;
 838                 list_add_tail(&delayed_event_ack->list,
 839                                 &ioc->delayed_event_ack_list);
 840                 dewtprintk(ioc, pr_info(MPT3SAS_FMT
 841                                 "DELAYED: EVENT ACK: event (0x%04x)\n",
 842                                 ioc->name, le16_to_cpu(mpi_reply->Event)));
 843                 goto out;
 844         }
 845
 846         ack_request = mpt3sas_base_get_msg_frame(ioc, smid);
 847         memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
 848         ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
 849         ack_request->Event = mpi_reply->Event;
 850         ack_request->EventContext = mpi_reply->EventContext;
 851         ack_request->VF_ID = 0;  /* TODO */
 852         ack_request->VP_ID = 0;
 853         mpt3sas_base_put_smid_default(ioc, smid);
 854
 855  out:
 856
 857         /* scsih callback handler */
 858         mpt3sas_scsih_event_callback(ioc, msix_index, reply);
 859
 860         /* ctl callback handler */
 861         mpt3sas_ctl_event_callback(ioc, msix_index, reply);
 862
 863         return 1;
 864 }
 865
 866 /**
 867  * _base_get_cb_idx - obtain the callback index
 868  * @ioc: per adapter object
 869  * @smid: system request message index
 870  *
 871  * Return callback index.
 872  */
 873 static u8
 874 _base_get_cb_idx(struct MPT3SAS_ADAPTER *ioc, u16 smid)
 875 {
 876         int i;
 877         u8 cb_idx;
 878
 879         if (smid < ioc->hi_priority_smid) {
 880                 i = smid - 1;
 881                 cb_idx = ioc->scsi_lookup[i].cb_idx;
 882         } else if (smid < ioc->internal_smid) {
 883                 i = smid - ioc->hi_priority_smid;
 884                 cb_idx = ioc->hpr_lookup[i].cb_idx;
 885         } else if (smid <= ioc->hba_queue_depth) {
 886                 i = smid - ioc->internal_smid;
 887                 cb_idx = ioc->internal_lookup[i].cb_idx;
 888         } else
 889                 cb_idx = 0xFF;
 890         return cb_idx;
 891 }
 892
 893 /**
 894  * _base_mask_interrupts - disable interrupts
 895  * @ioc: per adapter object
 896  *
 897  * Disabling ResetIRQ, Reply and Doorbell Interrupts
 898  *
 899  * Return nothing.
 900  */
 901 static void
 902 _base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 903 {
 904         u32 him_register;
 905
 906         ioc->mask_interrupts = 1;
 907         him_register = readl(&ioc->chip->HostInterruptMask);
 908         him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
 909         writel(him_register, &ioc->chip->HostInterruptMask);
 910         readl(&ioc->chip->HostInterruptMask);
 911 }
 912
 913 /**
 914  * _base_unmask_interrupts - enable interrupts
 915  * @ioc: per adapter object
 916  *
 917  * Enabling only Reply Interrupts
 918  *
 919  * Return nothing.
 920  */
 921 static void
 922 _base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 923 {
 924         u32 him_register;
 925
 926         him_register = readl(&ioc->chip->HostInterruptMask);
 927         him_register &= ~MPI2_HIM_RIM;
 928         writel(him_register, &ioc->chip->HostInterruptMask);
 929         ioc->mask_interrupts = 0;
 930 }
 931
 932 union reply_descriptor {
 933         u64 word;
 934         struct {
 935                 u32 low;
 936                 u32 high;
 937         } u;
 938 };
 939
 940 /**
 941  * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
 942  * @irq: irq number (not used)
 943  * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
 944  * @r: pt_regs pointer (not used)
 945  *
 946  * Return IRQ_HANDLE if processed, else IRQ_NONE.
 947  */
 948 static irqreturn_t
 949 _base_interrupt(int irq, void *bus_id)
 950 {
 951         struct adapter_reply_queue *reply_q = bus_id;
 952         union reply_descriptor rd;
 953         u32 completed_cmds;
 954         u8 request_desript_type;
 955         u16 smid;
 956         u8 cb_idx;
 957         u32 reply;
 958         u8 msix_index = reply_q->msix_index;
 959         struct MPT3SAS_ADAPTER *ioc = reply_q->ioc;
 960         Mpi2ReplyDescriptorsUnion_t *rpf;
 961         u8 rc;
 962
 963         if (ioc->mask_interrupts)
 964                 return IRQ_NONE;
 965
 966         if (!atomic_add_unless(&reply_q->busy, 1, 1))
 967                 return IRQ_NONE;
 968
 969         rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
 970         request_desript_type = rpf->Default.ReplyFlags
 971              & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
 972         if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
 973                 atomic_dec(&reply_q->busy);
 974                 return IRQ_NONE;
 975         }
 976
 977         completed_cmds = 0;
 978         cb_idx = 0xFF;
 979         do {
 980                 rd.word = le64_to_cpu(rpf->Words);
 981                 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
 982                         goto out;
 983                 reply = 0;
 984                 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
 985                 if (request_desript_type ==
 986                     MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS ||
 987                     request_desript_type ==
 988                     MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS) {
 989                         cb_idx = _base_get_cb_idx(ioc, smid);
 990                         if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 991                             (likely(mpt_callbacks[cb_idx] != NULL))) {
 992                                 rc = mpt_callbacks[cb_idx](ioc, smid,
 993                                     msix_index, 0);
 994                                 if (rc)
 995                                         mpt3sas_base_free_smid(ioc, smid);
 996                         }
 997                 } else if (request_desript_type ==
 998                     MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
 999                         reply = le32_to_cpu(
1000                             rpf->AddressReply.ReplyFrameAddress);
1001                         if (reply > ioc->reply_dma_max_address ||
1002                             reply < ioc->reply_dma_min_address)
1003                                 reply = 0;
1004                         if (smid) {
1005                                 cb_idx = _base_get_cb_idx(ioc, smid);
1006                                 if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
1007                                     (likely(mpt_callbacks[cb_idx] != NULL))) {
1008                                         rc = mpt_callbacks[cb_idx](ioc, smid,
1009                                             msix_index, reply);
1010                                         if (reply)
1011                                                 _base_display_reply_info(ioc,
1012                                                     smid, msix_index, reply);
1013                                         if (rc)
1014                                                 mpt3sas_base_free_smid(ioc,
1015                                                     smid);
1016                                 }
1017                         } else {
1018                                 _base_async_event(ioc, msix_index, reply);
1019                         }
1020
1021                         /* reply free queue handling */
1022                         if (reply) {
1023                                 ioc->reply_free_host_index =
1024                                     (ioc->reply_free_host_index ==
1025                                     (ioc->reply_free_queue_depth - 1)) ?
1026                                     0 : ioc->reply_free_host_index + 1;
1027                                 ioc->reply_free[ioc->reply_free_host_index] =
1028                                     cpu_to_le32(reply);
1029                                 wmb();
1030                                 writel(ioc->reply_free_host_index,
1031                                     &ioc->chip->ReplyFreeHostIndex);
1032                         }
1033                 }
1034
1035                 rpf->Words = cpu_to_le64(ULLONG_MAX);
1036                 reply_q->reply_post_host_index =
1037                     (reply_q->reply_post_host_index ==
1038                     (ioc->reply_post_queue_depth - 1)) ? 0 :
1039                     reply_q->reply_post_host_index + 1;
1040                 request_desript_type =
1041                     reply_q->reply_post_free[reply_q->reply_post_host_index].
1042                     Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1043                 completed_cmds++;
1044                 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1045                         goto out;
1046                 if (!reply_q->reply_post_host_index)
1047                         rpf = reply_q->reply_post_free;
1048                 else
1049                         rpf++;
1050         } while (1);
1051
1052  out:
1053
1054         if (!completed_cmds) {
1055                 atomic_dec(&reply_q->busy);
1056                 return IRQ_NONE;
1057         }
1058
1059         wmb();
1060         if (ioc->is_warpdrive) {
1061                 writel(reply_q->reply_post_host_index,
1062                 ioc->reply_post_host_index[msix_index]);
1063                 atomic_dec(&reply_q->busy);
1064                 return IRQ_HANDLED;
1065         }
1066
1067         /* Update Reply Post Host Index.
1068          * For those HBA's which support combined reply queue feature
1069          * 1. Get the correct Supplemental Reply Post Host Index Register.
1070          *    i.e. (msix_index / 8)th entry from Supplemental Reply Post Host
1071          *    Index Register address bank i.e replyPostRegisterIndex[],
1072          * 2. Then update this register with new reply host index value
1073          *    in ReplyPostIndex field and the MSIxIndex field with
1074          *    msix_index value reduced to a value between 0 and 7,
1075          *    using a modulo 8 operation. Since each Supplemental Reply Post
1076          *    Host Index Register supports 8 MSI-X vectors.
1077          *
1078          * For other HBA's just update the Reply Post Host Index register with
1079          * new reply host index value in ReplyPostIndex Field and msix_index
1080          * value in MSIxIndex field.
1081          */
1082         if (ioc->msix96_vector)
1083                 writel(reply_q->reply_post_host_index | ((msix_index  & 7) <<
1084                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1085                         ioc->replyPostRegisterIndex[msix_index/8]);
1086         else
1087                 writel(reply_q->reply_post_host_index | (msix_index <<
1088                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1089                         &ioc->chip->ReplyPostHostIndex);
1090         atomic_dec(&reply_q->busy);
1091         return IRQ_HANDLED;
1092 }
1093
1094 /**
1095  * _base_is_controller_msix_enabled - is controller support muli-reply queues
1096  * @ioc: per adapter object
1097  *
1098  */
1099 static inline int
1100 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER *ioc)
1101 {
1102         return (ioc->facts.IOCCapabilities &
1103             MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1104 }
1105
1106 /**
1107  * mpt3sas_base_sync_reply_irqs - flush pending MSIX interrupts
1108  * @ioc: per adapter object
1109  * Context: non ISR conext
1110  *
1111  * Called when a Task Management request has completed.
1112  *
1113  * Return nothing.
1114  */
1115 void
1116 mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc)
1117 {
1118         struct adapter_reply_queue *reply_q;
1119
1120         /* If MSIX capability is turned off
1121          * then multi-queues are not enabled
1122          */
1123         if (!_base_is_controller_msix_enabled(ioc))
1124                 return;
1125
1126         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1127                 if (ioc->shost_recovery || ioc->remove_host ||
1128                                 ioc->pci_error_recovery)
1129                         return;
1130                 /* TMs are on msix_index == 0 */
1131                 if (reply_q->msix_index == 0)
1132                         continue;
1133                 synchronize_irq(reply_q->vector);
1134         }
1135 }
1136
1137 /**
1138  * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1139  * @cb_idx: callback index
1140  *
1141  * Return nothing.
1142  */
1143 void
1144 mpt3sas_base_release_callback_handler(u8 cb_idx)
1145 {
1146         mpt_callbacks[cb_idx] = NULL;
1147 }
1148
1149 /**
1150  * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1151  * @cb_func: callback function
1152  *
1153  * Returns cb_func.
1154  */
1155 u8
1156 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1157 {
1158         u8 cb_idx;
1159
1160         for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1161                 if (mpt_callbacks[cb_idx] == NULL)
1162                         break;
1163
1164         mpt_callbacks[cb_idx] = cb_func;
1165         return cb_idx;
1166 }
1167
1168 /**
1169  * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1170  *
1171  * Return nothing.
1172  */
1173 void
1174 mpt3sas_base_initialize_callback_handler(void)
1175 {
1176         u8 cb_idx;
1177
1178         for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1179                 mpt3sas_base_release_callback_handler(cb_idx);
1180 }
1181
1182
1183 /**
1184  * _base_build_zero_len_sge - build zero length sg entry
1185  * @ioc: per adapter object
1186  * @paddr: virtual address for SGE
1187  *
1188  * Create a zero length scatter gather entry to insure the IOCs hardware has
1189  * something to use if the target device goes brain dead and tries
1190  * to send data even when none is asked for.
1191  *
1192  * Return nothing.
1193  */
1194 static void
1195 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1196 {
1197         u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1198             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1199             MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1200             MPI2_SGE_FLAGS_SHIFT);
1201         ioc->base_add_sg_single(paddr, flags_length, -1);
1202 }
1203
1204 /**
1205  * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1206  * @paddr: virtual address for SGE
1207  * @flags_length: SGE flags and data transfer length
1208  * @dma_addr: Physical address
1209  *
1210  * Return nothing.
1211  */
1212 static void
1213 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1214 {
1215         Mpi2SGESimple32_t *sgel = paddr;
1216
1217         flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1218             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1219         sgel->FlagsLength = cpu_to_le32(flags_length);
1220         sgel->Address = cpu_to_le32(dma_addr);
1221 }
1222
1223
1224 /**
1225  * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1226  * @paddr: virtual address for SGE
1227  * @flags_length: SGE flags and data transfer length
1228  * @dma_addr: Physical address
1229  *
1230  * Return nothing.
1231  */
1232 static void
1233 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1234 {
1235         Mpi2SGESimple64_t *sgel = paddr;
1236
1237         flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1238             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1239         sgel->FlagsLength = cpu_to_le32(flags_length);
1240         sgel->Address = cpu_to_le64(dma_addr);
1241 }
1242
1243 /**
1244  * _base_get_chain_buffer_tracker - obtain chain tracker
1245  * @ioc: per adapter object
1246  * @smid: smid associated to an IO request
1247  *
1248  * Returns chain tracker(from ioc->free_chain_list)
1249  */
1250 static struct chain_tracker *
1251 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER *ioc, u16 smid)
1252 {
1253         struct chain_tracker *chain_req;
1254         unsigned long flags;
1255
1256         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1257         if (list_empty(&ioc->free_chain_list)) {
1258                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1259                 dfailprintk(ioc, pr_warn(MPT3SAS_FMT
1260                         "chain buffers not available\n", ioc->name));
1261                 return NULL;
1262         }
1263         chain_req = list_entry(ioc->free_chain_list.next,
1264             struct chain_tracker, tracker_list);
1265         list_del_init(&chain_req->tracker_list);
1266         list_add_tail(&chain_req->tracker_list,
1267             &ioc->scsi_lookup[smid - 1].chain_list);
1268         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1269         return chain_req;
1270 }
1271
1272
1273 /**
1274  * _base_build_sg - build generic sg
1275  * @ioc: per adapter object
1276  * @psge: virtual address for SGE
1277  * @data_out_dma: physical address for WRITES
1278  * @data_out_sz: data xfer size for WRITES
1279  * @data_in_dma: physical address for READS
1280  * @data_in_sz: data xfer size for READS
1281  *
1282  * Return nothing.
1283  */
1284 static void
1285 _base_build_sg(struct MPT3SAS_ADAPTER *ioc, void *psge,
1286         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1287         size_t data_in_sz)
1288 {
1289         u32 sgl_flags;
1290
1291         if (!data_out_sz && !data_in_sz) {
1292                 _base_build_zero_len_sge(ioc, psge);
1293                 return;
1294         }
1295
1296         if (data_out_sz && data_in_sz) {
1297                 /* WRITE sgel first */
1298                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1299                     MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
1300                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1301                 ioc->base_add_sg_single(psge, sgl_flags |
1302                     data_out_sz, data_out_dma);
1303
1304                 /* incr sgel */
1305                 psge += ioc->sge_size;
1306
1307                 /* READ sgel last */
1308                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1309                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1310                     MPI2_SGE_FLAGS_END_OF_LIST);
1311                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1312                 ioc->base_add_sg_single(psge, sgl_flags |
1313                     data_in_sz, data_in_dma);
1314         } else if (data_out_sz) /* WRITE */ {
1315                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1316                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1317                     MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC);
1318                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1319                 ioc->base_add_sg_single(psge, sgl_flags |
1320                     data_out_sz, data_out_dma);
1321         } else if (data_in_sz) /* READ */ {
1322                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1323                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1324                     MPI2_SGE_FLAGS_END_OF_LIST);
1325                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1326                 ioc->base_add_sg_single(psge, sgl_flags |
1327                     data_in_sz, data_in_dma);
1328         }
1329 }
1330
1331 /* IEEE format sgls */
1332
1333 /**
1334  * _base_add_sg_single_ieee - add sg element for IEEE format
1335  * @paddr: virtual address for SGE
1336  * @flags: SGE flags
1337  * @chain_offset: number of 128 byte elements from start of segment
1338  * @length: data transfer length
1339  * @dma_addr: Physical address
1340  *
1341  * Return nothing.
1342  */
1343 static void
1344 _base_add_sg_single_ieee(void *paddr, u8 flags, u8 chain_offset, u32 length,
1345         dma_addr_t dma_addr)
1346 {
1347         Mpi25IeeeSgeChain64_t *sgel = paddr;
1348
1349         sgel->Flags = flags;
1350         sgel->NextChainOffset = chain_offset;
1351         sgel->Length = cpu_to_le32(length);
1352         sgel->Address = cpu_to_le64(dma_addr);
1353 }
1354
1355 /**
1356  * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1357  * @ioc: per adapter object
1358  * @paddr: virtual address for SGE
1359  *
1360  * Create a zero length scatter gather entry to insure the IOCs hardware has
1361  * something to use if the target device goes brain dead and tries
1362  * to send data even when none is asked for.
1363  *
1364  * Return nothing.
1365  */
1366 static void
1367 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1368 {
1369         u8 sgl_flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1370                 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
1371                 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
1372
1373         _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1);
1374 }
1375
1376 /**
1377  * _base_build_sg_scmd - main sg creation routine
1378  * @ioc: per adapter object
1379  * @scmd: scsi command
1380  * @smid: system request message index
1381  * Context: none.
1382  *
1383  * The main routine that builds scatter gather table from a given
1384  * scsi request sent via the .queuecommand main handler.
1385  *
1386  * Returns 0 success, anything else error
1387  */
1388 static int
1389 _base_build_sg_scmd(struct MPT3SAS_ADAPTER *ioc,
1390                 struct scsi_cmnd *scmd, u16 smid)
1391 {
1392         Mpi2SCSIIORequest_t *mpi_request;
1393         dma_addr_t chain_dma;
1394         struct scatterlist *sg_scmd;
1395         void *sg_local, *chain;
1396         u32 chain_offset;
1397         u32 chain_length;
1398         u32 chain_flags;
1399         int sges_left;
1400         u32 sges_in_segment;
1401         u32 sgl_flags;
1402         u32 sgl_flags_last_element;
1403         u32 sgl_flags_end_buffer;
1404         struct chain_tracker *chain_req;
1405
1406         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1407
1408         /* init scatter gather flags */
1409         sgl_flags = MPI2_SGE_FLAGS_SIMPLE_ELEMENT;
1410         if (scmd->sc_data_direction == DMA_TO_DEVICE)
1411                 sgl_flags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
1412         sgl_flags_last_element = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT)
1413             << MPI2_SGE_FLAGS_SHIFT;
1414         sgl_flags_end_buffer = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT |
1415             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST)
1416             << MPI2_SGE_FLAGS_SHIFT;
1417         sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1418
1419         sg_scmd = scsi_sglist(scmd);
1420         sges_left = scsi_dma_map(scmd);
1421         if (sges_left < 0) {
1422                 sdev_printk(KERN_ERR, scmd->device,
1423                  "pci_map_sg failed: request for %d bytes!\n",
1424                  scsi_bufflen(scmd));
1425                 return -ENOMEM;
1426         }
1427
1428         sg_local = &mpi_request->SGL;
1429         sges_in_segment = ioc->max_sges_in_main_message;
1430         if (sges_left <= sges_in_segment)
1431                 goto fill_in_last_segment;
1432
1433         mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) +
1434             (sges_in_segment * ioc->sge_size))/4;
1435
1436         /* fill in main message segment when there is a chain following */
1437         while (sges_in_segment) {
1438                 if (sges_in_segment == 1)
1439                         ioc->base_add_sg_single(sg_local,
1440                             sgl_flags_last_element | sg_dma_len(sg_scmd),
1441                             sg_dma_address(sg_scmd));
1442                 else
1443                         ioc->base_add_sg_single(sg_local, sgl_flags |
1444                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1445                 sg_scmd = sg_next(sg_scmd);
1446                 sg_local += ioc->sge_size;
1447                 sges_left--;
1448                 sges_in_segment--;
1449         }
1450
1451         /* initializing the chain flags and pointers */
1452         chain_flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT << MPI2_SGE_FLAGS_SHIFT;
1453         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1454         if (!chain_req)
1455                 return -1;
1456         chain = chain_req->chain_buffer;
1457         chain_dma = chain_req->chain_buffer_dma;
1458         do {
1459                 sges_in_segment = (sges_left <=
1460                     ioc->max_sges_in_chain_message) ? sges_left :
1461                     ioc->max_sges_in_chain_message;
1462                 chain_offset = (sges_left == sges_in_segment) ?
1463                     0 : (sges_in_segment * ioc->sge_size)/4;
1464                 chain_length = sges_in_segment * ioc->sge_size;
1465                 if (chain_offset) {
1466                         chain_offset = chain_offset <<
1467                             MPI2_SGE_CHAIN_OFFSET_SHIFT;
1468                         chain_length += ioc->sge_size;
1469                 }
1470                 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset |
1471                     chain_length, chain_dma);
1472                 sg_local = chain;
1473                 if (!chain_offset)
1474                         goto fill_in_last_segment;
1475
1476                 /* fill in chain segments */
1477                 while (sges_in_segment) {
1478                         if (sges_in_segment == 1)
1479                                 ioc->base_add_sg_single(sg_local,
1480                                     sgl_flags_last_element |
1481                                     sg_dma_len(sg_scmd),
1482                                     sg_dma_address(sg_scmd));
1483                         else
1484                                 ioc->base_add_sg_single(sg_local, sgl_flags |
1485                                     sg_dma_len(sg_scmd),
1486                                     sg_dma_address(sg_scmd));
1487                         sg_scmd = sg_next(sg_scmd);
1488                         sg_local += ioc->sge_size;
1489                         sges_left--;
1490                         sges_in_segment--;
1491                 }
1492
1493                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1494                 if (!chain_req)
1495                         return -1;
1496                 chain = chain_req->chain_buffer;
1497                 chain_dma = chain_req->chain_buffer_dma;
1498         } while (1);
1499
1500
1501  fill_in_last_segment:
1502
1503         /* fill the last segment */
1504         while (sges_left) {
1505                 if (sges_left == 1)
1506                         ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer |
1507                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1508                 else
1509                         ioc->base_add_sg_single(sg_local, sgl_flags |
1510                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1511                 sg_scmd = sg_next(sg_scmd);
1512                 sg_local += ioc->sge_size;
1513                 sges_left--;
1514         }
1515
1516         return 0;
1517 }
1518
1519 /**
1520  * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1521  * @ioc: per adapter object
1522  * @scmd: scsi command
1523  * @smid: system request message index
1524  * Context: none.
1525  *
1526  * The main routine that builds scatter gather table from a given
1527  * scsi request sent via the .queuecommand main handler.
1528  *
1529  * Returns 0 success, anything else error
1530  */
1531 static int
1532 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER *ioc,
1533         struct scsi_cmnd *scmd, u16 smid)
1534 {
1535         Mpi2SCSIIORequest_t *mpi_request;
1536         dma_addr_t chain_dma;
1537         struct scatterlist *sg_scmd;
1538         void *sg_local, *chain;
1539         u32 chain_offset;
1540         u32 chain_length;
1541         int sges_left;
1542         u32 sges_in_segment;
1543         u8 simple_sgl_flags;
1544         u8 simple_sgl_flags_last;
1545         u8 chain_sgl_flags;
1546         struct chain_tracker *chain_req;
1547
1548         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1549
1550         /* init scatter gather flags */
1551         simple_sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1552             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1553         simple_sgl_flags_last = simple_sgl_flags |
1554             MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1555         chain_sgl_flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
1556             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1557
1558         sg_scmd = scsi_sglist(scmd);
1559         sges_left = scsi_dma_map(scmd);
1560         if (sges_left < 0) {
1561                 sdev_printk(KERN_ERR, scmd->device,
1562                         "pci_map_sg failed: request for %d bytes!\n",
1563                         scsi_bufflen(scmd));
1564                 return -ENOMEM;
1565         }
1566
1567         sg_local = &mpi_request->SGL;
1568         sges_in_segment = (ioc->request_sz -
1569             offsetof(Mpi2SCSIIORequest_t, SGL))/ioc->sge_size_ieee;
1570         if (sges_left <= sges_in_segment)
1571                 goto fill_in_last_segment;
1572
1573         mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) +
1574             (offsetof(Mpi2SCSIIORequest_t, SGL)/ioc->sge_size_ieee);
1575
1576         /* fill in main message segment when there is a chain following */
1577         while (sges_in_segment > 1) {
1578                 _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1579                     sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1580                 sg_scmd = sg_next(sg_scmd);
1581                 sg_local += ioc->sge_size_ieee;
1582                 sges_left--;
1583                 sges_in_segment--;
1584         }
1585
1586         /* initializing the pointers */
1587         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1588         if (!chain_req)
1589                 return -1;
1590         chain = chain_req->chain_buffer;
1591         chain_dma = chain_req->chain_buffer_dma;
1592         do {
1593                 sges_in_segment = (sges_left <=
1594                     ioc->max_sges_in_chain_message) ? sges_left :
1595                     ioc->max_sges_in_chain_message;
1596                 chain_offset = (sges_left == sges_in_segment) ?
1597                     0 : sges_in_segment;
1598                 chain_length = sges_in_segment * ioc->sge_size_ieee;
1599                 if (chain_offset)
1600                         chain_length += ioc->sge_size_ieee;
1601                 _base_add_sg_single_ieee(sg_local, chain_sgl_flags,
1602                     chain_offset, chain_length, chain_dma);
1603
1604                 sg_local = chain;
1605                 if (!chain_offset)
1606                         goto fill_in_last_segment;
1607
1608                 /* fill in chain segments */
1609                 while (sges_in_segment) {
1610                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1611                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1612                         sg_scmd = sg_next(sg_scmd);
1613                         sg_local += ioc->sge_size_ieee;
1614                         sges_left--;
1615                         sges_in_segment--;
1616                 }
1617
1618                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1619                 if (!chain_req)
1620                         return -1;
1621                 chain = chain_req->chain_buffer;
1622                 chain_dma = chain_req->chain_buffer_dma;
1623         } while (1);
1624
1625
1626  fill_in_last_segment:
1627
1628         /* fill the last segment */
1629         while (sges_left > 0) {
1630                 if (sges_left == 1)
1631                         _base_add_sg_single_ieee(sg_local,
1632                             simple_sgl_flags_last, 0, sg_dma_len(sg_scmd),
1633                             sg_dma_address(sg_scmd));
1634                 else
1635                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1636                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1637                 sg_scmd = sg_next(sg_scmd);
1638                 sg_local += ioc->sge_size_ieee;
1639                 sges_left--;
1640         }
1641
1642         return 0;
1643 }
1644
1645 /**
1646  * _base_build_sg_ieee - build generic sg for IEEE format
1647  * @ioc: per adapter object
1648  * @psge: virtual address for SGE
1649  * @data_out_dma: physical address for WRITES
1650  * @data_out_sz: data xfer size for WRITES
1651  * @data_in_dma: physical address for READS
1652  * @data_in_sz: data xfer size for READS
1653  *
1654  * Return nothing.
1655  */
1656 static void
1657 _base_build_sg_ieee(struct MPT3SAS_ADAPTER *ioc, void *psge,
1658         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1659         size_t data_in_sz)
1660 {
1661         u8 sgl_flags;
1662
1663         if (!data_out_sz && !data_in_sz) {
1664                 _base_build_zero_len_sge_ieee(ioc, psge);
1665                 return;
1666         }
1667
1668         if (data_out_sz && data_in_sz) {
1669                 /* WRITE sgel first */
1670                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1671                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1672                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1673                     data_out_dma);
1674
1675                 /* incr sgel */
1676                 psge += ioc->sge_size_ieee;
1677
1678                 /* READ sgel last */
1679                 sgl_flags |= MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1680                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1681                     data_in_dma);
1682         } else if (data_out_sz) /* WRITE */ {
1683                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1684                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1685                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1686                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1687                     data_out_dma);
1688         } else if (data_in_sz) /* READ */ {
1689                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1690                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1691                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1692                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1693                     data_in_dma);
1694         }
1695 }
1696
1697 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1698
1699 /**
1700  * _base_config_dma_addressing - set dma addressing
1701  * @ioc: per adapter object
1702  * @pdev: PCI device struct
1703  *
1704  * Returns 0 for success, non-zero for failure.
1705  */
1706 static int
1707 _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
1708 {
1709         struct sysinfo s;
1710         u64 consistent_dma_mask;
1711
1712         if (ioc->dma_mask)
1713                 consistent_dma_mask = DMA_BIT_MASK(64);
1714         else
1715                 consistent_dma_mask = DMA_BIT_MASK(32);
1716
1717         if (sizeof(dma_addr_t) > 4) {
1718                 const uint64_t required_mask =
1719                     dma_get_required_mask(&pdev->dev);
1720                 if ((required_mask > DMA_BIT_MASK(32)) &&
1721                     !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
1722                     !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) {
1723                         ioc->base_add_sg_single = &_base_add_sg_single_64;
1724                         ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1725                         ioc->dma_mask = 64;
1726                         goto out;
1727                 }
1728         }
1729
1730         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1731             && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1732                 ioc->base_add_sg_single = &_base_add_sg_single_32;
1733                 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1734                 ioc->dma_mask = 32;
1735         } else
1736                 return -ENODEV;
1737
1738  out:
1739         si_meminfo(&s);
1740         pr_info(MPT3SAS_FMT
1741                 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1742                 ioc->name, ioc->dma_mask, convert_to_kb(s.totalram));
1743
1744         return 0;
1745 }
1746
1747 static int
1748 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
1749                                       struct pci_dev *pdev)
1750 {
1751         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1752                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
1753                         return -ENODEV;
1754         }
1755         return 0;
1756 }
1757
1758 /**
1759  * _base_check_enable_msix - checks MSIX capabable.
1760  * @ioc: per adapter object
1761  *
1762  * Check to see if card is capable of MSIX, and set number
1763  * of available msix vectors
1764  */
1765 static int
1766 _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1767 {
1768         int base;
1769         u16 message_control;
1770
1771         /* Check whether controller SAS2008 B0 controller,
1772          * if it is SAS2008 B0 controller use IO-APIC instead of MSIX
1773          */
1774         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1775             ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) {
1776                 return -EINVAL;
1777         }
1778
1779         base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1780         if (!base) {
1781                 dfailprintk(ioc, pr_info(MPT3SAS_FMT "msix not supported\n",
1782                         ioc->name));
1783                 return -EINVAL;
1784         }
1785
1786         /* get msix vector count */
1787         /* NUMA_IO not supported for older controllers */
1788         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1789             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1790             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1791             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1792             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1793             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1794             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1795                 ioc->msix_vector_count = 1;
1796         else {
1797                 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1798                 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1799         }
1800         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1801                 "msix is supported, vector_count(%d)\n",
1802                 ioc->name, ioc->msix_vector_count));
1803         return 0;
1804 }
1805
1806 /**
1807  * _base_free_irq - free irq
1808  * @ioc: per adapter object
1809  *
1810  * Freeing respective reply_queue from the list.
1811  */
1812 static void
1813 _base_free_irq(struct MPT3SAS_ADAPTER *ioc)
1814 {
1815         struct adapter_reply_queue *reply_q, *next;
1816
1817         if (list_empty(&ioc->reply_queue_list))
1818                 return;
1819
1820         list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1821                 list_del(&reply_q->list);
1822                 if (smp_affinity_enable) {
1823                         irq_set_affinity_hint(reply_q->vector, NULL);
1824                         free_cpumask_var(reply_q->affinity_hint);
1825                 }
1826                 free_irq(reply_q->vector, reply_q);
1827                 kfree(reply_q);
1828         }
1829 }
1830
1831 /**
1832  * _base_request_irq - request irq
1833  * @ioc: per adapter object
1834  * @index: msix index into vector table
1835  * @vector: irq vector
1836  *
1837  * Inserting respective reply_queue into the list.
1838  */
1839 static int
1840 _base_request_irq(struct MPT3SAS_ADAPTER *ioc, u8 index, u32 vector)
1841 {
1842         struct adapter_reply_queue *reply_q;
1843         int r;
1844
1845         reply_q =  kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1846         if (!reply_q) {
1847                 pr_err(MPT3SAS_FMT "unable to allocate memory %d!\n",
1848                     ioc->name, (int)sizeof(struct adapter_reply_queue));
1849                 return -ENOMEM;
1850         }
1851         reply_q->ioc = ioc;
1852         reply_q->msix_index = index;
1853         reply_q->vector = vector;
1854
1855         if (smp_affinity_enable) {
1856                 if (!zalloc_cpumask_var(&reply_q->affinity_hint, GFP_KERNEL)) {
1857                         kfree(reply_q);
1858                         return -ENOMEM;
1859                 }
1860         }
1861
1862         atomic_set(&reply_q->busy, 0);
1863         if (ioc->msix_enable)
1864                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1865                     ioc->driver_name, ioc->id, index);
1866         else
1867                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1868                     ioc->driver_name, ioc->id);
1869         r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1870             reply_q);
1871         if (r) {
1872                 pr_err(MPT3SAS_FMT "unable to allocate interrupt %d!\n",
1873                     reply_q->name, vector);
1874                 free_cpumask_var(reply_q->affinity_hint);
1875                 kfree(reply_q);
1876                 return -EBUSY;
1877         }
1878
1879         INIT_LIST_HEAD(&reply_q->list);
1880         list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1881         return 0;
1882 }
1883
1884 /**
1885  * _base_assign_reply_queues - assigning msix index for each cpu
1886  * @ioc: per adapter object
1887  *
1888  * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1889  *
1890  * It would nice if we could call irq_set_affinity, however it is not
1891  * an exported symbol
1892  */
1893 static void
1894 _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1895 {
1896         unsigned int cpu, nr_cpus, nr_msix, index = 0;
1897         struct adapter_reply_queue *reply_q;
1898
1899         if (!_base_is_controller_msix_enabled(ioc))
1900                 return;
1901
1902         memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1903
1904         nr_cpus = num_online_cpus();
1905         nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count,
1906                                                ioc->facts.MaxMSIxVectors);
1907         if (!nr_msix)
1908                 return;
1909
1910         cpu = cpumask_first(cpu_online_mask);
1911
1912         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1913
1914                 unsigned int i, group = nr_cpus / nr_msix;
1915
1916                 if (cpu >= nr_cpus)
1917                         break;
1918
1919                 if (index < nr_cpus % nr_msix)
1920                         group++;
1921
1922                 for (i = 0 ; i < group ; i++) {
1923                         ioc->cpu_msix_table[cpu] = index;
1924                         if (smp_affinity_enable)
1925                                 cpumask_or(reply_q->affinity_hint,
1926                                    reply_q->affinity_hint, get_cpu_mask(cpu));
1927                         cpu = cpumask_next(cpu, cpu_online_mask);
1928                 }
1929                 if (smp_affinity_enable)
1930                         if (irq_set_affinity_hint(reply_q->vector,
1931                                            reply_q->affinity_hint))
1932                                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
1933                                  "Err setting affinity hint to irq vector %d\n",
1934                                  ioc->name, reply_q->vector));
1935                 index++;
1936         }
1937 }
1938
1939 /**
1940  * _base_disable_msix - disables msix
1941  * @ioc: per adapter object
1942  *
1943  */
1944 static void
1945 _base_disable_msix(struct MPT3SAS_ADAPTER *ioc)
1946 {
1947         if (!ioc->msix_enable)
1948                 return;
1949         pci_disable_msix(ioc->pdev);
1950         ioc->msix_enable = 0;
1951 }
1952
1953 /**
1954  * _base_enable_msix - enables msix, failback to io_apic
1955  * @ioc: per adapter object
1956  *
1957  */
1958 static int
1959 _base_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1960 {
1961         struct msix_entry *entries, *a;
1962         int r;
1963         int i;
1964         u8 try_msix = 0;
1965
1966         if (msix_disable == -1 || msix_disable == 0)
1967                 try_msix = 1;
1968
1969         if (!try_msix)
1970                 goto try_ioapic;
1971
1972         if (_base_check_enable_msix(ioc) != 0)
1973                 goto try_ioapic;
1974
1975         ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1976             ioc->msix_vector_count);
1977
1978         printk(MPT3SAS_FMT "MSI-X vectors supported: %d, no of cores"
1979           ": %d, max_msix_vectors: %d\n", ioc->name, ioc->msix_vector_count,
1980           ioc->cpu_count, max_msix_vectors);
1981
1982         if (!ioc->rdpq_array_enable && max_msix_vectors == -1)
1983                 max_msix_vectors = 8;
1984
1985         if (max_msix_vectors > 0) {
1986                 ioc->reply_queue_count = min_t(int, max_msix_vectors,
1987                         ioc->reply_queue_count);
1988                 ioc->msix_vector_count = ioc->reply_queue_count;
1989         } else if (max_msix_vectors == 0)
1990                 goto try_ioapic;
1991
1992         if (ioc->msix_vector_count < ioc->cpu_count)
1993                 smp_affinity_enable = 0;
1994
1995         entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1996             GFP_KERNEL);
1997         if (!entries) {
1998                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1999                         "kcalloc failed @ at %s:%d/%s() !!!\n",
2000                         ioc->name, __FILE__, __LINE__, __func__));
2001                 goto try_ioapic;
2002         }
2003
2004         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
2005                 a->entry = i;
2006
2007         r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count);
2008         if (r) {
2009                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
2010                         "pci_enable_msix_exact failed (r=%d) !!!\n",
2011                         ioc->name, r));
2012                 kfree(entries);
2013                 goto try_ioapic;
2014         }
2015
2016         ioc->msix_enable = 1;
2017         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
2018                 r = _base_request_irq(ioc, i, a->vector);
2019                 if (r) {
2020                         _base_free_irq(ioc);
2021                         _base_disable_msix(ioc);
2022                         kfree(entries);
2023                         goto try_ioapic;
2024                 }
2025         }
2026
2027         kfree(entries);
2028         return 0;
2029
2030 /* failback to io_apic interrupt routing */
2031  try_ioapic:
2032
2033         ioc->reply_queue_count = 1;
2034         r = _base_request_irq(ioc, 0, ioc->pdev->irq);
2035
2036         return r;
2037 }
2038
2039 /**
2040  * mpt3sas_base_unmap_resources - free controller resources
2041  * @ioc: per adapter object
2042  */
2043 void
2044 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER *ioc)
2045 {
2046         struct pci_dev *pdev = ioc->pdev;
2047
2048         dexitprintk(ioc, printk(MPT3SAS_FMT "%s\n",
2049                 ioc->name, __func__));
2050
2051         _base_free_irq(ioc);
2052         _base_disable_msix(ioc);
2053
2054         if (ioc->msix96_vector) {
2055                 kfree(ioc->replyPostRegisterIndex);
2056                 ioc->replyPostRegisterIndex = NULL;
2057         }
2058
2059         if (ioc->chip_phys) {
2060                 iounmap(ioc->chip);
2061                 ioc->chip_phys = 0;
2062         }
2063
2064         if (pci_is_enabled(pdev)) {
2065                 pci_release_selected_regions(ioc->pdev, ioc->bars);
2066                 pci_disable_pcie_error_reporting(pdev);
2067                 pci_disable_device(pdev);
2068         }
2069 }
2070
2071 /**
2072  * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
2073  * @ioc: per adapter object
2074  *
2075  * Returns 0 for success, non-zero for failure.
2076  */
2077 int
2078 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
2079 {
2080         struct pci_dev *pdev = ioc->pdev;
2081         u32 memap_sz;
2082         u32 pio_sz;
2083         int i, r = 0;
2084         u64 pio_chip = 0;
2085         u64 chip_phys = 0;
2086         struct adapter_reply_queue *reply_q;
2087
2088         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n",
2089             ioc->name, __func__));
2090
2091         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
2092         if (pci_enable_device_mem(pdev)) {
2093                 pr_warn(MPT3SAS_FMT "pci_enable_device_mem: failed\n",
2094                         ioc->name);
2095                 ioc->bars = 0;
2096                 return -ENODEV;
2097         }
2098
2099
2100         if (pci_request_selected_regions(pdev, ioc->bars,
2101             ioc->driver_name)) {
2102                 pr_warn(MPT3SAS_FMT "pci_request_selected_regions: failed\n",
2103                         ioc->name);
2104                 ioc->bars = 0;
2105                 r = -ENODEV;
2106                 goto out_fail;
2107         }
2108
2109 /* AER (Advanced Error Reporting) hooks */
2110         pci_enable_pcie_error_reporting(pdev);
2111
2112         pci_set_master(pdev);
2113
2114
2115         if (_base_config_dma_addressing(ioc, pdev) != 0) {
2116                 pr_warn(MPT3SAS_FMT "no suitable DMA mask for %s\n",
2117                     ioc->name, pci_name(pdev));
2118                 r = -ENODEV;
2119                 goto out_fail;
2120         }
2121
2122         for (i = 0, memap_sz = 0, pio_sz = 0; (i < DEVICE_COUNT_RESOURCE) &&
2123              (!memap_sz || !pio_sz); i++) {
2124                 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
2125                         if (pio_sz)
2126                                 continue;
2127                         pio_chip = (u64)pci_resource_start(pdev, i);
2128                         pio_sz = pci_resource_len(pdev, i);
2129                 } else if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
2130                         if (memap_sz)
2131                                 continue;
2132                         ioc->chip_phys = pci_resource_start(pdev, i);
2133                         chip_phys = (u64)ioc->chip_phys;
2134                         memap_sz = pci_resource_len(pdev, i);
2135                         ioc->chip = ioremap(ioc->chip_phys, memap_sz);
2136                 }
2137         }
2138
2139         if (ioc->chip == NULL) {
2140                 pr_err(MPT3SAS_FMT "unable to map adapter memory! "
2141                         " or resource not found\n", ioc->name);
2142                 r = -EINVAL;
2143                 goto out_fail;
2144         }
2145
2146         _base_mask_interrupts(ioc);
2147
2148         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
2149         if (r)
2150                 goto out_fail;
2151
2152         if (!ioc->rdpq_array_enable_assigned) {
2153                 ioc->rdpq_array_enable = ioc->rdpq_array_capable;
2154                 ioc->rdpq_array_enable_assigned = 1;
2155         }
2156
2157         r = _base_enable_msix(ioc);
2158         if (r)
2159                 goto out_fail;
2160
2161         /* Use the Combined reply queue feature only for SAS3 C0 & higher
2162          * revision HBAs and also only when reply queue count is greater than 8
2163          */
2164         if (ioc->msix96_vector && ioc->reply_queue_count > 8) {
2165                 /* Determine the Supplemental Reply Post Host Index Registers
2166                  * Addresse. Supplemental Reply Post Host Index Registers
2167                  * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
2168                  * each register is at offset bytes of
2169                  * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
2170                  */
2171                 ioc->replyPostRegisterIndex = kcalloc(
2172                      MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT,
2173                      sizeof(resource_size_t *), GFP_KERNEL);
2174                 if (!ioc->replyPostRegisterIndex) {
2175                         dfailprintk(ioc, printk(MPT3SAS_FMT
2176                         "allocation for reply Post Register Index failed!!!\n",
2177                                                                    ioc->name));
2178                         r = -ENOMEM;
2179                         goto out_fail;
2180                 }
2181
2182                 for (i = 0; i < MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT; i++) {
2183                         ioc->replyPostRegisterIndex[i] = (resource_size_t *)
2184                              ((u8 *)&ioc->chip->Doorbell +
2185                              MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
2186                              (i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET));
2187                 }
2188         } else
2189                 ioc->msix96_vector = 0;
2190
2191         if (ioc->is_warpdrive) {
2192                 ioc->reply_post_host_index[0] = (resource_size_t __iomem *)
2193                     &ioc->chip->ReplyPostHostIndex;
2194
2195                 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
2196                         ioc->reply_post_host_index[i] =
2197                         (resource_size_t __iomem *)
2198                         ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
2199                         * 4)));
2200         }
2201
2202         list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
2203                 pr_info(MPT3SAS_FMT "%s: IRQ %d\n",
2204                     reply_q->name,  ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
2205                     "IO-APIC enabled"), reply_q->vector);
2206
2207         pr_info(MPT3SAS_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
2208             ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
2209         pr_info(MPT3SAS_FMT "ioport(0x%016llx), size(%d)\n",
2210             ioc->name, (unsigned long long)pio_chip, pio_sz);
2211
2212         /* Save PCI configuration state for recovery from PCI AER/EEH errors */
2213         pci_save_state(pdev);
2214         return 0;
2215
2216  out_fail:
2217         mpt3sas_base_unmap_resources(ioc);
2218         return r;
2219 }
2220
2221 /**
2222  * mpt3sas_base_get_msg_frame - obtain request mf pointer
2223  * @ioc: per adapter object
2224  * @smid: system request message index(smid zero is invalid)
2225  *
2226  * Returns virt pointer to message frame.
2227  */
2228 void *
2229 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2230 {
2231         return (void *)(ioc->request + (smid * ioc->request_sz));
2232 }
2233
2234 /**
2235  * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
2236  * @ioc: per adapter object
2237  * @smid: system request message index
2238  *
2239  * Returns virt pointer to sense buffer.
2240  */
2241 void *
2242 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2243 {
2244         return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
2245 }
2246
2247 /**
2248  * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
2249  * @ioc: per adapter object
2250  * @smid: system request message index
2251  *
2252  * Returns phys pointer to the low 32bit address of the sense buffer.
2253  */
2254 __le32
2255 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2256 {
2257         return cpu_to_le32(ioc->sense_dma + ((smid - 1) *
2258             SCSI_SENSE_BUFFERSIZE));
2259 }
2260
2261 /**
2262  * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
2263  * @ioc: per adapter object
2264  * @phys_addr: lower 32 physical addr of the reply
2265  *
2266  * Converts 32bit lower physical addr into a virt address.
2267  */
2268 void *
2269 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr)
2270 {
2271         if (!phys_addr)
2272                 return NULL;
2273         return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
2274 }
2275
2276 static inline u8
2277 _base_get_msix_index(struct MPT3SAS_ADAPTER *ioc)
2278 {
2279         return ioc->cpu_msix_table[raw_smp_processor_id()];
2280 }
2281
2282 /**
2283  * mpt3sas_base_get_smid - obtain a free smid from internal queue
2284  * @ioc: per adapter object
2285  * @cb_idx: callback index
2286  *
2287  * Returns smid (zero is invalid)
2288  */
2289 u16
2290 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2291 {
2292         unsigned long flags;
2293         struct request_tracker *request;
2294         u16 smid;
2295
2296         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2297         if (list_empty(&ioc->internal_free_list)) {
2298                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2299                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2300                     ioc->name, __func__);
2301                 return 0;
2302         }
2303
2304         request = list_entry(ioc->internal_free_list.next,
2305             struct request_tracker, tracker_list);
2306         request->cb_idx = cb_idx;
2307         smid = request->smid;
2308         list_del(&request->tracker_list);
2309         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2310         return smid;
2311 }
2312
2313 /**
2314  * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
2315  * @ioc: per adapter object
2316  * @cb_idx: callback index
2317  * @scmd: pointer to scsi command object
2318  *
2319  * Returns smid (zero is invalid)
2320  */
2321 u16
2322 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
2323         struct scsi_cmnd *scmd)
2324 {
2325         unsigned long flags;
2326         struct scsiio_tracker *request;
2327         u16 smid;
2328
2329         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2330         if (list_empty(&ioc->free_list)) {
2331                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2332                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2333                     ioc->name, __func__);
2334                 return 0;
2335         }
2336
2337         request = list_entry(ioc->free_list.next,
2338             struct scsiio_tracker, tracker_list);
2339         request->scmd = scmd;
2340         request->cb_idx = cb_idx;
2341         smid = request->smid;
2342         request->msix_io = _base_get_msix_index(ioc);
2343         list_del(&request->tracker_list);
2344         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2345         return smid;
2346 }
2347
2348 /**
2349  * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2350  * @ioc: per adapter object
2351  * @cb_idx: callback index
2352  *
2353  * Returns smid (zero is invalid)
2354  */
2355 u16
2356 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2357 {
2358         unsigned long flags;
2359         struct request_tracker *request;
2360         u16 smid;
2361
2362         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2363         if (list_empty(&ioc->hpr_free_list)) {
2364                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2365                 return 0;
2366         }
2367
2368         request = list_entry(ioc->hpr_free_list.next,
2369             struct request_tracker, tracker_list);
2370         request->cb_idx = cb_idx;
2371         smid = request->smid;
2372         list_del(&request->tracker_list);
2373         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2374         return smid;
2375 }
2376
2377 /**
2378  * mpt3sas_base_free_smid - put smid back on free_list
2379  * @ioc: per adapter object
2380  * @smid: system request message index
2381  *
2382  * Return nothing.
2383  */
2384 void
2385 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2386 {
2387         unsigned long flags;
2388         int i;
2389         struct chain_tracker *chain_req, *next;
2390
2391         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2392         if (smid < ioc->hi_priority_smid) {
2393                 /* scsiio queue */
2394                 i = smid - 1;
2395                 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
2396                         list_for_each_entry_safe(chain_req, next,
2397                             &ioc->scsi_lookup[i].chain_list, tracker_list) {
2398                                 list_del_init(&chain_req->tracker_list);
2399                                 list_add(&chain_req->tracker_list,
2400                                     &ioc->free_chain_list);
2401                         }
2402                 }
2403                 ioc->scsi_lookup[i].cb_idx = 0xFF;
2404                 ioc->scsi_lookup[i].scmd = NULL;
2405                 ioc->scsi_lookup[i].direct_io = 0;
2406                 list_add(&ioc->scsi_lookup[i].tracker_list, &ioc->free_list);
2407                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2408
2409                 /*
2410                  * See _wait_for_commands_to_complete() call with regards
2411                  * to this code.
2412                  */
2413                 if (ioc->shost_recovery && ioc->pending_io_count) {
2414                         if (ioc->pending_io_count == 1)
2415                                 wake_up(&ioc->reset_wq);
2416                         ioc->pending_io_count--;
2417                 }
2418                 return;
2419         } else if (smid < ioc->internal_smid) {
2420                 /* hi-priority */
2421                 i = smid - ioc->hi_priority_smid;
2422                 ioc->hpr_lookup[i].cb_idx = 0xFF;
2423                 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list);
2424         } else if (smid <= ioc->hba_queue_depth) {
2425                 /* internal queue */
2426                 i = smid - ioc->internal_smid;
2427                 ioc->internal_lookup[i].cb_idx = 0xFF;
2428                 list_add(&ioc->internal_lookup[i].tracker_list,
2429                     &ioc->internal_free_list);
2430         }
2431         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2432 }
2433
2434 /**
2435  * _base_writeq - 64 bit write to MMIO
2436  * @ioc: per adapter object
2437  * @b: data payload
2438  * @addr: address in MMIO space
2439  * @writeq_lock: spin lock
2440  *
2441  * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2442  * care of 32 bit environment where its not quarenteed to send the entire word
2443  * in one transfer.
2444  */
2445 #if defined(writeq) && defined(CONFIG_64BIT)
2446 static inline void
2447 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2448 {
2449         writeq(cpu_to_le64(b), addr);
2450 }
2451 #else
2452 static inline void
2453 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2454 {
2455         unsigned long flags;
2456         __u64 data_out = cpu_to_le64(b);
2457
2458         spin_lock_irqsave(writeq_lock, flags);
2459         writel((u32)(data_out), addr);
2460         writel((u32)(data_out >> 32), (addr + 4));
2461         spin_unlock_irqrestore(writeq_lock, flags);
2462 }
2463 #endif
2464
2465 /**
2466  * mpt3sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
2467  * @ioc: per adapter object
2468  * @smid: system request message index
2469  * @handle: device handle
2470  *
2471  * Return nothing.
2472  */
2473 void
2474 mpt3sas_base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle)
2475 {
2476         Mpi2RequestDescriptorUnion_t descriptor;
2477         u64 *request = (u64 *)&descriptor;
2478
2479
2480         descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
2481         descriptor.SCSIIO.MSIxIndex =  _base_get_msix_index(ioc);
2482         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2483         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2484         descriptor.SCSIIO.LMID = 0;
2485         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2486             &ioc->scsi_lookup_lock);
2487 }
2488
2489 /**
2490  * mpt3sas_base_put_smid_fast_path - send fast path request to firmware
2491  * @ioc: per adapter object
2492  * @smid: system request message index
2493  * @handle: device handle
2494  *
2495  * Return nothing.
2496  */
2497 void
2498 mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2499         u16 handle)
2500 {
2501         Mpi2RequestDescriptorUnion_t descriptor;
2502         u64 *request = (u64 *)&descriptor;
2503
2504         descriptor.SCSIIO.RequestFlags =
2505             MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO;
2506         descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
2507         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2508         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2509         descriptor.SCSIIO.LMID = 0;
2510         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2511             &ioc->scsi_lookup_lock);
2512 }
2513
2514 /**
2515  * mpt3sas_base_put_smid_hi_priority - send Task Managment request to firmware
2516  * @ioc: per adapter object
2517  * @smid: system request message index
2518  * @msix_task: msix_task will be same as msix of IO incase of task abort else 0.
2519  * Return nothing.
2520  */
2521 void
2522 mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2523         u16 msix_task)
2524 {
2525         Mpi2RequestDescriptorUnion_t descriptor;
2526         u64 *request = (u64 *)&descriptor;
2527
2528         descriptor.HighPriority.RequestFlags =
2529             MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
2530         descriptor.HighPriority.MSIxIndex =  msix_task;
2531         descriptor.HighPriority.SMID = cpu_to_le16(smid);
2532         descriptor.HighPriority.LMID = 0;
2533         descriptor.HighPriority.Reserved1 = 0;
2534         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2535             &ioc->scsi_lookup_lock);
2536 }
2537
2538 /**
2539  * mpt3sas_base_put_smid_default - Default, primarily used for config pages
2540  * @ioc: per adapter object
2541  * @smid: system request message index
2542  *
2543  * Return nothing.
2544  */
2545 void
2546 mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2547 {
2548         Mpi2RequestDescriptorUnion_t descriptor;
2549         u64 *request = (u64 *)&descriptor;
2550
2551         descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2552         descriptor.Default.MSIxIndex =  _base_get_msix_index(ioc);
2553         descriptor.Default.SMID = cpu_to_le16(smid);
2554         descriptor.Default.LMID = 0;
2555         descriptor.Default.DescriptorTypeDependent = 0;
2556         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2557             &ioc->scsi_lookup_lock);
2558 }
2559
2560 /**
2561  * _base_display_OEMs_branding - Display branding string
2562  * @ioc: per adapter object
2563  *
2564  * Return nothing.
2565  */
2566 static void
2567 _base_display_OEMs_branding(struct MPT3SAS_ADAPTER *ioc)
2568 {
2569         if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
2570                 return;
2571
2572         switch (ioc->pdev->subsystem_vendor) {
2573         case PCI_VENDOR_ID_INTEL:
2574                 switch (ioc->pdev->device) {
2575                 case MPI2_MFGPAGE_DEVID_SAS2008:
2576                         switch (ioc->pdev->subsystem_device) {
2577                         case MPT2SAS_INTEL_RMS2LL080_SSDID:
2578                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2579                                     MPT2SAS_INTEL_RMS2LL080_BRANDING);
2580                                 break;
2581                         case MPT2SAS_INTEL_RMS2LL040_SSDID:
2582                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2583                                     MPT2SAS_INTEL_RMS2LL040_BRANDING);
2584                                 break;
2585                         case MPT2SAS_INTEL_SSD910_SSDID:
2586                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2587                                     MPT2SAS_INTEL_SSD910_BRANDING);
2588                                 break;
2589                         default:
2590                                 pr_info(MPT3SAS_FMT
2591                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2592                                  ioc->name, ioc->pdev->subsystem_device);
2593                                 break;
2594                         }
2595                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2596                         switch (ioc->pdev->subsystem_device) {
2597                         case MPT2SAS_INTEL_RS25GB008_SSDID:
2598                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2599                                     MPT2SAS_INTEL_RS25GB008_BRANDING);
2600                                 break;
2601                         case MPT2SAS_INTEL_RMS25JB080_SSDID:
2602                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2603                                     MPT2SAS_INTEL_RMS25JB080_BRANDING);
2604                                 break;
2605                         case MPT2SAS_INTEL_RMS25JB040_SSDID:
2606                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2607                                     MPT2SAS_INTEL_RMS25JB040_BRANDING);
2608                                 break;
2609                         case MPT2SAS_INTEL_RMS25KB080_SSDID:
2610                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2611                                     MPT2SAS_INTEL_RMS25KB080_BRANDING);
2612                                 break;
2613                         case MPT2SAS_INTEL_RMS25KB040_SSDID:
2614                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2615                                     MPT2SAS_INTEL_RMS25KB040_BRANDING);
2616                                 break;
2617                         case MPT2SAS_INTEL_RMS25LB040_SSDID:
2618                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2619                                     MPT2SAS_INTEL_RMS25LB040_BRANDING);
2620                                 break;
2621                         case MPT2SAS_INTEL_RMS25LB080_SSDID:
2622                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2623                                     MPT2SAS_INTEL_RMS25LB080_BRANDING);
2624                                 break;
2625                         default:
2626                                 pr_info(MPT3SAS_FMT
2627                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2628                                  ioc->name, ioc->pdev->subsystem_device);
2629                                 break;
2630                         }
2631                 case MPI25_MFGPAGE_DEVID_SAS3008:
2632                         switch (ioc->pdev->subsystem_device) {
2633                         case MPT3SAS_INTEL_RMS3JC080_SSDID:
2634                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2635                                         MPT3SAS_INTEL_RMS3JC080_BRANDING);
2636                                 break;
2637
2638                         case MPT3SAS_INTEL_RS3GC008_SSDID:
2639                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2640                                         MPT3SAS_INTEL_RS3GC008_BRANDING);
2641                                 break;
2642                         case MPT3SAS_INTEL_RS3FC044_SSDID:
2643                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2644                                         MPT3SAS_INTEL_RS3FC044_BRANDING);
2645                                 break;
2646                         case MPT3SAS_INTEL_RS3UC080_SSDID:
2647                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2648                                         MPT3SAS_INTEL_RS3UC080_BRANDING);
2649                                 break;
2650                         default:
2651                                 pr_info(MPT3SAS_FMT
2652                                  "Intel(R) Controller: Subsystem ID: 0x%X\n",
2653                                  ioc->name, ioc->pdev->subsystem_device);
2654                                 break;
2655                         }
2656                         break;
2657                 default:
2658                         pr_info(MPT3SAS_FMT
2659                          "Intel(R) Controller: Subsystem ID: 0x%X\n",
2660                          ioc->name, ioc->pdev->subsystem_device);
2661                         break;
2662                 }
2663                 break;
2664         case PCI_VENDOR_ID_DELL:
2665                 switch (ioc->pdev->device) {
2666                 case MPI2_MFGPAGE_DEVID_SAS2008:
2667                         switch (ioc->pdev->subsystem_device) {
2668                         case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
2669                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2670                                  MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING);
2671                                 break;
2672                         case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
2673                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2674                                  MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING);
2675                                 break;
2676                         case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
2677                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2678                                  MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING);
2679                                 break;
2680                         case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
2681                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2682                                  MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING);
2683                                 break;
2684                         case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
2685                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2686                                  MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING);
2687                                 break;
2688                         case MPT2SAS_DELL_PERC_H200_SSDID:
2689                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2690                                  MPT2SAS_DELL_PERC_H200_BRANDING);
2691                                 break;
2692                         case MPT2SAS_DELL_6GBPS_SAS_SSDID:
2693                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2694                                  MPT2SAS_DELL_6GBPS_SAS_BRANDING);
2695                                 break;
2696                         default:
2697                                 pr_info(MPT3SAS_FMT
2698                                    "Dell 6Gbps HBA: Subsystem ID: 0x%X\n",
2699                                    ioc->name, ioc->pdev->subsystem_device);
2700                                 break;
2701                         }
2702                         break;
2703                 case MPI25_MFGPAGE_DEVID_SAS3008:
2704                         switch (ioc->pdev->subsystem_device) {
2705                         case MPT3SAS_DELL_12G_HBA_SSDID:
2706                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2707                                         MPT3SAS_DELL_12G_HBA_BRANDING);
2708                                 break;
2709                         default:
2710                                 pr_info(MPT3SAS_FMT
2711                                    "Dell 12Gbps HBA: Subsystem ID: 0x%X\n",
2712                                    ioc->name, ioc->pdev->subsystem_device);
2713                                 break;
2714                         }
2715                         break;
2716                 default:
2717                         pr_info(MPT3SAS_FMT
2718                            "Dell HBA: Subsystem ID: 0x%X\n", ioc->name,
2719                            ioc->pdev->subsystem_device);
2720                         break;
2721                 }
2722                 break;
2723         case PCI_VENDOR_ID_CISCO:
2724                 switch (ioc->pdev->device) {
2725                 case MPI25_MFGPAGE_DEVID_SAS3008:
2726                         switch (ioc->pdev->subsystem_device) {
2727                         case MPT3SAS_CISCO_12G_8E_HBA_SSDID:
2728                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2729                                         MPT3SAS_CISCO_12G_8E_HBA_BRANDING);
2730                                 break;
2731                         case MPT3SAS_CISCO_12G_8I_HBA_SSDID:
2732                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2733                                         MPT3SAS_CISCO_12G_8I_HBA_BRANDING);
2734                                 break;
2735                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2736                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2737                                         MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2738                                 break;
2739                         default:
2740                                 pr_info(MPT3SAS_FMT
2741                                   "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2742                                   ioc->name, ioc->pdev->subsystem_device);
2743                                 break;
2744                         }
2745                         break;
2746                 case MPI25_MFGPAGE_DEVID_SAS3108_1:
2747                         switch (ioc->pdev->subsystem_device) {
2748                         case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2749                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2750                                 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2751                                 break;
2752                         case MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID:
2753                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2754                                 MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING
2755                                 );
2756                                 break;
2757                         default:
2758                                 pr_info(MPT3SAS_FMT
2759                                  "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2760                                  ioc->name, ioc->pdev->subsystem_device);
2761                                 break;
2762                         }
2763                         break;
2764                 default:
2765                         pr_info(MPT3SAS_FMT
2766                            "Cisco SAS HBA: Subsystem ID: 0x%X\n",
2767                            ioc->name, ioc->pdev->subsystem_device);
2768                         break;
2769                 }
2770                 break;
2771         case MPT2SAS_HP_3PAR_SSVID:
2772                 switch (ioc->pdev->device) {
2773                 case MPI2_MFGPAGE_DEVID_SAS2004:
2774                         switch (ioc->pdev->subsystem_device) {
2775                         case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2776                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2777                                     MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2778                                 break;
2779                         default:
2780                                 pr_info(MPT3SAS_FMT
2781                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2782                                    ioc->name, ioc->pdev->subsystem_device);
2783                                 break;
2784                         }
2785                 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2786                         switch (ioc->pdev->subsystem_device) {
2787                         case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2788                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2789                                     MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2790                                 break;
2791                         case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2792                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2793                                     MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2794                                 break;
2795                         case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2796                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2797                                  MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2798                                 break;
2799                         case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2800                                 pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2801                                     MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2802                                 break;
2803                         default:
2804                                 pr_info(MPT3SAS_FMT
2805                                    "HP 6Gbps SAS HBA: Subsystem ID: 0x%X\n",
2806                                    ioc->name, ioc->pdev->subsystem_device);
2807                                 break;
2808                         }
2809                 default:
2810                         pr_info(MPT3SAS_FMT
2811                            "HP SAS HBA: Subsystem ID: 0x%X\n",
2812                            ioc->name, ioc->pdev->subsystem_device);
2813                         break;
2814                 }
2815         default:
2816                 break;
2817         }
2818 }
2819
2820 /**
2821  * _base_display_ioc_capabilities - Disply IOC's capabilities.
2822  * @ioc: per adapter object
2823  *
2824  * Return nothing.
2825  */
2826 static void
2827 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER *ioc)
2828 {
2829         int i = 0;
2830         char desc[16];
2831         u32 iounit_pg1_flags;
2832         u32 bios_version;
2833
2834         bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2835         strncpy(desc, ioc->manu_pg0.ChipName, 16);
2836         pr_info(MPT3SAS_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "\
2837            "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2838             ioc->name, desc,
2839            (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2840            (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2841            (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2842            ioc->facts.FWVersion.Word & 0x000000FF,
2843            ioc->pdev->revision,
2844            (bios_version & 0xFF000000) >> 24,
2845            (bios_version & 0x00FF0000) >> 16,
2846            (bios_version & 0x0000FF00) >> 8,
2847             bios_version & 0x000000FF);
2848
2849         _base_display_OEMs_branding(ioc);
2850
2851         pr_info(MPT3SAS_FMT "Protocol=(", ioc->name);
2852
2853         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2854                 pr_info("Initiator");
2855                 i++;
2856         }
2857
2858         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2859                 pr_info("%sTarget", i ? "," : "");
2860                 i++;
2861         }
2862
2863         i = 0;
2864         pr_info("), ");
2865         pr_info("Capabilities=(");
2866
2867         if (!ioc->hide_ir_msg) {
2868                 if (ioc->facts.IOCCapabilities &
2869                     MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2870                         pr_info("Raid");
2871                         i++;
2872                 }
2873         }
2874
2875         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2876                 pr_info("%sTLR", i ? "," : "");
2877                 i++;
2878         }
2879
2880         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2881                 pr_info("%sMulticast", i ? "," : "");
2882                 i++;
2883         }
2884
2885         if (ioc->facts.IOCCapabilities &
2886             MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2887                 pr_info("%sBIDI Target", i ? "," : "");
2888                 i++;
2889         }
2890
2891         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2892                 pr_info("%sEEDP", i ? "," : "");
2893                 i++;
2894         }
2895
2896         if (ioc->facts.IOCCapabilities &
2897             MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2898                 pr_info("%sSnapshot Buffer", i ? "," : "");
2899                 i++;
2900         }
2901
2902         if (ioc->facts.IOCCapabilities &
2903             MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2904                 pr_info("%sDiag Trace Buffer", i ? "," : "");
2905                 i++;
2906         }
2907
2908         if (ioc->facts.IOCCapabilities &
2909             MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2910                 pr_info("%sDiag Extended Buffer", i ? "," : "");
2911                 i++;
2912         }
2913
2914         if (ioc->facts.IOCCapabilities &
2915             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2916                 pr_info("%sTask Set Full", i ? "," : "");
2917                 i++;
2918         }
2919
2920         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2921         if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2922                 pr_info("%sNCQ", i ? "," : "");
2923                 i++;
2924         }
2925
2926         pr_info(")\n");
2927 }
2928
2929 /**
2930  * mpt3sas_base_update_missing_delay - change the missing delay timers
2931  * @ioc: per adapter object
2932  * @device_missing_delay: amount of time till device is reported missing
2933  * @io_missing_delay: interval IO is returned when there is a missing device
2934  *
2935  * Return nothing.
2936  *
2937  * Passed on the command line, this function will modify the device missing
2938  * delay, as well as the io missing delay. This should be called at driver
2939  * load time.
2940  */
2941 void
2942 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
2943         u16 device_missing_delay, u8 io_missing_delay)
2944 {
2945         u16 dmd, dmd_new, dmd_orignal;
2946         u8 io_missing_delay_original;
2947         u16 sz;
2948         Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2949         Mpi2ConfigReply_t mpi_reply;
2950         u8 num_phys = 0;
2951         u16 ioc_status;
2952
2953         mpt3sas_config_get_number_hba_phys(ioc, &num_phys);
2954         if (!num_phys)
2955                 return;
2956
2957         sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2958             sizeof(Mpi2SasIOUnit1PhyData_t));
2959         sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2960         if (!sas_iounit_pg1) {
2961                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2962                     ioc->name, __FILE__, __LINE__, __func__);
2963                 goto out;
2964         }
2965         if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2966             sas_iounit_pg1, sz))) {
2967                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2968                     ioc->name, __FILE__, __LINE__, __func__);
2969                 goto out;
2970         }
2971         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2972             MPI2_IOCSTATUS_MASK;
2973         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2974                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2975                     ioc->name, __FILE__, __LINE__, __func__);
2976                 goto out;
2977         }
2978
2979         /* device missing delay */
2980         dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2981         if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2982                 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2983         else
2984                 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2985         dmd_orignal = dmd;
2986         if (device_missing_delay > 0x7F) {
2987                 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2988                     device_missing_delay;
2989                 dmd = dmd / 16;
2990                 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2991         } else
2992                 dmd = device_missing_delay;
2993         sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2994
2995         /* io missing delay */
2996         io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2997         sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2998
2999         if (!mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
3000             sz)) {
3001                 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
3002                         dmd_new = (dmd &
3003                             MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
3004                 else
3005                         dmd_new =
3006                     dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
3007                 pr_info(MPT3SAS_FMT "device_missing_delay: old(%d), new(%d)\n",
3008                         ioc->name, dmd_orignal, dmd_new);
3009                 pr_info(MPT3SAS_FMT "ioc_missing_delay: old(%d), new(%d)\n",
3010                         ioc->name, io_missing_delay_original,
3011                     io_missing_delay);
3012                 ioc->device_missing_delay = dmd_new;
3013                 ioc->io_missing_delay = io_missing_delay;
3014         }
3015
3016 out:
3017         kfree(sas_iounit_pg1);
3018 }
3019 /**
3020  * _base_static_config_pages - static start of day config pages
3021  * @ioc: per adapter object
3022  *
3023  * Return nothing.
3024  */
3025 static void
3026 _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
3027 {
3028         Mpi2ConfigReply_t mpi_reply;
3029         u32 iounit_pg1_flags;
3030
3031         mpt3sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
3032         if (ioc->ir_firmware)
3033                 mpt3sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
3034                     &ioc->manu_pg10);
3035
3036         /*
3037          * Ensure correct T10 PI operation if vendor left EEDPTagMode
3038          * flag unset in NVDATA.
3039          */
3040         mpt3sas_config_get_manufacturing_pg11(ioc, &mpi_reply, &ioc->manu_pg11);
3041         if (ioc->manu_pg11.EEDPTagMode == 0) {
3042                 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
3043                     ioc->name);
3044                 ioc->manu_pg11.EEDPTagMode &= ~0x3;
3045                 ioc->manu_pg11.EEDPTagMode |= 0x1;
3046                 mpt3sas_config_set_manufacturing_pg11(ioc, &mpi_reply,
3047                     &ioc->manu_pg11);
3048         }
3049
3050         mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
3051         mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
3052         mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
3053         mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
3054         mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3055         mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8);
3056         _base_display_ioc_capabilities(ioc);
3057
3058         /*
3059          * Enable task_set_full handling in iounit_pg1 when the
3060          * facts capabilities indicate that its supported.
3061          */
3062         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
3063         if ((ioc->facts.IOCCapabilities &
3064             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
3065                 iounit_pg1_flags &=
3066                     ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3067         else
3068                 iounit_pg1_flags |=
3069                     MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
3070         ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
3071         mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
3072
3073         if (ioc->iounit_pg8.NumSensors)
3074                 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors;
3075 }
3076
3077 /**
3078  * _base_release_memory_pools - release memory
3079  * @ioc: per adapter object
3080  *
3081  * Free memory allocated from _base_allocate_memory_pools.
3082  *
3083  * Return nothing.
3084  */
3085 static void
3086 _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
3087 {
3088         int i = 0;
3089         struct reply_post_struct *rps;
3090
3091         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3092             __func__));
3093
3094         if (ioc->request) {
3095                 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
3096                     ioc->request,  ioc->request_dma);
3097                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3098                         "request_pool(0x%p): free\n",
3099                         ioc->name, ioc->request));
3100                 ioc->request = NULL;
3101         }
3102
3103         if (ioc->sense) {
3104                 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
3105                 if (ioc->sense_dma_pool)
3106                         pci_pool_destroy(ioc->sense_dma_pool);
3107                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3108                         "sense_pool(0x%p): free\n",
3109                         ioc->name, ioc->sense));
3110                 ioc->sense = NULL;
3111         }
3112
3113         if (ioc->reply) {
3114                 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
3115                 if (ioc->reply_dma_pool)
3116                         pci_pool_destroy(ioc->reply_dma_pool);
3117                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3118                         "reply_pool(0x%p): free\n",
3119                         ioc->name, ioc->reply));
3120                 ioc->reply = NULL;
3121         }
3122
3123         if (ioc->reply_free) {
3124                 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
3125                     ioc->reply_free_dma);
3126                 if (ioc->reply_free_dma_pool)
3127                         pci_pool_destroy(ioc->reply_free_dma_pool);
3128                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3129                         "reply_free_pool(0x%p): free\n",
3130                         ioc->name, ioc->reply_free));
3131                 ioc->reply_free = NULL;
3132         }
3133
3134         if (ioc->reply_post) {
3135                 do {
3136                         rps = &ioc->reply_post[i];
3137                         if (rps->reply_post_free) {
3138                                 pci_pool_free(
3139                                     ioc->reply_post_free_dma_pool,
3140                                     rps->reply_post_free,
3141                                     rps->reply_post_free_dma);
3142                                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3143                                     "reply_post_free_pool(0x%p): free\n",
3144                                     ioc->name, rps->reply_post_free));
3145                                 rps->reply_post_free = NULL;
3146                         }
3147                 } while (ioc->rdpq_array_enable &&
3148                            (++i < ioc->reply_queue_count));
3149
3150                 if (ioc->reply_post_free_dma_pool)
3151                         pci_pool_destroy(ioc->reply_post_free_dma_pool);
3152                 kfree(ioc->reply_post);
3153         }
3154
3155         if (ioc->config_page) {
3156                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
3157                     "config_page(0x%p): free\n", ioc->name,
3158                     ioc->config_page));
3159                 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
3160                     ioc->config_page, ioc->config_page_dma);
3161         }
3162
3163         if (ioc->scsi_lookup) {
3164                 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
3165                 ioc->scsi_lookup = NULL;
3166         }
3167         kfree(ioc->hpr_lookup);
3168         kfree(ioc->internal_lookup);
3169         if (ioc->chain_lookup) {
3170                 for (i = 0; i < ioc->chain_depth; i++) {
3171                         if (ioc->chain_lookup[i].chain_buffer)
3172                                 pci_pool_free(ioc->chain_dma_pool,
3173                                     ioc->chain_lookup[i].chain_buffer,
3174                                     ioc->chain_lookup[i].chain_buffer_dma);
3175                 }
3176                 if (ioc->chain_dma_pool)
3177                         pci_pool_destroy(ioc->chain_dma_pool);
3178                 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
3179                 ioc->chain_lookup = NULL;
3180         }
3181 }
3182
3183 /**
3184  * _base_allocate_memory_pools - allocate start of day memory pools
3185  * @ioc: per adapter object
3186  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3187  *
3188  * Returns 0 success, anything else error
3189  */
3190 static int
3191 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc,  int sleep_flag)
3192 {
3193         struct mpt3sas_facts *facts;
3194         u16 max_sge_elements;
3195         u16 chains_needed_per_io;
3196         u32 sz, total_sz, reply_post_free_sz;
3197         u32 retry_sz;
3198         u16 max_request_credit;
3199         unsigned short sg_tablesize;
3200         u16 sge_size;
3201         int i;
3202
3203         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3204             __func__));
3205
3206
3207         retry_sz = 0;
3208         facts = &ioc->facts;
3209
3210         /* command line tunables for max sgl entries */
3211         if (max_sgl_entries != -1)
3212                 sg_tablesize = max_sgl_entries;
3213         else {
3214                 if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
3215                         sg_tablesize = MPT2SAS_SG_DEPTH;
3216                 else
3217                         sg_tablesize = MPT3SAS_SG_DEPTH;
3218         }
3219
3220         if (sg_tablesize < MPT_MIN_PHYS_SEGMENTS)
3221                 sg_tablesize = MPT_MIN_PHYS_SEGMENTS;
3222         else if (sg_tablesize > MPT_MAX_PHYS_SEGMENTS) {
3223                 sg_tablesize = min_t(unsigned short, sg_tablesize,
3224                                       SG_MAX_SEGMENTS);
3225                 pr_warn(MPT3SAS_FMT
3226                  "sg_tablesize(%u) is bigger than kernel"
3227                  " defined SG_CHUNK_SIZE(%u)\n", ioc->name,
3228                  sg_tablesize, MPT_MAX_PHYS_SEGMENTS);
3229         }
3230         ioc->shost->sg_tablesize = sg_tablesize;
3231
3232         ioc->internal_depth = min_t(int, (facts->HighPriorityCredit + (5)),
3233                 (facts->RequestCredit / 4));
3234         if (ioc->internal_depth < INTERNAL_CMDS_COUNT) {
3235                 if (facts->RequestCredit <= (INTERNAL_CMDS_COUNT +
3236                                 INTERNAL_SCSIIO_CMDS_COUNT)) {
3237                         pr_err(MPT3SAS_FMT "IOC doesn't have enough Request \
3238                             Credits, it has just %d number of credits\n",
3239                             ioc->name, facts->RequestCredit);
3240                         return -ENOMEM;
3241                 }
3242                 ioc->internal_depth = 10;
3243         }
3244
3245         ioc->hi_priority_depth = ioc->internal_depth - (5);
3246         /* command line tunables  for max controller queue depth */
3247         if (max_queue_depth != -1 && max_queue_depth != 0) {
3248                 max_request_credit = min_t(u16, max_queue_depth +
3249                         ioc->internal_depth, facts->RequestCredit);
3250                 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
3251                         max_request_credit =  MAX_HBA_QUEUE_DEPTH;
3252         } else
3253                 max_request_credit = min_t(u16, facts->RequestCredit,
3254                     MAX_HBA_QUEUE_DEPTH);
3255
3256         /* Firmware maintains additional facts->HighPriorityCredit number of
3257          * credits for HiPriprity Request messages, so hba queue depth will be
3258          * sum of max_request_credit and high priority queue depth.
3259          */
3260         ioc->hba_queue_depth = max_request_credit + ioc->hi_priority_depth;
3261
3262         /* request frame size */
3263         ioc->request_sz = facts->IOCRequestFrameSize * 4;
3264
3265         /* reply frame size */
3266         ioc->reply_sz = facts->ReplyFrameSize * 4;
3267
3268         /* chain segment size */
3269         if (ioc->hba_mpi_version_belonged != MPI2_VERSION) {
3270                 if (facts->IOCMaxChainSegmentSize)
3271                         ioc->chain_segment_sz =
3272                                         facts->IOCMaxChainSegmentSize *
3273                                         MAX_CHAIN_ELEMT_SZ;
3274                 else
3275                 /* set to 128 bytes size if IOCMaxChainSegmentSize is zero */
3276                         ioc->chain_segment_sz = DEFAULT_NUM_FWCHAIN_ELEMTS *
3277                                                     MAX_CHAIN_ELEMT_SZ;
3278         } else
3279                 ioc->chain_segment_sz = ioc->request_sz;
3280
3281         /* calculate the max scatter element size */
3282         sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee);
3283
3284  retry_allocation:
3285         total_sz = 0;
3286         /* calculate number of sg elements left over in the 1st frame */
3287         max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
3288             sizeof(Mpi2SGEIOUnion_t)) + sge_size);
3289         ioc->max_sges_in_main_message = max_sge_elements/sge_size;
3290
3291         /* now do the same for a chain buffer */
3292         max_sge_elements = ioc->chain_segment_sz - sge_size;
3293         ioc->max_sges_in_chain_message = max_sge_elements/sge_size;
3294
3295         /*
3296          *  MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
3297          */
3298         chains_needed_per_io = ((ioc->shost->sg_tablesize -
3299            ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
3300             + 1;
3301         if (chains_needed_per_io > facts->MaxChainDepth) {
3302                 chains_needed_per_io = facts->MaxChainDepth;
3303                 ioc->shost->sg_tablesize = min_t(u16,
3304                 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
3305                 * chains_needed_per_io), ioc->shost->sg_tablesize);
3306         }
3307         ioc->chains_needed_per_io = chains_needed_per_io;
3308
3309         /* reply free queue sizing - taking into account for 64 FW events */
3310         ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3311
3312         /* calculate reply descriptor post queue depth */
3313         ioc->reply_post_queue_depth = ioc->hba_queue_depth +
3314                                 ioc->reply_free_queue_depth +  1 ;
3315         /* align the reply post queue on the next 16 count boundary */
3316         if (ioc->reply_post_queue_depth % 16)
3317                 ioc->reply_post_queue_depth += 16 -
3318                 (ioc->reply_post_queue_depth % 16);
3319
3320         if (ioc->reply_post_queue_depth >
3321             facts->MaxReplyDescriptorPostQueueDepth) {
3322                 ioc->reply_post_queue_depth =
3323                                 facts->MaxReplyDescriptorPostQueueDepth -
3324                     (facts->MaxReplyDescriptorPostQueueDepth % 16);
3325                 ioc->hba_queue_depth =
3326                                 ((ioc->reply_post_queue_depth - 64) / 2) - 1;
3327                 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3328         }
3329
3330         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scatter gather: " \
3331             "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
3332             "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
3333             ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
3334             ioc->chains_needed_per_io));
3335
3336         /* reply post queue, 16 byte align */
3337         reply_post_free_sz = ioc->reply_post_queue_depth *
3338             sizeof(Mpi2DefaultReplyDescriptor_t);
3339
3340         sz = reply_post_free_sz;
3341         if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable)
3342                 sz *= ioc->reply_queue_count;
3343
3344         ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ?
3345             (ioc->reply_queue_count):1,
3346             sizeof(struct reply_post_struct), GFP_KERNEL);
3347
3348         if (!ioc->reply_post) {
3349                 pr_err(MPT3SAS_FMT "reply_post_free pool: kcalloc failed\n",
3350                         ioc->name);
3351                 goto out;
3352         }
3353         ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
3354             ioc->pdev, sz, 16, 0);
3355         if (!ioc->reply_post_free_dma_pool) {
3356                 pr_err(MPT3SAS_FMT
3357                  "reply_post_free pool: pci_pool_create failed\n",
3358                  ioc->name);
3359                 goto out;
3360         }
3361         i = 0;
3362         do {
3363                 ioc->reply_post[i].reply_post_free =
3364                     pci_pool_alloc(ioc->reply_post_free_dma_pool,
3365                     GFP_KERNEL,
3366                     &ioc->reply_post[i].reply_post_free_dma);
3367                 if (!ioc->reply_post[i].reply_post_free) {
3368                         pr_err(MPT3SAS_FMT
3369                         "reply_post_free pool: pci_pool_alloc failed\n",
3370                         ioc->name);
3371                         goto out;
3372                 }
3373                 memset(ioc->reply_post[i].reply_post_free, 0, sz);
3374                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3375                     "reply post free pool (0x%p): depth(%d),"
3376                     "element_size(%d), pool_size(%d kB)\n", ioc->name,
3377                     ioc->reply_post[i].reply_post_free,
3378                     ioc->reply_post_queue_depth, 8, sz/1024));
3379                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3380                     "reply_post_free_dma = (0x%llx)\n", ioc->name,
3381                     (unsigned long long)
3382                     ioc->reply_post[i].reply_post_free_dma));
3383                 total_sz += sz;
3384         } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
3385
3386         if (ioc->dma_mask == 64) {
3387                 if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
3388                         pr_warn(MPT3SAS_FMT
3389                             "no suitable consistent DMA mask for %s\n",
3390                             ioc->name, pci_name(ioc->pdev));
3391                         goto out;
3392                 }
3393         }
3394
3395         ioc->scsiio_depth = ioc->hba_queue_depth -
3396             ioc->hi_priority_depth - ioc->internal_depth;
3397
3398         /* set the scsi host can_queue depth
3399          * with some internal commands that could be outstanding
3400          */
3401         ioc->shost->can_queue = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT;
3402         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3403                 "scsi host: can_queue depth (%d)\n",
3404                 ioc->name, ioc->shost->can_queue));
3405
3406
3407         /* contiguous pool for request and chains, 16 byte align, one extra "
3408          * "frame for smid=0
3409          */
3410         ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
3411         sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
3412
3413         /* hi-priority queue */
3414         sz += (ioc->hi_priority_depth * ioc->request_sz);
3415
3416         /* internal queue */
3417         sz += (ioc->internal_depth * ioc->request_sz);
3418
3419         ioc->request_dma_sz = sz;
3420         ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
3421         if (!ioc->request) {
3422                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3423                     "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3424                     "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
3425                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3426                 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH)
3427                         goto out;
3428                 retry_sz = 64;
3429                 ioc->hba_queue_depth -= retry_sz;
3430                 _base_release_memory_pools(ioc);
3431                 goto retry_allocation;
3432         }
3433
3434         if (retry_sz)
3435                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3436                     "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3437                     "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
3438                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3439
3440         /* hi-priority queue */
3441         ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
3442             ioc->request_sz);
3443         ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
3444             ioc->request_sz);
3445
3446         /* internal queue */
3447         ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
3448             ioc->request_sz);
3449         ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
3450             ioc->request_sz);
3451
3452         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3453                 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3454                 ioc->name, ioc->request, ioc->hba_queue_depth, ioc->request_sz,
3455             (ioc->hba_queue_depth * ioc->request_sz)/1024));
3456
3457         dinitprintk(ioc, pr_info(MPT3SAS_FMT "request pool: dma(0x%llx)\n",
3458             ioc->name, (unsigned long long) ioc->request_dma));
3459         total_sz += sz;
3460
3461         sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
3462         ioc->scsi_lookup_pages = get_order(sz);
3463         ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
3464             GFP_KERNEL, ioc->scsi_lookup_pages);
3465         if (!ioc->scsi_lookup) {
3466                 pr_err(MPT3SAS_FMT "scsi_lookup: get_free_pages failed, sz(%d)\n",
3467                         ioc->name, (int)sz);
3468                 goto out;
3469         }
3470
3471         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scsiio(0x%p): depth(%d)\n",
3472                 ioc->name, ioc->request, ioc->scsiio_depth));
3473
3474         ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
3475         sz = ioc->chain_depth * sizeof(struct chain_tracker);
3476         ioc->chain_pages = get_order(sz);
3477         ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
3478             GFP_KERNEL, ioc->chain_pages);
3479         if (!ioc->chain_lookup) {
3480                 pr_err(MPT3SAS_FMT "chain_lookup: __get_free_pages failed\n",
3481                         ioc->name);
3482                 goto out;
3483         }
3484         ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
3485             ioc->chain_segment_sz, 16, 0);
3486         if (!ioc->chain_dma_pool) {
3487                 pr_err(MPT3SAS_FMT "chain_dma_pool: pci_pool_create failed\n",
3488                         ioc->name);
3489                 goto out;
3490         }
3491         for (i = 0; i < ioc->chain_depth; i++) {
3492                 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
3493                     ioc->chain_dma_pool , GFP_KERNEL,
3494                     &ioc->chain_lookup[i].chain_buffer_dma);
3495                 if (!ioc->chain_lookup[i].chain_buffer) {
3496                         ioc->chain_depth = i;
3497                         goto chain_done;
3498                 }
3499                 total_sz += ioc->chain_segment_sz;
3500         }
3501  chain_done:
3502         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3503                 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
3504                 ioc->name, ioc->chain_depth, ioc->chain_segment_sz,
3505                 ((ioc->chain_depth *  ioc->chain_segment_sz))/1024));
3506
3507         /* initialize hi-priority queue smid's */
3508         ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
3509             sizeof(struct request_tracker), GFP_KERNEL);
3510         if (!ioc->hpr_lookup) {
3511                 pr_err(MPT3SAS_FMT "hpr_lookup: kcalloc failed\n",
3512                     ioc->name);
3513                 goto out;
3514         }
3515         ioc->hi_priority_smid = ioc->scsiio_depth + 1;
3516         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3517                 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
3518                 ioc->name, ioc->hi_priority,
3519             ioc->hi_priority_depth, ioc->hi_priority_smid));
3520
3521         /* initialize internal queue smid's */
3522         ioc->internal_lookup = kcalloc(ioc->internal_depth,
3523             sizeof(struct request_tracker), GFP_KERNEL);
3524         if (!ioc->internal_lookup) {
3525                 pr_err(MPT3SAS_FMT "internal_lookup: kcalloc failed\n",
3526                     ioc->name);
3527                 goto out;
3528         }
3529         ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
3530         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3531                 "internal(0x%p): depth(%d), start smid(%d)\n",
3532                 ioc->name, ioc->internal,
3533             ioc->internal_depth, ioc->internal_smid));
3534
3535         /* sense buffers, 4 byte align */
3536         sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
3537         ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
3538             0);
3539         if (!ioc->sense_dma_pool) {
3540                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_create failed\n",
3541                     ioc->name);
3542                 goto out;
3543         }
3544         ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
3545             &ioc->sense_dma);
3546         if (!ioc->sense) {
3547                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_alloc failed\n",
3548                     ioc->name);
3549                 goto out;
3550         }
3551         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3552             "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
3553             "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
3554             SCSI_SENSE_BUFFERSIZE, sz/1024));
3555         dinitprintk(ioc, pr_info(MPT3SAS_FMT "sense_dma(0x%llx)\n",
3556             ioc->name, (unsigned long long)ioc->sense_dma));
3557         total_sz += sz;
3558
3559         /* reply pool, 4 byte align */
3560         sz = ioc->reply_free_queue_depth * ioc->reply_sz;
3561         ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
3562             0);
3563         if (!ioc->reply_dma_pool) {
3564                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_create failed\n",
3565                     ioc->name);
3566                 goto out;
3567         }
3568         ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
3569             &ioc->reply_dma);
3570         if (!ioc->reply) {
3571                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_alloc failed\n",
3572                     ioc->name);
3573                 goto out;
3574         }
3575         ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
3576         ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
3577         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3578                 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3579                 ioc->name, ioc->reply,
3580             ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
3581         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_dma(0x%llx)\n",
3582             ioc->name, (unsigned long long)ioc->reply_dma));
3583         total_sz += sz;
3584
3585         /* reply free queue, 16 byte align */
3586         sz = ioc->reply_free_queue_depth * 4;
3587         ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
3588             ioc->pdev, sz, 16, 0);
3589         if (!ioc->reply_free_dma_pool) {
3590                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_create failed\n",
3591                         ioc->name);
3592                 goto out;
3593         }
3594         ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
3595             &ioc->reply_free_dma);
3596         if (!ioc->reply_free) {
3597                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_alloc failed\n",
3598                         ioc->name);
3599                 goto out;
3600         }
3601         memset(ioc->reply_free, 0, sz);
3602         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_free pool(0x%p): " \
3603             "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
3604             ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
3605         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3606                 "reply_free_dma (0x%llx)\n",
3607                 ioc->name, (unsigned long long)ioc->reply_free_dma));
3608         total_sz += sz;
3609
3610         ioc->config_page_sz = 512;
3611         ioc->config_page = pci_alloc_consistent(ioc->pdev,
3612             ioc->config_page_sz, &ioc->config_page_dma);
3613         if (!ioc->config_page) {
3614                 pr_err(MPT3SAS_FMT
3615                         "config page: pci_pool_alloc failed\n",
3616                         ioc->name);
3617                 goto out;
3618         }
3619         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3620                 "config page(0x%p): size(%d)\n",
3621                 ioc->name, ioc->config_page, ioc->config_page_sz));
3622         dinitprintk(ioc, pr_info(MPT3SAS_FMT "config_page_dma(0x%llx)\n",
3623                 ioc->name, (unsigned long long)ioc->config_page_dma));
3624         total_sz += ioc->config_page_sz;
3625
3626         pr_info(MPT3SAS_FMT "Allocated physical memory: size(%d kB)\n",
3627             ioc->name, total_sz/1024);
3628         pr_info(MPT3SAS_FMT
3629                 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3630             ioc->name, ioc->shost->can_queue, facts->RequestCredit);
3631         pr_info(MPT3SAS_FMT "Scatter Gather Elements per IO(%d)\n",
3632             ioc->name, ioc->shost->sg_tablesize);
3633         return 0;
3634
3635  out:
3636         return -ENOMEM;
3637 }
3638
3639 /**
3640  * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3641  * @ioc: Pointer to MPT_ADAPTER structure
3642  * @cooked: Request raw or cooked IOC state
3643  *
3644  * Returns all IOC Doorbell register bits if cooked==0, else just the
3645  * Doorbell bits in MPI_IOC_STATE_MASK.
3646  */
3647 u32
3648 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked)
3649 {
3650         u32 s, sc;
3651
3652         s = readl(&ioc->chip->Doorbell);
3653         sc = s & MPI2_IOC_STATE_MASK;
3654         return cooked ? sc : s;
3655 }
3656
3657 /**
3658  * _base_wait_on_iocstate - waiting on a particular ioc state
3659  * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3660  * @timeout: timeout in second
3661  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3662  *
3663  * Returns 0 for success, non-zero for failure.
3664  */
3665 static int
3666 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
3667         int sleep_flag)
3668 {
3669         u32 count, cntdn;
3670         u32 current_state;
3671
3672         count = 0;
3673         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3674         do {
3675                 current_state = mpt3sas_base_get_iocstate(ioc, 1);
3676                 if (current_state == ioc_state)
3677                         return 0;
3678                 if (count && current_state == MPI2_IOC_STATE_FAULT)
3679                         break;
3680                 if (sleep_flag == CAN_SLEEP)
3681                         usleep_range(1000, 1500);
3682                 else
3683                         udelay(500);
3684                 count++;
3685         } while (--cntdn);
3686
3687         return current_state;
3688 }
3689
3690 /**
3691  * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3692  * a write to the doorbell)
3693  * @ioc: per adapter object
3694  * @timeout: timeout in second
3695  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3696  *
3697  * Returns 0 for success, non-zero for failure.
3698  *
3699  * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3700  */
3701 static int
3702 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
3703
3704 static int
3705 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout,
3706         int sleep_flag)
3707 {
3708         u32 cntdn, count;
3709         u32 int_status;
3710
3711         count = 0;
3712         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3713         do {
3714                 int_status = readl(&ioc->chip->HostInterruptStatus);
3715                 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3716                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3717                                 "%s: successful count(%d), timeout(%d)\n",
3718                                 ioc->name, __func__, count, timeout));
3719                         return 0;
3720                 }
3721                 if (sleep_flag == CAN_SLEEP)
3722                         usleep_range(1000, 1500);
3723                 else
3724                         udelay(500);
3725                 count++;
3726         } while (--cntdn);
3727
3728         pr_err(MPT3SAS_FMT
3729                 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3730                 ioc->name, __func__, count, int_status);
3731         return -EFAULT;
3732 }
3733
3734 /**
3735  * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3736  * @ioc: per adapter object
3737  * @timeout: timeout in second
3738  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3739  *
3740  * Returns 0 for success, non-zero for failure.
3741  *
3742  * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3743  * doorbell.
3744  */
3745 static int
3746 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER *ioc, int timeout,
3747         int sleep_flag)
3748 {
3749         u32 cntdn, count;
3750         u32 int_status;
3751         u32 doorbell;
3752
3753         count = 0;
3754         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3755         do {
3756                 int_status = readl(&ioc->chip->HostInterruptStatus);
3757                 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
3758                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3759                                 "%s: successful count(%d), timeout(%d)\n",
3760                                 ioc->name, __func__, count, timeout));
3761                         return 0;
3762                 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3763                         doorbell = readl(&ioc->chip->Doorbell);
3764                         if ((doorbell & MPI2_IOC_STATE_MASK) ==
3765                             MPI2_IOC_STATE_FAULT) {
3766                                 mpt3sas_base_fault_info(ioc , doorbell);
3767                                 return -EFAULT;
3768                         }
3769                 } else if (int_status == 0xFFFFFFFF)
3770                         goto out;
3771
3772                 if (sleep_flag == CAN_SLEEP)
3773                         usleep_range(1000, 1500);
3774                 else
3775                         udelay(500);
3776                 count++;
3777         } while (--cntdn);
3778
3779  out:
3780         pr_err(MPT3SAS_FMT
3781          "%s: failed due to timeout count(%d), int_status(%x)!\n",
3782          ioc->name, __func__, count, int_status);
3783         return -EFAULT;
3784 }
3785
3786 /**
3787  * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3788  * @ioc: per adapter object
3789  * @timeout: timeout in second
3790  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3791  *
3792  * Returns 0 for success, non-zero for failure.
3793  *
3794  */
3795 static int
3796 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER *ioc, int timeout,
3797         int sleep_flag)
3798 {
3799         u32 cntdn, count;
3800         u32 doorbell_reg;
3801
3802         count = 0;
3803         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3804         do {
3805                 doorbell_reg = readl(&ioc->chip->Doorbell);
3806                 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
3807                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3808                                 "%s: successful count(%d), timeout(%d)\n",
3809                                 ioc->name, __func__, count, timeout));
3810                         return 0;
3811                 }
3812                 if (sleep_flag == CAN_SLEEP)
3813                         usleep_range(1000, 1500);
3814                 else
3815                         udelay(500);
3816                 count++;
3817         } while (--cntdn);
3818
3819         pr_err(MPT3SAS_FMT
3820                 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3821                 ioc->name, __func__, count, doorbell_reg);
3822         return -EFAULT;
3823 }
3824
3825 /**
3826  * _base_send_ioc_reset - send doorbell reset
3827  * @ioc: per adapter object
3828  * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3829  * @timeout: timeout in second
3830  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3831  *
3832  * Returns 0 for success, non-zero for failure.
3833  */
3834 static int
3835 _base_send_ioc_reset(struct MPT3SAS_ADAPTER *ioc, u8 reset_type, int timeout,
3836         int sleep_flag)
3837 {
3838         u32 ioc_state;
3839         int r = 0;
3840
3841         if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
3842                 pr_err(MPT3SAS_FMT "%s: unknown reset_type\n",
3843                     ioc->name, __func__);
3844                 return -EFAULT;
3845         }
3846
3847         if (!(ioc->facts.IOCCapabilities &
3848            MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
3849                 return -EFAULT;
3850
3851         pr_info(MPT3SAS_FMT "sending message unit reset !!\n", ioc->name);
3852
3853         writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
3854             &ioc->chip->Doorbell);
3855         if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
3856                 r = -EFAULT;
3857                 goto out;
3858         }
3859         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3860             timeout, sleep_flag);
3861         if (ioc_state) {
3862                 pr_err(MPT3SAS_FMT
3863                         "%s: failed going to ready state (ioc_state=0x%x)\n",
3864                         ioc->name, __func__, ioc_state);
3865                 r = -EFAULT;
3866                 goto out;
3867         }
3868  out:
3869         pr_info(MPT3SAS_FMT "message unit reset: %s\n",
3870             ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3871         return r;
3872 }
3873
3874 /**
3875  * _base_handshake_req_reply_wait - send request thru doorbell interface
3876  * @ioc: per adapter object
3877  * @request_bytes: request length
3878  * @request: pointer having request payload
3879  * @reply_bytes: reply length
3880  * @reply: pointer to reply payload
3881  * @timeout: timeout in second
3882  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3883  *
3884  * Returns 0 for success, non-zero for failure.
3885  */
3886 static int
3887 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
3888         u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3889 {
3890         MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3891         int i;
3892         u8 failed;
3893         u16 dummy;
3894         __le32 *mfp;
3895
3896         /* make sure doorbell is not in use */
3897         if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3898                 pr_err(MPT3SAS_FMT
3899                         "doorbell is in use (line=%d)\n",
3900                         ioc->name, __LINE__);
3901                 return -EFAULT;
3902         }
3903
3904         /* clear pending doorbell interrupts from previous state changes */
3905         if (readl(&ioc->chip->HostInterruptStatus) &
3906             MPI2_HIS_IOC2SYS_DB_STATUS)
3907                 writel(0, &ioc->chip->HostInterruptStatus);
3908
3909         /* send message to ioc */
3910         writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3911             ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3912             &ioc->chip->Doorbell);
3913
3914         if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3915                 pr_err(MPT3SAS_FMT
3916                         "doorbell handshake int failed (line=%d)\n",
3917                         ioc->name, __LINE__);
3918                 return -EFAULT;
3919         }
3920         writel(0, &ioc->chip->HostInterruptStatus);
3921
3922         if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3923                 pr_err(MPT3SAS_FMT
3924                         "doorbell handshake ack failed (line=%d)\n",
3925                         ioc->name, __LINE__);
3926                 return -EFAULT;
3927         }
3928
3929         /* send message 32-bits at a time */
3930         for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3931                 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3932                 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3933                         failed = 1;
3934         }
3935
3936         if (failed) {
3937                 pr_err(MPT3SAS_FMT
3938                         "doorbell handshake sending request failed (line=%d)\n",
3939                         ioc->name, __LINE__);
3940                 return -EFAULT;
3941         }
3942
3943         /* now wait for the reply */
3944         if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3945                 pr_err(MPT3SAS_FMT
3946                         "doorbell handshake int failed (line=%d)\n",
3947                         ioc->name, __LINE__);
3948                 return -EFAULT;
3949         }
3950
3951         /* read the first two 16-bits, it gives the total length of the reply */
3952         reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3953             & MPI2_DOORBELL_DATA_MASK);
3954         writel(0, &ioc->chip->HostInterruptStatus);
3955         if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3956                 pr_err(MPT3SAS_FMT
3957                         "doorbell handshake int failed (line=%d)\n",
3958                         ioc->name, __LINE__);
3959                 return -EFAULT;
3960         }
3961         reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3962             & MPI2_DOORBELL_DATA_MASK);
3963         writel(0, &ioc->chip->HostInterruptStatus);
3964
3965         for (i = 2; i < default_reply->MsgLength * 2; i++)  {
3966                 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3967                         pr_err(MPT3SAS_FMT
3968                                 "doorbell handshake int failed (line=%d)\n",
3969                                 ioc->name, __LINE__);
3970                         return -EFAULT;
3971                 }
3972                 if (i >=  reply_bytes/2) /* overflow case */
3973                         dummy = readl(&ioc->chip->Doorbell);
3974                 else
3975                         reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3976                             & MPI2_DOORBELL_DATA_MASK);
3977                 writel(0, &ioc->chip->HostInterruptStatus);
3978         }
3979
3980         _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3981         if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3982                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
3983                         "doorbell is in use (line=%d)\n", ioc->name, __LINE__));
3984         }
3985         writel(0, &ioc->chip->HostInterruptStatus);
3986
3987         if (ioc->logging_level & MPT_DEBUG_INIT) {
3988                 mfp = (__le32 *)reply;
3989                 pr_info("\toffset:data\n");
3990                 for (i = 0; i < reply_bytes/4; i++)
3991                         pr_info("\t[0x%02x]:%08x\n", i*4,
3992                             le32_to_cpu(mfp[i]));
3993         }
3994         return 0;
3995 }
3996
3997 /**
3998  * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
3999  * @ioc: per adapter object
4000  * @mpi_reply: the reply payload from FW
4001  * @mpi_request: the request payload sent to FW
4002  *
4003  * The SAS IO Unit Control Request message allows the host to perform low-level
4004  * operations, such as resets on the PHYs of the IO Unit, also allows the host
4005  * to obtain the IOC assigned device handles for a device if it has other
4006  * identifying information about the device, in addition allows the host to
4007  * remove IOC resources associated with the device.
4008  *
4009  * Returns 0 for success, non-zero for failure.
4010  */
4011 int
4012 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
4013         Mpi2SasIoUnitControlReply_t *mpi_reply,
4014         Mpi2SasIoUnitControlRequest_t *mpi_request)
4015 {
4016         u16 smid;
4017         u32 ioc_state;
4018         unsigned long timeleft;
4019         bool issue_reset = false;
4020         int rc;
4021         void *request;
4022         u16 wait_state_count;
4023
4024         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4025             __func__));
4026
4027         mutex_lock(&ioc->base_cmds.mutex);
4028
4029         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
4030                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
4031                     ioc->name, __func__);
4032                 rc = -EAGAIN;
4033                 goto out;
4034         }
4035
4036         wait_state_count = 0;
4037         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4038         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
4039                 if (wait_state_count++ == 10) {
4040                         pr_err(MPT3SAS_FMT
4041                             "%s: failed due to ioc not operational\n",
4042                             ioc->name, __func__);
4043                         rc = -EFAULT;
4044                         goto out;
4045                 }
4046                 ssleep(1);
4047                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4048                 pr_info(MPT3SAS_FMT
4049                         "%s: waiting for operational state(count=%d)\n",
4050                         ioc->name, __func__, wait_state_count);
4051         }
4052
4053         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4054         if (!smid) {
4055                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4056                     ioc->name, __func__);
4057                 rc = -EAGAIN;
4058                 goto out;
4059         }
4060
4061         rc = 0;
4062         ioc->base_cmds.status = MPT3_CMD_PENDING;
4063         request = mpt3sas_base_get_msg_frame(ioc, smid);
4064         ioc->base_cmds.smid = smid;
4065         memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
4066         if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
4067             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
4068                 ioc->ioc_link_reset_in_progress = 1;
4069         init_completion(&ioc->base_cmds.done);
4070         mpt3sas_base_put_smid_default(ioc, smid);
4071         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4072             msecs_to_jiffies(10000));
4073         if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
4074             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
4075             ioc->ioc_link_reset_in_progress)
4076                 ioc->ioc_link_reset_in_progress = 0;
4077         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4078                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4079                     ioc->name, __func__);
4080                 _debug_dump_mf(mpi_request,
4081                     sizeof(Mpi2SasIoUnitControlRequest_t)/4);
4082                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4083                         issue_reset = true;
4084                 goto issue_host_reset;
4085         }
4086         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4087                 memcpy(mpi_reply, ioc->base_cmds.reply,
4088                     sizeof(Mpi2SasIoUnitControlReply_t));
4089         else
4090                 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
4091         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4092         goto out;
4093
4094  issue_host_reset:
4095         if (issue_reset)
4096                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4097                     FORCE_BIG_HAMMER);
4098         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4099         rc = -EFAULT;
4100  out:
4101         mutex_unlock(&ioc->base_cmds.mutex);
4102         return rc;
4103 }
4104
4105 /**
4106  * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
4107  * @ioc: per adapter object
4108  * @mpi_reply: the reply payload from FW
4109  * @mpi_request: the request payload sent to FW
4110  *
4111  * The SCSI Enclosure Processor request message causes the IOC to
4112  * communicate with SES devices to control LED status signals.
4113  *
4114  * Returns 0 for success, non-zero for failure.
4115  */
4116 int
4117 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
4118         Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
4119 {
4120         u16 smid;
4121         u32 ioc_state;
4122         unsigned long timeleft;
4123         bool issue_reset = false;
4124         int rc;
4125         void *request;
4126         u16 wait_state_count;
4127
4128         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4129             __func__));
4130
4131         mutex_lock(&ioc->base_cmds.mutex);
4132
4133         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
4134                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
4135                     ioc->name, __func__);
4136                 rc = -EAGAIN;
4137                 goto out;
4138         }
4139
4140         wait_state_count = 0;
4141         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4142         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
4143                 if (wait_state_count++ == 10) {
4144                         pr_err(MPT3SAS_FMT
4145                             "%s: failed due to ioc not operational\n",
4146                             ioc->name, __func__);
4147                         rc = -EFAULT;
4148                         goto out;
4149                 }
4150                 ssleep(1);
4151                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
4152                 pr_info(MPT3SAS_FMT
4153                         "%s: waiting for operational state(count=%d)\n",
4154                         ioc->name,
4155                     __func__, wait_state_count);
4156         }
4157
4158         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4159         if (!smid) {
4160                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4161                     ioc->name, __func__);
4162                 rc = -EAGAIN;
4163                 goto out;
4164         }
4165
4166         rc = 0;
4167         ioc->base_cmds.status = MPT3_CMD_PENDING;
4168         request = mpt3sas_base_get_msg_frame(ioc, smid);
4169         ioc->base_cmds.smid = smid;
4170         memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
4171         init_completion(&ioc->base_cmds.done);
4172         mpt3sas_base_put_smid_default(ioc, smid);
4173         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
4174             msecs_to_jiffies(10000));
4175         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4176                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4177                     ioc->name, __func__);
4178                 _debug_dump_mf(mpi_request,
4179                     sizeof(Mpi2SepRequest_t)/4);
4180                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
4181                         issue_reset = false;
4182                 goto issue_host_reset;
4183         }
4184         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
4185                 memcpy(mpi_reply, ioc->base_cmds.reply,
4186                     sizeof(Mpi2SepReply_t));
4187         else
4188                 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
4189         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4190         goto out;
4191
4192  issue_host_reset:
4193         if (issue_reset)
4194                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
4195                     FORCE_BIG_HAMMER);
4196         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4197         rc = -EFAULT;
4198  out:
4199         mutex_unlock(&ioc->base_cmds.mutex);
4200         return rc;
4201 }
4202
4203 /**
4204  * _base_get_port_facts - obtain port facts reply and save in ioc
4205  * @ioc: per adapter object
4206  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4207  *
4208  * Returns 0 for success, non-zero for failure.
4209  */
4210 static int
4211 _base_get_port_facts(struct MPT3SAS_ADAPTER *ioc, int port, int sleep_flag)
4212 {
4213         Mpi2PortFactsRequest_t mpi_request;
4214         Mpi2PortFactsReply_t mpi_reply;
4215         struct mpt3sas_port_facts *pfacts;
4216         int mpi_reply_sz, mpi_request_sz, r;
4217
4218         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4219             __func__));
4220
4221         mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
4222         mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
4223         memset(&mpi_request, 0, mpi_request_sz);
4224         mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
4225         mpi_request.PortNumber = port;
4226         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4227             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4228
4229         if (r != 0) {
4230                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4231                     ioc->name, __func__, r);
4232                 return r;
4233         }
4234
4235         pfacts = &ioc->pfacts[port];
4236         memset(pfacts, 0, sizeof(struct mpt3sas_port_facts));
4237         pfacts->PortNumber = mpi_reply.PortNumber;
4238         pfacts->VP_ID = mpi_reply.VP_ID;
4239         pfacts->VF_ID = mpi_reply.VF_ID;
4240         pfacts->MaxPostedCmdBuffers =
4241             le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
4242
4243         return 0;
4244 }
4245
4246 /**
4247  * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
4248  * @ioc: per adapter object
4249  * @timeout:
4250  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4251  *
4252  * Returns 0 for success, non-zero for failure.
4253  */
4254 static int
4255 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER *ioc, int timeout,
4256         int sleep_flag)
4257 {
4258         u32 ioc_state;
4259         int rc;
4260
4261         dinitprintk(ioc, printk(MPT3SAS_FMT "%s\n", ioc->name,
4262             __func__));
4263
4264         if (ioc->pci_error_recovery) {
4265                 dfailprintk(ioc, printk(MPT3SAS_FMT
4266                     "%s: host in pci error recovery\n", ioc->name, __func__));
4267                 return -EFAULT;
4268         }
4269
4270         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4271         dhsprintk(ioc, printk(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4272             ioc->name, __func__, ioc_state));
4273
4274         if (((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) ||
4275             (ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4276                 return 0;
4277
4278         if (ioc_state & MPI2_DOORBELL_USED) {
4279                 dhsprintk(ioc, printk(MPT3SAS_FMT
4280                     "unexpected doorbell active!\n", ioc->name));
4281                 goto issue_diag_reset;
4282         }
4283
4284         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4285                 mpt3sas_base_fault_info(ioc, ioc_state &
4286                     MPI2_DOORBELL_DATA_MASK);
4287                 goto issue_diag_reset;
4288         }
4289
4290         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
4291             timeout, sleep_flag);
4292         if (ioc_state) {
4293                 dfailprintk(ioc, printk(MPT3SAS_FMT
4294                     "%s: failed going to ready state (ioc_state=0x%x)\n",
4295                     ioc->name, __func__, ioc_state));
4296                 return -EFAULT;
4297         }
4298
4299  issue_diag_reset:
4300         rc = _base_diag_reset(ioc, sleep_flag);
4301         return rc;
4302 }
4303
4304 /**
4305  * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
4306  * @ioc: per adapter object
4307  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4308  *
4309  * Returns 0 for success, non-zero for failure.
4310  */
4311 static int
4312 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4313 {
4314         Mpi2IOCFactsRequest_t mpi_request;
4315         Mpi2IOCFactsReply_t mpi_reply;
4316         struct mpt3sas_facts *facts;
4317         int mpi_reply_sz, mpi_request_sz, r;
4318
4319         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4320             __func__));
4321
4322         r = _base_wait_for_iocstate(ioc, 10, sleep_flag);
4323         if (r) {
4324                 dfailprintk(ioc, printk(MPT3SAS_FMT
4325                     "%s: failed getting to correct state\n",
4326                     ioc->name, __func__));
4327                 return r;
4328         }
4329         mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
4330         mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
4331         memset(&mpi_request, 0, mpi_request_sz);
4332         mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
4333         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4334             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4335
4336         if (r != 0) {
4337                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4338                     ioc->name, __func__, r);
4339                 return r;
4340         }
4341
4342         facts = &ioc->facts;
4343         memset(facts, 0, sizeof(struct mpt3sas_facts));
4344         facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
4345         facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
4346         facts->VP_ID = mpi_reply.VP_ID;
4347         facts->VF_ID = mpi_reply.VF_ID;
4348         facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
4349         facts->MaxChainDepth = mpi_reply.MaxChainDepth;
4350         facts->WhoInit = mpi_reply.WhoInit;
4351         facts->NumberOfPorts = mpi_reply.NumberOfPorts;
4352         facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
4353         facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
4354         facts->MaxReplyDescriptorPostQueueDepth =
4355             le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
4356         facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
4357         facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
4358         if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
4359                 ioc->ir_firmware = 1;
4360         if ((facts->IOCCapabilities &
4361               MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE))
4362                 ioc->rdpq_array_capable = 1;
4363         facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
4364         facts->IOCRequestFrameSize =
4365             le16_to_cpu(mpi_reply.IOCRequestFrameSize);
4366         if (ioc->hba_mpi_version_belonged != MPI2_VERSION) {
4367                 facts->IOCMaxChainSegmentSize =
4368                         le16_to_cpu(mpi_reply.IOCMaxChainSegmentSize);
4369         }
4370         facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
4371         facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
4372         ioc->shost->max_id = -1;
4373         facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
4374         facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
4375         facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
4376         facts->HighPriorityCredit =
4377             le16_to_cpu(mpi_reply.HighPriorityCredit);
4378         facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
4379         facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
4380
4381         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4382                 "hba queue depth(%d), max chains per io(%d)\n",
4383                 ioc->name, facts->RequestCredit,
4384             facts->MaxChainDepth));
4385         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4386                 "request frame size(%d), reply frame size(%d)\n", ioc->name,
4387             facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
4388         return 0;
4389 }
4390
4391 /**
4392  * _base_send_ioc_init - send ioc_init to firmware
4393  * @ioc: per adapter object
4394  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4395  *
4396  * Returns 0 for success, non-zero for failure.
4397  */
4398 static int
4399 _base_send_ioc_init(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4400 {
4401         Mpi2IOCInitRequest_t mpi_request;
4402         Mpi2IOCInitReply_t mpi_reply;
4403         int i, r = 0;
4404         ktime_t current_time;
4405         u16 ioc_status;
4406         u32 reply_post_free_array_sz = 0;
4407         Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL;
4408         dma_addr_t reply_post_free_array_dma;
4409
4410         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4411             __func__));
4412
4413         memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
4414         mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
4415         mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
4416         mpi_request.VF_ID = 0; /* TODO */
4417         mpi_request.VP_ID = 0;
4418         mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged);
4419         mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
4420
4421         if (_base_is_controller_msix_enabled(ioc))
4422                 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
4423         mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
4424         mpi_request.ReplyDescriptorPostQueueDepth =
4425             cpu_to_le16(ioc->reply_post_queue_depth);
4426         mpi_request.ReplyFreeQueueDepth =
4427             cpu_to_le16(ioc->reply_free_queue_depth);
4428
4429         mpi_request.SenseBufferAddressHigh =
4430             cpu_to_le32((u64)ioc->sense_dma >> 32);
4431         mpi_request.SystemReplyAddressHigh =
4432             cpu_to_le32((u64)ioc->reply_dma >> 32);
4433         mpi_request.SystemRequestFrameBaseAddress =
4434             cpu_to_le64((u64)ioc->request_dma);
4435         mpi_request.ReplyFreeQueueAddress =
4436             cpu_to_le64((u64)ioc->reply_free_dma);
4437
4438         if (ioc->rdpq_array_enable) {
4439                 reply_post_free_array_sz = ioc->reply_queue_count *
4440                     sizeof(Mpi2IOCInitRDPQArrayEntry);
4441                 reply_post_free_array = pci_alloc_consistent(ioc->pdev,
4442                         reply_post_free_array_sz, &reply_post_free_array_dma);
4443                 if (!reply_post_free_array) {
4444                         pr_err(MPT3SAS_FMT
4445                         "reply_post_free_array: pci_alloc_consistent failed\n",
4446                         ioc->name);
4447                         r = -ENOMEM;
4448                         goto out;
4449                 }
4450                 memset(reply_post_free_array, 0, reply_post_free_array_sz);
4451                 for (i = 0; i < ioc->reply_queue_count; i++)
4452                         reply_post_free_array[i].RDPQBaseAddress =
4453                             cpu_to_le64(
4454                                 (u64)ioc->reply_post[i].reply_post_free_dma);
4455                 mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE;
4456                 mpi_request.ReplyDescriptorPostQueueAddress =
4457                     cpu_to_le64((u64)reply_post_free_array_dma);
4458         } else {
4459                 mpi_request.ReplyDescriptorPostQueueAddress =
4460                     cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma);
4461         }
4462
4463         /* This time stamp specifies number of milliseconds
4464          * since epoch ~ midnight January 1, 1970.
4465          */
4466         current_time = ktime_get_real();
4467         mpi_request.TimeStamp = cpu_to_le64(ktime_to_ms(current_time));
4468
4469         if (ioc->logging_level & MPT_DEBUG_INIT) {
4470                 __le32 *mfp;
4471                 int i;
4472
4473                 mfp = (__le32 *)&mpi_request;
4474                 pr_info("\toffset:data\n");
4475                 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
4476                         pr_info("\t[0x%02x]:%08x\n", i*4,
4477                             le32_to_cpu(mfp[i]));
4478         }
4479
4480         r = _base_handshake_req_reply_wait(ioc,
4481             sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
4482             sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
4483             sleep_flag);
4484
4485         if (r != 0) {
4486                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4487                     ioc->name, __func__, r);
4488                 goto out;
4489         }
4490
4491         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
4492         if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
4493             mpi_reply.IOCLogInfo) {
4494                 pr_err(MPT3SAS_FMT "%s: failed\n", ioc->name, __func__);
4495                 r = -EIO;
4496         }
4497
4498 out:
4499         if (reply_post_free_array)
4500                 pci_free_consistent(ioc->pdev, reply_post_free_array_sz,
4501                                     reply_post_free_array,
4502                                     reply_post_free_array_dma);
4503         return r;
4504 }
4505
4506 /**
4507  * mpt3sas_port_enable_done - command completion routine for port enable
4508  * @ioc: per adapter object
4509  * @smid: system request message index
4510  * @msix_index: MSIX table index supplied by the OS
4511  * @reply: reply message frame(lower 32bit addr)
4512  *
4513  * Return 1 meaning mf should be freed from _base_interrupt
4514  *        0 means the mf is freed from this function.
4515  */
4516 u8
4517 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
4518         u32 reply)
4519 {
4520         MPI2DefaultReply_t *mpi_reply;
4521         u16 ioc_status;
4522
4523         if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED)
4524                 return 1;
4525
4526         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
4527         if (!mpi_reply)
4528                 return 1;
4529
4530         if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE)
4531                 return 1;
4532
4533         ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING;
4534         ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE;
4535         ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID;
4536         memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
4537         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4538         if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
4539                 ioc->port_enable_failed = 1;
4540
4541         if (ioc->is_driver_loading) {
4542                 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
4543                         mpt3sas_port_enable_complete(ioc);
4544                         return 1;
4545                 } else {
4546                         ioc->start_scan_failed = ioc_status;
4547                         ioc->start_scan = 0;
4548                         return 1;
4549                 }
4550         }
4551         complete(&ioc->port_enable_cmds.done);
4552         return 1;
4553 }
4554
4555 /**
4556  * _base_send_port_enable - send port_enable(discovery stuff) to firmware
4557  * @ioc: per adapter object
4558  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4559  *
4560  * Returns 0 for success, non-zero for failure.
4561  */
4562 static int
4563 _base_send_port_enable(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4564 {
4565         Mpi2PortEnableRequest_t *mpi_request;
4566         Mpi2PortEnableReply_t *mpi_reply;
4567         unsigned long timeleft;
4568         int r = 0;
4569         u16 smid;
4570         u16 ioc_status;
4571
4572         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4573
4574         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4575                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4576                     ioc->name, __func__);
4577                 return -EAGAIN;
4578         }
4579
4580         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4581         if (!smid) {
4582                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4583                     ioc->name, __func__);
4584                 return -EAGAIN;
4585         }
4586
4587         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4588         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4589         ioc->port_enable_cmds.smid = smid;
4590         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4591         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4592
4593         init_completion(&ioc->port_enable_cmds.done);
4594         mpt3sas_base_put_smid_default(ioc, smid);
4595         timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
4596             300*HZ);
4597         if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) {
4598                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4599                     ioc->name, __func__);
4600                 _debug_dump_mf(mpi_request,
4601                     sizeof(Mpi2PortEnableRequest_t)/4);
4602                 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET)
4603                         r = -EFAULT;
4604                 else
4605                         r = -ETIME;
4606                 goto out;
4607         }
4608
4609         mpi_reply = ioc->port_enable_cmds.reply;
4610         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4611         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
4612                 pr_err(MPT3SAS_FMT "%s: failed with (ioc_status=0x%08x)\n",
4613                     ioc->name, __func__, ioc_status);
4614                 r = -EFAULT;
4615                 goto out;
4616         }
4617
4618  out:
4619         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
4620         pr_info(MPT3SAS_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
4621             "SUCCESS" : "FAILED"));
4622         return r;
4623 }
4624
4625 /**
4626  * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
4627  * @ioc: per adapter object
4628  *
4629  * Returns 0 for success, non-zero for failure.
4630  */
4631 int
4632 mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc)
4633 {
4634         Mpi2PortEnableRequest_t *mpi_request;
4635         u16 smid;
4636
4637         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4638
4639         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4640                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4641                     ioc->name, __func__);
4642                 return -EAGAIN;
4643         }
4644
4645         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4646         if (!smid) {
4647                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4648                     ioc->name, __func__);
4649                 return -EAGAIN;
4650         }
4651
4652         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4653         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4654         ioc->port_enable_cmds.smid = smid;
4655         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4656         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4657
4658         mpt3sas_base_put_smid_default(ioc, smid);
4659         return 0;
4660 }
4661
4662 /**
4663  * _base_determine_wait_on_discovery - desposition
4664  * @ioc: per adapter object
4665  *
4666  * Decide whether to wait on discovery to complete. Used to either
4667  * locate boot device, or report volumes ahead of physical devices.
4668  *
4669  * Returns 1 for wait, 0 for don't wait
4670  */
4671 static int
4672 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER *ioc)
4673 {
4674         /* We wait for discovery to complete if IR firmware is loaded.
4675          * The sas topology events arrive before PD events, so we need time to
4676          * turn on the bit in ioc->pd_handles to indicate PD
4677          * Also, it maybe required to report Volumes ahead of physical
4678          * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4679          */
4680         if (ioc->ir_firmware)
4681                 return 1;
4682
4683         /* if no Bios, then we don't need to wait */
4684         if (!ioc->bios_pg3.BiosVersion)
4685                 return 0;
4686
4687         /* Bios is present, then we drop down here.
4688          *
4689          * If there any entries in the Bios Page 2, then we wait
4690          * for discovery to complete.
4691          */
4692
4693         /* Current Boot Device */
4694         if ((ioc->bios_pg2.CurrentBootDeviceForm &
4695             MPI2_BIOSPAGE2_FORM_MASK) ==
4696             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4697         /* Request Boot Device */
4698            (ioc->bios_pg2.ReqBootDeviceForm &
4699             MPI2_BIOSPAGE2_FORM_MASK) ==
4700             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4701         /* Alternate Request Boot Device */
4702            (ioc->bios_pg2.ReqAltBootDeviceForm &
4703             MPI2_BIOSPAGE2_FORM_MASK) ==
4704             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
4705                 return 0;
4706
4707         return 1;
4708 }
4709
4710 /**
4711  * _base_unmask_events - turn on notification for this event
4712  * @ioc: per adapter object
4713  * @event: firmware event
4714  *
4715  * The mask is stored in ioc->event_masks.
4716  */
4717 static void
4718 _base_unmask_events(struct MPT3SAS_ADAPTER *ioc, u16 event)
4719 {
4720         u32 desired_event;
4721
4722         if (event >= 128)
4723                 return;
4724
4725         desired_event = (1 << (event % 32));
4726
4727         if (event < 32)
4728                 ioc->event_masks[0] &= ~desired_event;
4729         else if (event < 64)
4730                 ioc->event_masks[1] &= ~desired_event;
4731         else if (event < 96)
4732                 ioc->event_masks[2] &= ~desired_event;
4733         else if (event < 128)
4734                 ioc->event_masks[3] &= ~desired_event;
4735 }
4736
4737 /**
4738  * _base_event_notification - send event notification
4739  * @ioc: per adapter object
4740  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4741  *
4742  * Returns 0 for success, non-zero for failure.
4743  */
4744 static int
4745 _base_event_notification(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4746 {
4747         Mpi2EventNotificationRequest_t *mpi_request;
4748         unsigned long timeleft;
4749         u16 smid;
4750         int r = 0;
4751         int i;
4752
4753         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4754             __func__));
4755
4756         if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
4757                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4758                     ioc->name, __func__);
4759                 return -EAGAIN;
4760         }
4761
4762         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4763         if (!smid) {
4764                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4765                     ioc->name, __func__);
4766                 return -EAGAIN;
4767         }
4768         ioc->base_cmds.status = MPT3_CMD_PENDING;
4769         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4770         ioc->base_cmds.smid = smid;
4771         memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
4772         mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
4773         mpi_request->VF_ID = 0; /* TODO */
4774         mpi_request->VP_ID = 0;
4775         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4776                 mpi_request->EventMasks[i] =
4777                     cpu_to_le32(ioc->event_masks[i]);
4778         init_completion(&ioc->base_cmds.done);
4779         mpt3sas_base_put_smid_default(ioc, smid);
4780         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
4781         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4782                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4783                     ioc->name, __func__);
4784                 _debug_dump_mf(mpi_request,
4785                     sizeof(Mpi2EventNotificationRequest_t)/4);
4786                 if (ioc->base_cmds.status & MPT3_CMD_RESET)
4787                         r = -EFAULT;
4788                 else
4789                         r = -ETIME;
4790         } else
4791                 dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s: complete\n",
4792                     ioc->name, __func__));
4793         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4794         return r;
4795 }
4796
4797 /**
4798  * mpt3sas_base_validate_event_type - validating event types
4799  * @ioc: per adapter object
4800  * @event: firmware event
4801  *
4802  * This will turn on firmware event notification when application
4803  * ask for that event. We don't mask events that are already enabled.
4804  */
4805 void
4806 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, u32 *event_type)
4807 {
4808         int i, j;
4809         u32 event_mask, desired_event;
4810         u8 send_update_to_fw;
4811
4812         for (i = 0, send_update_to_fw = 0; i <
4813             MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
4814                 event_mask = ~event_type[i];
4815                 desired_event = 1;
4816                 for (j = 0; j < 32; j++) {
4817                         if (!(event_mask & desired_event) &&
4818                             (ioc->event_masks[i] & desired_event)) {
4819                                 ioc->event_masks[i] &= ~desired_event;
4820                                 send_update_to_fw = 1;
4821                         }
4822                         desired_event = (desired_event << 1);
4823                 }
4824         }
4825
4826         if (!send_update_to_fw)
4827                 return;
4828
4829         mutex_lock(&ioc->base_cmds.mutex);
4830         _base_event_notification(ioc, CAN_SLEEP);
4831         mutex_unlock(&ioc->base_cmds.mutex);
4832 }
4833
4834 /**
4835  * _base_diag_reset - the "big hammer" start of day reset
4836  * @ioc: per adapter object
4837  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4838  *
4839  * Returns 0 for success, non-zero for failure.
4840  */
4841 static int
4842 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4843 {
4844         u32 host_diagnostic;
4845         u32 ioc_state;
4846         u32 count;
4847         u32 hcb_size;
4848
4849         pr_info(MPT3SAS_FMT "sending diag reset !!\n", ioc->name);
4850
4851         drsprintk(ioc, pr_info(MPT3SAS_FMT "clear interrupts\n",
4852             ioc->name));
4853
4854         count = 0;
4855         do {
4856                 /* Write magic sequence to WriteSequence register
4857                  * Loop until in diagnostic mode
4858                  */
4859                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4860                         "write magic sequence\n", ioc->name));
4861                 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4862                 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
4863                 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
4864                 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
4865                 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
4866                 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
4867                 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
4868
4869                 /* wait 100 msec */
4870                 if (sleep_flag == CAN_SLEEP)
4871                         msleep(100);
4872                 else
4873                         mdelay(100);
4874
4875                 if (count++ > 20)
4876                         goto out;
4877
4878                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4879                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4880                         "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4881                     ioc->name, count, host_diagnostic));
4882
4883         } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
4884
4885         hcb_size = readl(&ioc->chip->HCBSize);
4886
4887         drsprintk(ioc, pr_info(MPT3SAS_FMT "diag reset: issued\n",
4888             ioc->name));
4889         writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
4890              &ioc->chip->HostDiagnostic);
4891
4892         /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4893         if (sleep_flag == CAN_SLEEP)
4894                 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4895         else
4896                 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4897
4898         /* Approximately 300 second max wait */
4899         for (count = 0; count < (300000000 /
4900                 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
4901
4902                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4903
4904                 if (host_diagnostic == 0xFFFFFFFF)
4905                         goto out;
4906                 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
4907                         break;
4908
4909                 /* Wait to pass the second read delay window */
4910                 if (sleep_flag == CAN_SLEEP)
4911                         msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4912                                                                 / 1000);
4913                 else
4914                         mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4915                                                                 / 1000);
4916         }
4917
4918         if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
4919
4920                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4921                 "restart the adapter assuming the HCB Address points to good F/W\n",
4922                     ioc->name));
4923                 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
4924                 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
4925                 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
4926
4927                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4928                     "re-enable the HCDW\n", ioc->name));
4929                 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
4930                     &ioc->chip->HCBSize);
4931         }
4932
4933         drsprintk(ioc, pr_info(MPT3SAS_FMT "restart the adapter\n",
4934             ioc->name));
4935         writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
4936             &ioc->chip->HostDiagnostic);
4937
4938         drsprintk(ioc, pr_info(MPT3SAS_FMT
4939                 "disable writes to the diagnostic register\n", ioc->name));
4940         writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4941
4942         drsprintk(ioc, pr_info(MPT3SAS_FMT
4943                 "Wait for FW to go to the READY state\n", ioc->name));
4944         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
4945             sleep_flag);
4946         if (ioc_state) {
4947                 pr_err(MPT3SAS_FMT
4948                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4949                         ioc->name, __func__, ioc_state);
4950                 goto out;
4951         }
4952
4953         pr_info(MPT3SAS_FMT "diag reset: SUCCESS\n", ioc->name);
4954         return 0;
4955
4956  out:
4957         pr_err(MPT3SAS_FMT "diag reset: FAILED\n", ioc->name);
4958         return -EFAULT;
4959 }
4960
4961 /**
4962  * _base_make_ioc_ready - put controller in READY state
4963  * @ioc: per adapter object
4964  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4965  * @type: FORCE_BIG_HAMMER or SOFT_RESET
4966  *
4967  * Returns 0 for success, non-zero for failure.
4968  */
4969 static int
4970 _base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
4971         enum reset_type type)
4972 {
4973         u32 ioc_state;
4974         int rc;
4975         int count;
4976
4977         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4978             __func__));
4979
4980         if (ioc->pci_error_recovery)
4981                 return 0;
4982
4983         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4984         dhsprintk(ioc, pr_info(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4985             ioc->name, __func__, ioc_state));
4986
4987         /* if in RESET state, it should move to READY state shortly */
4988         count = 0;
4989         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_RESET) {
4990                 while ((ioc_state & MPI2_IOC_STATE_MASK) !=
4991                     MPI2_IOC_STATE_READY) {
4992                         if (count++ == 10) {
4993                                 pr_err(MPT3SAS_FMT
4994                                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4995                                     ioc->name, __func__, ioc_state);
4996                                 return -EFAULT;
4997                         }
4998                         if (sleep_flag == CAN_SLEEP)
4999                                 ssleep(1);
5000                         else
5001                                 mdelay(1000);
5002                         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5003                 }
5004         }
5005
5006         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
5007                 return 0;
5008
5009         if (ioc_state & MPI2_DOORBELL_USED) {
5010                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
5011                         "unexpected doorbell active!\n",
5012                         ioc->name));
5013                 goto issue_diag_reset;
5014         }
5015
5016         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
5017                 mpt3sas_base_fault_info(ioc, ioc_state &
5018                     MPI2_DOORBELL_DATA_MASK);
5019                 goto issue_diag_reset;
5020         }
5021
5022         if (type == FORCE_BIG_HAMMER)
5023                 goto issue_diag_reset;
5024
5025         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
5026                 if (!(_base_send_ioc_reset(ioc,
5027                     MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
5028                         return 0;
5029         }
5030
5031  issue_diag_reset:
5032         rc = _base_diag_reset(ioc, CAN_SLEEP);
5033         return rc;
5034 }
5035
5036 /**
5037  * _base_make_ioc_operational - put controller in OPERATIONAL state
5038  * @ioc: per adapter object
5039  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5040  *
5041  * Returns 0 for success, non-zero for failure.
5042  */
5043 static int
5044 _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
5045 {
5046         int r, i, index;
5047         unsigned long   flags;
5048         u32 reply_address;
5049         u16 smid;
5050         struct _tr_list *delayed_tr, *delayed_tr_next;
5051         struct _sc_list *delayed_sc, *delayed_sc_next;
5052         struct _event_ack_list *delayed_event_ack, *delayed_event_ack_next;
5053         u8 hide_flag;
5054         struct adapter_reply_queue *reply_q;
5055         Mpi2ReplyDescriptorsUnion_t *reply_post_free_contig;
5056
5057         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5058             __func__));
5059
5060         /* clean the delayed target reset list */
5061         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
5062             &ioc->delayed_tr_list, list) {
5063                 list_del(&delayed_tr->list);
5064                 kfree(delayed_tr);
5065         }
5066
5067
5068         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
5069             &ioc->delayed_tr_volume_list, list) {
5070                 list_del(&delayed_tr->list);
5071                 kfree(delayed_tr);
5072         }
5073
5074         list_for_each_entry_safe(delayed_sc, delayed_sc_next,
5075             &ioc->delayed_sc_list, list) {
5076                 list_del(&delayed_sc->list);
5077                 kfree(delayed_sc);
5078         }
5079
5080         list_for_each_entry_safe(delayed_event_ack, delayed_event_ack_next,
5081             &ioc->delayed_event_ack_list, list) {
5082                 list_del(&delayed_event_ack->list);
5083                 kfree(delayed_event_ack);
5084         }
5085
5086         /* initialize the scsi lookup free list */
5087         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5088         INIT_LIST_HEAD(&ioc->free_list);
5089         smid = 1;
5090         for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
5091                 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
5092                 ioc->scsi_lookup[i].cb_idx = 0xFF;
5093                 ioc->scsi_lookup[i].smid = smid;
5094                 ioc->scsi_lookup[i].scmd = NULL;
5095                 ioc->scsi_lookup[i].direct_io = 0;
5096                 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
5097                     &ioc->free_list);
5098         }
5099
5100         /* hi-priority queue */
5101         INIT_LIST_HEAD(&ioc->hpr_free_list);
5102         smid = ioc->hi_priority_smid;
5103         for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
5104                 ioc->hpr_lookup[i].cb_idx = 0xFF;
5105                 ioc->hpr_lookup[i].smid = smid;
5106                 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
5107                     &ioc->hpr_free_list);
5108         }
5109
5110         /* internal queue */
5111         INIT_LIST_HEAD(&ioc->internal_free_list);
5112         smid = ioc->internal_smid;
5113         for (i = 0; i < ioc->internal_depth; i++, smid++) {
5114                 ioc->internal_lookup[i].cb_idx = 0xFF;
5115                 ioc->internal_lookup[i].smid = smid;
5116                 list_add_tail(&ioc->internal_lookup[i].tracker_list,
5117                     &ioc->internal_free_list);
5118         }
5119
5120         /* chain pool */
5121         INIT_LIST_HEAD(&ioc->free_chain_list);
5122         for (i = 0; i < ioc->chain_depth; i++)
5123                 list_add_tail(&ioc->chain_lookup[i].tracker_list,
5124                     &ioc->free_chain_list);
5125
5126         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5127
5128         /* initialize Reply Free Queue */
5129         for (i = 0, reply_address = (u32)ioc->reply_dma ;
5130             i < ioc->reply_free_queue_depth ; i++, reply_address +=
5131             ioc->reply_sz)
5132                 ioc->reply_free[i] = cpu_to_le32(reply_address);
5133
5134         /* initialize reply queues */
5135         if (ioc->is_driver_loading)
5136                 _base_assign_reply_queues(ioc);
5137
5138         /* initialize Reply Post Free Queue */
5139         index = 0;
5140         reply_post_free_contig = ioc->reply_post[0].reply_post_free;
5141         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5142                 /*
5143                  * If RDPQ is enabled, switch to the next allocation.
5144                  * Otherwise advance within the contiguous region.
5145                  */
5146                 if (ioc->rdpq_array_enable) {
5147                         reply_q->reply_post_free =
5148                                 ioc->reply_post[index++].reply_post_free;
5149                 } else {
5150                         reply_q->reply_post_free = reply_post_free_contig;
5151                         reply_post_free_contig += ioc->reply_post_queue_depth;
5152                 }
5153
5154                 reply_q->reply_post_host_index = 0;
5155                 for (i = 0; i < ioc->reply_post_queue_depth; i++)
5156                         reply_q->reply_post_free[i].Words =
5157                             cpu_to_le64(ULLONG_MAX);
5158                 if (!_base_is_controller_msix_enabled(ioc))
5159                         goto skip_init_reply_post_free_queue;
5160         }
5161  skip_init_reply_post_free_queue:
5162
5163         r = _base_send_ioc_init(ioc, sleep_flag);
5164         if (r)
5165                 return r;
5166
5167         /* initialize reply free host index */
5168         ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
5169         writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
5170
5171         /* initialize reply post host index */
5172         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
5173                 if (ioc->msix96_vector)
5174                         writel((reply_q->msix_index & 7)<<
5175                            MPI2_RPHI_MSIX_INDEX_SHIFT,
5176                            ioc->replyPostRegisterIndex[reply_q->msix_index/8]);
5177                 else
5178                         writel(reply_q->msix_index <<
5179                                 MPI2_RPHI_MSIX_INDEX_SHIFT,
5180                                 &ioc->chip->ReplyPostHostIndex);
5181
5182                 if (!_base_is_controller_msix_enabled(ioc))
5183                         goto skip_init_reply_post_host_index;
5184         }
5185
5186  skip_init_reply_post_host_index:
5187
5188         _base_unmask_interrupts(ioc);
5189         r = _base_event_notification(ioc, sleep_flag);
5190         if (r)
5191                 return r;
5192
5193         if (sleep_flag == CAN_SLEEP)
5194                 _base_static_config_pages(ioc);
5195
5196
5197         if (ioc->is_driver_loading) {
5198
5199                 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
5200                     == 0x80) {
5201                         hide_flag = (u8) (
5202                             le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
5203                             MFG_PAGE10_HIDE_SSDS_MASK);
5204                         if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
5205                                 ioc->mfg_pg10_hide_flag = hide_flag;
5206                 }
5207
5208                 ioc->wait_for_discovery_to_complete =
5209                     _base_determine_wait_on_discovery(ioc);
5210
5211                 return r; /* scan_start and scan_finished support */
5212         }
5213
5214         r = _base_send_port_enable(ioc, sleep_flag);
5215         if (r)
5216                 return r;
5217
5218         return r;
5219 }
5220
5221 /**
5222  * mpt3sas_base_free_resources - free resources controller resources
5223  * @ioc: per adapter object
5224  *
5225  * Return nothing.
5226  */
5227 void
5228 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc)
5229 {
5230         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5231             __func__));
5232
5233         /* synchronizing freeing resource with pci_access_mutex lock */
5234         mutex_lock(&ioc->pci_access_mutex);
5235         if (ioc->chip_phys && ioc->chip) {
5236                 _base_mask_interrupts(ioc);
5237                 ioc->shost_recovery = 1;
5238                 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5239                 ioc->shost_recovery = 0;
5240         }
5241
5242         mpt3sas_base_unmap_resources(ioc);
5243         mutex_unlock(&ioc->pci_access_mutex);
5244         return;
5245 }
5246
5247 /**
5248  * mpt3sas_base_attach - attach controller instance
5249  * @ioc: per adapter object
5250  *
5251  * Returns 0 for success, non-zero for failure.
5252  */
5253 int
5254 mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
5255 {
5256         int r, i;
5257         int cpu_id, last_cpu_id = 0;
5258
5259         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5260             __func__));
5261
5262         /* setup cpu_msix_table */
5263         ioc->cpu_count = num_online_cpus();
5264         for_each_online_cpu(cpu_id)
5265                 last_cpu_id = cpu_id;
5266         ioc->cpu_msix_table_sz = last_cpu_id + 1;
5267         ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
5268         ioc->reply_queue_count = 1;
5269         if (!ioc->cpu_msix_table) {
5270                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
5271                         "allocation for cpu_msix_table failed!!!\n",
5272                         ioc->name));
5273                 r = -ENOMEM;
5274                 goto out_free_resources;
5275         }
5276
5277         if (ioc->is_warpdrive) {
5278                 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
5279                     sizeof(resource_size_t *), GFP_KERNEL);
5280                 if (!ioc->reply_post_host_index) {
5281                         dfailprintk(ioc, pr_info(MPT3SAS_FMT "allocation "
5282                                 "for cpu_msix_table failed!!!\n", ioc->name));
5283                         r = -ENOMEM;
5284                         goto out_free_resources;
5285                 }
5286         }
5287
5288         ioc->rdpq_array_enable_assigned = 0;
5289         ioc->dma_mask = 0;
5290         r = mpt3sas_base_map_resources(ioc);
5291         if (r)
5292                 goto out_free_resources;
5293
5294         pci_set_drvdata(ioc->pdev, ioc->shost);
5295         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5296         if (r)
5297                 goto out_free_resources;
5298
5299         switch (ioc->hba_mpi_version_belonged) {
5300         case MPI2_VERSION:
5301                 ioc->build_sg_scmd = &_base_build_sg_scmd;
5302                 ioc->build_sg = &_base_build_sg;
5303                 ioc->build_zero_len_sge = &_base_build_zero_len_sge;
5304                 break;
5305         case MPI25_VERSION:
5306         case MPI26_VERSION:
5307                 /*
5308                  * In SAS3.0,
5309                  * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
5310                  * Target Status - all require the IEEE formated scatter gather
5311                  * elements.
5312                  */
5313                 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee;
5314                 ioc->build_sg = &_base_build_sg_ieee;
5315                 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee;
5316                 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t);
5317                 break;
5318         }
5319
5320         /*
5321          * These function pointers for other requests that don't
5322          * the require IEEE scatter gather elements.
5323          *
5324          * For example Configuration Pages and SAS IOUNIT Control don't.
5325          */
5326         ioc->build_sg_mpi = &_base_build_sg;
5327         ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge;
5328
5329         r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5330         if (r)
5331                 goto out_free_resources;
5332
5333         ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
5334             sizeof(struct mpt3sas_port_facts), GFP_KERNEL);
5335         if (!ioc->pfacts) {
5336                 r = -ENOMEM;
5337                 goto out_free_resources;
5338         }
5339
5340         for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
5341                 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
5342                 if (r)
5343                         goto out_free_resources;
5344         }
5345
5346         r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
5347         if (r)
5348                 goto out_free_resources;
5349
5350         init_waitqueue_head(&ioc->reset_wq);
5351
5352         /* allocate memory pd handle bitmask list */
5353         ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
5354         if (ioc->facts.MaxDevHandle % 8)
5355                 ioc->pd_handles_sz++;
5356         ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
5357             GFP_KERNEL);
5358         if (!ioc->pd_handles) {
5359                 r = -ENOMEM;
5360                 goto out_free_resources;
5361         }
5362         ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
5363             GFP_KERNEL);
5364         if (!ioc->blocking_handles) {
5365                 r = -ENOMEM;
5366                 goto out_free_resources;
5367         }
5368
5369         ioc->fwfault_debug = mpt3sas_fwfault_debug;
5370
5371         /* base internal command bits */
5372         mutex_init(&ioc->base_cmds.mutex);
5373         ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5374         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
5375
5376         /* port_enable command bits */
5377         ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5378         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
5379
5380         /* transport internal command bits */
5381         ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5382         ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
5383         mutex_init(&ioc->transport_cmds.mutex);
5384
5385         /* scsih internal command bits */
5386         ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5387         ioc->scsih_cmds.status = MPT3_CMD_NOT_USED;
5388         mutex_init(&ioc->scsih_cmds.mutex);
5389
5390         /* task management internal command bits */
5391         ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5392         ioc->tm_cmds.status = MPT3_CMD_NOT_USED;
5393         mutex_init(&ioc->tm_cmds.mutex);
5394
5395         /* config page internal command bits */
5396         ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5397         ioc->config_cmds.status = MPT3_CMD_NOT_USED;
5398         mutex_init(&ioc->config_cmds.mutex);
5399
5400         /* ctl module internal command bits */
5401         ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5402         ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
5403         ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
5404         mutex_init(&ioc->ctl_cmds.mutex);
5405
5406         if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
5407             !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
5408             !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
5409             !ioc->ctl_cmds.sense) {
5410                 r = -ENOMEM;
5411                 goto out_free_resources;
5412         }
5413
5414         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
5415                 ioc->event_masks[i] = -1;
5416
5417         /* here we enable the events we care about */
5418         _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
5419         _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
5420         _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
5421         _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
5422         _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
5423         _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
5424         _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
5425         _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
5426         _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
5427         _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
5428         _base_unmask_events(ioc, MPI2_EVENT_TEMP_THRESHOLD);
5429         if (ioc->hba_mpi_version_belonged == MPI26_VERSION)
5430                 _base_unmask_events(ioc, MPI2_EVENT_ACTIVE_CABLE_EXCEPTION);
5431
5432         r = _base_make_ioc_operational(ioc, CAN_SLEEP);
5433         if (r)
5434                 goto out_free_resources;
5435
5436         ioc->non_operational_loop = 0;
5437         return 0;
5438
5439  out_free_resources:
5440
5441         ioc->remove_host = 1;
5442
5443         mpt3sas_base_free_resources(ioc);
5444         _base_release_memory_pools(ioc);
5445         pci_set_drvdata(ioc->pdev, NULL);
5446         kfree(ioc->cpu_msix_table);
5447         if (ioc->is_warpdrive)
5448                 kfree(ioc->reply_post_host_index);
5449         kfree(ioc->pd_handles);
5450         kfree(ioc->blocking_handles);
5451         kfree(ioc->tm_cmds.reply);
5452         kfree(ioc->transport_cmds.reply);
5453         kfree(ioc->scsih_cmds.reply);
5454         kfree(ioc->config_cmds.reply);
5455         kfree(ioc->base_cmds.reply);
5456         kfree(ioc->port_enable_cmds.reply);
5457         kfree(ioc->ctl_cmds.reply);
5458         kfree(ioc->ctl_cmds.sense);
5459         kfree(ioc->pfacts);
5460         ioc->ctl_cmds.reply = NULL;
5461         ioc->base_cmds.reply = NULL;
5462         ioc->tm_cmds.reply = NULL;
5463         ioc->scsih_cmds.reply = NULL;
5464         ioc->transport_cmds.reply = NULL;
5465         ioc->config_cmds.reply = NULL;
5466         ioc->pfacts = NULL;
5467         return r;
5468 }
5469
5470
5471 /**
5472  * mpt3sas_base_detach - remove controller instance
5473  * @ioc: per adapter object
5474  *
5475  * Return nothing.
5476  */
5477 void
5478 mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc)
5479 {
5480         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5481             __func__));
5482
5483         mpt3sas_base_stop_watchdog(ioc);
5484         mpt3sas_base_free_resources(ioc);
5485         _base_release_memory_pools(ioc);
5486         pci_set_drvdata(ioc->pdev, NULL);
5487         kfree(ioc->cpu_msix_table);
5488         if (ioc->is_warpdrive)
5489                 kfree(ioc->reply_post_host_index);
5490         kfree(ioc->pd_handles);
5491         kfree(ioc->blocking_handles);
5492         kfree(ioc->pfacts);
5493         kfree(ioc->ctl_cmds.reply);
5494         kfree(ioc->ctl_cmds.sense);
5495         kfree(ioc->base_cmds.reply);
5496         kfree(ioc->port_enable_cmds.reply);
5497         kfree(ioc->tm_cmds.reply);
5498         kfree(ioc->transport_cmds.reply);
5499         kfree(ioc->scsih_cmds.reply);
5500         kfree(ioc->config_cmds.reply);
5501 }
5502
5503 /**
5504  * _base_reset_handler - reset callback handler (for base)
5505  * @ioc: per adapter object
5506  * @reset_phase: phase
5507  *
5508  * The handler for doing any required cleanup or initialization.
5509  *
5510  * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
5511  * MPT3_IOC_DONE_RESET
5512  *
5513  * Return nothing.
5514  */
5515 static void
5516 _base_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase)
5517 {
5518         mpt3sas_scsih_reset_handler(ioc, reset_phase);
5519         mpt3sas_ctl_reset_handler(ioc, reset_phase);
5520         switch (reset_phase) {
5521         case MPT3_IOC_PRE_RESET:
5522                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5523                 "%s: MPT3_IOC_PRE_RESET\n", ioc->name, __func__));
5524                 break;
5525         case MPT3_IOC_AFTER_RESET:
5526                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5527                 "%s: MPT3_IOC_AFTER_RESET\n", ioc->name, __func__));
5528                 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) {
5529                         ioc->transport_cmds.status |= MPT3_CMD_RESET;
5530                         mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid);
5531                         complete(&ioc->transport_cmds.done);
5532                 }
5533                 if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
5534                         ioc->base_cmds.status |= MPT3_CMD_RESET;
5535                         mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid);
5536                         complete(&ioc->base_cmds.done);
5537                 }
5538                 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
5539                         ioc->port_enable_failed = 1;
5540                         ioc->port_enable_cmds.status |= MPT3_CMD_RESET;
5541                         mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
5542                         if (ioc->is_driver_loading) {
5543                                 ioc->start_scan_failed =
5544                                     MPI2_IOCSTATUS_INTERNAL_ERROR;
5545                                 ioc->start_scan = 0;
5546                                 ioc->port_enable_cmds.status =
5547                                     MPT3_CMD_NOT_USED;
5548                         } else
5549                                 complete(&ioc->port_enable_cmds.done);
5550                 }
5551                 if (ioc->config_cmds.status & MPT3_CMD_PENDING) {
5552                         ioc->config_cmds.status |= MPT3_CMD_RESET;
5553                         mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid);
5554                         ioc->config_cmds.smid = USHRT_MAX;
5555                         complete(&ioc->config_cmds.done);
5556                 }
5557                 break;
5558         case MPT3_IOC_DONE_RESET:
5559                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5560                         "%s: MPT3_IOC_DONE_RESET\n", ioc->name, __func__));
5561                 break;
5562         }
5563 }
5564
5565 /**
5566  * _wait_for_commands_to_complete - reset controller
5567  * @ioc: Pointer to MPT_ADAPTER structure
5568  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5569  *
5570  * This function waiting(3s) for all pending commands to complete
5571  * prior to putting controller in reset.
5572  */
5573 static void
5574 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
5575 {
5576         u32 ioc_state;
5577         unsigned long flags;
5578         u16 i;
5579
5580         ioc->pending_io_count = 0;
5581         if (sleep_flag != CAN_SLEEP)
5582                 return;
5583
5584         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5585         if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
5586                 return;
5587
5588         /* pending command count */
5589         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5590         for (i = 0; i < ioc->scsiio_depth; i++)
5591                 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
5592                         ioc->pending_io_count++;
5593         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5594
5595         if (!ioc->pending_io_count)
5596                 return;
5597
5598         /* wait for pending commands to complete */
5599         wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
5600 }
5601
5602 /**
5603  * mpt3sas_base_hard_reset_handler - reset controller
5604  * @ioc: Pointer to MPT_ADAPTER structure
5605  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5606  * @type: FORCE_BIG_HAMMER or SOFT_RESET
5607  *
5608  * Returns 0 for success, non-zero for failure.
5609  */
5610 int
5611 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
5612         enum reset_type type)
5613 {
5614         int r;
5615         unsigned long flags;
5616         u32 ioc_state;
5617         u8 is_fault = 0, is_trigger = 0;
5618
5619         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
5620             __func__));
5621
5622         if (ioc->pci_error_recovery) {
5623                 pr_err(MPT3SAS_FMT "%s: pci error recovery reset\n",
5624                     ioc->name, __func__);
5625                 r = 0;
5626                 goto out_unlocked;
5627         }
5628
5629         if (mpt3sas_fwfault_debug)
5630                 mpt3sas_halt_firmware(ioc);
5631
5632         /* TODO - What we really should be doing is pulling
5633          * out all the code associated with NO_SLEEP; its never used.
5634          * That is legacy code from mpt fusion driver, ported over.
5635          * I will leave this BUG_ON here for now till its been resolved.
5636          */
5637         BUG_ON(sleep_flag == NO_SLEEP);
5638
5639         /* wait for an active reset in progress to complete */
5640         if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
5641                 do {
5642                         ssleep(1);
5643                 } while (ioc->shost_recovery == 1);
5644                 dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5645                     __func__));
5646                 return ioc->ioc_reset_in_progress_status;
5647         }
5648
5649         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5650         ioc->shost_recovery = 1;
5651         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5652
5653         if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5654             MPT3_DIAG_BUFFER_IS_REGISTERED) &&
5655             (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5656             MPT3_DIAG_BUFFER_IS_RELEASED))) {
5657                 is_trigger = 1;
5658                 ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5659                 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
5660                         is_fault = 1;
5661         }
5662         _base_reset_handler(ioc, MPT3_IOC_PRE_RESET);
5663         _wait_for_commands_to_complete(ioc, sleep_flag);
5664         _base_mask_interrupts(ioc);
5665         r = _base_make_ioc_ready(ioc, sleep_flag, type);
5666         if (r)
5667                 goto out;
5668         _base_reset_handler(ioc, MPT3_IOC_AFTER_RESET);
5669
5670         /* If this hard reset is called while port enable is active, then
5671          * there is no reason to call make_ioc_operational
5672          */
5673         if (ioc->is_driver_loading && ioc->port_enable_failed) {
5674                 ioc->remove_host = 1;
5675                 r = -EFAULT;
5676                 goto out;
5677         }
5678         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5679         if (r)
5680                 goto out;
5681
5682         if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable)
5683                 panic("%s: Issue occurred with flashing controller firmware."
5684                       "Please reboot the system and ensure that the correct"
5685                       " firmware version is running\n", ioc->name);
5686
5687         r = _base_make_ioc_operational(ioc, sleep_flag);
5688         if (!r)
5689                 _base_reset_handler(ioc, MPT3_IOC_DONE_RESET);
5690
5691  out:
5692         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: %s\n",
5693             ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
5694
5695         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5696         ioc->ioc_reset_in_progress_status = r;
5697         ioc->shost_recovery = 0;
5698         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5699         ioc->ioc_reset_count++;
5700         mutex_unlock(&ioc->reset_in_progress_mutex);
5701
5702  out_unlocked:
5703         if ((r == 0) && is_trigger) {
5704                 if (is_fault)
5705                         mpt3sas_trigger_master(ioc, MASTER_TRIGGER_FW_FAULT);
5706                 else
5707                         mpt3sas_trigger_master(ioc,
5708                             MASTER_TRIGGER_ADAPTER_RESET);
5709         }
5710         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5711             __func__));
5712         return r;
5713 }