drivers/soc/mediatek/mtk-scpsys.c

   1 /*
   2  * Copyright (c) 2015 Pengutronix, Sascha Hauer <kernel@pengutronix.de>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13 #include <linux/clk.h>
  14 #include <linux/delay.h>
  15 #include <linux/io.h>
  16 #include <linux/kernel.h>
  17 #include <linux/mfd/syscon.h>
  18 #include <linux/init.h>
  19 #include <linux/of_device.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/pm_domain.h>
  22 #include <linux/regmap.h>
  23 #include <linux/soc/mediatek/infracfg.h>
  24 #include <linux/regulator/consumer.h>
  25 #include <dt-bindings/power/mt8173-power.h>
  26
  27 #define SPM_VDE_PWR_CON                 0x0210
  28 #define SPM_MFG_PWR_CON                 0x0214
  29 #define SPM_VEN_PWR_CON                 0x0230
  30 #define SPM_ISP_PWR_CON                 0x0238
  31 #define SPM_DIS_PWR_CON                 0x023c
  32 #define SPM_VEN2_PWR_CON                0x0298
  33 #define SPM_AUDIO_PWR_CON               0x029c
  34 #define SPM_MFG_2D_PWR_CON              0x02c0
  35 #define SPM_MFG_ASYNC_PWR_CON           0x02c4
  36 #define SPM_USB_PWR_CON                 0x02cc
  37 #define SPM_PWR_STATUS                  0x060c
  38 #define SPM_PWR_STATUS_2ND              0x0610
  39
  40 #define PWR_RST_B_BIT                   BIT(0)
  41 #define PWR_ISO_BIT                     BIT(1)
  42 #define PWR_ON_BIT                      BIT(2)
  43 #define PWR_ON_2ND_BIT                  BIT(3)
  44 #define PWR_CLK_DIS_BIT                 BIT(4)
  45
  46 #define PWR_STATUS_DISP                 BIT(3)
  47 #define PWR_STATUS_MFG                  BIT(4)
  48 #define PWR_STATUS_ISP                  BIT(5)
  49 #define PWR_STATUS_VDEC                 BIT(7)
  50 #define PWR_STATUS_VENC_LT              BIT(20)
  51 #define PWR_STATUS_VENC                 BIT(21)
  52 #define PWR_STATUS_MFG_2D               BIT(22)
  53 #define PWR_STATUS_MFG_ASYNC            BIT(23)
  54 #define PWR_STATUS_AUDIO                BIT(24)
  55 #define PWR_STATUS_USB                  BIT(25)
  56
  57 enum clk_id {
  58         MT8173_CLK_NONE,
  59         MT8173_CLK_MM,
  60         MT8173_CLK_MFG,
  61         MT8173_CLK_VENC,
  62         MT8173_CLK_VENC_LT,
  63         MT8173_CLK_MAX,
  64 };
  65
  66 #define MAX_CLKS        2
  67
  68 struct scp_domain_data {
  69         const char *name;
  70         u32 sta_mask;
  71         int ctl_offs;
  72         u32 sram_pdn_bits;
  73         u32 sram_pdn_ack_bits;
  74         u32 bus_prot_mask;
  75         enum clk_id clk_id[MAX_CLKS];
  76         bool active_wakeup;
  77 };
  78
  79 static const struct scp_domain_data scp_domain_data[] __initconst = {
  80         [MT8173_POWER_DOMAIN_VDEC] = {
  81                 .name = "vdec",
  82                 .sta_mask = PWR_STATUS_VDEC,
  83                 .ctl_offs = SPM_VDE_PWR_CON,
  84                 .sram_pdn_bits = GENMASK(11, 8),
  85                 .sram_pdn_ack_bits = GENMASK(12, 12),
  86                 .clk_id = {MT8173_CLK_MM},
  87         },
  88         [MT8173_POWER_DOMAIN_VENC] = {
  89                 .name = "venc",
  90                 .sta_mask = PWR_STATUS_VENC,
  91                 .ctl_offs = SPM_VEN_PWR_CON,
  92                 .sram_pdn_bits = GENMASK(11, 8),
  93                 .sram_pdn_ack_bits = GENMASK(15, 12),
  94                 .clk_id = {MT8173_CLK_MM, MT8173_CLK_VENC},
  95         },
  96         [MT8173_POWER_DOMAIN_ISP] = {
  97                 .name = "isp",
  98                 .sta_mask = PWR_STATUS_ISP,
  99                 .ctl_offs = SPM_ISP_PWR_CON,
 100                 .sram_pdn_bits = GENMASK(11, 8),
 101                 .sram_pdn_ack_bits = GENMASK(13, 12),
 102                 .clk_id = {MT8173_CLK_MM},
 103         },
 104         [MT8173_POWER_DOMAIN_MM] = {
 105                 .name = "mm",
 106                 .sta_mask = PWR_STATUS_DISP,
 107                 .ctl_offs = SPM_DIS_PWR_CON,
 108                 .sram_pdn_bits = GENMASK(11, 8),
 109                 .sram_pdn_ack_bits = GENMASK(12, 12),
 110                 .clk_id = {MT8173_CLK_MM},
 111                 .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 |
 112                         MT8173_TOP_AXI_PROT_EN_MM_M1,
 113         },
 114         [MT8173_POWER_DOMAIN_VENC_LT] = {
 115                 .name = "venc_lt",
 116                 .sta_mask = PWR_STATUS_VENC_LT,
 117                 .ctl_offs = SPM_VEN2_PWR_CON,
 118                 .sram_pdn_bits = GENMASK(11, 8),
 119                 .sram_pdn_ack_bits = GENMASK(15, 12),
 120                 .clk_id = {MT8173_CLK_MM, MT8173_CLK_VENC_LT},
 121         },
 122         [MT8173_POWER_DOMAIN_AUDIO] = {
 123                 .name = "audio",
 124                 .sta_mask = PWR_STATUS_AUDIO,
 125                 .ctl_offs = SPM_AUDIO_PWR_CON,
 126                 .sram_pdn_bits = GENMASK(11, 8),
 127                 .sram_pdn_ack_bits = GENMASK(15, 12),
 128                 .clk_id = {MT8173_CLK_NONE},
 129         },
 130         [MT8173_POWER_DOMAIN_USB] = {
 131                 .name = "usb",
 132                 .sta_mask = PWR_STATUS_USB,
 133                 .ctl_offs = SPM_USB_PWR_CON,
 134                 .sram_pdn_bits = GENMASK(11, 8),
 135                 .sram_pdn_ack_bits = GENMASK(15, 12),
 136                 .clk_id = {MT8173_CLK_NONE},
 137                 .active_wakeup = true,
 138         },
 139         [MT8173_POWER_DOMAIN_MFG_ASYNC] = {
 140                 .name = "mfg_async",
 141                 .sta_mask = PWR_STATUS_MFG_ASYNC,
 142                 .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
 143                 .sram_pdn_bits = GENMASK(11, 8),
 144                 .sram_pdn_ack_bits = 0,
 145                 .clk_id = {MT8173_CLK_MFG},
 146         },
 147         [MT8173_POWER_DOMAIN_MFG_2D] = {
 148                 .name = "mfg_2d",
 149                 .sta_mask = PWR_STATUS_MFG_2D,
 150                 .ctl_offs = SPM_MFG_2D_PWR_CON,
 151                 .sram_pdn_bits = GENMASK(11, 8),
 152                 .sram_pdn_ack_bits = GENMASK(13, 12),
 153                 .clk_id = {MT8173_CLK_NONE},
 154         },
 155         [MT8173_POWER_DOMAIN_MFG] = {
 156                 .name = "mfg",
 157                 .sta_mask = PWR_STATUS_MFG,
 158                 .ctl_offs = SPM_MFG_PWR_CON,
 159                 .sram_pdn_bits = GENMASK(13, 8),
 160                 .sram_pdn_ack_bits = GENMASK(21, 16),
 161                 .clk_id = {MT8173_CLK_NONE},
 162                 .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S |
 163                         MT8173_TOP_AXI_PROT_EN_MFG_M0 |
 164                         MT8173_TOP_AXI_PROT_EN_MFG_M1 |
 165                         MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT,
 166         },
 167 };
 168
 169 #define NUM_DOMAINS     ARRAY_SIZE(scp_domain_data)
 170
 171 struct scp;
 172
 173 struct scp_domain {
 174         struct generic_pm_domain genpd;
 175         struct scp *scp;
 176         struct clk *clk[MAX_CLKS];
 177         u32 sta_mask;
 178         void __iomem *ctl_addr;
 179         u32 sram_pdn_bits;
 180         u32 sram_pdn_ack_bits;
 181         u32 bus_prot_mask;
 182         bool active_wakeup;
 183         struct regulator *supply;
 184 };
 185
 186 struct scp {
 187         struct scp_domain domains[NUM_DOMAINS];
 188         struct genpd_onecell_data pd_data;
 189         struct device *dev;
 190         void __iomem *base;
 191         struct regmap *infracfg;
 192 };
 193
 194 static int scpsys_domain_is_on(struct scp_domain *scpd)
 195 {
 196         struct scp *scp = scpd->scp;
 197
 198         u32 status = readl(scp->base + SPM_PWR_STATUS) & scpd->sta_mask;
 199         u32 status2 = readl(scp->base + SPM_PWR_STATUS_2ND) & scpd->sta_mask;
 200
 201         /*
 202          * A domain is on when both status bits are set. If only one is set
 203          * return an error. This happens while powering up a domain
 204          */
 205
 206         if (status && status2)
 207                 return true;
 208         if (!status && !status2)
 209                 return false;
 210
 211         return -EINVAL;
 212 }
 213
 214 static int scpsys_power_on(struct generic_pm_domain *genpd)
 215 {
 216         struct scp_domain *scpd = container_of(genpd, struct scp_domain, genpd);
 217         struct scp *scp = scpd->scp;
 218         unsigned long timeout;
 219         bool expired;
 220         void __iomem *ctl_addr = scpd->ctl_addr;
 221         u32 sram_pdn_ack = scpd->sram_pdn_ack_bits;
 222         u32 val;
 223         int ret;
 224         int i;
 225
 226         if (scpd->supply) {
 227                 ret = regulator_enable(scpd->supply);
 228                 if (ret)
 229                         return ret;
 230         }
 231
 232         for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++) {
 233                 ret = clk_prepare_enable(scpd->clk[i]);
 234                 if (ret) {
 235                         for (--i; i >= 0; i--)
 236                                 clk_disable_unprepare(scpd->clk[i]);
 237
 238                         goto err_clk;
 239                 }
 240         }
 241
 242         val = readl(ctl_addr);
 243         val |= PWR_ON_BIT;
 244         writel(val, ctl_addr);
 245         val |= PWR_ON_2ND_BIT;
 246         writel(val, ctl_addr);
 247
 248         /* wait until PWR_ACK = 1 */
 249         timeout = jiffies + HZ;
 250         expired = false;
 251         while (1) {
 252                 ret = scpsys_domain_is_on(scpd);
 253                 if (ret > 0)
 254                         break;
 255
 256                 if (expired) {
 257                         ret = -ETIMEDOUT;
 258                         goto err_pwr_ack;
 259                 }
 260
 261                 cpu_relax();
 262
 263                 if (time_after(jiffies, timeout))
 264                         expired = true;
 265         }
 266
 267         val &= ~PWR_CLK_DIS_BIT;
 268         writel(val, ctl_addr);
 269
 270         val &= ~PWR_ISO_BIT;
 271         writel(val, ctl_addr);
 272
 273         val |= PWR_RST_B_BIT;
 274         writel(val, ctl_addr);
 275
 276         val &= ~scpd->sram_pdn_bits;
 277         writel(val, ctl_addr);
 278
 279         /* wait until SRAM_PDN_ACK all 0 */
 280         timeout = jiffies + HZ;
 281         expired = false;
 282         while (sram_pdn_ack && (readl(ctl_addr) & sram_pdn_ack)) {
 283
 284                 if (expired) {
 285                         ret = -ETIMEDOUT;
 286                         goto err_pwr_ack;
 287                 }
 288
 289                 cpu_relax();
 290
 291                 if (time_after(jiffies, timeout))
 292                         expired = true;
 293         }
 294
 295         if (scpd->bus_prot_mask) {
 296                 ret = mtk_infracfg_clear_bus_protection(scp->infracfg,
 297                                 scpd->bus_prot_mask);
 298                 if (ret)
 299                         goto err_pwr_ack;
 300         }
 301
 302         return 0;
 303
 304 err_pwr_ack:
 305         for (i = MAX_CLKS - 1; i >= 0; i--) {
 306                 if (scpd->clk[i])
 307                         clk_disable_unprepare(scpd->clk[i]);
 308         }
 309 err_clk:
 310         if (scpd->supply)
 311                 regulator_disable(scpd->supply);
 312
 313         dev_err(scp->dev, "Failed to power on domain %s\n", genpd->name);
 314
 315         return ret;
 316 }
 317
 318 static int scpsys_power_off(struct generic_pm_domain *genpd)
 319 {
 320         struct scp_domain *scpd = container_of(genpd, struct scp_domain, genpd);
 321         struct scp *scp = scpd->scp;
 322         unsigned long timeout;
 323         bool expired;
 324         void __iomem *ctl_addr = scpd->ctl_addr;
 325         u32 pdn_ack = scpd->sram_pdn_ack_bits;
 326         u32 val;
 327         int ret;
 328         int i;
 329
 330         if (scpd->bus_prot_mask) {
 331                 ret = mtk_infracfg_set_bus_protection(scp->infracfg,
 332                                 scpd->bus_prot_mask);
 333                 if (ret)
 334                         goto out;
 335         }
 336
 337         val = readl(ctl_addr);
 338         val |= scpd->sram_pdn_bits;
 339         writel(val, ctl_addr);
 340
 341         /* wait until SRAM_PDN_ACK all 1 */
 342         timeout = jiffies + HZ;
 343         expired = false;
 344         while (pdn_ack && (readl(ctl_addr) & pdn_ack) != pdn_ack) {
 345                 if (expired) {
 346                         ret = -ETIMEDOUT;
 347                         goto out;
 348                 }
 349
 350                 cpu_relax();
 351
 352                 if (time_after(jiffies, timeout))
 353                         expired = true;
 354         }
 355
 356         val |= PWR_ISO_BIT;
 357         writel(val, ctl_addr);
 358
 359         val &= ~PWR_RST_B_BIT;
 360         writel(val, ctl_addr);
 361
 362         val |= PWR_CLK_DIS_BIT;
 363         writel(val, ctl_addr);
 364
 365         val &= ~PWR_ON_BIT;
 366         writel(val, ctl_addr);
 367
 368         val &= ~PWR_ON_2ND_BIT;
 369         writel(val, ctl_addr);
 370
 371         /* wait until PWR_ACK = 0 */
 372         timeout = jiffies + HZ;
 373         expired = false;
 374         while (1) {
 375                 ret = scpsys_domain_is_on(scpd);
 376                 if (ret == 0)
 377                         break;
 378
 379                 if (expired) {
 380                         ret = -ETIMEDOUT;
 381                         goto out;
 382                 }
 383
 384                 cpu_relax();
 385
 386                 if (time_after(jiffies, timeout))
 387                         expired = true;
 388         }
 389
 390         for (i = 0; i < MAX_CLKS && scpd->clk[i]; i++)
 391                 clk_disable_unprepare(scpd->clk[i]);
 392
 393         if (scpd->supply)
 394                 regulator_disable(scpd->supply);
 395
 396         return 0;
 397
 398 out:
 399         dev_err(scp->dev, "Failed to power off domain %s\n", genpd->name);
 400
 401         return ret;
 402 }
 403
 404 static bool scpsys_active_wakeup(struct device *dev)
 405 {
 406         struct generic_pm_domain *genpd;
 407         struct scp_domain *scpd;
 408
 409         genpd = pd_to_genpd(dev->pm_domain);
 410         scpd = container_of(genpd, struct scp_domain, genpd);
 411
 412         return scpd->active_wakeup;
 413 }
 414
 415 static int __init scpsys_probe(struct platform_device *pdev)
 416 {
 417         struct genpd_onecell_data *pd_data;
 418         struct resource *res;
 419         int i, j, ret;
 420         struct scp *scp;
 421         struct clk *clk[MT8173_CLK_MAX];
 422
 423         scp = devm_kzalloc(&pdev->dev, sizeof(*scp), GFP_KERNEL);
 424         if (!scp)
 425                 return -ENOMEM;
 426
 427         scp->dev = &pdev->dev;
 428
 429         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 430         scp->base = devm_ioremap_resource(&pdev->dev, res);
 431         if (IS_ERR(scp->base))
 432                 return PTR_ERR(scp->base);
 433
 434         pd_data = &scp->pd_data;
 435
 436         pd_data->domains = devm_kzalloc(&pdev->dev,
 437                         sizeof(*pd_data->domains) * NUM_DOMAINS, GFP_KERNEL);
 438         if (!pd_data->domains)
 439                 return -ENOMEM;
 440
 441         clk[MT8173_CLK_MM] = devm_clk_get(&pdev->dev, "mm");
 442         if (IS_ERR(clk[MT8173_CLK_MM]))
 443                 return PTR_ERR(clk[MT8173_CLK_MM]);
 444
 445         clk[MT8173_CLK_MFG] = devm_clk_get(&pdev->dev, "mfg");
 446         if (IS_ERR(clk[MT8173_CLK_MFG]))
 447                 return PTR_ERR(clk[MT8173_CLK_MFG]);
 448
 449         clk[MT8173_CLK_VENC] = devm_clk_get(&pdev->dev, "venc");
 450         if (IS_ERR(clk[MT8173_CLK_VENC]))
 451                 return PTR_ERR(clk[MT8173_CLK_VENC]);
 452
 453         clk[MT8173_CLK_VENC_LT] = devm_clk_get(&pdev->dev, "venc_lt");
 454         if (IS_ERR(clk[MT8173_CLK_VENC_LT]))
 455                 return PTR_ERR(clk[MT8173_CLK_VENC_LT]);
 456
 457         scp->infracfg = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
 458                         "infracfg");
 459         if (IS_ERR(scp->infracfg)) {
 460                 dev_err(&pdev->dev, "Cannot find infracfg controller: %ld\n",
 461                                 PTR_ERR(scp->infracfg));
 462                 return PTR_ERR(scp->infracfg);
 463         }
 464
 465         for (i = 0; i < NUM_DOMAINS; i++) {
 466                 struct scp_domain *scpd = &scp->domains[i];
 467                 const struct scp_domain_data *data = &scp_domain_data[i];
 468
 469                 scpd->supply = devm_regulator_get_optional(&pdev->dev, data->name);
 470                 if (IS_ERR(scpd->supply)) {
 471                         if (PTR_ERR(scpd->supply) == -ENODEV)
 472                                 scpd->supply = NULL;
 473                         else
 474                                 return PTR_ERR(scpd->supply);
 475                 }
 476         }
 477
 478         pd_data->num_domains = NUM_DOMAINS;
 479
 480         for (i = 0; i < NUM_DOMAINS; i++) {
 481                 struct scp_domain *scpd = &scp->domains[i];
 482                 struct generic_pm_domain *genpd = &scpd->genpd;
 483                 const struct scp_domain_data *data = &scp_domain_data[i];
 484
 485                 pd_data->domains[i] = genpd;
 486                 scpd->scp = scp;
 487
 488                 scpd->sta_mask = data->sta_mask;
 489                 scpd->ctl_addr = scp->base + data->ctl_offs;
 490                 scpd->sram_pdn_bits = data->sram_pdn_bits;
 491                 scpd->sram_pdn_ack_bits = data->sram_pdn_ack_bits;
 492                 scpd->bus_prot_mask = data->bus_prot_mask;
 493                 scpd->active_wakeup = data->active_wakeup;
 494                 for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++)
 495                         scpd->clk[j] = clk[data->clk_id[j]];
 496
 497                 genpd->name = data->name;
 498                 genpd->power_off = scpsys_power_off;
 499                 genpd->power_on = scpsys_power_on;
 500                 genpd->dev_ops.active_wakeup = scpsys_active_wakeup;
 501
 502                 /*
 503                  * Initially turn on all domains to make the domains usable
 504                  * with !CONFIG_PM and to get the hardware in sync with the
 505                  * software.  The unused domains will be switched off during
 506                  * late_init time.
 507                  */
 508                 genpd->power_on(genpd);
 509
 510                 pm_genpd_init(genpd, NULL, false);
 511         }
 512
 513         /*
 514          * We are not allowed to fail here since there is no way to unregister
 515          * a power domain. Once registered above we have to keep the domains
 516          * valid.
 517          */
 518
 519         ret = pm_genpd_add_subdomain(pd_data->domains[MT8173_POWER_DOMAIN_MFG_ASYNC],
 520                 pd_data->domains[MT8173_POWER_DOMAIN_MFG_2D]);
 521         if (ret && IS_ENABLED(CONFIG_PM))
 522                 dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
 523
 524         ret = pm_genpd_add_subdomain(pd_data->domains[MT8173_POWER_DOMAIN_MFG_2D],
 525                 pd_data->domains[MT8173_POWER_DOMAIN_MFG]);
 526         if (ret && IS_ENABLED(CONFIG_PM))
 527                 dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret);
 528
 529         ret = of_genpd_add_provider_onecell(pdev->dev.of_node, pd_data);
 530         if (ret)
 531                 dev_err(&pdev->dev, "Failed to add OF provider: %d\n", ret);
 532
 533         return 0;
 534 }
 535
 536 static const struct of_device_id of_scpsys_match_tbl[] = {
 537         {
 538                 .compatible = "mediatek,mt8173-scpsys",
 539         }, {
 540                 /* sentinel */
 541         }
 542 };
 543
 544 static struct platform_driver scpsys_drv = {
 545         .driver = {
 546                 .name = "mtk-scpsys",
 547                 .owner = THIS_MODULE,
 548                 .of_match_table = of_match_ptr(of_scpsys_match_tbl),
 549         },
 550 };
 551 builtin_platform_driver_probe(scpsys_drv, scpsys_probe);