drivers/staging/iio/adc/ad7280a.c

   1 /*
   2  * AD7280A Lithium Ion Battery Monitoring System
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/spi/spi.h>
  14 #include <linux/err.h>
  15 #include <linux/delay.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21 #include <linux/iio/events.h>
  22
  23 #include "ad7280a.h"
  24
  25 /* Registers */
  26 #define AD7280A_CELL_VOLTAGE_1          0x0  /* D11 to D0, Read only */
  27 #define AD7280A_CELL_VOLTAGE_2          0x1  /* D11 to D0, Read only */
  28 #define AD7280A_CELL_VOLTAGE_3          0x2  /* D11 to D0, Read only */
  29 #define AD7280A_CELL_VOLTAGE_4          0x3  /* D11 to D0, Read only */
  30 #define AD7280A_CELL_VOLTAGE_5          0x4  /* D11 to D0, Read only */
  31 #define AD7280A_CELL_VOLTAGE_6          0x5  /* D11 to D0, Read only */
  32 #define AD7280A_AUX_ADC_1               0x6  /* D11 to D0, Read only */
  33 #define AD7280A_AUX_ADC_2               0x7  /* D11 to D0, Read only */
  34 #define AD7280A_AUX_ADC_3               0x8  /* D11 to D0, Read only */
  35 #define AD7280A_AUX_ADC_4               0x9  /* D11 to D0, Read only */
  36 #define AD7280A_AUX_ADC_5               0xA  /* D11 to D0, Read only */
  37 #define AD7280A_AUX_ADC_6               0xB  /* D11 to D0, Read only */
  38 #define AD7280A_SELF_TEST               0xC  /* D11 to D0, Read only */
  39 #define AD7280A_CONTROL_HB              0xD  /* D15 to D8, Read/write */
  40 #define AD7280A_CONTROL_LB              0xE  /* D7 to D0, Read/write */
  41 #define AD7280A_CELL_OVERVOLTAGE        0xF  /* D7 to D0, Read/write */
  42 #define AD7280A_CELL_UNDERVOLTAGE       0x10 /* D7 to D0, Read/write */
  43 #define AD7280A_AUX_ADC_OVERVOLTAGE     0x11 /* D7 to D0, Read/write */
  44 #define AD7280A_AUX_ADC_UNDERVOLTAGE    0x12 /* D7 to D0, Read/write */
  45 #define AD7280A_ALERT                   0x13 /* D7 to D0, Read/write */
  46 #define AD7280A_CELL_BALANCE            0x14 /* D7 to D0, Read/write */
  47 #define AD7280A_CB1_TIMER               0x15 /* D7 to D0, Read/write */
  48 #define AD7280A_CB2_TIMER               0x16 /* D7 to D0, Read/write */
  49 #define AD7280A_CB3_TIMER               0x17 /* D7 to D0, Read/write */
  50 #define AD7280A_CB4_TIMER               0x18 /* D7 to D0, Read/write */
  51 #define AD7280A_CB5_TIMER               0x19 /* D7 to D0, Read/write */
  52 #define AD7280A_CB6_TIMER               0x1A /* D7 to D0, Read/write */
  53 #define AD7280A_PD_TIMER                0x1B /* D7 to D0, Read/write */
  54 #define AD7280A_READ                    0x1C /* D7 to D0, Read/write */
  55 #define AD7280A_CNVST_CONTROL           0x1D /* D7 to D0, Read/write */
  56
  57 /* Bits and Masks */
  58 #define AD7280A_CTRL_HB_CONV_INPUT_ALL                  (0 << 6)
  59 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4       (1 << 6)
  60 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL                (2 << 6)
  61 #define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST            (3 << 6)
  62 #define AD7280A_CTRL_HB_CONV_RES_READ_ALL               (0 << 4)
  63 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4    (1 << 4)
  64 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL             (2 << 4)
  65 #define AD7280A_CTRL_HB_CONV_RES_READ_NO                (3 << 4)
  66 #define AD7280A_CTRL_HB_CONV_START_CNVST                (0 << 3)
  67 #define AD7280A_CTRL_HB_CONV_START_CS                   (1 << 3)
  68 #define AD7280A_CTRL_HB_CONV_AVG_DIS                    (0 << 1)
  69 #define AD7280A_CTRL_HB_CONV_AVG_2                      (1 << 1)
  70 #define AD7280A_CTRL_HB_CONV_AVG_4                      (2 << 1)
  71 #define AD7280A_CTRL_HB_CONV_AVG_8                      (3 << 1)
  72 #define AD7280A_CTRL_HB_CONV_AVG(x)                     ((x) << 1)
  73 #define AD7280A_CTRL_HB_PWRDN_SW                        (1 << 0)
  74
  75 #define AD7280A_CTRL_LB_SWRST                           (1 << 7)
  76 #define AD7280A_CTRL_LB_ACQ_TIME_400ns                  (0 << 5)
  77 #define AD7280A_CTRL_LB_ACQ_TIME_800ns                  (1 << 5)
  78 #define AD7280A_CTRL_LB_ACQ_TIME_1200ns                 (2 << 5)
  79 #define AD7280A_CTRL_LB_ACQ_TIME_1600ns                 (3 << 5)
  80 #define AD7280A_CTRL_LB_ACQ_TIME(x)                     ((x) << 5)
  81 #define AD7280A_CTRL_LB_MUST_SET                        (1 << 4)
  82 #define AD7280A_CTRL_LB_THERMISTOR_EN                   (1 << 3)
  83 #define AD7280A_CTRL_LB_LOCK_DEV_ADDR                   (1 << 2)
  84 #define AD7280A_CTRL_LB_INC_DEV_ADDR                    (1 << 1)
  85 #define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN               (1 << 0)
  86
  87 #define AD7280A_ALERT_GEN_STATIC_HIGH                   (1 << 6)
  88 #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN              (3 << 6)
  89
  90 #define AD7280A_ALL_CELLS                               (0xAD << 16)
  91
  92 #define AD7280A_MAX_SPI_CLK_Hz          700000 /* < 1MHz */
  93 #define AD7280A_MAX_CHAIN               8
  94 #define AD7280A_CELLS_PER_DEV           6
  95 #define AD7280A_BITS                    12
  96 #define AD7280A_NUM_CH                  (AD7280A_AUX_ADC_6 - \
  97                                         AD7280A_CELL_VOLTAGE_1 + 1)
  98
  99 #define AD7280A_DEVADDR_MASTER          0
 100 #define AD7280A_DEVADDR_ALL             0x1F
 101 /* 5-bit device address is sent LSB first */
 102 #define AD7280A_DEVADDR(addr)   (((addr & 0x1) << 4) | ((addr & 0x2) << 3) | \
 103                                 (addr & 0x4) | ((addr & 0x8) >> 3) | \
 104                                 ((addr & 0x10) >> 4))
 105
 106 /* During a read a valid write is mandatory.
 107  * So writing to the highest available address (Address 0x1F)
 108  * and setting the address all parts bit to 0 is recommended
 109  * So the TXVAL is AD7280A_DEVADDR_ALL + CRC
 110  */
 111 #define AD7280A_READ_TXVAL      0xF800030A
 112
 113 /*
 114  * AD7280 CRC
 115  *
 116  * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
 117  */
 118 #define POLYNOM         0x2F
 119 #define POLYNOM_ORDER   8
 120 #define HIGHBIT         (1 << (POLYNOM_ORDER - 1))
 121
 122 struct ad7280_state {
 123         struct spi_device               *spi;
 124         struct iio_chan_spec            *channels;
 125         struct iio_dev_attr             *iio_attr;
 126         int                             slave_num;
 127         int                             scan_cnt;
 128         int                             readback_delay_us;
 129         unsigned char                   crc_tab[256];
 130         unsigned char                   ctrl_hb;
 131         unsigned char                   ctrl_lb;
 132         unsigned char                   cell_threshhigh;
 133         unsigned char                   cell_threshlow;
 134         unsigned char                   aux_threshhigh;
 135         unsigned char                   aux_threshlow;
 136         unsigned char                   cb_mask[AD7280A_MAX_CHAIN];
 137 };
 138
 139 static void ad7280_crc8_build_table(unsigned char *crc_tab)
 140 {
 141         unsigned char bit, crc;
 142         int cnt, i;
 143
 144         for (cnt = 0; cnt < 256; cnt++) {
 145                 crc = cnt;
 146                 for (i = 0; i < 8; i++) {
 147                         bit = crc & HIGHBIT;
 148                         crc <<= 1;
 149                         if (bit)
 150                                 crc ^= POLYNOM;
 151                 }
 152                 crc_tab[cnt] = crc;
 153         }
 154 }
 155
 156 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned val)
 157 {
 158         unsigned char crc;
 159
 160         crc = crc_tab[val >> 16 & 0xFF];
 161         crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
 162
 163         return  crc ^ (val & 0xFF);
 164 }
 165
 166 static int ad7280_check_crc(struct ad7280_state *st, unsigned val)
 167 {
 168         unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
 169
 170         if (crc != ((val >> 2) & 0xFF))
 171                 return -EIO;
 172
 173         return 0;
 174 }
 175
 176 /* After initiating a conversion sequence we need to wait until the
 177  * conversion is done. The delay is typically in the range of 15..30 us
 178  * however depending an the number of devices in the daisy chain and the
 179  * number of averages taken, conversion delays and acquisition time options
 180  * it may take up to 250us, in this case we better sleep instead of busy
 181  * wait.
 182  */
 183
 184 static void ad7280_delay(struct ad7280_state *st)
 185 {
 186         if (st->readback_delay_us < 50)
 187                 udelay(st->readback_delay_us);
 188         else
 189                 msleep(1);
 190 }
 191
 192 static int __ad7280_read32(struct spi_device *spi, unsigned *val)
 193 {
 194         unsigned rx_buf, tx_buf = cpu_to_be32(AD7280A_READ_TXVAL);
 195         int ret;
 196
 197         struct spi_transfer t = {
 198                 .tx_buf = &tx_buf,
 199                 .rx_buf = &rx_buf,
 200                 .len = 4,
 201         };
 202
 203         ret = spi_sync_transfer(spi, &t, 1);
 204         if (ret)
 205                 return ret;
 206
 207         *val = be32_to_cpu(rx_buf);
 208
 209         return 0;
 210 }
 211
 212 static int ad7280_write(struct ad7280_state *st, unsigned devaddr,
 213                         unsigned addr, bool all, unsigned val)
 214 {
 215         unsigned reg = (devaddr << 27 | addr << 21 |
 216                         (val & 0xFF) << 13 | all << 12);
 217
 218         reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2;
 219         reg = cpu_to_be32(reg);
 220
 221         return spi_write(st->spi, &reg, 4);
 222 }
 223
 224 static int ad7280_read(struct ad7280_state *st, unsigned devaddr,
 225                         unsigned addr)
 226 {
 227         int ret;
 228         unsigned tmp;
 229
 230         /* turns off the read operation on all parts */
 231         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 232                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 233                         AD7280A_CTRL_HB_CONV_RES_READ_NO |
 234                         st->ctrl_hb);
 235         if (ret)
 236                 return ret;
 237
 238         /* turns on the read operation on the addressed part */
 239         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 240                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 241                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 242                         st->ctrl_hb);
 243         if (ret)
 244                 return ret;
 245
 246         /* Set register address on the part to be read from */
 247         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 248         if (ret)
 249                 return ret;
 250
 251         __ad7280_read32(st->spi, &tmp);
 252
 253         if (ad7280_check_crc(st, tmp))
 254                 return -EIO;
 255
 256         if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr))
 257                 return -EFAULT;
 258
 259         return (tmp >> 13) & 0xFF;
 260 }
 261
 262 static int ad7280_read_channel(struct ad7280_state *st, unsigned devaddr,
 263                                unsigned addr)
 264 {
 265         int ret;
 266         unsigned tmp;
 267
 268         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 269         if (ret)
 270                 return ret;
 271
 272         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 273                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 274                         AD7280A_CTRL_HB_CONV_RES_READ_NO |
 275                         st->ctrl_hb);
 276         if (ret)
 277                 return ret;
 278
 279         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 280                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 281                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 282                         AD7280A_CTRL_HB_CONV_START_CS |
 283                         st->ctrl_hb);
 284         if (ret)
 285                 return ret;
 286
 287         ad7280_delay(st);
 288
 289         __ad7280_read32(st->spi, &tmp);
 290
 291         if (ad7280_check_crc(st, tmp))
 292                 return -EIO;
 293
 294         if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr))
 295                 return -EFAULT;
 296
 297         return (tmp >> 11) & 0xFFF;
 298 }
 299
 300 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned cnt,
 301                              unsigned *array)
 302 {
 303         int i, ret;
 304         unsigned tmp, sum = 0;
 305
 306         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 307                            AD7280A_CELL_VOLTAGE_1 << 2);
 308         if (ret)
 309                 return ret;
 310
 311         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 312                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 313                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 314                         AD7280A_CTRL_HB_CONV_START_CS |
 315                         st->ctrl_hb);
 316         if (ret)
 317                 return ret;
 318
 319         ad7280_delay(st);
 320
 321         for (i = 0; i < cnt; i++) {
 322                 __ad7280_read32(st->spi, &tmp);
 323
 324                 if (ad7280_check_crc(st, tmp))
 325                         return -EIO;
 326
 327                 if (array)
 328                         array[i] = tmp;
 329                 /* only sum cell voltages */
 330                 if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6)
 331                         sum += ((tmp >> 11) & 0xFFF);
 332         }
 333
 334         return sum;
 335 }
 336
 337 static int ad7280_chain_setup(struct ad7280_state *st)
 338 {
 339         unsigned val, n;
 340         int ret;
 341
 342         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 343                         AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 344                         AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 345                         AD7280A_CTRL_LB_MUST_SET |
 346                         AD7280A_CTRL_LB_SWRST |
 347                         st->ctrl_lb);
 348         if (ret)
 349                 return ret;
 350
 351         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 352                         AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 353                         AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 354                         AD7280A_CTRL_LB_MUST_SET |
 355                         st->ctrl_lb);
 356         if (ret)
 357                 return ret;
 358
 359         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 360                         AD7280A_CONTROL_LB << 2);
 361         if (ret)
 362                 return ret;
 363
 364         for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
 365                 __ad7280_read32(st->spi, &val);
 366                 if (val == 0)
 367                         return n - 1;
 368
 369                 if (ad7280_check_crc(st, val))
 370                         return -EIO;
 371
 372                 if (n != AD7280A_DEVADDR(val >> 27))
 373                         return -EIO;
 374         }
 375
 376         return -EFAULT;
 377 }
 378
 379 static ssize_t ad7280_show_balance_sw(struct device *dev,
 380                                         struct device_attribute *attr,
 381                                         char *buf)
 382 {
 383         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 384         struct ad7280_state *st = iio_priv(indio_dev);
 385         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 386
 387         return sprintf(buf, "%d\n",
 388                        !!(st->cb_mask[this_attr->address >> 8] &
 389                        (1 << ((this_attr->address & 0xFF) + 2))));
 390 }
 391
 392 static ssize_t ad7280_store_balance_sw(struct device *dev,
 393                                          struct device_attribute *attr,
 394                                          const char *buf,
 395                                          size_t len)
 396 {
 397         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 398         struct ad7280_state *st = iio_priv(indio_dev);
 399         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 400         bool readin;
 401         int ret;
 402         unsigned devaddr, ch;
 403
 404         ret = strtobool(buf, &readin);
 405         if (ret)
 406                 return ret;
 407
 408         devaddr = this_attr->address >> 8;
 409         ch = this_attr->address & 0xFF;
 410
 411         mutex_lock(&indio_dev->mlock);
 412         if (readin)
 413                 st->cb_mask[devaddr] |= 1 << (ch + 2);
 414         else
 415                 st->cb_mask[devaddr] &= ~(1 << (ch + 2));
 416
 417         ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE,
 418                            0, st->cb_mask[devaddr]);
 419         mutex_unlock(&indio_dev->mlock);
 420
 421         return ret ? ret : len;
 422 }
 423
 424 static ssize_t ad7280_show_balance_timer(struct device *dev,
 425                                         struct device_attribute *attr,
 426                                         char *buf)
 427 {
 428         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 429         struct ad7280_state *st = iio_priv(indio_dev);
 430         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 431         int ret;
 432         unsigned msecs;
 433
 434         mutex_lock(&indio_dev->mlock);
 435         ret = ad7280_read(st, this_attr->address >> 8,
 436                         this_attr->address & 0xFF);
 437         mutex_unlock(&indio_dev->mlock);
 438
 439         if (ret < 0)
 440                 return ret;
 441
 442         msecs = (ret >> 3) * 71500;
 443
 444         return sprintf(buf, "%d\n", msecs);
 445 }
 446
 447 static ssize_t ad7280_store_balance_timer(struct device *dev,
 448                                          struct device_attribute *attr,
 449                                          const char *buf,
 450                                          size_t len)
 451 {
 452         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 453         struct ad7280_state *st = iio_priv(indio_dev);
 454         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 455         unsigned long val;
 456         int ret;
 457
 458         ret = kstrtoul(buf, 10, &val);
 459         if (ret)
 460                 return ret;
 461
 462         val /= 71500;
 463
 464         if (val > 31)
 465                 return -EINVAL;
 466
 467         mutex_lock(&indio_dev->mlock);
 468         ret = ad7280_write(st, this_attr->address >> 8,
 469                            this_attr->address & 0xFF,
 470                            0, (val & 0x1F) << 3);
 471         mutex_unlock(&indio_dev->mlock);
 472
 473         return ret ? ret : len;
 474 }
 475
 476 static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN *
 477                                            AD7280A_CELLS_PER_DEV * 2 + 1];
 478
 479 static struct attribute_group ad7280_attrs_group = {
 480         .attrs = ad7280_attributes,
 481 };
 482
 483 static int ad7280_channel_init(struct ad7280_state *st)
 484 {
 485         int dev, ch, cnt;
 486
 487         st->channels = kcalloc((st->slave_num + 1) * 12 + 2,
 488                                sizeof(*st->channels), GFP_KERNEL);
 489         if (st->channels == NULL)
 490                 return -ENOMEM;
 491
 492         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 493                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; ch++,
 494                         cnt++) {
 495                         if (ch < AD7280A_AUX_ADC_1) {
 496                                 st->channels[cnt].type = IIO_VOLTAGE;
 497                                 st->channels[cnt].differential = 1;
 498                                 st->channels[cnt].channel = (dev * 6) + ch;
 499                                 st->channels[cnt].channel2 =
 500                                         st->channels[cnt].channel + 1;
 501                         } else {
 502                                 st->channels[cnt].type = IIO_TEMP;
 503                                 st->channels[cnt].channel = (dev * 6) + ch - 6;
 504                         }
 505                         st->channels[cnt].indexed = 1;
 506                         st->channels[cnt].info_mask_separate =
 507                                 BIT(IIO_CHAN_INFO_RAW);
 508                         st->channels[cnt].info_mask_shared_by_type =
 509                                 BIT(IIO_CHAN_INFO_SCALE);
 510                         st->channels[cnt].address =
 511                                 AD7280A_DEVADDR(dev) << 8 | ch;
 512                         st->channels[cnt].scan_index = cnt;
 513                         st->channels[cnt].scan_type.sign = 'u';
 514                         st->channels[cnt].scan_type.realbits = 12;
 515                         st->channels[cnt].scan_type.storagebits = 32;
 516                         st->channels[cnt].scan_type.shift = 0;
 517                 }
 518
 519         st->channels[cnt].type = IIO_VOLTAGE;
 520         st->channels[cnt].differential = 1;
 521         st->channels[cnt].channel = 0;
 522         st->channels[cnt].channel2 = dev * 6;
 523         st->channels[cnt].address = AD7280A_ALL_CELLS;
 524         st->channels[cnt].indexed = 1;
 525         st->channels[cnt].info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 526         st->channels[cnt].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 527         st->channels[cnt].scan_index = cnt;
 528         st->channels[cnt].scan_type.sign = 'u';
 529         st->channels[cnt].scan_type.realbits = 32;
 530         st->channels[cnt].scan_type.storagebits = 32;
 531         st->channels[cnt].scan_type.shift = 0;
 532         cnt++;
 533         st->channels[cnt].type = IIO_TIMESTAMP;
 534         st->channels[cnt].channel = -1;
 535         st->channels[cnt].scan_index = cnt;
 536         st->channels[cnt].scan_type.sign = 's';
 537         st->channels[cnt].scan_type.realbits = 64;
 538         st->channels[cnt].scan_type.storagebits = 64;
 539         st->channels[cnt].scan_type.shift = 0;
 540
 541         return cnt + 1;
 542 }
 543
 544 static int ad7280_attr_init(struct ad7280_state *st)
 545 {
 546         int dev, ch, cnt;
 547
 548         st->iio_attr = kzalloc(sizeof(*st->iio_attr) * (st->slave_num + 1) *
 549                                 AD7280A_CELLS_PER_DEV * 2, GFP_KERNEL);
 550         if (st->iio_attr == NULL)
 551                 return -ENOMEM;
 552
 553         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 554                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6;
 555                         ch++, cnt++) {
 556                         st->iio_attr[cnt].address =
 557                                 AD7280A_DEVADDR(dev) << 8 | ch;
 558                         st->iio_attr[cnt].dev_attr.attr.mode =
 559                                 S_IWUSR | S_IRUGO;
 560                         st->iio_attr[cnt].dev_attr.show =
 561                                 ad7280_show_balance_sw;
 562                         st->iio_attr[cnt].dev_attr.store =
 563                                 ad7280_store_balance_sw;
 564                         st->iio_attr[cnt].dev_attr.attr.name =
 565                                 kasprintf(GFP_KERNEL,
 566                                         "in%d-in%d_balance_switch_en",
 567                                         (dev * AD7280A_CELLS_PER_DEV) + ch,
 568                                         (dev * AD7280A_CELLS_PER_DEV) + ch + 1);
 569                         ad7280_attributes[cnt] =
 570                                 &st->iio_attr[cnt].dev_attr.attr;
 571                         cnt++;
 572                         st->iio_attr[cnt].address =
 573                                 AD7280A_DEVADDR(dev) << 8 |
 574                                 (AD7280A_CB1_TIMER + ch);
 575                         st->iio_attr[cnt].dev_attr.attr.mode =
 576                                 S_IWUSR | S_IRUGO;
 577                         st->iio_attr[cnt].dev_attr.show =
 578                                 ad7280_show_balance_timer;
 579                         st->iio_attr[cnt].dev_attr.store =
 580                                 ad7280_store_balance_timer;
 581                         st->iio_attr[cnt].dev_attr.attr.name =
 582                                 kasprintf(GFP_KERNEL, "in%d-in%d_balance_timer",
 583                                         (dev * AD7280A_CELLS_PER_DEV) + ch,
 584                                         (dev * AD7280A_CELLS_PER_DEV) + ch + 1);
 585                         ad7280_attributes[cnt] =
 586                                 &st->iio_attr[cnt].dev_attr.attr;
 587                 }
 588
 589         ad7280_attributes[cnt] = NULL;
 590
 591         return 0;
 592 }
 593
 594 static ssize_t ad7280_read_channel_config(struct device *dev,
 595                                         struct device_attribute *attr,
 596                                         char *buf)
 597 {
 598         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 599         struct ad7280_state *st = iio_priv(indio_dev);
 600         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 601         unsigned val;
 602
 603         switch ((u32) this_attr->address) {
 604         case AD7280A_CELL_OVERVOLTAGE:
 605                 val = 1000 + (st->cell_threshhigh * 1568) / 100;
 606                 break;
 607         case AD7280A_CELL_UNDERVOLTAGE:
 608                 val = 1000 + (st->cell_threshlow * 1568) / 100;
 609                 break;
 610         case AD7280A_AUX_ADC_OVERVOLTAGE:
 611                 val = (st->aux_threshhigh * 196) / 10;
 612                 break;
 613         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 614                 val = (st->aux_threshlow * 196) / 10;
 615                 break;
 616         default:
 617                 return -EINVAL;
 618         }
 619
 620         return sprintf(buf, "%d\n", val);
 621 }
 622
 623 static ssize_t ad7280_write_channel_config(struct device *dev,
 624                                          struct device_attribute *attr,
 625                                          const char *buf,
 626                                          size_t len)
 627 {
 628         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 629         struct ad7280_state *st = iio_priv(indio_dev);
 630         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 631
 632         long val;
 633         int ret;
 634
 635         ret = kstrtol(buf, 10, &val);
 636         if (ret)
 637                 return ret;
 638
 639         switch ((u32) this_attr->address) {
 640         case AD7280A_CELL_OVERVOLTAGE:
 641         case AD7280A_CELL_UNDERVOLTAGE:
 642                 val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
 643                 break;
 644         case AD7280A_AUX_ADC_OVERVOLTAGE:
 645         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 646                 val = (val * 10) / 196; /* LSB 19.6mV */
 647                 break;
 648         default:
 649                 return -EFAULT;
 650         }
 651
 652         val = clamp(val, 0L, 0xFFL);
 653
 654         mutex_lock(&indio_dev->mlock);
 655         switch ((u32) this_attr->address) {
 656         case AD7280A_CELL_OVERVOLTAGE:
 657                 st->cell_threshhigh = val;
 658                 break;
 659         case AD7280A_CELL_UNDERVOLTAGE:
 660                 st->cell_threshlow = val;
 661                 break;
 662         case AD7280A_AUX_ADC_OVERVOLTAGE:
 663                 st->aux_threshhigh = val;
 664                 break;
 665         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 666                 st->aux_threshlow = val;
 667                 break;
 668         }
 669
 670         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 671                            this_attr->address, 1, val);
 672
 673         mutex_unlock(&indio_dev->mlock);
 674
 675         return ret ? ret : len;
 676 }
 677
 678 static irqreturn_t ad7280_event_handler(int irq, void *private)
 679 {
 680         struct iio_dev *indio_dev = private;
 681         struct ad7280_state *st = iio_priv(indio_dev);
 682         unsigned *channels;
 683         int i, ret;
 684
 685         channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
 686         if (channels == NULL)
 687                 return IRQ_HANDLED;
 688
 689         ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
 690         if (ret < 0)
 691                 goto out;
 692
 693         for (i = 0; i < st->scan_cnt; i++) {
 694                 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
 695                         if (((channels[i] >> 11) & 0xFFF) >=
 696                                 st->cell_threshhigh)
 697                                 iio_push_event(indio_dev,
 698                                         IIO_EVENT_CODE(IIO_VOLTAGE,
 699                                                        1,
 700                                                        0,
 701                                                        IIO_EV_DIR_RISING,
 702                                                        IIO_EV_TYPE_THRESH,
 703                                                        0, 0, 0),
 704                                         iio_get_time_ns());
 705                         else if (((channels[i] >> 11) & 0xFFF) <=
 706                                 st->cell_threshlow)
 707                                 iio_push_event(indio_dev,
 708                                         IIO_EVENT_CODE(IIO_VOLTAGE,
 709                                                        1,
 710                                                        0,
 711                                                        IIO_EV_DIR_FALLING,
 712                                                        IIO_EV_TYPE_THRESH,
 713                                                        0, 0, 0),
 714                                         iio_get_time_ns());
 715                 } else {
 716                         if (((channels[i] >> 11) & 0xFFF) >= st->aux_threshhigh)
 717                                 iio_push_event(indio_dev,
 718                                         IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 719                                         0,
 720                                         IIO_EV_TYPE_THRESH,
 721                                         IIO_EV_DIR_RISING),
 722                                         iio_get_time_ns());
 723                         else if (((channels[i] >> 11) & 0xFFF) <=
 724                                 st->aux_threshlow)
 725                                 iio_push_event(indio_dev,
 726                                         IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 727                                         0,
 728                                         IIO_EV_TYPE_THRESH,
 729                                         IIO_EV_DIR_FALLING),
 730                                         iio_get_time_ns());
 731                 }
 732         }
 733
 734 out:
 735         kfree(channels);
 736
 737         return IRQ_HANDLED;
 738 }
 739
 740 static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value,
 741                 in_voltage-voltage_thresh_low_value,
 742                 S_IRUGO | S_IWUSR,
 743                 ad7280_read_channel_config,
 744                 ad7280_write_channel_config,
 745                 AD7280A_CELL_UNDERVOLTAGE);
 746
 747 static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value,
 748                 in_voltage-voltage_thresh_high_value,
 749                 S_IRUGO | S_IWUSR,
 750                 ad7280_read_channel_config,
 751                 ad7280_write_channel_config,
 752                 AD7280A_CELL_OVERVOLTAGE);
 753
 754 static IIO_DEVICE_ATTR(in_temp_thresh_low_value,
 755                 S_IRUGO | S_IWUSR,
 756                 ad7280_read_channel_config,
 757                 ad7280_write_channel_config,
 758                 AD7280A_AUX_ADC_UNDERVOLTAGE);
 759
 760 static IIO_DEVICE_ATTR(in_temp_thresh_high_value,
 761                 S_IRUGO | S_IWUSR,
 762                 ad7280_read_channel_config,
 763                 ad7280_write_channel_config,
 764                 AD7280A_AUX_ADC_OVERVOLTAGE);
 765
 766
 767 static struct attribute *ad7280_event_attributes[] = {
 768         &iio_dev_attr_in_thresh_low_value.dev_attr.attr,
 769         &iio_dev_attr_in_thresh_high_value.dev_attr.attr,
 770         &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr,
 771         &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr,
 772         NULL,
 773 };
 774
 775 static struct attribute_group ad7280_event_attrs_group = {
 776         .attrs = ad7280_event_attributes,
 777 };
 778
 779 static int ad7280_read_raw(struct iio_dev *indio_dev,
 780                            struct iio_chan_spec const *chan,
 781                            int *val,
 782                            int *val2,
 783                            long m)
 784 {
 785         struct ad7280_state *st = iio_priv(indio_dev);
 786         int ret;
 787
 788         switch (m) {
 789         case IIO_CHAN_INFO_RAW:
 790                 mutex_lock(&indio_dev->mlock);
 791                 if (chan->address == AD7280A_ALL_CELLS)
 792                         ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
 793                 else
 794                         ret = ad7280_read_channel(st, chan->address >> 8,
 795                                                   chan->address & 0xFF);
 796                 mutex_unlock(&indio_dev->mlock);
 797
 798                 if (ret < 0)
 799                         return ret;
 800
 801                 *val = ret;
 802
 803                 return IIO_VAL_INT;
 804         case IIO_CHAN_INFO_SCALE:
 805                 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
 806                         *val = 4000;
 807                 else
 808                         *val = 5000;
 809
 810                 *val2 = AD7280A_BITS;
 811                 return IIO_VAL_FRACTIONAL_LOG2;
 812         }
 813         return -EINVAL;
 814 }
 815
 816 static const struct iio_info ad7280_info = {
 817         .read_raw = &ad7280_read_raw,
 818         .event_attrs = &ad7280_event_attrs_group,
 819         .attrs = &ad7280_attrs_group,
 820         .driver_module = THIS_MODULE,
 821 };
 822
 823 static const struct ad7280_platform_data ad7793_default_pdata = {
 824         .acquisition_time = AD7280A_ACQ_TIME_400ns,
 825         .conversion_averaging = AD7280A_CONV_AVG_DIS,
 826         .thermistor_term_en = true,
 827 };
 828
 829 static int ad7280_probe(struct spi_device *spi)
 830 {
 831         const struct ad7280_platform_data *pdata = spi->dev.platform_data;
 832         struct ad7280_state *st;
 833         int ret;
 834         const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890};
 835         const unsigned short nAVG[4] = {1, 2, 4, 8};
 836         struct iio_dev *indio_dev;
 837
 838         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 839         if (indio_dev == NULL)
 840                 return -ENOMEM;
 841
 842         st = iio_priv(indio_dev);
 843         spi_set_drvdata(spi, indio_dev);
 844         st->spi = spi;
 845
 846         if (!pdata)
 847                 pdata = &ad7793_default_pdata;
 848
 849         ad7280_crc8_build_table(st->crc_tab);
 850
 851         st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_Hz;
 852         st->spi->mode = SPI_MODE_1;
 853         spi_setup(st->spi);
 854
 855         st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3);
 856         st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging
 857                         & 0x3) | (pdata->thermistor_term_en ?
 858                         AD7280A_CTRL_LB_THERMISTOR_EN : 0);
 859
 860         ret = ad7280_chain_setup(st);
 861         if (ret < 0)
 862                 return ret;
 863
 864         st->slave_num = ret;
 865         st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
 866         st->cell_threshhigh = 0xFF;
 867         st->aux_threshhigh = 0xFF;
 868
 869         /*
 870          * Total Conversion Time = ((tACQ + tCONV) *
 871          *                         (Number of Conversions per Part)) −
 872          *                         tACQ + ((N - 1) * tDELAY)
 873          *
 874          * Readback Delay = Total Conversion Time + tWAIT
 875          */
 876
 877         st->readback_delay_us =
 878                 ((tACQ_ns[pdata->acquisition_time & 0x3] + 695) *
 879                 (AD7280A_NUM_CH * nAVG[pdata->conversion_averaging & 0x3]))
 880                 - tACQ_ns[pdata->acquisition_time & 0x3] +
 881                 st->slave_num * 250;
 882
 883         /* Convert to usecs */
 884         st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
 885         st->readback_delay_us += 5; /* Add tWAIT */
 886
 887         indio_dev->name = spi_get_device_id(spi)->name;
 888         indio_dev->dev.parent = &spi->dev;
 889         indio_dev->modes = INDIO_DIRECT_MODE;
 890
 891         ret = ad7280_channel_init(st);
 892         if (ret < 0)
 893                 return ret;
 894
 895         indio_dev->num_channels = ret;
 896         indio_dev->channels = st->channels;
 897         indio_dev->info = &ad7280_info;
 898
 899         ret = ad7280_attr_init(st);
 900         if (ret < 0)
 901                 goto error_free_channels;
 902
 903         ret = iio_device_register(indio_dev);
 904         if (ret)
 905                 goto error_free_attr;
 906
 907         if (spi->irq > 0) {
 908                 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 909                                    AD7280A_ALERT, 1,
 910                                    AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
 911                 if (ret)
 912                         goto error_unregister;
 913
 914                 ret = ad7280_write(st, AD7280A_DEVADDR(st->slave_num),
 915                                    AD7280A_ALERT, 0,
 916                                    AD7280A_ALERT_GEN_STATIC_HIGH |
 917                                    (pdata->chain_last_alert_ignore & 0xF));
 918                 if (ret)
 919                         goto error_unregister;
 920
 921                 ret = request_threaded_irq(spi->irq,
 922                                            NULL,
 923                                            ad7280_event_handler,
 924                                            IRQF_TRIGGER_FALLING |
 925                                            IRQF_ONESHOT,
 926                                            indio_dev->name,
 927                                            indio_dev);
 928                 if (ret)
 929                         goto error_unregister;
 930         }
 931
 932         return 0;
 933 error_unregister:
 934         iio_device_unregister(indio_dev);
 935
 936 error_free_attr:
 937         kfree(st->iio_attr);
 938
 939 error_free_channels:
 940         kfree(st->channels);
 941
 942         return ret;
 943 }
 944
 945 static int ad7280_remove(struct spi_device *spi)
 946 {
 947         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 948         struct ad7280_state *st = iio_priv(indio_dev);
 949
 950         if (spi->irq > 0)
 951                 free_irq(spi->irq, indio_dev);
 952         iio_device_unregister(indio_dev);
 953
 954         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 955                         AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
 956
 957         kfree(st->channels);
 958         kfree(st->iio_attr);
 959
 960         return 0;
 961 }
 962
 963 static const struct spi_device_id ad7280_id[] = {
 964         {"ad7280a", 0},
 965         {}
 966 };
 967 MODULE_DEVICE_TABLE(spi, ad7280_id);
 968
 969 static struct spi_driver ad7280_driver = {
 970         .driver = {
 971                 .name   = "ad7280",
 972                 .owner  = THIS_MODULE,
 973         },
 974         .probe          = ad7280_probe,
 975         .remove         = ad7280_remove,
 976         .id_table       = ad7280_id,
 977 };
 978 module_spi_driver(ad7280_driver);
 979
 980 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 981 MODULE_DESCRIPTION("Analog Devices AD7280A");
 982 MODULE_LICENSE("GPL v2");