drivers/staging/imx-drm/ipuv3-crtc.c

   1 /*
   2  * i.MX IPUv3 Graphics driver
   3  *
   4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18  * MA 02110-1301, USA.
  19  */
  20 #include <linux/module.h>
  21 #include <linux/export.h>
  22 #include <linux/device.h>
  23 #include <linux/platform_device.h>
  24 #include <drm/drmP.h>
  25 #include <drm/drm_crtc_helper.h>
  26 #include <linux/fb.h>
  27 #include <linux/clk.h>
  28 #include <drm/drm_gem_cma_helper.h>
  29 #include <drm/drm_fb_cma_helper.h>
  30
  31 #include "ipu-v3/imx-ipu-v3.h"
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
  35
  36 struct ipu_framebuffer {
  37         struct drm_framebuffer  base;
  38         void                    *virt;
  39         dma_addr_t              phys;
  40         size_t                  len;
  41 };
  42
  43 struct ipu_crtc {
  44         struct device           *dev;
  45         struct drm_crtc         base;
  46         struct imx_drm_crtc     *imx_crtc;
  47         struct ipuv3_channel    *ipu_ch;
  48         struct ipu_dc           *dc;
  49         struct ipu_dp           *dp;
  50         struct dmfc_channel     *dmfc;
  51         struct ipu_di           *di;
  52         int                     enabled;
  53         struct drm_pending_vblank_event *page_flip_event;
  54         struct drm_framebuffer  *newfb;
  55         int                     irq;
  56         u32                     interface_pix_fmt;
  57         unsigned long           di_clkflags;
  58         int                     di_hsync_pin;
  59         int                     di_vsync_pin;
  60 };
  61
  62 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
  63
  64 static int calc_vref(struct drm_display_mode *mode)
  65 {
  66         unsigned long htotal, vtotal;
  67
  68         htotal = mode->htotal;
  69         vtotal = mode->vtotal;
  70
  71         if (!htotal || !vtotal)
  72                 return 60;
  73
  74         return mode->clock * 1000 / vtotal / htotal;
  75 }
  76
  77 static int calc_bandwidth(struct drm_display_mode *mode, unsigned int vref)
  78 {
  79         return mode->hdisplay * mode->vdisplay * vref;
  80 }
  81
  82 static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
  83 {
  84         if (ipu_crtc->enabled)
  85                 return;
  86
  87         ipu_di_enable(ipu_crtc->di);
  88         ipu_dmfc_enable_channel(ipu_crtc->dmfc);
  89         ipu_idmac_enable_channel(ipu_crtc->ipu_ch);
  90         ipu_dc_enable_channel(ipu_crtc->dc);
  91         if (ipu_crtc->dp)
  92                 ipu_dp_enable_channel(ipu_crtc->dp);
  93
  94         ipu_crtc->enabled = 1;
  95 }
  96
  97 static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
  98 {
  99         if (!ipu_crtc->enabled)
 100                 return;
 101
 102         if (ipu_crtc->dp)
 103                 ipu_dp_disable_channel(ipu_crtc->dp);
 104         ipu_dc_disable_channel(ipu_crtc->dc);
 105         ipu_idmac_disable_channel(ipu_crtc->ipu_ch);
 106         ipu_dmfc_disable_channel(ipu_crtc->dmfc);
 107         ipu_di_disable(ipu_crtc->di);
 108
 109         ipu_crtc->enabled = 0;
 110 }
 111
 112 static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
 113 {
 114         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 115
 116         dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
 117
 118         switch (mode) {
 119         case DRM_MODE_DPMS_ON:
 120                 ipu_fb_enable(ipu_crtc);
 121                 break;
 122         case DRM_MODE_DPMS_STANDBY:
 123         case DRM_MODE_DPMS_SUSPEND:
 124         case DRM_MODE_DPMS_OFF:
 125                 ipu_fb_disable(ipu_crtc);
 126                 break;
 127         }
 128 }
 129
 130 static int ipu_page_flip(struct drm_crtc *crtc,
 131                 struct drm_framebuffer *fb,
 132                 struct drm_pending_vblank_event *event,
 133                 uint32_t page_flip_flags)
 134 {
 135         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 136         int ret;
 137
 138         if (ipu_crtc->newfb)
 139                 return -EBUSY;
 140
 141         ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
 142         if (ret) {
 143                 dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
 144                 list_del(&event->base.link);
 145
 146                 return ret;
 147         }
 148
 149         ipu_crtc->newfb = fb;
 150         ipu_crtc->page_flip_event = event;
 151         crtc->fb = fb;
 152
 153         return 0;
 154 }
 155
 156 static const struct drm_crtc_funcs ipu_crtc_funcs = {
 157         .set_config = drm_crtc_helper_set_config,
 158         .destroy = drm_crtc_cleanup,
 159         .page_flip = ipu_page_flip,
 160 };
 161
 162 static int ipu_drm_set_base(struct drm_crtc *crtc, int x, int y)
 163 {
 164         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 165         struct drm_gem_cma_object *cma_obj;
 166         struct drm_framebuffer *fb = crtc->fb;
 167         unsigned long phys;
 168
 169         cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
 170         if (!cma_obj) {
 171                 DRM_LOG_KMS("entry is null.\n");
 172                 return -EFAULT;
 173         }
 174
 175         phys = cma_obj->paddr;
 176         phys += x * (fb->bits_per_pixel >> 3);
 177         phys += y * fb->pitches[0];
 178
 179         dev_dbg(ipu_crtc->dev, "%s: phys: 0x%lx\n", __func__, phys);
 180         dev_dbg(ipu_crtc->dev, "%s: xy: %dx%d\n", __func__, x, y);
 181
 182         ipu_cpmem_set_stride(ipu_get_cpmem(ipu_crtc->ipu_ch), fb->pitches[0]);
 183         ipu_cpmem_set_buffer(ipu_get_cpmem(ipu_crtc->ipu_ch),
 184                           0, phys);
 185
 186         return 0;
 187 }
 188
 189 static int ipu_crtc_mode_set(struct drm_crtc *crtc,
 190                                struct drm_display_mode *orig_mode,
 191                                struct drm_display_mode *mode,
 192                                int x, int y,
 193                                struct drm_framebuffer *old_fb)
 194 {
 195         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 196         struct drm_framebuffer *fb = ipu_crtc->base.fb;
 197         int ret;
 198         struct ipu_di_signal_cfg sig_cfg = {};
 199         u32 out_pixel_fmt;
 200         struct ipu_ch_param __iomem *cpmem = ipu_get_cpmem(ipu_crtc->ipu_ch);
 201         int bpp;
 202         u32 v4l2_fmt;
 203
 204         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
 205                         mode->hdisplay);
 206         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
 207                         mode->vdisplay);
 208
 209         ipu_ch_param_zero(cpmem);
 210
 211         switch (fb->pixel_format) {
 212         case DRM_FORMAT_XRGB8888:
 213         case DRM_FORMAT_ARGB8888:
 214                 v4l2_fmt = V4L2_PIX_FMT_RGB32;
 215                 bpp = 32;
 216                 break;
 217         case DRM_FORMAT_RGB565:
 218                 v4l2_fmt = V4L2_PIX_FMT_RGB565;
 219                 bpp = 16;
 220                 break;
 221         case DRM_FORMAT_RGB888:
 222                 v4l2_fmt = V4L2_PIX_FMT_RGB24;
 223                 bpp = 24;
 224                 break;
 225         default:
 226                 dev_err(ipu_crtc->dev, "unsupported pixel format 0x%08x\n",
 227                                 fb->pixel_format);
 228                 return -EINVAL;
 229         }
 230
 231         out_pixel_fmt = ipu_crtc->interface_pix_fmt;
 232
 233         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 234                 sig_cfg.interlaced = 1;
 235         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 236                 sig_cfg.Hsync_pol = 1;
 237         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 238                 sig_cfg.Vsync_pol = 1;
 239
 240         sig_cfg.enable_pol = 1;
 241         sig_cfg.clk_pol = 0;
 242         sig_cfg.width = mode->hdisplay;
 243         sig_cfg.height = mode->vdisplay;
 244         sig_cfg.pixel_fmt = out_pixel_fmt;
 245         sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
 246         sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
 247         sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;
 248
 249         sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
 250         sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
 251         sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
 252         sig_cfg.pixelclock = mode->clock * 1000;
 253         sig_cfg.clkflags = ipu_crtc->di_clkflags;
 254
 255         sig_cfg.v_to_h_sync = 0;
 256
 257         sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
 258         sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
 259
 260         if (ipu_crtc->dp) {
 261                 ret = ipu_dp_setup_channel(ipu_crtc->dp, IPUV3_COLORSPACE_RGB,
 262                                 IPUV3_COLORSPACE_RGB);
 263                 if (ret) {
 264                         dev_err(ipu_crtc->dev,
 265                                 "initializing display processor failed with %d\n",
 266                                 ret);
 267                         return ret;
 268                 }
 269                 ipu_dp_set_global_alpha(ipu_crtc->dp, 1, 0, 1);
 270         }
 271
 272         ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
 273                         out_pixel_fmt, mode->hdisplay);
 274         if (ret) {
 275                 dev_err(ipu_crtc->dev,
 276                                 "initializing display controller failed with %d\n",
 277                                 ret);
 278                 return ret;
 279         }
 280
 281         ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
 282         if (ret) {
 283                 dev_err(ipu_crtc->dev,
 284                                 "initializing panel failed with %d\n", ret);
 285                 return ret;
 286         }
 287
 288         ipu_cpmem_set_resolution(cpmem, mode->hdisplay, mode->vdisplay);
 289         ipu_cpmem_set_fmt(cpmem, v4l2_fmt);
 290         ipu_cpmem_set_high_priority(ipu_crtc->ipu_ch);
 291
 292         ret = ipu_dmfc_init_channel(ipu_crtc->dmfc, mode->hdisplay);
 293         if (ret) {
 294                 dev_err(ipu_crtc->dev,
 295                                 "initializing dmfc channel failed with %d\n",
 296                                 ret);
 297                 return ret;
 298         }
 299
 300         ret = ipu_dmfc_alloc_bandwidth(ipu_crtc->dmfc,
 301                         calc_bandwidth(mode, calc_vref(mode)), 64);
 302         if (ret) {
 303                 dev_err(ipu_crtc->dev,
 304                                 "allocating dmfc bandwidth failed with %d\n",
 305                                 ret);
 306                 return ret;
 307         }
 308
 309         ipu_drm_set_base(crtc, x, y);
 310
 311         return 0;
 312 }
 313
 314 static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
 315 {
 316         unsigned long flags;
 317         struct drm_device *drm = ipu_crtc->base.dev;
 318
 319         spin_lock_irqsave(&drm->event_lock, flags);
 320         if (ipu_crtc->page_flip_event)
 321                 drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
 322         ipu_crtc->page_flip_event = NULL;
 323         imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
 324         spin_unlock_irqrestore(&drm->event_lock, flags);
 325 }
 326
 327 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
 328 {
 329         struct ipu_crtc *ipu_crtc = dev_id;
 330
 331         imx_drm_handle_vblank(ipu_crtc->imx_crtc);
 332
 333         if (ipu_crtc->newfb) {
 334                 ipu_crtc->newfb = NULL;
 335                 ipu_drm_set_base(&ipu_crtc->base, 0, 0);
 336                 ipu_crtc_handle_pageflip(ipu_crtc);
 337         }
 338
 339         return IRQ_HANDLED;
 340 }
 341
 342 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
 343                                   const struct drm_display_mode *mode,
 344                                   struct drm_display_mode *adjusted_mode)
 345 {
 346         return true;
 347 }
 348
 349 static void ipu_crtc_prepare(struct drm_crtc *crtc)
 350 {
 351         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 352
 353         ipu_fb_disable(ipu_crtc);
 354 }
 355
 356 static void ipu_crtc_commit(struct drm_crtc *crtc)
 357 {
 358         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 359
 360         ipu_fb_enable(ipu_crtc);
 361 }
 362
 363 static struct drm_crtc_helper_funcs ipu_helper_funcs = {
 364         .dpms = ipu_crtc_dpms,
 365         .mode_fixup = ipu_crtc_mode_fixup,
 366         .mode_set = ipu_crtc_mode_set,
 367         .prepare = ipu_crtc_prepare,
 368         .commit = ipu_crtc_commit,
 369 };
 370
 371 static int ipu_enable_vblank(struct drm_crtc *crtc)
 372 {
 373         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 374
 375         enable_irq(ipu_crtc->irq);
 376
 377         return 0;
 378 }
 379
 380 static void ipu_disable_vblank(struct drm_crtc *crtc)
 381 {
 382         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 383
 384         disable_irq(ipu_crtc->irq);
 385 }
 386
 387 static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
 388                 u32 pixfmt, int hsync_pin, int vsync_pin)
 389 {
 390         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 391
 392         ipu_crtc->interface_pix_fmt = pixfmt;
 393         ipu_crtc->di_hsync_pin = hsync_pin;
 394         ipu_crtc->di_vsync_pin = vsync_pin;
 395
 396         switch (encoder_type) {
 397         case DRM_MODE_ENCODER_DAC:
 398         case DRM_MODE_ENCODER_TVDAC:
 399         case DRM_MODE_ENCODER_LVDS:
 400                 ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC |
 401                         IPU_DI_CLKMODE_EXT;
 402                 break;
 403         case DRM_MODE_ENCODER_NONE:
 404                 ipu_crtc->di_clkflags = 0;
 405                 break;
 406         }
 407
 408         return 0;
 409 }
 410
 411 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
 412         .enable_vblank = ipu_enable_vblank,
 413         .disable_vblank = ipu_disable_vblank,
 414         .set_interface_pix_fmt = ipu_set_interface_pix_fmt,
 415         .crtc_funcs = &ipu_crtc_funcs,
 416         .crtc_helper_funcs = &ipu_helper_funcs,
 417 };
 418
 419 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
 420 {
 421         if (!IS_ERR_OR_NULL(ipu_crtc->ipu_ch))
 422                 ipu_idmac_put(ipu_crtc->ipu_ch);
 423         if (!IS_ERR_OR_NULL(ipu_crtc->dmfc))
 424                 ipu_dmfc_put(ipu_crtc->dmfc);
 425         if (!IS_ERR_OR_NULL(ipu_crtc->dp))
 426                 ipu_dp_put(ipu_crtc->dp);
 427         if (!IS_ERR_OR_NULL(ipu_crtc->di))
 428                 ipu_di_put(ipu_crtc->di);
 429 }
 430
 431 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
 432                 struct ipu_client_platformdata *pdata)
 433 {
 434         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 435         int ret;
 436
 437         ipu_crtc->ipu_ch = ipu_idmac_get(ipu, pdata->dma[0]);
 438         if (IS_ERR(ipu_crtc->ipu_ch)) {
 439                 ret = PTR_ERR(ipu_crtc->ipu_ch);
 440                 goto err_out;
 441         }
 442
 443         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
 444         if (IS_ERR(ipu_crtc->dc)) {
 445                 ret = PTR_ERR(ipu_crtc->dc);
 446                 goto err_out;
 447         }
 448
 449         ipu_crtc->dmfc = ipu_dmfc_get(ipu, pdata->dma[0]);
 450         if (IS_ERR(ipu_crtc->dmfc)) {
 451                 ret = PTR_ERR(ipu_crtc->dmfc);
 452                 goto err_out;
 453         }
 454
 455         if (pdata->dp >= 0) {
 456                 ipu_crtc->dp = ipu_dp_get(ipu, pdata->dp);
 457                 if (IS_ERR(ipu_crtc->dp)) {
 458                         ret = PTR_ERR(ipu_crtc->dp);
 459                         goto err_out;
 460                 }
 461         }
 462
 463         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
 464         if (IS_ERR(ipu_crtc->di)) {
 465                 ret = PTR_ERR(ipu_crtc->di);
 466                 goto err_out;
 467         }
 468
 469         return 0;
 470 err_out:
 471         ipu_put_resources(ipu_crtc);
 472
 473         return ret;
 474 }
 475
 476 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
 477                 struct ipu_client_platformdata *pdata)
 478 {
 479         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 480         int ret;
 481
 482         ret = ipu_get_resources(ipu_crtc, pdata);
 483         if (ret) {
 484                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
 485                                 ret);
 486                 return ret;
 487         }
 488
 489         ret = imx_drm_add_crtc(&ipu_crtc->base,
 490                         &ipu_crtc->imx_crtc,
 491                         &ipu_crtc_helper_funcs, THIS_MODULE,
 492                         ipu_crtc->dev->parent->of_node, pdata->di);
 493         if (ret) {
 494                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
 495                 goto err_put_resources;
 496         }
 497
 498         ipu_crtc->irq = ipu_idmac_channel_irq(ipu, ipu_crtc->ipu_ch,
 499                         IPU_IRQ_EOF);
 500         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
 501                         "imx_drm", ipu_crtc);
 502         if (ret < 0) {
 503                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
 504                 goto err_put_resources;
 505         }
 506
 507         disable_irq(ipu_crtc->irq);
 508
 509         return 0;
 510
 511 err_put_resources:
 512         ipu_put_resources(ipu_crtc);
 513
 514         return ret;
 515 }
 516
 517 static int ipu_drm_probe(struct platform_device *pdev)
 518 {
 519         struct ipu_client_platformdata *pdata = pdev->dev.platform_data;
 520         struct ipu_crtc *ipu_crtc;
 521         int ret;
 522
 523         if (!pdata)
 524                 return -EINVAL;
 525
 526         pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
 527
 528         ipu_crtc = devm_kzalloc(&pdev->dev, sizeof(*ipu_crtc), GFP_KERNEL);
 529         if (!ipu_crtc)
 530                 return -ENOMEM;
 531
 532         ipu_crtc->dev = &pdev->dev;
 533
 534         ret = ipu_crtc_init(ipu_crtc, pdata);
 535         if (ret)
 536                 return ret;
 537
 538         platform_set_drvdata(pdev, ipu_crtc);
 539
 540         return 0;
 541 }
 542
 543 static int ipu_drm_remove(struct platform_device *pdev)
 544 {
 545         struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev);
 546
 547         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
 548
 549         ipu_put_resources(ipu_crtc);
 550
 551         return 0;
 552 }
 553
 554 static struct platform_driver ipu_drm_driver = {
 555         .driver = {
 556                 .name = "imx-ipuv3-crtc",
 557         },
 558         .probe = ipu_drm_probe,
 559         .remove = ipu_drm_remove,
 560 };
 561 module_platform_driver(ipu_drm_driver);
 562
 563 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
 564 MODULE_DESCRIPTION(DRIVER_DESC);
 565 MODULE_LICENSE("GPL");
 566 MODULE_ALIAS("platform:imx-ipuv3-crtc");